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-rw-r--r--Documentation/networking/stmmac.txt29
-rw-r--r--MAINTAINERS6
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h3
-rw-r--r--crypto/ablkcipher.c12
-rw-r--r--crypto/aead.c12
-rw-r--r--crypto/ahash.c6
-rw-r--r--crypto/blkcipher.c6
-rw-r--r--crypto/crypto_user.c22
-rw-r--r--crypto/pcompress.c6
-rw-r--r--crypto/rng.c6
-rw-r--r--crypto/shash.c6
-rw-r--r--drivers/atm/horizon.c5
-rw-r--r--drivers/hv/ring_buffer.c31
-rw-r--r--drivers/infiniband/core/cma.c6
-rw-r--r--drivers/infiniband/core/netlink.c3
-rw-r--r--drivers/net/can/dev.c31
-rw-r--r--drivers/net/ethernet/8390/ax88796.c1
-rw-r--r--drivers/net/ethernet/8390/etherh.c1
-rw-r--r--drivers/net/ethernet/Kconfig1
-rw-r--r--drivers/net/ethernet/Makefile1
-rw-r--r--drivers/net/ethernet/adaptec/starfire.c54
-rw-r--r--drivers/net/ethernet/adi/bfin_mac.c20
-rw-r--r--drivers/net/ethernet/atheros/atl1c/atl1c_main.c5
-rw-r--r--drivers/net/ethernet/atheros/atl1e/atl1e_main.c17
-rw-r--r--drivers/net/ethernet/broadcom/bnx2.c41
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x.h20
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c155
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h49
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c10
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h92
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h217
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c729
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h3
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c302
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h5
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c6
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h3
-rw-r--r--drivers/net/ethernet/broadcom/tg3.c1
-rw-r--r--drivers/net/ethernet/brocade/bna/bfa_ioc.c61
-rw-r--r--drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c142
-rw-r--r--drivers/net/ethernet/brocade/bna/bfi_reg.h6
-rw-r--r--drivers/net/ethernet/brocade/bna/bnad.c316
-rw-r--r--drivers/net/ethernet/brocade/bna/bnad.h11
-rw-r--r--drivers/net/ethernet/brocade/bna/bnad_ethtool.c6
-rw-r--r--drivers/net/ethernet/cadence/macb.c1
-rw-r--r--drivers/net/ethernet/cisco/enic/enic_main.c22
-rw-r--r--drivers/net/ethernet/dec/tulip/de2104x.c34
-rw-r--r--drivers/net/ethernet/dec/tulip/dmfe.c295
-rw-r--r--drivers/net/ethernet/dec/tulip/tulip_core.c27
-rw-r--r--drivers/net/ethernet/dec/tulip/uli526x.c443
-rw-r--r--drivers/net/ethernet/dec/tulip/winbond-840.c17
-rw-r--r--drivers/net/ethernet/dec/tulip/xircom_cb.c280
-rw-r--r--drivers/net/ethernet/dlink/dl2k.c416
-rw-r--r--drivers/net/ethernet/dlink/dl2k.h19
-rw-r--r--drivers/net/ethernet/dlink/sundance.c12
-rw-r--r--drivers/net/ethernet/dnet.c1
-rw-r--r--drivers/net/ethernet/fealnx.c14
-rw-r--r--drivers/net/ethernet/freescale/fec.c1
-rw-r--r--drivers/net/ethernet/freescale/fec_mpc52xx.c1
-rw-r--r--drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c1
-rw-r--r--drivers/net/ethernet/freescale/gianfar.h3
-rw-r--r--drivers/net/ethernet/freescale/gianfar_ethtool.c30
-rw-r--r--drivers/net/ethernet/freescale/gianfar_ptp.c2
-rw-r--r--drivers/net/ethernet/freescale/ucc_geth_ethtool.c1
-rw-r--r--drivers/net/ethernet/intel/Kconfig13
-rw-r--r--drivers/net/ethernet/intel/e1000/e1000_main.c26
-rw-r--r--drivers/net/ethernet/intel/e1000e/ethtool.c52
-rw-r--r--drivers/net/ethernet/intel/e1000e/hw.h47
-rw-r--r--drivers/net/ethernet/intel/e1000e/netdev.c81
-rw-r--r--drivers/net/ethernet/intel/igb/Makefile1
-rw-r--r--drivers/net/ethernet/intel/igb/igb.h21
-rw-r--r--drivers/net/ethernet/intel/igb/igb_main.c178
-rw-r--r--drivers/net/ethernet/intel/igb/igb_ptp.c381
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c25
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_common.c29
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_common.h2
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_type.h4
-rw-r--r--drivers/net/ethernet/marvell/mv643xx_eth.c1
-rw-r--r--drivers/net/ethernet/marvell/pxa168_eth.c1
-rw-r--r--drivers/net/ethernet/marvell/sky2.c4
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/Kconfig12
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/Makefile1
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c254
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/en_main.c2
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/en_netdev.c26
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/en_port.h2
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/en_resources.c6
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/en_rx.c4
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/en_tx.c10
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/mlx4.h20
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/mlx4_en.h28
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/port.c62
-rw-r--r--drivers/net/ethernet/myricom/myri10ge/myri10ge.c7
-rw-r--r--drivers/net/ethernet/natsemi/natsemi.c67
-rw-r--r--drivers/net/ethernet/neterion/s2io.c14
-rw-r--r--drivers/net/ethernet/neterion/vxge/vxge-main.c24
-rw-r--r--drivers/net/ethernet/neterion/vxge/vxge-main.h15
-rw-r--r--drivers/net/ethernet/nvidia/forcedeth.c5
-rw-r--r--drivers/net/ethernet/nxp/lpc_eth.c6
-rw-r--r--drivers/net/ethernet/packetengines/hamachi.c11
-rw-r--r--drivers/net/ethernet/packetengines/yellowfin.c32
-rw-r--r--drivers/net/ethernet/rdc/r6040.c1
-rw-r--r--drivers/net/ethernet/realtek/8139cp.c21
-rw-r--r--drivers/net/ethernet/realtek/8139too.c136
-rw-r--r--drivers/net/ethernet/realtek/r8169.c1
-rw-r--r--drivers/net/ethernet/renesas/Kconfig7
-rw-r--r--drivers/net/ethernet/renesas/sh_eth.c114
-rw-r--r--drivers/net/ethernet/renesas/sh_eth.h5
-rw-r--r--drivers/net/ethernet/silan/sc92031.c34
-rw-r--r--drivers/net/ethernet/sis/sis190.c26
-rw-r--r--drivers/net/ethernet/sis/sis900.c375
-rw-r--r--drivers/net/ethernet/smsc/epic100.c403
-rw-r--r--drivers/net/ethernet/smsc/smsc911x.c1
-rw-r--r--drivers/net/ethernet/smsc/smsc9420.c48
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/common.h19
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/dwmac1000.h2
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c4
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c42
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c12
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c6
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h1
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/enh_desc.c13
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/norm_desc.c13
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/stmmac.h48
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c1
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/stmmac_main.c109
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c36
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c3
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c2
-rw-r--r--drivers/net/ethernet/sun/sungem.c2
-rw-r--r--drivers/net/ethernet/sun/sunhme.c18
-rw-r--r--drivers/net/ethernet/sun/sunhme.h1
-rw-r--r--drivers/net/ethernet/tehuti/tehuti.c4
-rw-r--r--drivers/net/ethernet/ti/davinci_emac.c1
-rw-r--r--drivers/net/ethernet/via/via-rhine.c12
-rw-r--r--drivers/net/ethernet/via/via-velocity.c9
-rw-r--r--drivers/net/ethernet/wiznet/Kconfig81
-rw-r--r--drivers/net/ethernet/wiznet/Makefile2
-rw-r--r--drivers/net/ethernet/wiznet/w5100.c808
-rw-r--r--drivers/net/ethernet/wiznet/w5300.c722
-rw-r--r--drivers/net/ethernet/xilinx/ll_temac_main.c1
-rw-r--r--drivers/net/ethernet/xscale/Kconfig6
-rw-r--r--drivers/net/ethernet/xscale/Makefile1
-rw-r--r--drivers/net/ethernet/xscale/ixp2000/Kconfig6
-rw-r--r--drivers/net/ethernet/xscale/ixp2000/Makefile3
-rw-r--r--drivers/net/ethernet/xscale/ixp2000/caleb.c136
-rw-r--r--drivers/net/ethernet/xscale/ixp2000/caleb.h22
-rw-r--r--drivers/net/ethernet/xscale/ixp2000/enp2611.c232
-rw-r--r--drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.c212
-rw-r--r--drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.h115
-rw-r--r--drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.uc408
-rw-r--r--drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.ucode130
-rw-r--r--drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.uc272
-rw-r--r--drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.ucode98
-rw-r--r--drivers/net/ethernet/xscale/ixp2000/ixpdev.c437
-rw-r--r--drivers/net/ethernet/xscale/ixp2000/ixpdev.h29
-rw-r--r--drivers/net/ethernet/xscale/ixp2000/ixpdev_priv.h57
-rw-r--r--drivers/net/ethernet/xscale/ixp2000/pm3386.c351
-rw-r--r--drivers/net/ethernet/xscale/ixp2000/pm3386.h29
-rw-r--r--drivers/net/ethernet/xscale/ixp4xx_eth.c29
-rw-r--r--drivers/net/hippi/rrunner.c82
-rw-r--r--drivers/net/hyperv/netvsc.c41
-rw-r--r--drivers/net/hyperv/netvsc_drv.c6
-rw-r--r--drivers/net/macvlan.c3
-rw-r--r--drivers/net/phy/bcm63xx.c5
-rw-r--r--drivers/net/phy/davicom.c7
-rw-r--r--drivers/net/phy/dp83640.c31
-rw-r--r--drivers/net/phy/marvell.c18
-rw-r--r--drivers/net/ppp/pptp.c4
-rw-r--r--drivers/net/team/Kconfig11
-rw-r--r--drivers/net/team/Makefile1
-rw-r--r--drivers/net/team/team.c80
-rw-r--r--drivers/net/team/team_mode_loadbalance.c188
-rw-r--r--drivers/net/usb/usbnet.c1
-rw-r--r--drivers/net/wireless/ath/ath6kl/testmode.c5
-rw-r--r--drivers/net/wireless/ipw2x00/ipw2100.c131
-rw-r--r--drivers/net/wireless/ipw2x00/ipw2100.h1
-rw-r--r--drivers/net/wireless/ipw2x00/ipw2200.c4
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-testmode.c71
-rw-r--r--drivers/net/wireless/mac80211_hwsim.c24
-rw-r--r--drivers/net/wireless/wl12xx/testmode.c9
-rw-r--r--drivers/ptp/ptp_clock.c6
-rw-r--r--drivers/ptp/ptp_ixp46x.c3
-rw-r--r--include/linux/dcbnl.h12
-rw-r--r--include/linux/ethtool.h29
-rw-r--r--include/linux/filter.h7
-rw-r--r--include/linux/hyperv.h27
-rw-r--r--include/linux/if_link.h2
-rw-r--r--include/linux/if_team.h8
-rw-r--r--include/linux/mlx4/cmd.h4
-rw-r--r--include/linux/mlx4/device.h3
-rw-r--r--include/linux/mlx4/qp.h3
-rw-r--r--include/linux/netfilter/ipset/ip_set.h46
-rw-r--r--include/linux/netfilter/ipset/ip_set_ahash.h21
-rw-r--r--include/linux/phy.h3
-rw-r--r--include/linux/platform_data/wiznet.h24
-rw-r--r--include/linux/ptp_clock_kernel.h8
-rw-r--r--include/linux/stmmac.h55
-rw-r--r--include/net/dcbnl.h2
-rw-r--r--include/net/icmp.h1
-rw-r--r--include/net/netlink.h169
-rw-r--r--include/net/xfrm.h5
-rw-r--r--net/8021q/vlan_netlink.c16
-rw-r--r--net/appletalk/ddp.c6
-rw-r--r--net/bridge/br_fdb.c8
-rw-r--r--net/bridge/br_netlink.c25
-rw-r--r--net/caif/chnl_net.c14
-rw-r--r--net/core/ethtool.c59
-rw-r--r--net/core/fib_rules.c32
-rw-r--r--net/core/filter.c70
-rw-r--r--net/core/gen_stats.c3
-rw-r--r--net/core/kmap_skb.h19
-rw-r--r--net/core/neighbour.c75
-rw-r--r--net/core/rtnetlink.c70
-rw-r--r--net/core/skbuff.c42
-rw-r--r--net/dcb/dcbnl.c92
-rw-r--r--net/decnet/dn_dev.c14
-rw-r--r--net/decnet/dn_rules.c10
-rw-r--r--net/ieee802154/nl-mac.c146
-rw-r--r--net/ieee802154/nl-phy.c29
-rw-r--r--net/ipv4/devinet.c20
-rw-r--r--net/ipv4/fib_rules.c16
-rw-r--r--net/ipv4/fib_semantics.c47
-rw-r--r--net/ipv4/igmp.c2
-rw-r--r--net/ipv4/ip_gre.c23
-rw-r--r--net/ipv4/ipmr.c9
-rw-r--r--net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c5
-rw-r--r--net/ipv4/netfilter/nf_conntrack_proto_icmp.c12
-rw-r--r--net/ipv4/route.c47
-rw-r--r--net/ipv6/addrconf.c57
-rw-r--r--net/ipv6/addrconf_core.c2
-rw-r--r--net/ipv6/datagram.c10
-rw-r--r--net/ipv6/exthdrs.c13
-rw-r--r--net/ipv6/exthdrs_core.c3
-rw-r--r--net/ipv6/fib6_rules.c18
-rw-r--r--net/ipv6/icmp.c5
-rw-r--r--net/ipv6/ip6mr.c9
-rw-r--r--net/ipv6/mcast.c2
-rw-r--r--net/ipv6/ndisc.c5
-rw-r--r--net/ipv6/netfilter/nf_conntrack_l3proto_ipv6.c9
-rw-r--r--net/ipv6/netfilter/nf_conntrack_proto_icmpv6.c12
-rw-r--r--net/ipv6/route.c39
-rw-r--r--net/ipv6/sit.c6
-rw-r--r--net/l2tp/l2tp_netlink.c114
-rw-r--r--net/netfilter/ipset/ip_set_bitmap_ip.c33
-rw-r--r--net/netfilter/ipset/ip_set_bitmap_ipmac.c43
-rw-r--r--net/netfilter/ipset/ip_set_bitmap_port.c29
-rw-r--r--net/netfilter/ipset/ip_set_core.c43
-rw-r--r--net/netfilter/ipset/ip_set_hash_ip.c20
-rw-r--r--net/netfilter/ipset/ip_set_hash_ipport.c37
-rw-r--r--net/netfilter/ipset/ip_set_hash_ipportip.c45
-rw-r--r--net/netfilter/ipset/ip_set_hash_ipportnet.c69
-rw-r--r--net/netfilter/ipset/ip_set_hash_net.c45
-rw-r--r--net/netfilter/ipset/ip_set_hash_netiface.c52
-rw-r--r--net/netfilter/ipset/ip_set_hash_netport.c61
-rw-r--r--net/netfilter/ipset/ip_set_list_set.c23
-rw-r--r--net/netfilter/ipvs/ip_vs_ctl.c108
-rw-r--r--net/netfilter/nf_conntrack_core.c5
-rw-r--r--net/netfilter/nf_conntrack_netlink.c83
-rw-r--r--net/netfilter/nf_conntrack_proto_dccp.c18
-rw-r--r--net/netfilter/nf_conntrack_proto_generic.c3
-rw-r--r--net/netfilter/nf_conntrack_proto_gre.c9
-rw-r--r--net/netfilter/nf_conntrack_proto_sctp.c22
-rw-r--r--net/netfilter/nf_conntrack_proto_tcp.c68
-rw-r--r--net/netfilter/nf_conntrack_proto_udp.c9
-rw-r--r--net/netfilter/nf_conntrack_proto_udplite.c9
-rw-r--r--net/netfilter/nfnetlink_acct.c10
-rw-r--r--net/netfilter/nfnetlink_cttimeout.c11
-rw-r--r--net/netfilter/nfnetlink_log.c100
-rw-r--r--net/netfilter/nfnetlink_queue.c59
-rw-r--r--net/netlink/genetlink.c35
-rw-r--r--net/nfc/netlink.c70
-rw-r--r--net/openvswitch/datapath.c34
-rw-r--r--net/openvswitch/flow.c18
-rw-r--r--net/phonet/pn_netlink.c8
-rw-r--r--net/sched/act_api.c9
-rw-r--r--net/sched/act_csum.c6
-rw-r--r--net/sched/act_gact.c9
-rw-r--r--net/sched/act_ipt.c14
-rw-r--r--net/sched/act_mirred.c6
-rw-r--r--net/sched/act_nat.c6
-rw-r--r--net/sched/act_pedit.c6
-rw-r--r--net/sched/act_police.c13
-rw-r--r--net/sched/act_simple.c8
-rw-r--r--net/sched/act_skbedit.c27
-rw-r--r--net/sched/cls_api.c3
-rw-r--r--net/sched/cls_basic.c5
-rw-r--r--net/sched/cls_flow.c35
-rw-r--r--net/sched/cls_fw.c15
-rw-r--r--net/sched/cls_route.c16
-rw-r--r--net/sched/cls_rsvp.h16
-rw-r--r--net/sched/cls_tcindex.c14
-rw-r--r--net/sched/cls_u32.c40
-rw-r--r--net/sched/em_meta.c19
-rw-r--r--net/sched/ematch.c6
-rw-r--r--net/sched/sch_api.c9
-rw-r--r--net/sched/sch_atm.c21
-rw-r--r--net/sched/sch_cbq.c18
-rw-r--r--net/sched/sch_choke.c5
-rw-r--r--net/sched/sch_drr.c3
-rw-r--r--net/sched/sch_dsmark.c18
-rw-r--r--net/sched/sch_fifo.c3
-rw-r--r--net/sched/sch_generic.c3
-rw-r--r--net/sched/sch_gred.c6
-rw-r--r--net/sched/sch_hfsc.c6
-rw-r--r--net/sched/sch_htb.c6
-rw-r--r--net/sched/sch_mqprio.c3
-rw-r--r--net/sched/sch_multiq.c3
-rw-r--r--net/sched/sch_netem.c21
-rw-r--r--net/sched/sch_prio.c3
-rw-r--r--net/sched/sch_qfq.c5
-rw-r--r--net/sched/sch_red.c5
-rw-r--r--net/sched/sch_sfb.c3
-rw-r--r--net/sched/sch_sfq.c3
-rw-r--r--net/sched/sch_tbf.c3
-rw-r--r--net/unix/af_unix.c15
-rw-r--r--net/wireless/nl80211.c1204
-rw-r--r--net/wireless/wext-core.c3
-rw-r--r--net/xfrm/xfrm_user.c105
319 files changed, 8878 insertions, 7700 deletions
diff --git a/Documentation/networking/stmmac.txt b/Documentation/networking/stmmac.txt
index d0aeeadd264b..ab1e8d7004c5 100644
--- a/Documentation/networking/stmmac.txt
+++ b/Documentation/networking/stmmac.txt
@@ -111,11 +111,12 @@ and detailed below as well:
111 int phy_addr; 111 int phy_addr;
112 int interface; 112 int interface;
113 struct stmmac_mdio_bus_data *mdio_bus_data; 113 struct stmmac_mdio_bus_data *mdio_bus_data;
114 int pbl; 114 struct stmmac_dma_cfg *dma_cfg;
115 int clk_csr; 115 int clk_csr;
116 int has_gmac; 116 int has_gmac;
117 int enh_desc; 117 int enh_desc;
118 int tx_coe; 118 int tx_coe;
119 int rx_coe;
119 int bugged_jumbo; 120 int bugged_jumbo;
120 int pmt; 121 int pmt;
121 int force_sf_dma_mode; 122 int force_sf_dma_mode;
@@ -136,10 +137,12 @@ Where:
136 o pbl: the Programmable Burst Length is maximum number of beats to 137 o pbl: the Programmable Burst Length is maximum number of beats to
137 be transferred in one DMA transaction. 138 be transferred in one DMA transaction.
138 GMAC also enables the 4xPBL by default. 139 GMAC also enables the 4xPBL by default.
139 o clk_csr: CSR Clock range selection. 140 o clk_csr: fixed CSR Clock range selection.
140 o has_gmac: uses the GMAC core. 141 o has_gmac: uses the GMAC core.
141 o enh_desc: if sets the MAC will use the enhanced descriptor structure. 142 o enh_desc: if sets the MAC will use the enhanced descriptor structure.
142 o tx_coe: core is able to perform the tx csum in HW. 143 o tx_coe: core is able to perform the tx csum in HW.
144 o rx_coe: the supports three check sum offloading engine types:
145 type_1, type_2 (full csum) and no RX coe.
143 o bugged_jumbo: some HWs are not able to perform the csum in HW for 146 o bugged_jumbo: some HWs are not able to perform the csum in HW for
144 over-sized frames due to limited buffer sizes. 147 over-sized frames due to limited buffer sizes.
145 Setting this flag the csum will be done in SW on 148 Setting this flag the csum will be done in SW on
@@ -160,7 +163,7 @@ Where:
160 o custom_cfg: this is a custom configuration that can be passed while 163 o custom_cfg: this is a custom configuration that can be passed while
161 initialising the resources. 164 initialising the resources.
162 165
163The we have: 166For MDIO bus The we have:
164 167
165 struct stmmac_mdio_bus_data { 168 struct stmmac_mdio_bus_data {
166 int bus_id; 169 int bus_id;
@@ -177,10 +180,28 @@ Where:
177 o irqs: list of IRQs, one per PHY. 180 o irqs: list of IRQs, one per PHY.
178 o probed_phy_irq: if irqs is NULL, use this for probed PHY. 181 o probed_phy_irq: if irqs is NULL, use this for probed PHY.
179 182
183
184For DMA engine we have the following internal fields that should be
185tuned according to the HW capabilities.
186
187struct stmmac_dma_cfg {
188 int pbl;
189 int fixed_burst;
190 int burst_len_supported;
191};
192
193Where:
194 o pbl: Programmable Burst Length
195 o fixed_burst: program the DMA to use the fixed burst mode
196 o burst_len: this is the value we put in the register
197 supported values are provided as macros in
198 linux/stmmac.h header file.
199
200---
201
180Below an example how the structures above are using on ST platforms. 202Below an example how the structures above are using on ST platforms.
181 203
182 static struct plat_stmmacenet_data stxYYY_ethernet_platform_data = { 204 static struct plat_stmmacenet_data stxYYY_ethernet_platform_data = {
183 .pbl = 32,
184 .has_gmac = 0, 205 .has_gmac = 0,
185 .enh_desc = 0, 206 .enh_desc = 0,
186 .fix_mac_speed = stxYYY_ethernet_fix_mac_speed, 207 .fix_mac_speed = stxYYY_ethernet_fix_mac_speed,
diff --git a/MAINTAINERS b/MAINTAINERS
index 6d05ae236036..f7c39b88a503 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3519,12 +3519,6 @@ M: Deepak Saxena <dsaxena@plexity.net>
3519S: Maintained 3519S: Maintained
3520F: drivers/char/hw_random/ixp4xx-rng.c 3520F: drivers/char/hw_random/ixp4xx-rng.c
3521 3521
3522INTEL IXP2000 ETHERNET DRIVER
3523M: Lennert Buytenhek <kernel@wantstofly.org>
3524L: netdev@vger.kernel.org
3525S: Maintained
3526F: drivers/net/ethernet/xscale/ixp2000/
3527
3528INTEL ETHERNET DRIVERS (e100/e1000/e1000e/igb/igbvf/ixgb/ixgbe/ixgbevf) 3522INTEL ETHERNET DRIVERS (e100/e1000/e1000e/igb/igbvf/ixgb/ixgbe/ixgbevf)
3529M: Jeff Kirsher <jeffrey.t.kirsher@intel.com> 3523M: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
3530M: Jesse Brandeburg <jesse.brandeburg@intel.com> 3524M: Jesse Brandeburg <jesse.brandeburg@intel.com>
diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h b/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
index 292d55ed2113..cf03614d250d 100644
--- a/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
+++ b/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
@@ -75,4 +75,7 @@ struct ixp46x_ts_regs {
75#define TX_SNAPSHOT_LOCKED (1<<0) 75#define TX_SNAPSHOT_LOCKED (1<<0)
76#define RX_SNAPSHOT_LOCKED (1<<1) 76#define RX_SNAPSHOT_LOCKED (1<<1)
77 77
78/* The ptp_ixp46x module will set this variable */
79extern int ixp46x_phc_index;
80
78#endif 81#endif
diff --git a/crypto/ablkcipher.c b/crypto/ablkcipher.c
index 8d3a056ebeea..533de9550a82 100644
--- a/crypto/ablkcipher.c
+++ b/crypto/ablkcipher.c
@@ -397,9 +397,9 @@ static int crypto_ablkcipher_report(struct sk_buff *skb, struct crypto_alg *alg)
397 rblkcipher.max_keysize = alg->cra_ablkcipher.max_keysize; 397 rblkcipher.max_keysize = alg->cra_ablkcipher.max_keysize;
398 rblkcipher.ivsize = alg->cra_ablkcipher.ivsize; 398 rblkcipher.ivsize = alg->cra_ablkcipher.ivsize;
399 399
400 NLA_PUT(skb, CRYPTOCFGA_REPORT_BLKCIPHER, 400 if (nla_put(skb, CRYPTOCFGA_REPORT_BLKCIPHER,
401 sizeof(struct crypto_report_blkcipher), &rblkcipher); 401 sizeof(struct crypto_report_blkcipher), &rblkcipher))
402 402 goto nla_put_failure;
403 return 0; 403 return 0;
404 404
405nla_put_failure: 405nla_put_failure:
@@ -478,9 +478,9 @@ static int crypto_givcipher_report(struct sk_buff *skb, struct crypto_alg *alg)
478 rblkcipher.max_keysize = alg->cra_ablkcipher.max_keysize; 478 rblkcipher.max_keysize = alg->cra_ablkcipher.max_keysize;
479 rblkcipher.ivsize = alg->cra_ablkcipher.ivsize; 479 rblkcipher.ivsize = alg->cra_ablkcipher.ivsize;
480 480
481 NLA_PUT(skb, CRYPTOCFGA_REPORT_BLKCIPHER, 481 if (nla_put(skb, CRYPTOCFGA_REPORT_BLKCIPHER,
482 sizeof(struct crypto_report_blkcipher), &rblkcipher); 482 sizeof(struct crypto_report_blkcipher), &rblkcipher))
483 483 goto nla_put_failure;
484 return 0; 484 return 0;
485 485
486nla_put_failure: 486nla_put_failure:
diff --git a/crypto/aead.c b/crypto/aead.c
index e4cb35159be4..0b8121ebec07 100644
--- a/crypto/aead.c
+++ b/crypto/aead.c
@@ -125,9 +125,9 @@ static int crypto_aead_report(struct sk_buff *skb, struct crypto_alg *alg)
125 raead.maxauthsize = aead->maxauthsize; 125 raead.maxauthsize = aead->maxauthsize;
126 raead.ivsize = aead->ivsize; 126 raead.ivsize = aead->ivsize;
127 127
128 NLA_PUT(skb, CRYPTOCFGA_REPORT_AEAD, 128 if (nla_put(skb, CRYPTOCFGA_REPORT_AEAD,
129 sizeof(struct crypto_report_aead), &raead); 129 sizeof(struct crypto_report_aead), &raead))
130 130 goto nla_put_failure;
131 return 0; 131 return 0;
132 132
133nla_put_failure: 133nla_put_failure:
@@ -210,9 +210,9 @@ static int crypto_nivaead_report(struct sk_buff *skb, struct crypto_alg *alg)
210 raead.maxauthsize = aead->maxauthsize; 210 raead.maxauthsize = aead->maxauthsize;
211 raead.ivsize = aead->ivsize; 211 raead.ivsize = aead->ivsize;
212 212
213 NLA_PUT(skb, CRYPTOCFGA_REPORT_AEAD, 213 if (nla_put(skb, CRYPTOCFGA_REPORT_AEAD,
214 sizeof(struct crypto_report_aead), &raead); 214 sizeof(struct crypto_report_aead), &raead))
215 215 goto nla_put_failure;
216 return 0; 216 return 0;
217 217
218nla_put_failure: 218nla_put_failure:
diff --git a/crypto/ahash.c b/crypto/ahash.c
index 33bc9b62e9ae..3887856c2dd6 100644
--- a/crypto/ahash.c
+++ b/crypto/ahash.c
@@ -409,9 +409,9 @@ static int crypto_ahash_report(struct sk_buff *skb, struct crypto_alg *alg)
409 rhash.blocksize = alg->cra_blocksize; 409 rhash.blocksize = alg->cra_blocksize;
410 rhash.digestsize = __crypto_hash_alg_common(alg)->digestsize; 410 rhash.digestsize = __crypto_hash_alg_common(alg)->digestsize;
411 411
412 NLA_PUT(skb, CRYPTOCFGA_REPORT_HASH, 412 if (nla_put(skb, CRYPTOCFGA_REPORT_HASH,
413 sizeof(struct crypto_report_hash), &rhash); 413 sizeof(struct crypto_report_hash), &rhash))
414 414 goto nla_put_failure;
415 return 0; 415 return 0;
416 416
417nla_put_failure: 417nla_put_failure:
diff --git a/crypto/blkcipher.c b/crypto/blkcipher.c
index 4dd80c725498..a8d85a1d670e 100644
--- a/crypto/blkcipher.c
+++ b/crypto/blkcipher.c
@@ -508,9 +508,9 @@ static int crypto_blkcipher_report(struct sk_buff *skb, struct crypto_alg *alg)
508 rblkcipher.max_keysize = alg->cra_blkcipher.max_keysize; 508 rblkcipher.max_keysize = alg->cra_blkcipher.max_keysize;
509 rblkcipher.ivsize = alg->cra_blkcipher.ivsize; 509 rblkcipher.ivsize = alg->cra_blkcipher.ivsize;
510 510
511 NLA_PUT(skb, CRYPTOCFGA_REPORT_BLKCIPHER, 511 if (nla_put(skb, CRYPTOCFGA_REPORT_BLKCIPHER,
512 sizeof(struct crypto_report_blkcipher), &rblkcipher); 512 sizeof(struct crypto_report_blkcipher), &rblkcipher))
513 513 goto nla_put_failure;
514 return 0; 514 return 0;
515 515
516nla_put_failure: 516nla_put_failure:
diff --git a/crypto/crypto_user.c b/crypto/crypto_user.c
index f1ea0a064135..5a37eadb4e56 100644
--- a/crypto/crypto_user.c
+++ b/crypto/crypto_user.c
@@ -81,9 +81,9 @@ static int crypto_report_cipher(struct sk_buff *skb, struct crypto_alg *alg)
81 rcipher.min_keysize = alg->cra_cipher.cia_min_keysize; 81 rcipher.min_keysize = alg->cra_cipher.cia_min_keysize;
82 rcipher.max_keysize = alg->cra_cipher.cia_max_keysize; 82 rcipher.max_keysize = alg->cra_cipher.cia_max_keysize;
83 83
84 NLA_PUT(skb, CRYPTOCFGA_REPORT_CIPHER, 84 if (nla_put(skb, CRYPTOCFGA_REPORT_CIPHER,
85 sizeof(struct crypto_report_cipher), &rcipher); 85 sizeof(struct crypto_report_cipher), &rcipher))
86 86 goto nla_put_failure;
87 return 0; 87 return 0;
88 88
89nla_put_failure: 89nla_put_failure:
@@ -96,9 +96,9 @@ static int crypto_report_comp(struct sk_buff *skb, struct crypto_alg *alg)
96 96
97 snprintf(rcomp.type, CRYPTO_MAX_ALG_NAME, "%s", "compression"); 97 snprintf(rcomp.type, CRYPTO_MAX_ALG_NAME, "%s", "compression");
98 98
99 NLA_PUT(skb, CRYPTOCFGA_REPORT_COMPRESS, 99 if (nla_put(skb, CRYPTOCFGA_REPORT_COMPRESS,
100 sizeof(struct crypto_report_comp), &rcomp); 100 sizeof(struct crypto_report_comp), &rcomp))
101 101 goto nla_put_failure;
102 return 0; 102 return 0;
103 103
104nla_put_failure: 104nla_put_failure:
@@ -117,16 +117,16 @@ static int crypto_report_one(struct crypto_alg *alg,
117 ualg->cru_flags = alg->cra_flags; 117 ualg->cru_flags = alg->cra_flags;
118 ualg->cru_refcnt = atomic_read(&alg->cra_refcnt); 118 ualg->cru_refcnt = atomic_read(&alg->cra_refcnt);
119 119
120 NLA_PUT_U32(skb, CRYPTOCFGA_PRIORITY_VAL, alg->cra_priority); 120 if (nla_put_u32(skb, CRYPTOCFGA_PRIORITY_VAL, alg->cra_priority))
121 121 goto nla_put_failure;
122 if (alg->cra_flags & CRYPTO_ALG_LARVAL) { 122 if (alg->cra_flags & CRYPTO_ALG_LARVAL) {
123 struct crypto_report_larval rl; 123 struct crypto_report_larval rl;
124 124
125 snprintf(rl.type, CRYPTO_MAX_ALG_NAME, "%s", "larval"); 125 snprintf(rl.type, CRYPTO_MAX_ALG_NAME, "%s", "larval");
126 126
127 NLA_PUT(skb, CRYPTOCFGA_REPORT_LARVAL, 127 if (nla_put(skb, CRYPTOCFGA_REPORT_LARVAL,
128 sizeof(struct crypto_report_larval), &rl); 128 sizeof(struct crypto_report_larval), &rl))
129 129 goto nla_put_failure;
130 goto out; 130 goto out;
131 } 131 }
132 132
diff --git a/crypto/pcompress.c b/crypto/pcompress.c
index 2e458e5482d0..04e083ff5373 100644
--- a/crypto/pcompress.c
+++ b/crypto/pcompress.c
@@ -55,9 +55,9 @@ static int crypto_pcomp_report(struct sk_buff *skb, struct crypto_alg *alg)
55 55
56 snprintf(rpcomp.type, CRYPTO_MAX_ALG_NAME, "%s", "pcomp"); 56 snprintf(rpcomp.type, CRYPTO_MAX_ALG_NAME, "%s", "pcomp");
57 57
58 NLA_PUT(skb, CRYPTOCFGA_REPORT_COMPRESS, 58 if (nla_put(skb, CRYPTOCFGA_REPORT_COMPRESS,
59 sizeof(struct crypto_report_comp), &rpcomp); 59 sizeof(struct crypto_report_comp), &rpcomp))
60 60 goto nla_put_failure;
61 return 0; 61 return 0;
62 62
63nla_put_failure: 63nla_put_failure:
diff --git a/crypto/rng.c b/crypto/rng.c
index 64f864fa8043..f3b7894dec00 100644
--- a/crypto/rng.c
+++ b/crypto/rng.c
@@ -69,9 +69,9 @@ static int crypto_rng_report(struct sk_buff *skb, struct crypto_alg *alg)
69 69
70 rrng.seedsize = alg->cra_rng.seedsize; 70 rrng.seedsize = alg->cra_rng.seedsize;
71 71
72 NLA_PUT(skb, CRYPTOCFGA_REPORT_RNG, 72 if (nla_put(skb, CRYPTOCFGA_REPORT_RNG,
73 sizeof(struct crypto_report_rng), &rrng); 73 sizeof(struct crypto_report_rng), &rrng))
74 74 goto nla_put_failure;
75 return 0; 75 return 0;
76 76
77nla_put_failure: 77nla_put_failure:
diff --git a/crypto/shash.c b/crypto/shash.c
index 21fc12e2378f..32067f47e6c7 100644
--- a/crypto/shash.c
+++ b/crypto/shash.c
@@ -534,9 +534,9 @@ static int crypto_shash_report(struct sk_buff *skb, struct crypto_alg *alg)
534 rhash.blocksize = alg->cra_blocksize; 534 rhash.blocksize = alg->cra_blocksize;
535 rhash.digestsize = salg->digestsize; 535 rhash.digestsize = salg->digestsize;
536 536
537 NLA_PUT(skb, CRYPTOCFGA_REPORT_HASH, 537 if (nla_put(skb, CRYPTOCFGA_REPORT_HASH,
538 sizeof(struct crypto_report_hash), &rhash); 538 sizeof(struct crypto_report_hash), &rhash))
539 539 goto nla_put_failure;
540 return 0; 540 return 0;
541 541
542nla_put_failure: 542nla_put_failure:
diff --git a/drivers/atm/horizon.c b/drivers/atm/horizon.c
index 75fd691cd43e..7d01c2a75256 100644
--- a/drivers/atm/horizon.c
+++ b/drivers/atm/horizon.c
@@ -2182,7 +2182,6 @@ static int hrz_open (struct atm_vcc *atm_vcc)
2182 default: 2182 default:
2183 PRINTD (DBG_QOS|DBG_VCC, "Bad AAL!"); 2183 PRINTD (DBG_QOS|DBG_VCC, "Bad AAL!");
2184 return -EINVAL; 2184 return -EINVAL;
2185 break;
2186 } 2185 }
2187 2186
2188 // TX traffic parameters 2187 // TX traffic parameters
@@ -2357,7 +2356,6 @@ static int hrz_open (struct atm_vcc *atm_vcc)
2357 default: { 2356 default: {
2358 PRINTD (DBG_QOS, "unsupported TX traffic class"); 2357 PRINTD (DBG_QOS, "unsupported TX traffic class");
2359 return -EINVAL; 2358 return -EINVAL;
2360 break;
2361 } 2359 }
2362 } 2360 }
2363 } 2361 }
@@ -2433,7 +2431,6 @@ static int hrz_open (struct atm_vcc *atm_vcc)
2433 default: { 2431 default: {
2434 PRINTD (DBG_QOS, "unsupported RX traffic class"); 2432 PRINTD (DBG_QOS, "unsupported RX traffic class");
2435 return -EINVAL; 2433 return -EINVAL;
2436 break;
2437 } 2434 }
2438 } 2435 }
2439 } 2436 }
@@ -2581,7 +2578,6 @@ static int hrz_getsockopt (struct atm_vcc * atm_vcc, int level, int optname,
2581// break; 2578// break;
2582 default: 2579 default:
2583 return -ENOPROTOOPT; 2580 return -ENOPROTOOPT;
2584 break;
2585 }; 2581 };
2586 break; 2582 break;
2587 } 2583 }
@@ -2601,7 +2597,6 @@ static int hrz_setsockopt (struct atm_vcc * atm_vcc, int level, int optname,
2601// break; 2597// break;
2602 default: 2598 default:
2603 return -ENOPROTOOPT; 2599 return -ENOPROTOOPT;
2604 break;
2605 }; 2600 };
2606 break; 2601 break;
2607 } 2602 }
diff --git a/drivers/hv/ring_buffer.c b/drivers/hv/ring_buffer.c
index 8af25a097d75..7233c88f01b8 100644
--- a/drivers/hv/ring_buffer.c
+++ b/drivers/hv/ring_buffer.c
@@ -30,37 +30,6 @@
30#include "hyperv_vmbus.h" 30#include "hyperv_vmbus.h"
31 31
32 32
33/* #defines */
34
35
36/* Amount of space to write to */
37#define BYTES_AVAIL_TO_WRITE(r, w, z) \
38 ((w) >= (r)) ? ((z) - ((w) - (r))) : ((r) - (w))
39
40
41/*
42 *
43 * hv_get_ringbuffer_availbytes()
44 *
45 * Get number of bytes available to read and to write to
46 * for the specified ring buffer
47 */
48static inline void
49hv_get_ringbuffer_availbytes(struct hv_ring_buffer_info *rbi,
50 u32 *read, u32 *write)
51{
52 u32 read_loc, write_loc;
53
54 smp_read_barrier_depends();
55
56 /* Capture the read/write indices before they changed */
57 read_loc = rbi->ring_buffer->read_index;
58 write_loc = rbi->ring_buffer->write_index;
59
60 *write = BYTES_AVAIL_TO_WRITE(read_loc, write_loc, rbi->ring_datasize);
61 *read = rbi->ring_datasize - *write;
62}
63
64/* 33/*
65 * hv_get_next_write_location() 34 * hv_get_next_write_location()
66 * 35 *
diff --git a/drivers/infiniband/core/cma.c b/drivers/infiniband/core/cma.c
index e3e470fecaa9..59fbd704a1ec 100644
--- a/drivers/infiniband/core/cma.c
+++ b/drivers/infiniband/core/cma.c
@@ -42,6 +42,7 @@
42#include <linux/inetdevice.h> 42#include <linux/inetdevice.h>
43#include <linux/slab.h> 43#include <linux/slab.h>
44#include <linux/module.h> 44#include <linux/module.h>
45#include <net/route.h>
45 46
46#include <net/tcp.h> 47#include <net/tcp.h>
47#include <net/ipv6.h> 48#include <net/ipv6.h>
@@ -1826,7 +1827,10 @@ static int cma_resolve_iboe_route(struct rdma_id_private *id_priv)
1826 route->path_rec->reversible = 1; 1827 route->path_rec->reversible = 1;
1827 route->path_rec->pkey = cpu_to_be16(0xffff); 1828 route->path_rec->pkey = cpu_to_be16(0xffff);
1828 route->path_rec->mtu_selector = IB_SA_EQ; 1829 route->path_rec->mtu_selector = IB_SA_EQ;
1829 route->path_rec->sl = id_priv->tos >> 5; 1830 route->path_rec->sl = netdev_get_prio_tc_map(
1831 ndev->priv_flags & IFF_802_1Q_VLAN ?
1832 vlan_dev_real_dev(ndev) : ndev,
1833 rt_tos2priority(id_priv->tos));
1830 1834
1831 route->path_rec->mtu = iboe_get_mtu(ndev->mtu); 1835 route->path_rec->mtu = iboe_get_mtu(ndev->mtu);
1832 route->path_rec->rate_selector = IB_SA_EQ; 1836 route->path_rec->rate_selector = IB_SA_EQ;
diff --git a/drivers/infiniband/core/netlink.c b/drivers/infiniband/core/netlink.c
index 396e29370304..e497dfbee435 100644
--- a/drivers/infiniband/core/netlink.c
+++ b/drivers/infiniband/core/netlink.c
@@ -125,7 +125,8 @@ int ibnl_put_attr(struct sk_buff *skb, struct nlmsghdr *nlh,
125 unsigned char *prev_tail; 125 unsigned char *prev_tail;
126 126
127 prev_tail = skb_tail_pointer(skb); 127 prev_tail = skb_tail_pointer(skb);
128 NLA_PUT(skb, type, len, data); 128 if (nla_put(skb, type, len, data))
129 goto nla_put_failure;
129 nlh->nlmsg_len += skb_tail_pointer(skb) - prev_tail; 130 nlh->nlmsg_len += skb_tail_pointer(skb) - prev_tail;
130 return 0; 131 return 0;
131 132
diff --git a/drivers/net/can/dev.c b/drivers/net/can/dev.c
index c5fe3a3db8c9..f03d7a481a80 100644
--- a/drivers/net/can/dev.c
+++ b/drivers/net/can/dev.c
@@ -687,18 +687,19 @@ static int can_fill_info(struct sk_buff *skb, const struct net_device *dev)
687 687
688 if (priv->do_get_state) 688 if (priv->do_get_state)
689 priv->do_get_state(dev, &state); 689 priv->do_get_state(dev, &state);
690 NLA_PUT_U32(skb, IFLA_CAN_STATE, state); 690 if (nla_put_u32(skb, IFLA_CAN_STATE, state) ||
691 NLA_PUT(skb, IFLA_CAN_CTRLMODE, sizeof(cm), &cm); 691 nla_put(skb, IFLA_CAN_CTRLMODE, sizeof(cm), &cm) ||
692 NLA_PUT_U32(skb, IFLA_CAN_RESTART_MS, priv->restart_ms); 692 nla_put_u32(skb, IFLA_CAN_RESTART_MS, priv->restart_ms) ||
693 NLA_PUT(skb, IFLA_CAN_BITTIMING, 693 nla_put(skb, IFLA_CAN_BITTIMING,
694 sizeof(priv->bittiming), &priv->bittiming); 694 sizeof(priv->bittiming), &priv->bittiming) ||
695 NLA_PUT(skb, IFLA_CAN_CLOCK, sizeof(cm), &priv->clock); 695 nla_put(skb, IFLA_CAN_CLOCK, sizeof(cm), &priv->clock) ||
696 if (priv->do_get_berr_counter && !priv->do_get_berr_counter(dev, &bec)) 696 (priv->do_get_berr_counter &&
697 NLA_PUT(skb, IFLA_CAN_BERR_COUNTER, sizeof(bec), &bec); 697 !priv->do_get_berr_counter(dev, &bec) &&
698 if (priv->bittiming_const) 698 nla_put(skb, IFLA_CAN_BERR_COUNTER, sizeof(bec), &bec)) ||
699 NLA_PUT(skb, IFLA_CAN_BITTIMING_CONST, 699 (priv->bittiming_const &&
700 sizeof(*priv->bittiming_const), priv->bittiming_const); 700 nla_put(skb, IFLA_CAN_BITTIMING_CONST,
701 701 sizeof(*priv->bittiming_const), priv->bittiming_const)))
702 goto nla_put_failure;
702 return 0; 703 return 0;
703 704
704nla_put_failure: 705nla_put_failure:
@@ -714,9 +715,9 @@ static int can_fill_xstats(struct sk_buff *skb, const struct net_device *dev)
714{ 715{
715 struct can_priv *priv = netdev_priv(dev); 716 struct can_priv *priv = netdev_priv(dev);
716 717
717 NLA_PUT(skb, IFLA_INFO_XSTATS, 718 if (nla_put(skb, IFLA_INFO_XSTATS,
718 sizeof(priv->can_stats), &priv->can_stats); 719 sizeof(priv->can_stats), &priv->can_stats))
719 720 goto nla_put_failure;
720 return 0; 721 return 0;
721 722
722nla_put_failure: 723nla_put_failure:
diff --git a/drivers/net/ethernet/8390/ax88796.c b/drivers/net/ethernet/8390/ax88796.c
index 11476ca95e93..203ff9dccadb 100644
--- a/drivers/net/ethernet/8390/ax88796.c
+++ b/drivers/net/ethernet/8390/ax88796.c
@@ -501,6 +501,7 @@ static const struct ethtool_ops ax_ethtool_ops = {
501 .get_settings = ax_get_settings, 501 .get_settings = ax_get_settings,
502 .set_settings = ax_set_settings, 502 .set_settings = ax_set_settings,
503 .get_link = ethtool_op_get_link, 503 .get_link = ethtool_op_get_link,
504 .get_ts_info = ethtool_op_get_ts_info,
504}; 505};
505 506
506#ifdef CONFIG_AX88796_93CX6 507#ifdef CONFIG_AX88796_93CX6
diff --git a/drivers/net/ethernet/8390/etherh.c b/drivers/net/ethernet/8390/etherh.c
index dbefd5658c14..8322c54972f3 100644
--- a/drivers/net/ethernet/8390/etherh.c
+++ b/drivers/net/ethernet/8390/etherh.c
@@ -635,6 +635,7 @@ static const struct ethtool_ops etherh_ethtool_ops = {
635 .get_settings = etherh_get_settings, 635 .get_settings = etherh_get_settings,
636 .set_settings = etherh_set_settings, 636 .set_settings = etherh_set_settings,
637 .get_drvinfo = etherh_get_drvinfo, 637 .get_drvinfo = etherh_get_drvinfo,
638 .get_ts_info = ethtool_op_get_ts_info,
638}; 639};
639 640
640static const struct net_device_ops etherh_netdev_ops = { 641static const struct net_device_ops etherh_netdev_ops = {
diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
index c63a64cb6085..a11af5cc4844 100644
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -174,6 +174,7 @@ source "drivers/net/ethernet/tile/Kconfig"
174source "drivers/net/ethernet/toshiba/Kconfig" 174source "drivers/net/ethernet/toshiba/Kconfig"
175source "drivers/net/ethernet/tundra/Kconfig" 175source "drivers/net/ethernet/tundra/Kconfig"
176source "drivers/net/ethernet/via/Kconfig" 176source "drivers/net/ethernet/via/Kconfig"
177source "drivers/net/ethernet/wiznet/Kconfig"
177source "drivers/net/ethernet/xilinx/Kconfig" 178source "drivers/net/ethernet/xilinx/Kconfig"
178source "drivers/net/ethernet/xircom/Kconfig" 179source "drivers/net/ethernet/xircom/Kconfig"
179 180
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index 9676a5109d94..878ad32b93f2 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -73,5 +73,6 @@ obj-$(CONFIG_TILE_NET) += tile/
73obj-$(CONFIG_NET_VENDOR_TOSHIBA) += toshiba/ 73obj-$(CONFIG_NET_VENDOR_TOSHIBA) += toshiba/
74obj-$(CONFIG_NET_VENDOR_TUNDRA) += tundra/ 74obj-$(CONFIG_NET_VENDOR_TUNDRA) += tundra/
75obj-$(CONFIG_NET_VENDOR_VIA) += via/ 75obj-$(CONFIG_NET_VENDOR_VIA) += via/
76obj-$(CONFIG_NET_VENDOR_WIZNET) += wiznet/
76obj-$(CONFIG_NET_VENDOR_XILINX) += xilinx/ 77obj-$(CONFIG_NET_VENDOR_XILINX) += xilinx/
77obj-$(CONFIG_NET_VENDOR_XIRCOM) += xircom/ 78obj-$(CONFIG_NET_VENDOR_XIRCOM) += xircom/
diff --git a/drivers/net/ethernet/adaptec/starfire.c b/drivers/net/ethernet/adaptec/starfire.c
index d896816512ca..d920a529ba22 100644
--- a/drivers/net/ethernet/adaptec/starfire.c
+++ b/drivers/net/ethernet/adaptec/starfire.c
@@ -114,15 +114,6 @@ static int rx_copybreak /* = 0 */;
114#define DMA_BURST_SIZE 128 114#define DMA_BURST_SIZE 128
115#endif 115#endif
116 116
117/* Used to pass the media type, etc.
118 Both 'options[]' and 'full_duplex[]' exist for driver interoperability.
119 The media type is usually passed in 'options[]'.
120 These variables are deprecated, use ethtool instead. -Ion
121*/
122#define MAX_UNITS 8 /* More are supported, limit only on options */
123static int options[MAX_UNITS] = {0, };
124static int full_duplex[MAX_UNITS] = {0, };
125
126/* Operational parameters that are set at compile time. */ 117/* Operational parameters that are set at compile time. */
127 118
128/* The "native" ring sizes are either 256 or 2048. 119/* The "native" ring sizes are either 256 or 2048.
@@ -192,8 +183,6 @@ module_param(debug, int, 0);
192module_param(rx_copybreak, int, 0); 183module_param(rx_copybreak, int, 0);
193module_param(intr_latency, int, 0); 184module_param(intr_latency, int, 0);
194module_param(small_frames, int, 0); 185module_param(small_frames, int, 0);
195module_param_array(options, int, NULL, 0);
196module_param_array(full_duplex, int, NULL, 0);
197module_param(enable_hw_cksum, int, 0); 186module_param(enable_hw_cksum, int, 0);
198MODULE_PARM_DESC(max_interrupt_work, "Maximum events handled per interrupt"); 187MODULE_PARM_DESC(max_interrupt_work, "Maximum events handled per interrupt");
199MODULE_PARM_DESC(mtu, "MTU (all boards)"); 188MODULE_PARM_DESC(mtu, "MTU (all boards)");
@@ -201,8 +190,6 @@ MODULE_PARM_DESC(debug, "Debug level (0-6)");
201MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames"); 190MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
202MODULE_PARM_DESC(intr_latency, "Maximum interrupt latency, in microseconds"); 191MODULE_PARM_DESC(intr_latency, "Maximum interrupt latency, in microseconds");
203MODULE_PARM_DESC(small_frames, "Maximum size of receive frames that bypass interrupt latency (0,64,128,256,512)"); 192MODULE_PARM_DESC(small_frames, "Maximum size of receive frames that bypass interrupt latency (0,64,128,256,512)");
204MODULE_PARM_DESC(options, "Deprecated: Bits 0-3: media type, bit 17: full duplex");
205MODULE_PARM_DESC(full_duplex, "Deprecated: Forced full-duplex setting (0/1)");
206MODULE_PARM_DESC(enable_hw_cksum, "Enable/disable hardware cksum support (0/1)"); 193MODULE_PARM_DESC(enable_hw_cksum, "Enable/disable hardware cksum support (0/1)");
207 194
208/* 195/*
@@ -657,10 +644,10 @@ static const struct net_device_ops netdev_ops = {
657static int __devinit starfire_init_one(struct pci_dev *pdev, 644static int __devinit starfire_init_one(struct pci_dev *pdev,
658 const struct pci_device_id *ent) 645 const struct pci_device_id *ent)
659{ 646{
647 struct device *d = &pdev->dev;
660 struct netdev_private *np; 648 struct netdev_private *np;
661 int i, irq, option, chip_idx = ent->driver_data; 649 int i, irq, chip_idx = ent->driver_data;
662 struct net_device *dev; 650 struct net_device *dev;
663 static int card_idx = -1;
664 long ioaddr; 651 long ioaddr;
665 void __iomem *base; 652 void __iomem *base;
666 int drv_flags, io_size; 653 int drv_flags, io_size;
@@ -673,15 +660,13 @@ static int __devinit starfire_init_one(struct pci_dev *pdev,
673 printk(version); 660 printk(version);
674#endif 661#endif
675 662
676 card_idx++;
677
678 if (pci_enable_device (pdev)) 663 if (pci_enable_device (pdev))
679 return -EIO; 664 return -EIO;
680 665
681 ioaddr = pci_resource_start(pdev, 0); 666 ioaddr = pci_resource_start(pdev, 0);
682 io_size = pci_resource_len(pdev, 0); 667 io_size = pci_resource_len(pdev, 0);
683 if (!ioaddr || ((pci_resource_flags(pdev, 0) & IORESOURCE_MEM) == 0)) { 668 if (!ioaddr || ((pci_resource_flags(pdev, 0) & IORESOURCE_MEM) == 0)) {
684 printk(KERN_ERR DRV_NAME " %d: no PCI MEM resources, aborting\n", card_idx); 669 dev_err(d, "no PCI MEM resources, aborting\n");
685 return -ENODEV; 670 return -ENODEV;
686 } 671 }
687 672
@@ -694,14 +679,14 @@ static int __devinit starfire_init_one(struct pci_dev *pdev,
694 irq = pdev->irq; 679 irq = pdev->irq;
695 680
696 if (pci_request_regions (pdev, DRV_NAME)) { 681 if (pci_request_regions (pdev, DRV_NAME)) {
697 printk(KERN_ERR DRV_NAME " %d: cannot reserve PCI resources, aborting\n", card_idx); 682 dev_err(d, "cannot reserve PCI resources, aborting\n");
698 goto err_out_free_netdev; 683 goto err_out_free_netdev;
699 } 684 }
700 685
701 base = ioremap(ioaddr, io_size); 686 base = ioremap(ioaddr, io_size);
702 if (!base) { 687 if (!base) {
703 printk(KERN_ERR DRV_NAME " %d: cannot remap %#x @ %#lx, aborting\n", 688 dev_err(d, "cannot remap %#x @ %#lx, aborting\n",
704 card_idx, io_size, ioaddr); 689 io_size, ioaddr);
705 goto err_out_free_res; 690 goto err_out_free_res;
706 } 691 }
707 692
@@ -753,9 +738,6 @@ static int __devinit starfire_init_one(struct pci_dev *pdev,
753 /* wait a little longer */ 738 /* wait a little longer */
754 udelay(1000); 739 udelay(1000);
755 740
756 dev->base_addr = (unsigned long)base;
757 dev->irq = irq;
758
759 np = netdev_priv(dev); 741 np = netdev_priv(dev);
760 np->dev = dev; 742 np->dev = dev;
761 np->base = base; 743 np->base = base;
@@ -772,21 +754,6 @@ static int __devinit starfire_init_one(struct pci_dev *pdev,
772 754
773 drv_flags = netdrv_tbl[chip_idx].drv_flags; 755 drv_flags = netdrv_tbl[chip_idx].drv_flags;
774 756
775 option = card_idx < MAX_UNITS ? options[card_idx] : 0;
776 if (dev->mem_start)
777 option = dev->mem_start;
778
779 /* The lower four bits are the media type. */
780 if (option & 0x200)
781 np->mii_if.full_duplex = 1;
782
783 if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0)
784 np->mii_if.full_duplex = 1;
785
786 if (np->mii_if.full_duplex)
787 np->mii_if.force_media = 1;
788 else
789 np->mii_if.force_media = 0;
790 np->speed100 = 1; 757 np->speed100 = 1;
791 758
792 /* timer resolution is 128 * 0.8us */ 759 /* timer resolution is 128 * 0.8us */
@@ -909,13 +876,14 @@ static int netdev_open(struct net_device *dev)
909 const __be32 *fw_rx_data, *fw_tx_data; 876 const __be32 *fw_rx_data, *fw_tx_data;
910 struct netdev_private *np = netdev_priv(dev); 877 struct netdev_private *np = netdev_priv(dev);
911 void __iomem *ioaddr = np->base; 878 void __iomem *ioaddr = np->base;
879 const int irq = np->pci_dev->irq;
912 int i, retval; 880 int i, retval;
913 size_t tx_size, rx_size; 881 size_t tx_size, rx_size;
914 size_t tx_done_q_size, rx_done_q_size, tx_ring_size, rx_ring_size; 882 size_t tx_done_q_size, rx_done_q_size, tx_ring_size, rx_ring_size;
915 883
916 /* Do we ever need to reset the chip??? */ 884 /* Do we ever need to reset the chip??? */
917 885
918 retval = request_irq(dev->irq, intr_handler, IRQF_SHARED, dev->name, dev); 886 retval = request_irq(irq, intr_handler, IRQF_SHARED, dev->name, dev);
919 if (retval) 887 if (retval)
920 return retval; 888 return retval;
921 889
@@ -924,7 +892,7 @@ static int netdev_open(struct net_device *dev)
924 writel(1, ioaddr + PCIDeviceConfig); 892 writel(1, ioaddr + PCIDeviceConfig);
925 if (debug > 1) 893 if (debug > 1)
926 printk(KERN_DEBUG "%s: netdev_open() irq %d.\n", 894 printk(KERN_DEBUG "%s: netdev_open() irq %d.\n",
927 dev->name, dev->irq); 895 dev->name, irq);
928 896
929 /* Allocate the various queues. */ 897 /* Allocate the various queues. */
930 if (!np->queue_mem) { 898 if (!np->queue_mem) {
@@ -935,7 +903,7 @@ static int netdev_open(struct net_device *dev)
935 np->queue_mem_size = tx_done_q_size + rx_done_q_size + tx_ring_size + rx_ring_size; 903 np->queue_mem_size = tx_done_q_size + rx_done_q_size + tx_ring_size + rx_ring_size;
936 np->queue_mem = pci_alloc_consistent(np->pci_dev, np->queue_mem_size, &np->queue_mem_dma); 904 np->queue_mem = pci_alloc_consistent(np->pci_dev, np->queue_mem_size, &np->queue_mem_dma);
937 if (np->queue_mem == NULL) { 905 if (np->queue_mem == NULL) {
938 free_irq(dev->irq, dev); 906 free_irq(irq, dev);
939 return -ENOMEM; 907 return -ENOMEM;
940 } 908 }
941 909
@@ -1962,7 +1930,7 @@ static int netdev_close(struct net_device *dev)
1962 } 1930 }
1963 } 1931 }
1964 1932
1965 free_irq(dev->irq, dev); 1933 free_irq(np->pci_dev->irq, dev);
1966 1934
1967 /* Free all the skbuffs in the Rx queue. */ 1935 /* Free all the skbuffs in the Rx queue. */
1968 for (i = 0; i < RX_RING_SIZE; i++) { 1936 for (i = 0; i < RX_RING_SIZE; i++) {
diff --git a/drivers/net/ethernet/adi/bfin_mac.c b/drivers/net/ethernet/adi/bfin_mac.c
index ab4daeccdf98..f816426e1085 100644
--- a/drivers/net/ethernet/adi/bfin_mac.c
+++ b/drivers/net/ethernet/adi/bfin_mac.c
@@ -548,6 +548,25 @@ static int bfin_mac_ethtool_setwol(struct net_device *dev,
548 return 0; 548 return 0;
549} 549}
550 550
551static int bfin_mac_ethtool_get_ts_info(struct net_device *dev,
552 struct ethtool_ts_info *info)
553{
554 info->so_timestamping =
555 SOF_TIMESTAMPING_TX_HARDWARE |
556 SOF_TIMESTAMPING_RX_HARDWARE |
557 SOF_TIMESTAMPING_SYS_HARDWARE;
558 info->phc_index = -1;
559 info->tx_types =
560 (1 << HWTSTAMP_TX_OFF) |
561 (1 << HWTSTAMP_TX_ON);
562 info->rx_filters =
563 (1 << HWTSTAMP_FILTER_NONE) |
564 (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
565 (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
566 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT);
567 return 0;
568}
569
551static const struct ethtool_ops bfin_mac_ethtool_ops = { 570static const struct ethtool_ops bfin_mac_ethtool_ops = {
552 .get_settings = bfin_mac_ethtool_getsettings, 571 .get_settings = bfin_mac_ethtool_getsettings,
553 .set_settings = bfin_mac_ethtool_setsettings, 572 .set_settings = bfin_mac_ethtool_setsettings,
@@ -555,6 +574,7 @@ static const struct ethtool_ops bfin_mac_ethtool_ops = {
555 .get_drvinfo = bfin_mac_ethtool_getdrvinfo, 574 .get_drvinfo = bfin_mac_ethtool_getdrvinfo,
556 .get_wol = bfin_mac_ethtool_getwol, 575 .get_wol = bfin_mac_ethtool_getwol,
557 .set_wol = bfin_mac_ethtool_setwol, 576 .set_wol = bfin_mac_ethtool_setwol,
577 .get_ts_info = bfin_mac_ethtool_get_ts_info,
558}; 578};
559 579
560/**************************************************************************/ 580/**************************************************************************/
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index 1ef0c9275dee..ef5b85b9569e 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -2307,8 +2307,7 @@ static int atl1c_request_irq(struct atl1c_adapter *adapter)
2307 "Unable to allocate MSI interrupt Error: %d\n", 2307 "Unable to allocate MSI interrupt Error: %d\n",
2308 err); 2308 err);
2309 adapter->have_msi = false; 2309 adapter->have_msi = false;
2310 } else 2310 }
2311 netdev->irq = pdev->irq;
2312 2311
2313 if (!adapter->have_msi) 2312 if (!adapter->have_msi)
2314 flags |= IRQF_SHARED; 2313 flags |= IRQF_SHARED;
@@ -2616,7 +2615,6 @@ static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2616 SET_NETDEV_DEV(netdev, &pdev->dev); 2615 SET_NETDEV_DEV(netdev, &pdev->dev);
2617 pci_set_drvdata(pdev, netdev); 2616 pci_set_drvdata(pdev, netdev);
2618 2617
2619 netdev->irq = pdev->irq;
2620 netdev->netdev_ops = &atl1c_netdev_ops; 2618 netdev->netdev_ops = &atl1c_netdev_ops;
2621 netdev->watchdog_timeo = AT_TX_WATCHDOG; 2619 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2622 atl1c_set_ethtool_ops(netdev); 2620 atl1c_set_ethtool_ops(netdev);
@@ -2706,7 +2704,6 @@ static int __devinit atl1c_probe(struct pci_dev *pdev,
2706 dev_err(&pdev->dev, "cannot map device registers\n"); 2704 dev_err(&pdev->dev, "cannot map device registers\n");
2707 goto err_ioremap; 2705 goto err_ioremap;
2708 } 2706 }
2709 netdev->base_addr = (unsigned long)adapter->hw.hw_addr;
2710 2707
2711 /* init mii data */ 2708 /* init mii data */
2712 adapter->mii.dev = netdev; 2709 adapter->mii.dev = netdev;
diff --git a/drivers/net/ethernet/atheros/atl1e/atl1e_main.c b/drivers/net/ethernet/atheros/atl1e/atl1e_main.c
index 93ff2b231284..1220e511ced6 100644
--- a/drivers/net/ethernet/atheros/atl1e/atl1e_main.c
+++ b/drivers/net/ethernet/atheros/atl1e/atl1e_main.c
@@ -1883,27 +1883,24 @@ static int atl1e_request_irq(struct atl1e_adapter *adapter)
1883 int err = 0; 1883 int err = 0;
1884 1884
1885 adapter->have_msi = true; 1885 adapter->have_msi = true;
1886 err = pci_enable_msi(adapter->pdev); 1886 err = pci_enable_msi(pdev);
1887 if (err) { 1887 if (err) {
1888 netdev_dbg(adapter->netdev, 1888 netdev_dbg(netdev,
1889 "Unable to allocate MSI interrupt Error: %d\n", err); 1889 "Unable to allocate MSI interrupt Error: %d\n", err);
1890 adapter->have_msi = false; 1890 adapter->have_msi = false;
1891 } else 1891 }
1892 netdev->irq = pdev->irq;
1893
1894 1892
1895 if (!adapter->have_msi) 1893 if (!adapter->have_msi)
1896 flags |= IRQF_SHARED; 1894 flags |= IRQF_SHARED;
1897 err = request_irq(adapter->pdev->irq, atl1e_intr, flags, 1895 err = request_irq(pdev->irq, atl1e_intr, flags, netdev->name, netdev);
1898 netdev->name, netdev);
1899 if (err) { 1896 if (err) {
1900 netdev_dbg(adapter->netdev, 1897 netdev_dbg(adapter->netdev,
1901 "Unable to allocate interrupt Error: %d\n", err); 1898 "Unable to allocate interrupt Error: %d\n", err);
1902 if (adapter->have_msi) 1899 if (adapter->have_msi)
1903 pci_disable_msi(adapter->pdev); 1900 pci_disable_msi(pdev);
1904 return err; 1901 return err;
1905 } 1902 }
1906 netdev_dbg(adapter->netdev, "atl1e_request_irq OK\n"); 1903 netdev_dbg(netdev, "atl1e_request_irq OK\n");
1907 return err; 1904 return err;
1908} 1905}
1909 1906
@@ -2233,7 +2230,6 @@ static int atl1e_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2233 SET_NETDEV_DEV(netdev, &pdev->dev); 2230 SET_NETDEV_DEV(netdev, &pdev->dev);
2234 pci_set_drvdata(pdev, netdev); 2231 pci_set_drvdata(pdev, netdev);
2235 2232
2236 netdev->irq = pdev->irq;
2237 netdev->netdev_ops = &atl1e_netdev_ops; 2233 netdev->netdev_ops = &atl1e_netdev_ops;
2238 2234
2239 netdev->watchdog_timeo = AT_TX_WATCHDOG; 2235 netdev->watchdog_timeo = AT_TX_WATCHDOG;
@@ -2319,7 +2315,6 @@ static int __devinit atl1e_probe(struct pci_dev *pdev,
2319 netdev_err(netdev, "cannot map device registers\n"); 2315 netdev_err(netdev, "cannot map device registers\n");
2320 goto err_ioremap; 2316 goto err_ioremap;
2321 } 2317 }
2322 netdev->base_addr = (unsigned long)adapter->hw.hw_addr;
2323 2318
2324 /* init mii data */ 2319 /* init mii data */
2325 adapter->mii.dev = netdev; 2320 adapter->mii.dev = netdev;
diff --git a/drivers/net/ethernet/broadcom/bnx2.c b/drivers/net/ethernet/broadcom/bnx2.c
index 8297e2868736..36037a677820 100644
--- a/drivers/net/ethernet/broadcom/bnx2.c
+++ b/drivers/net/ethernet/broadcom/bnx2.c
@@ -7976,7 +7976,6 @@ static int __devinit
7976bnx2_init_board(struct pci_dev *pdev, struct net_device *dev) 7976bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
7977{ 7977{
7978 struct bnx2 *bp; 7978 struct bnx2 *bp;
7979 unsigned long mem_len;
7980 int rc, i, j; 7979 int rc, i, j;
7981 u32 reg; 7980 u32 reg;
7982 u64 dma_mask, persist_dma_mask; 7981 u64 dma_mask, persist_dma_mask;
@@ -8036,13 +8035,8 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
8036#endif 8035#endif
8037 INIT_WORK(&bp->reset_task, bnx2_reset_task); 8036 INIT_WORK(&bp->reset_task, bnx2_reset_task);
8038 8037
8039 dev->base_addr = dev->mem_start = pci_resource_start(pdev, 0); 8038 bp->regview = pci_iomap(pdev, 0, MB_GET_CID_ADDR(TX_TSS_CID +
8040 mem_len = MB_GET_CID_ADDR(TX_TSS_CID + TX_MAX_TSS_RINGS + 1); 8039 TX_MAX_TSS_RINGS + 1));
8041 dev->mem_end = dev->mem_start + mem_len;
8042 dev->irq = pdev->irq;
8043
8044 bp->regview = ioremap_nocache(dev->base_addr, mem_len);
8045
8046 if (!bp->regview) { 8040 if (!bp->regview) {
8047 dev_err(&pdev->dev, "Cannot map register space, aborting\n"); 8041 dev_err(&pdev->dev, "Cannot map register space, aborting\n");
8048 rc = -ENOMEM; 8042 rc = -ENOMEM;
@@ -8346,10 +8340,8 @@ err_out_unmap:
8346 bp->flags &= ~BNX2_FLAG_AER_ENABLED; 8340 bp->flags &= ~BNX2_FLAG_AER_ENABLED;
8347 } 8341 }
8348 8342
8349 if (bp->regview) { 8343 pci_iounmap(pdev, bp->regview);
8350 iounmap(bp->regview); 8344 bp->regview = NULL;
8351 bp->regview = NULL;
8352 }
8353 8345
8354err_out_release: 8346err_out_release:
8355 pci_release_regions(pdev); 8347 pci_release_regions(pdev);
@@ -8432,7 +8424,7 @@ static int __devinit
8432bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 8424bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
8433{ 8425{
8434 static int version_printed = 0; 8426 static int version_printed = 0;
8435 struct net_device *dev = NULL; 8427 struct net_device *dev;
8436 struct bnx2 *bp; 8428 struct bnx2 *bp;
8437 int rc; 8429 int rc;
8438 char str[40]; 8430 char str[40];
@@ -8442,15 +8434,12 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
8442 8434
8443 /* dev zeroed in init_etherdev */ 8435 /* dev zeroed in init_etherdev */
8444 dev = alloc_etherdev_mq(sizeof(*bp), TX_MAX_RINGS); 8436 dev = alloc_etherdev_mq(sizeof(*bp), TX_MAX_RINGS);
8445
8446 if (!dev) 8437 if (!dev)
8447 return -ENOMEM; 8438 return -ENOMEM;
8448 8439
8449 rc = bnx2_init_board(pdev, dev); 8440 rc = bnx2_init_board(pdev, dev);
8450 if (rc < 0) { 8441 if (rc < 0)
8451 free_netdev(dev); 8442 goto err_free;
8452 return rc;
8453 }
8454 8443
8455 dev->netdev_ops = &bnx2_netdev_ops; 8444 dev->netdev_ops = &bnx2_netdev_ops;
8456 dev->watchdog_timeo = TX_TIMEOUT; 8445 dev->watchdog_timeo = TX_TIMEOUT;
@@ -8480,22 +8469,21 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
8480 goto error; 8469 goto error;
8481 } 8470 }
8482 8471
8483 netdev_info(dev, "%s (%c%d) %s found at mem %lx, IRQ %d, node addr %pM\n", 8472 netdev_info(dev, "%s (%c%d) %s found at mem %lx, IRQ %d, "
8484 board_info[ent->driver_data].name, 8473 "node addr %pM\n", board_info[ent->driver_data].name,
8485 ((CHIP_ID(bp) & 0xf000) >> 12) + 'A', 8474 ((CHIP_ID(bp) & 0xf000) >> 12) + 'A',
8486 ((CHIP_ID(bp) & 0x0ff0) >> 4), 8475 ((CHIP_ID(bp) & 0x0ff0) >> 4),
8487 bnx2_bus_string(bp, str), 8476 bnx2_bus_string(bp, str), (long)pci_resource_start(pdev, 0),
8488 dev->base_addr, 8477 pdev->irq, dev->dev_addr);
8489 bp->pdev->irq, dev->dev_addr);
8490 8478
8491 return 0; 8479 return 0;
8492 8480
8493error: 8481error:
8494 if (bp->regview) 8482 iounmap(bp->regview);
8495 iounmap(bp->regview);
8496 pci_release_regions(pdev); 8483 pci_release_regions(pdev);
8497 pci_disable_device(pdev); 8484 pci_disable_device(pdev);
8498 pci_set_drvdata(pdev, NULL); 8485 pci_set_drvdata(pdev, NULL);
8486err_free:
8499 free_netdev(dev); 8487 free_netdev(dev);
8500 return rc; 8488 return rc;
8501} 8489}
@@ -8511,8 +8499,7 @@ bnx2_remove_one(struct pci_dev *pdev)
8511 del_timer_sync(&bp->timer); 8499 del_timer_sync(&bp->timer);
8512 cancel_work_sync(&bp->reset_task); 8500 cancel_work_sync(&bp->reset_task);
8513 8501
8514 if (bp->regview) 8502 pci_iounmap(bp->pdev, bp->regview);
8515 iounmap(bp->regview);
8516 8503
8517 kfree(bp->temp_stats_blk); 8504 kfree(bp->temp_stats_blk);
8518 8505
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
index 2c9ee552dffc..bfa78883d5c7 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
@@ -23,13 +23,17 @@
23 * (you will need to reboot afterwards) */ 23 * (you will need to reboot afterwards) */
24/* #define BNX2X_STOP_ON_ERROR */ 24/* #define BNX2X_STOP_ON_ERROR */
25 25
26#define DRV_MODULE_VERSION "1.72.10-0" 26#define DRV_MODULE_VERSION "1.72.17-0"
27#define DRV_MODULE_RELDATE "2012/02/20" 27#define DRV_MODULE_RELDATE "2012/04/02"
28#define BNX2X_BC_VER 0x040200 28#define BNX2X_BC_VER 0x040200
29 29
30#if defined(CONFIG_DCB) 30#if defined(CONFIG_DCB)
31#define BCM_DCBNL 31#define BCM_DCBNL
32#endif 32#endif
33
34
35#include "bnx2x_hsi.h"
36
33#if defined(CONFIG_CNIC) || defined(CONFIG_CNIC_MODULE) 37#if defined(CONFIG_CNIC) || defined(CONFIG_CNIC_MODULE)
34#define BCM_CNIC 1 38#define BCM_CNIC 1
35#include "../cnic_if.h" 39#include "../cnic_if.h"
@@ -815,6 +819,8 @@ struct bnx2x_common {
815#define CHIP_NUM_57800_MF 0x16a5 819#define CHIP_NUM_57800_MF 0x16a5
816#define CHIP_NUM_57810 0x168e 820#define CHIP_NUM_57810 0x168e
817#define CHIP_NUM_57810_MF 0x16ae 821#define CHIP_NUM_57810_MF 0x16ae
822#define CHIP_NUM_57811 0x163d
823#define CHIP_NUM_57811_MF 0x163e
818#define CHIP_NUM_57840 0x168d 824#define CHIP_NUM_57840 0x168d
819#define CHIP_NUM_57840_MF 0x16ab 825#define CHIP_NUM_57840_MF 0x16ab
820#define CHIP_IS_E1(bp) (CHIP_NUM(bp) == CHIP_NUM_57710) 826#define CHIP_IS_E1(bp) (CHIP_NUM(bp) == CHIP_NUM_57710)
@@ -826,6 +832,8 @@ struct bnx2x_common {
826#define CHIP_IS_57800_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57800_MF) 832#define CHIP_IS_57800_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57800_MF)
827#define CHIP_IS_57810(bp) (CHIP_NUM(bp) == CHIP_NUM_57810) 833#define CHIP_IS_57810(bp) (CHIP_NUM(bp) == CHIP_NUM_57810)
828#define CHIP_IS_57810_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57810_MF) 834#define CHIP_IS_57810_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57810_MF)
835#define CHIP_IS_57811(bp) (CHIP_NUM(bp) == CHIP_NUM_57811)
836#define CHIP_IS_57811_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57811_MF)
829#define CHIP_IS_57840(bp) (CHIP_NUM(bp) == CHIP_NUM_57840) 837#define CHIP_IS_57840(bp) (CHIP_NUM(bp) == CHIP_NUM_57840)
830#define CHIP_IS_57840_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57840_MF) 838#define CHIP_IS_57840_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57840_MF)
831#define CHIP_IS_E1H(bp) (CHIP_IS_57711(bp) || \ 839#define CHIP_IS_E1H(bp) (CHIP_IS_57711(bp) || \
@@ -836,6 +844,8 @@ struct bnx2x_common {
836 CHIP_IS_57800_MF(bp) || \ 844 CHIP_IS_57800_MF(bp) || \
837 CHIP_IS_57810(bp) || \ 845 CHIP_IS_57810(bp) || \
838 CHIP_IS_57810_MF(bp) || \ 846 CHIP_IS_57810_MF(bp) || \
847 CHIP_IS_57811(bp) || \
848 CHIP_IS_57811_MF(bp) || \
839 CHIP_IS_57840(bp) || \ 849 CHIP_IS_57840(bp) || \
840 CHIP_IS_57840_MF(bp)) 850 CHIP_IS_57840_MF(bp))
841#define CHIP_IS_E1x(bp) (CHIP_IS_E1((bp)) || CHIP_IS_E1H((bp))) 851#define CHIP_IS_E1x(bp) (CHIP_IS_E1((bp)) || CHIP_IS_E1H((bp)))
@@ -1300,6 +1310,7 @@ struct bnx2x {
1300#define NO_ISCSI_FLAG (1 << 14) 1310#define NO_ISCSI_FLAG (1 << 14)
1301#define NO_FCOE_FLAG (1 << 15) 1311#define NO_FCOE_FLAG (1 << 15)
1302#define BC_SUPPORTS_PFC_STATS (1 << 17) 1312#define BC_SUPPORTS_PFC_STATS (1 << 17)
1313#define USING_SINGLE_MSIX_FLAG (1 << 20)
1303 1314
1304#define NO_ISCSI(bp) ((bp)->flags & NO_ISCSI_FLAG) 1315#define NO_ISCSI(bp) ((bp)->flags & NO_ISCSI_FLAG)
1305#define NO_ISCSI_OOO(bp) ((bp)->flags & NO_ISCSI_OOO_FLAG) 1316#define NO_ISCSI_OOO(bp) ((bp)->flags & NO_ISCSI_OOO_FLAG)
@@ -1329,8 +1340,8 @@ struct bnx2x {
1329 struct bnx2x_common common; 1340 struct bnx2x_common common;
1330 struct bnx2x_port port; 1341 struct bnx2x_port port;
1331 1342
1332 struct cmng_struct_per_port cmng; 1343 struct cmng_init cmng;
1333 u32 vn_weight_sum; 1344
1334 u32 mf_config[E1HVN_MAX]; 1345 u32 mf_config[E1HVN_MAX];
1335 u32 mf2_config[E2_FUNC_MAX]; 1346 u32 mf2_config[E2_FUNC_MAX];
1336 u32 path_has_ovlan; /* E3 */ 1347 u32 path_has_ovlan; /* E3 */
@@ -1371,7 +1382,6 @@ struct bnx2x {
1371#define BNX2X_STATE_DIAG 0xe000 1382#define BNX2X_STATE_DIAG 0xe000
1372#define BNX2X_STATE_ERROR 0xf000 1383#define BNX2X_STATE_ERROR 0xf000
1373 1384
1374 int multi_mode;
1375#define BNX2X_MAX_PRIORITY 8 1385#define BNX2X_MAX_PRIORITY 8
1376#define BNX2X_MAX_ENTRIES_PER_PRI 16 1386#define BNX2X_MAX_ENTRIES_PER_PRI 16
1377#define BNX2X_MAX_COS 3 1387#define BNX2X_MAX_COS 3
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
index 4b054812713a..5a58cff78dc2 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
@@ -23,7 +23,6 @@
23#include <linux/ip.h> 23#include <linux/ip.h>
24#include <net/ipv6.h> 24#include <net/ipv6.h>
25#include <net/ip6_checksum.h> 25#include <net/ip6_checksum.h>
26#include <linux/firmware.h>
27#include <linux/prefetch.h> 26#include <linux/prefetch.h>
28#include "bnx2x_cmn.h" 27#include "bnx2x_cmn.h"
29#include "bnx2x_init.h" 28#include "bnx2x_init.h"
@@ -1212,16 +1211,15 @@ static void bnx2x_free_msix_irqs(struct bnx2x *bp, int nvecs)
1212 1211
1213void bnx2x_free_irq(struct bnx2x *bp) 1212void bnx2x_free_irq(struct bnx2x *bp)
1214{ 1213{
1215 if (bp->flags & USING_MSIX_FLAG) 1214 if (bp->flags & USING_MSIX_FLAG &&
1215 !(bp->flags & USING_SINGLE_MSIX_FLAG))
1216 bnx2x_free_msix_irqs(bp, BNX2X_NUM_ETH_QUEUES(bp) + 1216 bnx2x_free_msix_irqs(bp, BNX2X_NUM_ETH_QUEUES(bp) +
1217 CNIC_PRESENT + 1); 1217 CNIC_PRESENT + 1);
1218 else if (bp->flags & USING_MSI_FLAG)
1219 free_irq(bp->pdev->irq, bp->dev);
1220 else 1218 else
1221 free_irq(bp->pdev->irq, bp->dev); 1219 free_irq(bp->dev->irq, bp->dev);
1222} 1220}
1223 1221
1224int bnx2x_enable_msix(struct bnx2x *bp) 1222int __devinit bnx2x_enable_msix(struct bnx2x *bp)
1225{ 1223{
1226 int msix_vec = 0, i, rc, req_cnt; 1224 int msix_vec = 0, i, rc, req_cnt;
1227 1225
@@ -1261,8 +1259,8 @@ int bnx2x_enable_msix(struct bnx2x *bp)
1261 rc = pci_enable_msix(bp->pdev, &bp->msix_table[0], rc); 1259 rc = pci_enable_msix(bp->pdev, &bp->msix_table[0], rc);
1262 1260
1263 if (rc) { 1261 if (rc) {
1264 BNX2X_DEV_INFO("MSI-X is not attainable rc %d\n", rc); 1262 BNX2X_DEV_INFO("MSI-X is not attainable rc %d\n", rc);
1265 return rc; 1263 goto no_msix;
1266 } 1264 }
1267 /* 1265 /*
1268 * decrease number of queues by number of unallocated entries 1266 * decrease number of queues by number of unallocated entries
@@ -1270,18 +1268,34 @@ int bnx2x_enable_msix(struct bnx2x *bp)
1270 bp->num_queues -= diff; 1268 bp->num_queues -= diff;
1271 1269
1272 BNX2X_DEV_INFO("New queue configuration set: %d\n", 1270 BNX2X_DEV_INFO("New queue configuration set: %d\n",
1273 bp->num_queues); 1271 bp->num_queues);
1274 } else if (rc) { 1272 } else if (rc > 0) {
1275 /* fall to INTx if not enough memory */ 1273 /* Get by with single vector */
1276 if (rc == -ENOMEM) 1274 rc = pci_enable_msix(bp->pdev, &bp->msix_table[0], 1);
1277 bp->flags |= DISABLE_MSI_FLAG; 1275 if (rc) {
1276 BNX2X_DEV_INFO("Single MSI-X is not attainable rc %d\n",
1277 rc);
1278 goto no_msix;
1279 }
1280
1281 BNX2X_DEV_INFO("Using single MSI-X vector\n");
1282 bp->flags |= USING_SINGLE_MSIX_FLAG;
1283
1284 } else if (rc < 0) {
1278 BNX2X_DEV_INFO("MSI-X is not attainable rc %d\n", rc); 1285 BNX2X_DEV_INFO("MSI-X is not attainable rc %d\n", rc);
1279 return rc; 1286 goto no_msix;
1280 } 1287 }
1281 1288
1282 bp->flags |= USING_MSIX_FLAG; 1289 bp->flags |= USING_MSIX_FLAG;
1283 1290
1284 return 0; 1291 return 0;
1292
1293no_msix:
1294 /* fall to INTx if not enough memory */
1295 if (rc == -ENOMEM)
1296 bp->flags |= DISABLE_MSI_FLAG;
1297
1298 return rc;
1285} 1299}
1286 1300
1287static int bnx2x_req_msix_irqs(struct bnx2x *bp) 1301static int bnx2x_req_msix_irqs(struct bnx2x *bp)
@@ -1343,22 +1357,26 @@ int bnx2x_enable_msi(struct bnx2x *bp)
1343static int bnx2x_req_irq(struct bnx2x *bp) 1357static int bnx2x_req_irq(struct bnx2x *bp)
1344{ 1358{
1345 unsigned long flags; 1359 unsigned long flags;
1346 int rc; 1360 unsigned int irq;
1347 1361
1348 if (bp->flags & USING_MSI_FLAG) 1362 if (bp->flags & (USING_MSI_FLAG | USING_MSIX_FLAG))
1349 flags = 0; 1363 flags = 0;
1350 else 1364 else
1351 flags = IRQF_SHARED; 1365 flags = IRQF_SHARED;
1352 1366
1353 rc = request_irq(bp->pdev->irq, bnx2x_interrupt, flags, 1367 if (bp->flags & USING_MSIX_FLAG)
1354 bp->dev->name, bp->dev); 1368 irq = bp->msix_table[0].vector;
1355 return rc; 1369 else
1370 irq = bp->pdev->irq;
1371
1372 return request_irq(irq, bnx2x_interrupt, flags, bp->dev->name, bp->dev);
1356} 1373}
1357 1374
1358static inline int bnx2x_setup_irqs(struct bnx2x *bp) 1375static inline int bnx2x_setup_irqs(struct bnx2x *bp)
1359{ 1376{
1360 int rc = 0; 1377 int rc = 0;
1361 if (bp->flags & USING_MSIX_FLAG) { 1378 if (bp->flags & USING_MSIX_FLAG &&
1379 !(bp->flags & USING_SINGLE_MSIX_FLAG)) {
1362 rc = bnx2x_req_msix_irqs(bp); 1380 rc = bnx2x_req_msix_irqs(bp);
1363 if (rc) 1381 if (rc)
1364 return rc; 1382 return rc;
@@ -1371,8 +1389,13 @@ static inline int bnx2x_setup_irqs(struct bnx2x *bp)
1371 } 1389 }
1372 if (bp->flags & USING_MSI_FLAG) { 1390 if (bp->flags & USING_MSI_FLAG) {
1373 bp->dev->irq = bp->pdev->irq; 1391 bp->dev->irq = bp->pdev->irq;
1374 netdev_info(bp->dev, "using MSI IRQ %d\n", 1392 netdev_info(bp->dev, "using MSI IRQ %d\n",
1375 bp->pdev->irq); 1393 bp->dev->irq);
1394 }
1395 if (bp->flags & USING_MSIX_FLAG) {
1396 bp->dev->irq = bp->msix_table[0].vector;
1397 netdev_info(bp->dev, "using MSIX IRQ %d\n",
1398 bp->dev->irq);
1376 } 1399 }
1377 } 1400 }
1378 1401
@@ -1437,20 +1460,11 @@ u16 bnx2x_select_queue(struct net_device *dev, struct sk_buff *skb)
1437 return __skb_tx_hash(dev, skb, BNX2X_NUM_ETH_QUEUES(bp)); 1460 return __skb_tx_hash(dev, skb, BNX2X_NUM_ETH_QUEUES(bp));
1438} 1461}
1439 1462
1463
1440void bnx2x_set_num_queues(struct bnx2x *bp) 1464void bnx2x_set_num_queues(struct bnx2x *bp)
1441{ 1465{
1442 switch (bp->multi_mode) { 1466 /* RSS queues */
1443 case ETH_RSS_MODE_DISABLED: 1467 bp->num_queues = bnx2x_calc_num_queues(bp);
1444 bp->num_queues = 1;
1445 break;
1446 case ETH_RSS_MODE_REGULAR:
1447 bp->num_queues = bnx2x_calc_num_queues(bp);
1448 break;
1449
1450 default:
1451 bp->num_queues = 1;
1452 break;
1453 }
1454 1468
1455#ifdef BCM_CNIC 1469#ifdef BCM_CNIC
1456 /* override in STORAGE SD mode */ 1470 /* override in STORAGE SD mode */
@@ -1549,16 +1563,13 @@ static inline int bnx2x_init_rss_pf(struct bnx2x *bp)
1549 u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE] = {0}; 1563 u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE] = {0};
1550 u8 num_eth_queues = BNX2X_NUM_ETH_QUEUES(bp); 1564 u8 num_eth_queues = BNX2X_NUM_ETH_QUEUES(bp);
1551 1565
1552 /* 1566 /* Prepare the initial contents fo the indirection table if RSS is
1553 * Prepare the inital contents fo the indirection table if RSS is
1554 * enabled 1567 * enabled
1555 */ 1568 */
1556 if (bp->multi_mode != ETH_RSS_MODE_DISABLED) { 1569 for (i = 0; i < sizeof(ind_table); i++)
1557 for (i = 0; i < sizeof(ind_table); i++) 1570 ind_table[i] =
1558 ind_table[i] = 1571 bp->fp->cl_id +
1559 bp->fp->cl_id + 1572 ethtool_rxfh_indir_default(i, num_eth_queues);
1560 ethtool_rxfh_indir_default(i, num_eth_queues);
1561 }
1562 1573
1563 /* 1574 /*
1564 * For 57710 and 57711 SEARCHER configuration (rss_keys) is 1575 * For 57710 and 57711 SEARCHER configuration (rss_keys) is
@@ -1568,11 +1579,12 @@ static inline int bnx2x_init_rss_pf(struct bnx2x *bp)
1568 * For 57712 and newer on the other hand it's a per-function 1579 * For 57712 and newer on the other hand it's a per-function
1569 * configuration. 1580 * configuration.
1570 */ 1581 */
1571 return bnx2x_config_rss_pf(bp, ind_table, 1582 return bnx2x_config_rss_eth(bp, ind_table,
1572 bp->port.pmf || !CHIP_IS_E1x(bp)); 1583 bp->port.pmf || !CHIP_IS_E1x(bp));
1573} 1584}
1574 1585
1575int bnx2x_config_rss_pf(struct bnx2x *bp, u8 *ind_table, bool config_hash) 1586int bnx2x_config_rss_pf(struct bnx2x *bp, struct bnx2x_rss_config_obj *rss_obj,
1587 u8 *ind_table, bool config_hash)
1576{ 1588{
1577 struct bnx2x_config_rss_params params = {NULL}; 1589 struct bnx2x_config_rss_params params = {NULL};
1578 int i; 1590 int i;
@@ -1584,52 +1596,29 @@ int bnx2x_config_rss_pf(struct bnx2x *bp, u8 *ind_table, bool config_hash)
1584 * bp->multi_mode = ETH_RSS_MODE_DISABLED; 1596 * bp->multi_mode = ETH_RSS_MODE_DISABLED;
1585 */ 1597 */
1586 1598
1587 params.rss_obj = &bp->rss_conf_obj; 1599 params.rss_obj = rss_obj;
1588 1600
1589 __set_bit(RAMROD_COMP_WAIT, &params.ramrod_flags); 1601 __set_bit(RAMROD_COMP_WAIT, &params.ramrod_flags);
1590 1602
1591 /* RSS mode */ 1603 __set_bit(BNX2X_RSS_MODE_REGULAR, &params.rss_flags);
1592 switch (bp->multi_mode) {
1593 case ETH_RSS_MODE_DISABLED:
1594 __set_bit(BNX2X_RSS_MODE_DISABLED, &params.rss_flags);
1595 break;
1596 case ETH_RSS_MODE_REGULAR:
1597 __set_bit(BNX2X_RSS_MODE_REGULAR, &params.rss_flags);
1598 break;
1599 case ETH_RSS_MODE_VLAN_PRI:
1600 __set_bit(BNX2X_RSS_MODE_VLAN_PRI, &params.rss_flags);
1601 break;
1602 case ETH_RSS_MODE_E1HOV_PRI:
1603 __set_bit(BNX2X_RSS_MODE_E1HOV_PRI, &params.rss_flags);
1604 break;
1605 case ETH_RSS_MODE_IP_DSCP:
1606 __set_bit(BNX2X_RSS_MODE_IP_DSCP, &params.rss_flags);
1607 break;
1608 default:
1609 BNX2X_ERR("Unknown multi_mode: %d\n", bp->multi_mode);
1610 return -EINVAL;
1611 }
1612 1604
1613 /* If RSS is enabled */ 1605 /* RSS configuration */
1614 if (bp->multi_mode != ETH_RSS_MODE_DISABLED) { 1606 __set_bit(BNX2X_RSS_IPV4, &params.rss_flags);
1615 /* RSS configuration */ 1607 __set_bit(BNX2X_RSS_IPV4_TCP, &params.rss_flags);
1616 __set_bit(BNX2X_RSS_IPV4, &params.rss_flags); 1608 __set_bit(BNX2X_RSS_IPV6, &params.rss_flags);
1617 __set_bit(BNX2X_RSS_IPV4_TCP, &params.rss_flags); 1609 __set_bit(BNX2X_RSS_IPV6_TCP, &params.rss_flags);
1618 __set_bit(BNX2X_RSS_IPV6, &params.rss_flags);
1619 __set_bit(BNX2X_RSS_IPV6_TCP, &params.rss_flags);
1620 1610
1621 /* Hash bits */ 1611 /* Hash bits */
1622 params.rss_result_mask = MULTI_MASK; 1612 params.rss_result_mask = MULTI_MASK;
1623 1613
1624 memcpy(params.ind_table, ind_table, sizeof(params.ind_table)); 1614 memcpy(params.ind_table, ind_table, sizeof(params.ind_table));
1625 1615
1626 if (config_hash) { 1616 if (config_hash) {
1627 /* RSS keys */ 1617 /* RSS keys */
1628 for (i = 0; i < sizeof(params.rss_key) / 4; i++) 1618 for (i = 0; i < sizeof(params.rss_key) / 4; i++)
1629 params.rss_key[i] = random32(); 1619 params.rss_key[i] = random32();
1630 1620
1631 __set_bit(BNX2X_RSS_SET_SRCH, &params.rss_flags); 1621 __set_bit(BNX2X_RSS_SET_SRCH, &params.rss_flags);
1632 }
1633 } 1622 }
1634 1623
1635 return bnx2x_config_rss(bp, &params); 1624 return bnx2x_config_rss(bp, &params);
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h
index 5c27454d2ec2..2c3a243c84b3 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h
@@ -86,13 +86,15 @@ u32 bnx2x_send_unload_req(struct bnx2x *bp, int unload_mode);
86void bnx2x_send_unload_done(struct bnx2x *bp); 86void bnx2x_send_unload_done(struct bnx2x *bp);
87 87
88/** 88/**
89 * bnx2x_config_rss_pf - configure RSS parameters. 89 * bnx2x_config_rss_pf - configure RSS parameters in a PF.
90 * 90 *
91 * @bp: driver handle 91 * @bp: driver handle
92 * @rss_obj RSS object to use
92 * @ind_table: indirection table to configure 93 * @ind_table: indirection table to configure
93 * @config_hash: re-configure RSS hash keys configuration 94 * @config_hash: re-configure RSS hash keys configuration
94 */ 95 */
95int bnx2x_config_rss_pf(struct bnx2x *bp, u8 *ind_table, bool config_hash); 96int bnx2x_config_rss_pf(struct bnx2x *bp, struct bnx2x_rss_config_obj *rss_obj,
97 u8 *ind_table, bool config_hash);
96 98
97/** 99/**
98 * bnx2x__init_func_obj - init function object 100 * bnx2x__init_func_obj - init function object
@@ -485,7 +487,7 @@ void bnx2x_netif_start(struct bnx2x *bp);
485 * fills msix_table, requests vectors, updates num_queues 487 * fills msix_table, requests vectors, updates num_queues
486 * according to number of available vectors. 488 * according to number of available vectors.
487 */ 489 */
488int bnx2x_enable_msix(struct bnx2x *bp); 490int __devinit bnx2x_enable_msix(struct bnx2x *bp);
489 491
490/** 492/**
491 * bnx2x_enable_msi - request msi mode from OS, updated internals accordingly 493 * bnx2x_enable_msi - request msi mode from OS, updated internals accordingly
@@ -843,7 +845,7 @@ static inline void bnx2x_disable_msi(struct bnx2x *bp)
843{ 845{
844 if (bp->flags & USING_MSIX_FLAG) { 846 if (bp->flags & USING_MSIX_FLAG) {
845 pci_disable_msix(bp->pdev); 847 pci_disable_msix(bp->pdev);
846 bp->flags &= ~USING_MSIX_FLAG; 848 bp->flags &= ~(USING_MSIX_FLAG | USING_SINGLE_MSIX_FLAG);
847 } else if (bp->flags & USING_MSI_FLAG) { 849 } else if (bp->flags & USING_MSI_FLAG) {
848 pci_disable_msi(bp->pdev); 850 pci_disable_msi(bp->pdev);
849 bp->flags &= ~USING_MSI_FLAG; 851 bp->flags &= ~USING_MSI_FLAG;
@@ -964,6 +966,19 @@ static inline void bnx2x_reuse_rx_data(struct bnx2x_fastpath *fp,
964 966
965/************************* Init ******************************************/ 967/************************* Init ******************************************/
966 968
969/* returns func by VN for current port */
970static inline int func_by_vn(struct bnx2x *bp, int vn)
971{
972 return 2 * vn + BP_PORT(bp);
973}
974
975static inline int bnx2x_config_rss_eth(struct bnx2x *bp, u8 *ind_table,
976 bool config_hash)
977{
978 return bnx2x_config_rss_pf(bp, &bp->rss_conf_obj, ind_table,
979 config_hash);
980}
981
967/** 982/**
968 * bnx2x_func_start - init function 983 * bnx2x_func_start - init function
969 * 984 *
@@ -1419,15 +1434,32 @@ static inline void storm_memset_func_cfg(struct bnx2x *bp,
1419} 1434}
1420 1435
1421static inline void storm_memset_cmng(struct bnx2x *bp, 1436static inline void storm_memset_cmng(struct bnx2x *bp,
1422 struct cmng_struct_per_port *cmng, 1437 struct cmng_init *cmng,
1423 u8 port) 1438 u8 port)
1424{ 1439{
1440 int vn;
1425 size_t size = sizeof(struct cmng_struct_per_port); 1441 size_t size = sizeof(struct cmng_struct_per_port);
1426 1442
1427 u32 addr = BAR_XSTRORM_INTMEM + 1443 u32 addr = BAR_XSTRORM_INTMEM +
1428 XSTORM_CMNG_PER_PORT_VARS_OFFSET(port); 1444 XSTORM_CMNG_PER_PORT_VARS_OFFSET(port);
1429 1445
1430 __storm_memset_struct(bp, addr, size, (u32 *)cmng); 1446 __storm_memset_struct(bp, addr, size, (u32 *)&cmng->port);
1447
1448 for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++) {
1449 int func = func_by_vn(bp, vn);
1450
1451 addr = BAR_XSTRORM_INTMEM +
1452 XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(func);
1453 size = sizeof(struct rate_shaping_vars_per_vn);
1454 __storm_memset_struct(bp, addr, size,
1455 (u32 *)&cmng->vnic.vnic_max_rate[vn]);
1456
1457 addr = BAR_XSTRORM_INTMEM +
1458 XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(func);
1459 size = sizeof(struct fairness_vars_per_vn);
1460 __storm_memset_struct(bp, addr, size,
1461 (u32 *)&cmng->vnic.vnic_min_rate[vn]);
1462 }
1431} 1463}
1432 1464
1433/** 1465/**
@@ -1608,11 +1640,6 @@ static inline void bnx2x_bz_fp(struct bnx2x *bp, int index)
1608 */ 1640 */
1609void bnx2x_get_iscsi_info(struct bnx2x *bp); 1641void bnx2x_get_iscsi_info(struct bnx2x *bp);
1610#endif 1642#endif
1611/* returns func by VN for current port */
1612static inline int func_by_vn(struct bnx2x *bp, int vn)
1613{
1614 return 2 * vn + BP_PORT(bp);
1615}
1616 1643
1617/** 1644/**
1618 * bnx2x_link_sync_notify - send notification to other functions. 1645 * bnx2x_link_sync_notify - send notification to other functions.
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c
index 2cc0a1703970..3c7d0cc77e23 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c
@@ -22,13 +22,10 @@
22#include <linux/types.h> 22#include <linux/types.h>
23#include <linux/sched.h> 23#include <linux/sched.h>
24#include <linux/crc32.h> 24#include <linux/crc32.h>
25
26
27#include "bnx2x.h" 25#include "bnx2x.h"
28#include "bnx2x_cmn.h" 26#include "bnx2x_cmn.h"
29#include "bnx2x_dump.h" 27#include "bnx2x_dump.h"
30#include "bnx2x_init.h" 28#include "bnx2x_init.h"
31#include "bnx2x_sp.h"
32 29
33/* Note: in the format strings below %s is replaced by the queue-name which is 30/* Note: in the format strings below %s is replaced by the queue-name which is
34 * either its index or 'fcoe' for the fcoe queue. Make sure the format string 31 * either its index or 'fcoe' for the fcoe queue. Make sure the format string
@@ -2396,10 +2393,7 @@ static int bnx2x_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
2396 2393
2397static u32 bnx2x_get_rxfh_indir_size(struct net_device *dev) 2394static u32 bnx2x_get_rxfh_indir_size(struct net_device *dev)
2398{ 2395{
2399 struct bnx2x *bp = netdev_priv(dev); 2396 return T_ETH_INDIRECTION_TABLE_SIZE;
2400
2401 return (bp->multi_mode == ETH_RSS_MODE_DISABLED ?
2402 0 : T_ETH_INDIRECTION_TABLE_SIZE);
2403} 2397}
2404 2398
2405static int bnx2x_get_rxfh_indir(struct net_device *dev, u32 *indir) 2399static int bnx2x_get_rxfh_indir(struct net_device *dev, u32 *indir)
@@ -2445,7 +2439,7 @@ static int bnx2x_set_rxfh_indir(struct net_device *dev, const u32 *indir)
2445 ind_table[i] = indir[i] + bp->fp->cl_id; 2439 ind_table[i] = indir[i] + bp->fp->cl_id;
2446 } 2440 }
2447 2441
2448 return bnx2x_config_rss_pf(bp, ind_table, false); 2442 return bnx2x_config_rss_eth(bp, ind_table, false);
2449} 2443}
2450 2444
2451static const struct ethtool_ops bnx2x_ethtool_ops = { 2445static const struct ethtool_ops bnx2x_ethtool_ops = {
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h
index dbff5915b81a..799272d164e5 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h
@@ -4448,6 +4448,65 @@ struct cmng_struct_per_port {
4448 struct cmng_flags_per_port flags; 4448 struct cmng_flags_per_port flags;
4449}; 4449};
4450 4450
4451/*
4452 * a single rate shaping counter. can be used as protocol or vnic counter
4453 */
4454struct rate_shaping_counter {
4455 u32 quota;
4456#if defined(__BIG_ENDIAN)
4457 u16 __reserved0;
4458 u16 rate;
4459#elif defined(__LITTLE_ENDIAN)
4460 u16 rate;
4461 u16 __reserved0;
4462#endif
4463};
4464
4465/*
4466 * per-vnic rate shaping variables
4467 */
4468struct rate_shaping_vars_per_vn {
4469 struct rate_shaping_counter vn_counter;
4470};
4471
4472/*
4473 * per-vnic fairness variables
4474 */
4475struct fairness_vars_per_vn {
4476 u32 cos_credit_delta[MAX_COS_NUMBER];
4477 u32 vn_credit_delta;
4478 u32 __reserved0;
4479};
4480
4481/*
4482 * cmng port init state
4483 */
4484struct cmng_vnic {
4485 struct rate_shaping_vars_per_vn vnic_max_rate[4];
4486 struct fairness_vars_per_vn vnic_min_rate[4];
4487};
4488
4489/*
4490 * cmng port init state
4491 */
4492struct cmng_init {
4493 struct cmng_struct_per_port port;
4494 struct cmng_vnic vnic;
4495};
4496
4497
4498/*
4499 * driver parameters for congestion management init, all rates are in Mbps
4500 */
4501struct cmng_init_input {
4502 u32 port_rate;
4503 u16 vnic_min_rate[4];
4504 u16 vnic_max_rate[4];
4505 u16 cos_min_rate[MAX_COS_NUMBER];
4506 u16 cos_to_pause_mask[MAX_COS_NUMBER];
4507 struct cmng_flags_per_port flags;
4508};
4509
4451 4510
4452/* 4511/*
4453 * Protocol-common command ID for slow path elements 4512 * Protocol-common command ID for slow path elements
@@ -4763,16 +4822,6 @@ enum fairness_mode {
4763 4822
4764 4823
4765/* 4824/*
4766 * per-vnic fairness variables
4767 */
4768struct fairness_vars_per_vn {
4769 u32 cos_credit_delta[MAX_COS_NUMBER];
4770 u32 vn_credit_delta;
4771 u32 __reserved0;
4772};
4773
4774
4775/*
4776 * Priority and cos 4825 * Priority and cos
4777 */ 4826 */
4778struct priority_cos { 4827struct priority_cos {
@@ -5140,29 +5189,6 @@ struct protocol_common_spe {
5140 5189
5141 5190
5142/* 5191/*
5143 * a single rate shaping counter. can be used as protocol or vnic counter
5144 */
5145struct rate_shaping_counter {
5146 u32 quota;
5147#if defined(__BIG_ENDIAN)
5148 u16 __reserved0;
5149 u16 rate;
5150#elif defined(__LITTLE_ENDIAN)
5151 u16 rate;
5152 u16 __reserved0;
5153#endif
5154};
5155
5156
5157/*
5158 * per-vnic rate shaping variables
5159 */
5160struct rate_shaping_vars_per_vn {
5161 struct rate_shaping_counter vn_counter;
5162};
5163
5164
5165/*
5166 * The send queue element 5192 * The send queue element
5167 */ 5193 */
5168struct slow_path_element { 5194struct slow_path_element {
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h
index 29f5c3cca31a..2b7a2bd0592c 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h
@@ -241,7 +241,8 @@ static inline void bnx2x_map_q_cos(struct bnx2x *bp, u32 q_num, u32 new_cos)
241 REG_WR(bp, reg_addr, reg_bit_map | q_bit_map); 241 REG_WR(bp, reg_addr, reg_bit_map | q_bit_map);
242 242
243 /* set/clear queue bit in command-queue bit map 243 /* set/clear queue bit in command-queue bit map
244 (E2/E3A0 only, valid COS values are 0/1) */ 244 * (E2/E3A0 only, valid COS values are 0/1)
245 */
245 if (!(INIT_MODE_FLAGS(bp) & MODE_E3_B0)) { 246 if (!(INIT_MODE_FLAGS(bp) & MODE_E3_B0)) {
246 reg_addr = BNX2X_Q_CMDQ_REG_ADDR(pf_q_num); 247 reg_addr = BNX2X_Q_CMDQ_REG_ADDR(pf_q_num);
247 reg_bit_map = REG_RD(bp, reg_addr); 248 reg_bit_map = REG_RD(bp, reg_addr);
@@ -277,7 +278,215 @@ static inline void bnx2x_dcb_config_qm(struct bnx2x *bp, enum cos_mode mode,
277} 278}
278 279
279 280
280/* Returns the index of start or end of a specific block stage in ops array*/ 281/* congestion managment port init api description
282 * the api works as follows:
283 * the driver should pass the cmng_init_input struct, the port_init function
284 * will prepare the required internal ram structure which will be passed back
285 * to the driver (cmng_init) that will write it into the internal ram.
286 *
287 * IMPORTANT REMARKS:
288 * 1. the cmng_init struct does not represent the contiguous internal ram
289 * structure. the driver should use the XSTORM_CMNG_PERPORT_VARS_OFFSET
290 * offset in order to write the port sub struct and the
291 * PFID_FROM_PORT_AND_VNIC offset for writing the vnic sub struct (in other
292 * words - don't use memcpy!).
293 * 2. although the cmng_init struct is filled for the maximal vnic number
294 * possible, the driver should only write the valid vnics into the internal
295 * ram according to the appropriate port mode.
296 */
297#define BITS_TO_BYTES(x) ((x)/8)
298
299/* CMNG constants, as derived from system spec calculations */
300
301/* default MIN rate in case VNIC min rate is configured to zero- 100Mbps */
302#define DEF_MIN_RATE 100
303
304/* resolution of the rate shaping timer - 400 usec */
305#define RS_PERIODIC_TIMEOUT_USEC 400
306
307/* number of bytes in single QM arbitration cycle -
308 * coefficient for calculating the fairness timer
309 */
310#define QM_ARB_BYTES 160000
311
312/* resolution of Min algorithm 1:100 */
313#define MIN_RES 100
314
315/* how many bytes above threshold for
316 * the minimal credit of Min algorithm
317 */
318#define MIN_ABOVE_THRESH 32768
319
320/* Fairness algorithm integration time coefficient -
321 * for calculating the actual Tfair
322 */
323#define T_FAIR_COEF ((MIN_ABOVE_THRESH + QM_ARB_BYTES) * 8 * MIN_RES)
324
325/* Memory of fairness algorithm - 2 cycles */
326#define FAIR_MEM 2
327#define SAFC_TIMEOUT_USEC 52
328
329#define SDM_TICKS 4
330
331
332static inline void bnx2x_init_max(const struct cmng_init_input *input_data,
333 u32 r_param, struct cmng_init *ram_data)
334{
335 u32 vnic;
336 struct cmng_vnic *vdata = &ram_data->vnic;
337 struct cmng_struct_per_port *pdata = &ram_data->port;
338 /* rate shaping per-port variables
339 * 100 micro seconds in SDM ticks = 25
340 * since each tick is 4 microSeconds
341 */
342
343 pdata->rs_vars.rs_periodic_timeout =
344 RS_PERIODIC_TIMEOUT_USEC / SDM_TICKS;
345
346 /* this is the threshold below which no timer arming will occur.
347 * 1.25 coefficient is for the threshold to be a little bigger
348 * then the real time to compensate for timer in-accuracy
349 */
350 pdata->rs_vars.rs_threshold =
351 (5 * RS_PERIODIC_TIMEOUT_USEC * r_param)/4;
352
353 /* rate shaping per-vnic variables */
354 for (vnic = 0; vnic < BNX2X_PORT2_MODE_NUM_VNICS; vnic++) {
355 /* global vnic counter */
356 vdata->vnic_max_rate[vnic].vn_counter.rate =
357 input_data->vnic_max_rate[vnic];
358 /* maximal Mbps for this vnic
359 * the quota in each timer period - number of bytes
360 * transmitted in this period
361 */
362 vdata->vnic_max_rate[vnic].vn_counter.quota =
363 RS_PERIODIC_TIMEOUT_USEC *
364 (u32)vdata->vnic_max_rate[vnic].vn_counter.rate / 8;
365 }
366
367}
368
369static inline void bnx2x_init_min(const struct cmng_init_input *input_data,
370 u32 r_param, struct cmng_init *ram_data)
371{
372 u32 vnic, fair_periodic_timeout_usec, vnicWeightSum, tFair;
373 struct cmng_vnic *vdata = &ram_data->vnic;
374 struct cmng_struct_per_port *pdata = &ram_data->port;
375
376 /* this is the resolution of the fairness timer */
377 fair_periodic_timeout_usec = QM_ARB_BYTES / r_param;
378
379 /* fairness per-port variables
380 * for 10G it is 1000usec. for 1G it is 10000usec.
381 */
382 tFair = T_FAIR_COEF / input_data->port_rate;
383
384 /* this is the threshold below which we won't arm the timer anymore */
385 pdata->fair_vars.fair_threshold = QM_ARB_BYTES;
386
387 /* we multiply by 1e3/8 to get bytes/msec. We don't want the credits
388 * to pass a credit of the T_FAIR*FAIR_MEM (algorithm resolution)
389 */
390 pdata->fair_vars.upper_bound = r_param * tFair * FAIR_MEM;
391
392 /* since each tick is 4 microSeconds */
393 pdata->fair_vars.fairness_timeout =
394 fair_periodic_timeout_usec / SDM_TICKS;
395
396 /* calculate sum of weights */
397 vnicWeightSum = 0;
398
399 for (vnic = 0; vnic < BNX2X_PORT2_MODE_NUM_VNICS; vnic++)
400 vnicWeightSum += input_data->vnic_min_rate[vnic];
401
402 /* global vnic counter */
403 if (vnicWeightSum > 0) {
404 /* fairness per-vnic variables */
405 for (vnic = 0; vnic < BNX2X_PORT2_MODE_NUM_VNICS; vnic++) {
406 /* this is the credit for each period of the fairness
407 * algorithm - number of bytes in T_FAIR (this vnic
408 * share of the port rate)
409 */
410 vdata->vnic_min_rate[vnic].vn_credit_delta =
411 (u32)input_data->vnic_min_rate[vnic] * 100 *
412 (T_FAIR_COEF / (8 * 100 * vnicWeightSum));
413 if (vdata->vnic_min_rate[vnic].vn_credit_delta <
414 pdata->fair_vars.fair_threshold +
415 MIN_ABOVE_THRESH) {
416 vdata->vnic_min_rate[vnic].vn_credit_delta =
417 pdata->fair_vars.fair_threshold +
418 MIN_ABOVE_THRESH;
419 }
420 }
421 }
422}
423
424static inline void bnx2x_init_fw_wrr(const struct cmng_init_input *input_data,
425 u32 r_param, struct cmng_init *ram_data)
426{
427 u32 vnic, cos;
428 u32 cosWeightSum = 0;
429 struct cmng_vnic *vdata = &ram_data->vnic;
430 struct cmng_struct_per_port *pdata = &ram_data->port;
431
432 for (cos = 0; cos < MAX_COS_NUMBER; cos++)
433 cosWeightSum += input_data->cos_min_rate[cos];
434
435 if (cosWeightSum > 0) {
436
437 for (vnic = 0; vnic < BNX2X_PORT2_MODE_NUM_VNICS; vnic++) {
438 /* Since cos and vnic shouldn't work together the rate
439 * to divide between the coses is the port rate.
440 */
441 u32 *ccd = vdata->vnic_min_rate[vnic].cos_credit_delta;
442 for (cos = 0; cos < MAX_COS_NUMBER; cos++) {
443 /* this is the credit for each period of
444 * the fairness algorithm - number of bytes
445 * in T_FAIR (this cos share of the vnic rate)
446 */
447 ccd[cos] =
448 (u32)input_data->cos_min_rate[cos] * 100 *
449 (T_FAIR_COEF / (8 * 100 * cosWeightSum));
450 if (ccd[cos] < pdata->fair_vars.fair_threshold
451 + MIN_ABOVE_THRESH) {
452 ccd[cos] =
453 pdata->fair_vars.fair_threshold +
454 MIN_ABOVE_THRESH;
455 }
456 }
457 }
458 }
459}
460
461static inline void bnx2x_init_safc(const struct cmng_init_input *input_data,
462 struct cmng_init *ram_data)
463{
464 /* in microSeconds */
465 ram_data->port.safc_vars.safc_timeout_usec = SAFC_TIMEOUT_USEC;
466}
467
468/* Congestion management port init */
469static inline void bnx2x_init_cmng(const struct cmng_init_input *input_data,
470 struct cmng_init *ram_data)
471{
472 u32 r_param;
473 memset(ram_data, 0, sizeof(struct cmng_init));
474
475 ram_data->port.flags = input_data->flags;
476
477 /* number of bytes transmitted in a rate of 10Gbps
478 * in one usec = 1.25KB.
479 */
480 r_param = BITS_TO_BYTES(input_data->port_rate);
481 bnx2x_init_max(input_data, r_param, ram_data);
482 bnx2x_init_min(input_data, r_param, ram_data);
483 bnx2x_init_fw_wrr(input_data, r_param, ram_data);
484 bnx2x_init_safc(input_data, ram_data);
485}
486
487
488
489/* Returns the index of start or end of a specific block stage in ops array */
281#define BLOCK_OPS_IDX(block, stage, end) \ 490#define BLOCK_OPS_IDX(block, stage, end) \
282 (2*(((block)*NUM_OF_INIT_PHASES) + (stage)) + (end)) 491 (2*(((block)*NUM_OF_INIT_PHASES) + (stage)) + (end))
283 492
@@ -499,9 +708,7 @@ static inline void bnx2x_disable_blocks_parity(struct bnx2x *bp)
499 bnx2x_set_mcp_parity(bp, false); 708 bnx2x_set_mcp_parity(bp, false);
500} 709}
501 710
502/** 711/* Clear the parity error status registers. */
503 * Clear the parity error status registers.
504 */
505static inline void bnx2x_clear_blocks_parity(struct bnx2x *bp) 712static inline void bnx2x_clear_blocks_parity(struct bnx2x *bp)
506{ 713{
507 int i; 714 int i;
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
index ad95324dc042..ff882a482094 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
@@ -138,7 +138,6 @@
138 138
139 139
140 140
141/* */
142#define SFP_EEPROM_CON_TYPE_ADDR 0x2 141#define SFP_EEPROM_CON_TYPE_ADDR 0x2
143 #define SFP_EEPROM_CON_TYPE_VAL_LC 0x7 142 #define SFP_EEPROM_CON_TYPE_VAL_LC 0x7
144 #define SFP_EEPROM_CON_TYPE_VAL_COPPER 0x21 143 #define SFP_EEPROM_CON_TYPE_VAL_COPPER 0x21
@@ -404,8 +403,7 @@ static void bnx2x_ets_e2e3a0_disabled(struct link_params *params)
404 403
405 DP(NETIF_MSG_LINK, "ETS E2E3 disabled configuration\n"); 404 DP(NETIF_MSG_LINK, "ETS E2E3 disabled configuration\n");
406 405
407 /* 406 /* mapping between entry priority to client number (0,1,2 -debug and
408 * mapping between entry priority to client number (0,1,2 -debug and
409 * management clients, 3 - COS0 client, 4 - COS client)(HIGHEST) 407 * management clients, 3 - COS0 client, 4 - COS client)(HIGHEST)
410 * 3bits client num. 408 * 3bits client num.
411 * PRI4 | PRI3 | PRI2 | PRI1 | PRI0 409 * PRI4 | PRI3 | PRI2 | PRI1 | PRI0
@@ -413,8 +411,7 @@ static void bnx2x_ets_e2e3a0_disabled(struct link_params *params)
413 */ 411 */
414 412
415 REG_WR(bp, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT, 0x4688); 413 REG_WR(bp, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT, 0x4688);
416 /* 414 /* Bitmap of 5bits length. Each bit specifies whether the entry behaves
417 * Bitmap of 5bits length. Each bit specifies whether the entry behaves
418 * as strict. Bits 0,1,2 - debug and management entries, 3 - 415 * as strict. Bits 0,1,2 - debug and management entries, 3 -
419 * COS0 entry, 4 - COS1 entry. 416 * COS0 entry, 4 - COS1 entry.
420 * COS1 | COS0 | DEBUG1 | DEBUG0 | MGMT 417 * COS1 | COS0 | DEBUG1 | DEBUG0 | MGMT
@@ -425,13 +422,11 @@ static void bnx2x_ets_e2e3a0_disabled(struct link_params *params)
425 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, 0x7); 422 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, 0x7);
426 /* defines which entries (clients) are subjected to WFQ arbitration */ 423 /* defines which entries (clients) are subjected to WFQ arbitration */
427 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, 0); 424 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, 0);
428 /* 425 /* For strict priority entries defines the number of consecutive
429 * For strict priority entries defines the number of consecutive
430 * slots for the highest priority. 426 * slots for the highest priority.
431 */ 427 */
432 REG_WR(bp, NIG_REG_P0_TX_ARB_NUM_STRICT_ARB_SLOTS, 0x100); 428 REG_WR(bp, NIG_REG_P0_TX_ARB_NUM_STRICT_ARB_SLOTS, 0x100);
433 /* 429 /* mapping between the CREDIT_WEIGHT registers and actual client
434 * mapping between the CREDIT_WEIGHT registers and actual client
435 * numbers 430 * numbers
436 */ 431 */
437 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_CREDIT_MAP, 0); 432 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_CREDIT_MAP, 0);
@@ -443,8 +438,7 @@ static void bnx2x_ets_e2e3a0_disabled(struct link_params *params)
443 REG_WR(bp, PBF_REG_HIGH_PRIORITY_COS_NUM, 0); 438 REG_WR(bp, PBF_REG_HIGH_PRIORITY_COS_NUM, 0);
444 /* ETS mode disable */ 439 /* ETS mode disable */
445 REG_WR(bp, PBF_REG_ETS_ENABLED, 0); 440 REG_WR(bp, PBF_REG_ETS_ENABLED, 0);
446 /* 441 /* If ETS mode is enabled (there is no strict priority) defines a WFQ
447 * If ETS mode is enabled (there is no strict priority) defines a WFQ
448 * weight for COS0/COS1. 442 * weight for COS0/COS1.
449 */ 443 */
450 REG_WR(bp, PBF_REG_COS0_WEIGHT, 0x2710); 444 REG_WR(bp, PBF_REG_COS0_WEIGHT, 0x2710);
@@ -471,10 +465,9 @@ static u32 bnx2x_ets_get_min_w_val_nig(const struct link_vars *vars)
471 min_w_val = ETS_E3B0_NIG_MIN_W_VAL_UP_TO_10GBPS; 465 min_w_val = ETS_E3B0_NIG_MIN_W_VAL_UP_TO_10GBPS;
472 } else 466 } else
473 min_w_val = ETS_E3B0_NIG_MIN_W_VAL_20GBPS; 467 min_w_val = ETS_E3B0_NIG_MIN_W_VAL_20GBPS;
474 /** 468 /* If the link isn't up (static configuration for example ) The
475 * If the link isn't up (static configuration for example ) The 469 * link will be according to 20GBPS.
476 * link will be according to 20GBPS. 470 */
477 */
478 return min_w_val; 471 return min_w_val;
479} 472}
480/****************************************************************************** 473/******************************************************************************
@@ -538,8 +531,7 @@ static void bnx2x_ets_e3b0_nig_disabled(const struct link_params *params,
538 struct bnx2x *bp = params->bp; 531 struct bnx2x *bp = params->bp;
539 const u8 port = params->port; 532 const u8 port = params->port;
540 const u32 min_w_val = bnx2x_ets_get_min_w_val_nig(vars); 533 const u32 min_w_val = bnx2x_ets_get_min_w_val_nig(vars);
541 /** 534 /* Mapping between entry priority to client number (0,1,2 -debug and
542 * mapping between entry priority to client number (0,1,2 -debug and
543 * management clients, 3 - COS0 client, 4 - COS1, ... 8 - 535 * management clients, 3 - COS0 client, 4 - COS1, ... 8 -
544 * COS5)(HIGHEST) 4bits client num.TODO_ETS - Should be done by 536 * COS5)(HIGHEST) 4bits client num.TODO_ETS - Should be done by
545 * reset value or init tool 537 * reset value or init tool
@@ -551,18 +543,14 @@ static void bnx2x_ets_e3b0_nig_disabled(const struct link_params *params,
551 REG_WR(bp, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT2_LSB, 0x76543210); 543 REG_WR(bp, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT2_LSB, 0x76543210);
552 REG_WR(bp, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT2_MSB, 0x8); 544 REG_WR(bp, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT2_MSB, 0x8);
553 } 545 }
554 /** 546 /* For strict priority entries defines the number of consecutive
555 * For strict priority entries defines the number of consecutive 547 * slots for the highest priority.
556 * slots for the highest priority. 548 */
557 */
558 /* TODO_ETS - Should be done by reset value or init tool */
559 REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_NUM_STRICT_ARB_SLOTS : 549 REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_NUM_STRICT_ARB_SLOTS :
560 NIG_REG_P1_TX_ARB_NUM_STRICT_ARB_SLOTS, 0x100); 550 NIG_REG_P1_TX_ARB_NUM_STRICT_ARB_SLOTS, 0x100);
561 /** 551 /* Mapping between the CREDIT_WEIGHT registers and actual client
562 * mapping between the CREDIT_WEIGHT registers and actual client
563 * numbers 552 * numbers
564 */ 553 */
565 /* TODO_ETS - Should be done by reset value or init tool */
566 if (port) { 554 if (port) {
567 /*Port 1 has 6 COS*/ 555 /*Port 1 has 6 COS*/
568 REG_WR(bp, NIG_REG_P1_TX_ARB_CLIENT_CREDIT_MAP2_LSB, 0x210543); 556 REG_WR(bp, NIG_REG_P1_TX_ARB_CLIENT_CREDIT_MAP2_LSB, 0x210543);
@@ -574,8 +562,7 @@ static void bnx2x_ets_e3b0_nig_disabled(const struct link_params *params,
574 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_CREDIT_MAP2_MSB, 0x5); 562 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_CREDIT_MAP2_MSB, 0x5);
575 } 563 }
576 564
577 /** 565 /* Bitmap of 5bits length. Each bit specifies whether the entry behaves
578 * Bitmap of 5bits length. Each bit specifies whether the entry behaves
579 * as strict. Bits 0,1,2 - debug and management entries, 3 - 566 * as strict. Bits 0,1,2 - debug and management entries, 3 -
580 * COS0 entry, 4 - COS1 entry. 567 * COS0 entry, 4 - COS1 entry.
581 * COS1 | COS0 | DEBUG1 | DEBUG0 | MGMT 568 * COS1 | COS0 | DEBUG1 | DEBUG0 | MGMT
@@ -590,13 +577,12 @@ static void bnx2x_ets_e3b0_nig_disabled(const struct link_params *params,
590 REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CLIENT_IS_SUBJECT2WFQ : 577 REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CLIENT_IS_SUBJECT2WFQ :
591 NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, 0); 578 NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, 0);
592 579
593 /** 580 /* Please notice the register address are note continuous and a
594 * Please notice the register address are note continuous and a 581 * for here is note appropriate.In 2 port mode port0 only COS0-5
595 * for here is note appropriate.In 2 port mode port0 only COS0-5 582 * can be used. DEBUG1,DEBUG1,MGMT are never used for WFQ* In 4
596 * can be used. DEBUG1,DEBUG1,MGMT are never used for WFQ* In 4 583 * port mode port1 only COS0-2 can be used. DEBUG1,DEBUG1,MGMT
597 * port mode port1 only COS0-2 can be used. DEBUG1,DEBUG1,MGMT 584 * are never used for WFQ
598 * are never used for WFQ 585 */
599 */
600 REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_0 : 586 REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_0 :
601 NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_0, 0x0); 587 NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_0, 0x0);
602 REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_1 : 588 REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_1 :
@@ -633,10 +619,9 @@ static void bnx2x_ets_e3b0_set_credit_upper_bound_pbf(
633 u32 base_upper_bound = 0; 619 u32 base_upper_bound = 0;
634 u8 max_cos = 0; 620 u8 max_cos = 0;
635 u8 i = 0; 621 u8 i = 0;
636 /** 622 /* In 2 port mode port0 has COS0-5 that can be used for WFQ.In 4
637 * In 2 port mode port0 has COS0-5 that can be used for WFQ.In 4 623 * port mode port1 has COS0-2 that can be used for WFQ.
638 * port mode port1 has COS0-2 that can be used for WFQ. 624 */
639 */
640 if (!port) { 625 if (!port) {
641 base_upper_bound = PBF_REG_COS0_UPPER_BOUND_P0; 626 base_upper_bound = PBF_REG_COS0_UPPER_BOUND_P0;
642 max_cos = DCBX_E3B0_MAX_NUM_COS_PORT0; 627 max_cos = DCBX_E3B0_MAX_NUM_COS_PORT0;
@@ -666,8 +651,7 @@ static void bnx2x_ets_e3b0_pbf_disabled(const struct link_params *params)
666 u32 base_weight = 0; 651 u32 base_weight = 0;
667 u8 max_cos = 0; 652 u8 max_cos = 0;
668 653
669 /** 654 /* Mapping between entry priority to client number 0 - COS0
670 * mapping between entry priority to client number 0 - COS0
671 * client, 2 - COS1, ... 5 - COS5)(HIGHEST) 4bits client num. 655 * client, 2 - COS1, ... 5 - COS5)(HIGHEST) 4bits client num.
672 * TODO_ETS - Should be done by reset value or init tool 656 * TODO_ETS - Should be done by reset value or init tool
673 */ 657 */
@@ -695,10 +679,9 @@ static void bnx2x_ets_e3b0_pbf_disabled(const struct link_params *params)
695 679
696 REG_WR(bp, (port) ? PBF_REG_ETS_ARB_CLIENT_IS_SUBJECT2WFQ_P1 : 680 REG_WR(bp, (port) ? PBF_REG_ETS_ARB_CLIENT_IS_SUBJECT2WFQ_P1 :
697 PBF_REG_ETS_ARB_CLIENT_IS_SUBJECT2WFQ_P0 , 0); 681 PBF_REG_ETS_ARB_CLIENT_IS_SUBJECT2WFQ_P0 , 0);
698 /** 682 /* In 2 port mode port0 has COS0-5 that can be used for WFQ.
699 * In 2 port mode port0 has COS0-5 that can be used for WFQ. 683 * In 4 port mode port1 has COS0-2 that can be used for WFQ.
700 * In 4 port mode port1 has COS0-2 that can be used for WFQ. 684 */
701 */
702 if (!port) { 685 if (!port) {
703 base_weight = PBF_REG_COS0_WEIGHT_P0; 686 base_weight = PBF_REG_COS0_WEIGHT_P0;
704 max_cos = DCBX_E3B0_MAX_NUM_COS_PORT0; 687 max_cos = DCBX_E3B0_MAX_NUM_COS_PORT0;
@@ -738,7 +721,7 @@ static int bnx2x_ets_e3b0_disabled(const struct link_params *params,
738/****************************************************************************** 721/******************************************************************************
739* Description: 722* Description:
740* Disable will return basicly the values to init values. 723* Disable will return basicly the values to init values.
741*. 724*
742******************************************************************************/ 725******************************************************************************/
743int bnx2x_ets_disabled(struct link_params *params, 726int bnx2x_ets_disabled(struct link_params *params,
744 struct link_vars *vars) 727 struct link_vars *vars)
@@ -867,7 +850,7 @@ static int bnx2x_ets_e3b0_set_cos_bw(struct bnx2x *bp,
867/****************************************************************************** 850/******************************************************************************
868* Description: 851* Description:
869* Calculate the total BW.A value of 0 isn't legal. 852* Calculate the total BW.A value of 0 isn't legal.
870*. 853*
871******************************************************************************/ 854******************************************************************************/
872static int bnx2x_ets_e3b0_get_total_bw( 855static int bnx2x_ets_e3b0_get_total_bw(
873 const struct link_params *params, 856 const struct link_params *params,
@@ -879,7 +862,6 @@ static int bnx2x_ets_e3b0_get_total_bw(
879 u8 is_bw_cos_exist = 0; 862 u8 is_bw_cos_exist = 0;
880 863
881 *total_bw = 0 ; 864 *total_bw = 0 ;
882
883 /* Calculate total BW requested */ 865 /* Calculate total BW requested */
884 for (cos_idx = 0; cos_idx < ets_params->num_of_cos; cos_idx++) { 866 for (cos_idx = 0; cos_idx < ets_params->num_of_cos; cos_idx++) {
885 if (ets_params->cos[cos_idx].state == bnx2x_cos_state_bw) { 867 if (ets_params->cos[cos_idx].state == bnx2x_cos_state_bw) {
@@ -887,10 +869,9 @@ static int bnx2x_ets_e3b0_get_total_bw(
887 if (!ets_params->cos[cos_idx].params.bw_params.bw) { 869 if (!ets_params->cos[cos_idx].params.bw_params.bw) {
888 DP(NETIF_MSG_LINK, "bnx2x_ets_E3B0_config BW" 870 DP(NETIF_MSG_LINK, "bnx2x_ets_E3B0_config BW"
889 "was set to 0\n"); 871 "was set to 0\n");
890 /* 872 /* This is to prevent a state when ramrods
891 * This is to prevent a state when ramrods
892 * can't be sent 873 * can't be sent
893 */ 874 */
894 ets_params->cos[cos_idx].params.bw_params.bw 875 ets_params->cos[cos_idx].params.bw_params.bw
895 = 1; 876 = 1;
896 } 877 }
@@ -908,8 +889,7 @@ static int bnx2x_ets_e3b0_get_total_bw(
908 } 889 }
909 DP(NETIF_MSG_LINK, 890 DP(NETIF_MSG_LINK,
910 "bnx2x_ets_E3B0_config total BW should be 100\n"); 891 "bnx2x_ets_E3B0_config total BW should be 100\n");
911 /* 892 /* We can handle a case whre the BW isn't 100 this can happen
912 * We can handle a case whre the BW isn't 100 this can happen
913 * if the TC are joined. 893 * if the TC are joined.
914 */ 894 */
915 } 895 }
@@ -919,7 +899,7 @@ static int bnx2x_ets_e3b0_get_total_bw(
919/****************************************************************************** 899/******************************************************************************
920* Description: 900* Description:
921* Invalidate all the sp_pri_to_cos. 901* Invalidate all the sp_pri_to_cos.
922*. 902*
923******************************************************************************/ 903******************************************************************************/
924static void bnx2x_ets_e3b0_sp_pri_to_cos_init(u8 *sp_pri_to_cos) 904static void bnx2x_ets_e3b0_sp_pri_to_cos_init(u8 *sp_pri_to_cos)
925{ 905{
@@ -931,7 +911,7 @@ static void bnx2x_ets_e3b0_sp_pri_to_cos_init(u8 *sp_pri_to_cos)
931* Description: 911* Description:
932* Calculate and set the SP (ARB_PRIORITY_CLIENT) NIG and PBF registers 912* Calculate and set the SP (ARB_PRIORITY_CLIENT) NIG and PBF registers
933* according to sp_pri_to_cos. 913* according to sp_pri_to_cos.
934*. 914*
935******************************************************************************/ 915******************************************************************************/
936static int bnx2x_ets_e3b0_sp_pri_to_cos_set(const struct link_params *params, 916static int bnx2x_ets_e3b0_sp_pri_to_cos_set(const struct link_params *params,
937 u8 *sp_pri_to_cos, const u8 pri, 917 u8 *sp_pri_to_cos, const u8 pri,
@@ -964,7 +944,7 @@ static int bnx2x_ets_e3b0_sp_pri_to_cos_set(const struct link_params *params,
964* Description: 944* Description:
965* Returns the correct value according to COS and priority in 945* Returns the correct value according to COS and priority in
966* the sp_pri_cli register. 946* the sp_pri_cli register.
967*. 947*
968******************************************************************************/ 948******************************************************************************/
969static u64 bnx2x_e3b0_sp_get_pri_cli_reg(const u8 cos, const u8 cos_offset, 949static u64 bnx2x_e3b0_sp_get_pri_cli_reg(const u8 cos, const u8 cos_offset,
970 const u8 pri_set, 950 const u8 pri_set,
@@ -981,7 +961,7 @@ static u64 bnx2x_e3b0_sp_get_pri_cli_reg(const u8 cos, const u8 cos_offset,
981* Description: 961* Description:
982* Returns the correct value according to COS and priority in the 962* Returns the correct value according to COS and priority in the
983* sp_pri_cli register for NIG. 963* sp_pri_cli register for NIG.
984*. 964*
985******************************************************************************/ 965******************************************************************************/
986static u64 bnx2x_e3b0_sp_get_pri_cli_reg_nig(const u8 cos, const u8 pri_set) 966static u64 bnx2x_e3b0_sp_get_pri_cli_reg_nig(const u8 cos, const u8 pri_set)
987{ 967{
@@ -997,7 +977,7 @@ static u64 bnx2x_e3b0_sp_get_pri_cli_reg_nig(const u8 cos, const u8 pri_set)
997* Description: 977* Description:
998* Returns the correct value according to COS and priority in the 978* Returns the correct value according to COS and priority in the
999* sp_pri_cli register for PBF. 979* sp_pri_cli register for PBF.
1000*. 980*
1001******************************************************************************/ 981******************************************************************************/
1002static u64 bnx2x_e3b0_sp_get_pri_cli_reg_pbf(const u8 cos, const u8 pri_set) 982static u64 bnx2x_e3b0_sp_get_pri_cli_reg_pbf(const u8 cos, const u8 pri_set)
1003{ 983{
@@ -1013,7 +993,7 @@ static u64 bnx2x_e3b0_sp_get_pri_cli_reg_pbf(const u8 cos, const u8 pri_set)
1013* Description: 993* Description:
1014* Calculate and set the SP (ARB_PRIORITY_CLIENT) NIG and PBF registers 994* Calculate and set the SP (ARB_PRIORITY_CLIENT) NIG and PBF registers
1015* according to sp_pri_to_cos.(which COS has higher priority) 995* according to sp_pri_to_cos.(which COS has higher priority)
1016*. 996*
1017******************************************************************************/ 997******************************************************************************/
1018static int bnx2x_ets_e3b0_sp_set_pri_cli_reg(const struct link_params *params, 998static int bnx2x_ets_e3b0_sp_set_pri_cli_reg(const struct link_params *params,
1019 u8 *sp_pri_to_cos) 999 u8 *sp_pri_to_cos)
@@ -1149,8 +1129,7 @@ int bnx2x_ets_e3b0_config(const struct link_params *params,
1149 return -EINVAL; 1129 return -EINVAL;
1150 } 1130 }
1151 1131
1152 /* 1132 /* Upper bound is set according to current link speed (min_w_val
1153 * Upper bound is set according to current link speed (min_w_val
1154 * should be the same for upper bound and COS credit val). 1133 * should be the same for upper bound and COS credit val).
1155 */ 1134 */
1156 bnx2x_ets_e3b0_set_credit_upper_bound_nig(params, min_w_val_nig); 1135 bnx2x_ets_e3b0_set_credit_upper_bound_nig(params, min_w_val_nig);
@@ -1160,8 +1139,7 @@ int bnx2x_ets_e3b0_config(const struct link_params *params,
1160 for (cos_entry = 0; cos_entry < ets_params->num_of_cos; cos_entry++) { 1139 for (cos_entry = 0; cos_entry < ets_params->num_of_cos; cos_entry++) {
1161 if (bnx2x_cos_state_bw == ets_params->cos[cos_entry].state) { 1140 if (bnx2x_cos_state_bw == ets_params->cos[cos_entry].state) {
1162 cos_bw_bitmap |= (1 << cos_entry); 1141 cos_bw_bitmap |= (1 << cos_entry);
1163 /* 1142 /* The function also sets the BW in HW(not the mappin
1164 * The function also sets the BW in HW(not the mappin
1165 * yet) 1143 * yet)
1166 */ 1144 */
1167 bnx2x_status = bnx2x_ets_e3b0_set_cos_bw( 1145 bnx2x_status = bnx2x_ets_e3b0_set_cos_bw(
@@ -1217,14 +1195,12 @@ static void bnx2x_ets_bw_limit_common(const struct link_params *params)
1217 /* ETS disabled configuration */ 1195 /* ETS disabled configuration */
1218 struct bnx2x *bp = params->bp; 1196 struct bnx2x *bp = params->bp;
1219 DP(NETIF_MSG_LINK, "ETS enabled BW limit configuration\n"); 1197 DP(NETIF_MSG_LINK, "ETS enabled BW limit configuration\n");
1220 /* 1198 /* Defines which entries (clients) are subjected to WFQ arbitration
1221 * defines which entries (clients) are subjected to WFQ arbitration
1222 * COS0 0x8 1199 * COS0 0x8
1223 * COS1 0x10 1200 * COS1 0x10
1224 */ 1201 */
1225 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, 0x18); 1202 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, 0x18);
1226 /* 1203 /* Mapping between the ARB_CREDIT_WEIGHT registers and actual
1227 * mapping between the ARB_CREDIT_WEIGHT registers and actual
1228 * client numbers (WEIGHT_0 does not actually have to represent 1204 * client numbers (WEIGHT_0 does not actually have to represent
1229 * client 0) 1205 * client 0)
1230 * PRI4 | PRI3 | PRI2 | PRI1 | PRI0 1206 * PRI4 | PRI3 | PRI2 | PRI1 | PRI0
@@ -1242,8 +1218,7 @@ static void bnx2x_ets_bw_limit_common(const struct link_params *params)
1242 1218
1243 /* Defines the number of consecutive slots for the strict priority */ 1219 /* Defines the number of consecutive slots for the strict priority */
1244 REG_WR(bp, PBF_REG_NUM_STRICT_ARB_SLOTS, 0); 1220 REG_WR(bp, PBF_REG_NUM_STRICT_ARB_SLOTS, 0);
1245 /* 1221 /* Bitmap of 5bits length. Each bit specifies whether the entry behaves
1246 * Bitmap of 5bits length. Each bit specifies whether the entry behaves
1247 * as strict. Bits 0,1,2 - debug and management entries, 3 - COS0 1222 * as strict. Bits 0,1,2 - debug and management entries, 3 - COS0
1248 * entry, 4 - COS1 entry. 1223 * entry, 4 - COS1 entry.
1249 * COS1 | COS0 | DEBUG21 | DEBUG0 | MGMT 1224 * COS1 | COS0 | DEBUG21 | DEBUG0 | MGMT
@@ -1298,8 +1273,7 @@ int bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos)
1298 u32 val = 0; 1273 u32 val = 0;
1299 1274
1300 DP(NETIF_MSG_LINK, "ETS enabled strict configuration\n"); 1275 DP(NETIF_MSG_LINK, "ETS enabled strict configuration\n");
1301 /* 1276 /* Bitmap of 5bits length. Each bit specifies whether the entry behaves
1302 * Bitmap of 5bits length. Each bit specifies whether the entry behaves
1303 * as strict. Bits 0,1,2 - debug and management entries, 1277 * as strict. Bits 0,1,2 - debug and management entries,
1304 * 3 - COS0 entry, 4 - COS1 entry. 1278 * 3 - COS0 entry, 4 - COS1 entry.
1305 * COS1 | COS0 | DEBUG21 | DEBUG0 | MGMT 1279 * COS1 | COS0 | DEBUG21 | DEBUG0 | MGMT
@@ -1307,8 +1281,7 @@ int bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos)
1307 * MCP and debug are strict 1281 * MCP and debug are strict
1308 */ 1282 */
1309 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, 0x1F); 1283 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, 0x1F);
1310 /* 1284 /* For strict priority entries defines the number of consecutive slots
1311 * For strict priority entries defines the number of consecutive slots
1312 * for the highest priority. 1285 * for the highest priority.
1313 */ 1286 */
1314 REG_WR(bp, NIG_REG_P0_TX_ARB_NUM_STRICT_ARB_SLOTS, 0x100); 1287 REG_WR(bp, NIG_REG_P0_TX_ARB_NUM_STRICT_ARB_SLOTS, 0x100);
@@ -1320,8 +1293,7 @@ int bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos)
1320 /* Defines the number of consecutive slots for the strict priority */ 1293 /* Defines the number of consecutive slots for the strict priority */
1321 REG_WR(bp, PBF_REG_HIGH_PRIORITY_COS_NUM, strict_cos); 1294 REG_WR(bp, PBF_REG_HIGH_PRIORITY_COS_NUM, strict_cos);
1322 1295
1323 /* 1296 /* Mapping between entry priority to client number (0,1,2 -debug and
1324 * mapping between entry priority to client number (0,1,2 -debug and
1325 * management clients, 3 - COS0 client, 4 - COS client)(HIGHEST) 1297 * management clients, 3 - COS0 client, 4 - COS client)(HIGHEST)
1326 * 3bits client num. 1298 * 3bits client num.
1327 * PRI4 | PRI3 | PRI2 | PRI1 | PRI0 1299 * PRI4 | PRI3 | PRI2 | PRI1 | PRI0
@@ -1356,15 +1328,12 @@ static void bnx2x_update_pfc_xmac(struct link_params *params,
1356 if (!(params->feature_config_flags & 1328 if (!(params->feature_config_flags &
1357 FEATURE_CONFIG_PFC_ENABLED)) { 1329 FEATURE_CONFIG_PFC_ENABLED)) {
1358 1330
1359 /* 1331 /* RX flow control - Process pause frame in receive direction
1360 * RX flow control - Process pause frame in receive direction
1361 */ 1332 */
1362 if (vars->flow_ctrl & BNX2X_FLOW_CTRL_RX) 1333 if (vars->flow_ctrl & BNX2X_FLOW_CTRL_RX)
1363 pause_val |= XMAC_PAUSE_CTRL_REG_RX_PAUSE_EN; 1334 pause_val |= XMAC_PAUSE_CTRL_REG_RX_PAUSE_EN;
1364 1335
1365 /* 1336 /* TX flow control - Send pause packet when buffer is full */
1366 * TX flow control - Send pause packet when buffer is full
1367 */
1368 if (vars->flow_ctrl & BNX2X_FLOW_CTRL_TX) 1337 if (vars->flow_ctrl & BNX2X_FLOW_CTRL_TX)
1369 pause_val |= XMAC_PAUSE_CTRL_REG_TX_PAUSE_EN; 1338 pause_val |= XMAC_PAUSE_CTRL_REG_TX_PAUSE_EN;
1370 } else {/* PFC support */ 1339 } else {/* PFC support */
@@ -1457,8 +1426,7 @@ void bnx2x_pfc_statistic(struct link_params *params, struct link_vars *vars,
1457static void bnx2x_set_mdio_clk(struct bnx2x *bp, u32 chip_id, u8 port) 1426static void bnx2x_set_mdio_clk(struct bnx2x *bp, u32 chip_id, u8 port)
1458{ 1427{
1459 u32 mode, emac_base; 1428 u32 mode, emac_base;
1460 /** 1429 /* Set clause 45 mode, slow down the MDIO clock to 2.5MHz
1461 * Set clause 45 mode, slow down the MDIO clock to 2.5MHz
1462 * (a value of 49==0x31) and make sure that the AUTO poll is off 1430 * (a value of 49==0x31) and make sure that the AUTO poll is off
1463 */ 1431 */
1464 1432
@@ -1578,15 +1546,6 @@ static void bnx2x_umac_enable(struct link_params *params,
1578 1546
1579 DP(NETIF_MSG_LINK, "enabling UMAC\n"); 1547 DP(NETIF_MSG_LINK, "enabling UMAC\n");
1580 1548
1581 /**
1582 * This register determines on which events the MAC will assert
1583 * error on the i/f to the NIG along w/ EOP.
1584 */
1585
1586 /**
1587 * BD REG_WR(bp, NIG_REG_P0_MAC_RSV_ERR_MASK +
1588 * params->port*0x14, 0xfffff.
1589 */
1590 /* This register opens the gate for the UMAC despite its name */ 1549 /* This register opens the gate for the UMAC despite its name */
1591 REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4, 1); 1550 REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4, 1);
1592 1551
@@ -1649,8 +1608,7 @@ static void bnx2x_umac_enable(struct link_params *params,
1649 val |= UMAC_COMMAND_CONFIG_REG_LOOP_ENA; 1608 val |= UMAC_COMMAND_CONFIG_REG_LOOP_ENA;
1650 REG_WR(bp, umac_base + UMAC_REG_COMMAND_CONFIG, val); 1609 REG_WR(bp, umac_base + UMAC_REG_COMMAND_CONFIG, val);
1651 1610
1652 /* 1611 /* Maximum Frame Length (RW). Defines a 14-Bit maximum frame
1653 * Maximum Frame Length (RW). Defines a 14-Bit maximum frame
1654 * length used by the MAC receive logic to check frames. 1612 * length used by the MAC receive logic to check frames.
1655 */ 1613 */
1656 REG_WR(bp, umac_base + UMAC_REG_MAXFR, 0x2710); 1614 REG_WR(bp, umac_base + UMAC_REG_MAXFR, 0x2710);
@@ -1666,8 +1624,7 @@ static void bnx2x_xmac_init(struct link_params *params, u32 max_speed)
1666 struct bnx2x *bp = params->bp; 1624 struct bnx2x *bp = params->bp;
1667 u32 is_port4mode = bnx2x_is_4_port_mode(bp); 1625 u32 is_port4mode = bnx2x_is_4_port_mode(bp);
1668 1626
1669 /* 1627 /* In 4-port mode, need to set the mode only once, so if XMAC is
1670 * In 4-port mode, need to set the mode only once, so if XMAC is
1671 * already out of reset, it means the mode has already been set, 1628 * already out of reset, it means the mode has already been set,
1672 * and it must not* reset the XMAC again, since it controls both 1629 * and it must not* reset the XMAC again, since it controls both
1673 * ports of the path 1630 * ports of the path
@@ -1691,13 +1648,13 @@ static void bnx2x_xmac_init(struct link_params *params, u32 max_speed)
1691 if (is_port4mode) { 1648 if (is_port4mode) {
1692 DP(NETIF_MSG_LINK, "Init XMAC to 2 ports x 10G per path\n"); 1649 DP(NETIF_MSG_LINK, "Init XMAC to 2 ports x 10G per path\n");
1693 1650
1694 /* Set the number of ports on the system side to up to 2 */ 1651 /* Set the number of ports on the system side to up to 2 */
1695 REG_WR(bp, MISC_REG_XMAC_CORE_PORT_MODE, 1); 1652 REG_WR(bp, MISC_REG_XMAC_CORE_PORT_MODE, 1);
1696 1653
1697 /* Set the number of ports on the Warp Core to 10G */ 1654 /* Set the number of ports on the Warp Core to 10G */
1698 REG_WR(bp, MISC_REG_XMAC_PHY_PORT_MODE, 3); 1655 REG_WR(bp, MISC_REG_XMAC_PHY_PORT_MODE, 3);
1699 } else { 1656 } else {
1700 /* Set the number of ports on the system side to 1 */ 1657 /* Set the number of ports on the system side to 1 */
1701 REG_WR(bp, MISC_REG_XMAC_CORE_PORT_MODE, 0); 1658 REG_WR(bp, MISC_REG_XMAC_CORE_PORT_MODE, 0);
1702 if (max_speed == SPEED_10000) { 1659 if (max_speed == SPEED_10000) {
1703 DP(NETIF_MSG_LINK, 1660 DP(NETIF_MSG_LINK,
@@ -1729,8 +1686,7 @@ static void bnx2x_xmac_disable(struct link_params *params)
1729 1686
1730 if (REG_RD(bp, MISC_REG_RESET_REG_2) & 1687 if (REG_RD(bp, MISC_REG_RESET_REG_2) &
1731 MISC_REGISTERS_RESET_REG_2_XMAC) { 1688 MISC_REGISTERS_RESET_REG_2_XMAC) {
1732 /* 1689 /* Send an indication to change the state in the NIG back to XON
1733 * Send an indication to change the state in the NIG back to XON
1734 * Clearing this bit enables the next set of this bit to get 1690 * Clearing this bit enables the next set of this bit to get
1735 * rising edge 1691 * rising edge
1736 */ 1692 */
@@ -1755,13 +1711,11 @@ static int bnx2x_xmac_enable(struct link_params *params,
1755 1711
1756 bnx2x_xmac_init(params, vars->line_speed); 1712 bnx2x_xmac_init(params, vars->line_speed);
1757 1713
1758 /* 1714 /* This register determines on which events the MAC will assert
1759 * This register determines on which events the MAC will assert
1760 * error on the i/f to the NIG along w/ EOP. 1715 * error on the i/f to the NIG along w/ EOP.
1761 */ 1716 */
1762 1717
1763 /* 1718 /* This register tells the NIG whether to send traffic to UMAC
1764 * This register tells the NIG whether to send traffic to UMAC
1765 * or XMAC 1719 * or XMAC
1766 */ 1720 */
1767 REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4, 0); 1721 REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4, 0);
@@ -1863,8 +1817,7 @@ static int bnx2x_emac_enable(struct link_params *params,
1863 val = REG_RD(bp, emac_base + EMAC_REG_EMAC_RX_MODE); 1817 val = REG_RD(bp, emac_base + EMAC_REG_EMAC_RX_MODE);
1864 val |= EMAC_RX_MODE_KEEP_VLAN_TAG | EMAC_RX_MODE_PROMISCUOUS; 1818 val |= EMAC_RX_MODE_KEEP_VLAN_TAG | EMAC_RX_MODE_PROMISCUOUS;
1865 1819
1866 /* 1820 /* Setting this bit causes MAC control frames (except for pause
1867 * Setting this bit causes MAC control frames (except for pause
1868 * frames) to be passed on for processing. This setting has no 1821 * frames) to be passed on for processing. This setting has no
1869 * affect on the operation of the pause frames. This bit effects 1822 * affect on the operation of the pause frames. This bit effects
1870 * all packets regardless of RX Parser packet sorting logic. 1823 * all packets regardless of RX Parser packet sorting logic.
@@ -1963,8 +1916,7 @@ static void bnx2x_update_pfc_bmac2(struct link_params *params,
1963 struct link_vars *vars, 1916 struct link_vars *vars,
1964 u8 is_lb) 1917 u8 is_lb)
1965{ 1918{
1966 /* 1919 /* Set rx control: Strip CRC and enable BigMAC to relay
1967 * Set rx control: Strip CRC and enable BigMAC to relay
1968 * control packets to the system as well 1920 * control packets to the system as well
1969 */ 1921 */
1970 u32 wb_data[2]; 1922 u32 wb_data[2];
@@ -2016,8 +1968,7 @@ static void bnx2x_update_pfc_bmac2(struct link_params *params,
2016 1968
2017 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_PFC_CONTROL, wb_data, 2); 1969 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_PFC_CONTROL, wb_data, 2);
2018 1970
2019 /* 1971 /* Set Time (based unit is 512 bit time) between automatic
2020 * Set Time (based unit is 512 bit time) between automatic
2021 * re-sending of PP packets amd enable automatic re-send of 1972 * re-sending of PP packets amd enable automatic re-send of
2022 * Per-Priroity Packet as long as pp_gen is asserted and 1973 * Per-Priroity Packet as long as pp_gen is asserted and
2023 * pp_disable is low. 1974 * pp_disable is low.
@@ -2086,7 +2037,7 @@ static int bnx2x_pfc_brb_get_config_params(
2086 config_val->default_class1.full_xon = 0; 2037 config_val->default_class1.full_xon = 0;
2087 2038
2088 if (CHIP_IS_E2(bp)) { 2039 if (CHIP_IS_E2(bp)) {
2089 /* class0 defaults */ 2040 /* Class0 defaults */
2090 config_val->default_class0.pause_xoff = 2041 config_val->default_class0.pause_xoff =
2091 DEFAULT0_E2_BRB_MAC_PAUSE_XOFF_THR; 2042 DEFAULT0_E2_BRB_MAC_PAUSE_XOFF_THR;
2092 config_val->default_class0.pause_xon = 2043 config_val->default_class0.pause_xon =
@@ -2095,7 +2046,7 @@ static int bnx2x_pfc_brb_get_config_params(
2095 DEFAULT0_E2_BRB_MAC_FULL_XOFF_THR; 2046 DEFAULT0_E2_BRB_MAC_FULL_XOFF_THR;
2096 config_val->default_class0.full_xon = 2047 config_val->default_class0.full_xon =
2097 DEFAULT0_E2_BRB_MAC_FULL_XON_THR; 2048 DEFAULT0_E2_BRB_MAC_FULL_XON_THR;
2098 /* pause able*/ 2049 /* Pause able*/
2099 config_val->pauseable_th.pause_xoff = 2050 config_val->pauseable_th.pause_xoff =
2100 PFC_E2_BRB_MAC_PAUSE_XOFF_THR_PAUSE; 2051 PFC_E2_BRB_MAC_PAUSE_XOFF_THR_PAUSE;
2101 config_val->pauseable_th.pause_xon = 2052 config_val->pauseable_th.pause_xon =
@@ -2114,7 +2065,7 @@ static int bnx2x_pfc_brb_get_config_params(
2114 config_val->non_pauseable_th.full_xon = 2065 config_val->non_pauseable_th.full_xon =
2115 PFC_E2_BRB_MAC_FULL_XON_THR_NON_PAUSE; 2066 PFC_E2_BRB_MAC_FULL_XON_THR_NON_PAUSE;
2116 } else if (CHIP_IS_E3A0(bp)) { 2067 } else if (CHIP_IS_E3A0(bp)) {
2117 /* class0 defaults */ 2068 /* Class0 defaults */
2118 config_val->default_class0.pause_xoff = 2069 config_val->default_class0.pause_xoff =
2119 DEFAULT0_E3A0_BRB_MAC_PAUSE_XOFF_THR; 2070 DEFAULT0_E3A0_BRB_MAC_PAUSE_XOFF_THR;
2120 config_val->default_class0.pause_xon = 2071 config_val->default_class0.pause_xon =
@@ -2123,7 +2074,7 @@ static int bnx2x_pfc_brb_get_config_params(
2123 DEFAULT0_E3A0_BRB_MAC_FULL_XOFF_THR; 2074 DEFAULT0_E3A0_BRB_MAC_FULL_XOFF_THR;
2124 config_val->default_class0.full_xon = 2075 config_val->default_class0.full_xon =
2125 DEFAULT0_E3A0_BRB_MAC_FULL_XON_THR; 2076 DEFAULT0_E3A0_BRB_MAC_FULL_XON_THR;
2126 /* pause able */ 2077 /* Pause able */
2127 config_val->pauseable_th.pause_xoff = 2078 config_val->pauseable_th.pause_xoff =
2128 PFC_E3A0_BRB_MAC_PAUSE_XOFF_THR_PAUSE; 2079 PFC_E3A0_BRB_MAC_PAUSE_XOFF_THR_PAUSE;
2129 config_val->pauseable_th.pause_xon = 2080 config_val->pauseable_th.pause_xon =
@@ -2142,7 +2093,7 @@ static int bnx2x_pfc_brb_get_config_params(
2142 config_val->non_pauseable_th.full_xon = 2093 config_val->non_pauseable_th.full_xon =
2143 PFC_E3A0_BRB_MAC_FULL_XON_THR_NON_PAUSE; 2094 PFC_E3A0_BRB_MAC_FULL_XON_THR_NON_PAUSE;
2144 } else if (CHIP_IS_E3B0(bp)) { 2095 } else if (CHIP_IS_E3B0(bp)) {
2145 /* class0 defaults */ 2096 /* Class0 defaults */
2146 config_val->default_class0.pause_xoff = 2097 config_val->default_class0.pause_xoff =
2147 DEFAULT0_E3B0_BRB_MAC_PAUSE_XOFF_THR; 2098 DEFAULT0_E3B0_BRB_MAC_PAUSE_XOFF_THR;
2148 config_val->default_class0.pause_xon = 2099 config_val->default_class0.pause_xon =
@@ -2305,27 +2256,23 @@ static int bnx2x_update_pfc_brb(struct link_params *params,
2305 reg_th_config = &config_val.non_pauseable_th; 2256 reg_th_config = &config_val.non_pauseable_th;
2306 } else 2257 } else
2307 reg_th_config = &config_val.default_class0; 2258 reg_th_config = &config_val.default_class0;
2308 /* 2259 /* The number of free blocks below which the pause signal to class 0
2309 * The number of free blocks below which the pause signal to class 0
2310 * of MAC #n is asserted. n=0,1 2260 * of MAC #n is asserted. n=0,1
2311 */ 2261 */
2312 REG_WR(bp, (port) ? BRB1_REG_PAUSE_0_XOFF_THRESHOLD_1 : 2262 REG_WR(bp, (port) ? BRB1_REG_PAUSE_0_XOFF_THRESHOLD_1 :
2313 BRB1_REG_PAUSE_0_XOFF_THRESHOLD_0 , 2263 BRB1_REG_PAUSE_0_XOFF_THRESHOLD_0 ,
2314 reg_th_config->pause_xoff); 2264 reg_th_config->pause_xoff);
2315 /* 2265 /* The number of free blocks above which the pause signal to class 0
2316 * The number of free blocks above which the pause signal to class 0
2317 * of MAC #n is de-asserted. n=0,1 2266 * of MAC #n is de-asserted. n=0,1
2318 */ 2267 */
2319 REG_WR(bp, (port) ? BRB1_REG_PAUSE_0_XON_THRESHOLD_1 : 2268 REG_WR(bp, (port) ? BRB1_REG_PAUSE_0_XON_THRESHOLD_1 :
2320 BRB1_REG_PAUSE_0_XON_THRESHOLD_0 , reg_th_config->pause_xon); 2269 BRB1_REG_PAUSE_0_XON_THRESHOLD_0 , reg_th_config->pause_xon);
2321 /* 2270 /* The number of free blocks below which the full signal to class 0
2322 * The number of free blocks below which the full signal to class 0
2323 * of MAC #n is asserted. n=0,1 2271 * of MAC #n is asserted. n=0,1
2324 */ 2272 */
2325 REG_WR(bp, (port) ? BRB1_REG_FULL_0_XOFF_THRESHOLD_1 : 2273 REG_WR(bp, (port) ? BRB1_REG_FULL_0_XOFF_THRESHOLD_1 :
2326 BRB1_REG_FULL_0_XOFF_THRESHOLD_0 , reg_th_config->full_xoff); 2274 BRB1_REG_FULL_0_XOFF_THRESHOLD_0 , reg_th_config->full_xoff);
2327 /* 2275 /* The number of free blocks above which the full signal to class 0
2328 * The number of free blocks above which the full signal to class 0
2329 * of MAC #n is de-asserted. n=0,1 2276 * of MAC #n is de-asserted. n=0,1
2330 */ 2277 */
2331 REG_WR(bp, (port) ? BRB1_REG_FULL_0_XON_THRESHOLD_1 : 2278 REG_WR(bp, (port) ? BRB1_REG_FULL_0_XON_THRESHOLD_1 :
@@ -2339,30 +2286,26 @@ static int bnx2x_update_pfc_brb(struct link_params *params,
2339 reg_th_config = &config_val.non_pauseable_th; 2286 reg_th_config = &config_val.non_pauseable_th;
2340 } else 2287 } else
2341 reg_th_config = &config_val.default_class1; 2288 reg_th_config = &config_val.default_class1;
2342 /* 2289 /* The number of free blocks below which the pause signal to
2343 * The number of free blocks below which the pause signal to
2344 * class 1 of MAC #n is asserted. n=0,1 2290 * class 1 of MAC #n is asserted. n=0,1
2345 */ 2291 */
2346 REG_WR(bp, (port) ? BRB1_REG_PAUSE_1_XOFF_THRESHOLD_1 : 2292 REG_WR(bp, (port) ? BRB1_REG_PAUSE_1_XOFF_THRESHOLD_1 :
2347 BRB1_REG_PAUSE_1_XOFF_THRESHOLD_0, 2293 BRB1_REG_PAUSE_1_XOFF_THRESHOLD_0,
2348 reg_th_config->pause_xoff); 2294 reg_th_config->pause_xoff);
2349 2295
2350 /* 2296 /* The number of free blocks above which the pause signal to
2351 * The number of free blocks above which the pause signal to
2352 * class 1 of MAC #n is de-asserted. n=0,1 2297 * class 1 of MAC #n is de-asserted. n=0,1
2353 */ 2298 */
2354 REG_WR(bp, (port) ? BRB1_REG_PAUSE_1_XON_THRESHOLD_1 : 2299 REG_WR(bp, (port) ? BRB1_REG_PAUSE_1_XON_THRESHOLD_1 :
2355 BRB1_REG_PAUSE_1_XON_THRESHOLD_0, 2300 BRB1_REG_PAUSE_1_XON_THRESHOLD_0,
2356 reg_th_config->pause_xon); 2301 reg_th_config->pause_xon);
2357 /* 2302 /* The number of free blocks below which the full signal to
2358 * The number of free blocks below which the full signal to
2359 * class 1 of MAC #n is asserted. n=0,1 2303 * class 1 of MAC #n is asserted. n=0,1
2360 */ 2304 */
2361 REG_WR(bp, (port) ? BRB1_REG_FULL_1_XOFF_THRESHOLD_1 : 2305 REG_WR(bp, (port) ? BRB1_REG_FULL_1_XOFF_THRESHOLD_1 :
2362 BRB1_REG_FULL_1_XOFF_THRESHOLD_0, 2306 BRB1_REG_FULL_1_XOFF_THRESHOLD_0,
2363 reg_th_config->full_xoff); 2307 reg_th_config->full_xoff);
2364 /* 2308 /* The number of free blocks above which the full signal to
2365 * The number of free blocks above which the full signal to
2366 * class 1 of MAC #n is de-asserted. n=0,1 2309 * class 1 of MAC #n is de-asserted. n=0,1
2367 */ 2310 */
2368 REG_WR(bp, (port) ? BRB1_REG_FULL_1_XON_THRESHOLD_1 : 2311 REG_WR(bp, (port) ? BRB1_REG_FULL_1_XON_THRESHOLD_1 :
@@ -2379,49 +2322,41 @@ static int bnx2x_update_pfc_brb(struct link_params *params,
2379 REG_WR(bp, BRB1_REG_PER_CLASS_GUARANTY_MODE, 2322 REG_WR(bp, BRB1_REG_PER_CLASS_GUARANTY_MODE,
2380 e3b0_val.per_class_guaranty_mode); 2323 e3b0_val.per_class_guaranty_mode);
2381 2324
2382 /* 2325 /* The hysteresis on the guarantied buffer space for the Lb
2383 * The hysteresis on the guarantied buffer space for the Lb
2384 * port before signaling XON. 2326 * port before signaling XON.
2385 */ 2327 */
2386 REG_WR(bp, BRB1_REG_LB_GUARANTIED_HYST, 2328 REG_WR(bp, BRB1_REG_LB_GUARANTIED_HYST,
2387 e3b0_val.lb_guarantied_hyst); 2329 e3b0_val.lb_guarantied_hyst);
2388 2330
2389 /* 2331 /* The number of free blocks below which the full signal to the
2390 * The number of free blocks below which the full signal to the
2391 * LB port is asserted. 2332 * LB port is asserted.
2392 */ 2333 */
2393 REG_WR(bp, BRB1_REG_FULL_LB_XOFF_THRESHOLD, 2334 REG_WR(bp, BRB1_REG_FULL_LB_XOFF_THRESHOLD,
2394 e3b0_val.full_lb_xoff_th); 2335 e3b0_val.full_lb_xoff_th);
2395 /* 2336 /* The number of free blocks above which the full signal to the
2396 * The number of free blocks above which the full signal to the
2397 * LB port is de-asserted. 2337 * LB port is de-asserted.
2398 */ 2338 */
2399 REG_WR(bp, BRB1_REG_FULL_LB_XON_THRESHOLD, 2339 REG_WR(bp, BRB1_REG_FULL_LB_XON_THRESHOLD,
2400 e3b0_val.full_lb_xon_threshold); 2340 e3b0_val.full_lb_xon_threshold);
2401 /* 2341 /* The number of blocks guarantied for the MAC #n port. n=0,1
2402 * The number of blocks guarantied for the MAC #n port. n=0,1
2403 */ 2342 */
2404 2343
2405 /* The number of blocks guarantied for the LB port.*/ 2344 /* The number of blocks guarantied for the LB port. */
2406 REG_WR(bp, BRB1_REG_LB_GUARANTIED, 2345 REG_WR(bp, BRB1_REG_LB_GUARANTIED,
2407 e3b0_val.lb_guarantied); 2346 e3b0_val.lb_guarantied);
2408 2347
2409 /* 2348 /* The number of blocks guarantied for the MAC #n port. */
2410 * The number of blocks guarantied for the MAC #n port.
2411 */
2412 REG_WR(bp, BRB1_REG_MAC_GUARANTIED_0, 2349 REG_WR(bp, BRB1_REG_MAC_GUARANTIED_0,
2413 2 * e3b0_val.mac_0_class_t_guarantied); 2350 2 * e3b0_val.mac_0_class_t_guarantied);
2414 REG_WR(bp, BRB1_REG_MAC_GUARANTIED_1, 2351 REG_WR(bp, BRB1_REG_MAC_GUARANTIED_1,
2415 2 * e3b0_val.mac_1_class_t_guarantied); 2352 2 * e3b0_val.mac_1_class_t_guarantied);
2416 /* 2353 /* The number of blocks guarantied for class #t in MAC0. t=0,1
2417 * The number of blocks guarantied for class #t in MAC0. t=0,1
2418 */ 2354 */
2419 REG_WR(bp, BRB1_REG_MAC_0_CLASS_0_GUARANTIED, 2355 REG_WR(bp, BRB1_REG_MAC_0_CLASS_0_GUARANTIED,
2420 e3b0_val.mac_0_class_t_guarantied); 2356 e3b0_val.mac_0_class_t_guarantied);
2421 REG_WR(bp, BRB1_REG_MAC_0_CLASS_1_GUARANTIED, 2357 REG_WR(bp, BRB1_REG_MAC_0_CLASS_1_GUARANTIED,
2422 e3b0_val.mac_0_class_t_guarantied); 2358 e3b0_val.mac_0_class_t_guarantied);
2423 /* 2359 /* The hysteresis on the guarantied buffer space for class in
2424 * The hysteresis on the guarantied buffer space for class in
2425 * MAC0. t=0,1 2360 * MAC0. t=0,1
2426 */ 2361 */
2427 REG_WR(bp, BRB1_REG_MAC_0_CLASS_0_GUARANTIED_HYST, 2362 REG_WR(bp, BRB1_REG_MAC_0_CLASS_0_GUARANTIED_HYST,
@@ -2429,15 +2364,13 @@ static int bnx2x_update_pfc_brb(struct link_params *params,
2429 REG_WR(bp, BRB1_REG_MAC_0_CLASS_1_GUARANTIED_HYST, 2364 REG_WR(bp, BRB1_REG_MAC_0_CLASS_1_GUARANTIED_HYST,
2430 e3b0_val.mac_0_class_t_guarantied_hyst); 2365 e3b0_val.mac_0_class_t_guarantied_hyst);
2431 2366
2432 /* 2367 /* The number of blocks guarantied for class #t in MAC1.t=0,1
2433 * The number of blocks guarantied for class #t in MAC1.t=0,1
2434 */ 2368 */
2435 REG_WR(bp, BRB1_REG_MAC_1_CLASS_0_GUARANTIED, 2369 REG_WR(bp, BRB1_REG_MAC_1_CLASS_0_GUARANTIED,
2436 e3b0_val.mac_1_class_t_guarantied); 2370 e3b0_val.mac_1_class_t_guarantied);
2437 REG_WR(bp, BRB1_REG_MAC_1_CLASS_1_GUARANTIED, 2371 REG_WR(bp, BRB1_REG_MAC_1_CLASS_1_GUARANTIED,
2438 e3b0_val.mac_1_class_t_guarantied); 2372 e3b0_val.mac_1_class_t_guarantied);
2439 /* 2373 /* The hysteresis on the guarantied buffer space for class #t
2440 * The hysteresis on the guarantied buffer space for class #t
2441 * in MAC1. t=0,1 2374 * in MAC1. t=0,1
2442 */ 2375 */
2443 REG_WR(bp, BRB1_REG_MAC_1_CLASS_0_GUARANTIED_HYST, 2376 REG_WR(bp, BRB1_REG_MAC_1_CLASS_0_GUARANTIED_HYST,
@@ -2520,15 +2453,13 @@ static void bnx2x_update_pfc_nig(struct link_params *params,
2520 FEATURE_CONFIG_PFC_ENABLED; 2453 FEATURE_CONFIG_PFC_ENABLED;
2521 DP(NETIF_MSG_LINK, "updating pfc nig parameters\n"); 2454 DP(NETIF_MSG_LINK, "updating pfc nig parameters\n");
2522 2455
2523 /* 2456 /* When NIG_LLH0_XCM_MASK_REG_LLHX_XCM_MASK_BCN bit is set
2524 * When NIG_LLH0_XCM_MASK_REG_LLHX_XCM_MASK_BCN bit is set
2525 * MAC control frames (that are not pause packets) 2457 * MAC control frames (that are not pause packets)
2526 * will be forwarded to the XCM. 2458 * will be forwarded to the XCM.
2527 */ 2459 */
2528 xcm_mask = REG_RD(bp, port ? NIG_REG_LLH1_XCM_MASK : 2460 xcm_mask = REG_RD(bp, port ? NIG_REG_LLH1_XCM_MASK :
2529 NIG_REG_LLH0_XCM_MASK); 2461 NIG_REG_LLH0_XCM_MASK);
2530 /* 2462 /* NIG params will override non PFC params, since it's possible to
2531 * nig params will override non PFC params, since it's possible to
2532 * do transition from PFC to SAFC 2463 * do transition from PFC to SAFC
2533 */ 2464 */
2534 if (set_pfc) { 2465 if (set_pfc) {
@@ -2548,7 +2479,7 @@ static void bnx2x_update_pfc_nig(struct link_params *params,
2548 llfc_out_en = nig_params->llfc_out_en; 2479 llfc_out_en = nig_params->llfc_out_en;
2549 llfc_enable = nig_params->llfc_enable; 2480 llfc_enable = nig_params->llfc_enable;
2550 pause_enable = nig_params->pause_enable; 2481 pause_enable = nig_params->pause_enable;
2551 } else /*defaul non PFC mode - PAUSE */ 2482 } else /* Default non PFC mode - PAUSE */
2552 pause_enable = 1; 2483 pause_enable = 1;
2553 2484
2554 xcm_mask |= (port ? NIG_LLH1_XCM_MASK_REG_LLH1_XCM_MASK_BCN : 2485 xcm_mask |= (port ? NIG_LLH1_XCM_MASK_REG_LLH1_XCM_MASK_BCN :
@@ -2608,8 +2539,7 @@ int bnx2x_update_pfc(struct link_params *params,
2608 struct link_vars *vars, 2539 struct link_vars *vars,
2609 struct bnx2x_nig_brb_pfc_port_params *pfc_params) 2540 struct bnx2x_nig_brb_pfc_port_params *pfc_params)
2610{ 2541{
2611 /* 2542 /* The PFC and pause are orthogonal to one another, meaning when
2612 * The PFC and pause are orthogonal to one another, meaning when
2613 * PFC is enabled, the pause are disabled, and when PFC is 2543 * PFC is enabled, the pause are disabled, and when PFC is
2614 * disabled, pause are set according to the pause result. 2544 * disabled, pause are set according to the pause result.
2615 */ 2545 */
@@ -3148,7 +3078,6 @@ static int bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy,
3148 EMAC_MDIO_STATUS_10MB); 3078 EMAC_MDIO_STATUS_10MB);
3149 3079
3150 /* address */ 3080 /* address */
3151
3152 tmp = ((phy->addr << 21) | (devad << 16) | reg | 3081 tmp = ((phy->addr << 21) | (devad << 16) | reg |
3153 EMAC_MDIO_COMM_COMMAND_ADDRESS | 3082 EMAC_MDIO_COMM_COMMAND_ADDRESS |
3154 EMAC_MDIO_COMM_START_BUSY); 3083 EMAC_MDIO_COMM_START_BUSY);
@@ -3337,8 +3266,7 @@ int bnx2x_phy_read(struct link_params *params, u8 phy_addr,
3337 u8 devad, u16 reg, u16 *ret_val) 3266 u8 devad, u16 reg, u16 *ret_val)
3338{ 3267{
3339 u8 phy_index; 3268 u8 phy_index;
3340 /* 3269 /* Probe for the phy according to the given phy_addr, and execute
3341 * Probe for the phy according to the given phy_addr, and execute
3342 * the read request on it 3270 * the read request on it
3343 */ 3271 */
3344 for (phy_index = 0; phy_index < params->num_phys; phy_index++) { 3272 for (phy_index = 0; phy_index < params->num_phys; phy_index++) {
@@ -3355,8 +3283,7 @@ int bnx2x_phy_write(struct link_params *params, u8 phy_addr,
3355 u8 devad, u16 reg, u16 val) 3283 u8 devad, u16 reg, u16 val)
3356{ 3284{
3357 u8 phy_index; 3285 u8 phy_index;
3358 /* 3286 /* Probe for the phy according to the given phy_addr, and execute
3359 * Probe for the phy according to the given phy_addr, and execute
3360 * the write request on it 3287 * the write request on it
3361 */ 3288 */
3362 for (phy_index = 0; phy_index < params->num_phys; phy_index++) { 3289 for (phy_index = 0; phy_index < params->num_phys; phy_index++) {
@@ -3382,7 +3309,7 @@ static u8 bnx2x_get_warpcore_lane(struct bnx2x_phy *phy,
3382 if (bnx2x_is_4_port_mode(bp)) { 3309 if (bnx2x_is_4_port_mode(bp)) {
3383 u32 port_swap, port_swap_ovr; 3310 u32 port_swap, port_swap_ovr;
3384 3311
3385 /*figure out path swap value */ 3312 /* Figure out path swap value */
3386 path_swap_ovr = REG_RD(bp, MISC_REG_FOUR_PORT_PATH_SWAP_OVWR); 3313 path_swap_ovr = REG_RD(bp, MISC_REG_FOUR_PORT_PATH_SWAP_OVWR);
3387 if (path_swap_ovr & 0x1) 3314 if (path_swap_ovr & 0x1)
3388 path_swap = (path_swap_ovr & 0x2); 3315 path_swap = (path_swap_ovr & 0x2);
@@ -3392,7 +3319,7 @@ static u8 bnx2x_get_warpcore_lane(struct bnx2x_phy *phy,
3392 if (path_swap) 3319 if (path_swap)
3393 path = path ^ 1; 3320 path = path ^ 1;
3394 3321
3395 /*figure out port swap value */ 3322 /* Figure out port swap value */
3396 port_swap_ovr = REG_RD(bp, MISC_REG_FOUR_PORT_PORT_SWAP_OVWR); 3323 port_swap_ovr = REG_RD(bp, MISC_REG_FOUR_PORT_PORT_SWAP_OVWR);
3397 if (port_swap_ovr & 0x1) 3324 if (port_swap_ovr & 0x1)
3398 port_swap = (port_swap_ovr & 0x2); 3325 port_swap = (port_swap_ovr & 0x2);
@@ -3405,7 +3332,7 @@ static u8 bnx2x_get_warpcore_lane(struct bnx2x_phy *phy,
3405 lane = (port<<1) + path; 3332 lane = (port<<1) + path;
3406 } else { /* two port mode - no port swap */ 3333 } else { /* two port mode - no port swap */
3407 3334
3408 /*figure out path swap value */ 3335 /* Figure out path swap value */
3409 path_swap_ovr = 3336 path_swap_ovr =
3410 REG_RD(bp, MISC_REG_TWO_PORT_PATH_SWAP_OVWR); 3337 REG_RD(bp, MISC_REG_TWO_PORT_PATH_SWAP_OVWR);
3411 if (path_swap_ovr & 0x1) { 3338 if (path_swap_ovr & 0x1) {
@@ -3437,8 +3364,7 @@ static void bnx2x_set_aer_mmd(struct link_params *params,
3437 3364
3438 if (USES_WARPCORE(bp)) { 3365 if (USES_WARPCORE(bp)) {
3439 aer_val = bnx2x_get_warpcore_lane(phy, params); 3366 aer_val = bnx2x_get_warpcore_lane(phy, params);
3440 /* 3367 /* In Dual-lane mode, two lanes are joined together,
3441 * In Dual-lane mode, two lanes are joined together,
3442 * so in order to configure them, the AER broadcast method is 3368 * so in order to configure them, the AER broadcast method is
3443 * used here. 3369 * used here.
3444 * 0x200 is the broadcast address for lanes 0,1 3370 * 0x200 is the broadcast address for lanes 0,1
@@ -3518,8 +3444,7 @@ static void bnx2x_calc_ieee_aneg_adv(struct bnx2x_phy *phy,
3518{ 3444{
3519 struct bnx2x *bp = params->bp; 3445 struct bnx2x *bp = params->bp;
3520 *ieee_fc = MDIO_COMBO_IEEE0_AUTO_NEG_ADV_FULL_DUPLEX; 3446 *ieee_fc = MDIO_COMBO_IEEE0_AUTO_NEG_ADV_FULL_DUPLEX;
3521 /** 3447 /* Resolve pause mode and advertisement Please refer to Table
3522 * resolve pause mode and advertisement Please refer to Table
3523 * 28B-3 of the 802.3ab-1999 spec 3448 * 28B-3 of the 802.3ab-1999 spec
3524 */ 3449 */
3525 3450
@@ -3642,6 +3567,7 @@ static void bnx2x_pause_resolve(struct link_vars *vars, u32 pause_result)
3642 vars->link_status |= LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE; 3567 vars->link_status |= LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE;
3643 if (pause_result & (1<<1)) 3568 if (pause_result & (1<<1))
3644 vars->link_status |= LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE; 3569 vars->link_status |= LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE;
3570
3645} 3571}
3646 3572
3647static void bnx2x_ext_phy_update_adv_fc(struct bnx2x_phy *phy, 3573static void bnx2x_ext_phy_update_adv_fc(struct bnx2x_phy *phy,
@@ -3698,6 +3624,7 @@ static void bnx2x_ext_phy_update_adv_fc(struct bnx2x_phy *phy,
3698 bnx2x_pause_resolve(vars, pause_result); 3624 bnx2x_pause_resolve(vars, pause_result);
3699 3625
3700} 3626}
3627
3701static u8 bnx2x_ext_phy_resolve_fc(struct bnx2x_phy *phy, 3628static u8 bnx2x_ext_phy_resolve_fc(struct bnx2x_phy *phy,
3702 struct link_params *params, 3629 struct link_params *params,
3703 struct link_vars *vars) 3630 struct link_vars *vars)
@@ -3819,9 +3746,7 @@ static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy,
3819 3746
3820 /* Advertise pause */ 3747 /* Advertise pause */
3821 bnx2x_ext_phy_set_pause(params, phy, vars); 3748 bnx2x_ext_phy_set_pause(params, phy, vars);
3822 3749 /* Set KR Autoneg Work-Around flag for Warpcore version older than D108
3823 /*
3824 * Set KR Autoneg Work-Around flag for Warpcore version older than D108
3825 */ 3750 */
3826 bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, 3751 bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD,
3827 MDIO_WC_REG_UC_INFO_B1_VERSION, &val16); 3752 MDIO_WC_REG_UC_INFO_B1_VERSION, &val16);
@@ -3829,7 +3754,6 @@ static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy,
3829 DP(NETIF_MSG_LINK, "Enable AN KR work-around\n"); 3754 DP(NETIF_MSG_LINK, "Enable AN KR work-around\n");
3830 vars->rx_tx_asic_rst = MAX_KR_LINK_RETRY; 3755 vars->rx_tx_asic_rst = MAX_KR_LINK_RETRY;
3831 } 3756 }
3832
3833 bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, 3757 bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD,
3834 MDIO_WC_REG_DIGITAL5_MISC7, &val16); 3758 MDIO_WC_REG_DIGITAL5_MISC7, &val16);
3835 3759
@@ -3903,7 +3827,7 @@ static void bnx2x_warpcore_set_10G_KR(struct bnx2x_phy *phy,
3903 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 3827 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD,
3904 MDIO_WC_REG_IEEE0BLK_AUTONEGNP, 0xB); 3828 MDIO_WC_REG_IEEE0BLK_AUTONEGNP, 0xB);
3905 3829
3906 /*Enable encoded forced speed */ 3830 /* Enable encoded forced speed */
3907 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, 3831 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD,
3908 MDIO_WC_REG_SERDESDIGITAL_MISC2, 0x30); 3832 MDIO_WC_REG_SERDESDIGITAL_MISC2, 0x30);
3909 3833
@@ -4265,8 +4189,7 @@ static int bnx2x_get_mod_abs_int_cfg(struct bnx2x *bp,
4265 PORT_HW_CFG_E3_MOD_ABS_MASK) >> 4189 PORT_HW_CFG_E3_MOD_ABS_MASK) >>
4266 PORT_HW_CFG_E3_MOD_ABS_SHIFT; 4190 PORT_HW_CFG_E3_MOD_ABS_SHIFT;
4267 4191
4268 /* 4192 /* Should not happen. This function called upon interrupt
4269 * Should not happen. This function called upon interrupt
4270 * triggered by GPIO ( since EPIO can only generate interrupts 4193 * triggered by GPIO ( since EPIO can only generate interrupts
4271 * to MCP). 4194 * to MCP).
4272 * So if this function was called and none of the GPIOs was set, 4195 * So if this function was called and none of the GPIOs was set,
@@ -4366,7 +4289,7 @@ static void bnx2x_warpcore_config_runtime(struct bnx2x_phy *phy,
4366 "link up, rx_tx_asic_rst 0x%x\n", 4289 "link up, rx_tx_asic_rst 0x%x\n",
4367 vars->rx_tx_asic_rst); 4290 vars->rx_tx_asic_rst);
4368 } else { 4291 } else {
4369 /*reset the lane to see if link comes up.*/ 4292 /* Reset the lane to see if link comes up.*/
4370 bnx2x_warpcore_reset_lane(bp, phy, 1); 4293 bnx2x_warpcore_reset_lane(bp, phy, 1);
4371 bnx2x_warpcore_reset_lane(bp, phy, 0); 4294 bnx2x_warpcore_reset_lane(bp, phy, 0);
4372 4295
@@ -4387,7 +4310,6 @@ static void bnx2x_warpcore_config_runtime(struct bnx2x_phy *phy,
4387 } /*params->rx_tx_asic_rst*/ 4310 } /*params->rx_tx_asic_rst*/
4388 4311
4389} 4312}
4390
4391static void bnx2x_warpcore_config_init(struct bnx2x_phy *phy, 4313static void bnx2x_warpcore_config_init(struct bnx2x_phy *phy,
4392 struct link_params *params, 4314 struct link_params *params,
4393 struct link_vars *vars) 4315 struct link_vars *vars)
@@ -4545,7 +4467,7 @@ static void bnx2x_warpcore_link_reset(struct bnx2x_phy *phy,
4545 /* Update those 1-copy registers */ 4467 /* Update those 1-copy registers */
4546 CL22_WR_OVER_CL45(bp, phy, MDIO_REG_BANK_AER_BLOCK, 4468 CL22_WR_OVER_CL45(bp, phy, MDIO_REG_BANK_AER_BLOCK,
4547 MDIO_AER_BLOCK_AER_REG, 0); 4469 MDIO_AER_BLOCK_AER_REG, 0);
4548 /* Enable 1G MDIO (1-copy) */ 4470 /* Enable 1G MDIO (1-copy) */
4549 bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, 4471 bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD,
4550 MDIO_WC_REG_XGXSBLK0_XGXSCONTROL, 4472 MDIO_WC_REG_XGXSBLK0_XGXSCONTROL,
4551 &val16); 4473 &val16);
@@ -4624,43 +4546,43 @@ void bnx2x_sync_link(struct link_params *params,
4624 vars->duplex = DUPLEX_FULL; 4546 vars->duplex = DUPLEX_FULL;
4625 switch (vars->link_status & 4547 switch (vars->link_status &
4626 LINK_STATUS_SPEED_AND_DUPLEX_MASK) { 4548 LINK_STATUS_SPEED_AND_DUPLEX_MASK) {
4627 case LINK_10THD: 4549 case LINK_10THD:
4628 vars->duplex = DUPLEX_HALF; 4550 vars->duplex = DUPLEX_HALF;
4629 /* fall thru */ 4551 /* Fall thru */
4630 case LINK_10TFD: 4552 case LINK_10TFD:
4631 vars->line_speed = SPEED_10; 4553 vars->line_speed = SPEED_10;
4632 break; 4554 break;
4633 4555
4634 case LINK_100TXHD: 4556 case LINK_100TXHD:
4635 vars->duplex = DUPLEX_HALF; 4557 vars->duplex = DUPLEX_HALF;
4636 /* fall thru */ 4558 /* Fall thru */
4637 case LINK_100T4: 4559 case LINK_100T4:
4638 case LINK_100TXFD: 4560 case LINK_100TXFD:
4639 vars->line_speed = SPEED_100; 4561 vars->line_speed = SPEED_100;
4640 break; 4562 break;
4641 4563
4642 case LINK_1000THD: 4564 case LINK_1000THD:
4643 vars->duplex = DUPLEX_HALF; 4565 vars->duplex = DUPLEX_HALF;
4644 /* fall thru */ 4566 /* Fall thru */
4645 case LINK_1000TFD: 4567 case LINK_1000TFD:
4646 vars->line_speed = SPEED_1000; 4568 vars->line_speed = SPEED_1000;
4647 break; 4569 break;
4648 4570
4649 case LINK_2500THD: 4571 case LINK_2500THD:
4650 vars->duplex = DUPLEX_HALF; 4572 vars->duplex = DUPLEX_HALF;
4651 /* fall thru */ 4573 /* Fall thru */
4652 case LINK_2500TFD: 4574 case LINK_2500TFD:
4653 vars->line_speed = SPEED_2500; 4575 vars->line_speed = SPEED_2500;
4654 break; 4576 break;
4655 4577
4656 case LINK_10GTFD: 4578 case LINK_10GTFD:
4657 vars->line_speed = SPEED_10000; 4579 vars->line_speed = SPEED_10000;
4658 break; 4580 break;
4659 case LINK_20GTFD: 4581 case LINK_20GTFD:
4660 vars->line_speed = SPEED_20000; 4582 vars->line_speed = SPEED_20000;
4661 break; 4583 break;
4662 default: 4584 default:
4663 break; 4585 break;
4664 } 4586 }
4665 vars->flow_ctrl = 0; 4587 vars->flow_ctrl = 0;
4666 if (vars->link_status & LINK_STATUS_TX_FLOW_CONTROL_ENABLED) 4588 if (vars->link_status & LINK_STATUS_TX_FLOW_CONTROL_ENABLED)
@@ -4835,9 +4757,8 @@ static void bnx2x_set_swap_lanes(struct link_params *params,
4835 struct bnx2x_phy *phy) 4757 struct bnx2x_phy *phy)
4836{ 4758{
4837 struct bnx2x *bp = params->bp; 4759 struct bnx2x *bp = params->bp;
4838 /* 4760 /* Each two bits represents a lane number:
4839 * Each two bits represents a lane number: 4761 * No swap is 0123 => 0x1b no need to enable the swap
4840 * No swap is 0123 => 0x1b no need to enable the swap
4841 */ 4762 */
4842 u16 rx_lane_swap, tx_lane_swap; 4763 u16 rx_lane_swap, tx_lane_swap;
4843 4764
@@ -5051,8 +4972,7 @@ static void bnx2x_program_serdes(struct bnx2x_phy *phy,
5051 MDIO_REG_BANK_COMBO_IEEE0, 4972 MDIO_REG_BANK_COMBO_IEEE0,
5052 MDIO_COMBO_IEEE0_MII_CONTROL, reg_val); 4973 MDIO_COMBO_IEEE0_MII_CONTROL, reg_val);
5053 4974
5054 /* 4975 /* Program speed
5055 * program speed
5056 * - needed only if the speed is greater than 1G (2.5G or 10G) 4976 * - needed only if the speed is greater than 1G (2.5G or 10G)
5057 */ 4977 */
5058 CL22_RD_OVER_CL45(bp, phy, 4978 CL22_RD_OVER_CL45(bp, phy,
@@ -5087,8 +5007,6 @@ static void bnx2x_set_brcm_cl37_advertisement(struct bnx2x_phy *phy,
5087 struct bnx2x *bp = params->bp; 5007 struct bnx2x *bp = params->bp;
5088 u16 val = 0; 5008 u16 val = 0;
5089 5009
5090 /* configure the 48 bits for BAM AN */
5091
5092 /* set extended capabilities */ 5010 /* set extended capabilities */
5093 if (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_2_5G) 5011 if (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_2_5G)
5094 val |= MDIO_OVER_1G_UP1_2_5G; 5012 val |= MDIO_OVER_1G_UP1_2_5G;
@@ -5234,11 +5152,8 @@ static void bnx2x_initialize_sgmii_process(struct bnx2x_phy *phy,
5234 } 5152 }
5235} 5153}
5236 5154
5237 5155/* Link management
5238/*
5239 * link management
5240 */ 5156 */
5241
5242static int bnx2x_direct_parallel_detect_used(struct bnx2x_phy *phy, 5157static int bnx2x_direct_parallel_detect_used(struct bnx2x_phy *phy,
5243 struct link_params *params) 5158 struct link_params *params)
5244{ 5159{
@@ -5383,8 +5298,7 @@ static void bnx2x_check_fallback_to_cl37(struct bnx2x_phy *phy,
5383 "ustat_val(0x8371) = 0x%x\n", ustat_val); 5298 "ustat_val(0x8371) = 0x%x\n", ustat_val);
5384 return; 5299 return;
5385 } 5300 }
5386 /* 5301 /* Step 3: Check CL37 Message Pages received to indicate LP
5387 * Step 3: Check CL37 Message Pages received to indicate LP
5388 * supports only CL37 5302 * supports only CL37
5389 */ 5303 */
5390 CL22_RD_OVER_CL45(bp, phy, 5304 CL22_RD_OVER_CL45(bp, phy,
@@ -5401,8 +5315,7 @@ static void bnx2x_check_fallback_to_cl37(struct bnx2x_phy *phy,
5401 cl37_fsm_received); 5315 cl37_fsm_received);
5402 return; 5316 return;
5403 } 5317 }
5404 /* 5318 /* The combined cl37/cl73 fsm state information indicating that
5405 * The combined cl37/cl73 fsm state information indicating that
5406 * we are connected to a device which does not support cl73, but 5319 * we are connected to a device which does not support cl73, but
5407 * does support cl37 BAM. In this case we disable cl73 and 5320 * does support cl37 BAM. In this case we disable cl73 and
5408 * restart cl37 auto-neg 5321 * restart cl37 auto-neg
@@ -5973,8 +5886,7 @@ static void bnx2x_rearm_latch_signal(struct bnx2x *bp, u8 port,
5973{ 5886{
5974 u32 latch_status = 0; 5887 u32 latch_status = 0;
5975 5888
5976 /* 5889 /* Disable the MI INT ( external phy int ) by writing 1 to the
5977 * Disable the MI INT ( external phy int ) by writing 1 to the
5978 * status register. Link down indication is high-active-signal, 5890 * status register. Link down indication is high-active-signal,
5979 * so in this case we need to write the status to clear the XOR 5891 * so in this case we need to write the status to clear the XOR
5980 */ 5892 */
@@ -6009,8 +5921,7 @@ static void bnx2x_link_int_ack(struct link_params *params,
6009 struct bnx2x *bp = params->bp; 5921 struct bnx2x *bp = params->bp;
6010 u8 port = params->port; 5922 u8 port = params->port;
6011 u32 mask; 5923 u32 mask;
6012 /* 5924 /* First reset all status we assume only one line will be
6013 * First reset all status we assume only one line will be
6014 * change at a time 5925 * change at a time
6015 */ 5926 */
6016 bnx2x_bits_dis(bp, NIG_REG_STATUS_INTERRUPT_PORT0 + port*4, 5927 bnx2x_bits_dis(bp, NIG_REG_STATUS_INTERRUPT_PORT0 + port*4,
@@ -6024,8 +5935,7 @@ static void bnx2x_link_int_ack(struct link_params *params,
6024 if (is_10g_plus) 5935 if (is_10g_plus)
6025 mask = NIG_STATUS_XGXS0_LINK10G; 5936 mask = NIG_STATUS_XGXS0_LINK10G;
6026 else if (params->switch_cfg == SWITCH_CFG_10G) { 5937 else if (params->switch_cfg == SWITCH_CFG_10G) {
6027 /* 5938 /* Disable the link interrupt by writing 1 to
6028 * Disable the link interrupt by writing 1 to
6029 * the relevant lane in the status register 5939 * the relevant lane in the status register
6030 */ 5940 */
6031 u32 ser_lane = 5941 u32 ser_lane =
@@ -6227,8 +6137,7 @@ int bnx2x_set_led(struct link_params *params,
6227 break; 6137 break;
6228 6138
6229 case LED_MODE_OPER: 6139 case LED_MODE_OPER:
6230 /* 6140 /* For all other phys, OPER mode is same as ON, so in case
6231 * For all other phys, OPER mode is same as ON, so in case
6232 * link is down, do nothing 6141 * link is down, do nothing
6233 */ 6142 */
6234 if (!vars->link_up) 6143 if (!vars->link_up)
@@ -6239,9 +6148,7 @@ int bnx2x_set_led(struct link_params *params,
6239 (params->phy[EXT_PHY1].type == 6148 (params->phy[EXT_PHY1].type ==
6240 PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8722)) && 6149 PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8722)) &&
6241 CHIP_IS_E2(bp) && params->num_phys == 2) { 6150 CHIP_IS_E2(bp) && params->num_phys == 2) {
6242 /* 6151 /* This is a work-around for E2+8727 Configurations */
6243 * This is a work-around for E2+8727 Configurations
6244 */
6245 if (mode == LED_MODE_ON || 6152 if (mode == LED_MODE_ON ||
6246 speed == SPEED_10000){ 6153 speed == SPEED_10000){
6247 REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4, 0); 6154 REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4, 0);
@@ -6250,8 +6157,7 @@ int bnx2x_set_led(struct link_params *params,
6250 tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED); 6157 tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED);
6251 EMAC_WR(bp, EMAC_REG_EMAC_LED, 6158 EMAC_WR(bp, EMAC_REG_EMAC_LED,
6252 (tmp | EMAC_LED_OVERRIDE)); 6159 (tmp | EMAC_LED_OVERRIDE));
6253 /* 6160 /* Return here without enabling traffic
6254 * return here without enabling traffic
6255 * LED blink and setting rate in ON mode. 6161 * LED blink and setting rate in ON mode.
6256 * In oper mode, enabling LED blink 6162 * In oper mode, enabling LED blink
6257 * and setting rate is needed. 6163 * and setting rate is needed.
@@ -6260,8 +6166,7 @@ int bnx2x_set_led(struct link_params *params,
6260 return rc; 6166 return rc;
6261 } 6167 }
6262 } else if (SINGLE_MEDIA_DIRECT(params)) { 6168 } else if (SINGLE_MEDIA_DIRECT(params)) {
6263 /* 6169 /* This is a work-around for HW issue found when link
6264 * This is a work-around for HW issue found when link
6265 * is up in CL73 6170 * is up in CL73
6266 */ 6171 */
6267 if ((!CHIP_IS_E3(bp)) || 6172 if ((!CHIP_IS_E3(bp)) ||
@@ -6310,10 +6215,7 @@ int bnx2x_set_led(struct link_params *params,
6310 (speed == SPEED_1000) || 6215 (speed == SPEED_1000) ||
6311 (speed == SPEED_100) || 6216 (speed == SPEED_100) ||
6312 (speed == SPEED_10))) { 6217 (speed == SPEED_10))) {
6313 /* 6218 /* For speeds less than 10G LED scheme is different */
6314 * On Everest 1 Ax chip versions for speeds less than
6315 * 10G LED scheme is different
6316 */
6317 REG_WR(bp, NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0 6219 REG_WR(bp, NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0
6318 + port*4, 1); 6220 + port*4, 1);
6319 REG_WR(bp, NIG_REG_LED_CONTROL_TRAFFIC_P0 + 6221 REG_WR(bp, NIG_REG_LED_CONTROL_TRAFFIC_P0 +
@@ -6333,8 +6235,7 @@ int bnx2x_set_led(struct link_params *params,
6333 6235
6334} 6236}
6335 6237
6336/* 6238/* This function comes to reflect the actual link state read DIRECTLY from the
6337 * This function comes to reflect the actual link state read DIRECTLY from the
6338 * HW 6239 * HW
6339 */ 6240 */
6340int bnx2x_test_link(struct link_params *params, struct link_vars *vars, 6241int bnx2x_test_link(struct link_params *params, struct link_vars *vars,
@@ -6422,16 +6323,14 @@ static int bnx2x_link_initialize(struct link_params *params,
6422 int rc = 0; 6323 int rc = 0;
6423 u8 phy_index, non_ext_phy; 6324 u8 phy_index, non_ext_phy;
6424 struct bnx2x *bp = params->bp; 6325 struct bnx2x *bp = params->bp;
6425 /* 6326 /* In case of external phy existence, the line speed would be the
6426 * In case of external phy existence, the line speed would be the
6427 * line speed linked up by the external phy. In case it is direct 6327 * line speed linked up by the external phy. In case it is direct
6428 * only, then the line_speed during initialization will be 6328 * only, then the line_speed during initialization will be
6429 * equal to the req_line_speed 6329 * equal to the req_line_speed
6430 */ 6330 */
6431 vars->line_speed = params->phy[INT_PHY].req_line_speed; 6331 vars->line_speed = params->phy[INT_PHY].req_line_speed;
6432 6332
6433 /* 6333 /* Initialize the internal phy in case this is a direct board
6434 * Initialize the internal phy in case this is a direct board
6435 * (no external phys), or this board has external phy which requires 6334 * (no external phys), or this board has external phy which requires
6436 * to first. 6335 * to first.
6437 */ 6336 */
@@ -6463,8 +6362,7 @@ static int bnx2x_link_initialize(struct link_params *params,
6463 } else { 6362 } else {
6464 for (phy_index = EXT_PHY1; phy_index < params->num_phys; 6363 for (phy_index = EXT_PHY1; phy_index < params->num_phys;
6465 phy_index++) { 6364 phy_index++) {
6466 /* 6365 /* No need to initialize second phy in case of first
6467 * No need to initialize second phy in case of first
6468 * phy only selection. In case of second phy, we do 6366 * phy only selection. In case of second phy, we do
6469 * need to initialize the first phy, since they are 6367 * need to initialize the first phy, since they are
6470 * connected. 6368 * connected.
@@ -6492,7 +6390,6 @@ static int bnx2x_link_initialize(struct link_params *params,
6492 NIG_STATUS_XGXS0_LINK_STATUS | 6390 NIG_STATUS_XGXS0_LINK_STATUS |
6493 NIG_STATUS_SERDES0_LINK_STATUS | 6391 NIG_STATUS_SERDES0_LINK_STATUS |
6494 NIG_MASK_MI_INT)); 6392 NIG_MASK_MI_INT));
6495 bnx2x_update_mng(params, vars->link_status);
6496 return rc; 6393 return rc;
6497} 6394}
6498 6395
@@ -6577,7 +6474,7 @@ static int bnx2x_update_link_up(struct link_params *params,
6577 u8 link_10g) 6474 u8 link_10g)
6578{ 6475{
6579 struct bnx2x *bp = params->bp; 6476 struct bnx2x *bp = params->bp;
6580 u8 port = params->port; 6477 u8 phy_idx, port = params->port;
6581 int rc = 0; 6478 int rc = 0;
6582 6479
6583 vars->link_status |= (LINK_STATUS_LINK_UP | 6480 vars->link_status |= (LINK_STATUS_LINK_UP |
@@ -6641,11 +6538,18 @@ static int bnx2x_update_link_up(struct link_params *params,
6641 6538
6642 /* update shared memory */ 6539 /* update shared memory */
6643 bnx2x_update_mng(params, vars->link_status); 6540 bnx2x_update_mng(params, vars->link_status);
6541
6542 /* Check remote fault */
6543 for (phy_idx = INT_PHY; phy_idx < MAX_PHYS; phy_idx++) {
6544 if (params->phy[phy_idx].flags & FLAGS_TX_ERROR_CHECK) {
6545 bnx2x_check_half_open_conn(params, vars, 0);
6546 break;
6547 }
6548 }
6644 msleep(20); 6549 msleep(20);
6645 return rc; 6550 return rc;
6646} 6551}
6647/* 6552/* The bnx2x_link_update function should be called upon link
6648 * The bnx2x_link_update function should be called upon link
6649 * interrupt. 6553 * interrupt.
6650 * Link is considered up as follows: 6554 * Link is considered up as follows:
6651 * - DIRECT_SINGLE_MEDIA - Only XGXS link (internal link) needs 6555 * - DIRECT_SINGLE_MEDIA - Only XGXS link (internal link) needs
@@ -6702,8 +6606,7 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)
6702 if (!CHIP_IS_E3(bp)) 6606 if (!CHIP_IS_E3(bp))
6703 REG_WR(bp, NIG_REG_NIG_EMAC0_EN + port*4, 0); 6607 REG_WR(bp, NIG_REG_NIG_EMAC0_EN + port*4, 0);
6704 6608
6705 /* 6609 /* Step 1:
6706 * Step 1:
6707 * Check external link change only for external phys, and apply 6610 * Check external link change only for external phys, and apply
6708 * priority selection between them in case the link on both phys 6611 * priority selection between them in case the link on both phys
6709 * is up. Note that instead of the common vars, a temporary 6612 * is up. Note that instead of the common vars, a temporary
@@ -6734,23 +6637,20 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)
6734 switch (bnx2x_phy_selection(params)) { 6637 switch (bnx2x_phy_selection(params)) {
6735 case PORT_HW_CFG_PHY_SELECTION_HARDWARE_DEFAULT: 6638 case PORT_HW_CFG_PHY_SELECTION_HARDWARE_DEFAULT:
6736 case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY_PRIORITY: 6639 case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY_PRIORITY:
6737 /* 6640 /* In this option, the first PHY makes sure to pass the
6738 * In this option, the first PHY makes sure to pass the
6739 * traffic through itself only. 6641 * traffic through itself only.
6740 * Its not clear how to reset the link on the second phy 6642 * Its not clear how to reset the link on the second phy
6741 */ 6643 */
6742 active_external_phy = EXT_PHY1; 6644 active_external_phy = EXT_PHY1;
6743 break; 6645 break;
6744 case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY_PRIORITY: 6646 case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY_PRIORITY:
6745 /* 6647 /* In this option, the first PHY makes sure to pass the
6746 * In this option, the first PHY makes sure to pass the
6747 * traffic through the second PHY. 6648 * traffic through the second PHY.
6748 */ 6649 */
6749 active_external_phy = EXT_PHY2; 6650 active_external_phy = EXT_PHY2;
6750 break; 6651 break;
6751 default: 6652 default:
6752 /* 6653 /* Link indication on both PHYs with the following cases
6753 * Link indication on both PHYs with the following cases
6754 * is invalid: 6654 * is invalid:
6755 * - FIRST_PHY means that second phy wasn't initialized, 6655 * - FIRST_PHY means that second phy wasn't initialized,
6756 * hence its link is expected to be down 6656 * hence its link is expected to be down
@@ -6767,8 +6667,7 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)
6767 } 6667 }
6768 } 6668 }
6769 prev_line_speed = vars->line_speed; 6669 prev_line_speed = vars->line_speed;
6770 /* 6670 /* Step 2:
6771 * Step 2:
6772 * Read the status of the internal phy. In case of 6671 * Read the status of the internal phy. In case of
6773 * DIRECT_SINGLE_MEDIA board, this link is the external link, 6672 * DIRECT_SINGLE_MEDIA board, this link is the external link,
6774 * otherwise this is the link between the 577xx and the first 6673 * otherwise this is the link between the 577xx and the first
@@ -6778,8 +6677,7 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)
6778 params->phy[INT_PHY].read_status( 6677 params->phy[INT_PHY].read_status(
6779 &params->phy[INT_PHY], 6678 &params->phy[INT_PHY],
6780 params, vars); 6679 params, vars);
6781 /* 6680 /* The INT_PHY flow control reside in the vars. This include the
6782 * The INT_PHY flow control reside in the vars. This include the
6783 * case where the speed or flow control are not set to AUTO. 6681 * case where the speed or flow control are not set to AUTO.
6784 * Otherwise, the active external phy flow control result is set 6682 * Otherwise, the active external phy flow control result is set
6785 * to the vars. The ext_phy_line_speed is needed to check if the 6683 * to the vars. The ext_phy_line_speed is needed to check if the
@@ -6788,14 +6686,12 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)
6788 */ 6686 */
6789 if (active_external_phy > INT_PHY) { 6687 if (active_external_phy > INT_PHY) {
6790 vars->flow_ctrl = phy_vars[active_external_phy].flow_ctrl; 6688 vars->flow_ctrl = phy_vars[active_external_phy].flow_ctrl;
6791 /* 6689 /* Link speed is taken from the XGXS. AN and FC result from
6792 * Link speed is taken from the XGXS. AN and FC result from
6793 * the external phy. 6690 * the external phy.
6794 */ 6691 */
6795 vars->link_status |= phy_vars[active_external_phy].link_status; 6692 vars->link_status |= phy_vars[active_external_phy].link_status;
6796 6693
6797 /* 6694 /* if active_external_phy is first PHY and link is up - disable
6798 * if active_external_phy is first PHY and link is up - disable
6799 * disable TX on second external PHY 6695 * disable TX on second external PHY
6800 */ 6696 */
6801 if (active_external_phy == EXT_PHY1) { 6697 if (active_external_phy == EXT_PHY1) {
@@ -6832,8 +6728,7 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)
6832 DP(NETIF_MSG_LINK, "vars->flow_ctrl = 0x%x, vars->link_status = 0x%x," 6728 DP(NETIF_MSG_LINK, "vars->flow_ctrl = 0x%x, vars->link_status = 0x%x,"
6833 " ext_phy_line_speed = %d\n", vars->flow_ctrl, 6729 " ext_phy_line_speed = %d\n", vars->flow_ctrl,
6834 vars->link_status, ext_phy_line_speed); 6730 vars->link_status, ext_phy_line_speed);
6835 /* 6731 /* Upon link speed change set the NIG into drain mode. Comes to
6836 * Upon link speed change set the NIG into drain mode. Comes to
6837 * deals with possible FIFO glitch due to clk change when speed 6732 * deals with possible FIFO glitch due to clk change when speed
6838 * is decreased without link down indicator 6733 * is decreased without link down indicator
6839 */ 6734 */
@@ -6858,8 +6753,7 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)
6858 6753
6859 bnx2x_link_int_ack(params, vars, link_10g_plus); 6754 bnx2x_link_int_ack(params, vars, link_10g_plus);
6860 6755
6861 /* 6756 /* In case external phy link is up, and internal link is down
6862 * In case external phy link is up, and internal link is down
6863 * (not initialized yet probably after link initialization, it 6757 * (not initialized yet probably after link initialization, it
6864 * needs to be initialized. 6758 * needs to be initialized.
6865 * Note that after link down-up as result of cable plug, the xgxs 6759 * Note that after link down-up as result of cable plug, the xgxs
@@ -6887,8 +6781,7 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)
6887 vars); 6781 vars);
6888 } 6782 }
6889 } 6783 }
6890 /* 6784 /* Link is up only if both local phy and external phy (in case of
6891 * Link is up only if both local phy and external phy (in case of
6892 * non-direct board) are up and no fault detected on active PHY. 6785 * non-direct board) are up and no fault detected on active PHY.
6893 */ 6786 */
6894 vars->link_up = (vars->phy_link_up && 6787 vars->link_up = (vars->phy_link_up &&
@@ -7120,8 +7013,7 @@ static int bnx2x_8073_xaui_wa(struct bnx2x *bp, struct bnx2x_phy *phy)
7120 } 7013 }
7121 /* XAUI workaround in 8073 A0: */ 7014 /* XAUI workaround in 8073 A0: */
7122 7015
7123 /* 7016 /* After loading the boot ROM and restarting Autoneg, poll
7124 * After loading the boot ROM and restarting Autoneg, poll
7125 * Dev1, Reg $C820: 7017 * Dev1, Reg $C820:
7126 */ 7018 */
7127 7019
@@ -7130,8 +7022,7 @@ static int bnx2x_8073_xaui_wa(struct bnx2x *bp, struct bnx2x_phy *phy)
7130 MDIO_PMA_DEVAD, 7022 MDIO_PMA_DEVAD,
7131 MDIO_PMA_REG_8073_SPEED_LINK_STATUS, 7023 MDIO_PMA_REG_8073_SPEED_LINK_STATUS,
7132 &val); 7024 &val);
7133 /* 7025 /* If bit [14] = 0 or bit [13] = 0, continue on with
7134 * If bit [14] = 0 or bit [13] = 0, continue on with
7135 * system initialization (XAUI work-around not required, as 7026 * system initialization (XAUI work-around not required, as
7136 * these bits indicate 2.5G or 1G link up). 7027 * these bits indicate 2.5G or 1G link up).
7137 */ 7028 */
@@ -7140,8 +7031,7 @@ static int bnx2x_8073_xaui_wa(struct bnx2x *bp, struct bnx2x_phy *phy)
7140 return 0; 7031 return 0;
7141 } else if (!(val & (1<<15))) { 7032 } else if (!(val & (1<<15))) {
7142 DP(NETIF_MSG_LINK, "bit 15 went off\n"); 7033 DP(NETIF_MSG_LINK, "bit 15 went off\n");
7143 /* 7034 /* If bit 15 is 0, then poll Dev1, Reg $C841 until it's
7144 * If bit 15 is 0, then poll Dev1, Reg $C841 until it's
7145 * MSB (bit15) goes to 1 (indicating that the XAUI 7035 * MSB (bit15) goes to 1 (indicating that the XAUI
7146 * workaround has completed), then continue on with 7036 * workaround has completed), then continue on with
7147 * system initialization. 7037 * system initialization.
@@ -7291,8 +7181,7 @@ static int bnx2x_8073_config_init(struct bnx2x_phy *phy,
7291 val = (1<<7); 7181 val = (1<<7);
7292 } else if (phy->req_line_speed == SPEED_2500) { 7182 } else if (phy->req_line_speed == SPEED_2500) {
7293 val = (1<<5); 7183 val = (1<<5);
7294 /* 7184 /* Note that 2.5G works only when used with 1G
7295 * Note that 2.5G works only when used with 1G
7296 * advertisement 7185 * advertisement
7297 */ 7186 */
7298 } else 7187 } else
@@ -7343,8 +7232,7 @@ static int bnx2x_8073_config_init(struct bnx2x_phy *phy,
7343 /* Add support for CL37 (passive mode) III */ 7232 /* Add support for CL37 (passive mode) III */
7344 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000); 7233 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000);
7345 7234
7346 /* 7235 /* The SNR will improve about 2db by changing BW and FEE main
7347 * The SNR will improve about 2db by changing BW and FEE main
7348 * tap. Rest commands are executed after link is up 7236 * tap. Rest commands are executed after link is up
7349 * Change FFE main cursor to 5 in EDC register 7237 * Change FFE main cursor to 5 in EDC register
7350 */ 7238 */
@@ -7431,8 +7319,7 @@ static u8 bnx2x_8073_read_status(struct bnx2x_phy *phy,
7431 7319
7432 link_up = (((val1 & 4) == 4) || (an1000_status & (1<<1))); 7320 link_up = (((val1 & 4) == 4) || (an1000_status & (1<<1)));
7433 if (link_up && bnx2x_8073_is_snr_needed(bp, phy)) { 7321 if (link_up && bnx2x_8073_is_snr_needed(bp, phy)) {
7434 /* 7322 /* The SNR will improve about 2dbby changing the BW and FEE main
7435 * The SNR will improve about 2dbby changing the BW and FEE main
7436 * tap. The 1st write to change FFE main tap is set before 7323 * tap. The 1st write to change FFE main tap is set before
7437 * restart AN. Change PLL Bandwidth in EDC register 7324 * restart AN. Change PLL Bandwidth in EDC register
7438 */ 7325 */
@@ -7479,8 +7366,7 @@ static u8 bnx2x_8073_read_status(struct bnx2x_phy *phy,
7479 bnx2x_cl45_read(bp, phy, 7366 bnx2x_cl45_read(bp, phy,
7480 MDIO_XS_DEVAD, 7367 MDIO_XS_DEVAD,
7481 MDIO_XS_REG_8073_RX_CTRL_PCIE, &val1); 7368 MDIO_XS_REG_8073_RX_CTRL_PCIE, &val1);
7482 /* 7369 /* Set bit 3 to invert Rx in 1G mode and clear this bit
7483 * Set bit 3 to invert Rx in 1G mode and clear this bit
7484 * when it`s in 10G mode. 7370 * when it`s in 10G mode.
7485 */ 7371 */
7486 if (vars->line_speed == SPEED_1000) { 7372 if (vars->line_speed == SPEED_1000) {
@@ -7602,8 +7488,7 @@ static void bnx2x_set_disable_pmd_transmit(struct link_params *params,
7602 u8 pmd_dis) 7488 u8 pmd_dis)
7603{ 7489{
7604 struct bnx2x *bp = params->bp; 7490 struct bnx2x *bp = params->bp;
7605 /* 7491 /* Disable transmitter only for bootcodes which can enable it afterwards
7606 * Disable transmitter only for bootcodes which can enable it afterwards
7607 * (for D3 link) 7492 * (for D3 link)
7608 */ 7493 */
7609 if (pmd_dis) { 7494 if (pmd_dis) {
@@ -7780,9 +7665,6 @@ static int bnx2x_warpcore_read_sfp_module_eeprom(struct bnx2x_phy *phy,
7780 u32 data_array[4]; 7665 u32 data_array[4];
7781 u16 addr32; 7666 u16 addr32;
7782 struct bnx2x *bp = params->bp; 7667 struct bnx2x *bp = params->bp;
7783 /*DP(NETIF_MSG_LINK, "bnx2x_direct_read_sfp_module_eeprom:"
7784 " addr %d, cnt %d\n",
7785 addr, byte_cnt);*/
7786 if (byte_cnt > 16) { 7668 if (byte_cnt > 16) {
7787 DP(NETIF_MSG_LINK, 7669 DP(NETIF_MSG_LINK,
7788 "Reading from eeprom is limited to 16 bytes\n"); 7670 "Reading from eeprom is limited to 16 bytes\n");
@@ -7847,8 +7729,7 @@ static int bnx2x_8727_read_sfp_module_eeprom(struct bnx2x_phy *phy,
7847 MDIO_PMA_DEVAD, 7729 MDIO_PMA_DEVAD,
7848 MDIO_PMA_REG_SFP_TWO_WIRE_CTRL, 7730 MDIO_PMA_REG_SFP_TWO_WIRE_CTRL,
7849 0x8002); 7731 0x8002);
7850 /* 7732 /* Wait appropriate time for two-wire command to finish before
7851 * Wait appropriate time for two-wire command to finish before
7852 * polling the status register 7733 * polling the status register
7853 */ 7734 */
7854 msleep(1); 7735 msleep(1);
@@ -7941,8 +7822,7 @@ static int bnx2x_get_edc_mode(struct bnx2x_phy *phy,
7941 { 7822 {
7942 u8 copper_module_type; 7823 u8 copper_module_type;
7943 phy->media_type = ETH_PHY_DA_TWINAX; 7824 phy->media_type = ETH_PHY_DA_TWINAX;
7944 /* 7825 /* Check if its active cable (includes SFP+ module)
7945 * Check if its active cable (includes SFP+ module)
7946 * of passive cable 7826 * of passive cable
7947 */ 7827 */
7948 if (bnx2x_read_sfp_module_eeprom(phy, 7828 if (bnx2x_read_sfp_module_eeprom(phy,
@@ -8019,8 +7899,7 @@ static int bnx2x_get_edc_mode(struct bnx2x_phy *phy,
8019 DP(NETIF_MSG_LINK, "EDC mode is set to 0x%x\n", *edc_mode); 7899 DP(NETIF_MSG_LINK, "EDC mode is set to 0x%x\n", *edc_mode);
8020 return 0; 7900 return 0;
8021} 7901}
8022/* 7902/* This function read the relevant field from the module (SFP+), and verify it
8023 * This function read the relevant field from the module (SFP+), and verify it
8024 * is compliant with this board 7903 * is compliant with this board
8025 */ 7904 */
8026static int bnx2x_verify_sfp_module(struct bnx2x_phy *phy, 7905static int bnx2x_verify_sfp_module(struct bnx2x_phy *phy,
@@ -8102,8 +7981,7 @@ static int bnx2x_wait_for_sfp_module_initialized(struct bnx2x_phy *phy,
8102 u8 val; 7981 u8 val;
8103 struct bnx2x *bp = params->bp; 7982 struct bnx2x *bp = params->bp;
8104 u16 timeout; 7983 u16 timeout;
8105 /* 7984 /* Initialization time after hot-plug may take up to 300ms for
8106 * Initialization time after hot-plug may take up to 300ms for
8107 * some phys type ( e.g. JDSU ) 7985 * some phys type ( e.g. JDSU )
8108 */ 7986 */
8109 7987
@@ -8125,8 +8003,7 @@ static void bnx2x_8727_power_module(struct bnx2x *bp,
8125 u8 is_power_up) { 8003 u8 is_power_up) {
8126 /* Make sure GPIOs are not using for LED mode */ 8004 /* Make sure GPIOs are not using for LED mode */
8127 u16 val; 8005 u16 val;
8128 /* 8006 /* In the GPIO register, bit 4 is use to determine if the GPIOs are
8129 * In the GPIO register, bit 4 is use to determine if the GPIOs are
8130 * operating as INPUT or as OUTPUT. Bit 1 is for input, and 0 for 8007 * operating as INPUT or as OUTPUT. Bit 1 is for input, and 0 for
8131 * output 8008 * output
8132 * Bits 0-1 determine the GPIOs value for OUTPUT in case bit 4 val is 0 8009 * Bits 0-1 determine the GPIOs value for OUTPUT in case bit 4 val is 0
@@ -8142,8 +8019,7 @@ static void bnx2x_8727_power_module(struct bnx2x *bp,
8142 if (is_power_up) 8019 if (is_power_up)
8143 val = (1<<4); 8020 val = (1<<4);
8144 else 8021 else
8145 /* 8022 /* Set GPIO control to OUTPUT, and set the power bit
8146 * Set GPIO control to OUTPUT, and set the power bit
8147 * to according to the is_power_up 8023 * to according to the is_power_up
8148 */ 8024 */
8149 val = (1<<1); 8025 val = (1<<1);
@@ -8177,8 +8053,7 @@ static int bnx2x_8726_set_limiting_mode(struct bnx2x *bp,
8177 8053
8178 DP(NETIF_MSG_LINK, "Setting LRM MODE\n"); 8054 DP(NETIF_MSG_LINK, "Setting LRM MODE\n");
8179 8055
8180 /* 8056 /* Changing to LRM mode takes quite few seconds. So do it only
8181 * Changing to LRM mode takes quite few seconds. So do it only
8182 * if current mode is limiting (default is LRM) 8057 * if current mode is limiting (default is LRM)
8183 */ 8058 */
8184 if (cur_limiting_mode != EDC_MODE_LIMITING) 8059 if (cur_limiting_mode != EDC_MODE_LIMITING)
@@ -8313,8 +8188,7 @@ static void bnx2x_set_sfp_module_fault_led(struct link_params *params,
8313 struct bnx2x *bp = params->bp; 8188 struct bnx2x *bp = params->bp;
8314 DP(NETIF_MSG_LINK, "Setting SFP+ module fault LED to %d\n", gpio_mode); 8189 DP(NETIF_MSG_LINK, "Setting SFP+ module fault LED to %d\n", gpio_mode);
8315 if (CHIP_IS_E3(bp)) { 8190 if (CHIP_IS_E3(bp)) {
8316 /* 8191 /* Low ==> if SFP+ module is supported otherwise
8317 * Low ==> if SFP+ module is supported otherwise
8318 * High ==> if SFP+ module is not on the approved vendor list 8192 * High ==> if SFP+ module is not on the approved vendor list
8319 */ 8193 */
8320 bnx2x_set_e3_module_fault_led(params, gpio_mode); 8194 bnx2x_set_e3_module_fault_led(params, gpio_mode);
@@ -8339,8 +8213,7 @@ static void bnx2x_warpcore_power_module(struct link_params *params,
8339 return; 8213 return;
8340 DP(NETIF_MSG_LINK, "Setting SFP+ module power to %d using pin cfg %d\n", 8214 DP(NETIF_MSG_LINK, "Setting SFP+ module power to %d using pin cfg %d\n",
8341 power, pin_cfg); 8215 power, pin_cfg);
8342 /* 8216 /* Low ==> corresponding SFP+ module is powered
8343 * Low ==> corresponding SFP+ module is powered
8344 * high ==> the SFP+ module is powered down 8217 * high ==> the SFP+ module is powered down
8345 */ 8218 */
8346 bnx2x_set_cfg_pin(bp, pin_cfg, power ^ 1); 8219 bnx2x_set_cfg_pin(bp, pin_cfg, power ^ 1);
@@ -8474,14 +8347,12 @@ int bnx2x_sfp_module_detection(struct bnx2x_phy *phy,
8474 bnx2x_set_sfp_module_fault_led(params, MISC_REGISTERS_GPIO_LOW); 8347 bnx2x_set_sfp_module_fault_led(params, MISC_REGISTERS_GPIO_LOW);
8475 } 8348 }
8476 8349
8477 /* 8350 /* Check and set limiting mode / LRM mode on 8726. On 8727 it
8478 * Check and set limiting mode / LRM mode on 8726. On 8727 it
8479 * is done automatically 8351 * is done automatically
8480 */ 8352 */
8481 bnx2x_set_limiting_mode(params, phy, edc_mode); 8353 bnx2x_set_limiting_mode(params, phy, edc_mode);
8482 8354
8483 /* 8355 /* Enable transmit for this module if the module is approved, or
8484 * Enable transmit for this module if the module is approved, or
8485 * if unapproved modules should also enable the Tx laser 8356 * if unapproved modules should also enable the Tx laser
8486 */ 8357 */
8487 if (rc == 0 || 8358 if (rc == 0 ||
@@ -8536,8 +8407,7 @@ void bnx2x_handle_module_detect_int(struct link_params *params)
8536 bnx2x_set_gpio_int(bp, gpio_num, 8407 bnx2x_set_gpio_int(bp, gpio_num,
8537 MISC_REGISTERS_GPIO_INT_OUTPUT_SET, 8408 MISC_REGISTERS_GPIO_INT_OUTPUT_SET,
8538 gpio_port); 8409 gpio_port);
8539 /* 8410 /* Module was plugged out.
8540 * Module was plugged out.
8541 * Disable transmit for this module 8411 * Disable transmit for this module
8542 */ 8412 */
8543 phy->media_type = ETH_PHY_NOT_PRESENT; 8413 phy->media_type = ETH_PHY_NOT_PRESENT;
@@ -8607,8 +8477,7 @@ static u8 bnx2x_8706_8726_read_status(struct bnx2x_phy *phy,
8607 8477
8608 DP(NETIF_MSG_LINK, "8706/8726 rx_sd 0x%x pcs_status 0x%x 1Gbps" 8478 DP(NETIF_MSG_LINK, "8706/8726 rx_sd 0x%x pcs_status 0x%x 1Gbps"
8609 " link_status 0x%x\n", rx_sd, pcs_status, val2); 8479 " link_status 0x%x\n", rx_sd, pcs_status, val2);
8610 /* 8480 /* Link is up if both bit 0 of pmd_rx_sd and bit 0 of pcs_status
8611 * link is up if both bit 0 of pmd_rx_sd and bit 0 of pcs_status
8612 * are set, or if the autoneg bit 1 is set 8481 * are set, or if the autoneg bit 1 is set
8613 */ 8482 */
8614 link_up = ((rx_sd & pcs_status & 0x1) || (val2 & (1<<1))); 8483 link_up = ((rx_sd & pcs_status & 0x1) || (val2 & (1<<1)));
@@ -8722,8 +8591,7 @@ static u8 bnx2x_8706_config_init(struct bnx2x_phy *phy,
8722 } 8591 }
8723 bnx2x_save_bcm_spirom_ver(bp, phy, params->port); 8592 bnx2x_save_bcm_spirom_ver(bp, phy, params->port);
8724 8593
8725 /* 8594 /* If TX Laser is controlled by GPIO_0, do not let PHY go into low
8726 * If TX Laser is controlled by GPIO_0, do not let PHY go into low
8727 * power mode, if TX Laser is disabled 8595 * power mode, if TX Laser is disabled
8728 */ 8596 */
8729 8597
@@ -8833,8 +8701,7 @@ static int bnx2x_8726_config_init(struct bnx2x_phy *phy,
8833 8701
8834 bnx2x_8726_external_rom_boot(phy, params); 8702 bnx2x_8726_external_rom_boot(phy, params);
8835 8703
8836 /* 8704 /* Need to call module detected on initialization since the module
8837 * Need to call module detected on initialization since the module
8838 * detection triggered by actual module insertion might occur before 8705 * detection triggered by actual module insertion might occur before
8839 * driver is loaded, and when driver is loaded, it reset all 8706 * driver is loaded, and when driver is loaded, it reset all
8840 * registers, including the transmitter 8707 * registers, including the transmitter
@@ -8871,8 +8738,7 @@ static int bnx2x_8726_config_init(struct bnx2x_phy *phy,
8871 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000); 8738 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000);
8872 bnx2x_cl45_write(bp, phy, 8739 bnx2x_cl45_write(bp, phy,
8873 MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0x1200); 8740 MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0x1200);
8874 /* 8741 /* Enable RX-ALARM control to receive interrupt for 1G speed
8875 * Enable RX-ALARM control to receive interrupt for 1G speed
8876 * change 8742 * change
8877 */ 8743 */
8878 bnx2x_cl45_write(bp, phy, 8744 bnx2x_cl45_write(bp, phy,
@@ -8973,8 +8839,7 @@ static void bnx2x_8727_hw_reset(struct bnx2x_phy *phy,
8973 struct link_params *params) { 8839 struct link_params *params) {
8974 u32 swap_val, swap_override; 8840 u32 swap_val, swap_override;
8975 u8 port; 8841 u8 port;
8976 /* 8842 /* The PHY reset is controlled by GPIO 1. Fake the port number
8977 * The PHY reset is controlled by GPIO 1. Fake the port number
8978 * to cancel the swap done in set_gpio() 8843 * to cancel the swap done in set_gpio()
8979 */ 8844 */
8980 struct bnx2x *bp = params->bp; 8845 struct bnx2x *bp = params->bp;
@@ -9012,14 +8877,12 @@ static int bnx2x_8727_config_init(struct bnx2x_phy *phy,
9012 bnx2x_cl45_write(bp, phy, 8877 bnx2x_cl45_write(bp, phy,
9013 MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, lasi_ctrl_val); 8878 MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, lasi_ctrl_val);
9014 8879
9015 /* 8880 /* Initially configure MOD_ABS to interrupt when module is
9016 * Initially configure MOD_ABS to interrupt when module is
9017 * presence( bit 8) 8881 * presence( bit 8)
9018 */ 8882 */
9019 bnx2x_cl45_read(bp, phy, 8883 bnx2x_cl45_read(bp, phy,
9020 MDIO_PMA_DEVAD, MDIO_PMA_REG_PHY_IDENTIFIER, &mod_abs); 8884 MDIO_PMA_DEVAD, MDIO_PMA_REG_PHY_IDENTIFIER, &mod_abs);
9021 /* 8885 /* Set EDC off by setting OPTXLOS signal input to low (bit 9).
9022 * Set EDC off by setting OPTXLOS signal input to low (bit 9).
9023 * When the EDC is off it locks onto a reference clock and avoids 8886 * When the EDC is off it locks onto a reference clock and avoids
9024 * becoming 'lost' 8887 * becoming 'lost'
9025 */ 8888 */
@@ -9040,8 +8903,7 @@ static int bnx2x_8727_config_init(struct bnx2x_phy *phy,
9040 if (phy->flags & FLAGS_NOC) 8903 if (phy->flags & FLAGS_NOC)
9041 val |= (3<<5); 8904 val |= (3<<5);
9042 8905
9043 /* 8906 /* Set 8727 GPIOs to input to allow reading from the 8727 GPIO0
9044 * Set 8727 GPIOs to input to allow reading from the 8727 GPIO0
9045 * status which reflect SFP+ module over-current 8907 * status which reflect SFP+ module over-current
9046 */ 8908 */
9047 if (!(phy->flags & FLAGS_NOC)) 8909 if (!(phy->flags & FLAGS_NOC))
@@ -9067,8 +8929,7 @@ static int bnx2x_8727_config_init(struct bnx2x_phy *phy,
9067 bnx2x_cl45_read(bp, phy, 8929 bnx2x_cl45_read(bp, phy,
9068 MDIO_PMA_DEVAD, MDIO_PMA_REG_10G_CTRL2, &tmp1); 8930 MDIO_PMA_DEVAD, MDIO_PMA_REG_10G_CTRL2, &tmp1);
9069 DP(NETIF_MSG_LINK, "1.7 = 0x%x\n", tmp1); 8931 DP(NETIF_MSG_LINK, "1.7 = 0x%x\n", tmp1);
9070 /* 8932 /* Power down the XAUI until link is up in case of dual-media
9071 * Power down the XAUI until link is up in case of dual-media
9072 * and 1G 8933 * and 1G
9073 */ 8934 */
9074 if (DUAL_MEDIA(params)) { 8935 if (DUAL_MEDIA(params)) {
@@ -9093,8 +8954,7 @@ static int bnx2x_8727_config_init(struct bnx2x_phy *phy,
9093 bnx2x_cl45_write(bp, phy, 8954 bnx2x_cl45_write(bp, phy,
9094 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1300); 8955 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1300);
9095 } else { 8956 } else {
9096 /* 8957 /* Since the 8727 has only single reset pin, need to set the 10G
9097 * Since the 8727 has only single reset pin, need to set the 10G
9098 * registers although it is default 8958 * registers although it is default
9099 */ 8959 */
9100 bnx2x_cl45_write(bp, phy, 8960 bnx2x_cl45_write(bp, phy,
@@ -9109,8 +8969,7 @@ static int bnx2x_8727_config_init(struct bnx2x_phy *phy,
9109 0x0008); 8969 0x0008);
9110 } 8970 }
9111 8971
9112 /* 8972 /* Set 2-wire transfer rate of SFP+ module EEPROM
9113 * Set 2-wire transfer rate of SFP+ module EEPROM
9114 * to 100Khz since some DACs(direct attached cables) do 8973 * to 100Khz since some DACs(direct attached cables) do
9115 * not work at 400Khz. 8974 * not work at 400Khz.
9116 */ 8975 */
@@ -9133,8 +8992,7 @@ static int bnx2x_8727_config_init(struct bnx2x_phy *phy,
9133 phy->tx_preemphasis[1]); 8992 phy->tx_preemphasis[1]);
9134 } 8993 }
9135 8994
9136 /* 8995 /* If TX Laser is controlled by GPIO_0, do not let PHY go into low
9137 * If TX Laser is controlled by GPIO_0, do not let PHY go into low
9138 * power mode, if TX Laser is disabled 8996 * power mode, if TX Laser is disabled
9139 */ 8997 */
9140 tx_en_mode = REG_RD(bp, params->shmem_base + 8998 tx_en_mode = REG_RD(bp, params->shmem_base +
@@ -9180,8 +9038,7 @@ static void bnx2x_8727_handle_mod_abs(struct bnx2x_phy *phy,
9180 DP(NETIF_MSG_LINK, 9038 DP(NETIF_MSG_LINK,
9181 "MOD_ABS indication show module is absent\n"); 9039 "MOD_ABS indication show module is absent\n");
9182 phy->media_type = ETH_PHY_NOT_PRESENT; 9040 phy->media_type = ETH_PHY_NOT_PRESENT;
9183 /* 9041 /* 1. Set mod_abs to detect next module
9184 * 1. Set mod_abs to detect next module
9185 * presence event 9042 * presence event
9186 * 2. Set EDC off by setting OPTXLOS signal input to low 9043 * 2. Set EDC off by setting OPTXLOS signal input to low
9187 * (bit 9). 9044 * (bit 9).
@@ -9195,8 +9052,7 @@ static void bnx2x_8727_handle_mod_abs(struct bnx2x_phy *phy,
9195 MDIO_PMA_DEVAD, 9052 MDIO_PMA_DEVAD,
9196 MDIO_PMA_REG_PHY_IDENTIFIER, mod_abs); 9053 MDIO_PMA_REG_PHY_IDENTIFIER, mod_abs);
9197 9054
9198 /* 9055 /* Clear RX alarm since it stays up as long as
9199 * Clear RX alarm since it stays up as long as
9200 * the mod_abs wasn't changed 9056 * the mod_abs wasn't changed
9201 */ 9057 */
9202 bnx2x_cl45_read(bp, phy, 9058 bnx2x_cl45_read(bp, phy,
@@ -9207,8 +9063,7 @@ static void bnx2x_8727_handle_mod_abs(struct bnx2x_phy *phy,
9207 /* Module is present */ 9063 /* Module is present */
9208 DP(NETIF_MSG_LINK, 9064 DP(NETIF_MSG_LINK,
9209 "MOD_ABS indication show module is present\n"); 9065 "MOD_ABS indication show module is present\n");
9210 /* 9066 /* First disable transmitter, and if the module is ok, the
9211 * First disable transmitter, and if the module is ok, the
9212 * module_detection will enable it 9067 * module_detection will enable it
9213 * 1. Set mod_abs to detect next module absent event ( bit 8) 9068 * 1. Set mod_abs to detect next module absent event ( bit 8)
9214 * 2. Restore the default polarity of the OPRXLOS signal and 9069 * 2. Restore the default polarity of the OPRXLOS signal and
@@ -9222,8 +9077,7 @@ static void bnx2x_8727_handle_mod_abs(struct bnx2x_phy *phy,
9222 MDIO_PMA_DEVAD, 9077 MDIO_PMA_DEVAD,
9223 MDIO_PMA_REG_PHY_IDENTIFIER, mod_abs); 9078 MDIO_PMA_REG_PHY_IDENTIFIER, mod_abs);
9224 9079
9225 /* 9080 /* Clear RX alarm since it stays up as long as the mod_abs
9226 * Clear RX alarm since it stays up as long as the mod_abs
9227 * wasn't changed. This is need to be done before calling the 9081 * wasn't changed. This is need to be done before calling the
9228 * module detection, otherwise it will clear* the link update 9082 * module detection, otherwise it will clear* the link update
9229 * alarm 9083 * alarm
@@ -9284,8 +9138,7 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy,
9284 bnx2x_cl45_read(bp, phy, 9138 bnx2x_cl45_read(bp, phy,
9285 MDIO_PMA_DEVAD, MDIO_PMA_REG_M8051_MSGOUT_REG, &val1); 9139 MDIO_PMA_DEVAD, MDIO_PMA_REG_M8051_MSGOUT_REG, &val1);
9286 9140
9287 /* 9141 /* If a module is present and there is need to check
9288 * If a module is present and there is need to check
9289 * for over current 9142 * for over current
9290 */ 9143 */
9291 if (!(phy->flags & FLAGS_NOC) && !(rx_alarm_status & (1<<5))) { 9144 if (!(phy->flags & FLAGS_NOC) && !(rx_alarm_status & (1<<5))) {
@@ -9350,8 +9203,7 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy,
9350 MDIO_PMA_DEVAD, 9203 MDIO_PMA_DEVAD,
9351 MDIO_PMA_REG_8073_SPEED_LINK_STATUS, &link_status); 9204 MDIO_PMA_REG_8073_SPEED_LINK_STATUS, &link_status);
9352 9205
9353 /* 9206 /* Bits 0..2 --> speed detected,
9354 * Bits 0..2 --> speed detected,
9355 * Bits 13..15--> link is down 9207 * Bits 13..15--> link is down
9356 */ 9208 */
9357 if ((link_status & (1<<2)) && (!(link_status & (1<<15)))) { 9209 if ((link_status & (1<<2)) && (!(link_status & (1<<15)))) {
@@ -9394,8 +9246,7 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy,
9394 bnx2x_cl45_read(bp, phy, 9246 bnx2x_cl45_read(bp, phy,
9395 MDIO_PMA_DEVAD, 9247 MDIO_PMA_DEVAD,
9396 MDIO_PMA_REG_8727_PCS_GP, &val1); 9248 MDIO_PMA_REG_8727_PCS_GP, &val1);
9397 /* 9249 /* In case of dual-media board and 1G, power up the XAUI side,
9398 * In case of dual-media board and 1G, power up the XAUI side,
9399 * otherwise power it down. For 10G it is done automatically 9250 * otherwise power it down. For 10G it is done automatically
9400 */ 9251 */
9401 if (link_up) 9252 if (link_up)
@@ -9561,8 +9412,7 @@ static int bnx2x_848xx_cmn_config_init(struct bnx2x_phy *phy,
9561 /* Save spirom version */ 9412 /* Save spirom version */
9562 bnx2x_save_848xx_spirom_version(phy, bp, params->port); 9413 bnx2x_save_848xx_spirom_version(phy, bp, params->port);
9563 } 9414 }
9564 /* 9415 /* This phy uses the NIG latch mechanism since link indication
9565 * This phy uses the NIG latch mechanism since link indication
9566 * arrives through its LED4 and not via its LASI signal, so we 9416 * arrives through its LED4 and not via its LASI signal, so we
9567 * get steady signal instead of clear on read 9417 * get steady signal instead of clear on read
9568 */ 9418 */
@@ -9667,8 +9517,7 @@ static int bnx2x_848xx_cmn_config_init(struct bnx2x_phy *phy,
9667 if (phy->req_duplex == DUPLEX_FULL) 9517 if (phy->req_duplex == DUPLEX_FULL)
9668 autoneg_val |= (1<<8); 9518 autoneg_val |= (1<<8);
9669 9519
9670 /* 9520 /* Always write this if this is not 84833.
9671 * Always write this if this is not 84833.
9672 * For 84833, write it only when it's a forced speed. 9521 * For 84833, write it only when it's a forced speed.
9673 */ 9522 */
9674 if ((phy->type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) || 9523 if ((phy->type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) ||
@@ -9916,8 +9765,7 @@ static int bnx2x_848x3_config_init(struct bnx2x_phy *phy,
9916 /* Wait for GPHY to come out of reset */ 9765 /* Wait for GPHY to come out of reset */
9917 msleep(50); 9766 msleep(50);
9918 if (phy->type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) { 9767 if (phy->type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) {
9919 /* 9768 /* BCM84823 requires that XGXS links up first @ 10G for normal
9920 * BCM84823 requires that XGXS links up first @ 10G for normal
9921 * behavior. 9769 * behavior.
9922 */ 9770 */
9923 u16 temp; 9771 u16 temp;
@@ -10393,8 +10241,7 @@ static void bnx2x_848xx_set_link_led(struct bnx2x_phy *phy,
10393 break; 10241 break;
10394 } 10242 }
10395 10243
10396 /* 10244 /* This is a workaround for E3+84833 until autoneg
10397 * This is a workaround for E3+84833 until autoneg
10398 * restart is fixed in f/w 10245 * restart is fixed in f/w
10399 */ 10246 */
10400 if (CHIP_IS_E3(bp)) { 10247 if (CHIP_IS_E3(bp)) {
@@ -10418,8 +10265,7 @@ static int bnx2x_54618se_config_init(struct bnx2x_phy *phy,
10418 DP(NETIF_MSG_LINK, "54618SE cfg init\n"); 10265 DP(NETIF_MSG_LINK, "54618SE cfg init\n");
10419 usleep_range(1000, 1000); 10266 usleep_range(1000, 1000);
10420 10267
10421 /* 10268 /* This works with E3 only, no need to check the chip
10422 * This works with E3 only, no need to check the chip
10423 * before determining the port. 10269 * before determining the port.
10424 */ 10270 */
10425 port = params->port; 10271 port = params->port;
@@ -10441,7 +10287,7 @@ static int bnx2x_54618se_config_init(struct bnx2x_phy *phy,
10441 MDIO_PMA_REG_CTRL, 0x8000); 10287 MDIO_PMA_REG_CTRL, 0x8000);
10442 bnx2x_wait_reset_complete(bp, phy, params); 10288 bnx2x_wait_reset_complete(bp, phy, params);
10443 10289
10444 /*wait for GPHY to reset */ 10290 /* Wait for GPHY to reset */
10445 msleep(50); 10291 msleep(50);
10446 10292
10447 /* Configure LED4: set to INTR (0x6). */ 10293 /* Configure LED4: set to INTR (0x6). */
@@ -10647,13 +10493,11 @@ static void bnx2x_54618se_link_reset(struct bnx2x_phy *phy,
10647 u32 cfg_pin; 10493 u32 cfg_pin;
10648 u8 port; 10494 u8 port;
10649 10495
10650 /* 10496 /* In case of no EPIO routed to reset the GPHY, put it
10651 * In case of no EPIO routed to reset the GPHY, put it
10652 * in low power mode. 10497 * in low power mode.
10653 */ 10498 */
10654 bnx2x_cl22_write(bp, phy, MDIO_PMA_REG_CTRL, 0x800); 10499 bnx2x_cl22_write(bp, phy, MDIO_PMA_REG_CTRL, 0x800);
10655 /* 10500 /* This works with E3 only, no need to check the chip
10656 * This works with E3 only, no need to check the chip
10657 * before determining the port. 10501 * before determining the port.
10658 */ 10502 */
10659 port = params->port; 10503 port = params->port;
@@ -10762,7 +10606,7 @@ static u8 bnx2x_54618se_read_status(struct bnx2x_phy *phy,
10762 bnx2x_ext_phy_resolve_fc(phy, params, vars); 10606 bnx2x_ext_phy_resolve_fc(phy, params, vars);
10763 10607
10764 if (vars->link_status & LINK_STATUS_AUTO_NEGOTIATE_COMPLETE) { 10608 if (vars->link_status & LINK_STATUS_AUTO_NEGOTIATE_COMPLETE) {
10765 /* report LP advertised speeds */ 10609 /* Report LP advertised speeds */
10766 bnx2x_cl22_read(bp, phy, 0x5, &val); 10610 bnx2x_cl22_read(bp, phy, 0x5, &val);
10767 10611
10768 if (val & (1<<5)) 10612 if (val & (1<<5))
@@ -10827,8 +10671,7 @@ static void bnx2x_54618se_config_loopback(struct bnx2x_phy *phy,
10827 /* This register opens the gate for the UMAC despite its name */ 10671 /* This register opens the gate for the UMAC despite its name */
10828 REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4, 1); 10672 REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4, 1);
10829 10673
10830 /* 10674 /* Maximum Frame Length (RW). Defines a 14-Bit maximum frame
10831 * Maximum Frame Length (RW). Defines a 14-Bit maximum frame
10832 * length used by the MAC receive logic to check frames. 10675 * length used by the MAC receive logic to check frames.
10833 */ 10676 */
10834 REG_WR(bp, umac_base + UMAC_REG_MAXFR, 0x2710); 10677 REG_WR(bp, umac_base + UMAC_REG_MAXFR, 0x2710);
@@ -11101,22 +10944,23 @@ static struct bnx2x_phy phy_warpcore = {
11101 .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT, 10944 .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT,
11102 .addr = 0xff, 10945 .addr = 0xff,
11103 .def_md_devad = 0, 10946 .def_md_devad = 0,
11104 .flags = FLAGS_HW_LOCK_REQUIRED, 10947 .flags = (FLAGS_HW_LOCK_REQUIRED |
10948 FLAGS_TX_ERROR_CHECK),
11105 .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, 10949 .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
11106 .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, 10950 .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
11107 .mdio_ctrl = 0, 10951 .mdio_ctrl = 0,
11108 .supported = (SUPPORTED_10baseT_Half | 10952 .supported = (SUPPORTED_10baseT_Half |
11109 SUPPORTED_10baseT_Full | 10953 SUPPORTED_10baseT_Full |
11110 SUPPORTED_100baseT_Half | 10954 SUPPORTED_100baseT_Half |
11111 SUPPORTED_100baseT_Full | 10955 SUPPORTED_100baseT_Full |
11112 SUPPORTED_1000baseT_Full | 10956 SUPPORTED_1000baseT_Full |
11113 SUPPORTED_10000baseT_Full | 10957 SUPPORTED_10000baseT_Full |
11114 SUPPORTED_20000baseKR2_Full | 10958 SUPPORTED_20000baseKR2_Full |
11115 SUPPORTED_20000baseMLD2_Full | 10959 SUPPORTED_20000baseMLD2_Full |
11116 SUPPORTED_FIBRE | 10960 SUPPORTED_FIBRE |
11117 SUPPORTED_Autoneg | 10961 SUPPORTED_Autoneg |
11118 SUPPORTED_Pause | 10962 SUPPORTED_Pause |
11119 SUPPORTED_Asym_Pause), 10963 SUPPORTED_Asym_Pause),
11120 .media_type = ETH_PHY_UNSPECIFIED, 10964 .media_type = ETH_PHY_UNSPECIFIED,
11121 .ver_addr = 0, 10965 .ver_addr = 0,
11122 .req_flow_ctrl = 0, 10966 .req_flow_ctrl = 0,
@@ -11258,7 +11102,8 @@ static struct bnx2x_phy phy_8726 = {
11258 .addr = 0xff, 11102 .addr = 0xff,
11259 .def_md_devad = 0, 11103 .def_md_devad = 0,
11260 .flags = (FLAGS_HW_LOCK_REQUIRED | 11104 .flags = (FLAGS_HW_LOCK_REQUIRED |
11261 FLAGS_INIT_XGXS_FIRST), 11105 FLAGS_INIT_XGXS_FIRST |
11106 FLAGS_TX_ERROR_CHECK),
11262 .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, 11107 .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
11263 .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, 11108 .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
11264 .mdio_ctrl = 0, 11109 .mdio_ctrl = 0,
@@ -11289,7 +11134,8 @@ static struct bnx2x_phy phy_8727 = {
11289 .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727, 11134 .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727,
11290 .addr = 0xff, 11135 .addr = 0xff,
11291 .def_md_devad = 0, 11136 .def_md_devad = 0,
11292 .flags = FLAGS_FAN_FAILURE_DET_REQ, 11137 .flags = (FLAGS_FAN_FAILURE_DET_REQ |
11138 FLAGS_TX_ERROR_CHECK),
11293 .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, 11139 .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
11294 .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, 11140 .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
11295 .mdio_ctrl = 0, 11141 .mdio_ctrl = 0,
@@ -11354,8 +11200,9 @@ static struct bnx2x_phy phy_84823 = {
11354 .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84823, 11200 .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84823,
11355 .addr = 0xff, 11201 .addr = 0xff,
11356 .def_md_devad = 0, 11202 .def_md_devad = 0,
11357 .flags = FLAGS_FAN_FAILURE_DET_REQ | 11203 .flags = (FLAGS_FAN_FAILURE_DET_REQ |
11358 FLAGS_REARM_LATCH_SIGNAL, 11204 FLAGS_REARM_LATCH_SIGNAL |
11205 FLAGS_TX_ERROR_CHECK),
11359 .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, 11206 .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
11360 .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, 11207 .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
11361 .mdio_ctrl = 0, 11208 .mdio_ctrl = 0,
@@ -11390,8 +11237,9 @@ static struct bnx2x_phy phy_84833 = {
11390 .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833, 11237 .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833,
11391 .addr = 0xff, 11238 .addr = 0xff,
11392 .def_md_devad = 0, 11239 .def_md_devad = 0,
11393 .flags = FLAGS_FAN_FAILURE_DET_REQ | 11240 .flags = (FLAGS_FAN_FAILURE_DET_REQ |
11394 FLAGS_REARM_LATCH_SIGNAL, 11241 FLAGS_REARM_LATCH_SIGNAL |
11242 FLAGS_TX_ERROR_CHECK),
11395 .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, 11243 .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
11396 .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, 11244 .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
11397 .mdio_ctrl = 0, 11245 .mdio_ctrl = 0,
@@ -11466,9 +11314,8 @@ static void bnx2x_populate_preemphasis(struct bnx2x *bp, u32 shmem_base,
11466 /* Get the 4 lanes xgxs config rx and tx */ 11314 /* Get the 4 lanes xgxs config rx and tx */
11467 u32 rx = 0, tx = 0, i; 11315 u32 rx = 0, tx = 0, i;
11468 for (i = 0; i < 2; i++) { 11316 for (i = 0; i < 2; i++) {
11469 /* 11317 /* INT_PHY and EXT_PHY1 share the same value location in
11470 * INT_PHY and EXT_PHY1 share the same value location in the 11318 * the shmem. When num_phys is greater than 1, than this value
11471 * shmem. When num_phys is greater than 1, than this value
11472 * applies only to EXT_PHY1 11319 * applies only to EXT_PHY1
11473 */ 11320 */
11474 if (phy_index == INT_PHY || phy_index == EXT_PHY1) { 11321 if (phy_index == INT_PHY || phy_index == EXT_PHY1) {
@@ -11546,8 +11393,7 @@ static int bnx2x_populate_int_phy(struct bnx2x *bp, u32 shmem_base, u8 port,
11546 offsetof(struct shmem_region, dev_info. 11393 offsetof(struct shmem_region, dev_info.
11547 port_hw_config[port].default_cfg)) & 11394 port_hw_config[port].default_cfg)) &
11548 PORT_HW_CFG_NET_SERDES_IF_MASK); 11395 PORT_HW_CFG_NET_SERDES_IF_MASK);
11549 /* 11396 /* Set the appropriate supported and flags indications per
11550 * Set the appropriate supported and flags indications per
11551 * interface type of the chip 11397 * interface type of the chip
11552 */ 11398 */
11553 switch (serdes_net_if) { 11399 switch (serdes_net_if) {
@@ -11605,8 +11451,7 @@ static int bnx2x_populate_int_phy(struct bnx2x *bp, u32 shmem_base, u8 port,
11605 break; 11451 break;
11606 } 11452 }
11607 11453
11608 /* 11454 /* Enable MDC/MDIO work-around for E3 A0 since free running MDC
11609 * Enable MDC/MDIO work-around for E3 A0 since free running MDC
11610 * was not set as expected. For B0, ECO will be enabled so there 11455 * was not set as expected. For B0, ECO will be enabled so there
11611 * won't be an issue there 11456 * won't be an issue there
11612 */ 11457 */
@@ -11719,8 +11564,7 @@ static int bnx2x_populate_ext_phy(struct bnx2x *bp,
11719 phy->addr = XGXS_EXT_PHY_ADDR(ext_phy_config); 11564 phy->addr = XGXS_EXT_PHY_ADDR(ext_phy_config);
11720 bnx2x_populate_preemphasis(bp, shmem_base, phy, port, phy_index); 11565 bnx2x_populate_preemphasis(bp, shmem_base, phy, port, phy_index);
11721 11566
11722 /* 11567 /* The shmem address of the phy version is located on different
11723 * The shmem address of the phy version is located on different
11724 * structures. In case this structure is too old, do not set 11568 * structures. In case this structure is too old, do not set
11725 * the address 11569 * the address
11726 */ 11570 */
@@ -11754,8 +11598,7 @@ static int bnx2x_populate_ext_phy(struct bnx2x *bp,
11754 11598
11755 if ((phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) && 11599 if ((phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) &&
11756 (phy->ver_addr)) { 11600 (phy->ver_addr)) {
11757 /* 11601 /* Remove 100Mb link supported for BCM84833 when phy fw
11758 * Remove 100Mb link supported for BCM84833 when phy fw
11759 * version lower than or equal to 1.39 11602 * version lower than or equal to 1.39
11760 */ 11603 */
11761 u32 raw_ver = REG_RD(bp, phy->ver_addr); 11604 u32 raw_ver = REG_RD(bp, phy->ver_addr);
@@ -11765,8 +11608,7 @@ static int bnx2x_populate_ext_phy(struct bnx2x *bp,
11765 SUPPORTED_100baseT_Full); 11608 SUPPORTED_100baseT_Full);
11766 } 11609 }
11767 11610
11768 /* 11611 /* In case mdc/mdio_access of the external phy is different than the
11769 * In case mdc/mdio_access of the external phy is different than the
11770 * mdc/mdio access of the XGXS, a HW lock must be taken in each access 11612 * mdc/mdio access of the XGXS, a HW lock must be taken in each access
11771 * to prevent one port interfere with another port's CL45 operations. 11613 * to prevent one port interfere with another port's CL45 operations.
11772 */ 11614 */
@@ -11936,13 +11778,16 @@ int bnx2x_phy_probe(struct link_params *params)
11936 if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN) 11778 if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN)
11937 break; 11779 break;
11938 11780
11781 if (params->feature_config_flags &
11782 FEATURE_CONFIG_DISABLE_REMOTE_FAULT_DET)
11783 phy->flags &= ~FLAGS_TX_ERROR_CHECK;
11784
11939 sync_offset = params->shmem_base + 11785 sync_offset = params->shmem_base +
11940 offsetof(struct shmem_region, 11786 offsetof(struct shmem_region,
11941 dev_info.port_hw_config[params->port].media_type); 11787 dev_info.port_hw_config[params->port].media_type);
11942 media_types = REG_RD(bp, sync_offset); 11788 media_types = REG_RD(bp, sync_offset);
11943 11789
11944 /* 11790 /* Update media type for non-PMF sync only for the first time
11945 * Update media type for non-PMF sync only for the first time
11946 * In case the media type changes afterwards, it will be updated 11791 * In case the media type changes afterwards, it will be updated
11947 * using the update_status function 11792 * using the update_status function
11948 */ 11793 */
@@ -12016,8 +11861,7 @@ void bnx2x_init_xmac_loopback(struct link_params *params,
12016 vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; 11861 vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
12017 vars->mac_type = MAC_TYPE_XMAC; 11862 vars->mac_type = MAC_TYPE_XMAC;
12018 vars->phy_flags = PHY_XGXS_FLAG; 11863 vars->phy_flags = PHY_XGXS_FLAG;
12019 /* 11864 /* Set WC to loopback mode since link is required to provide clock
12020 * Set WC to loopback mode since link is required to provide clock
12021 * to the XMAC in 20G mode 11865 * to the XMAC in 20G mode
12022 */ 11866 */
12023 bnx2x_set_aer_mmd(params, &params->phy[0]); 11867 bnx2x_set_aer_mmd(params, &params->phy[0]);
@@ -12162,6 +12006,7 @@ int bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
12162 bnx2x_link_int_enable(params); 12006 bnx2x_link_int_enable(params);
12163 break; 12007 break;
12164 } 12008 }
12009 bnx2x_update_mng(params, vars->link_status);
12165 return 0; 12010 return 0;
12166} 12011}
12167 12012
@@ -12302,7 +12147,8 @@ static int bnx2x_8073_common_init_phy(struct bnx2x *bp,
12302 NIG_MASK_MI_INT)); 12147 NIG_MASK_MI_INT));
12303 12148
12304 /* Need to take the phy out of low power mode in order 12149 /* Need to take the phy out of low power mode in order
12305 to write to access its registers */ 12150 * to write to access its registers
12151 */
12306 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2, 12152 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
12307 MISC_REGISTERS_GPIO_OUTPUT_HIGH, 12153 MISC_REGISTERS_GPIO_OUTPUT_HIGH,
12308 port); 12154 port);
@@ -12350,8 +12196,7 @@ static int bnx2x_8073_common_init_phy(struct bnx2x *bp,
12350 (val | 1<<10)); 12196 (val | 1<<10));
12351 } 12197 }
12352 12198
12353 /* 12199 /* Toggle Transmitter: Power down and then up with 600ms delay
12354 * Toggle Transmitter: Power down and then up with 600ms delay
12355 * between 12200 * between
12356 */ 12201 */
12357 msleep(600); 12202 msleep(600);
@@ -12494,8 +12339,7 @@ static int bnx2x_8727_common_init_phy(struct bnx2x *bp,
12494 reset_gpio = MISC_REGISTERS_GPIO_1; 12339 reset_gpio = MISC_REGISTERS_GPIO_1;
12495 port = 1; 12340 port = 1;
12496 12341
12497 /* 12342 /* Retrieve the reset gpio/port which control the reset.
12498 * Retrieve the reset gpio/port which control the reset.
12499 * Default is GPIO1, PORT1 12343 * Default is GPIO1, PORT1
12500 */ 12344 */
12501 bnx2x_get_ext_phy_reset_gpio(bp, shmem_base_path[0], 12345 bnx2x_get_ext_phy_reset_gpio(bp, shmem_base_path[0],
@@ -12670,8 +12514,7 @@ static int bnx2x_ext_phy_common_init(struct bnx2x *bp, u32 shmem_base_path[],
12670 break; 12514 break;
12671 12515
12672 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726: 12516 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726:
12673 /* 12517 /* GPIO1 affects both ports, so there's need to pull
12674 * GPIO1 affects both ports, so there's need to pull
12675 * it for single port alone 12518 * it for single port alone
12676 */ 12519 */
12677 rc = bnx2x_8726_common_init_phy(bp, shmem_base_path, 12520 rc = bnx2x_8726_common_init_phy(bp, shmem_base_path,
@@ -12679,8 +12522,7 @@ static int bnx2x_ext_phy_common_init(struct bnx2x *bp, u32 shmem_base_path[],
12679 phy_index, chip_id); 12522 phy_index, chip_id);
12680 break; 12523 break;
12681 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833: 12524 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833:
12682 /* 12525 /* GPIO3's are linked, and so both need to be toggled
12683 * GPIO3's are linked, and so both need to be toggled
12684 * to obtain required 2us pulse. 12526 * to obtain required 2us pulse.
12685 */ 12527 */
12686 rc = bnx2x_84833_common_init_phy(bp, shmem_base_path, 12528 rc = bnx2x_84833_common_init_phy(bp, shmem_base_path,
@@ -12779,7 +12621,8 @@ static void bnx2x_check_over_curr(struct link_params *params,
12779} 12621}
12780 12622
12781static void bnx2x_analyze_link_error(struct link_params *params, 12623static void bnx2x_analyze_link_error(struct link_params *params,
12782 struct link_vars *vars, u32 lss_status) 12624 struct link_vars *vars, u32 lss_status,
12625 u8 notify)
12783{ 12626{
12784 struct bnx2x *bp = params->bp; 12627 struct bnx2x *bp = params->bp;
12785 /* Compare new value with previous value */ 12628 /* Compare new value with previous value */
@@ -12793,8 +12636,7 @@ static void bnx2x_analyze_link_error(struct link_params *params,
12793 DP(NETIF_MSG_LINK, "Link changed:%x %x->%x\n", vars->link_up, 12636 DP(NETIF_MSG_LINK, "Link changed:%x %x->%x\n", vars->link_up,
12794 half_open_conn, lss_status); 12637 half_open_conn, lss_status);
12795 12638
12796 /* 12639 /* a. Update shmem->link_status accordingly
12797 * a. Update shmem->link_status accordingly
12798 * b. Update link_vars->link_up 12640 * b. Update link_vars->link_up
12799 */ 12641 */
12800 if (lss_status) { 12642 if (lss_status) {
@@ -12802,8 +12644,10 @@ static void bnx2x_analyze_link_error(struct link_params *params,
12802 vars->link_status &= ~LINK_STATUS_LINK_UP; 12644 vars->link_status &= ~LINK_STATUS_LINK_UP;
12803 vars->link_up = 0; 12645 vars->link_up = 0;
12804 vars->phy_flags |= PHY_HALF_OPEN_CONN_FLAG; 12646 vars->phy_flags |= PHY_HALF_OPEN_CONN_FLAG;
12805 /* 12647
12806 * Set LED mode to off since the PHY doesn't know about these 12648 /* activate nig drain */
12649 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 1);
12650 /* Set LED mode to off since the PHY doesn't know about these
12807 * errors 12651 * errors
12808 */ 12652 */
12809 led_mode = LED_MODE_OFF; 12653 led_mode = LED_MODE_OFF;
@@ -12813,7 +12657,11 @@ static void bnx2x_analyze_link_error(struct link_params *params,
12813 vars->link_up = 1; 12657 vars->link_up = 1;
12814 vars->phy_flags &= ~PHY_HALF_OPEN_CONN_FLAG; 12658 vars->phy_flags &= ~PHY_HALF_OPEN_CONN_FLAG;
12815 led_mode = LED_MODE_OPER; 12659 led_mode = LED_MODE_OPER;
12660
12661 /* Clear nig drain */
12662 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0);
12816 } 12663 }
12664 bnx2x_sync_link(params, vars);
12817 /* Update the LED according to the link state */ 12665 /* Update the LED according to the link state */
12818 bnx2x_set_led(params, vars, led_mode, SPEED_10000); 12666 bnx2x_set_led(params, vars, led_mode, SPEED_10000);
12819 12667
@@ -12822,7 +12670,8 @@ static void bnx2x_analyze_link_error(struct link_params *params,
12822 12670
12823 /* C. Trigger General Attention */ 12671 /* C. Trigger General Attention */
12824 vars->periodic_flags |= PERIODIC_FLAGS_LINK_EVENT; 12672 vars->periodic_flags |= PERIODIC_FLAGS_LINK_EVENT;
12825 bnx2x_notify_link_changed(bp); 12673 if (notify)
12674 bnx2x_notify_link_changed(bp);
12826} 12675}
12827 12676
12828/****************************************************************************** 12677/******************************************************************************
@@ -12834,22 +12683,23 @@ static void bnx2x_analyze_link_error(struct link_params *params,
12834* a fault, for example, due to break in the TX side of fiber. 12683* a fault, for example, due to break in the TX side of fiber.
12835* 12684*
12836******************************************************************************/ 12685******************************************************************************/
12837static void bnx2x_check_half_open_conn(struct link_params *params, 12686int bnx2x_check_half_open_conn(struct link_params *params,
12838 struct link_vars *vars) 12687 struct link_vars *vars,
12688 u8 notify)
12839{ 12689{
12840 struct bnx2x *bp = params->bp; 12690 struct bnx2x *bp = params->bp;
12841 u32 lss_status = 0; 12691 u32 lss_status = 0;
12842 u32 mac_base; 12692 u32 mac_base;
12843 /* In case link status is physically up @ 10G do */ 12693 /* In case link status is physically up @ 10G do */
12844 if ((vars->phy_flags & PHY_PHYSICAL_LINK_FLAG) == 0) 12694 if (((vars->phy_flags & PHY_PHYSICAL_LINK_FLAG) == 0) ||
12845 return; 12695 (REG_RD(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4)))
12696 return 0;
12846 12697
12847 if (CHIP_IS_E3(bp) && 12698 if (CHIP_IS_E3(bp) &&
12848 (REG_RD(bp, MISC_REG_RESET_REG_2) & 12699 (REG_RD(bp, MISC_REG_RESET_REG_2) &
12849 (MISC_REGISTERS_RESET_REG_2_XMAC))) { 12700 (MISC_REGISTERS_RESET_REG_2_XMAC))) {
12850 /* Check E3 XMAC */ 12701 /* Check E3 XMAC */
12851 /* 12702 /* Note that link speed cannot be queried here, since it may be
12852 * Note that link speed cannot be queried here, since it may be
12853 * zero while link is down. In case UMAC is active, LSS will 12703 * zero while link is down. In case UMAC is active, LSS will
12854 * simply not be set 12704 * simply not be set
12855 */ 12705 */
@@ -12863,7 +12713,7 @@ static void bnx2x_check_half_open_conn(struct link_params *params,
12863 if (REG_RD(bp, mac_base + XMAC_REG_RX_LSS_STATUS)) 12713 if (REG_RD(bp, mac_base + XMAC_REG_RX_LSS_STATUS))
12864 lss_status = 1; 12714 lss_status = 1;
12865 12715
12866 bnx2x_analyze_link_error(params, vars, lss_status); 12716 bnx2x_analyze_link_error(params, vars, lss_status, notify);
12867 } else if (REG_RD(bp, MISC_REG_RESET_REG_2) & 12717 } else if (REG_RD(bp, MISC_REG_RESET_REG_2) &
12868 (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << params->port)) { 12718 (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << params->port)) {
12869 /* Check E1X / E2 BMAC */ 12719 /* Check E1X / E2 BMAC */
@@ -12880,18 +12730,21 @@ static void bnx2x_check_half_open_conn(struct link_params *params,
12880 REG_RD_DMAE(bp, mac_base + lss_status_reg, wb_data, 2); 12730 REG_RD_DMAE(bp, mac_base + lss_status_reg, wb_data, 2);
12881 lss_status = (wb_data[0] > 0); 12731 lss_status = (wb_data[0] > 0);
12882 12732
12883 bnx2x_analyze_link_error(params, vars, lss_status); 12733 bnx2x_analyze_link_error(params, vars, lss_status, notify);
12884 } 12734 }
12735 return 0;
12885} 12736}
12886 12737
12887void bnx2x_period_func(struct link_params *params, struct link_vars *vars) 12738void bnx2x_period_func(struct link_params *params, struct link_vars *vars)
12888{ 12739{
12889 struct bnx2x *bp = params->bp;
12890 u16 phy_idx; 12740 u16 phy_idx;
12741 struct bnx2x *bp = params->bp;
12891 for (phy_idx = INT_PHY; phy_idx < MAX_PHYS; phy_idx++) { 12742 for (phy_idx = INT_PHY; phy_idx < MAX_PHYS; phy_idx++) {
12892 if (params->phy[phy_idx].flags & FLAGS_TX_ERROR_CHECK) { 12743 if (params->phy[phy_idx].flags & FLAGS_TX_ERROR_CHECK) {
12893 bnx2x_set_aer_mmd(params, &params->phy[phy_idx]); 12744 bnx2x_set_aer_mmd(params, &params->phy[phy_idx]);
12894 bnx2x_check_half_open_conn(params, vars); 12745 if (bnx2x_check_half_open_conn(params, vars, 1) !=
12746 0)
12747 DP(NETIF_MSG_LINK, "Fault detection failed\n");
12895 break; 12748 break;
12896 } 12749 }
12897 } 12750 }
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h
index 763535ee4832..00f26d319ba4 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h
@@ -256,6 +256,7 @@ struct link_params {
256#define FEATURE_CONFIG_BC_SUPPORTS_DUAL_PHY_OPT_MDL_VRFY (1<<3) 256#define FEATURE_CONFIG_BC_SUPPORTS_DUAL_PHY_OPT_MDL_VRFY (1<<3)
257#define FEATURE_CONFIG_AUTOGREEEN_ENABLED (1<<9) 257#define FEATURE_CONFIG_AUTOGREEEN_ENABLED (1<<9)
258#define FEATURE_CONFIG_BC_SUPPORTS_SFP_TX_DISABLED (1<<10) 258#define FEATURE_CONFIG_BC_SUPPORTS_SFP_TX_DISABLED (1<<10)
259#define FEATURE_CONFIG_DISABLE_REMOTE_FAULT_DET (1<<11)
259 /* Will be populated during common init */ 260 /* Will be populated during common init */
260 struct bnx2x_phy phy[MAX_PHYS]; 261 struct bnx2x_phy phy[MAX_PHYS];
261 262
@@ -495,4 +496,6 @@ int bnx2x_sfp_module_detection(struct bnx2x_phy *phy,
495 496
496void bnx2x_period_func(struct link_params *params, struct link_vars *vars); 497void bnx2x_period_func(struct link_params *params, struct link_vars *vars);
497 498
499int bnx2x_check_half_open_conn(struct link_params *params,
500 struct link_vars *vars, u8 notify);
498#endif /* BNX2X_LINK_H */ 501#endif /* BNX2X_LINK_H */
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index e077d2508727..1da25d796995 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -39,7 +39,6 @@
39#include <linux/time.h> 39#include <linux/time.h>
40#include <linux/ethtool.h> 40#include <linux/ethtool.h>
41#include <linux/mii.h> 41#include <linux/mii.h>
42#include <linux/if.h>
43#include <linux/if_vlan.h> 42#include <linux/if_vlan.h>
44#include <net/ip.h> 43#include <net/ip.h>
45#include <net/ipv6.h> 44#include <net/ipv6.h>
@@ -93,15 +92,11 @@ MODULE_FIRMWARE(FW_FILE_NAME_E1);
93MODULE_FIRMWARE(FW_FILE_NAME_E1H); 92MODULE_FIRMWARE(FW_FILE_NAME_E1H);
94MODULE_FIRMWARE(FW_FILE_NAME_E2); 93MODULE_FIRMWARE(FW_FILE_NAME_E2);
95 94
96static int multi_mode = 1;
97module_param(multi_mode, int, 0);
98MODULE_PARM_DESC(multi_mode, " Multi queue mode "
99 "(0 Disable; 1 Enable (default))");
100 95
101int num_queues; 96int num_queues;
102module_param(num_queues, int, 0); 97module_param(num_queues, int, 0);
103MODULE_PARM_DESC(num_queues, " Number of queues for multi_mode=1" 98MODULE_PARM_DESC(num_queues,
104 " (default is as a number of CPUs)"); 99 " Set number of queues (default is as a number of CPUs)");
105 100
106static int disable_tpa; 101static int disable_tpa;
107module_param(disable_tpa, int, 0); 102module_param(disable_tpa, int, 0);
@@ -141,7 +136,9 @@ enum bnx2x_board_type {
141 BCM57810, 136 BCM57810,
142 BCM57810_MF, 137 BCM57810_MF,
143 BCM57840, 138 BCM57840,
144 BCM57840_MF 139 BCM57840_MF,
140 BCM57811,
141 BCM57811_MF
145}; 142};
146 143
147/* indexed by board_type, above */ 144/* indexed by board_type, above */
@@ -158,8 +155,9 @@ static struct {
158 { "Broadcom NetXtreme II BCM57810 10 Gigabit Ethernet" }, 155 { "Broadcom NetXtreme II BCM57810 10 Gigabit Ethernet" },
159 { "Broadcom NetXtreme II BCM57810 10 Gigabit Ethernet Multi Function" }, 156 { "Broadcom NetXtreme II BCM57810 10 Gigabit Ethernet Multi Function" },
160 { "Broadcom NetXtreme II BCM57840 10/20 Gigabit Ethernet" }, 157 { "Broadcom NetXtreme II BCM57840 10/20 Gigabit Ethernet" },
161 { "Broadcom NetXtreme II BCM57840 10/20 Gigabit " 158 { "Broadcom NetXtreme II BCM57840 10/20 Gigabit Ethernet Multi Function"},
162 "Ethernet Multi Function"} 159 { "Broadcom NetXtreme II BCM57811 10 Gigabit Ethernet"},
160 { "Broadcom NetXtreme II BCM57811 10 Gigabit Ethernet Multi Function"},
163}; 161};
164 162
165#ifndef PCI_DEVICE_ID_NX2_57710 163#ifndef PCI_DEVICE_ID_NX2_57710
@@ -195,6 +193,12 @@ static struct {
195#ifndef PCI_DEVICE_ID_NX2_57840_MF 193#ifndef PCI_DEVICE_ID_NX2_57840_MF
196#define PCI_DEVICE_ID_NX2_57840_MF CHIP_NUM_57840_MF 194#define PCI_DEVICE_ID_NX2_57840_MF CHIP_NUM_57840_MF
197#endif 195#endif
196#ifndef PCI_DEVICE_ID_NX2_57811
197#define PCI_DEVICE_ID_NX2_57811 CHIP_NUM_57811
198#endif
199#ifndef PCI_DEVICE_ID_NX2_57811_MF
200#define PCI_DEVICE_ID_NX2_57811_MF CHIP_NUM_57811_MF
201#endif
198static DEFINE_PCI_DEVICE_TABLE(bnx2x_pci_tbl) = { 202static DEFINE_PCI_DEVICE_TABLE(bnx2x_pci_tbl) = {
199 { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57710), BCM57710 }, 203 { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57710), BCM57710 },
200 { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57711), BCM57711 }, 204 { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57711), BCM57711 },
@@ -207,6 +211,8 @@ static DEFINE_PCI_DEVICE_TABLE(bnx2x_pci_tbl) = {
207 { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57810_MF), BCM57810_MF }, 211 { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57810_MF), BCM57810_MF },
208 { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57840), BCM57840 }, 212 { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57840), BCM57840 },
209 { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57840_MF), BCM57840_MF }, 213 { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57840_MF), BCM57840_MF },
214 { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57811), BCM57811 },
215 { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57811_MF), BCM57811_MF },
210 { 0 } 216 { 0 }
211}; 217};
212 218
@@ -309,67 +315,6 @@ static u32 bnx2x_reg_rd_ind(struct bnx2x *bp, u32 addr)
309#define DMAE_DP_DST_PCI "pci dst_addr [%x:%08x]" 315#define DMAE_DP_DST_PCI "pci dst_addr [%x:%08x]"
310#define DMAE_DP_DST_NONE "dst_addr [none]" 316#define DMAE_DP_DST_NONE "dst_addr [none]"
311 317
312static void bnx2x_dp_dmae(struct bnx2x *bp, struct dmae_command *dmae,
313 int msglvl)
314{
315 u32 src_type = dmae->opcode & DMAE_COMMAND_SRC;
316
317 switch (dmae->opcode & DMAE_COMMAND_DST) {
318 case DMAE_CMD_DST_PCI:
319 if (src_type == DMAE_CMD_SRC_PCI)
320 DP(msglvl, "DMAE: opcode 0x%08x\n"
321 "src [%x:%08x], len [%d*4], dst [%x:%08x]\n"
322 "comp_addr [%x:%08x], comp_val 0x%08x\n",
323 dmae->opcode, dmae->src_addr_hi, dmae->src_addr_lo,
324 dmae->len, dmae->dst_addr_hi, dmae->dst_addr_lo,
325 dmae->comp_addr_hi, dmae->comp_addr_lo,
326 dmae->comp_val);
327 else
328 DP(msglvl, "DMAE: opcode 0x%08x\n"
329 "src [%08x], len [%d*4], dst [%x:%08x]\n"
330 "comp_addr [%x:%08x], comp_val 0x%08x\n",
331 dmae->opcode, dmae->src_addr_lo >> 2,
332 dmae->len, dmae->dst_addr_hi, dmae->dst_addr_lo,
333 dmae->comp_addr_hi, dmae->comp_addr_lo,
334 dmae->comp_val);
335 break;
336 case DMAE_CMD_DST_GRC:
337 if (src_type == DMAE_CMD_SRC_PCI)
338 DP(msglvl, "DMAE: opcode 0x%08x\n"
339 "src [%x:%08x], len [%d*4], dst_addr [%08x]\n"
340 "comp_addr [%x:%08x], comp_val 0x%08x\n",
341 dmae->opcode, dmae->src_addr_hi, dmae->src_addr_lo,
342 dmae->len, dmae->dst_addr_lo >> 2,
343 dmae->comp_addr_hi, dmae->comp_addr_lo,
344 dmae->comp_val);
345 else
346 DP(msglvl, "DMAE: opcode 0x%08x\n"
347 "src [%08x], len [%d*4], dst [%08x]\n"
348 "comp_addr [%x:%08x], comp_val 0x%08x\n",
349 dmae->opcode, dmae->src_addr_lo >> 2,
350 dmae->len, dmae->dst_addr_lo >> 2,
351 dmae->comp_addr_hi, dmae->comp_addr_lo,
352 dmae->comp_val);
353 break;
354 default:
355 if (src_type == DMAE_CMD_SRC_PCI)
356 DP(msglvl, "DMAE: opcode 0x%08x\n"
357 "src_addr [%x:%08x] len [%d * 4] dst_addr [none]\n"
358 "comp_addr [%x:%08x] comp_val 0x%08x\n",
359 dmae->opcode, dmae->src_addr_hi, dmae->src_addr_lo,
360 dmae->len, dmae->comp_addr_hi, dmae->comp_addr_lo,
361 dmae->comp_val);
362 else
363 DP(msglvl, "DMAE: opcode 0x%08x\n"
364 "src_addr [%08x] len [%d * 4] dst_addr [none]\n"
365 "comp_addr [%x:%08x] comp_val 0x%08x\n",
366 dmae->opcode, dmae->src_addr_lo >> 2,
367 dmae->len, dmae->comp_addr_hi, dmae->comp_addr_lo,
368 dmae->comp_val);
369 break;
370 }
371
372}
373 318
374/* copy command into DMAE command memory and set DMAE command go */ 319/* copy command into DMAE command memory and set DMAE command go */
375void bnx2x_post_dmae(struct bnx2x *bp, struct dmae_command *dmae, int idx) 320void bnx2x_post_dmae(struct bnx2x *bp, struct dmae_command *dmae, int idx)
@@ -506,8 +451,6 @@ void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr,
506 dmae.dst_addr_hi = 0; 451 dmae.dst_addr_hi = 0;
507 dmae.len = len32; 452 dmae.len = len32;
508 453
509 bnx2x_dp_dmae(bp, &dmae, BNX2X_MSG_OFF);
510
511 /* issue the command and wait for completion */ 454 /* issue the command and wait for completion */
512 bnx2x_issue_dmae_with_comp(bp, &dmae); 455 bnx2x_issue_dmae_with_comp(bp, &dmae);
513} 456}
@@ -540,8 +483,6 @@ void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32)
540 dmae.dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, wb_data)); 483 dmae.dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, wb_data));
541 dmae.len = len32; 484 dmae.len = len32;
542 485
543 bnx2x_dp_dmae(bp, &dmae, BNX2X_MSG_OFF);
544
545 /* issue the command and wait for completion */ 486 /* issue the command and wait for completion */
546 bnx2x_issue_dmae_with_comp(bp, &dmae); 487 bnx2x_issue_dmae_with_comp(bp, &dmae);
547} 488}
@@ -562,27 +503,6 @@ static void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr,
562 bnx2x_write_dmae(bp, phys_addr + offset, addr + offset, len); 503 bnx2x_write_dmae(bp, phys_addr + offset, addr + offset, len);
563} 504}
564 505
565/* used only for slowpath so not inlined */
566static void bnx2x_wb_wr(struct bnx2x *bp, int reg, u32 val_hi, u32 val_lo)
567{
568 u32 wb_write[2];
569
570 wb_write[0] = val_hi;
571 wb_write[1] = val_lo;
572 REG_WR_DMAE(bp, reg, wb_write, 2);
573}
574
575#ifdef USE_WB_RD
576static u64 bnx2x_wb_rd(struct bnx2x *bp, int reg)
577{
578 u32 wb_data[2];
579
580 REG_RD_DMAE(bp, reg, wb_data, 2);
581
582 return HILO_U64(wb_data[0], wb_data[1]);
583}
584#endif
585
586static int bnx2x_mc_assert(struct bnx2x *bp) 506static int bnx2x_mc_assert(struct bnx2x *bp)
587{ 507{
588 char last_idx; 508 char last_idx;
@@ -1425,8 +1345,9 @@ static void bnx2x_hc_int_enable(struct bnx2x *bp)
1425static void bnx2x_igu_int_enable(struct bnx2x *bp) 1345static void bnx2x_igu_int_enable(struct bnx2x *bp)
1426{ 1346{
1427 u32 val; 1347 u32 val;
1428 int msix = (bp->flags & USING_MSIX_FLAG) ? 1 : 0; 1348 bool msix = (bp->flags & USING_MSIX_FLAG) ? true : false;
1429 int msi = (bp->flags & USING_MSI_FLAG) ? 1 : 0; 1349 bool single_msix = (bp->flags & USING_SINGLE_MSIX_FLAG) ? true : false;
1350 bool msi = (bp->flags & USING_MSI_FLAG) ? true : false;
1430 1351
1431 val = REG_RD(bp, IGU_REG_PF_CONFIGURATION); 1352 val = REG_RD(bp, IGU_REG_PF_CONFIGURATION);
1432 1353
@@ -1436,6 +1357,9 @@ static void bnx2x_igu_int_enable(struct bnx2x *bp)
1436 val |= (IGU_PF_CONF_FUNC_EN | 1357 val |= (IGU_PF_CONF_FUNC_EN |
1437 IGU_PF_CONF_MSI_MSIX_EN | 1358 IGU_PF_CONF_MSI_MSIX_EN |
1438 IGU_PF_CONF_ATTN_BIT_EN); 1359 IGU_PF_CONF_ATTN_BIT_EN);
1360
1361 if (single_msix)
1362 val |= IGU_PF_CONF_SINGLE_ISR_EN;
1439 } else if (msi) { 1363 } else if (msi) {
1440 val &= ~IGU_PF_CONF_INT_LINE_EN; 1364 val &= ~IGU_PF_CONF_INT_LINE_EN;
1441 val |= (IGU_PF_CONF_FUNC_EN | 1365 val |= (IGU_PF_CONF_FUNC_EN |
@@ -1455,6 +1379,9 @@ static void bnx2x_igu_int_enable(struct bnx2x *bp)
1455 1379
1456 REG_WR(bp, IGU_REG_PF_CONFIGURATION, val); 1380 REG_WR(bp, IGU_REG_PF_CONFIGURATION, val);
1457 1381
1382 if (val & IGU_PF_CONF_INT_LINE_EN)
1383 pci_intx(bp->pdev, true);
1384
1458 barrier(); 1385 barrier();
1459 1386
1460 /* init leading/trailing edge */ 1387 /* init leading/trailing edge */
@@ -2229,40 +2156,6 @@ u8 bnx2x_link_test(struct bnx2x *bp, u8 is_serdes)
2229 return rc; 2156 return rc;
2230} 2157}
2231 2158
2232static void bnx2x_init_port_minmax(struct bnx2x *bp)
2233{
2234 u32 r_param = bp->link_vars.line_speed / 8;
2235 u32 fair_periodic_timeout_usec;
2236 u32 t_fair;
2237
2238 memset(&(bp->cmng.rs_vars), 0,
2239 sizeof(struct rate_shaping_vars_per_port));
2240 memset(&(bp->cmng.fair_vars), 0, sizeof(struct fairness_vars_per_port));
2241
2242 /* 100 usec in SDM ticks = 25 since each tick is 4 usec */
2243 bp->cmng.rs_vars.rs_periodic_timeout = RS_PERIODIC_TIMEOUT_USEC / 4;
2244
2245 /* this is the threshold below which no timer arming will occur
2246 1.25 coefficient is for the threshold to be a little bigger
2247 than the real time, to compensate for timer in-accuracy */
2248 bp->cmng.rs_vars.rs_threshold =
2249 (RS_PERIODIC_TIMEOUT_USEC * r_param * 5) / 4;
2250
2251 /* resolution of fairness timer */
2252 fair_periodic_timeout_usec = QM_ARB_BYTES / r_param;
2253 /* for 10G it is 1000usec. for 1G it is 10000usec. */
2254 t_fair = T_FAIR_COEF / bp->link_vars.line_speed;
2255
2256 /* this is the threshold below which we won't arm the timer anymore */
2257 bp->cmng.fair_vars.fair_threshold = QM_ARB_BYTES;
2258
2259 /* we multiply by 1e3/8 to get bytes/msec.
2260 We don't want the credits to pass a credit
2261 of the t_fair*FAIR_MEM (algorithm resolution) */
2262 bp->cmng.fair_vars.upper_bound = r_param * t_fair * FAIR_MEM;
2263 /* since each tick is 4 usec */
2264 bp->cmng.fair_vars.fairness_timeout = fair_periodic_timeout_usec / 4;
2265}
2266 2159
2267/* Calculates the sum of vn_min_rates. 2160/* Calculates the sum of vn_min_rates.
2268 It's needed for further normalizing of the min_rates. 2161 It's needed for further normalizing of the min_rates.
@@ -2273,12 +2166,12 @@ static void bnx2x_init_port_minmax(struct bnx2x *bp)
2273 In the later case fainess algorithm should be deactivated. 2166 In the later case fainess algorithm should be deactivated.
2274 If not all min_rates are zero then those that are zeroes will be set to 1. 2167 If not all min_rates are zero then those that are zeroes will be set to 1.
2275 */ 2168 */
2276static void bnx2x_calc_vn_weight_sum(struct bnx2x *bp) 2169static void bnx2x_calc_vn_min(struct bnx2x *bp,
2170 struct cmng_init_input *input)
2277{ 2171{
2278 int all_zero = 1; 2172 int all_zero = 1;
2279 int vn; 2173 int vn;
2280 2174
2281 bp->vn_weight_sum = 0;
2282 for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++) { 2175 for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++) {
2283 u32 vn_cfg = bp->mf_config[vn]; 2176 u32 vn_cfg = bp->mf_config[vn];
2284 u32 vn_min_rate = ((vn_cfg & FUNC_MF_CFG_MIN_BW_MASK) >> 2177 u32 vn_min_rate = ((vn_cfg & FUNC_MF_CFG_MIN_BW_MASK) >>
@@ -2286,106 +2179,56 @@ static void bnx2x_calc_vn_weight_sum(struct bnx2x *bp)
2286 2179
2287 /* Skip hidden vns */ 2180 /* Skip hidden vns */
2288 if (vn_cfg & FUNC_MF_CFG_FUNC_HIDE) 2181 if (vn_cfg & FUNC_MF_CFG_FUNC_HIDE)
2289 continue; 2182 vn_min_rate = 0;
2290
2291 /* If min rate is zero - set it to 1 */ 2183 /* If min rate is zero - set it to 1 */
2292 if (!vn_min_rate) 2184 else if (!vn_min_rate)
2293 vn_min_rate = DEF_MIN_RATE; 2185 vn_min_rate = DEF_MIN_RATE;
2294 else 2186 else
2295 all_zero = 0; 2187 all_zero = 0;
2296 2188
2297 bp->vn_weight_sum += vn_min_rate; 2189 input->vnic_min_rate[vn] = vn_min_rate;
2298 } 2190 }
2299 2191
2300 /* if ETS or all min rates are zeros - disable fairness */ 2192 /* if ETS or all min rates are zeros - disable fairness */
2301 if (BNX2X_IS_ETS_ENABLED(bp)) { 2193 if (BNX2X_IS_ETS_ENABLED(bp)) {
2302 bp->cmng.flags.cmng_enables &= 2194 input->flags.cmng_enables &=
2303 ~CMNG_FLAGS_PER_PORT_FAIRNESS_VN; 2195 ~CMNG_FLAGS_PER_PORT_FAIRNESS_VN;
2304 DP(NETIF_MSG_IFUP, "Fairness will be disabled due to ETS\n"); 2196 DP(NETIF_MSG_IFUP, "Fairness will be disabled due to ETS\n");
2305 } else if (all_zero) { 2197 } else if (all_zero) {
2306 bp->cmng.flags.cmng_enables &= 2198 input->flags.cmng_enables &=
2307 ~CMNG_FLAGS_PER_PORT_FAIRNESS_VN; 2199 ~CMNG_FLAGS_PER_PORT_FAIRNESS_VN;
2308 DP(NETIF_MSG_IFUP, "All MIN values are zeroes" 2200 DP(NETIF_MSG_IFUP,
2309 " fairness will be disabled\n"); 2201 "All MIN values are zeroes fairness will be disabled\n");
2310 } else 2202 } else
2311 bp->cmng.flags.cmng_enables |= 2203 input->flags.cmng_enables |=
2312 CMNG_FLAGS_PER_PORT_FAIRNESS_VN; 2204 CMNG_FLAGS_PER_PORT_FAIRNESS_VN;
2313} 2205}
2314 2206
2315static void bnx2x_init_vn_minmax(struct bnx2x *bp, int vn) 2207static void bnx2x_calc_vn_max(struct bnx2x *bp, int vn,
2208 struct cmng_init_input *input)
2316{ 2209{
2317 struct rate_shaping_vars_per_vn m_rs_vn; 2210 u16 vn_max_rate;
2318 struct fairness_vars_per_vn m_fair_vn;
2319 u32 vn_cfg = bp->mf_config[vn]; 2211 u32 vn_cfg = bp->mf_config[vn];
2320 int func = func_by_vn(bp, vn);
2321 u16 vn_min_rate, vn_max_rate;
2322 int i;
2323 2212
2324 /* If function is hidden - set min and max to zeroes */ 2213 if (vn_cfg & FUNC_MF_CFG_FUNC_HIDE)
2325 if (vn_cfg & FUNC_MF_CFG_FUNC_HIDE) {
2326 vn_min_rate = 0;
2327 vn_max_rate = 0; 2214 vn_max_rate = 0;
2328 2215 else {
2329 } else {
2330 u32 maxCfg = bnx2x_extract_max_cfg(bp, vn_cfg); 2216 u32 maxCfg = bnx2x_extract_max_cfg(bp, vn_cfg);
2331 2217
2332 vn_min_rate = ((vn_cfg & FUNC_MF_CFG_MIN_BW_MASK) >> 2218 if (IS_MF_SI(bp)) {
2333 FUNC_MF_CFG_MIN_BW_SHIFT) * 100;
2334 /* If fairness is enabled (not all min rates are zeroes) and
2335 if current min rate is zero - set it to 1.
2336 This is a requirement of the algorithm. */
2337 if (bp->vn_weight_sum && (vn_min_rate == 0))
2338 vn_min_rate = DEF_MIN_RATE;
2339
2340 if (IS_MF_SI(bp))
2341 /* maxCfg in percents of linkspeed */ 2219 /* maxCfg in percents of linkspeed */
2342 vn_max_rate = (bp->link_vars.line_speed * maxCfg) / 100; 2220 vn_max_rate = (bp->link_vars.line_speed * maxCfg) / 100;
2343 else 2221 } else /* SD modes */
2344 /* maxCfg is absolute in 100Mb units */ 2222 /* maxCfg is absolute in 100Mb units */
2345 vn_max_rate = maxCfg * 100; 2223 vn_max_rate = maxCfg * 100;
2346 } 2224 }
2347 2225
2348 DP(NETIF_MSG_IFUP, 2226 DP(NETIF_MSG_IFUP, "vn %d: vn_max_rate %d\n", vn, vn_max_rate);
2349 "func %d: vn_min_rate %d vn_max_rate %d vn_weight_sum %d\n", 2227
2350 func, vn_min_rate, vn_max_rate, bp->vn_weight_sum); 2228 input->vnic_max_rate[vn] = vn_max_rate;
2351
2352 memset(&m_rs_vn, 0, sizeof(struct rate_shaping_vars_per_vn));
2353 memset(&m_fair_vn, 0, sizeof(struct fairness_vars_per_vn));
2354
2355 /* global vn counter - maximal Mbps for this vn */
2356 m_rs_vn.vn_counter.rate = vn_max_rate;
2357
2358 /* quota - number of bytes transmitted in this period */
2359 m_rs_vn.vn_counter.quota =
2360 (vn_max_rate * RS_PERIODIC_TIMEOUT_USEC) / 8;
2361
2362 if (bp->vn_weight_sum) {
2363 /* credit for each period of the fairness algorithm:
2364 number of bytes in T_FAIR (the vn share the port rate).
2365 vn_weight_sum should not be larger than 10000, thus
2366 T_FAIR_COEF / (8 * vn_weight_sum) will always be greater
2367 than zero */
2368 m_fair_vn.vn_credit_delta =
2369 max_t(u32, (vn_min_rate * (T_FAIR_COEF /
2370 (8 * bp->vn_weight_sum))),
2371 (bp->cmng.fair_vars.fair_threshold +
2372 MIN_ABOVE_THRESH));
2373 DP(NETIF_MSG_IFUP, "m_fair_vn.vn_credit_delta %d\n",
2374 m_fair_vn.vn_credit_delta);
2375 }
2376
2377 /* Store it to internal memory */
2378 for (i = 0; i < sizeof(struct rate_shaping_vars_per_vn)/4; i++)
2379 REG_WR(bp, BAR_XSTRORM_INTMEM +
2380 XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(func) + i * 4,
2381 ((u32 *)(&m_rs_vn))[i]);
2382
2383 for (i = 0; i < sizeof(struct fairness_vars_per_vn)/4; i++)
2384 REG_WR(bp, BAR_XSTRORM_INTMEM +
2385 XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(func) + i * 4,
2386 ((u32 *)(&m_fair_vn))[i]);
2387} 2229}
2388 2230
2231
2389static int bnx2x_get_cmng_fns_mode(struct bnx2x *bp) 2232static int bnx2x_get_cmng_fns_mode(struct bnx2x *bp)
2390{ 2233{
2391 if (CHIP_REV_IS_SLOW(bp)) 2234 if (CHIP_REV_IS_SLOW(bp))
@@ -2427,34 +2270,31 @@ void bnx2x_read_mf_cfg(struct bnx2x *bp)
2427 2270
2428static void bnx2x_cmng_fns_init(struct bnx2x *bp, u8 read_cfg, u8 cmng_type) 2271static void bnx2x_cmng_fns_init(struct bnx2x *bp, u8 read_cfg, u8 cmng_type)
2429{ 2272{
2273 struct cmng_init_input input;
2274 memset(&input, 0, sizeof(struct cmng_init_input));
2275
2276 input.port_rate = bp->link_vars.line_speed;
2430 2277
2431 if (cmng_type == CMNG_FNS_MINMAX) { 2278 if (cmng_type == CMNG_FNS_MINMAX) {
2432 int vn; 2279 int vn;
2433 2280
2434 /* clear cmng_enables */
2435 bp->cmng.flags.cmng_enables = 0;
2436
2437 /* read mf conf from shmem */ 2281 /* read mf conf from shmem */
2438 if (read_cfg) 2282 if (read_cfg)
2439 bnx2x_read_mf_cfg(bp); 2283 bnx2x_read_mf_cfg(bp);
2440 2284
2441 /* Init rate shaping and fairness contexts */
2442 bnx2x_init_port_minmax(bp);
2443
2444 /* vn_weight_sum and enable fairness if not 0 */ 2285 /* vn_weight_sum and enable fairness if not 0 */
2445 bnx2x_calc_vn_weight_sum(bp); 2286 bnx2x_calc_vn_min(bp, &input);
2446 2287
2447 /* calculate and set min-max rate for each vn */ 2288 /* calculate and set min-max rate for each vn */
2448 if (bp->port.pmf) 2289 if (bp->port.pmf)
2449 for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++) 2290 for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++)
2450 bnx2x_init_vn_minmax(bp, vn); 2291 bnx2x_calc_vn_max(bp, vn, &input);
2451 2292
2452 /* always enable rate shaping and fairness */ 2293 /* always enable rate shaping and fairness */
2453 bp->cmng.flags.cmng_enables |= 2294 input.flags.cmng_enables |=
2454 CMNG_FLAGS_PER_PORT_RATE_SHAPING_VN; 2295 CMNG_FLAGS_PER_PORT_RATE_SHAPING_VN;
2455 if (!bp->vn_weight_sum) 2296
2456 DP(NETIF_MSG_IFUP, "All MIN values are zeroes" 2297 bnx2x_init_cmng(&input, &bp->cmng);
2457 " fairness will be disabled\n");
2458 return; 2298 return;
2459 } 2299 }
2460 2300
@@ -6640,13 +6480,16 @@ static int bnx2x_init_hw_port(struct bnx2x *bp)
6640static void bnx2x_ilt_wr(struct bnx2x *bp, u32 index, dma_addr_t addr) 6480static void bnx2x_ilt_wr(struct bnx2x *bp, u32 index, dma_addr_t addr)
6641{ 6481{
6642 int reg; 6482 int reg;
6483 u32 wb_write[2];
6643 6484
6644 if (CHIP_IS_E1(bp)) 6485 if (CHIP_IS_E1(bp))
6645 reg = PXP2_REG_RQ_ONCHIP_AT + index*8; 6486 reg = PXP2_REG_RQ_ONCHIP_AT + index*8;
6646 else 6487 else
6647 reg = PXP2_REG_RQ_ONCHIP_AT_B0 + index*8; 6488 reg = PXP2_REG_RQ_ONCHIP_AT_B0 + index*8;
6648 6489
6649 bnx2x_wb_wr(bp, reg, ONCHIP_ADDR1(addr), ONCHIP_ADDR2(addr)); 6490 wb_write[0] = ONCHIP_ADDR1(addr);
6491 wb_write[1] = ONCHIP_ADDR2(addr);
6492 REG_WR_DMAE(bp, reg, wb_write, 2);
6650} 6493}
6651 6494
6652static inline void bnx2x_igu_clear_sb(struct bnx2x *bp, u8 idu_sb_id) 6495static inline void bnx2x_igu_clear_sb(struct bnx2x *bp, u8 idu_sb_id)
@@ -7230,7 +7073,7 @@ static void __devinit bnx2x_set_int_mode(struct bnx2x *bp)
7230 BNX2X_DEV_INFO("set number of queues to 1\n"); 7073 BNX2X_DEV_INFO("set number of queues to 1\n");
7231 break; 7074 break;
7232 default: 7075 default:
7233 /* Set number of queues according to bp->multi_mode value */ 7076 /* Set number of queues for MSI-X mode */
7234 bnx2x_set_num_queues(bp); 7077 bnx2x_set_num_queues(bp);
7235 7078
7236 BNX2X_DEV_INFO("set number of queues to %d\n", bp->num_queues); 7079 BNX2X_DEV_INFO("set number of queues to %d\n", bp->num_queues);
@@ -7239,15 +7082,17 @@ static void __devinit bnx2x_set_int_mode(struct bnx2x *bp)
7239 * so try to enable MSI-X with the requested number of fp's 7082 * so try to enable MSI-X with the requested number of fp's
7240 * and fallback to MSI or legacy INTx with one fp 7083 * and fallback to MSI or legacy INTx with one fp
7241 */ 7084 */
7242 if (bnx2x_enable_msix(bp)) { 7085 if (bnx2x_enable_msix(bp) ||
7243 /* failed to enable MSI-X */ 7086 bp->flags & USING_SINGLE_MSIX_FLAG) {
7244 BNX2X_DEV_INFO("Failed to enable MSI-X (%d), set number of queues to %d\n", 7087 /* failed to enable multiple MSI-X */
7088 BNX2X_DEV_INFO("Failed to enable multiple MSI-X (%d), set number of queues to %d\n",
7245 bp->num_queues, 1 + NON_ETH_CONTEXT_USE); 7089 bp->num_queues, 1 + NON_ETH_CONTEXT_USE);
7246 7090
7247 bp->num_queues = 1 + NON_ETH_CONTEXT_USE; 7091 bp->num_queues = 1 + NON_ETH_CONTEXT_USE;
7248 7092
7249 /* Try to enable MSI */ 7093 /* Try to enable MSI */
7250 if (!(bp->flags & DISABLE_MSI_FLAG)) 7094 if (!(bp->flags & USING_SINGLE_MSIX_FLAG) &&
7095 !(bp->flags & DISABLE_MSI_FLAG))
7251 bnx2x_enable_msi(bp); 7096 bnx2x_enable_msi(bp);
7252 } 7097 }
7253 break; 7098 break;
@@ -9201,6 +9046,17 @@ static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp)
9201 id |= (val & 0xf); 9046 id |= (val & 0xf);
9202 bp->common.chip_id = id; 9047 bp->common.chip_id = id;
9203 9048
9049 /* force 57811 according to MISC register */
9050 if (REG_RD(bp, MISC_REG_CHIP_TYPE) & MISC_REG_CHIP_TYPE_57811_MASK) {
9051 if (CHIP_IS_57810(bp))
9052 bp->common.chip_id = (CHIP_NUM_57811 << 16) |
9053 (bp->common.chip_id & 0x0000FFFF);
9054 else if (CHIP_IS_57810_MF(bp))
9055 bp->common.chip_id = (CHIP_NUM_57811_MF << 16) |
9056 (bp->common.chip_id & 0x0000FFFF);
9057 bp->common.chip_id |= 0x1;
9058 }
9059
9204 /* Set doorbell size */ 9060 /* Set doorbell size */
9205 bp->db_size = (1 << BNX2X_DB_SHIFT); 9061 bp->db_size = (1 << BNX2X_DB_SHIFT);
9206 9062
@@ -10384,8 +10240,6 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp)
10384 if (BP_NOMCP(bp) && (func == 0)) 10240 if (BP_NOMCP(bp) && (func == 0))
10385 dev_err(&bp->pdev->dev, "MCP disabled, must load devices in order!\n"); 10241 dev_err(&bp->pdev->dev, "MCP disabled, must load devices in order!\n");
10386 10242
10387 bp->multi_mode = multi_mode;
10388
10389 bp->disable_tpa = disable_tpa; 10243 bp->disable_tpa = disable_tpa;
10390 10244
10391#ifdef BCM_CNIC 10245#ifdef BCM_CNIC
@@ -11325,6 +11179,8 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev,
11325 case BCM57810_MF: 11179 case BCM57810_MF:
11326 case BCM57840: 11180 case BCM57840:
11327 case BCM57840_MF: 11181 case BCM57840_MF:
11182 case BCM57811:
11183 case BCM57811_MF:
11328 max_cos_est = BNX2X_MULTI_TX_COS_E3B0; 11184 max_cos_est = BNX2X_MULTI_TX_COS_E3B0;
11329 break; 11185 break;
11330 11186
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
index c25803b9c0ca..bbd387492a80 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
@@ -1483,6 +1483,11 @@
1483 starts at 0x0 for the A0 tape-out and increments by one for each 1483 starts at 0x0 for the A0 tape-out and increments by one for each
1484 all-layer tape-out. */ 1484 all-layer tape-out. */
1485#define MISC_REG_CHIP_REV 0xa40c 1485#define MISC_REG_CHIP_REV 0xa40c
1486/* [R 14] otp_misc_do[100:0] spare bits collection: 13:11-
1487 * otp_misc_do[100:98]; 10:7 - otp_misc_do[87:84]; 6:3 - otp_misc_do[75:72];
1488 * 2:1 - otp_misc_do[51:50]; 0 - otp_misc_do[1]. */
1489#define MISC_REG_CHIP_TYPE 0xac60
1490#define MISC_REG_CHIP_TYPE_57811_MASK (1<<1)
1486/* [RW 32] The following driver registers(1...16) represent 16 drivers and 1491/* [RW 32] The following driver registers(1...16) represent 16 drivers and
1487 32 clients. Each client can be controlled by one driver only. One in each 1492 32 clients. Each client can be controlled by one driver only. One in each
1488 bit represent that this driver control the appropriate client (Ex: bit 5 1493 bit represent that this driver control the appropriate client (Ex: bit 5
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c
index 513573321625..553b9877339e 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c
@@ -4090,12 +4090,6 @@ static int bnx2x_setup_rss(struct bnx2x *bp,
4090 rss_mode = ETH_RSS_MODE_DISABLED; 4090 rss_mode = ETH_RSS_MODE_DISABLED;
4091 else if (test_bit(BNX2X_RSS_MODE_REGULAR, &p->rss_flags)) 4091 else if (test_bit(BNX2X_RSS_MODE_REGULAR, &p->rss_flags))
4092 rss_mode = ETH_RSS_MODE_REGULAR; 4092 rss_mode = ETH_RSS_MODE_REGULAR;
4093 else if (test_bit(BNX2X_RSS_MODE_VLAN_PRI, &p->rss_flags))
4094 rss_mode = ETH_RSS_MODE_VLAN_PRI;
4095 else if (test_bit(BNX2X_RSS_MODE_E1HOV_PRI, &p->rss_flags))
4096 rss_mode = ETH_RSS_MODE_E1HOV_PRI;
4097 else if (test_bit(BNX2X_RSS_MODE_IP_DSCP, &p->rss_flags))
4098 rss_mode = ETH_RSS_MODE_IP_DSCP;
4099 4093
4100 data->rss_mode = rss_mode; 4094 data->rss_mode = rss_mode;
4101 4095
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h
index 61a7670adfcd..dee2f372a974 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h
@@ -685,9 +685,6 @@ enum {
685 /* RSS_MODE bits are mutually exclusive */ 685 /* RSS_MODE bits are mutually exclusive */
686 BNX2X_RSS_MODE_DISABLED, 686 BNX2X_RSS_MODE_DISABLED,
687 BNX2X_RSS_MODE_REGULAR, 687 BNX2X_RSS_MODE_REGULAR,
688 BNX2X_RSS_MODE_VLAN_PRI,
689 BNX2X_RSS_MODE_E1HOV_PRI,
690 BNX2X_RSS_MODE_IP_DSCP,
691 688
692 BNX2X_RSS_SET_SRCH, /* Setup searcher, E1x specific flag */ 689 BNX2X_RSS_SET_SRCH, /* Setup searcher, E1x specific flag */
693 690
diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c
index 062ac333fde6..0c3e7c70ffbc 100644
--- a/drivers/net/ethernet/broadcom/tg3.c
+++ b/drivers/net/ethernet/broadcom/tg3.c
@@ -12234,6 +12234,7 @@ static const struct ethtool_ops tg3_ethtool_ops = {
12234 .get_rxfh_indir_size = tg3_get_rxfh_indir_size, 12234 .get_rxfh_indir_size = tg3_get_rxfh_indir_size,
12235 .get_rxfh_indir = tg3_get_rxfh_indir, 12235 .get_rxfh_indir = tg3_get_rxfh_indir,
12236 .set_rxfh_indir = tg3_set_rxfh_indir, 12236 .set_rxfh_indir = tg3_set_rxfh_indir,
12237 .get_ts_info = ethtool_op_get_ts_info,
12237}; 12238};
12238 12239
12239static struct rtnl_link_stats64 *tg3_get_stats64(struct net_device *dev, 12240static struct rtnl_link_stats64 *tg3_get_stats64(struct net_device *dev,
diff --git a/drivers/net/ethernet/brocade/bna/bfa_ioc.c b/drivers/net/ethernet/brocade/bna/bfa_ioc.c
index 77977d735dd7..0b640fafbda3 100644
--- a/drivers/net/ethernet/brocade/bna/bfa_ioc.c
+++ b/drivers/net/ethernet/brocade/bna/bfa_ioc.c
@@ -70,7 +70,6 @@ static void bfa_ioc_reset(struct bfa_ioc *ioc, bool force);
70static void bfa_ioc_mbox_poll(struct bfa_ioc *ioc); 70static void bfa_ioc_mbox_poll(struct bfa_ioc *ioc);
71static void bfa_ioc_mbox_flush(struct bfa_ioc *ioc); 71static void bfa_ioc_mbox_flush(struct bfa_ioc *ioc);
72static void bfa_ioc_recover(struct bfa_ioc *ioc); 72static void bfa_ioc_recover(struct bfa_ioc *ioc);
73static void bfa_ioc_check_attr_wwns(struct bfa_ioc *ioc);
74static void bfa_ioc_event_notify(struct bfa_ioc *, enum bfa_ioc_event); 73static void bfa_ioc_event_notify(struct bfa_ioc *, enum bfa_ioc_event);
75static void bfa_ioc_disable_comp(struct bfa_ioc *ioc); 74static void bfa_ioc_disable_comp(struct bfa_ioc *ioc);
76static void bfa_ioc_lpu_stop(struct bfa_ioc *ioc); 75static void bfa_ioc_lpu_stop(struct bfa_ioc *ioc);
@@ -346,8 +345,6 @@ bfa_ioc_sm_getattr(struct bfa_ioc *ioc, enum ioc_event event)
346 switch (event) { 345 switch (event) {
347 case IOC_E_FWRSP_GETATTR: 346 case IOC_E_FWRSP_GETATTR:
348 del_timer(&ioc->ioc_timer); 347 del_timer(&ioc->ioc_timer);
349 bfa_ioc_check_attr_wwns(ioc);
350 bfa_ioc_hb_monitor(ioc);
351 bfa_fsm_set_state(ioc, bfa_ioc_sm_op); 348 bfa_fsm_set_state(ioc, bfa_ioc_sm_op);
352 break; 349 break;
353 350
@@ -380,6 +377,7 @@ bfa_ioc_sm_op_entry(struct bfa_ioc *ioc)
380{ 377{
381 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_OK); 378 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_OK);
382 bfa_ioc_event_notify(ioc, BFA_IOC_E_ENABLED); 379 bfa_ioc_event_notify(ioc, BFA_IOC_E_ENABLED);
380 bfa_ioc_hb_monitor(ioc);
383} 381}
384 382
385static void 383static void
@@ -1207,27 +1205,62 @@ bfa_nw_ioc_sem_release(void __iomem *sem_reg)
1207 writel(1, sem_reg); 1205 writel(1, sem_reg);
1208} 1206}
1209 1207
1208/* Clear fwver hdr */
1209static void
1210bfa_ioc_fwver_clear(struct bfa_ioc *ioc)
1211{
1212 u32 pgnum, pgoff, loff = 0;
1213 int i;
1214
1215 pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, loff);
1216 pgoff = PSS_SMEM_PGOFF(loff);
1217 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
1218
1219 for (i = 0; i < (sizeof(struct bfi_ioc_image_hdr) / sizeof(u32)); i++) {
1220 writel(0, ioc->ioc_regs.smem_page_start + loff);
1221 loff += sizeof(u32);
1222 }
1223}
1224
1225
1210static void 1226static void
1211bfa_ioc_hw_sem_init(struct bfa_ioc *ioc) 1227bfa_ioc_hw_sem_init(struct bfa_ioc *ioc)
1212{ 1228{
1213 struct bfi_ioc_image_hdr fwhdr; 1229 struct bfi_ioc_image_hdr fwhdr;
1214 u32 fwstate = readl(ioc->ioc_regs.ioc_fwstate); 1230 u32 fwstate, r32;
1215 1231
1216 if (fwstate == BFI_IOC_UNINIT) 1232 /* Spin on init semaphore to serialize. */
1233 r32 = readl(ioc->ioc_regs.ioc_init_sem_reg);
1234 while (r32 & 0x1) {
1235 udelay(20);
1236 r32 = readl(ioc->ioc_regs.ioc_init_sem_reg);
1237 }
1238
1239 fwstate = readl(ioc->ioc_regs.ioc_fwstate);
1240 if (fwstate == BFI_IOC_UNINIT) {
1241 writel(1, ioc->ioc_regs.ioc_init_sem_reg);
1217 return; 1242 return;
1243 }
1218 1244
1219 bfa_nw_ioc_fwver_get(ioc, &fwhdr); 1245 bfa_nw_ioc_fwver_get(ioc, &fwhdr);
1220 1246
1221 if (swab32(fwhdr.exec) == BFI_FWBOOT_TYPE_NORMAL) 1247 if (swab32(fwhdr.exec) == BFI_FWBOOT_TYPE_NORMAL) {
1248 writel(1, ioc->ioc_regs.ioc_init_sem_reg);
1222 return; 1249 return;
1250 }
1223 1251
1252 bfa_ioc_fwver_clear(ioc);
1224 writel(BFI_IOC_UNINIT, ioc->ioc_regs.ioc_fwstate); 1253 writel(BFI_IOC_UNINIT, ioc->ioc_regs.ioc_fwstate);
1254 writel(BFI_IOC_UNINIT, ioc->ioc_regs.alt_ioc_fwstate);
1225 1255
1226 /* 1256 /*
1227 * Try to lock and then unlock the semaphore. 1257 * Try to lock and then unlock the semaphore.
1228 */ 1258 */
1229 readl(ioc->ioc_regs.ioc_sem_reg); 1259 readl(ioc->ioc_regs.ioc_sem_reg);
1230 writel(1, ioc->ioc_regs.ioc_sem_reg); 1260 writel(1, ioc->ioc_regs.ioc_sem_reg);
1261
1262 /* Unlock init semaphore */
1263 writel(1, ioc->ioc_regs.ioc_init_sem_reg);
1231} 1264}
1232 1265
1233static void 1266static void
@@ -1585,11 +1618,6 @@ bfa_ioc_download_fw(struct bfa_ioc *ioc, u32 boot_type,
1585 u32 i; 1618 u32 i;
1586 u32 asicmode; 1619 u32 asicmode;
1587 1620
1588 /**
1589 * Initialize LMEM first before code download
1590 */
1591 bfa_ioc_lmem_init(ioc);
1592
1593 fwimg = bfa_cb_image_get_chunk(bfa_ioc_asic_gen(ioc), chunkno); 1621 fwimg = bfa_cb_image_get_chunk(bfa_ioc_asic_gen(ioc), chunkno);
1594 1622
1595 pgnum = bfa_ioc_smem_pgnum(ioc, loff); 1623 pgnum = bfa_ioc_smem_pgnum(ioc, loff);
@@ -1914,6 +1942,10 @@ bfa_ioc_pll_init(struct bfa_ioc *ioc)
1914 bfa_ioc_pll_init_asic(ioc); 1942 bfa_ioc_pll_init_asic(ioc);
1915 1943
1916 ioc->pllinit = true; 1944 ioc->pllinit = true;
1945
1946 /* Initialize LMEM */
1947 bfa_ioc_lmem_init(ioc);
1948
1917 /* 1949 /*
1918 * release semaphore. 1950 * release semaphore.
1919 */ 1951 */
@@ -2513,13 +2545,6 @@ bfa_ioc_recover(struct bfa_ioc *ioc)
2513 bfa_fsm_send_event(ioc, IOC_E_HBFAIL); 2545 bfa_fsm_send_event(ioc, IOC_E_HBFAIL);
2514} 2546}
2515 2547
2516static void
2517bfa_ioc_check_attr_wwns(struct bfa_ioc *ioc)
2518{
2519 if (bfa_ioc_get_type(ioc) == BFA_IOC_TYPE_LL)
2520 return;
2521}
2522
2523/** 2548/**
2524 * @dg hal_iocpf_pvt BFA IOC PF private functions 2549 * @dg hal_iocpf_pvt BFA IOC PF private functions
2525 * @{ 2550 * @{
diff --git a/drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c b/drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
index 348479bbfa3a..b6b036a143ae 100644
--- a/drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
+++ b/drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
@@ -199,9 +199,9 @@ bfa_ioc_ct_notify_fail(struct bfa_ioc *ioc)
199 * Host to LPU mailbox message addresses 199 * Host to LPU mailbox message addresses
200 */ 200 */
201static const struct { 201static const struct {
202 u32 hfn_mbox; 202 u32 hfn_mbox;
203 u32 lpu_mbox; 203 u32 lpu_mbox;
204 u32 hfn_pgn; 204 u32 hfn_pgn;
205} ct_fnreg[] = { 205} ct_fnreg[] = {
206 { HOSTFN0_LPU_MBOX0_0, LPU_HOSTFN0_MBOX0_0, HOST_PAGE_NUM_FN0 }, 206 { HOSTFN0_LPU_MBOX0_0, LPU_HOSTFN0_MBOX0_0, HOST_PAGE_NUM_FN0 },
207 { HOSTFN1_LPU_MBOX0_8, LPU_HOSTFN1_MBOX0_8, HOST_PAGE_NUM_FN1 }, 207 { HOSTFN1_LPU_MBOX0_8, LPU_HOSTFN1_MBOX0_8, HOST_PAGE_NUM_FN1 },
@@ -803,17 +803,72 @@ bfa_ioc_ct2_mac_reset(void __iomem *rb)
803} 803}
804 804
805#define CT2_NFC_MAX_DELAY 1000 805#define CT2_NFC_MAX_DELAY 1000
806#define CT2_NFC_VER_VALID 0x143
807#define BFA_IOC_PLL_POLL 1000000
808
809static bool
810bfa_ioc_ct2_nfc_halted(void __iomem *rb)
811{
812 volatile u32 r32;
813
814 r32 = readl(rb + CT2_NFC_CSR_SET_REG);
815 if (r32 & __NFC_CONTROLLER_HALTED)
816 return true;
817
818 return false;
819}
820
821static void
822bfa_ioc_ct2_nfc_resume(void __iomem *rb)
823{
824 volatile u32 r32;
825 int i;
826
827 writel(__HALT_NFC_CONTROLLER, rb + CT2_NFC_CSR_CLR_REG);
828 for (i = 0; i < CT2_NFC_MAX_DELAY; i++) {
829 r32 = readl(rb + CT2_NFC_CSR_SET_REG);
830 if (!(r32 & __NFC_CONTROLLER_HALTED))
831 return;
832 udelay(1000);
833 }
834 BUG_ON(1);
835}
836
806static enum bfa_status 837static enum bfa_status
807bfa_ioc_ct2_pll_init(void __iomem *rb, enum bfi_asic_mode asic_mode) 838bfa_ioc_ct2_pll_init(void __iomem *rb, enum bfi_asic_mode asic_mode)
808{ 839{
809 volatile u32 wgn, r32; 840 volatile u32 wgn, r32;
810 int i; 841 u32 nfc_ver, i;
811 842
812 /*
813 * Initialize PLL if not already done by NFC
814 */
815 wgn = readl(rb + CT2_WGN_STATUS); 843 wgn = readl(rb + CT2_WGN_STATUS);
816 if (!(wgn & __GLBL_PF_VF_CFG_RDY)) { 844
845 nfc_ver = readl(rb + CT2_RSC_GPR15_REG);
846
847 if ((wgn == (__A2T_AHB_LOAD | __WGN_READY)) &&
848 (nfc_ver >= CT2_NFC_VER_VALID)) {
849 if (bfa_ioc_ct2_nfc_halted(rb))
850 bfa_ioc_ct2_nfc_resume(rb);
851 writel(__RESET_AND_START_SCLK_LCLK_PLLS,
852 rb + CT2_CSI_FW_CTL_SET_REG);
853
854 for (i = 0; i < BFA_IOC_PLL_POLL; i++) {
855 r32 = readl(rb + CT2_APP_PLL_LCLK_CTL_REG);
856 if (r32 & __RESET_AND_START_SCLK_LCLK_PLLS)
857 break;
858 }
859 BUG_ON(!(r32 & __RESET_AND_START_SCLK_LCLK_PLLS));
860
861 for (i = 0; i < BFA_IOC_PLL_POLL; i++) {
862 r32 = readl(rb + CT2_APP_PLL_LCLK_CTL_REG);
863 if (!(r32 & __RESET_AND_START_SCLK_LCLK_PLLS))
864 break;
865 }
866 BUG_ON(r32 & __RESET_AND_START_SCLK_LCLK_PLLS);
867 udelay(1000);
868
869 r32 = readl(rb + CT2_CSI_FW_CTL_REG);
870 BUG_ON(r32 & __RESET_AND_START_SCLK_LCLK_PLLS);
871 } else {
817 writel(__HALT_NFC_CONTROLLER, (rb + CT2_NFC_CSR_SET_REG)); 872 writel(__HALT_NFC_CONTROLLER, (rb + CT2_NFC_CSR_SET_REG));
818 for (i = 0; i < CT2_NFC_MAX_DELAY; i++) { 873 for (i = 0; i < CT2_NFC_MAX_DELAY; i++) {
819 r32 = readl(rb + CT2_NFC_CSR_SET_REG); 874 r32 = readl(rb + CT2_NFC_CSR_SET_REG);
@@ -821,53 +876,48 @@ bfa_ioc_ct2_pll_init(void __iomem *rb, enum bfi_asic_mode asic_mode)
821 break; 876 break;
822 udelay(1000); 877 udelay(1000);
823 } 878 }
879
880 bfa_ioc_ct2_mac_reset(rb);
881 bfa_ioc_ct2_sclk_init(rb);
882 bfa_ioc_ct2_lclk_init(rb);
883
884 /* release soft reset on s_clk & l_clk */
885 r32 = readl((rb + CT2_APP_PLL_SCLK_CTL_REG));
886 writel(r32 & ~__APP_PLL_SCLK_LOGIC_SOFT_RESET,
887 rb + CT2_APP_PLL_SCLK_CTL_REG);
888 r32 = readl((rb + CT2_APP_PLL_LCLK_CTL_REG));
889 writel(r32 & ~__APP_PLL_LCLK_LOGIC_SOFT_RESET,
890 rb + CT2_APP_PLL_LCLK_CTL_REG);
891 }
892
893 /* Announce flash device presence, if flash was corrupted. */
894 if (wgn == (__WGN_READY | __GLBL_PF_VF_CFG_RDY)) {
895 r32 = readl((rb + PSS_GPIO_OUT_REG));
896 writel(r32 & ~1, rb + PSS_GPIO_OUT_REG);
897 r32 = readl((rb + PSS_GPIO_OE_REG));
898 writel(r32 | 1, rb + PSS_GPIO_OE_REG);
824 } 899 }
825 900
826 /* 901 /*
827 * Mask the interrupts and clear any 902 * Mask the interrupts and clear any
828 * pending interrupts left by BIOS/EFI 903 * pending interrupts left by BIOS/EFI
829 */ 904 */
830
831 writel(1, (rb + CT2_LPU0_HOSTFN_MBOX0_MSK)); 905 writel(1, (rb + CT2_LPU0_HOSTFN_MBOX0_MSK));
832 writel(1, (rb + CT2_LPU1_HOSTFN_MBOX0_MSK)); 906 writel(1, (rb + CT2_LPU1_HOSTFN_MBOX0_MSK));
833 907
834 r32 = readl((rb + CT2_LPU0_HOSTFN_CMD_STAT)); 908 /* For first time initialization, no need to clear interrupts */
835 if (r32 == 1) { 909 r32 = readl(rb + HOST_SEM5_REG);
836 writel(1, (rb + CT2_LPU0_HOSTFN_CMD_STAT)); 910 if (r32 & 0x1) {
837 readl((rb + CT2_LPU0_HOSTFN_CMD_STAT)); 911 r32 = readl((rb + CT2_LPU0_HOSTFN_CMD_STAT));
838 } 912 if (r32 == 1) {
839 r32 = readl((rb + CT2_LPU1_HOSTFN_CMD_STAT)); 913 writel(1, (rb + CT2_LPU0_HOSTFN_CMD_STAT));
840 if (r32 == 1) { 914 readl((rb + CT2_LPU0_HOSTFN_CMD_STAT));
841 writel(1, (rb + CT2_LPU1_HOSTFN_CMD_STAT)); 915 }
842 readl((rb + CT2_LPU1_HOSTFN_CMD_STAT)); 916 r32 = readl((rb + CT2_LPU1_HOSTFN_CMD_STAT));
843 } 917 if (r32 == 1) {
844 918 writel(1, (rb + CT2_LPU1_HOSTFN_CMD_STAT));
845 bfa_ioc_ct2_mac_reset(rb); 919 readl((rb + CT2_LPU1_HOSTFN_CMD_STAT));
846 bfa_ioc_ct2_sclk_init(rb); 920 }
847 bfa_ioc_ct2_lclk_init(rb);
848
849 /*
850 * release soft reset on s_clk & l_clk
851 */
852 r32 = readl((rb + CT2_APP_PLL_SCLK_CTL_REG));
853 writel((r32 & ~__APP_PLL_SCLK_LOGIC_SOFT_RESET),
854 (rb + CT2_APP_PLL_SCLK_CTL_REG));
855
856 /*
857 * release soft reset on s_clk & l_clk
858 */
859 r32 = readl((rb + CT2_APP_PLL_LCLK_CTL_REG));
860 writel(r32 & ~__APP_PLL_LCLK_LOGIC_SOFT_RESET,
861 (rb + CT2_APP_PLL_LCLK_CTL_REG));
862
863 /*
864 * Announce flash device presence, if flash was corrupted.
865 */
866 if (wgn == (__WGN_READY | __GLBL_PF_VF_CFG_RDY)) {
867 r32 = readl((rb + PSS_GPIO_OUT_REG));
868 writel((r32 & ~1), (rb + PSS_GPIO_OUT_REG));
869 r32 = readl((rb + PSS_GPIO_OE_REG));
870 writel((r32 | 1), (rb + PSS_GPIO_OE_REG));
871 } 921 }
872 922
873 bfa_ioc_ct2_mem_init(rb); 923 bfa_ioc_ct2_mem_init(rb);
diff --git a/drivers/net/ethernet/brocade/bna/bfi_reg.h b/drivers/net/ethernet/brocade/bna/bfi_reg.h
index efacff3ab51d..0e094fe46dfd 100644
--- a/drivers/net/ethernet/brocade/bna/bfi_reg.h
+++ b/drivers/net/ethernet/brocade/bna/bfi_reg.h
@@ -339,10 +339,16 @@ enum {
339#define __A2T_AHB_LOAD 0x00000800 339#define __A2T_AHB_LOAD 0x00000800
340#define __WGN_READY 0x00000400 340#define __WGN_READY 0x00000400
341#define __GLBL_PF_VF_CFG_RDY 0x00000200 341#define __GLBL_PF_VF_CFG_RDY 0x00000200
342#define CT2_NFC_CSR_CLR_REG 0x00027420
342#define CT2_NFC_CSR_SET_REG 0x00027424 343#define CT2_NFC_CSR_SET_REG 0x00027424
343#define __HALT_NFC_CONTROLLER 0x00000002 344#define __HALT_NFC_CONTROLLER 0x00000002
344#define __NFC_CONTROLLER_HALTED 0x00001000 345#define __NFC_CONTROLLER_HALTED 0x00001000
345 346
347#define CT2_RSC_GPR15_REG 0x0002765c
348#define CT2_CSI_FW_CTL_REG 0x00027080
349#define __RESET_AND_START_SCLK_LCLK_PLLS 0x00010000
350#define CT2_CSI_FW_CTL_SET_REG 0x00027088
351
346#define CT2_CSI_MAC0_CONTROL_REG 0x000270d0 352#define CT2_CSI_MAC0_CONTROL_REG 0x000270d0
347#define __CSI_MAC_RESET 0x00000010 353#define __CSI_MAC_RESET 0x00000010
348#define __CSI_MAC_AHB_RESET 0x00000008 354#define __CSI_MAC_AHB_RESET 0x00000008
diff --git a/drivers/net/ethernet/brocade/bna/bnad.c b/drivers/net/ethernet/brocade/bna/bnad.c
index ff78f770dec9..25c4e7f2a099 100644
--- a/drivers/net/ethernet/brocade/bna/bnad.c
+++ b/drivers/net/ethernet/brocade/bna/bnad.c
@@ -80,8 +80,6 @@ do { \
80 (sizeof(struct bnad_skb_unmap) * ((_depth) - 1)); \ 80 (sizeof(struct bnad_skb_unmap) * ((_depth) - 1)); \
81} while (0) 81} while (0)
82 82
83#define BNAD_TXRX_SYNC_MDELAY 250 /* 250 msecs */
84
85static void 83static void
86bnad_add_to_list(struct bnad *bnad) 84bnad_add_to_list(struct bnad *bnad)
87{ 85{
@@ -103,7 +101,7 @@ bnad_remove_from_list(struct bnad *bnad)
103 * Reinitialize completions in CQ, once Rx is taken down 101 * Reinitialize completions in CQ, once Rx is taken down
104 */ 102 */
105static void 103static void
106bnad_cq_cmpl_init(struct bnad *bnad, struct bna_ccb *ccb) 104bnad_cq_cleanup(struct bnad *bnad, struct bna_ccb *ccb)
107{ 105{
108 struct bna_cq_entry *cmpl, *next_cmpl; 106 struct bna_cq_entry *cmpl, *next_cmpl;
109 unsigned int wi_range, wis = 0, ccb_prod = 0; 107 unsigned int wi_range, wis = 0, ccb_prod = 0;
@@ -141,7 +139,8 @@ bnad_pci_unmap_skb(struct device *pdev, struct bnad_skb_unmap *array,
141 139
142 for (j = 0; j < frag; j++) { 140 for (j = 0; j < frag; j++) {
143 dma_unmap_page(pdev, dma_unmap_addr(&array[index], dma_addr), 141 dma_unmap_page(pdev, dma_unmap_addr(&array[index], dma_addr),
144 skb_frag_size(&skb_shinfo(skb)->frags[j]), DMA_TO_DEVICE); 142 skb_frag_size(&skb_shinfo(skb)->frags[j]),
143 DMA_TO_DEVICE);
145 dma_unmap_addr_set(&array[index], dma_addr, 0); 144 dma_unmap_addr_set(&array[index], dma_addr, 0);
146 BNA_QE_INDX_ADD(index, 1, depth); 145 BNA_QE_INDX_ADD(index, 1, depth);
147 } 146 }
@@ -155,7 +154,7 @@ bnad_pci_unmap_skb(struct device *pdev, struct bnad_skb_unmap *array,
155 * so DMA unmap & freeing is fine. 154 * so DMA unmap & freeing is fine.
156 */ 155 */
157static void 156static void
158bnad_free_all_txbufs(struct bnad *bnad, 157bnad_txq_cleanup(struct bnad *bnad,
159 struct bna_tcb *tcb) 158 struct bna_tcb *tcb)
160{ 159{
161 u32 unmap_cons; 160 u32 unmap_cons;
@@ -183,13 +182,12 @@ bnad_free_all_txbufs(struct bnad *bnad,
183/* Data Path Handlers */ 182/* Data Path Handlers */
184 183
185/* 184/*
186 * bnad_free_txbufs : Frees the Tx bufs on Tx completion 185 * bnad_txcmpl_process : Frees the Tx bufs on Tx completion
187 * Can be called in a) Interrupt context 186 * Can be called in a) Interrupt context
188 * b) Sending context 187 * b) Sending context
189 * c) Tasklet context
190 */ 188 */
191static u32 189static u32
192bnad_free_txbufs(struct bnad *bnad, 190bnad_txcmpl_process(struct bnad *bnad,
193 struct bna_tcb *tcb) 191 struct bna_tcb *tcb)
194{ 192{
195 u32 unmap_cons, sent_packets = 0, sent_bytes = 0; 193 u32 unmap_cons, sent_packets = 0, sent_bytes = 0;
@@ -198,13 +196,7 @@ bnad_free_txbufs(struct bnad *bnad,
198 struct bnad_skb_unmap *unmap_array; 196 struct bnad_skb_unmap *unmap_array;
199 struct sk_buff *skb; 197 struct sk_buff *skb;
200 198
201 /* 199 /* Just return if TX is stopped */
202 * Just return if TX is stopped. This check is useful
203 * when bnad_free_txbufs() runs out of a tasklet scheduled
204 * before bnad_cb_tx_cleanup() cleared BNAD_TXQ_TX_STARTED bit
205 * but this routine runs actually after the cleanup has been
206 * executed.
207 */
208 if (!test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags)) 200 if (!test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags))
209 return 0; 201 return 0;
210 202
@@ -243,57 +235,8 @@ bnad_free_txbufs(struct bnad *bnad,
243 return sent_packets; 235 return sent_packets;
244} 236}
245 237
246/* Tx Free Tasklet function */
247/* Frees for all the tcb's in all the Tx's */
248/*
249 * Scheduled from sending context, so that
250 * the fat Tx lock is not held for too long
251 * in the sending context.
252 */
253static void
254bnad_tx_free_tasklet(unsigned long bnad_ptr)
255{
256 struct bnad *bnad = (struct bnad *)bnad_ptr;
257 struct bna_tcb *tcb;
258 u32 acked = 0;
259 int i, j;
260
261 for (i = 0; i < bnad->num_tx; i++) {
262 for (j = 0; j < bnad->num_txq_per_tx; j++) {
263 tcb = bnad->tx_info[i].tcb[j];
264 if (!tcb)
265 continue;
266 if (((u16) (*tcb->hw_consumer_index) !=
267 tcb->consumer_index) &&
268 (!test_and_set_bit(BNAD_TXQ_FREE_SENT,
269 &tcb->flags))) {
270 acked = bnad_free_txbufs(bnad, tcb);
271 if (likely(test_bit(BNAD_TXQ_TX_STARTED,
272 &tcb->flags)))
273 bna_ib_ack(tcb->i_dbell, acked);
274 smp_mb__before_clear_bit();
275 clear_bit(BNAD_TXQ_FREE_SENT, &tcb->flags);
276 }
277 if (unlikely(!test_bit(BNAD_TXQ_TX_STARTED,
278 &tcb->flags)))
279 continue;
280 if (netif_queue_stopped(bnad->netdev)) {
281 if (acked && netif_carrier_ok(bnad->netdev) &&
282 BNA_QE_FREE_CNT(tcb, tcb->q_depth) >=
283 BNAD_NETIF_WAKE_THRESHOLD) {
284 netif_wake_queue(bnad->netdev);
285 /* TODO */
286 /* Counters for individual TxQs? */
287 BNAD_UPDATE_CTR(bnad,
288 netif_queue_wakeup);
289 }
290 }
291 }
292 }
293}
294
295static u32 238static u32
296bnad_tx(struct bnad *bnad, struct bna_tcb *tcb) 239bnad_tx_complete(struct bnad *bnad, struct bna_tcb *tcb)
297{ 240{
298 struct net_device *netdev = bnad->netdev; 241 struct net_device *netdev = bnad->netdev;
299 u32 sent = 0; 242 u32 sent = 0;
@@ -301,7 +244,7 @@ bnad_tx(struct bnad *bnad, struct bna_tcb *tcb)
301 if (test_and_set_bit(BNAD_TXQ_FREE_SENT, &tcb->flags)) 244 if (test_and_set_bit(BNAD_TXQ_FREE_SENT, &tcb->flags))
302 return 0; 245 return 0;
303 246
304 sent = bnad_free_txbufs(bnad, tcb); 247 sent = bnad_txcmpl_process(bnad, tcb);
305 if (sent) { 248 if (sent) {
306 if (netif_queue_stopped(netdev) && 249 if (netif_queue_stopped(netdev) &&
307 netif_carrier_ok(netdev) && 250 netif_carrier_ok(netdev) &&
@@ -330,13 +273,13 @@ bnad_msix_tx(int irq, void *data)
330 struct bna_tcb *tcb = (struct bna_tcb *)data; 273 struct bna_tcb *tcb = (struct bna_tcb *)data;
331 struct bnad *bnad = tcb->bnad; 274 struct bnad *bnad = tcb->bnad;
332 275
333 bnad_tx(bnad, tcb); 276 bnad_tx_complete(bnad, tcb);
334 277
335 return IRQ_HANDLED; 278 return IRQ_HANDLED;
336} 279}
337 280
338static void 281static void
339bnad_reset_rcb(struct bnad *bnad, struct bna_rcb *rcb) 282bnad_rcb_cleanup(struct bnad *bnad, struct bna_rcb *rcb)
340{ 283{
341 struct bnad_unmap_q *unmap_q = rcb->unmap_q; 284 struct bnad_unmap_q *unmap_q = rcb->unmap_q;
342 285
@@ -348,7 +291,7 @@ bnad_reset_rcb(struct bnad *bnad, struct bna_rcb *rcb)
348} 291}
349 292
350static void 293static void
351bnad_free_all_rxbufs(struct bnad *bnad, struct bna_rcb *rcb) 294bnad_rxq_cleanup(struct bnad *bnad, struct bna_rcb *rcb)
352{ 295{
353 struct bnad_unmap_q *unmap_q; 296 struct bnad_unmap_q *unmap_q;
354 struct bnad_skb_unmap *unmap_array; 297 struct bnad_skb_unmap *unmap_array;
@@ -369,11 +312,11 @@ bnad_free_all_rxbufs(struct bnad *bnad, struct bna_rcb *rcb)
369 DMA_FROM_DEVICE); 312 DMA_FROM_DEVICE);
370 dev_kfree_skb(skb); 313 dev_kfree_skb(skb);
371 } 314 }
372 bnad_reset_rcb(bnad, rcb); 315 bnad_rcb_cleanup(bnad, rcb);
373} 316}
374 317
375static void 318static void
376bnad_alloc_n_post_rxbufs(struct bnad *bnad, struct bna_rcb *rcb) 319bnad_rxq_post(struct bnad *bnad, struct bna_rcb *rcb)
377{ 320{
378 u16 to_alloc, alloced, unmap_prod, wi_range; 321 u16 to_alloc, alloced, unmap_prod, wi_range;
379 struct bnad_unmap_q *unmap_q = rcb->unmap_q; 322 struct bnad_unmap_q *unmap_q = rcb->unmap_q;
@@ -434,14 +377,14 @@ bnad_refill_rxq(struct bnad *bnad, struct bna_rcb *rcb)
434 if (!test_and_set_bit(BNAD_RXQ_REFILL, &rcb->flags)) { 377 if (!test_and_set_bit(BNAD_RXQ_REFILL, &rcb->flags)) {
435 if (BNA_QE_FREE_CNT(unmap_q, unmap_q->q_depth) 378 if (BNA_QE_FREE_CNT(unmap_q, unmap_q->q_depth)
436 >> BNAD_RXQ_REFILL_THRESHOLD_SHIFT) 379 >> BNAD_RXQ_REFILL_THRESHOLD_SHIFT)
437 bnad_alloc_n_post_rxbufs(bnad, rcb); 380 bnad_rxq_post(bnad, rcb);
438 smp_mb__before_clear_bit(); 381 smp_mb__before_clear_bit();
439 clear_bit(BNAD_RXQ_REFILL, &rcb->flags); 382 clear_bit(BNAD_RXQ_REFILL, &rcb->flags);
440 } 383 }
441} 384}
442 385
443static u32 386static u32
444bnad_poll_cq(struct bnad *bnad, struct bna_ccb *ccb, int budget) 387bnad_cq_process(struct bnad *bnad, struct bna_ccb *ccb, int budget)
445{ 388{
446 struct bna_cq_entry *cmpl, *next_cmpl; 389 struct bna_cq_entry *cmpl, *next_cmpl;
447 struct bna_rcb *rcb = NULL; 390 struct bna_rcb *rcb = NULL;
@@ -453,12 +396,8 @@ bnad_poll_cq(struct bnad *bnad, struct bna_ccb *ccb, int budget)
453 struct bna_pkt_rate *pkt_rt = &ccb->pkt_rate; 396 struct bna_pkt_rate *pkt_rt = &ccb->pkt_rate;
454 struct bnad_rx_ctrl *rx_ctrl = (struct bnad_rx_ctrl *)(ccb->ctrl); 397 struct bnad_rx_ctrl *rx_ctrl = (struct bnad_rx_ctrl *)(ccb->ctrl);
455 398
456 set_bit(BNAD_FP_IN_RX_PATH, &rx_ctrl->flags); 399 if (!test_bit(BNAD_RXQ_STARTED, &ccb->rcb[0]->flags))
457
458 if (!test_bit(BNAD_RXQ_STARTED, &ccb->rcb[0]->flags)) {
459 clear_bit(BNAD_FP_IN_RX_PATH, &rx_ctrl->flags);
460 return 0; 400 return 0;
461 }
462 401
463 prefetch(bnad->netdev); 402 prefetch(bnad->netdev);
464 BNA_CQ_QPGE_PTR_GET(ccb->producer_index, ccb->sw_qpt, cmpl, 403 BNA_CQ_QPGE_PTR_GET(ccb->producer_index, ccb->sw_qpt, cmpl,
@@ -533,9 +472,8 @@ bnad_poll_cq(struct bnad *bnad, struct bna_ccb *ccb, int budget)
533 472
534 if (skb->ip_summed == CHECKSUM_UNNECESSARY) 473 if (skb->ip_summed == CHECKSUM_UNNECESSARY)
535 napi_gro_receive(&rx_ctrl->napi, skb); 474 napi_gro_receive(&rx_ctrl->napi, skb);
536 else { 475 else
537 netif_receive_skb(skb); 476 netif_receive_skb(skb);
538 }
539 477
540next: 478next:
541 cmpl->valid = 0; 479 cmpl->valid = 0;
@@ -646,7 +584,7 @@ bnad_isr(int irq, void *data)
646 for (j = 0; j < bnad->num_txq_per_tx; j++) { 584 for (j = 0; j < bnad->num_txq_per_tx; j++) {
647 tcb = bnad->tx_info[i].tcb[j]; 585 tcb = bnad->tx_info[i].tcb[j];
648 if (tcb && test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags)) 586 if (tcb && test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags))
649 bnad_tx(bnad, bnad->tx_info[i].tcb[j]); 587 bnad_tx_complete(bnad, bnad->tx_info[i].tcb[j]);
650 } 588 }
651 } 589 }
652 /* Rx processing */ 590 /* Rx processing */
@@ -839,20 +777,9 @@ bnad_cb_tcb_destroy(struct bnad *bnad, struct bna_tcb *tcb)
839{ 777{
840 struct bnad_tx_info *tx_info = 778 struct bnad_tx_info *tx_info =
841 (struct bnad_tx_info *)tcb->txq->tx->priv; 779 (struct bnad_tx_info *)tcb->txq->tx->priv;
842 struct bnad_unmap_q *unmap_q = tcb->unmap_q;
843
844 while (test_and_set_bit(BNAD_TXQ_FREE_SENT, &tcb->flags))
845 cpu_relax();
846
847 bnad_free_all_txbufs(bnad, tcb);
848
849 unmap_q->producer_index = 0;
850 unmap_q->consumer_index = 0;
851
852 smp_mb__before_clear_bit();
853 clear_bit(BNAD_TXQ_FREE_SENT, &tcb->flags);
854 780
855 tx_info->tcb[tcb->id] = NULL; 781 tx_info->tcb[tcb->id] = NULL;
782 tcb->priv = NULL;
856} 783}
857 784
858static void 785static void
@@ -866,12 +793,6 @@ bnad_cb_rcb_setup(struct bnad *bnad, struct bna_rcb *rcb)
866} 793}
867 794
868static void 795static void
869bnad_cb_rcb_destroy(struct bnad *bnad, struct bna_rcb *rcb)
870{
871 bnad_free_all_rxbufs(bnad, rcb);
872}
873
874static void
875bnad_cb_ccb_setup(struct bnad *bnad, struct bna_ccb *ccb) 796bnad_cb_ccb_setup(struct bnad *bnad, struct bna_ccb *ccb)
876{ 797{
877 struct bnad_rx_info *rx_info = 798 struct bnad_rx_info *rx_info =
@@ -916,7 +837,6 @@ bnad_cb_tx_resume(struct bnad *bnad, struct bna_tx *tx)
916{ 837{
917 struct bnad_tx_info *tx_info = (struct bnad_tx_info *)tx->priv; 838 struct bnad_tx_info *tx_info = (struct bnad_tx_info *)tx->priv;
918 struct bna_tcb *tcb; 839 struct bna_tcb *tcb;
919 struct bnad_unmap_q *unmap_q;
920 u32 txq_id; 840 u32 txq_id;
921 int i; 841 int i;
922 842
@@ -926,23 +846,9 @@ bnad_cb_tx_resume(struct bnad *bnad, struct bna_tx *tx)
926 continue; 846 continue;
927 txq_id = tcb->id; 847 txq_id = tcb->id;
928 848
929 unmap_q = tcb->unmap_q; 849 BUG_ON(test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags));
930
931 if (test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags))
932 continue;
933
934 while (test_and_set_bit(BNAD_TXQ_FREE_SENT, &tcb->flags))
935 cpu_relax();
936
937 bnad_free_all_txbufs(bnad, tcb);
938
939 unmap_q->producer_index = 0;
940 unmap_q->consumer_index = 0;
941
942 smp_mb__before_clear_bit();
943 clear_bit(BNAD_TXQ_FREE_SENT, &tcb->flags);
944
945 set_bit(BNAD_TXQ_TX_STARTED, &tcb->flags); 850 set_bit(BNAD_TXQ_TX_STARTED, &tcb->flags);
851 BUG_ON(*(tcb->hw_consumer_index) != 0);
946 852
947 if (netif_carrier_ok(bnad->netdev)) { 853 if (netif_carrier_ok(bnad->netdev)) {
948 printk(KERN_INFO "bna: %s %d TXQ_STARTED\n", 854 printk(KERN_INFO "bna: %s %d TXQ_STARTED\n",
@@ -963,6 +869,54 @@ bnad_cb_tx_resume(struct bnad *bnad, struct bna_tx *tx)
963 } 869 }
964} 870}
965 871
872/*
873 * Free all TxQs buffers and then notify TX_E_CLEANUP_DONE to Tx fsm.
874 */
875static void
876bnad_tx_cleanup(struct delayed_work *work)
877{
878 struct bnad_tx_info *tx_info =
879 container_of(work, struct bnad_tx_info, tx_cleanup_work);
880 struct bnad *bnad = NULL;
881 struct bnad_unmap_q *unmap_q;
882 struct bna_tcb *tcb;
883 unsigned long flags;
884 uint32_t i, pending = 0;
885
886 for (i = 0; i < BNAD_MAX_TXQ_PER_TX; i++) {
887 tcb = tx_info->tcb[i];
888 if (!tcb)
889 continue;
890
891 bnad = tcb->bnad;
892
893 if (test_and_set_bit(BNAD_TXQ_FREE_SENT, &tcb->flags)) {
894 pending++;
895 continue;
896 }
897
898 bnad_txq_cleanup(bnad, tcb);
899
900 unmap_q = tcb->unmap_q;
901 unmap_q->producer_index = 0;
902 unmap_q->consumer_index = 0;
903
904 smp_mb__before_clear_bit();
905 clear_bit(BNAD_TXQ_FREE_SENT, &tcb->flags);
906 }
907
908 if (pending) {
909 queue_delayed_work(bnad->work_q, &tx_info->tx_cleanup_work,
910 msecs_to_jiffies(1));
911 return;
912 }
913
914 spin_lock_irqsave(&bnad->bna_lock, flags);
915 bna_tx_cleanup_complete(tx_info->tx);
916 spin_unlock_irqrestore(&bnad->bna_lock, flags);
917}
918
919
966static void 920static void
967bnad_cb_tx_cleanup(struct bnad *bnad, struct bna_tx *tx) 921bnad_cb_tx_cleanup(struct bnad *bnad, struct bna_tx *tx)
968{ 922{
@@ -976,8 +930,7 @@ bnad_cb_tx_cleanup(struct bnad *bnad, struct bna_tx *tx)
976 continue; 930 continue;
977 } 931 }
978 932
979 mdelay(BNAD_TXRX_SYNC_MDELAY); 933 queue_delayed_work(bnad->work_q, &tx_info->tx_cleanup_work, 0);
980 bna_tx_cleanup_complete(tx);
981} 934}
982 935
983static void 936static void
@@ -1001,6 +954,44 @@ bnad_cb_rx_stall(struct bnad *bnad, struct bna_rx *rx)
1001 } 954 }
1002} 955}
1003 956
957/*
958 * Free all RxQs buffers and then notify RX_E_CLEANUP_DONE to Rx fsm.
959 */
960static void
961bnad_rx_cleanup(void *work)
962{
963 struct bnad_rx_info *rx_info =
964 container_of(work, struct bnad_rx_info, rx_cleanup_work);
965 struct bnad_rx_ctrl *rx_ctrl;
966 struct bnad *bnad = NULL;
967 unsigned long flags;
968 uint32_t i;
969
970 for (i = 0; i < BNAD_MAX_RXP_PER_RX; i++) {
971 rx_ctrl = &rx_info->rx_ctrl[i];
972
973 if (!rx_ctrl->ccb)
974 continue;
975
976 bnad = rx_ctrl->ccb->bnad;
977
978 /*
979 * Wait till the poll handler has exited
980 * and nothing can be scheduled anymore
981 */
982 napi_disable(&rx_ctrl->napi);
983
984 bnad_cq_cleanup(bnad, rx_ctrl->ccb);
985 bnad_rxq_cleanup(bnad, rx_ctrl->ccb->rcb[0]);
986 if (rx_ctrl->ccb->rcb[1])
987 bnad_rxq_cleanup(bnad, rx_ctrl->ccb->rcb[1]);
988 }
989
990 spin_lock_irqsave(&bnad->bna_lock, flags);
991 bna_rx_cleanup_complete(rx_info->rx);
992 spin_unlock_irqrestore(&bnad->bna_lock, flags);
993}
994
1004static void 995static void
1005bnad_cb_rx_cleanup(struct bnad *bnad, struct bna_rx *rx) 996bnad_cb_rx_cleanup(struct bnad *bnad, struct bna_rx *rx)
1006{ 997{
@@ -1009,8 +1000,6 @@ bnad_cb_rx_cleanup(struct bnad *bnad, struct bna_rx *rx)
1009 struct bnad_rx_ctrl *rx_ctrl; 1000 struct bnad_rx_ctrl *rx_ctrl;
1010 int i; 1001 int i;
1011 1002
1012 mdelay(BNAD_TXRX_SYNC_MDELAY);
1013
1014 for (i = 0; i < BNAD_MAX_RXP_PER_RX; i++) { 1003 for (i = 0; i < BNAD_MAX_RXP_PER_RX; i++) {
1015 rx_ctrl = &rx_info->rx_ctrl[i]; 1004 rx_ctrl = &rx_info->rx_ctrl[i];
1016 ccb = rx_ctrl->ccb; 1005 ccb = rx_ctrl->ccb;
@@ -1021,12 +1010,9 @@ bnad_cb_rx_cleanup(struct bnad *bnad, struct bna_rx *rx)
1021 1010
1022 if (ccb->rcb[1]) 1011 if (ccb->rcb[1])
1023 clear_bit(BNAD_RXQ_STARTED, &ccb->rcb[1]->flags); 1012 clear_bit(BNAD_RXQ_STARTED, &ccb->rcb[1]->flags);
1024
1025 while (test_bit(BNAD_FP_IN_RX_PATH, &rx_ctrl->flags))
1026 cpu_relax();
1027 } 1013 }
1028 1014
1029 bna_rx_cleanup_complete(rx); 1015 queue_work(bnad->work_q, &rx_info->rx_cleanup_work);
1030} 1016}
1031 1017
1032static void 1018static void
@@ -1046,13 +1032,12 @@ bnad_cb_rx_post(struct bnad *bnad, struct bna_rx *rx)
1046 if (!ccb) 1032 if (!ccb)
1047 continue; 1033 continue;
1048 1034
1049 bnad_cq_cmpl_init(bnad, ccb); 1035 napi_enable(&rx_ctrl->napi);
1050 1036
1051 for (j = 0; j < BNAD_MAX_RXQ_PER_RXP; j++) { 1037 for (j = 0; j < BNAD_MAX_RXQ_PER_RXP; j++) {
1052 rcb = ccb->rcb[j]; 1038 rcb = ccb->rcb[j];
1053 if (!rcb) 1039 if (!rcb)
1054 continue; 1040 continue;
1055 bnad_free_all_rxbufs(bnad, rcb);
1056 1041
1057 set_bit(BNAD_RXQ_STARTED, &rcb->flags); 1042 set_bit(BNAD_RXQ_STARTED, &rcb->flags);
1058 set_bit(BNAD_RXQ_POST_OK, &rcb->flags); 1043 set_bit(BNAD_RXQ_POST_OK, &rcb->flags);
@@ -1063,7 +1048,7 @@ bnad_cb_rx_post(struct bnad *bnad, struct bna_rx *rx)
1063 if (!test_and_set_bit(BNAD_RXQ_REFILL, &rcb->flags)) { 1048 if (!test_and_set_bit(BNAD_RXQ_REFILL, &rcb->flags)) {
1064 if (BNA_QE_FREE_CNT(unmap_q, unmap_q->q_depth) 1049 if (BNA_QE_FREE_CNT(unmap_q, unmap_q->q_depth)
1065 >> BNAD_RXQ_REFILL_THRESHOLD_SHIFT) 1050 >> BNAD_RXQ_REFILL_THRESHOLD_SHIFT)
1066 bnad_alloc_n_post_rxbufs(bnad, rcb); 1051 bnad_rxq_post(bnad, rcb);
1067 smp_mb__before_clear_bit(); 1052 smp_mb__before_clear_bit();
1068 clear_bit(BNAD_RXQ_REFILL, &rcb->flags); 1053 clear_bit(BNAD_RXQ_REFILL, &rcb->flags);
1069 } 1054 }
@@ -1687,7 +1672,7 @@ bnad_napi_poll_rx(struct napi_struct *napi, int budget)
1687 if (!netif_carrier_ok(bnad->netdev)) 1672 if (!netif_carrier_ok(bnad->netdev))
1688 goto poll_exit; 1673 goto poll_exit;
1689 1674
1690 rcvd = bnad_poll_cq(bnad, rx_ctrl->ccb, budget); 1675 rcvd = bnad_cq_process(bnad, rx_ctrl->ccb, budget);
1691 if (rcvd >= budget) 1676 if (rcvd >= budget)
1692 return rcvd; 1677 return rcvd;
1693 1678
@@ -1704,7 +1689,7 @@ poll_exit:
1704 1689
1705#define BNAD_NAPI_POLL_QUOTA 64 1690#define BNAD_NAPI_POLL_QUOTA 64
1706static void 1691static void
1707bnad_napi_init(struct bnad *bnad, u32 rx_id) 1692bnad_napi_add(struct bnad *bnad, u32 rx_id)
1708{ 1693{
1709 struct bnad_rx_ctrl *rx_ctrl; 1694 struct bnad_rx_ctrl *rx_ctrl;
1710 int i; 1695 int i;
@@ -1718,34 +1703,18 @@ bnad_napi_init(struct bnad *bnad, u32 rx_id)
1718} 1703}
1719 1704
1720static void 1705static void
1721bnad_napi_enable(struct bnad *bnad, u32 rx_id) 1706bnad_napi_delete(struct bnad *bnad, u32 rx_id)
1722{
1723 struct bnad_rx_ctrl *rx_ctrl;
1724 int i;
1725
1726 /* Initialize & enable NAPI */
1727 for (i = 0; i < bnad->num_rxp_per_rx; i++) {
1728 rx_ctrl = &bnad->rx_info[rx_id].rx_ctrl[i];
1729
1730 napi_enable(&rx_ctrl->napi);
1731 }
1732}
1733
1734static void
1735bnad_napi_disable(struct bnad *bnad, u32 rx_id)
1736{ 1707{
1737 int i; 1708 int i;
1738 1709
1739 /* First disable and then clean up */ 1710 /* First disable and then clean up */
1740 for (i = 0; i < bnad->num_rxp_per_rx; i++) { 1711 for (i = 0; i < bnad->num_rxp_per_rx; i++)
1741 napi_disable(&bnad->rx_info[rx_id].rx_ctrl[i].napi);
1742 netif_napi_del(&bnad->rx_info[rx_id].rx_ctrl[i].napi); 1712 netif_napi_del(&bnad->rx_info[rx_id].rx_ctrl[i].napi);
1743 }
1744} 1713}
1745 1714
1746/* Should be held with conf_lock held */ 1715/* Should be held with conf_lock held */
1747void 1716void
1748bnad_cleanup_tx(struct bnad *bnad, u32 tx_id) 1717bnad_destroy_tx(struct bnad *bnad, u32 tx_id)
1749{ 1718{
1750 struct bnad_tx_info *tx_info = &bnad->tx_info[tx_id]; 1719 struct bnad_tx_info *tx_info = &bnad->tx_info[tx_id];
1751 struct bna_res_info *res_info = &bnad->tx_res_info[tx_id].res_info[0]; 1720 struct bna_res_info *res_info = &bnad->tx_res_info[tx_id].res_info[0];
@@ -1764,9 +1733,6 @@ bnad_cleanup_tx(struct bnad *bnad, u32 tx_id)
1764 bnad_tx_msix_unregister(bnad, tx_info, 1733 bnad_tx_msix_unregister(bnad, tx_info,
1765 bnad->num_txq_per_tx); 1734 bnad->num_txq_per_tx);
1766 1735
1767 if (0 == tx_id)
1768 tasklet_kill(&bnad->tx_free_tasklet);
1769
1770 spin_lock_irqsave(&bnad->bna_lock, flags); 1736 spin_lock_irqsave(&bnad->bna_lock, flags);
1771 bna_tx_destroy(tx_info->tx); 1737 bna_tx_destroy(tx_info->tx);
1772 spin_unlock_irqrestore(&bnad->bna_lock, flags); 1738 spin_unlock_irqrestore(&bnad->bna_lock, flags);
@@ -1832,6 +1798,9 @@ bnad_setup_tx(struct bnad *bnad, u32 tx_id)
1832 goto err_return; 1798 goto err_return;
1833 tx_info->tx = tx; 1799 tx_info->tx = tx;
1834 1800
1801 INIT_DELAYED_WORK(&tx_info->tx_cleanup_work,
1802 (work_func_t)bnad_tx_cleanup);
1803
1835 /* Register ISR for the Tx object */ 1804 /* Register ISR for the Tx object */
1836 if (intr_info->intr_type == BNA_INTR_T_MSIX) { 1805 if (intr_info->intr_type == BNA_INTR_T_MSIX) {
1837 err = bnad_tx_msix_register(bnad, tx_info, 1806 err = bnad_tx_msix_register(bnad, tx_info,
@@ -1896,7 +1865,7 @@ bnad_rx_ctrl_init(struct bnad *bnad, u32 rx_id)
1896 1865
1897/* Called with mutex_lock(&bnad->conf_mutex) held */ 1866/* Called with mutex_lock(&bnad->conf_mutex) held */
1898void 1867void
1899bnad_cleanup_rx(struct bnad *bnad, u32 rx_id) 1868bnad_destroy_rx(struct bnad *bnad, u32 rx_id)
1900{ 1869{
1901 struct bnad_rx_info *rx_info = &bnad->rx_info[rx_id]; 1870 struct bnad_rx_info *rx_info = &bnad->rx_info[rx_id];
1902 struct bna_rx_config *rx_config = &bnad->rx_config[rx_id]; 1871 struct bna_rx_config *rx_config = &bnad->rx_config[rx_id];
@@ -1928,7 +1897,7 @@ bnad_cleanup_rx(struct bnad *bnad, u32 rx_id)
1928 if (rx_info->rx_ctrl[0].ccb->intr_type == BNA_INTR_T_MSIX) 1897 if (rx_info->rx_ctrl[0].ccb->intr_type == BNA_INTR_T_MSIX)
1929 bnad_rx_msix_unregister(bnad, rx_info, rx_config->num_paths); 1898 bnad_rx_msix_unregister(bnad, rx_info, rx_config->num_paths);
1930 1899
1931 bnad_napi_disable(bnad, rx_id); 1900 bnad_napi_delete(bnad, rx_id);
1932 1901
1933 spin_lock_irqsave(&bnad->bna_lock, flags); 1902 spin_lock_irqsave(&bnad->bna_lock, flags);
1934 bna_rx_destroy(rx_info->rx); 1903 bna_rx_destroy(rx_info->rx);
@@ -1952,7 +1921,7 @@ bnad_setup_rx(struct bnad *bnad, u32 rx_id)
1952 struct bna_rx_config *rx_config = &bnad->rx_config[rx_id]; 1921 struct bna_rx_config *rx_config = &bnad->rx_config[rx_id];
1953 static const struct bna_rx_event_cbfn rx_cbfn = { 1922 static const struct bna_rx_event_cbfn rx_cbfn = {
1954 .rcb_setup_cbfn = bnad_cb_rcb_setup, 1923 .rcb_setup_cbfn = bnad_cb_rcb_setup,
1955 .rcb_destroy_cbfn = bnad_cb_rcb_destroy, 1924 .rcb_destroy_cbfn = NULL,
1956 .ccb_setup_cbfn = bnad_cb_ccb_setup, 1925 .ccb_setup_cbfn = bnad_cb_ccb_setup,
1957 .ccb_destroy_cbfn = bnad_cb_ccb_destroy, 1926 .ccb_destroy_cbfn = bnad_cb_ccb_destroy,
1958 .rx_stall_cbfn = bnad_cb_rx_stall, 1927 .rx_stall_cbfn = bnad_cb_rx_stall,
@@ -1998,11 +1967,14 @@ bnad_setup_rx(struct bnad *bnad, u32 rx_id)
1998 rx_info->rx = rx; 1967 rx_info->rx = rx;
1999 spin_unlock_irqrestore(&bnad->bna_lock, flags); 1968 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2000 1969
1970 INIT_WORK(&rx_info->rx_cleanup_work,
1971 (work_func_t)(bnad_rx_cleanup));
1972
2001 /* 1973 /*
2002 * Init NAPI, so that state is set to NAPI_STATE_SCHED, 1974 * Init NAPI, so that state is set to NAPI_STATE_SCHED,
2003 * so that IRQ handler cannot schedule NAPI at this point. 1975 * so that IRQ handler cannot schedule NAPI at this point.
2004 */ 1976 */
2005 bnad_napi_init(bnad, rx_id); 1977 bnad_napi_add(bnad, rx_id);
2006 1978
2007 /* Register ISR for the Rx object */ 1979 /* Register ISR for the Rx object */
2008 if (intr_info->intr_type == BNA_INTR_T_MSIX) { 1980 if (intr_info->intr_type == BNA_INTR_T_MSIX) {
@@ -2028,13 +2000,10 @@ bnad_setup_rx(struct bnad *bnad, u32 rx_id)
2028 bna_rx_enable(rx); 2000 bna_rx_enable(rx);
2029 spin_unlock_irqrestore(&bnad->bna_lock, flags); 2001 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2030 2002
2031 /* Enable scheduling of NAPI */
2032 bnad_napi_enable(bnad, rx_id);
2033
2034 return 0; 2003 return 0;
2035 2004
2036err_return: 2005err_return:
2037 bnad_cleanup_rx(bnad, rx_id); 2006 bnad_destroy_rx(bnad, rx_id);
2038 return err; 2007 return err;
2039} 2008}
2040 2009
@@ -2519,7 +2488,7 @@ bnad_open(struct net_device *netdev)
2519 return 0; 2488 return 0;
2520 2489
2521cleanup_tx: 2490cleanup_tx:
2522 bnad_cleanup_tx(bnad, 0); 2491 bnad_destroy_tx(bnad, 0);
2523 2492
2524err_return: 2493err_return:
2525 mutex_unlock(&bnad->conf_mutex); 2494 mutex_unlock(&bnad->conf_mutex);
@@ -2546,8 +2515,8 @@ bnad_stop(struct net_device *netdev)
2546 2515
2547 wait_for_completion(&bnad->bnad_completions.enet_comp); 2516 wait_for_completion(&bnad->bnad_completions.enet_comp);
2548 2517
2549 bnad_cleanup_tx(bnad, 0); 2518 bnad_destroy_tx(bnad, 0);
2550 bnad_cleanup_rx(bnad, 0); 2519 bnad_destroy_rx(bnad, 0);
2551 2520
2552 /* Synchronize mailbox IRQ */ 2521 /* Synchronize mailbox IRQ */
2553 bnad_mbox_irq_sync(bnad); 2522 bnad_mbox_irq_sync(bnad);
@@ -2620,7 +2589,7 @@ bnad_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2620 if ((u16) (*tcb->hw_consumer_index) != 2589 if ((u16) (*tcb->hw_consumer_index) !=
2621 tcb->consumer_index && 2590 tcb->consumer_index &&
2622 !test_and_set_bit(BNAD_TXQ_FREE_SENT, &tcb->flags)) { 2591 !test_and_set_bit(BNAD_TXQ_FREE_SENT, &tcb->flags)) {
2623 acked = bnad_free_txbufs(bnad, tcb); 2592 acked = bnad_txcmpl_process(bnad, tcb);
2624 if (likely(test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags))) 2593 if (likely(test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags)))
2625 bna_ib_ack(tcb->i_dbell, acked); 2594 bna_ib_ack(tcb->i_dbell, acked);
2626 smp_mb__before_clear_bit(); 2595 smp_mb__before_clear_bit();
@@ -2843,9 +2812,6 @@ bnad_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2843 bna_txq_prod_indx_doorbell(tcb); 2812 bna_txq_prod_indx_doorbell(tcb);
2844 smp_mb(); 2813 smp_mb();
2845 2814
2846 if ((u16) (*tcb->hw_consumer_index) != tcb->consumer_index)
2847 tasklet_schedule(&bnad->tx_free_tasklet);
2848
2849 return NETDEV_TX_OK; 2815 return NETDEV_TX_OK;
2850} 2816}
2851 2817
@@ -3127,8 +3093,8 @@ bnad_netdev_init(struct bnad *bnad, bool using_dac)
3127/* 3093/*
3128 * 1. Initialize the bnad structure 3094 * 1. Initialize the bnad structure
3129 * 2. Setup netdev pointer in pci_dev 3095 * 2. Setup netdev pointer in pci_dev
3130 * 3. Initialze Tx free tasklet 3096 * 3. Initialize no. of TxQ & CQs & MSIX vectors
3131 * 4. Initialize no. of TxQ & CQs & MSIX vectors 3097 * 4. Initialize work queue.
3132 */ 3098 */
3133static int 3099static int
3134bnad_init(struct bnad *bnad, 3100bnad_init(struct bnad *bnad,
@@ -3171,8 +3137,11 @@ bnad_init(struct bnad *bnad,
3171 bnad->tx_coalescing_timeo = BFI_TX_COALESCING_TIMEO; 3137 bnad->tx_coalescing_timeo = BFI_TX_COALESCING_TIMEO;
3172 bnad->rx_coalescing_timeo = BFI_RX_COALESCING_TIMEO; 3138 bnad->rx_coalescing_timeo = BFI_RX_COALESCING_TIMEO;
3173 3139
3174 tasklet_init(&bnad->tx_free_tasklet, bnad_tx_free_tasklet, 3140 sprintf(bnad->wq_name, "%s_wq_%d", BNAD_NAME, bnad->id);
3175 (unsigned long)bnad); 3141 bnad->work_q = create_singlethread_workqueue(bnad->wq_name);
3142
3143 if (!bnad->work_q)
3144 return -ENOMEM;
3176 3145
3177 return 0; 3146 return 0;
3178} 3147}
@@ -3185,6 +3154,12 @@ bnad_init(struct bnad *bnad,
3185static void 3154static void
3186bnad_uninit(struct bnad *bnad) 3155bnad_uninit(struct bnad *bnad)
3187{ 3156{
3157 if (bnad->work_q) {
3158 flush_workqueue(bnad->work_q);
3159 destroy_workqueue(bnad->work_q);
3160 bnad->work_q = NULL;
3161 }
3162
3188 if (bnad->bar0) 3163 if (bnad->bar0)
3189 iounmap(bnad->bar0); 3164 iounmap(bnad->bar0);
3190 pci_set_drvdata(bnad->pcidev, NULL); 3165 pci_set_drvdata(bnad->pcidev, NULL);
@@ -3304,7 +3279,6 @@ bnad_pci_probe(struct pci_dev *pdev,
3304 /* 3279 /*
3305 * Initialize bnad structure 3280 * Initialize bnad structure
3306 * Setup relation between pci_dev & netdev 3281 * Setup relation between pci_dev & netdev
3307 * Init Tx free tasklet
3308 */ 3282 */
3309 err = bnad_init(bnad, pdev, netdev); 3283 err = bnad_init(bnad, pdev, netdev);
3310 if (err) 3284 if (err)
diff --git a/drivers/net/ethernet/brocade/bna/bnad.h b/drivers/net/ethernet/brocade/bna/bnad.h
index 55824d92699f..72742be11277 100644
--- a/drivers/net/ethernet/brocade/bna/bnad.h
+++ b/drivers/net/ethernet/brocade/bna/bnad.h
@@ -71,7 +71,7 @@ struct bnad_rx_ctrl {
71#define BNAD_NAME "bna" 71#define BNAD_NAME "bna"
72#define BNAD_NAME_LEN 64 72#define BNAD_NAME_LEN 64
73 73
74#define BNAD_VERSION "3.0.2.2" 74#define BNAD_VERSION "3.0.23.0"
75 75
76#define BNAD_MAILBOX_MSIX_INDEX 0 76#define BNAD_MAILBOX_MSIX_INDEX 0
77#define BNAD_MAILBOX_MSIX_VECTORS 1 77#define BNAD_MAILBOX_MSIX_VECTORS 1
@@ -210,6 +210,7 @@ struct bnad_tx_info {
210 struct bna_tx *tx; /* 1:1 between tx_info & tx */ 210 struct bna_tx *tx; /* 1:1 between tx_info & tx */
211 struct bna_tcb *tcb[BNAD_MAX_TXQ_PER_TX]; 211 struct bna_tcb *tcb[BNAD_MAX_TXQ_PER_TX];
212 u32 tx_id; 212 u32 tx_id;
213 struct delayed_work tx_cleanup_work;
213} ____cacheline_aligned; 214} ____cacheline_aligned;
214 215
215struct bnad_rx_info { 216struct bnad_rx_info {
@@ -217,6 +218,7 @@ struct bnad_rx_info {
217 218
218 struct bnad_rx_ctrl rx_ctrl[BNAD_MAX_RXP_PER_RX]; 219 struct bnad_rx_ctrl rx_ctrl[BNAD_MAX_RXP_PER_RX];
219 u32 rx_id; 220 u32 rx_id;
221 struct work_struct rx_cleanup_work;
220} ____cacheline_aligned; 222} ____cacheline_aligned;
221 223
222/* Unmap queues for Tx / Rx cleanup */ 224/* Unmap queues for Tx / Rx cleanup */
@@ -318,7 +320,7 @@ struct bnad {
318 /* Burnt in MAC address */ 320 /* Burnt in MAC address */
319 mac_t perm_addr; 321 mac_t perm_addr;
320 322
321 struct tasklet_struct tx_free_tasklet; 323 struct workqueue_struct *work_q;
322 324
323 /* Statistics */ 325 /* Statistics */
324 struct bnad_stats stats; 326 struct bnad_stats stats;
@@ -328,6 +330,7 @@ struct bnad {
328 char adapter_name[BNAD_NAME_LEN]; 330 char adapter_name[BNAD_NAME_LEN];
329 char port_name[BNAD_NAME_LEN]; 331 char port_name[BNAD_NAME_LEN];
330 char mbox_irq_name[BNAD_NAME_LEN]; 332 char mbox_irq_name[BNAD_NAME_LEN];
333 char wq_name[BNAD_NAME_LEN];
331 334
332 /* debugfs specific data */ 335 /* debugfs specific data */
333 char *regdata; 336 char *regdata;
@@ -370,8 +373,8 @@ extern void bnad_rx_coalescing_timeo_set(struct bnad *bnad);
370 373
371extern int bnad_setup_rx(struct bnad *bnad, u32 rx_id); 374extern int bnad_setup_rx(struct bnad *bnad, u32 rx_id);
372extern int bnad_setup_tx(struct bnad *bnad, u32 tx_id); 375extern int bnad_setup_tx(struct bnad *bnad, u32 tx_id);
373extern void bnad_cleanup_tx(struct bnad *bnad, u32 tx_id); 376extern void bnad_destroy_tx(struct bnad *bnad, u32 tx_id);
374extern void bnad_cleanup_rx(struct bnad *bnad, u32 rx_id); 377extern void bnad_destroy_rx(struct bnad *bnad, u32 rx_id);
375 378
376/* Timer start/stop protos */ 379/* Timer start/stop protos */
377extern void bnad_dim_timer_start(struct bnad *bnad); 380extern void bnad_dim_timer_start(struct bnad *bnad);
diff --git a/drivers/net/ethernet/brocade/bna/bnad_ethtool.c b/drivers/net/ethernet/brocade/bna/bnad_ethtool.c
index ab753d7334a6..40e1e84f4984 100644
--- a/drivers/net/ethernet/brocade/bna/bnad_ethtool.c
+++ b/drivers/net/ethernet/brocade/bna/bnad_ethtool.c
@@ -464,7 +464,7 @@ bnad_set_ringparam(struct net_device *netdev,
464 for (i = 0; i < bnad->num_rx; i++) { 464 for (i = 0; i < bnad->num_rx; i++) {
465 if (!bnad->rx_info[i].rx) 465 if (!bnad->rx_info[i].rx)
466 continue; 466 continue;
467 bnad_cleanup_rx(bnad, i); 467 bnad_destroy_rx(bnad, i);
468 current_err = bnad_setup_rx(bnad, i); 468 current_err = bnad_setup_rx(bnad, i);
469 if (current_err && !err) 469 if (current_err && !err)
470 err = current_err; 470 err = current_err;
@@ -492,7 +492,7 @@ bnad_set_ringparam(struct net_device *netdev,
492 for (i = 0; i < bnad->num_tx; i++) { 492 for (i = 0; i < bnad->num_tx; i++) {
493 if (!bnad->tx_info[i].tx) 493 if (!bnad->tx_info[i].tx)
494 continue; 494 continue;
495 bnad_cleanup_tx(bnad, i); 495 bnad_destroy_tx(bnad, i);
496 current_err = bnad_setup_tx(bnad, i); 496 current_err = bnad_setup_tx(bnad, i);
497 if (current_err && !err) 497 if (current_err && !err)
498 err = current_err; 498 err = current_err;
@@ -539,7 +539,7 @@ bnad_set_pauseparam(struct net_device *netdev,
539} 539}
540 540
541static void 541static void
542bnad_get_strings(struct net_device *netdev, u32 stringset, u8 * string) 542bnad_get_strings(struct net_device *netdev, u32 stringset, u8 *string)
543{ 543{
544 struct bnad *bnad = netdev_priv(netdev); 544 struct bnad *bnad = netdev_priv(netdev);
545 int i, j, q_num; 545 int i, j, q_num;
diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c
index c4834c23be35..1466bc4e3dda 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -1213,6 +1213,7 @@ static const struct ethtool_ops macb_ethtool_ops = {
1213 .set_settings = macb_set_settings, 1213 .set_settings = macb_set_settings,
1214 .get_drvinfo = macb_get_drvinfo, 1214 .get_drvinfo = macb_get_drvinfo,
1215 .get_link = ethtool_op_get_link, 1215 .get_link = ethtool_op_get_link,
1216 .get_ts_info = ethtool_op_get_ts_info,
1216}; 1217};
1217 1218
1218static int macb_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 1219static int macb_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
diff --git a/drivers/net/ethernet/cisco/enic/enic_main.c b/drivers/net/ethernet/cisco/enic/enic_main.c
index 77b4e873f91c..d7ac6c17547c 100644
--- a/drivers/net/ethernet/cisco/enic/enic_main.c
+++ b/drivers/net/ethernet/cisco/enic/enic_main.c
@@ -1193,18 +1193,16 @@ static int enic_get_vf_port(struct net_device *netdev, int vf,
1193 if (err) 1193 if (err)
1194 return err; 1194 return err;
1195 1195
1196 NLA_PUT_U16(skb, IFLA_PORT_REQUEST, pp->request); 1196 if (nla_put_u16(skb, IFLA_PORT_REQUEST, pp->request) ||
1197 NLA_PUT_U16(skb, IFLA_PORT_RESPONSE, response); 1197 nla_put_u16(skb, IFLA_PORT_RESPONSE, response) ||
1198 if (pp->set & ENIC_SET_NAME) 1198 ((pp->set & ENIC_SET_NAME) &&
1199 NLA_PUT(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX, 1199 nla_put(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX, pp->name)) ||
1200 pp->name); 1200 ((pp->set & ENIC_SET_INSTANCE) &&
1201 if (pp->set & ENIC_SET_INSTANCE) 1201 nla_put(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
1202 NLA_PUT(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX, 1202 pp->instance_uuid)) ||
1203 pp->instance_uuid); 1203 ((pp->set & ENIC_SET_HOST) &&
1204 if (pp->set & ENIC_SET_HOST) 1204 nla_put(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX, pp->host_uuid)))
1205 NLA_PUT(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX, 1205 goto nla_put_failure;
1206 pp->host_uuid);
1207
1208 return 0; 1206 return 0;
1209 1207
1210nla_put_failure: 1208nla_put_failure:
diff --git a/drivers/net/ethernet/dec/tulip/de2104x.c b/drivers/net/ethernet/dec/tulip/de2104x.c
index 68f1c39184df..61cc09342865 100644
--- a/drivers/net/ethernet/dec/tulip/de2104x.c
+++ b/drivers/net/ethernet/dec/tulip/de2104x.c
@@ -1380,6 +1380,7 @@ static void de_free_rings (struct de_private *de)
1380static int de_open (struct net_device *dev) 1380static int de_open (struct net_device *dev)
1381{ 1381{
1382 struct de_private *de = netdev_priv(dev); 1382 struct de_private *de = netdev_priv(dev);
1383 const int irq = de->pdev->irq;
1383 int rc; 1384 int rc;
1384 1385
1385 netif_dbg(de, ifup, dev, "enabling interface\n"); 1386 netif_dbg(de, ifup, dev, "enabling interface\n");
@@ -1394,10 +1395,9 @@ static int de_open (struct net_device *dev)
1394 1395
1395 dw32(IntrMask, 0); 1396 dw32(IntrMask, 0);
1396 1397
1397 rc = request_irq(dev->irq, de_interrupt, IRQF_SHARED, dev->name, dev); 1398 rc = request_irq(irq, de_interrupt, IRQF_SHARED, dev->name, dev);
1398 if (rc) { 1399 if (rc) {
1399 netdev_err(dev, "IRQ %d request failure, err=%d\n", 1400 netdev_err(dev, "IRQ %d request failure, err=%d\n", irq, rc);
1400 dev->irq, rc);
1401 goto err_out_free; 1401 goto err_out_free;
1402 } 1402 }
1403 1403
@@ -1413,7 +1413,7 @@ static int de_open (struct net_device *dev)
1413 return 0; 1413 return 0;
1414 1414
1415err_out_free_irq: 1415err_out_free_irq:
1416 free_irq(dev->irq, dev); 1416 free_irq(irq, dev);
1417err_out_free: 1417err_out_free:
1418 de_free_rings(de); 1418 de_free_rings(de);
1419 return rc; 1419 return rc;
@@ -1434,7 +1434,7 @@ static int de_close (struct net_device *dev)
1434 netif_carrier_off(dev); 1434 netif_carrier_off(dev);
1435 spin_unlock_irqrestore(&de->lock, flags); 1435 spin_unlock_irqrestore(&de->lock, flags);
1436 1436
1437 free_irq(dev->irq, dev); 1437 free_irq(de->pdev->irq, dev);
1438 1438
1439 de_free_rings(de); 1439 de_free_rings(de);
1440 de_adapter_sleep(de); 1440 de_adapter_sleep(de);
@@ -1444,6 +1444,7 @@ static int de_close (struct net_device *dev)
1444static void de_tx_timeout (struct net_device *dev) 1444static void de_tx_timeout (struct net_device *dev)
1445{ 1445{
1446 struct de_private *de = netdev_priv(dev); 1446 struct de_private *de = netdev_priv(dev);
1447 const int irq = de->pdev->irq;
1447 1448
1448 netdev_dbg(dev, "NIC status %08x mode %08x sia %08x desc %u/%u/%u\n", 1449 netdev_dbg(dev, "NIC status %08x mode %08x sia %08x desc %u/%u/%u\n",
1449 dr32(MacStatus), dr32(MacMode), dr32(SIAStatus), 1450 dr32(MacStatus), dr32(MacMode), dr32(SIAStatus),
@@ -1451,7 +1452,7 @@ static void de_tx_timeout (struct net_device *dev)
1451 1452
1452 del_timer_sync(&de->media_timer); 1453 del_timer_sync(&de->media_timer);
1453 1454
1454 disable_irq(dev->irq); 1455 disable_irq(irq);
1455 spin_lock_irq(&de->lock); 1456 spin_lock_irq(&de->lock);
1456 1457
1457 de_stop_hw(de); 1458 de_stop_hw(de);
@@ -1459,12 +1460,12 @@ static void de_tx_timeout (struct net_device *dev)
1459 netif_carrier_off(dev); 1460 netif_carrier_off(dev);
1460 1461
1461 spin_unlock_irq(&de->lock); 1462 spin_unlock_irq(&de->lock);
1462 enable_irq(dev->irq); 1463 enable_irq(irq);
1463 1464
1464 /* Update the error counts. */ 1465 /* Update the error counts. */
1465 __de_get_stats(de); 1466 __de_get_stats(de);
1466 1467
1467 synchronize_irq(dev->irq); 1468 synchronize_irq(irq);
1468 de_clean_rings(de); 1469 de_clean_rings(de);
1469 1470
1470 de_init_rings(de); 1471 de_init_rings(de);
@@ -2024,8 +2025,6 @@ static int __devinit de_init_one (struct pci_dev *pdev,
2024 goto err_out_res; 2025 goto err_out_res;
2025 } 2026 }
2026 2027
2027 dev->irq = pdev->irq;
2028
2029 /* obtain and check validity of PCI I/O address */ 2028 /* obtain and check validity of PCI I/O address */
2030 pciaddr = pci_resource_start(pdev, 1); 2029 pciaddr = pci_resource_start(pdev, 1);
2031 if (!pciaddr) { 2030 if (!pciaddr) {
@@ -2050,7 +2049,6 @@ static int __devinit de_init_one (struct pci_dev *pdev,
2050 pciaddr, pci_name(pdev)); 2049 pciaddr, pci_name(pdev));
2051 goto err_out_res; 2050 goto err_out_res;
2052 } 2051 }
2053 dev->base_addr = (unsigned long) regs;
2054 de->regs = regs; 2052 de->regs = regs;
2055 2053
2056 de_adapter_wake(de); 2054 de_adapter_wake(de);
@@ -2078,11 +2076,9 @@ static int __devinit de_init_one (struct pci_dev *pdev,
2078 goto err_out_iomap; 2076 goto err_out_iomap;
2079 2077
2080 /* print info about board and interface just registered */ 2078 /* print info about board and interface just registered */
2081 netdev_info(dev, "%s at 0x%lx, %pM, IRQ %d\n", 2079 netdev_info(dev, "%s at %p, %pM, IRQ %d\n",
2082 de->de21040 ? "21040" : "21041", 2080 de->de21040 ? "21040" : "21041",
2083 dev->base_addr, 2081 regs, dev->dev_addr, pdev->irq);
2084 dev->dev_addr,
2085 dev->irq);
2086 2082
2087 pci_set_drvdata(pdev, dev); 2083 pci_set_drvdata(pdev, dev);
2088 2084
@@ -2130,9 +2126,11 @@ static int de_suspend (struct pci_dev *pdev, pm_message_t state)
2130 2126
2131 rtnl_lock(); 2127 rtnl_lock();
2132 if (netif_running (dev)) { 2128 if (netif_running (dev)) {
2129 const int irq = pdev->irq;
2130
2133 del_timer_sync(&de->media_timer); 2131 del_timer_sync(&de->media_timer);
2134 2132
2135 disable_irq(dev->irq); 2133 disable_irq(irq);
2136 spin_lock_irq(&de->lock); 2134 spin_lock_irq(&de->lock);
2137 2135
2138 de_stop_hw(de); 2136 de_stop_hw(de);
@@ -2141,12 +2139,12 @@ static int de_suspend (struct pci_dev *pdev, pm_message_t state)
2141 netif_carrier_off(dev); 2139 netif_carrier_off(dev);
2142 2140
2143 spin_unlock_irq(&de->lock); 2141 spin_unlock_irq(&de->lock);
2144 enable_irq(dev->irq); 2142 enable_irq(irq);
2145 2143
2146 /* Update the error counts. */ 2144 /* Update the error counts. */
2147 __de_get_stats(de); 2145 __de_get_stats(de);
2148 2146
2149 synchronize_irq(dev->irq); 2147 synchronize_irq(irq);
2150 de_clean_rings(de); 2148 de_clean_rings(de);
2151 2149
2152 de_adapter_sleep(de); 2150 de_adapter_sleep(de);
diff --git a/drivers/net/ethernet/dec/tulip/dmfe.c b/drivers/net/ethernet/dec/tulip/dmfe.c
index 1eccf4945485..0ef5b68acd05 100644
--- a/drivers/net/ethernet/dec/tulip/dmfe.c
+++ b/drivers/net/ethernet/dec/tulip/dmfe.c
@@ -150,6 +150,12 @@
150#define DMFE_TX_TIMEOUT ((3*HZ)/2) /* tx packet time-out time 1.5 s" */ 150#define DMFE_TX_TIMEOUT ((3*HZ)/2) /* tx packet time-out time 1.5 s" */
151#define DMFE_TX_KICK (HZ/2) /* tx packet Kick-out time 0.5 s" */ 151#define DMFE_TX_KICK (HZ/2) /* tx packet Kick-out time 0.5 s" */
152 152
153#define dw32(reg, val) iowrite32(val, ioaddr + (reg))
154#define dw16(reg, val) iowrite16(val, ioaddr + (reg))
155#define dr32(reg) ioread32(ioaddr + (reg))
156#define dr16(reg) ioread16(ioaddr + (reg))
157#define dr8(reg) ioread8(ioaddr + (reg))
158
153#define DMFE_DBUG(dbug_now, msg, value) \ 159#define DMFE_DBUG(dbug_now, msg, value) \
154 do { \ 160 do { \
155 if (dmfe_debug || (dbug_now)) \ 161 if (dmfe_debug || (dbug_now)) \
@@ -178,14 +184,6 @@
178 184
179#define SROM_V41_CODE 0x14 185#define SROM_V41_CODE 0x14
180 186
181#define SROM_CLK_WRITE(data, ioaddr) \
182 outl(data|CR9_SROM_READ|CR9_SRCS,ioaddr); \
183 udelay(5); \
184 outl(data|CR9_SROM_READ|CR9_SRCS|CR9_SRCLK,ioaddr); \
185 udelay(5); \
186 outl(data|CR9_SROM_READ|CR9_SRCS,ioaddr); \
187 udelay(5);
188
189#define __CHK_IO_SIZE(pci_id, dev_rev) \ 187#define __CHK_IO_SIZE(pci_id, dev_rev) \
190 (( ((pci_id)==PCI_DM9132_ID) || ((dev_rev) >= 0x30) ) ? \ 188 (( ((pci_id)==PCI_DM9132_ID) || ((dev_rev) >= 0x30) ) ? \
191 DM9102A_IO_SIZE: DM9102_IO_SIZE) 189 DM9102A_IO_SIZE: DM9102_IO_SIZE)
@@ -213,11 +211,11 @@ struct rx_desc {
213struct dmfe_board_info { 211struct dmfe_board_info {
214 u32 chip_id; /* Chip vendor/Device ID */ 212 u32 chip_id; /* Chip vendor/Device ID */
215 u8 chip_revision; /* Chip revision */ 213 u8 chip_revision; /* Chip revision */
216 struct DEVICE *next_dev; /* next device */ 214 struct net_device *next_dev; /* next device */
217 struct pci_dev *pdev; /* PCI device */ 215 struct pci_dev *pdev; /* PCI device */
218 spinlock_t lock; 216 spinlock_t lock;
219 217
220 long ioaddr; /* I/O base address */ 218 void __iomem *ioaddr; /* I/O base address */
221 u32 cr0_data; 219 u32 cr0_data;
222 u32 cr5_data; 220 u32 cr5_data;
223 u32 cr6_data; 221 u32 cr6_data;
@@ -320,20 +318,20 @@ static netdev_tx_t dmfe_start_xmit(struct sk_buff *, struct DEVICE *);
320static int dmfe_stop(struct DEVICE *); 318static int dmfe_stop(struct DEVICE *);
321static void dmfe_set_filter_mode(struct DEVICE *); 319static void dmfe_set_filter_mode(struct DEVICE *);
322static const struct ethtool_ops netdev_ethtool_ops; 320static const struct ethtool_ops netdev_ethtool_ops;
323static u16 read_srom_word(long ,int); 321static u16 read_srom_word(void __iomem *, int);
324static irqreturn_t dmfe_interrupt(int , void *); 322static irqreturn_t dmfe_interrupt(int , void *);
325#ifdef CONFIG_NET_POLL_CONTROLLER 323#ifdef CONFIG_NET_POLL_CONTROLLER
326static void poll_dmfe (struct net_device *dev); 324static void poll_dmfe (struct net_device *dev);
327#endif 325#endif
328static void dmfe_descriptor_init(struct net_device *, unsigned long); 326static void dmfe_descriptor_init(struct net_device *);
329static void allocate_rx_buffer(struct net_device *); 327static void allocate_rx_buffer(struct net_device *);
330static void update_cr6(u32, unsigned long); 328static void update_cr6(u32, void __iomem *);
331static void send_filter_frame(struct DEVICE *); 329static void send_filter_frame(struct DEVICE *);
332static void dm9132_id_table(struct DEVICE *); 330static void dm9132_id_table(struct DEVICE *);
333static u16 phy_read(unsigned long, u8, u8, u32); 331static u16 phy_read(void __iomem *, u8, u8, u32);
334static void phy_write(unsigned long, u8, u8, u16, u32); 332static void phy_write(void __iomem *, u8, u8, u16, u32);
335static void phy_write_1bit(unsigned long, u32); 333static void phy_write_1bit(void __iomem *, u32);
336static u16 phy_read_1bit(unsigned long); 334static u16 phy_read_1bit(void __iomem *);
337static u8 dmfe_sense_speed(struct dmfe_board_info *); 335static u8 dmfe_sense_speed(struct dmfe_board_info *);
338static void dmfe_process_mode(struct dmfe_board_info *); 336static void dmfe_process_mode(struct dmfe_board_info *);
339static void dmfe_timer(unsigned long); 337static void dmfe_timer(unsigned long);
@@ -462,14 +460,16 @@ static int __devinit dmfe_init_one (struct pci_dev *pdev,
462 db->buf_pool_dma_start = db->buf_pool_dma_ptr; 460 db->buf_pool_dma_start = db->buf_pool_dma_ptr;
463 461
464 db->chip_id = ent->driver_data; 462 db->chip_id = ent->driver_data;
465 db->ioaddr = pci_resource_start(pdev, 0); 463 /* IO type range. */
464 db->ioaddr = pci_iomap(pdev, 0, 0);
465 if (!db->ioaddr)
466 goto err_out_free_buf;
467
466 db->chip_revision = pdev->revision; 468 db->chip_revision = pdev->revision;
467 db->wol_mode = 0; 469 db->wol_mode = 0;
468 470
469 db->pdev = pdev; 471 db->pdev = pdev;
470 472
471 dev->base_addr = db->ioaddr;
472 dev->irq = pdev->irq;
473 pci_set_drvdata(pdev, dev); 473 pci_set_drvdata(pdev, dev);
474 dev->netdev_ops = &netdev_ops; 474 dev->netdev_ops = &netdev_ops;
475 dev->ethtool_ops = &netdev_ethtool_ops; 475 dev->ethtool_ops = &netdev_ethtool_ops;
@@ -484,9 +484,10 @@ static int __devinit dmfe_init_one (struct pci_dev *pdev,
484 db->chip_type = 0; 484 db->chip_type = 0;
485 485
486 /* read 64 word srom data */ 486 /* read 64 word srom data */
487 for (i = 0; i < 64; i++) 487 for (i = 0; i < 64; i++) {
488 ((__le16 *) db->srom)[i] = 488 ((__le16 *) db->srom)[i] =
489 cpu_to_le16(read_srom_word(db->ioaddr, i)); 489 cpu_to_le16(read_srom_word(db->ioaddr, i));
490 }
490 491
491 /* Set Node address */ 492 /* Set Node address */
492 for (i = 0; i < 6; i++) 493 for (i = 0; i < 6; i++)
@@ -494,16 +495,18 @@ static int __devinit dmfe_init_one (struct pci_dev *pdev,
494 495
495 err = register_netdev (dev); 496 err = register_netdev (dev);
496 if (err) 497 if (err)
497 goto err_out_free_buf; 498 goto err_out_unmap;
498 499
499 dev_info(&dev->dev, "Davicom DM%04lx at pci%s, %pM, irq %d\n", 500 dev_info(&dev->dev, "Davicom DM%04lx at pci%s, %pM, irq %d\n",
500 ent->driver_data >> 16, 501 ent->driver_data >> 16,
501 pci_name(pdev), dev->dev_addr, dev->irq); 502 pci_name(pdev), dev->dev_addr, pdev->irq);
502 503
503 pci_set_master(pdev); 504 pci_set_master(pdev);
504 505
505 return 0; 506 return 0;
506 507
508err_out_unmap:
509 pci_iounmap(pdev, db->ioaddr);
507err_out_free_buf: 510err_out_free_buf:
508 pci_free_consistent(pdev, TX_BUF_ALLOC * TX_DESC_CNT + 4, 511 pci_free_consistent(pdev, TX_BUF_ALLOC * TX_DESC_CNT + 4,
509 db->buf_pool_ptr, db->buf_pool_dma_ptr); 512 db->buf_pool_ptr, db->buf_pool_dma_ptr);
@@ -532,7 +535,7 @@ static void __devexit dmfe_remove_one (struct pci_dev *pdev)
532 if (dev) { 535 if (dev) {
533 536
534 unregister_netdev(dev); 537 unregister_netdev(dev);
535 538 pci_iounmap(db->pdev, db->ioaddr);
536 pci_free_consistent(db->pdev, sizeof(struct tx_desc) * 539 pci_free_consistent(db->pdev, sizeof(struct tx_desc) *
537 DESC_ALL_CNT + 0x20, db->desc_pool_ptr, 540 DESC_ALL_CNT + 0x20, db->desc_pool_ptr,
538 db->desc_pool_dma_ptr); 541 db->desc_pool_dma_ptr);
@@ -555,13 +558,13 @@ static void __devexit dmfe_remove_one (struct pci_dev *pdev)
555 558
556static int dmfe_open(struct DEVICE *dev) 559static int dmfe_open(struct DEVICE *dev)
557{ 560{
558 int ret;
559 struct dmfe_board_info *db = netdev_priv(dev); 561 struct dmfe_board_info *db = netdev_priv(dev);
562 const int irq = db->pdev->irq;
563 int ret;
560 564
561 DMFE_DBUG(0, "dmfe_open", 0); 565 DMFE_DBUG(0, "dmfe_open", 0);
562 566
563 ret = request_irq(dev->irq, dmfe_interrupt, 567 ret = request_irq(irq, dmfe_interrupt, IRQF_SHARED, dev->name, dev);
564 IRQF_SHARED, dev->name, dev);
565 if (ret) 568 if (ret)
566 return ret; 569 return ret;
567 570
@@ -615,14 +618,14 @@ static int dmfe_open(struct DEVICE *dev)
615static void dmfe_init_dm910x(struct DEVICE *dev) 618static void dmfe_init_dm910x(struct DEVICE *dev)
616{ 619{
617 struct dmfe_board_info *db = netdev_priv(dev); 620 struct dmfe_board_info *db = netdev_priv(dev);
618 unsigned long ioaddr = db->ioaddr; 621 void __iomem *ioaddr = db->ioaddr;
619 622
620 DMFE_DBUG(0, "dmfe_init_dm910x()", 0); 623 DMFE_DBUG(0, "dmfe_init_dm910x()", 0);
621 624
622 /* Reset DM910x MAC controller */ 625 /* Reset DM910x MAC controller */
623 outl(DM910X_RESET, ioaddr + DCR0); /* RESET MAC */ 626 dw32(DCR0, DM910X_RESET); /* RESET MAC */
624 udelay(100); 627 udelay(100);
625 outl(db->cr0_data, ioaddr + DCR0); 628 dw32(DCR0, db->cr0_data);
626 udelay(5); 629 udelay(5);
627 630
628 /* Phy addr : DM910(A)2/DM9132/9801, phy address = 1 */ 631 /* Phy addr : DM910(A)2/DM9132/9801, phy address = 1 */
@@ -633,12 +636,12 @@ static void dmfe_init_dm910x(struct DEVICE *dev)
633 db->media_mode = dmfe_media_mode; 636 db->media_mode = dmfe_media_mode;
634 637
635 /* RESET Phyxcer Chip by GPR port bit 7 */ 638 /* RESET Phyxcer Chip by GPR port bit 7 */
636 outl(0x180, ioaddr + DCR12); /* Let bit 7 output port */ 639 dw32(DCR12, 0x180); /* Let bit 7 output port */
637 if (db->chip_id == PCI_DM9009_ID) { 640 if (db->chip_id == PCI_DM9009_ID) {
638 outl(0x80, ioaddr + DCR12); /* Issue RESET signal */ 641 dw32(DCR12, 0x80); /* Issue RESET signal */
639 mdelay(300); /* Delay 300 ms */ 642 mdelay(300); /* Delay 300 ms */
640 } 643 }
641 outl(0x0, ioaddr + DCR12); /* Clear RESET signal */ 644 dw32(DCR12, 0x0); /* Clear RESET signal */
642 645
643 /* Process Phyxcer Media Mode */ 646 /* Process Phyxcer Media Mode */
644 if ( !(db->media_mode & 0x10) ) /* Force 1M mode */ 647 if ( !(db->media_mode & 0x10) ) /* Force 1M mode */
@@ -649,7 +652,7 @@ static void dmfe_init_dm910x(struct DEVICE *dev)
649 db->op_mode = db->media_mode; /* Force Mode */ 652 db->op_mode = db->media_mode; /* Force Mode */
650 653
651 /* Initialize Transmit/Receive decriptor and CR3/4 */ 654 /* Initialize Transmit/Receive decriptor and CR3/4 */
652 dmfe_descriptor_init(dev, ioaddr); 655 dmfe_descriptor_init(dev);
653 656
654 /* Init CR6 to program DM910x operation */ 657 /* Init CR6 to program DM910x operation */
655 update_cr6(db->cr6_data, ioaddr); 658 update_cr6(db->cr6_data, ioaddr);
@@ -662,10 +665,10 @@ static void dmfe_init_dm910x(struct DEVICE *dev)
662 665
663 /* Init CR7, interrupt active bit */ 666 /* Init CR7, interrupt active bit */
664 db->cr7_data = CR7_DEFAULT; 667 db->cr7_data = CR7_DEFAULT;
665 outl(db->cr7_data, ioaddr + DCR7); 668 dw32(DCR7, db->cr7_data);
666 669
667 /* Init CR15, Tx jabber and Rx watchdog timer */ 670 /* Init CR15, Tx jabber and Rx watchdog timer */
668 outl(db->cr15_data, ioaddr + DCR15); 671 dw32(DCR15, db->cr15_data);
669 672
670 /* Enable DM910X Tx/Rx function */ 673 /* Enable DM910X Tx/Rx function */
671 db->cr6_data |= CR6_RXSC | CR6_TXSC | 0x40000; 674 db->cr6_data |= CR6_RXSC | CR6_TXSC | 0x40000;
@@ -682,6 +685,7 @@ static netdev_tx_t dmfe_start_xmit(struct sk_buff *skb,
682 struct DEVICE *dev) 685 struct DEVICE *dev)
683{ 686{
684 struct dmfe_board_info *db = netdev_priv(dev); 687 struct dmfe_board_info *db = netdev_priv(dev);
688 void __iomem *ioaddr = db->ioaddr;
685 struct tx_desc *txptr; 689 struct tx_desc *txptr;
686 unsigned long flags; 690 unsigned long flags;
687 691
@@ -707,7 +711,7 @@ static netdev_tx_t dmfe_start_xmit(struct sk_buff *skb,
707 } 711 }
708 712
709 /* Disable NIC interrupt */ 713 /* Disable NIC interrupt */
710 outl(0, dev->base_addr + DCR7); 714 dw32(DCR7, 0);
711 715
712 /* transmit this packet */ 716 /* transmit this packet */
713 txptr = db->tx_insert_ptr; 717 txptr = db->tx_insert_ptr;
@@ -721,11 +725,11 @@ static netdev_tx_t dmfe_start_xmit(struct sk_buff *skb,
721 if ( (!db->tx_queue_cnt) && (db->tx_packet_cnt < TX_MAX_SEND_CNT) ) { 725 if ( (!db->tx_queue_cnt) && (db->tx_packet_cnt < TX_MAX_SEND_CNT) ) {
722 txptr->tdes0 = cpu_to_le32(0x80000000); /* Set owner bit */ 726 txptr->tdes0 = cpu_to_le32(0x80000000); /* Set owner bit */
723 db->tx_packet_cnt++; /* Ready to send */ 727 db->tx_packet_cnt++; /* Ready to send */
724 outl(0x1, dev->base_addr + DCR1); /* Issue Tx polling */ 728 dw32(DCR1, 0x1); /* Issue Tx polling */
725 dev->trans_start = jiffies; /* saved time stamp */ 729 dev->trans_start = jiffies; /* saved time stamp */
726 } else { 730 } else {
727 db->tx_queue_cnt++; /* queue TX packet */ 731 db->tx_queue_cnt++; /* queue TX packet */
728 outl(0x1, dev->base_addr + DCR1); /* Issue Tx polling */ 732 dw32(DCR1, 0x1); /* Issue Tx polling */
729 } 733 }
730 734
731 /* Tx resource check */ 735 /* Tx resource check */
@@ -734,7 +738,7 @@ static netdev_tx_t dmfe_start_xmit(struct sk_buff *skb,
734 738
735 /* Restore CR7 to enable interrupt */ 739 /* Restore CR7 to enable interrupt */
736 spin_unlock_irqrestore(&db->lock, flags); 740 spin_unlock_irqrestore(&db->lock, flags);
737 outl(db->cr7_data, dev->base_addr + DCR7); 741 dw32(DCR7, db->cr7_data);
738 742
739 /* free this SKB */ 743 /* free this SKB */
740 dev_kfree_skb(skb); 744 dev_kfree_skb(skb);
@@ -751,7 +755,7 @@ static netdev_tx_t dmfe_start_xmit(struct sk_buff *skb,
751static int dmfe_stop(struct DEVICE *dev) 755static int dmfe_stop(struct DEVICE *dev)
752{ 756{
753 struct dmfe_board_info *db = netdev_priv(dev); 757 struct dmfe_board_info *db = netdev_priv(dev);
754 unsigned long ioaddr = dev->base_addr; 758 void __iomem *ioaddr = db->ioaddr;
755 759
756 DMFE_DBUG(0, "dmfe_stop", 0); 760 DMFE_DBUG(0, "dmfe_stop", 0);
757 761
@@ -762,12 +766,12 @@ static int dmfe_stop(struct DEVICE *dev)
762 del_timer_sync(&db->timer); 766 del_timer_sync(&db->timer);
763 767
764 /* Reset & stop DM910X board */ 768 /* Reset & stop DM910X board */
765 outl(DM910X_RESET, ioaddr + DCR0); 769 dw32(DCR0, DM910X_RESET);
766 udelay(5); 770 udelay(5);
767 phy_write(db->ioaddr, db->phy_addr, 0, 0x8000, db->chip_id); 771 phy_write(ioaddr, db->phy_addr, 0, 0x8000, db->chip_id);
768 772
769 /* free interrupt */ 773 /* free interrupt */
770 free_irq(dev->irq, dev); 774 free_irq(db->pdev->irq, dev);
771 775
772 /* free allocated rx buffer */ 776 /* free allocated rx buffer */
773 dmfe_free_rxbuffer(db); 777 dmfe_free_rxbuffer(db);
@@ -794,7 +798,7 @@ static irqreturn_t dmfe_interrupt(int irq, void *dev_id)
794{ 798{
795 struct DEVICE *dev = dev_id; 799 struct DEVICE *dev = dev_id;
796 struct dmfe_board_info *db = netdev_priv(dev); 800 struct dmfe_board_info *db = netdev_priv(dev);
797 unsigned long ioaddr = dev->base_addr; 801 void __iomem *ioaddr = db->ioaddr;
798 unsigned long flags; 802 unsigned long flags;
799 803
800 DMFE_DBUG(0, "dmfe_interrupt()", 0); 804 DMFE_DBUG(0, "dmfe_interrupt()", 0);
@@ -802,15 +806,15 @@ static irqreturn_t dmfe_interrupt(int irq, void *dev_id)
802 spin_lock_irqsave(&db->lock, flags); 806 spin_lock_irqsave(&db->lock, flags);
803 807
804 /* Got DM910X status */ 808 /* Got DM910X status */
805 db->cr5_data = inl(ioaddr + DCR5); 809 db->cr5_data = dr32(DCR5);
806 outl(db->cr5_data, ioaddr + DCR5); 810 dw32(DCR5, db->cr5_data);
807 if ( !(db->cr5_data & 0xc1) ) { 811 if ( !(db->cr5_data & 0xc1) ) {
808 spin_unlock_irqrestore(&db->lock, flags); 812 spin_unlock_irqrestore(&db->lock, flags);
809 return IRQ_HANDLED; 813 return IRQ_HANDLED;
810 } 814 }
811 815
812 /* Disable all interrupt in CR7 to solve the interrupt edge problem */ 816 /* Disable all interrupt in CR7 to solve the interrupt edge problem */
813 outl(0, ioaddr + DCR7); 817 dw32(DCR7, 0);
814 818
815 /* Check system status */ 819 /* Check system status */
816 if (db->cr5_data & 0x2000) { 820 if (db->cr5_data & 0x2000) {
@@ -838,11 +842,11 @@ static irqreturn_t dmfe_interrupt(int irq, void *dev_id)
838 if (db->dm910x_chk_mode & 0x2) { 842 if (db->dm910x_chk_mode & 0x2) {
839 db->dm910x_chk_mode = 0x4; 843 db->dm910x_chk_mode = 0x4;
840 db->cr6_data |= 0x100; 844 db->cr6_data |= 0x100;
841 update_cr6(db->cr6_data, db->ioaddr); 845 update_cr6(db->cr6_data, ioaddr);
842 } 846 }
843 847
844 /* Restore CR7 to enable interrupt mask */ 848 /* Restore CR7 to enable interrupt mask */
845 outl(db->cr7_data, ioaddr + DCR7); 849 dw32(DCR7, db->cr7_data);
846 850
847 spin_unlock_irqrestore(&db->lock, flags); 851 spin_unlock_irqrestore(&db->lock, flags);
848 return IRQ_HANDLED; 852 return IRQ_HANDLED;
@@ -858,11 +862,14 @@ static irqreturn_t dmfe_interrupt(int irq, void *dev_id)
858 862
859static void poll_dmfe (struct net_device *dev) 863static void poll_dmfe (struct net_device *dev)
860{ 864{
865 struct dmfe_board_info *db = netdev_priv(dev);
866 const int irq = db->pdev->irq;
867
861 /* disable_irq here is not very nice, but with the lockless 868 /* disable_irq here is not very nice, but with the lockless
862 interrupt handler we have no other choice. */ 869 interrupt handler we have no other choice. */
863 disable_irq(dev->irq); 870 disable_irq(irq);
864 dmfe_interrupt (dev->irq, dev); 871 dmfe_interrupt (irq, dev);
865 enable_irq(dev->irq); 872 enable_irq(irq);
866} 873}
867#endif 874#endif
868 875
@@ -873,7 +880,7 @@ static void poll_dmfe (struct net_device *dev)
873static void dmfe_free_tx_pkt(struct DEVICE *dev, struct dmfe_board_info * db) 880static void dmfe_free_tx_pkt(struct DEVICE *dev, struct dmfe_board_info * db)
874{ 881{
875 struct tx_desc *txptr; 882 struct tx_desc *txptr;
876 unsigned long ioaddr = dev->base_addr; 883 void __iomem *ioaddr = db->ioaddr;
877 u32 tdes0; 884 u32 tdes0;
878 885
879 txptr = db->tx_remove_ptr; 886 txptr = db->tx_remove_ptr;
@@ -897,7 +904,7 @@ static void dmfe_free_tx_pkt(struct DEVICE *dev, struct dmfe_board_info * db)
897 db->tx_fifo_underrun++; 904 db->tx_fifo_underrun++;
898 if ( !(db->cr6_data & CR6_SFT) ) { 905 if ( !(db->cr6_data & CR6_SFT) ) {
899 db->cr6_data = db->cr6_data | CR6_SFT; 906 db->cr6_data = db->cr6_data | CR6_SFT;
900 update_cr6(db->cr6_data, db->ioaddr); 907 update_cr6(db->cr6_data, ioaddr);
901 } 908 }
902 } 909 }
903 if (tdes0 & 0x0100) 910 if (tdes0 & 0x0100)
@@ -924,7 +931,7 @@ static void dmfe_free_tx_pkt(struct DEVICE *dev, struct dmfe_board_info * db)
924 txptr->tdes0 = cpu_to_le32(0x80000000); /* Set owner bit */ 931 txptr->tdes0 = cpu_to_le32(0x80000000); /* Set owner bit */
925 db->tx_packet_cnt++; /* Ready to send */ 932 db->tx_packet_cnt++; /* Ready to send */
926 db->tx_queue_cnt--; 933 db->tx_queue_cnt--;
927 outl(0x1, ioaddr + DCR1); /* Issue Tx polling */ 934 dw32(DCR1, 0x1); /* Issue Tx polling */
928 dev->trans_start = jiffies; /* saved time stamp */ 935 dev->trans_start = jiffies; /* saved time stamp */
929 } 936 }
930 937
@@ -1087,12 +1094,7 @@ static void dmfe_ethtool_get_drvinfo(struct net_device *dev,
1087 1094
1088 strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); 1095 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
1089 strlcpy(info->version, DRV_VERSION, sizeof(info->version)); 1096 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
1090 if (np->pdev) 1097 strlcpy(info->bus_info, pci_name(np->pdev), sizeof(info->bus_info));
1091 strlcpy(info->bus_info, pci_name(np->pdev),
1092 sizeof(info->bus_info));
1093 else
1094 sprintf(info->bus_info, "EISA 0x%lx %d",
1095 dev->base_addr, dev->irq);
1096} 1098}
1097 1099
1098static int dmfe_ethtool_set_wol(struct net_device *dev, 1100static int dmfe_ethtool_set_wol(struct net_device *dev,
@@ -1132,10 +1134,11 @@ static const struct ethtool_ops netdev_ethtool_ops = {
1132 1134
1133static void dmfe_timer(unsigned long data) 1135static void dmfe_timer(unsigned long data)
1134{ 1136{
1137 struct net_device *dev = (struct net_device *)data;
1138 struct dmfe_board_info *db = netdev_priv(dev);
1139 void __iomem *ioaddr = db->ioaddr;
1135 u32 tmp_cr8; 1140 u32 tmp_cr8;
1136 unsigned char tmp_cr12; 1141 unsigned char tmp_cr12;
1137 struct DEVICE *dev = (struct DEVICE *) data;
1138 struct dmfe_board_info *db = netdev_priv(dev);
1139 unsigned long flags; 1142 unsigned long flags;
1140 1143
1141 int link_ok, link_ok_phy; 1144 int link_ok, link_ok_phy;
@@ -1148,11 +1151,10 @@ static void dmfe_timer(unsigned long data)
1148 db->first_in_callback = 1; 1151 db->first_in_callback = 1;
1149 if (db->chip_type && (db->chip_id==PCI_DM9102_ID)) { 1152 if (db->chip_type && (db->chip_id==PCI_DM9102_ID)) {
1150 db->cr6_data &= ~0x40000; 1153 db->cr6_data &= ~0x40000;
1151 update_cr6(db->cr6_data, db->ioaddr); 1154 update_cr6(db->cr6_data, ioaddr);
1152 phy_write(db->ioaddr, 1155 phy_write(ioaddr, db->phy_addr, 0, 0x1000, db->chip_id);
1153 db->phy_addr, 0, 0x1000, db->chip_id);
1154 db->cr6_data |= 0x40000; 1156 db->cr6_data |= 0x40000;
1155 update_cr6(db->cr6_data, db->ioaddr); 1157 update_cr6(db->cr6_data, ioaddr);
1156 db->timer.expires = DMFE_TIMER_WUT + HZ * 2; 1158 db->timer.expires = DMFE_TIMER_WUT + HZ * 2;
1157 add_timer(&db->timer); 1159 add_timer(&db->timer);
1158 spin_unlock_irqrestore(&db->lock, flags); 1160 spin_unlock_irqrestore(&db->lock, flags);
@@ -1167,7 +1169,7 @@ static void dmfe_timer(unsigned long data)
1167 db->dm910x_chk_mode = 0x4; 1169 db->dm910x_chk_mode = 0x4;
1168 1170
1169 /* Dynamic reset DM910X : system error or transmit time-out */ 1171 /* Dynamic reset DM910X : system error or transmit time-out */
1170 tmp_cr8 = inl(db->ioaddr + DCR8); 1172 tmp_cr8 = dr32(DCR8);
1171 if ( (db->interval_rx_cnt==0) && (tmp_cr8) ) { 1173 if ( (db->interval_rx_cnt==0) && (tmp_cr8) ) {
1172 db->reset_cr8++; 1174 db->reset_cr8++;
1173 db->wait_reset = 1; 1175 db->wait_reset = 1;
@@ -1177,7 +1179,7 @@ static void dmfe_timer(unsigned long data)
1177 /* TX polling kick monitor */ 1179 /* TX polling kick monitor */
1178 if ( db->tx_packet_cnt && 1180 if ( db->tx_packet_cnt &&
1179 time_after(jiffies, dev_trans_start(dev) + DMFE_TX_KICK) ) { 1181 time_after(jiffies, dev_trans_start(dev) + DMFE_TX_KICK) ) {
1180 outl(0x1, dev->base_addr + DCR1); /* Tx polling again */ 1182 dw32(DCR1, 0x1); /* Tx polling again */
1181 1183
1182 /* TX Timeout */ 1184 /* TX Timeout */
1183 if (time_after(jiffies, dev_trans_start(dev) + DMFE_TX_TIMEOUT) ) { 1185 if (time_after(jiffies, dev_trans_start(dev) + DMFE_TX_TIMEOUT) ) {
@@ -1200,9 +1202,9 @@ static void dmfe_timer(unsigned long data)
1200 1202
1201 /* Link status check, Dynamic media type change */ 1203 /* Link status check, Dynamic media type change */
1202 if (db->chip_id == PCI_DM9132_ID) 1204 if (db->chip_id == PCI_DM9132_ID)
1203 tmp_cr12 = inb(db->ioaddr + DCR9 + 3); /* DM9132 */ 1205 tmp_cr12 = dr8(DCR9 + 3); /* DM9132 */
1204 else 1206 else
1205 tmp_cr12 = inb(db->ioaddr + DCR12); /* DM9102/DM9102A */ 1207 tmp_cr12 = dr8(DCR12); /* DM9102/DM9102A */
1206 1208
1207 if ( ((db->chip_id == PCI_DM9102_ID) && 1209 if ( ((db->chip_id == PCI_DM9102_ID) &&
1208 (db->chip_revision == 0x30)) || 1210 (db->chip_revision == 0x30)) ||
@@ -1251,7 +1253,7 @@ static void dmfe_timer(unsigned long data)
1251 /* 10/100M link failed, used 1M Home-Net */ 1253 /* 10/100M link failed, used 1M Home-Net */
1252 db->cr6_data|=0x00040000; /* bit18=1, MII */ 1254 db->cr6_data|=0x00040000; /* bit18=1, MII */
1253 db->cr6_data&=~0x00000200; /* bit9=0, HD mode */ 1255 db->cr6_data&=~0x00000200; /* bit9=0, HD mode */
1254 update_cr6(db->cr6_data, db->ioaddr); 1256 update_cr6(db->cr6_data, ioaddr);
1255 } 1257 }
1256 } else if (!netif_carrier_ok(dev)) { 1258 } else if (!netif_carrier_ok(dev)) {
1257 1259
@@ -1288,17 +1290,18 @@ static void dmfe_timer(unsigned long data)
1288 * Re-initialize DM910X board 1290 * Re-initialize DM910X board
1289 */ 1291 */
1290 1292
1291static void dmfe_dynamic_reset(struct DEVICE *dev) 1293static void dmfe_dynamic_reset(struct net_device *dev)
1292{ 1294{
1293 struct dmfe_board_info *db = netdev_priv(dev); 1295 struct dmfe_board_info *db = netdev_priv(dev);
1296 void __iomem *ioaddr = db->ioaddr;
1294 1297
1295 DMFE_DBUG(0, "dmfe_dynamic_reset()", 0); 1298 DMFE_DBUG(0, "dmfe_dynamic_reset()", 0);
1296 1299
1297 /* Sopt MAC controller */ 1300 /* Sopt MAC controller */
1298 db->cr6_data &= ~(CR6_RXSC | CR6_TXSC); /* Disable Tx/Rx */ 1301 db->cr6_data &= ~(CR6_RXSC | CR6_TXSC); /* Disable Tx/Rx */
1299 update_cr6(db->cr6_data, dev->base_addr); 1302 update_cr6(db->cr6_data, ioaddr);
1300 outl(0, dev->base_addr + DCR7); /* Disable Interrupt */ 1303 dw32(DCR7, 0); /* Disable Interrupt */
1301 outl(inl(dev->base_addr + DCR5), dev->base_addr + DCR5); 1304 dw32(DCR5, dr32(DCR5));
1302 1305
1303 /* Disable upper layer interface */ 1306 /* Disable upper layer interface */
1304 netif_stop_queue(dev); 1307 netif_stop_queue(dev);
@@ -1364,9 +1367,10 @@ static void dmfe_reuse_skb(struct dmfe_board_info *db, struct sk_buff * skb)
1364 * Using Chain structure, and allocate Tx/Rx buffer 1367 * Using Chain structure, and allocate Tx/Rx buffer
1365 */ 1368 */
1366 1369
1367static void dmfe_descriptor_init(struct net_device *dev, unsigned long ioaddr) 1370static void dmfe_descriptor_init(struct net_device *dev)
1368{ 1371{
1369 struct dmfe_board_info *db = netdev_priv(dev); 1372 struct dmfe_board_info *db = netdev_priv(dev);
1373 void __iomem *ioaddr = db->ioaddr;
1370 struct tx_desc *tmp_tx; 1374 struct tx_desc *tmp_tx;
1371 struct rx_desc *tmp_rx; 1375 struct rx_desc *tmp_rx;
1372 unsigned char *tmp_buf; 1376 unsigned char *tmp_buf;
@@ -1379,7 +1383,7 @@ static void dmfe_descriptor_init(struct net_device *dev, unsigned long ioaddr)
1379 /* tx descriptor start pointer */ 1383 /* tx descriptor start pointer */
1380 db->tx_insert_ptr = db->first_tx_desc; 1384 db->tx_insert_ptr = db->first_tx_desc;
1381 db->tx_remove_ptr = db->first_tx_desc; 1385 db->tx_remove_ptr = db->first_tx_desc;
1382 outl(db->first_tx_desc_dma, ioaddr + DCR4); /* TX DESC address */ 1386 dw32(DCR4, db->first_tx_desc_dma); /* TX DESC address */
1383 1387
1384 /* rx descriptor start pointer */ 1388 /* rx descriptor start pointer */
1385 db->first_rx_desc = (void *)db->first_tx_desc + 1389 db->first_rx_desc = (void *)db->first_tx_desc +
@@ -1389,7 +1393,7 @@ static void dmfe_descriptor_init(struct net_device *dev, unsigned long ioaddr)
1389 sizeof(struct tx_desc) * TX_DESC_CNT; 1393 sizeof(struct tx_desc) * TX_DESC_CNT;
1390 db->rx_insert_ptr = db->first_rx_desc; 1394 db->rx_insert_ptr = db->first_rx_desc;
1391 db->rx_ready_ptr = db->first_rx_desc; 1395 db->rx_ready_ptr = db->first_rx_desc;
1392 outl(db->first_rx_desc_dma, ioaddr + DCR3); /* RX DESC address */ 1396 dw32(DCR3, db->first_rx_desc_dma); /* RX DESC address */
1393 1397
1394 /* Init Transmit chain */ 1398 /* Init Transmit chain */
1395 tmp_buf = db->buf_pool_start; 1399 tmp_buf = db->buf_pool_start;
@@ -1431,14 +1435,14 @@ static void dmfe_descriptor_init(struct net_device *dev, unsigned long ioaddr)
1431 * Firstly stop DM910X , then written value and start 1435 * Firstly stop DM910X , then written value and start
1432 */ 1436 */
1433 1437
1434static void update_cr6(u32 cr6_data, unsigned long ioaddr) 1438static void update_cr6(u32 cr6_data, void __iomem *ioaddr)
1435{ 1439{
1436 u32 cr6_tmp; 1440 u32 cr6_tmp;
1437 1441
1438 cr6_tmp = cr6_data & ~0x2002; /* stop Tx/Rx */ 1442 cr6_tmp = cr6_data & ~0x2002; /* stop Tx/Rx */
1439 outl(cr6_tmp, ioaddr + DCR6); 1443 dw32(DCR6, cr6_tmp);
1440 udelay(5); 1444 udelay(5);
1441 outl(cr6_data, ioaddr + DCR6); 1445 dw32(DCR6, cr6_data);
1442 udelay(5); 1446 udelay(5);
1443} 1447}
1444 1448
@@ -1448,24 +1452,19 @@ static void update_cr6(u32 cr6_data, unsigned long ioaddr)
1448 * This setup frame initialize DM910X address filter mode 1452 * This setup frame initialize DM910X address filter mode
1449*/ 1453*/
1450 1454
1451static void dm9132_id_table(struct DEVICE *dev) 1455static void dm9132_id_table(struct net_device *dev)
1452{ 1456{
1457 struct dmfe_board_info *db = netdev_priv(dev);
1458 void __iomem *ioaddr = db->ioaddr + 0xc0;
1459 u16 *addrptr = (u16 *)dev->dev_addr;
1453 struct netdev_hw_addr *ha; 1460 struct netdev_hw_addr *ha;
1454 u16 * addrptr;
1455 unsigned long ioaddr = dev->base_addr+0xc0; /* ID Table */
1456 u32 hash_val;
1457 u16 i, hash_table[4]; 1461 u16 i, hash_table[4];
1458 1462
1459 DMFE_DBUG(0, "dm9132_id_table()", 0);
1460
1461 /* Node address */ 1463 /* Node address */
1462 addrptr = (u16 *) dev->dev_addr; 1464 for (i = 0; i < 3; i++) {
1463 outw(addrptr[0], ioaddr); 1465 dw16(0, addrptr[i]);
1464 ioaddr += 4; 1466 ioaddr += 4;
1465 outw(addrptr[1], ioaddr); 1467 }
1466 ioaddr += 4;
1467 outw(addrptr[2], ioaddr);
1468 ioaddr += 4;
1469 1468
1470 /* Clear Hash Table */ 1469 /* Clear Hash Table */
1471 memset(hash_table, 0, sizeof(hash_table)); 1470 memset(hash_table, 0, sizeof(hash_table));
@@ -1475,13 +1474,14 @@ static void dm9132_id_table(struct DEVICE *dev)
1475 1474
1476 /* the multicast address in Hash Table : 64 bits */ 1475 /* the multicast address in Hash Table : 64 bits */
1477 netdev_for_each_mc_addr(ha, dev) { 1476 netdev_for_each_mc_addr(ha, dev) {
1478 hash_val = cal_CRC((char *) ha->addr, 6, 0) & 0x3f; 1477 u32 hash_val = cal_CRC((char *)ha->addr, 6, 0) & 0x3f;
1478
1479 hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16); 1479 hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
1480 } 1480 }
1481 1481
1482 /* Write the hash table to MAC MD table */ 1482 /* Write the hash table to MAC MD table */
1483 for (i = 0; i < 4; i++, ioaddr += 4) 1483 for (i = 0; i < 4; i++, ioaddr += 4)
1484 outw(hash_table[i], ioaddr); 1484 dw16(0, hash_table[i]);
1485} 1485}
1486 1486
1487 1487
@@ -1490,7 +1490,7 @@ static void dm9132_id_table(struct DEVICE *dev)
1490 * This setup frame initialize DM910X address filter mode 1490 * This setup frame initialize DM910X address filter mode
1491 */ 1491 */
1492 1492
1493static void send_filter_frame(struct DEVICE *dev) 1493static void send_filter_frame(struct net_device *dev)
1494{ 1494{
1495 struct dmfe_board_info *db = netdev_priv(dev); 1495 struct dmfe_board_info *db = netdev_priv(dev);
1496 struct netdev_hw_addr *ha; 1496 struct netdev_hw_addr *ha;
@@ -1535,12 +1535,14 @@ static void send_filter_frame(struct DEVICE *dev)
1535 1535
1536 /* Resource Check and Send the setup packet */ 1536 /* Resource Check and Send the setup packet */
1537 if (!db->tx_packet_cnt) { 1537 if (!db->tx_packet_cnt) {
1538 void __iomem *ioaddr = db->ioaddr;
1539
1538 /* Resource Empty */ 1540 /* Resource Empty */
1539 db->tx_packet_cnt++; 1541 db->tx_packet_cnt++;
1540 txptr->tdes0 = cpu_to_le32(0x80000000); 1542 txptr->tdes0 = cpu_to_le32(0x80000000);
1541 update_cr6(db->cr6_data | 0x2000, dev->base_addr); 1543 update_cr6(db->cr6_data | 0x2000, ioaddr);
1542 outl(0x1, dev->base_addr + DCR1); /* Issue Tx polling */ 1544 dw32(DCR1, 0x1); /* Issue Tx polling */
1543 update_cr6(db->cr6_data, dev->base_addr); 1545 update_cr6(db->cr6_data, ioaddr);
1544 dev->trans_start = jiffies; 1546 dev->trans_start = jiffies;
1545 } else 1547 } else
1546 db->tx_queue_cnt++; /* Put in TX queue */ 1548 db->tx_queue_cnt++; /* Put in TX queue */
@@ -1575,43 +1577,55 @@ static void allocate_rx_buffer(struct net_device *dev)
1575 db->rx_insert_ptr = rxptr; 1577 db->rx_insert_ptr = rxptr;
1576} 1578}
1577 1579
1580static void srom_clk_write(void __iomem *ioaddr, u32 data)
1581{
1582 static const u32 cmd[] = {
1583 CR9_SROM_READ | CR9_SRCS,
1584 CR9_SROM_READ | CR9_SRCS | CR9_SRCLK,
1585 CR9_SROM_READ | CR9_SRCS
1586 };
1587 int i;
1588
1589 for (i = 0; i < ARRAY_SIZE(cmd); i++) {
1590 dw32(DCR9, data | cmd[i]);
1591 udelay(5);
1592 }
1593}
1578 1594
1579/* 1595/*
1580 * Read one word data from the serial ROM 1596 * Read one word data from the serial ROM
1581 */ 1597 */
1582 1598static u16 read_srom_word(void __iomem *ioaddr, int offset)
1583static u16 read_srom_word(long ioaddr, int offset)
1584{ 1599{
1600 u16 srom_data;
1585 int i; 1601 int i;
1586 u16 srom_data = 0;
1587 long cr9_ioaddr = ioaddr + DCR9;
1588 1602
1589 outl(CR9_SROM_READ, cr9_ioaddr); 1603 dw32(DCR9, CR9_SROM_READ);
1590 outl(CR9_SROM_READ | CR9_SRCS, cr9_ioaddr); 1604 dw32(DCR9, CR9_SROM_READ | CR9_SRCS);
1591 1605
1592 /* Send the Read Command 110b */ 1606 /* Send the Read Command 110b */
1593 SROM_CLK_WRITE(SROM_DATA_1, cr9_ioaddr); 1607 srom_clk_write(ioaddr, SROM_DATA_1);
1594 SROM_CLK_WRITE(SROM_DATA_1, cr9_ioaddr); 1608 srom_clk_write(ioaddr, SROM_DATA_1);
1595 SROM_CLK_WRITE(SROM_DATA_0, cr9_ioaddr); 1609 srom_clk_write(ioaddr, SROM_DATA_0);
1596 1610
1597 /* Send the offset */ 1611 /* Send the offset */
1598 for (i = 5; i >= 0; i--) { 1612 for (i = 5; i >= 0; i--) {
1599 srom_data = (offset & (1 << i)) ? SROM_DATA_1 : SROM_DATA_0; 1613 srom_data = (offset & (1 << i)) ? SROM_DATA_1 : SROM_DATA_0;
1600 SROM_CLK_WRITE(srom_data, cr9_ioaddr); 1614 srom_clk_write(ioaddr, srom_data);
1601 } 1615 }
1602 1616
1603 outl(CR9_SROM_READ | CR9_SRCS, cr9_ioaddr); 1617 dw32(DCR9, CR9_SROM_READ | CR9_SRCS);
1604 1618
1605 for (i = 16; i > 0; i--) { 1619 for (i = 16; i > 0; i--) {
1606 outl(CR9_SROM_READ | CR9_SRCS | CR9_SRCLK, cr9_ioaddr); 1620 dw32(DCR9, CR9_SROM_READ | CR9_SRCS | CR9_SRCLK);
1607 udelay(5); 1621 udelay(5);
1608 srom_data = (srom_data << 1) | 1622 srom_data = (srom_data << 1) |
1609 ((inl(cr9_ioaddr) & CR9_CRDOUT) ? 1 : 0); 1623 ((dr32(DCR9) & CR9_CRDOUT) ? 1 : 0);
1610 outl(CR9_SROM_READ | CR9_SRCS, cr9_ioaddr); 1624 dw32(DCR9, CR9_SROM_READ | CR9_SRCS);
1611 udelay(5); 1625 udelay(5);
1612 } 1626 }
1613 1627
1614 outl(CR9_SROM_READ, cr9_ioaddr); 1628 dw32(DCR9, CR9_SROM_READ);
1615 return srom_data; 1629 return srom_data;
1616} 1630}
1617 1631
@@ -1620,13 +1634,14 @@ static u16 read_srom_word(long ioaddr, int offset)
1620 * Auto sense the media mode 1634 * Auto sense the media mode
1621 */ 1635 */
1622 1636
1623static u8 dmfe_sense_speed(struct dmfe_board_info * db) 1637static u8 dmfe_sense_speed(struct dmfe_board_info *db)
1624{ 1638{
1639 void __iomem *ioaddr = db->ioaddr;
1625 u8 ErrFlag = 0; 1640 u8 ErrFlag = 0;
1626 u16 phy_mode; 1641 u16 phy_mode;
1627 1642
1628 /* CR6 bit18=0, select 10/100M */ 1643 /* CR6 bit18=0, select 10/100M */
1629 update_cr6( (db->cr6_data & ~0x40000), db->ioaddr); 1644 update_cr6(db->cr6_data & ~0x40000, ioaddr);
1630 1645
1631 phy_mode = phy_read(db->ioaddr, db->phy_addr, 1, db->chip_id); 1646 phy_mode = phy_read(db->ioaddr, db->phy_addr, 1, db->chip_id);
1632 phy_mode = phy_read(db->ioaddr, db->phy_addr, 1, db->chip_id); 1647 phy_mode = phy_read(db->ioaddr, db->phy_addr, 1, db->chip_id);
@@ -1665,11 +1680,12 @@ static u8 dmfe_sense_speed(struct dmfe_board_info * db)
1665 1680
1666static void dmfe_set_phyxcer(struct dmfe_board_info *db) 1681static void dmfe_set_phyxcer(struct dmfe_board_info *db)
1667{ 1682{
1683 void __iomem *ioaddr = db->ioaddr;
1668 u16 phy_reg; 1684 u16 phy_reg;
1669 1685
1670 /* Select 10/100M phyxcer */ 1686 /* Select 10/100M phyxcer */
1671 db->cr6_data &= ~0x40000; 1687 db->cr6_data &= ~0x40000;
1672 update_cr6(db->cr6_data, db->ioaddr); 1688 update_cr6(db->cr6_data, ioaddr);
1673 1689
1674 /* DM9009 Chip: Phyxcer reg18 bit12=0 */ 1690 /* DM9009 Chip: Phyxcer reg18 bit12=0 */
1675 if (db->chip_id == PCI_DM9009_ID) { 1691 if (db->chip_id == PCI_DM9009_ID) {
@@ -1765,18 +1781,15 @@ static void dmfe_process_mode(struct dmfe_board_info *db)
1765 * Write a word to Phy register 1781 * Write a word to Phy register
1766 */ 1782 */
1767 1783
1768static void phy_write(unsigned long iobase, u8 phy_addr, u8 offset, 1784static void phy_write(void __iomem *ioaddr, u8 phy_addr, u8 offset,
1769 u16 phy_data, u32 chip_id) 1785 u16 phy_data, u32 chip_id)
1770{ 1786{
1771 u16 i; 1787 u16 i;
1772 unsigned long ioaddr;
1773 1788
1774 if (chip_id == PCI_DM9132_ID) { 1789 if (chip_id == PCI_DM9132_ID) {
1775 ioaddr = iobase + 0x80 + offset * 4; 1790 dw16(0x80 + offset * 4, phy_data);
1776 outw(phy_data, ioaddr);
1777 } else { 1791 } else {
1778 /* DM9102/DM9102A Chip */ 1792 /* DM9102/DM9102A Chip */
1779 ioaddr = iobase + DCR9;
1780 1793
1781 /* Send 33 synchronization clock to Phy controller */ 1794 /* Send 33 synchronization clock to Phy controller */
1782 for (i = 0; i < 35; i++) 1795 for (i = 0; i < 35; i++)
@@ -1816,19 +1829,16 @@ static void phy_write(unsigned long iobase, u8 phy_addr, u8 offset,
1816 * Read a word data from phy register 1829 * Read a word data from phy register
1817 */ 1830 */
1818 1831
1819static u16 phy_read(unsigned long iobase, u8 phy_addr, u8 offset, u32 chip_id) 1832static u16 phy_read(void __iomem *ioaddr, u8 phy_addr, u8 offset, u32 chip_id)
1820{ 1833{
1821 int i; 1834 int i;
1822 u16 phy_data; 1835 u16 phy_data;
1823 unsigned long ioaddr;
1824 1836
1825 if (chip_id == PCI_DM9132_ID) { 1837 if (chip_id == PCI_DM9132_ID) {
1826 /* DM9132 Chip */ 1838 /* DM9132 Chip */
1827 ioaddr = iobase + 0x80 + offset * 4; 1839 phy_data = dr16(0x80 + offset * 4);
1828 phy_data = inw(ioaddr);
1829 } else { 1840 } else {
1830 /* DM9102/DM9102A Chip */ 1841 /* DM9102/DM9102A Chip */
1831 ioaddr = iobase + DCR9;
1832 1842
1833 /* Send 33 synchronization clock to Phy controller */ 1843 /* Send 33 synchronization clock to Phy controller */
1834 for (i = 0; i < 35; i++) 1844 for (i = 0; i < 35; i++)
@@ -1870,13 +1880,13 @@ static u16 phy_read(unsigned long iobase, u8 phy_addr, u8 offset, u32 chip_id)
1870 * Write one bit data to Phy Controller 1880 * Write one bit data to Phy Controller
1871 */ 1881 */
1872 1882
1873static void phy_write_1bit(unsigned long ioaddr, u32 phy_data) 1883static void phy_write_1bit(void __iomem *ioaddr, u32 phy_data)
1874{ 1884{
1875 outl(phy_data, ioaddr); /* MII Clock Low */ 1885 dw32(DCR9, phy_data); /* MII Clock Low */
1876 udelay(1); 1886 udelay(1);
1877 outl(phy_data | MDCLKH, ioaddr); /* MII Clock High */ 1887 dw32(DCR9, phy_data | MDCLKH); /* MII Clock High */
1878 udelay(1); 1888 udelay(1);
1879 outl(phy_data, ioaddr); /* MII Clock Low */ 1889 dw32(DCR9, phy_data); /* MII Clock Low */
1880 udelay(1); 1890 udelay(1);
1881} 1891}
1882 1892
@@ -1885,14 +1895,14 @@ static void phy_write_1bit(unsigned long ioaddr, u32 phy_data)
1885 * Read one bit phy data from PHY controller 1895 * Read one bit phy data from PHY controller
1886 */ 1896 */
1887 1897
1888static u16 phy_read_1bit(unsigned long ioaddr) 1898static u16 phy_read_1bit(void __iomem *ioaddr)
1889{ 1899{
1890 u16 phy_data; 1900 u16 phy_data;
1891 1901
1892 outl(0x50000, ioaddr); 1902 dw32(DCR9, 0x50000);
1893 udelay(1); 1903 udelay(1);
1894 phy_data = ( inl(ioaddr) >> 19 ) & 0x1; 1904 phy_data = (dr32(DCR9) >> 19) & 0x1;
1895 outl(0x40000, ioaddr); 1905 dw32(DCR9, 0x40000);
1896 udelay(1); 1906 udelay(1);
1897 1907
1898 return phy_data; 1908 return phy_data;
@@ -1978,7 +1988,7 @@ static void dmfe_parse_srom(struct dmfe_board_info * db)
1978 1988
1979 /* Check DM9801 or DM9802 present or not */ 1989 /* Check DM9801 or DM9802 present or not */
1980 db->HPNA_present = 0; 1990 db->HPNA_present = 0;
1981 update_cr6(db->cr6_data|0x40000, db->ioaddr); 1991 update_cr6(db->cr6_data | 0x40000, db->ioaddr);
1982 tmp_reg = phy_read(db->ioaddr, db->phy_addr, 3, db->chip_id); 1992 tmp_reg = phy_read(db->ioaddr, db->phy_addr, 3, db->chip_id);
1983 if ( ( tmp_reg & 0xfff0 ) == 0xb900 ) { 1993 if ( ( tmp_reg & 0xfff0 ) == 0xb900 ) {
1984 /* DM9801 or DM9802 present */ 1994 /* DM9801 or DM9802 present */
@@ -2095,6 +2105,7 @@ static int dmfe_suspend(struct pci_dev *pci_dev, pm_message_t state)
2095{ 2105{
2096 struct net_device *dev = pci_get_drvdata(pci_dev); 2106 struct net_device *dev = pci_get_drvdata(pci_dev);
2097 struct dmfe_board_info *db = netdev_priv(dev); 2107 struct dmfe_board_info *db = netdev_priv(dev);
2108 void __iomem *ioaddr = db->ioaddr;
2098 u32 tmp; 2109 u32 tmp;
2099 2110
2100 /* Disable upper layer interface */ 2111 /* Disable upper layer interface */
@@ -2102,11 +2113,11 @@ static int dmfe_suspend(struct pci_dev *pci_dev, pm_message_t state)
2102 2113
2103 /* Disable Tx/Rx */ 2114 /* Disable Tx/Rx */
2104 db->cr6_data &= ~(CR6_RXSC | CR6_TXSC); 2115 db->cr6_data &= ~(CR6_RXSC | CR6_TXSC);
2105 update_cr6(db->cr6_data, dev->base_addr); 2116 update_cr6(db->cr6_data, ioaddr);
2106 2117
2107 /* Disable Interrupt */ 2118 /* Disable Interrupt */
2108 outl(0, dev->base_addr + DCR7); 2119 dw32(DCR7, 0);
2109 outl(inl (dev->base_addr + DCR5), dev->base_addr + DCR5); 2120 dw32(DCR5, dr32(DCR5));
2110 2121
2111 /* Fre RX buffers */ 2122 /* Fre RX buffers */
2112 dmfe_free_rxbuffer(db); 2123 dmfe_free_rxbuffer(db);
diff --git a/drivers/net/ethernet/dec/tulip/tulip_core.c b/drivers/net/ethernet/dec/tulip/tulip_core.c
index fea3641d9398..c4f37aca2269 100644
--- a/drivers/net/ethernet/dec/tulip/tulip_core.c
+++ b/drivers/net/ethernet/dec/tulip/tulip_core.c
@@ -328,7 +328,7 @@ static void tulip_up(struct net_device *dev)
328 udelay(100); 328 udelay(100);
329 329
330 if (tulip_debug > 1) 330 if (tulip_debug > 1)
331 netdev_dbg(dev, "tulip_up(), irq==%d\n", dev->irq); 331 netdev_dbg(dev, "tulip_up(), irq==%d\n", tp->pdev->irq);
332 332
333 iowrite32(tp->rx_ring_dma, ioaddr + CSR3); 333 iowrite32(tp->rx_ring_dma, ioaddr + CSR3);
334 iowrite32(tp->tx_ring_dma, ioaddr + CSR4); 334 iowrite32(tp->tx_ring_dma, ioaddr + CSR4);
@@ -515,11 +515,13 @@ media_picked:
515static int 515static int
516tulip_open(struct net_device *dev) 516tulip_open(struct net_device *dev)
517{ 517{
518 struct tulip_private *tp = netdev_priv(dev);
518 int retval; 519 int retval;
519 520
520 tulip_init_ring (dev); 521 tulip_init_ring (dev);
521 522
522 retval = request_irq(dev->irq, tulip_interrupt, IRQF_SHARED, dev->name, dev); 523 retval = request_irq(tp->pdev->irq, tulip_interrupt, IRQF_SHARED,
524 dev->name, dev);
523 if (retval) 525 if (retval)
524 goto free_ring; 526 goto free_ring;
525 527
@@ -841,7 +843,7 @@ static int tulip_close (struct net_device *dev)
841 netdev_dbg(dev, "Shutting down ethercard, status was %02x\n", 843 netdev_dbg(dev, "Shutting down ethercard, status was %02x\n",
842 ioread32 (ioaddr + CSR5)); 844 ioread32 (ioaddr + CSR5));
843 845
844 free_irq (dev->irq, dev); 846 free_irq (tp->pdev->irq, dev);
845 847
846 tulip_free_ring (dev); 848 tulip_free_ring (dev);
847 849
@@ -1489,8 +1491,6 @@ static int __devinit tulip_init_one (struct pci_dev *pdev,
1489 1491
1490 INIT_WORK(&tp->media_work, tulip_tbl[tp->chip_id].media_task); 1492 INIT_WORK(&tp->media_work, tulip_tbl[tp->chip_id].media_task);
1491 1493
1492 dev->base_addr = (unsigned long)ioaddr;
1493
1494#ifdef CONFIG_TULIP_MWI 1494#ifdef CONFIG_TULIP_MWI
1495 if (!force_csr0 && (tp->flags & HAS_PCI_MWI)) 1495 if (!force_csr0 && (tp->flags & HAS_PCI_MWI))
1496 tulip_mwi_config (pdev, dev); 1496 tulip_mwi_config (pdev, dev);
@@ -1650,7 +1650,6 @@ static int __devinit tulip_init_one (struct pci_dev *pdev,
1650 for (i = 0; i < 6; i++) 1650 for (i = 0; i < 6; i++)
1651 last_phys_addr[i] = dev->dev_addr[i]; 1651 last_phys_addr[i] = dev->dev_addr[i];
1652 last_irq = irq; 1652 last_irq = irq;
1653 dev->irq = irq;
1654 1653
1655 /* The lower four bits are the media type. */ 1654 /* The lower four bits are the media type. */
1656 if (board_idx >= 0 && board_idx < MAX_UNITS) { 1655 if (board_idx >= 0 && board_idx < MAX_UNITS) {
@@ -1858,7 +1857,8 @@ static int tulip_suspend (struct pci_dev *pdev, pm_message_t state)
1858 tulip_down(dev); 1857 tulip_down(dev);
1859 1858
1860 netif_device_detach(dev); 1859 netif_device_detach(dev);
1861 free_irq(dev->irq, dev); 1860 /* FIXME: it needlessly adds an error path. */
1861 free_irq(tp->pdev->irq, dev);
1862 1862
1863save_state: 1863save_state:
1864 pci_save_state(pdev); 1864 pci_save_state(pdev);
@@ -1900,7 +1900,9 @@ static int tulip_resume(struct pci_dev *pdev)
1900 return retval; 1900 return retval;
1901 } 1901 }
1902 1902
1903 if ((retval = request_irq(dev->irq, tulip_interrupt, IRQF_SHARED, dev->name, dev))) { 1903 retval = request_irq(pdev->irq, tulip_interrupt, IRQF_SHARED,
1904 dev->name, dev);
1905 if (retval) {
1904 pr_err("request_irq failed in resume\n"); 1906 pr_err("request_irq failed in resume\n");
1905 return retval; 1907 return retval;
1906 } 1908 }
@@ -1960,11 +1962,14 @@ static void __devexit tulip_remove_one (struct pci_dev *pdev)
1960 1962
1961static void poll_tulip (struct net_device *dev) 1963static void poll_tulip (struct net_device *dev)
1962{ 1964{
1965 struct tulip_private *tp = netdev_priv(dev);
1966 const int irq = tp->pdev->irq;
1967
1963 /* disable_irq here is not very nice, but with the lockless 1968 /* disable_irq here is not very nice, but with the lockless
1964 interrupt handler we have no other choice. */ 1969 interrupt handler we have no other choice. */
1965 disable_irq(dev->irq); 1970 disable_irq(irq);
1966 tulip_interrupt (dev->irq, dev); 1971 tulip_interrupt (irq, dev);
1967 enable_irq(dev->irq); 1972 enable_irq(irq);
1968} 1973}
1969#endif 1974#endif
1970 1975
diff --git a/drivers/net/ethernet/dec/tulip/uli526x.c b/drivers/net/ethernet/dec/tulip/uli526x.c
index fc4001f6a5e4..75d45f8a37dc 100644
--- a/drivers/net/ethernet/dec/tulip/uli526x.c
+++ b/drivers/net/ethernet/dec/tulip/uli526x.c
@@ -42,6 +42,8 @@
42#include <asm/dma.h> 42#include <asm/dma.h>
43#include <asm/uaccess.h> 43#include <asm/uaccess.h>
44 44
45#define uw32(reg, val) iowrite32(val, ioaddr + (reg))
46#define ur32(reg) ioread32(ioaddr + (reg))
45 47
46/* Board/System/Debug information/definition ---------------- */ 48/* Board/System/Debug information/definition ---------------- */
47#define PCI_ULI5261_ID 0x526110B9 /* ULi M5261 ID*/ 49#define PCI_ULI5261_ID 0x526110B9 /* ULi M5261 ID*/
@@ -110,14 +112,6 @@ do { \
110 112
111#define SROM_V41_CODE 0x14 113#define SROM_V41_CODE 0x14
112 114
113#define SROM_CLK_WRITE(data, ioaddr) \
114 outl(data|CR9_SROM_READ|CR9_SRCS,ioaddr); \
115 udelay(5); \
116 outl(data|CR9_SROM_READ|CR9_SRCS|CR9_SRCLK,ioaddr); \
117 udelay(5); \
118 outl(data|CR9_SROM_READ|CR9_SRCS,ioaddr); \
119 udelay(5);
120
121/* Structure/enum declaration ------------------------------- */ 115/* Structure/enum declaration ------------------------------- */
122struct tx_desc { 116struct tx_desc {
123 __le32 tdes0, tdes1, tdes2, tdes3; /* Data for the card */ 117 __le32 tdes0, tdes1, tdes2, tdes3; /* Data for the card */
@@ -132,12 +126,15 @@ struct rx_desc {
132} __attribute__(( aligned(32) )); 126} __attribute__(( aligned(32) ));
133 127
134struct uli526x_board_info { 128struct uli526x_board_info {
135 u32 chip_id; /* Chip vendor/Device ID */ 129 struct uli_phy_ops {
130 void (*write)(struct uli526x_board_info *, u8, u8, u16);
131 u16 (*read)(struct uli526x_board_info *, u8, u8);
132 } phy;
136 struct net_device *next_dev; /* next device */ 133 struct net_device *next_dev; /* next device */
137 struct pci_dev *pdev; /* PCI device */ 134 struct pci_dev *pdev; /* PCI device */
138 spinlock_t lock; 135 spinlock_t lock;
139 136
140 long ioaddr; /* I/O base address */ 137 void __iomem *ioaddr; /* I/O base address */
141 u32 cr0_data; 138 u32 cr0_data;
142 u32 cr5_data; 139 u32 cr5_data;
143 u32 cr6_data; 140 u32 cr6_data;
@@ -227,21 +224,21 @@ static netdev_tx_t uli526x_start_xmit(struct sk_buff *,
227static int uli526x_stop(struct net_device *); 224static int uli526x_stop(struct net_device *);
228static void uli526x_set_filter_mode(struct net_device *); 225static void uli526x_set_filter_mode(struct net_device *);
229static const struct ethtool_ops netdev_ethtool_ops; 226static const struct ethtool_ops netdev_ethtool_ops;
230static u16 read_srom_word(long, int); 227static u16 read_srom_word(struct uli526x_board_info *, int);
231static irqreturn_t uli526x_interrupt(int, void *); 228static irqreturn_t uli526x_interrupt(int, void *);
232#ifdef CONFIG_NET_POLL_CONTROLLER 229#ifdef CONFIG_NET_POLL_CONTROLLER
233static void uli526x_poll(struct net_device *dev); 230static void uli526x_poll(struct net_device *dev);
234#endif 231#endif
235static void uli526x_descriptor_init(struct net_device *, unsigned long); 232static void uli526x_descriptor_init(struct net_device *, void __iomem *);
236static void allocate_rx_buffer(struct net_device *); 233static void allocate_rx_buffer(struct net_device *);
237static void update_cr6(u32, unsigned long); 234static void update_cr6(u32, void __iomem *);
238static void send_filter_frame(struct net_device *, int); 235static void send_filter_frame(struct net_device *, int);
239static u16 phy_read(unsigned long, u8, u8, u32); 236static u16 phy_readby_cr9(struct uli526x_board_info *, u8, u8);
240static u16 phy_readby_cr10(unsigned long, u8, u8); 237static u16 phy_readby_cr10(struct uli526x_board_info *, u8, u8);
241static void phy_write(unsigned long, u8, u8, u16, u32); 238static void phy_writeby_cr9(struct uli526x_board_info *, u8, u8, u16);
242static void phy_writeby_cr10(unsigned long, u8, u8, u16); 239static void phy_writeby_cr10(struct uli526x_board_info *, u8, u8, u16);
243static void phy_write_1bit(unsigned long, u32, u32); 240static void phy_write_1bit(struct uli526x_board_info *db, u32);
244static u16 phy_read_1bit(unsigned long, u32); 241static u16 phy_read_1bit(struct uli526x_board_info *db);
245static u8 uli526x_sense_speed(struct uli526x_board_info *); 242static u8 uli526x_sense_speed(struct uli526x_board_info *);
246static void uli526x_process_mode(struct uli526x_board_info *); 243static void uli526x_process_mode(struct uli526x_board_info *);
247static void uli526x_timer(unsigned long); 244static void uli526x_timer(unsigned long);
@@ -253,6 +250,18 @@ static void uli526x_free_rxbuffer(struct uli526x_board_info *);
253static void uli526x_init(struct net_device *); 250static void uli526x_init(struct net_device *);
254static void uli526x_set_phyxcer(struct uli526x_board_info *); 251static void uli526x_set_phyxcer(struct uli526x_board_info *);
255 252
253static void srom_clk_write(struct uli526x_board_info *db, u32 data)
254{
255 void __iomem *ioaddr = db->ioaddr;
256
257 uw32(DCR9, data | CR9_SROM_READ | CR9_SRCS);
258 udelay(5);
259 uw32(DCR9, data | CR9_SROM_READ | CR9_SRCS | CR9_SRCLK);
260 udelay(5);
261 uw32(DCR9, data | CR9_SROM_READ | CR9_SRCS);
262 udelay(5);
263}
264
256/* ULI526X network board routine ---------------------------- */ 265/* ULI526X network board routine ---------------------------- */
257 266
258static const struct net_device_ops netdev_ops = { 267static const struct net_device_ops netdev_ops = {
@@ -277,6 +286,7 @@ static int __devinit uli526x_init_one (struct pci_dev *pdev,
277{ 286{
278 struct uli526x_board_info *db; /* board information structure */ 287 struct uli526x_board_info *db; /* board information structure */
279 struct net_device *dev; 288 struct net_device *dev;
289 void __iomem *ioaddr;
280 int i, err; 290 int i, err;
281 291
282 ULI526X_DBUG(0, "uli526x_init_one()", 0); 292 ULI526X_DBUG(0, "uli526x_init_one()", 0);
@@ -313,9 +323,9 @@ static int __devinit uli526x_init_one (struct pci_dev *pdev,
313 goto err_out_disable; 323 goto err_out_disable;
314 } 324 }
315 325
316 if (pci_request_regions(pdev, DRV_NAME)) { 326 err = pci_request_regions(pdev, DRV_NAME);
327 if (err < 0) {
317 pr_err("Failed to request PCI regions\n"); 328 pr_err("Failed to request PCI regions\n");
318 err = -ENODEV;
319 goto err_out_disable; 329 goto err_out_disable;
320 } 330 }
321 331
@@ -323,32 +333,41 @@ static int __devinit uli526x_init_one (struct pci_dev *pdev,
323 db = netdev_priv(dev); 333 db = netdev_priv(dev);
324 334
325 /* Allocate Tx/Rx descriptor memory */ 335 /* Allocate Tx/Rx descriptor memory */
336 err = -ENOMEM;
337
326 db->desc_pool_ptr = pci_alloc_consistent(pdev, sizeof(struct tx_desc) * DESC_ALL_CNT + 0x20, &db->desc_pool_dma_ptr); 338 db->desc_pool_ptr = pci_alloc_consistent(pdev, sizeof(struct tx_desc) * DESC_ALL_CNT + 0x20, &db->desc_pool_dma_ptr);
327 if(db->desc_pool_ptr == NULL) 339 if (!db->desc_pool_ptr)
328 { 340 goto err_out_release;
329 err = -ENOMEM; 341
330 goto err_out_nomem;
331 }
332 db->buf_pool_ptr = pci_alloc_consistent(pdev, TX_BUF_ALLOC * TX_DESC_CNT + 4, &db->buf_pool_dma_ptr); 342 db->buf_pool_ptr = pci_alloc_consistent(pdev, TX_BUF_ALLOC * TX_DESC_CNT + 4, &db->buf_pool_dma_ptr);
333 if(db->buf_pool_ptr == NULL) 343 if (!db->buf_pool_ptr)
334 { 344 goto err_out_free_tx_desc;
335 err = -ENOMEM;
336 goto err_out_nomem;
337 }
338 345
339 db->first_tx_desc = (struct tx_desc *) db->desc_pool_ptr; 346 db->first_tx_desc = (struct tx_desc *) db->desc_pool_ptr;
340 db->first_tx_desc_dma = db->desc_pool_dma_ptr; 347 db->first_tx_desc_dma = db->desc_pool_dma_ptr;
341 db->buf_pool_start = db->buf_pool_ptr; 348 db->buf_pool_start = db->buf_pool_ptr;
342 db->buf_pool_dma_start = db->buf_pool_dma_ptr; 349 db->buf_pool_dma_start = db->buf_pool_dma_ptr;
343 350
344 db->chip_id = ent->driver_data; 351 switch (ent->driver_data) {
345 db->ioaddr = pci_resource_start(pdev, 0); 352 case PCI_ULI5263_ID:
353 db->phy.write = phy_writeby_cr10;
354 db->phy.read = phy_readby_cr10;
355 break;
356 default:
357 db->phy.write = phy_writeby_cr9;
358 db->phy.read = phy_readby_cr9;
359 break;
360 }
361
362 /* IO region. */
363 ioaddr = pci_iomap(pdev, 0, 0);
364 if (!ioaddr)
365 goto err_out_free_tx_buf;
346 366
367 db->ioaddr = ioaddr;
347 db->pdev = pdev; 368 db->pdev = pdev;
348 db->init = 1; 369 db->init = 1;
349 370
350 dev->base_addr = db->ioaddr;
351 dev->irq = pdev->irq;
352 pci_set_drvdata(pdev, dev); 371 pci_set_drvdata(pdev, dev);
353 372
354 /* Register some necessary functions */ 373 /* Register some necessary functions */
@@ -360,24 +379,24 @@ static int __devinit uli526x_init_one (struct pci_dev *pdev,
360 379
361 /* read 64 word srom data */ 380 /* read 64 word srom data */
362 for (i = 0; i < 64; i++) 381 for (i = 0; i < 64; i++)
363 ((__le16 *) db->srom)[i] = cpu_to_le16(read_srom_word(db->ioaddr, i)); 382 ((__le16 *) db->srom)[i] = cpu_to_le16(read_srom_word(db, i));
364 383
365 /* Set Node address */ 384 /* Set Node address */
366 if(((u16 *) db->srom)[0] == 0xffff || ((u16 *) db->srom)[0] == 0) /* SROM absent, so read MAC address from ID Table */ 385 if(((u16 *) db->srom)[0] == 0xffff || ((u16 *) db->srom)[0] == 0) /* SROM absent, so read MAC address from ID Table */
367 { 386 {
368 outl(0x10000, db->ioaddr + DCR0); //Diagnosis mode 387 uw32(DCR0, 0x10000); //Diagnosis mode
369 outl(0x1c0, db->ioaddr + DCR13); //Reset dianostic pointer port 388 uw32(DCR13, 0x1c0); //Reset dianostic pointer port
370 outl(0, db->ioaddr + DCR14); //Clear reset port 389 uw32(DCR14, 0); //Clear reset port
371 outl(0x10, db->ioaddr + DCR14); //Reset ID Table pointer 390 uw32(DCR14, 0x10); //Reset ID Table pointer
372 outl(0, db->ioaddr + DCR14); //Clear reset port 391 uw32(DCR14, 0); //Clear reset port
373 outl(0, db->ioaddr + DCR13); //Clear CR13 392 uw32(DCR13, 0); //Clear CR13
374 outl(0x1b0, db->ioaddr + DCR13); //Select ID Table access port 393 uw32(DCR13, 0x1b0); //Select ID Table access port
375 //Read MAC address from CR14 394 //Read MAC address from CR14
376 for (i = 0; i < 6; i++) 395 for (i = 0; i < 6; i++)
377 dev->dev_addr[i] = inl(db->ioaddr + DCR14); 396 dev->dev_addr[i] = ur32(DCR14);
378 //Read end 397 //Read end
379 outl(0, db->ioaddr + DCR13); //Clear CR13 398 uw32(DCR13, 0); //Clear CR13
380 outl(0, db->ioaddr + DCR0); //Clear CR0 399 uw32(DCR0, 0); //Clear CR0
381 udelay(10); 400 udelay(10);
382 } 401 }
383 else /*Exist SROM*/ 402 else /*Exist SROM*/
@@ -387,26 +406,26 @@ static int __devinit uli526x_init_one (struct pci_dev *pdev,
387 } 406 }
388 err = register_netdev (dev); 407 err = register_netdev (dev);
389 if (err) 408 if (err)
390 goto err_out_res; 409 goto err_out_unmap;
391 410
392 netdev_info(dev, "ULi M%04lx at pci%s, %pM, irq %d\n", 411 netdev_info(dev, "ULi M%04lx at pci%s, %pM, irq %d\n",
393 ent->driver_data >> 16, pci_name(pdev), 412 ent->driver_data >> 16, pci_name(pdev),
394 dev->dev_addr, dev->irq); 413 dev->dev_addr, pdev->irq);
395 414
396 pci_set_master(pdev); 415 pci_set_master(pdev);
397 416
398 return 0; 417 return 0;
399 418
400err_out_res: 419err_out_unmap:
420 pci_iounmap(pdev, db->ioaddr);
421err_out_free_tx_buf:
422 pci_free_consistent(pdev, TX_BUF_ALLOC * TX_DESC_CNT + 4,
423 db->buf_pool_ptr, db->buf_pool_dma_ptr);
424err_out_free_tx_desc:
425 pci_free_consistent(pdev, sizeof(struct tx_desc) * DESC_ALL_CNT + 0x20,
426 db->desc_pool_ptr, db->desc_pool_dma_ptr);
427err_out_release:
401 pci_release_regions(pdev); 428 pci_release_regions(pdev);
402err_out_nomem:
403 if(db->desc_pool_ptr)
404 pci_free_consistent(pdev, sizeof(struct tx_desc) * DESC_ALL_CNT + 0x20,
405 db->desc_pool_ptr, db->desc_pool_dma_ptr);
406
407 if(db->buf_pool_ptr != NULL)
408 pci_free_consistent(pdev, TX_BUF_ALLOC * TX_DESC_CNT + 4,
409 db->buf_pool_ptr, db->buf_pool_dma_ptr);
410err_out_disable: 429err_out_disable:
411 pci_disable_device(pdev); 430 pci_disable_device(pdev);
412err_out_free: 431err_out_free:
@@ -422,19 +441,17 @@ static void __devexit uli526x_remove_one (struct pci_dev *pdev)
422 struct net_device *dev = pci_get_drvdata(pdev); 441 struct net_device *dev = pci_get_drvdata(pdev);
423 struct uli526x_board_info *db = netdev_priv(dev); 442 struct uli526x_board_info *db = netdev_priv(dev);
424 443
425 ULI526X_DBUG(0, "uli526x_remove_one()", 0); 444 unregister_netdev(dev);
426 445 pci_iounmap(pdev, db->ioaddr);
427 pci_free_consistent(db->pdev, sizeof(struct tx_desc) * 446 pci_free_consistent(db->pdev, sizeof(struct tx_desc) *
428 DESC_ALL_CNT + 0x20, db->desc_pool_ptr, 447 DESC_ALL_CNT + 0x20, db->desc_pool_ptr,
429 db->desc_pool_dma_ptr); 448 db->desc_pool_dma_ptr);
430 pci_free_consistent(db->pdev, TX_BUF_ALLOC * TX_DESC_CNT + 4, 449 pci_free_consistent(db->pdev, TX_BUF_ALLOC * TX_DESC_CNT + 4,
431 db->buf_pool_ptr, db->buf_pool_dma_ptr); 450 db->buf_pool_ptr, db->buf_pool_dma_ptr);
432 unregister_netdev(dev);
433 pci_release_regions(pdev); 451 pci_release_regions(pdev);
434 free_netdev(dev); /* free board information */
435 pci_set_drvdata(pdev, NULL);
436 pci_disable_device(pdev); 452 pci_disable_device(pdev);
437 ULI526X_DBUG(0, "uli526x_remove_one() exit", 0); 453 pci_set_drvdata(pdev, NULL);
454 free_netdev(dev);
438} 455}
439 456
440 457
@@ -468,7 +485,8 @@ static int uli526x_open(struct net_device *dev)
468 /* Initialize ULI526X board */ 485 /* Initialize ULI526X board */
469 uli526x_init(dev); 486 uli526x_init(dev);
470 487
471 ret = request_irq(dev->irq, uli526x_interrupt, IRQF_SHARED, dev->name, dev); 488 ret = request_irq(db->pdev->irq, uli526x_interrupt, IRQF_SHARED,
489 dev->name, dev);
472 if (ret) 490 if (ret)
473 return ret; 491 return ret;
474 492
@@ -496,57 +514,57 @@ static int uli526x_open(struct net_device *dev)
496static void uli526x_init(struct net_device *dev) 514static void uli526x_init(struct net_device *dev)
497{ 515{
498 struct uli526x_board_info *db = netdev_priv(dev); 516 struct uli526x_board_info *db = netdev_priv(dev);
499 unsigned long ioaddr = db->ioaddr; 517 struct uli_phy_ops *phy = &db->phy;
518 void __iomem *ioaddr = db->ioaddr;
500 u8 phy_tmp; 519 u8 phy_tmp;
501 u8 timeout; 520 u8 timeout;
502 u16 phy_value;
503 u16 phy_reg_reset; 521 u16 phy_reg_reset;
504 522
505 523
506 ULI526X_DBUG(0, "uli526x_init()", 0); 524 ULI526X_DBUG(0, "uli526x_init()", 0);
507 525
508 /* Reset M526x MAC controller */ 526 /* Reset M526x MAC controller */
509 outl(ULI526X_RESET, ioaddr + DCR0); /* RESET MAC */ 527 uw32(DCR0, ULI526X_RESET); /* RESET MAC */
510 udelay(100); 528 udelay(100);
511 outl(db->cr0_data, ioaddr + DCR0); 529 uw32(DCR0, db->cr0_data);
512 udelay(5); 530 udelay(5);
513 531
514 /* Phy addr : In some boards,M5261/M5263 phy address != 1 */ 532 /* Phy addr : In some boards,M5261/M5263 phy address != 1 */
515 db->phy_addr = 1; 533 db->phy_addr = 1;
516 for(phy_tmp=0;phy_tmp<32;phy_tmp++) 534 for (phy_tmp = 0; phy_tmp < 32; phy_tmp++) {
517 { 535 u16 phy_value;
518 phy_value=phy_read(db->ioaddr,phy_tmp,3,db->chip_id);//peer add 536
519 if(phy_value != 0xffff&&phy_value!=0) 537 phy_value = phy->read(db, phy_tmp, 3); //peer add
520 { 538 if (phy_value != 0xffff && phy_value != 0) {
521 db->phy_addr = phy_tmp; 539 db->phy_addr = phy_tmp;
522 break; 540 break;
523 } 541 }
524 } 542 }
525 if(phy_tmp == 32) 543
544 if (phy_tmp == 32)
526 pr_warn("Can not find the phy address!!!\n"); 545 pr_warn("Can not find the phy address!!!\n");
527 /* Parser SROM and media mode */ 546 /* Parser SROM and media mode */
528 db->media_mode = uli526x_media_mode; 547 db->media_mode = uli526x_media_mode;
529 548
530 /* phyxcer capability setting */ 549 /* phyxcer capability setting */
531 phy_reg_reset = phy_read(db->ioaddr, db->phy_addr, 0, db->chip_id); 550 phy_reg_reset = phy->read(db, db->phy_addr, 0);
532 phy_reg_reset = (phy_reg_reset | 0x8000); 551 phy_reg_reset = (phy_reg_reset | 0x8000);
533 phy_write(db->ioaddr, db->phy_addr, 0, phy_reg_reset, db->chip_id); 552 phy->write(db, db->phy_addr, 0, phy_reg_reset);
534 553
535 /* See IEEE 802.3-2002.pdf (Section 2, Chapter "22.2.4 Management 554 /* See IEEE 802.3-2002.pdf (Section 2, Chapter "22.2.4 Management
536 * functions") or phy data sheet for details on phy reset 555 * functions") or phy data sheet for details on phy reset
537 */ 556 */
538 udelay(500); 557 udelay(500);
539 timeout = 10; 558 timeout = 10;
540 while (timeout-- && 559 while (timeout-- && phy->read(db, db->phy_addr, 0) & 0x8000)
541 phy_read(db->ioaddr, db->phy_addr, 0, db->chip_id) & 0x8000) 560 udelay(100);
542 udelay(100);
543 561
544 /* Process Phyxcer Media Mode */ 562 /* Process Phyxcer Media Mode */
545 uli526x_set_phyxcer(db); 563 uli526x_set_phyxcer(db);
546 564
547 /* Media Mode Process */ 565 /* Media Mode Process */
548 if ( !(db->media_mode & ULI526X_AUTO) ) 566 if ( !(db->media_mode & ULI526X_AUTO) )
549 db->op_mode = db->media_mode; /* Force Mode */ 567 db->op_mode = db->media_mode; /* Force Mode */
550 568
551 /* Initialize Transmit/Receive decriptor and CR3/4 */ 569 /* Initialize Transmit/Receive decriptor and CR3/4 */
552 uli526x_descriptor_init(dev, ioaddr); 570 uli526x_descriptor_init(dev, ioaddr);
@@ -559,10 +577,10 @@ static void uli526x_init(struct net_device *dev)
559 577
560 /* Init CR7, interrupt active bit */ 578 /* Init CR7, interrupt active bit */
561 db->cr7_data = CR7_DEFAULT; 579 db->cr7_data = CR7_DEFAULT;
562 outl(db->cr7_data, ioaddr + DCR7); 580 uw32(DCR7, db->cr7_data);
563 581
564 /* Init CR15, Tx jabber and Rx watchdog timer */ 582 /* Init CR15, Tx jabber and Rx watchdog timer */
565 outl(db->cr15_data, ioaddr + DCR15); 583 uw32(DCR15, db->cr15_data);
566 584
567 /* Enable ULI526X Tx/Rx function */ 585 /* Enable ULI526X Tx/Rx function */
568 db->cr6_data |= CR6_RXSC | CR6_TXSC; 586 db->cr6_data |= CR6_RXSC | CR6_TXSC;
@@ -579,6 +597,7 @@ static netdev_tx_t uli526x_start_xmit(struct sk_buff *skb,
579 struct net_device *dev) 597 struct net_device *dev)
580{ 598{
581 struct uli526x_board_info *db = netdev_priv(dev); 599 struct uli526x_board_info *db = netdev_priv(dev);
600 void __iomem *ioaddr = db->ioaddr;
582 struct tx_desc *txptr; 601 struct tx_desc *txptr;
583 unsigned long flags; 602 unsigned long flags;
584 603
@@ -604,7 +623,7 @@ static netdev_tx_t uli526x_start_xmit(struct sk_buff *skb,
604 } 623 }
605 624
606 /* Disable NIC interrupt */ 625 /* Disable NIC interrupt */
607 outl(0, dev->base_addr + DCR7); 626 uw32(DCR7, 0);
608 627
609 /* transmit this packet */ 628 /* transmit this packet */
610 txptr = db->tx_insert_ptr; 629 txptr = db->tx_insert_ptr;
@@ -615,10 +634,10 @@ static netdev_tx_t uli526x_start_xmit(struct sk_buff *skb,
615 db->tx_insert_ptr = txptr->next_tx_desc; 634 db->tx_insert_ptr = txptr->next_tx_desc;
616 635
617 /* Transmit Packet Process */ 636 /* Transmit Packet Process */
618 if ( (db->tx_packet_cnt < TX_DESC_CNT) ) { 637 if (db->tx_packet_cnt < TX_DESC_CNT) {
619 txptr->tdes0 = cpu_to_le32(0x80000000); /* Set owner bit */ 638 txptr->tdes0 = cpu_to_le32(0x80000000); /* Set owner bit */
620 db->tx_packet_cnt++; /* Ready to send */ 639 db->tx_packet_cnt++; /* Ready to send */
621 outl(0x1, dev->base_addr + DCR1); /* Issue Tx polling */ 640 uw32(DCR1, 0x1); /* Issue Tx polling */
622 dev->trans_start = jiffies; /* saved time stamp */ 641 dev->trans_start = jiffies; /* saved time stamp */
623 } 642 }
624 643
@@ -628,7 +647,7 @@ static netdev_tx_t uli526x_start_xmit(struct sk_buff *skb,
628 647
629 /* Restore CR7 to enable interrupt */ 648 /* Restore CR7 to enable interrupt */
630 spin_unlock_irqrestore(&db->lock, flags); 649 spin_unlock_irqrestore(&db->lock, flags);
631 outl(db->cr7_data, dev->base_addr + DCR7); 650 uw32(DCR7, db->cr7_data);
632 651
633 /* free this SKB */ 652 /* free this SKB */
634 dev_kfree_skb(skb); 653 dev_kfree_skb(skb);
@@ -645,9 +664,7 @@ static netdev_tx_t uli526x_start_xmit(struct sk_buff *skb,
645static int uli526x_stop(struct net_device *dev) 664static int uli526x_stop(struct net_device *dev)
646{ 665{
647 struct uli526x_board_info *db = netdev_priv(dev); 666 struct uli526x_board_info *db = netdev_priv(dev);
648 unsigned long ioaddr = dev->base_addr; 667 void __iomem *ioaddr = db->ioaddr;
649
650 ULI526X_DBUG(0, "uli526x_stop", 0);
651 668
652 /* disable system */ 669 /* disable system */
653 netif_stop_queue(dev); 670 netif_stop_queue(dev);
@@ -656,12 +673,12 @@ static int uli526x_stop(struct net_device *dev)
656 del_timer_sync(&db->timer); 673 del_timer_sync(&db->timer);
657 674
658 /* Reset & stop ULI526X board */ 675 /* Reset & stop ULI526X board */
659 outl(ULI526X_RESET, ioaddr + DCR0); 676 uw32(DCR0, ULI526X_RESET);
660 udelay(5); 677 udelay(5);
661 phy_write(db->ioaddr, db->phy_addr, 0, 0x8000, db->chip_id); 678 db->phy.write(db, db->phy_addr, 0, 0x8000);
662 679
663 /* free interrupt */ 680 /* free interrupt */
664 free_irq(dev->irq, dev); 681 free_irq(db->pdev->irq, dev);
665 682
666 /* free allocated rx buffer */ 683 /* free allocated rx buffer */
667 uli526x_free_rxbuffer(db); 684 uli526x_free_rxbuffer(db);
@@ -679,18 +696,18 @@ static irqreturn_t uli526x_interrupt(int irq, void *dev_id)
679{ 696{
680 struct net_device *dev = dev_id; 697 struct net_device *dev = dev_id;
681 struct uli526x_board_info *db = netdev_priv(dev); 698 struct uli526x_board_info *db = netdev_priv(dev);
682 unsigned long ioaddr = dev->base_addr; 699 void __iomem *ioaddr = db->ioaddr;
683 unsigned long flags; 700 unsigned long flags;
684 701
685 spin_lock_irqsave(&db->lock, flags); 702 spin_lock_irqsave(&db->lock, flags);
686 outl(0, ioaddr + DCR7); 703 uw32(DCR7, 0);
687 704
688 /* Got ULI526X status */ 705 /* Got ULI526X status */
689 db->cr5_data = inl(ioaddr + DCR5); 706 db->cr5_data = ur32(DCR5);
690 outl(db->cr5_data, ioaddr + DCR5); 707 uw32(DCR5, db->cr5_data);
691 if ( !(db->cr5_data & 0x180c1) ) { 708 if ( !(db->cr5_data & 0x180c1) ) {
692 /* Restore CR7 to enable interrupt mask */ 709 /* Restore CR7 to enable interrupt mask */
693 outl(db->cr7_data, ioaddr + DCR7); 710 uw32(DCR7, db->cr7_data);
694 spin_unlock_irqrestore(&db->lock, flags); 711 spin_unlock_irqrestore(&db->lock, flags);
695 return IRQ_HANDLED; 712 return IRQ_HANDLED;
696 } 713 }
@@ -718,7 +735,7 @@ static irqreturn_t uli526x_interrupt(int irq, void *dev_id)
718 uli526x_free_tx_pkt(dev, db); 735 uli526x_free_tx_pkt(dev, db);
719 736
720 /* Restore CR7 to enable interrupt mask */ 737 /* Restore CR7 to enable interrupt mask */
721 outl(db->cr7_data, ioaddr + DCR7); 738 uw32(DCR7, db->cr7_data);
722 739
723 spin_unlock_irqrestore(&db->lock, flags); 740 spin_unlock_irqrestore(&db->lock, flags);
724 return IRQ_HANDLED; 741 return IRQ_HANDLED;
@@ -727,8 +744,10 @@ static irqreturn_t uli526x_interrupt(int irq, void *dev_id)
727#ifdef CONFIG_NET_POLL_CONTROLLER 744#ifdef CONFIG_NET_POLL_CONTROLLER
728static void uli526x_poll(struct net_device *dev) 745static void uli526x_poll(struct net_device *dev)
729{ 746{
747 struct uli526x_board_info *db = netdev_priv(dev);
748
730 /* ISR grabs the irqsave lock, so this should be safe */ 749 /* ISR grabs the irqsave lock, so this should be safe */
731 uli526x_interrupt(dev->irq, dev); 750 uli526x_interrupt(db->pdev->irq, dev);
732} 751}
733#endif 752#endif
734 753
@@ -962,12 +981,7 @@ static void netdev_get_drvinfo(struct net_device *dev,
962 981
963 strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); 982 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
964 strlcpy(info->version, DRV_VERSION, sizeof(info->version)); 983 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
965 if (np->pdev) 984 strlcpy(info->bus_info, pci_name(np->pdev), sizeof(info->bus_info));
966 strlcpy(info->bus_info, pci_name(np->pdev),
967 sizeof(info->bus_info));
968 else
969 sprintf(info->bus_info, "EISA 0x%lx %d",
970 dev->base_addr, dev->irq);
971} 985}
972 986
973static int netdev_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) { 987static int netdev_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) {
@@ -1007,18 +1021,20 @@ static const struct ethtool_ops netdev_ethtool_ops = {
1007 1021
1008static void uli526x_timer(unsigned long data) 1022static void uli526x_timer(unsigned long data)
1009{ 1023{
1010 u32 tmp_cr8;
1011 unsigned char tmp_cr12=0;
1012 struct net_device *dev = (struct net_device *) data; 1024 struct net_device *dev = (struct net_device *) data;
1013 struct uli526x_board_info *db = netdev_priv(dev); 1025 struct uli526x_board_info *db = netdev_priv(dev);
1026 struct uli_phy_ops *phy = &db->phy;
1027 void __iomem *ioaddr = db->ioaddr;
1014 unsigned long flags; 1028 unsigned long flags;
1029 u8 tmp_cr12 = 0;
1030 u32 tmp_cr8;
1015 1031
1016 //ULI526X_DBUG(0, "uli526x_timer()", 0); 1032 //ULI526X_DBUG(0, "uli526x_timer()", 0);
1017 spin_lock_irqsave(&db->lock, flags); 1033 spin_lock_irqsave(&db->lock, flags);
1018 1034
1019 1035
1020 /* Dynamic reset ULI526X : system error or transmit time-out */ 1036 /* Dynamic reset ULI526X : system error or transmit time-out */
1021 tmp_cr8 = inl(db->ioaddr + DCR8); 1037 tmp_cr8 = ur32(DCR8);
1022 if ( (db->interval_rx_cnt==0) && (tmp_cr8) ) { 1038 if ( (db->interval_rx_cnt==0) && (tmp_cr8) ) {
1023 db->reset_cr8++; 1039 db->reset_cr8++;
1024 db->wait_reset = 1; 1040 db->wait_reset = 1;
@@ -1028,7 +1044,7 @@ static void uli526x_timer(unsigned long data)
1028 /* TX polling kick monitor */ 1044 /* TX polling kick monitor */
1029 if ( db->tx_packet_cnt && 1045 if ( db->tx_packet_cnt &&
1030 time_after(jiffies, dev_trans_start(dev) + ULI526X_TX_KICK) ) { 1046 time_after(jiffies, dev_trans_start(dev) + ULI526X_TX_KICK) ) {
1031 outl(0x1, dev->base_addr + DCR1); // Tx polling again 1047 uw32(DCR1, 0x1); // Tx polling again
1032 1048
1033 // TX Timeout 1049 // TX Timeout
1034 if ( time_after(jiffies, dev_trans_start(dev) + ULI526X_TX_TIMEOUT) ) { 1050 if ( time_after(jiffies, dev_trans_start(dev) + ULI526X_TX_TIMEOUT) ) {
@@ -1049,7 +1065,7 @@ static void uli526x_timer(unsigned long data)
1049 } 1065 }
1050 1066
1051 /* Link status check, Dynamic media type change */ 1067 /* Link status check, Dynamic media type change */
1052 if((phy_read(db->ioaddr, db->phy_addr, 5, db->chip_id) & 0x01e0)!=0) 1068 if ((phy->read(db, db->phy_addr, 5) & 0x01e0)!=0)
1053 tmp_cr12 = 3; 1069 tmp_cr12 = 3;
1054 1070
1055 if ( !(tmp_cr12 & 0x3) && !db->link_failed ) { 1071 if ( !(tmp_cr12 & 0x3) && !db->link_failed ) {
@@ -1062,7 +1078,7 @@ static void uli526x_timer(unsigned long data)
1062 /* For Force 10/100M Half/Full mode: Enable Auto-Nego mode */ 1078 /* For Force 10/100M Half/Full mode: Enable Auto-Nego mode */
1063 /* AUTO don't need */ 1079 /* AUTO don't need */
1064 if ( !(db->media_mode & 0x8) ) 1080 if ( !(db->media_mode & 0x8) )
1065 phy_write(db->ioaddr, db->phy_addr, 0, 0x1000, db->chip_id); 1081 phy->write(db, db->phy_addr, 0, 0x1000);
1066 1082
1067 /* AUTO mode, if INT phyxcer link failed, select EXT device */ 1083 /* AUTO mode, if INT phyxcer link failed, select EXT device */
1068 if (db->media_mode & ULI526X_AUTO) { 1084 if (db->media_mode & ULI526X_AUTO) {
@@ -1119,12 +1135,13 @@ static void uli526x_timer(unsigned long data)
1119static void uli526x_reset_prepare(struct net_device *dev) 1135static void uli526x_reset_prepare(struct net_device *dev)
1120{ 1136{
1121 struct uli526x_board_info *db = netdev_priv(dev); 1137 struct uli526x_board_info *db = netdev_priv(dev);
1138 void __iomem *ioaddr = db->ioaddr;
1122 1139
1123 /* Sopt MAC controller */ 1140 /* Sopt MAC controller */
1124 db->cr6_data &= ~(CR6_RXSC | CR6_TXSC); /* Disable Tx/Rx */ 1141 db->cr6_data &= ~(CR6_RXSC | CR6_TXSC); /* Disable Tx/Rx */
1125 update_cr6(db->cr6_data, dev->base_addr); 1142 update_cr6(db->cr6_data, ioaddr);
1126 outl(0, dev->base_addr + DCR7); /* Disable Interrupt */ 1143 uw32(DCR7, 0); /* Disable Interrupt */
1127 outl(inl(dev->base_addr + DCR5), dev->base_addr + DCR5); 1144 uw32(DCR5, ur32(DCR5));
1128 1145
1129 /* Disable upper layer interface */ 1146 /* Disable upper layer interface */
1130 netif_stop_queue(dev); 1147 netif_stop_queue(dev);
@@ -1289,7 +1306,7 @@ static void uli526x_reuse_skb(struct uli526x_board_info *db, struct sk_buff * sk
1289 * Using Chain structure, and allocate Tx/Rx buffer 1306 * Using Chain structure, and allocate Tx/Rx buffer
1290 */ 1307 */
1291 1308
1292static void uli526x_descriptor_init(struct net_device *dev, unsigned long ioaddr) 1309static void uli526x_descriptor_init(struct net_device *dev, void __iomem *ioaddr)
1293{ 1310{
1294 struct uli526x_board_info *db = netdev_priv(dev); 1311 struct uli526x_board_info *db = netdev_priv(dev);
1295 struct tx_desc *tmp_tx; 1312 struct tx_desc *tmp_tx;
@@ -1304,14 +1321,14 @@ static void uli526x_descriptor_init(struct net_device *dev, unsigned long ioaddr
1304 /* tx descriptor start pointer */ 1321 /* tx descriptor start pointer */
1305 db->tx_insert_ptr = db->first_tx_desc; 1322 db->tx_insert_ptr = db->first_tx_desc;
1306 db->tx_remove_ptr = db->first_tx_desc; 1323 db->tx_remove_ptr = db->first_tx_desc;
1307 outl(db->first_tx_desc_dma, ioaddr + DCR4); /* TX DESC address */ 1324 uw32(DCR4, db->first_tx_desc_dma); /* TX DESC address */
1308 1325
1309 /* rx descriptor start pointer */ 1326 /* rx descriptor start pointer */
1310 db->first_rx_desc = (void *)db->first_tx_desc + sizeof(struct tx_desc) * TX_DESC_CNT; 1327 db->first_rx_desc = (void *)db->first_tx_desc + sizeof(struct tx_desc) * TX_DESC_CNT;
1311 db->first_rx_desc_dma = db->first_tx_desc_dma + sizeof(struct tx_desc) * TX_DESC_CNT; 1328 db->first_rx_desc_dma = db->first_tx_desc_dma + sizeof(struct tx_desc) * TX_DESC_CNT;
1312 db->rx_insert_ptr = db->first_rx_desc; 1329 db->rx_insert_ptr = db->first_rx_desc;
1313 db->rx_ready_ptr = db->first_rx_desc; 1330 db->rx_ready_ptr = db->first_rx_desc;
1314 outl(db->first_rx_desc_dma, ioaddr + DCR3); /* RX DESC address */ 1331 uw32(DCR3, db->first_rx_desc_dma); /* RX DESC address */
1315 1332
1316 /* Init Transmit chain */ 1333 /* Init Transmit chain */
1317 tmp_buf = db->buf_pool_start; 1334 tmp_buf = db->buf_pool_start;
@@ -1352,11 +1369,9 @@ static void uli526x_descriptor_init(struct net_device *dev, unsigned long ioaddr
1352 * Update CR6 value 1369 * Update CR6 value
1353 * Firstly stop ULI526X, then written value and start 1370 * Firstly stop ULI526X, then written value and start
1354 */ 1371 */
1355 1372static void update_cr6(u32 cr6_data, void __iomem *ioaddr)
1356static void update_cr6(u32 cr6_data, unsigned long ioaddr)
1357{ 1373{
1358 1374 uw32(DCR6, cr6_data);
1359 outl(cr6_data, ioaddr + DCR6);
1360 udelay(5); 1375 udelay(5);
1361} 1376}
1362 1377
@@ -1375,6 +1390,7 @@ static void update_cr6(u32 cr6_data, unsigned long ioaddr)
1375static void send_filter_frame(struct net_device *dev, int mc_cnt) 1390static void send_filter_frame(struct net_device *dev, int mc_cnt)
1376{ 1391{
1377 struct uli526x_board_info *db = netdev_priv(dev); 1392 struct uli526x_board_info *db = netdev_priv(dev);
1393 void __iomem *ioaddr = db->ioaddr;
1378 struct netdev_hw_addr *ha; 1394 struct netdev_hw_addr *ha;
1379 struct tx_desc *txptr; 1395 struct tx_desc *txptr;
1380 u16 * addrptr; 1396 u16 * addrptr;
@@ -1420,9 +1436,9 @@ static void send_filter_frame(struct net_device *dev, int mc_cnt)
1420 /* Resource Empty */ 1436 /* Resource Empty */
1421 db->tx_packet_cnt++; 1437 db->tx_packet_cnt++;
1422 txptr->tdes0 = cpu_to_le32(0x80000000); 1438 txptr->tdes0 = cpu_to_le32(0x80000000);
1423 update_cr6(db->cr6_data | 0x2000, dev->base_addr); 1439 update_cr6(db->cr6_data | 0x2000, ioaddr);
1424 outl(0x1, dev->base_addr + DCR1); /* Issue Tx polling */ 1440 uw32(DCR1, 0x1); /* Issue Tx polling */
1425 update_cr6(db->cr6_data, dev->base_addr); 1441 update_cr6(db->cr6_data, ioaddr);
1426 dev->trans_start = jiffies; 1442 dev->trans_start = jiffies;
1427 } else 1443 } else
1428 netdev_err(dev, "No Tx resource - Send_filter_frame!\n"); 1444 netdev_err(dev, "No Tx resource - Send_filter_frame!\n");
@@ -1465,37 +1481,38 @@ static void allocate_rx_buffer(struct net_device *dev)
1465 * Read one word data from the serial ROM 1481 * Read one word data from the serial ROM
1466 */ 1482 */
1467 1483
1468static u16 read_srom_word(long ioaddr, int offset) 1484static u16 read_srom_word(struct uli526x_board_info *db, int offset)
1469{ 1485{
1470 int i; 1486 void __iomem *ioaddr = db->ioaddr;
1471 u16 srom_data = 0; 1487 u16 srom_data = 0;
1472 long cr9_ioaddr = ioaddr + DCR9; 1488 int i;
1473 1489
1474 outl(CR9_SROM_READ, cr9_ioaddr); 1490 uw32(DCR9, CR9_SROM_READ);
1475 outl(CR9_SROM_READ | CR9_SRCS, cr9_ioaddr); 1491 uw32(DCR9, CR9_SROM_READ | CR9_SRCS);
1476 1492
1477 /* Send the Read Command 110b */ 1493 /* Send the Read Command 110b */
1478 SROM_CLK_WRITE(SROM_DATA_1, cr9_ioaddr); 1494 srom_clk_write(db, SROM_DATA_1);
1479 SROM_CLK_WRITE(SROM_DATA_1, cr9_ioaddr); 1495 srom_clk_write(db, SROM_DATA_1);
1480 SROM_CLK_WRITE(SROM_DATA_0, cr9_ioaddr); 1496 srom_clk_write(db, SROM_DATA_0);
1481 1497
1482 /* Send the offset */ 1498 /* Send the offset */
1483 for (i = 5; i >= 0; i--) { 1499 for (i = 5; i >= 0; i--) {
1484 srom_data = (offset & (1 << i)) ? SROM_DATA_1 : SROM_DATA_0; 1500 srom_data = (offset & (1 << i)) ? SROM_DATA_1 : SROM_DATA_0;
1485 SROM_CLK_WRITE(srom_data, cr9_ioaddr); 1501 srom_clk_write(db, srom_data);
1486 } 1502 }
1487 1503
1488 outl(CR9_SROM_READ | CR9_SRCS, cr9_ioaddr); 1504 uw32(DCR9, CR9_SROM_READ | CR9_SRCS);
1489 1505
1490 for (i = 16; i > 0; i--) { 1506 for (i = 16; i > 0; i--) {
1491 outl(CR9_SROM_READ | CR9_SRCS | CR9_SRCLK, cr9_ioaddr); 1507 uw32(DCR9, CR9_SROM_READ | CR9_SRCS | CR9_SRCLK);
1492 udelay(5); 1508 udelay(5);
1493 srom_data = (srom_data << 1) | ((inl(cr9_ioaddr) & CR9_CRDOUT) ? 1 : 0); 1509 srom_data = (srom_data << 1) |
1494 outl(CR9_SROM_READ | CR9_SRCS, cr9_ioaddr); 1510 ((ur32(DCR9) & CR9_CRDOUT) ? 1 : 0);
1511 uw32(DCR9, CR9_SROM_READ | CR9_SRCS);
1495 udelay(5); 1512 udelay(5);
1496 } 1513 }
1497 1514
1498 outl(CR9_SROM_READ, cr9_ioaddr); 1515 uw32(DCR9, CR9_SROM_READ);
1499 return srom_data; 1516 return srom_data;
1500} 1517}
1501 1518
@@ -1506,15 +1523,16 @@ static u16 read_srom_word(long ioaddr, int offset)
1506 1523
1507static u8 uli526x_sense_speed(struct uli526x_board_info * db) 1524static u8 uli526x_sense_speed(struct uli526x_board_info * db)
1508{ 1525{
1526 struct uli_phy_ops *phy = &db->phy;
1509 u8 ErrFlag = 0; 1527 u8 ErrFlag = 0;
1510 u16 phy_mode; 1528 u16 phy_mode;
1511 1529
1512 phy_mode = phy_read(db->ioaddr, db->phy_addr, 1, db->chip_id); 1530 phy_mode = phy->read(db, db->phy_addr, 1);
1513 phy_mode = phy_read(db->ioaddr, db->phy_addr, 1, db->chip_id); 1531 phy_mode = phy->read(db, db->phy_addr, 1);
1514 1532
1515 if ( (phy_mode & 0x24) == 0x24 ) { 1533 if ( (phy_mode & 0x24) == 0x24 ) {
1516 1534
1517 phy_mode = ((phy_read(db->ioaddr, db->phy_addr, 5, db->chip_id) & 0x01e0)<<7); 1535 phy_mode = ((phy->read(db, db->phy_addr, 5) & 0x01e0)<<7);
1518 if(phy_mode&0x8000) 1536 if(phy_mode&0x8000)
1519 phy_mode = 0x8000; 1537 phy_mode = 0x8000;
1520 else if(phy_mode&0x4000) 1538 else if(phy_mode&0x4000)
@@ -1549,10 +1567,11 @@ static u8 uli526x_sense_speed(struct uli526x_board_info * db)
1549 1567
1550static void uli526x_set_phyxcer(struct uli526x_board_info *db) 1568static void uli526x_set_phyxcer(struct uli526x_board_info *db)
1551{ 1569{
1570 struct uli_phy_ops *phy = &db->phy;
1552 u16 phy_reg; 1571 u16 phy_reg;
1553 1572
1554 /* Phyxcer capability setting */ 1573 /* Phyxcer capability setting */
1555 phy_reg = phy_read(db->ioaddr, db->phy_addr, 4, db->chip_id) & ~0x01e0; 1574 phy_reg = phy->read(db, db->phy_addr, 4) & ~0x01e0;
1556 1575
1557 if (db->media_mode & ULI526X_AUTO) { 1576 if (db->media_mode & ULI526X_AUTO) {
1558 /* AUTO Mode */ 1577 /* AUTO Mode */
@@ -1573,10 +1592,10 @@ static void uli526x_set_phyxcer(struct uli526x_board_info *db)
1573 phy_reg|=db->PHY_reg4; 1592 phy_reg|=db->PHY_reg4;
1574 db->media_mode|=ULI526X_AUTO; 1593 db->media_mode|=ULI526X_AUTO;
1575 } 1594 }
1576 phy_write(db->ioaddr, db->phy_addr, 4, phy_reg, db->chip_id); 1595 phy->write(db, db->phy_addr, 4, phy_reg);
1577 1596
1578 /* Restart Auto-Negotiation */ 1597 /* Restart Auto-Negotiation */
1579 phy_write(db->ioaddr, db->phy_addr, 0, 0x1200, db->chip_id); 1598 phy->write(db, db->phy_addr, 0, 0x1200);
1580 udelay(50); 1599 udelay(50);
1581} 1600}
1582 1601
@@ -1590,6 +1609,7 @@ static void uli526x_set_phyxcer(struct uli526x_board_info *db)
1590 1609
1591static void uli526x_process_mode(struct uli526x_board_info *db) 1610static void uli526x_process_mode(struct uli526x_board_info *db)
1592{ 1611{
1612 struct uli_phy_ops *phy = &db->phy;
1593 u16 phy_reg; 1613 u16 phy_reg;
1594 1614
1595 /* Full Duplex Mode Check */ 1615 /* Full Duplex Mode Check */
@@ -1601,10 +1621,10 @@ static void uli526x_process_mode(struct uli526x_board_info *db)
1601 update_cr6(db->cr6_data, db->ioaddr); 1621 update_cr6(db->cr6_data, db->ioaddr);
1602 1622
1603 /* 10/100M phyxcer force mode need */ 1623 /* 10/100M phyxcer force mode need */
1604 if ( !(db->media_mode & 0x8)) { 1624 if (!(db->media_mode & 0x8)) {
1605 /* Forece Mode */ 1625 /* Forece Mode */
1606 phy_reg = phy_read(db->ioaddr, db->phy_addr, 6, db->chip_id); 1626 phy_reg = phy->read(db, db->phy_addr, 6);
1607 if ( !(phy_reg & 0x1) ) { 1627 if (!(phy_reg & 0x1)) {
1608 /* parter without N-Way capability */ 1628 /* parter without N-Way capability */
1609 phy_reg = 0x0; 1629 phy_reg = 0x0;
1610 switch(db->op_mode) { 1630 switch(db->op_mode) {
@@ -1613,148 +1633,126 @@ static void uli526x_process_mode(struct uli526x_board_info *db)
1613 case ULI526X_100MHF: phy_reg = 0x2000; break; 1633 case ULI526X_100MHF: phy_reg = 0x2000; break;
1614 case ULI526X_100MFD: phy_reg = 0x2100; break; 1634 case ULI526X_100MFD: phy_reg = 0x2100; break;
1615 } 1635 }
1616 phy_write(db->ioaddr, db->phy_addr, 0, phy_reg, db->chip_id); 1636 phy->write(db, db->phy_addr, 0, phy_reg);
1617 } 1637 }
1618 } 1638 }
1619} 1639}
1620 1640
1621 1641
1622/* 1642/* M5261/M5263 Chip */
1623 * Write a word to Phy register 1643static void phy_writeby_cr9(struct uli526x_board_info *db, u8 phy_addr,
1624 */ 1644 u8 offset, u16 phy_data)
1625
1626static void phy_write(unsigned long iobase, u8 phy_addr, u8 offset, u16 phy_data, u32 chip_id)
1627{ 1645{
1628 u16 i; 1646 u16 i;
1629 unsigned long ioaddr;
1630
1631 if(chip_id == PCI_ULI5263_ID)
1632 {
1633 phy_writeby_cr10(iobase, phy_addr, offset, phy_data);
1634 return;
1635 }
1636 /* M5261/M5263 Chip */
1637 ioaddr = iobase + DCR9;
1638 1647
1639 /* Send 33 synchronization clock to Phy controller */ 1648 /* Send 33 synchronization clock to Phy controller */
1640 for (i = 0; i < 35; i++) 1649 for (i = 0; i < 35; i++)
1641 phy_write_1bit(ioaddr, PHY_DATA_1, chip_id); 1650 phy_write_1bit(db, PHY_DATA_1);
1642 1651
1643 /* Send start command(01) to Phy */ 1652 /* Send start command(01) to Phy */
1644 phy_write_1bit(ioaddr, PHY_DATA_0, chip_id); 1653 phy_write_1bit(db, PHY_DATA_0);
1645 phy_write_1bit(ioaddr, PHY_DATA_1, chip_id); 1654 phy_write_1bit(db, PHY_DATA_1);
1646 1655
1647 /* Send write command(01) to Phy */ 1656 /* Send write command(01) to Phy */
1648 phy_write_1bit(ioaddr, PHY_DATA_0, chip_id); 1657 phy_write_1bit(db, PHY_DATA_0);
1649 phy_write_1bit(ioaddr, PHY_DATA_1, chip_id); 1658 phy_write_1bit(db, PHY_DATA_1);
1650 1659
1651 /* Send Phy address */ 1660 /* Send Phy address */
1652 for (i = 0x10; i > 0; i = i >> 1) 1661 for (i = 0x10; i > 0; i = i >> 1)
1653 phy_write_1bit(ioaddr, phy_addr & i ? PHY_DATA_1 : PHY_DATA_0, chip_id); 1662 phy_write_1bit(db, phy_addr & i ? PHY_DATA_1 : PHY_DATA_0);
1654 1663
1655 /* Send register address */ 1664 /* Send register address */
1656 for (i = 0x10; i > 0; i = i >> 1) 1665 for (i = 0x10; i > 0; i = i >> 1)
1657 phy_write_1bit(ioaddr, offset & i ? PHY_DATA_1 : PHY_DATA_0, chip_id); 1666 phy_write_1bit(db, offset & i ? PHY_DATA_1 : PHY_DATA_0);
1658 1667
1659 /* written trasnition */ 1668 /* written trasnition */
1660 phy_write_1bit(ioaddr, PHY_DATA_1, chip_id); 1669 phy_write_1bit(db, PHY_DATA_1);
1661 phy_write_1bit(ioaddr, PHY_DATA_0, chip_id); 1670 phy_write_1bit(db, PHY_DATA_0);
1662 1671
1663 /* Write a word data to PHY controller */ 1672 /* Write a word data to PHY controller */
1664 for ( i = 0x8000; i > 0; i >>= 1) 1673 for (i = 0x8000; i > 0; i >>= 1)
1665 phy_write_1bit(ioaddr, phy_data & i ? PHY_DATA_1 : PHY_DATA_0, chip_id); 1674 phy_write_1bit(db, phy_data & i ? PHY_DATA_1 : PHY_DATA_0);
1666
1667} 1675}
1668 1676
1669 1677static u16 phy_readby_cr9(struct uli526x_board_info *db, u8 phy_addr, u8 offset)
1670/*
1671 * Read a word data from phy register
1672 */
1673
1674static u16 phy_read(unsigned long iobase, u8 phy_addr, u8 offset, u32 chip_id)
1675{ 1678{
1676 int i;
1677 u16 phy_data; 1679 u16 phy_data;
1678 unsigned long ioaddr; 1680 int i;
1679
1680 if(chip_id == PCI_ULI5263_ID)
1681 return phy_readby_cr10(iobase, phy_addr, offset);
1682 /* M5261/M5263 Chip */
1683 ioaddr = iobase + DCR9;
1684 1681
1685 /* Send 33 synchronization clock to Phy controller */ 1682 /* Send 33 synchronization clock to Phy controller */
1686 for (i = 0; i < 35; i++) 1683 for (i = 0; i < 35; i++)
1687 phy_write_1bit(ioaddr, PHY_DATA_1, chip_id); 1684 phy_write_1bit(db, PHY_DATA_1);
1688 1685
1689 /* Send start command(01) to Phy */ 1686 /* Send start command(01) to Phy */
1690 phy_write_1bit(ioaddr, PHY_DATA_0, chip_id); 1687 phy_write_1bit(db, PHY_DATA_0);
1691 phy_write_1bit(ioaddr, PHY_DATA_1, chip_id); 1688 phy_write_1bit(db, PHY_DATA_1);
1692 1689
1693 /* Send read command(10) to Phy */ 1690 /* Send read command(10) to Phy */
1694 phy_write_1bit(ioaddr, PHY_DATA_1, chip_id); 1691 phy_write_1bit(db, PHY_DATA_1);
1695 phy_write_1bit(ioaddr, PHY_DATA_0, chip_id); 1692 phy_write_1bit(db, PHY_DATA_0);
1696 1693
1697 /* Send Phy address */ 1694 /* Send Phy address */
1698 for (i = 0x10; i > 0; i = i >> 1) 1695 for (i = 0x10; i > 0; i = i >> 1)
1699 phy_write_1bit(ioaddr, phy_addr & i ? PHY_DATA_1 : PHY_DATA_0, chip_id); 1696 phy_write_1bit(db, phy_addr & i ? PHY_DATA_1 : PHY_DATA_0);
1700 1697
1701 /* Send register address */ 1698 /* Send register address */
1702 for (i = 0x10; i > 0; i = i >> 1) 1699 for (i = 0x10; i > 0; i = i >> 1)
1703 phy_write_1bit(ioaddr, offset & i ? PHY_DATA_1 : PHY_DATA_0, chip_id); 1700 phy_write_1bit(db, offset & i ? PHY_DATA_1 : PHY_DATA_0);
1704 1701
1705 /* Skip transition state */ 1702 /* Skip transition state */
1706 phy_read_1bit(ioaddr, chip_id); 1703 phy_read_1bit(db);
1707 1704
1708 /* read 16bit data */ 1705 /* read 16bit data */
1709 for (phy_data = 0, i = 0; i < 16; i++) { 1706 for (phy_data = 0, i = 0; i < 16; i++) {
1710 phy_data <<= 1; 1707 phy_data <<= 1;
1711 phy_data |= phy_read_1bit(ioaddr, chip_id); 1708 phy_data |= phy_read_1bit(db);
1712 } 1709 }
1713 1710
1714 return phy_data; 1711 return phy_data;
1715} 1712}
1716 1713
1717static u16 phy_readby_cr10(unsigned long iobase, u8 phy_addr, u8 offset) 1714static u16 phy_readby_cr10(struct uli526x_board_info *db, u8 phy_addr,
1715 u8 offset)
1718{ 1716{
1719 unsigned long ioaddr,cr10_value; 1717 void __iomem *ioaddr = db->ioaddr;
1718 u32 cr10_value = phy_addr;
1720 1719
1721 ioaddr = iobase + DCR10; 1720 cr10_value = (cr10_value << 5) + offset;
1722 cr10_value = phy_addr; 1721 cr10_value = (cr10_value << 16) + 0x08000000;
1723 cr10_value = (cr10_value<<5) + offset; 1722 uw32(DCR10, cr10_value);
1724 cr10_value = (cr10_value<<16) + 0x08000000;
1725 outl(cr10_value,ioaddr);
1726 udelay(1); 1723 udelay(1);
1727 while(1) 1724 while (1) {
1728 { 1725 cr10_value = ur32(DCR10);
1729 cr10_value = inl(ioaddr); 1726 if (cr10_value & 0x10000000)
1730 if(cr10_value&0x10000000)
1731 break; 1727 break;
1732 } 1728 }
1733 return cr10_value & 0x0ffff; 1729 return cr10_value & 0x0ffff;
1734} 1730}
1735 1731
1736static void phy_writeby_cr10(unsigned long iobase, u8 phy_addr, u8 offset, u16 phy_data) 1732static void phy_writeby_cr10(struct uli526x_board_info *db, u8 phy_addr,
1733 u8 offset, u16 phy_data)
1737{ 1734{
1738 unsigned long ioaddr,cr10_value; 1735 void __iomem *ioaddr = db->ioaddr;
1736 u32 cr10_value = phy_addr;
1739 1737
1740 ioaddr = iobase + DCR10; 1738 cr10_value = (cr10_value << 5) + offset;
1741 cr10_value = phy_addr; 1739 cr10_value = (cr10_value << 16) + 0x04000000 + phy_data;
1742 cr10_value = (cr10_value<<5) + offset; 1740 uw32(DCR10, cr10_value);
1743 cr10_value = (cr10_value<<16) + 0x04000000 + phy_data;
1744 outl(cr10_value,ioaddr);
1745 udelay(1); 1741 udelay(1);
1746} 1742}
1747/* 1743/*
1748 * Write one bit data to Phy Controller 1744 * Write one bit data to Phy Controller
1749 */ 1745 */
1750 1746
1751static void phy_write_1bit(unsigned long ioaddr, u32 phy_data, u32 chip_id) 1747static void phy_write_1bit(struct uli526x_board_info *db, u32 data)
1752{ 1748{
1753 outl(phy_data , ioaddr); /* MII Clock Low */ 1749 void __iomem *ioaddr = db->ioaddr;
1750
1751 uw32(DCR9, data); /* MII Clock Low */
1754 udelay(1); 1752 udelay(1);
1755 outl(phy_data | MDCLKH, ioaddr); /* MII Clock High */ 1753 uw32(DCR9, data | MDCLKH); /* MII Clock High */
1756 udelay(1); 1754 udelay(1);
1757 outl(phy_data , ioaddr); /* MII Clock Low */ 1755 uw32(DCR9, data); /* MII Clock Low */
1758 udelay(1); 1756 udelay(1);
1759} 1757}
1760 1758
@@ -1763,14 +1761,15 @@ static void phy_write_1bit(unsigned long ioaddr, u32 phy_data, u32 chip_id)
1763 * Read one bit phy data from PHY controller 1761 * Read one bit phy data from PHY controller
1764 */ 1762 */
1765 1763
1766static u16 phy_read_1bit(unsigned long ioaddr, u32 chip_id) 1764static u16 phy_read_1bit(struct uli526x_board_info *db)
1767{ 1765{
1766 void __iomem *ioaddr = db->ioaddr;
1768 u16 phy_data; 1767 u16 phy_data;
1769 1768
1770 outl(0x50000 , ioaddr); 1769 uw32(DCR9, 0x50000);
1771 udelay(1); 1770 udelay(1);
1772 phy_data = ( inl(ioaddr) >> 19 ) & 0x1; 1771 phy_data = (ur32(DCR9) >> 19) & 0x1;
1773 outl(0x40000 , ioaddr); 1772 uw32(DCR9, 0x40000);
1774 udelay(1); 1773 udelay(1);
1775 1774
1776 return phy_data; 1775 return phy_data;
diff --git a/drivers/net/ethernet/dec/tulip/winbond-840.c b/drivers/net/ethernet/dec/tulip/winbond-840.c
index 2ac6fff0363a..4d1ffca83c82 100644
--- a/drivers/net/ethernet/dec/tulip/winbond-840.c
+++ b/drivers/net/ethernet/dec/tulip/winbond-840.c
@@ -400,9 +400,6 @@ static int __devinit w840_probe1 (struct pci_dev *pdev,
400 No hold time required! */ 400 No hold time required! */
401 iowrite32(0x00000001, ioaddr + PCIBusCfg); 401 iowrite32(0x00000001, ioaddr + PCIBusCfg);
402 402
403 dev->base_addr = (unsigned long)ioaddr;
404 dev->irq = irq;
405
406 np = netdev_priv(dev); 403 np = netdev_priv(dev);
407 np->pci_dev = pdev; 404 np->pci_dev = pdev;
408 np->chip_id = chip_idx; 405 np->chip_id = chip_idx;
@@ -635,17 +632,18 @@ static int netdev_open(struct net_device *dev)
635{ 632{
636 struct netdev_private *np = netdev_priv(dev); 633 struct netdev_private *np = netdev_priv(dev);
637 void __iomem *ioaddr = np->base_addr; 634 void __iomem *ioaddr = np->base_addr;
635 const int irq = np->pci_dev->irq;
638 int i; 636 int i;
639 637
640 iowrite32(0x00000001, ioaddr + PCIBusCfg); /* Reset */ 638 iowrite32(0x00000001, ioaddr + PCIBusCfg); /* Reset */
641 639
642 netif_device_detach(dev); 640 netif_device_detach(dev);
643 i = request_irq(dev->irq, intr_handler, IRQF_SHARED, dev->name, dev); 641 i = request_irq(irq, intr_handler, IRQF_SHARED, dev->name, dev);
644 if (i) 642 if (i)
645 goto out_err; 643 goto out_err;
646 644
647 if (debug > 1) 645 if (debug > 1)
648 netdev_dbg(dev, "w89c840_open() irq %d\n", dev->irq); 646 netdev_dbg(dev, "w89c840_open() irq %d\n", irq);
649 647
650 if((i=alloc_ringdesc(dev))) 648 if((i=alloc_ringdesc(dev)))
651 goto out_err; 649 goto out_err;
@@ -932,6 +930,7 @@ static void tx_timeout(struct net_device *dev)
932{ 930{
933 struct netdev_private *np = netdev_priv(dev); 931 struct netdev_private *np = netdev_priv(dev);
934 void __iomem *ioaddr = np->base_addr; 932 void __iomem *ioaddr = np->base_addr;
933 const int irq = np->pci_dev->irq;
935 934
936 dev_warn(&dev->dev, "Transmit timed out, status %08x, resetting...\n", 935 dev_warn(&dev->dev, "Transmit timed out, status %08x, resetting...\n",
937 ioread32(ioaddr + IntrStatus)); 936 ioread32(ioaddr + IntrStatus));
@@ -951,7 +950,7 @@ static void tx_timeout(struct net_device *dev)
951 np->cur_tx, np->dirty_tx, np->tx_full, np->tx_q_bytes); 950 np->cur_tx, np->dirty_tx, np->tx_full, np->tx_q_bytes);
952 printk(KERN_DEBUG "Tx Descriptor addr %xh\n", ioread32(ioaddr+0x4C)); 951 printk(KERN_DEBUG "Tx Descriptor addr %xh\n", ioread32(ioaddr+0x4C));
953 952
954 disable_irq(dev->irq); 953 disable_irq(irq);
955 spin_lock_irq(&np->lock); 954 spin_lock_irq(&np->lock);
956 /* 955 /*
957 * Under high load dirty_tx and the internal tx descriptor pointer 956 * Under high load dirty_tx and the internal tx descriptor pointer
@@ -966,7 +965,7 @@ static void tx_timeout(struct net_device *dev)
966 init_rxtx_rings(dev); 965 init_rxtx_rings(dev);
967 init_registers(dev); 966 init_registers(dev);
968 spin_unlock_irq(&np->lock); 967 spin_unlock_irq(&np->lock);
969 enable_irq(dev->irq); 968 enable_irq(irq);
970 969
971 netif_wake_queue(dev); 970 netif_wake_queue(dev);
972 dev->trans_start = jiffies; /* prevent tx timeout */ 971 dev->trans_start = jiffies; /* prevent tx timeout */
@@ -1500,7 +1499,7 @@ static int netdev_close(struct net_device *dev)
1500 iowrite32(0x0000, ioaddr + IntrEnable); 1499 iowrite32(0x0000, ioaddr + IntrEnable);
1501 spin_unlock_irq(&np->lock); 1500 spin_unlock_irq(&np->lock);
1502 1501
1503 free_irq(dev->irq, dev); 1502 free_irq(np->pci_dev->irq, dev);
1504 wmb(); 1503 wmb();
1505 netif_device_attach(dev); 1504 netif_device_attach(dev);
1506 1505
@@ -1589,7 +1588,7 @@ static int w840_suspend (struct pci_dev *pdev, pm_message_t state)
1589 iowrite32(0, ioaddr + IntrEnable); 1588 iowrite32(0, ioaddr + IntrEnable);
1590 spin_unlock_irq(&np->lock); 1589 spin_unlock_irq(&np->lock);
1591 1590
1592 synchronize_irq(dev->irq); 1591 synchronize_irq(np->pci_dev->irq);
1593 netif_tx_disable(dev); 1592 netif_tx_disable(dev);
1594 1593
1595 np->stats.rx_missed_errors += ioread32(ioaddr + RxMissed) & 0xffff; 1594 np->stats.rx_missed_errors += ioread32(ioaddr + RxMissed) & 0xffff;
diff --git a/drivers/net/ethernet/dec/tulip/xircom_cb.c b/drivers/net/ethernet/dec/tulip/xircom_cb.c
index fdb329fe6e8e..138bf83bc98e 100644
--- a/drivers/net/ethernet/dec/tulip/xircom_cb.c
+++ b/drivers/net/ethernet/dec/tulip/xircom_cb.c
@@ -41,7 +41,9 @@ MODULE_DESCRIPTION("Xircom Cardbus ethernet driver");
41MODULE_AUTHOR("Arjan van de Ven <arjanv@redhat.com>"); 41MODULE_AUTHOR("Arjan van de Ven <arjanv@redhat.com>");
42MODULE_LICENSE("GPL"); 42MODULE_LICENSE("GPL");
43 43
44 44#define xw32(reg, val) iowrite32(val, ioaddr + (reg))
45#define xr32(reg) ioread32(ioaddr + (reg))
46#define xr8(reg) ioread8(ioaddr + (reg))
45 47
46/* IO registers on the card, offsets */ 48/* IO registers on the card, offsets */
47#define CSR0 0x00 49#define CSR0 0x00
@@ -83,7 +85,7 @@ struct xircom_private {
83 85
84 struct sk_buff *tx_skb[4]; 86 struct sk_buff *tx_skb[4];
85 87
86 unsigned long io_port; 88 void __iomem *ioaddr;
87 int open; 89 int open;
88 90
89 /* transmit_used is the rotating counter that indicates which transmit 91 /* transmit_used is the rotating counter that indicates which transmit
@@ -137,7 +139,7 @@ static int link_status(struct xircom_private *card);
137 139
138 140
139static DEFINE_PCI_DEVICE_TABLE(xircom_pci_table) = { 141static DEFINE_PCI_DEVICE_TABLE(xircom_pci_table) = {
140 {0x115D, 0x0003, PCI_ANY_ID, PCI_ANY_ID,}, 142 { PCI_VDEVICE(XIRCOM, 0x0003), },
141 {0,}, 143 {0,},
142}; 144};
143MODULE_DEVICE_TABLE(pci, xircom_pci_table); 145MODULE_DEVICE_TABLE(pci, xircom_pci_table);
@@ -146,9 +148,7 @@ static struct pci_driver xircom_ops = {
146 .name = "xircom_cb", 148 .name = "xircom_cb",
147 .id_table = xircom_pci_table, 149 .id_table = xircom_pci_table,
148 .probe = xircom_probe, 150 .probe = xircom_probe,
149 .remove = xircom_remove, 151 .remove = __devexit_p(xircom_remove),
150 .suspend =NULL,
151 .resume =NULL
152}; 152};
153 153
154 154
@@ -192,15 +192,18 @@ static const struct net_device_ops netdev_ops = {
192 */ 192 */
193static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_id *id) 193static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_id *id)
194{ 194{
195 struct device *d = &pdev->dev;
195 struct net_device *dev = NULL; 196 struct net_device *dev = NULL;
196 struct xircom_private *private; 197 struct xircom_private *private;
197 unsigned long flags; 198 unsigned long flags;
198 unsigned short tmp16; 199 unsigned short tmp16;
200 int rc;
199 201
200 /* First do the PCI initialisation */ 202 /* First do the PCI initialisation */
201 203
202 if (pci_enable_device(pdev)) 204 rc = pci_enable_device(pdev);
203 return -ENODEV; 205 if (rc < 0)
206 goto out;
204 207
205 /* disable all powermanagement */ 208 /* disable all powermanagement */
206 pci_write_config_dword(pdev, PCI_POWERMGMT, 0x0000); 209 pci_write_config_dword(pdev, PCI_POWERMGMT, 0x0000);
@@ -211,11 +214,13 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_
211 pci_read_config_word (pdev,PCI_STATUS, &tmp16); 214 pci_read_config_word (pdev,PCI_STATUS, &tmp16);
212 pci_write_config_word (pdev, PCI_STATUS,tmp16); 215 pci_write_config_word (pdev, PCI_STATUS,tmp16);
213 216
214 if (!request_region(pci_resource_start(pdev, 0), 128, "xircom_cb")) { 217 rc = pci_request_regions(pdev, "xircom_cb");
218 if (rc < 0) {
215 pr_err("%s: failed to allocate io-region\n", __func__); 219 pr_err("%s: failed to allocate io-region\n", __func__);
216 return -ENODEV; 220 goto err_disable;
217 } 221 }
218 222
223 rc = -ENOMEM;
219 /* 224 /*
220 Before changing the hardware, allocate the memory. 225 Before changing the hardware, allocate the memory.
221 This way, we can fail gracefully if not enough memory 226 This way, we can fail gracefully if not enough memory
@@ -223,17 +228,21 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_
223 */ 228 */
224 dev = alloc_etherdev(sizeof(struct xircom_private)); 229 dev = alloc_etherdev(sizeof(struct xircom_private));
225 if (!dev) 230 if (!dev)
226 goto device_fail; 231 goto err_release;
227 232
228 private = netdev_priv(dev); 233 private = netdev_priv(dev);
229 234
230 /* Allocate the send/receive buffers */ 235 /* Allocate the send/receive buffers */
231 private->rx_buffer = pci_alloc_consistent(pdev,8192,&private->rx_dma_handle); 236 private->rx_buffer = dma_alloc_coherent(d, 8192,
237 &private->rx_dma_handle,
238 GFP_KERNEL);
232 if (private->rx_buffer == NULL) { 239 if (private->rx_buffer == NULL) {
233 pr_err("%s: no memory for rx buffer\n", __func__); 240 pr_err("%s: no memory for rx buffer\n", __func__);
234 goto rx_buf_fail; 241 goto rx_buf_fail;
235 } 242 }
236 private->tx_buffer = pci_alloc_consistent(pdev,8192,&private->tx_dma_handle); 243 private->tx_buffer = dma_alloc_coherent(d, 8192,
244 &private->tx_dma_handle,
245 GFP_KERNEL);
237 if (private->tx_buffer == NULL) { 246 if (private->tx_buffer == NULL) {
238 pr_err("%s: no memory for tx buffer\n", __func__); 247 pr_err("%s: no memory for tx buffer\n", __func__);
239 goto tx_buf_fail; 248 goto tx_buf_fail;
@@ -244,10 +253,13 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_
244 253
245 private->dev = dev; 254 private->dev = dev;
246 private->pdev = pdev; 255 private->pdev = pdev;
247 private->io_port = pci_resource_start(pdev, 0); 256
257 /* IO range. */
258 private->ioaddr = pci_iomap(pdev, 0, 0);
259 if (!private->ioaddr)
260 goto reg_fail;
261
248 spin_lock_init(&private->lock); 262 spin_lock_init(&private->lock);
249 dev->irq = pdev->irq;
250 dev->base_addr = private->io_port;
251 263
252 initialize_card(private); 264 initialize_card(private);
253 read_mac_address(private); 265 read_mac_address(private);
@@ -256,9 +268,10 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_
256 dev->netdev_ops = &netdev_ops; 268 dev->netdev_ops = &netdev_ops;
257 pci_set_drvdata(pdev, dev); 269 pci_set_drvdata(pdev, dev);
258 270
259 if (register_netdev(dev)) { 271 rc = register_netdev(dev);
272 if (rc < 0) {
260 pr_err("%s: netdevice registration failed\n", __func__); 273 pr_err("%s: netdevice registration failed\n", __func__);
261 goto reg_fail; 274 goto err_unmap;
262 } 275 }
263 276
264 netdev_info(dev, "Xircom cardbus revision %i at irq %i\n", 277 netdev_info(dev, "Xircom cardbus revision %i at irq %i\n",
@@ -273,17 +286,23 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_
273 spin_unlock_irqrestore(&private->lock,flags); 286 spin_unlock_irqrestore(&private->lock,flags);
274 287
275 trigger_receive(private); 288 trigger_receive(private);
289out:
290 return rc;
276 291
277 return 0; 292err_unmap:
278 293 pci_iounmap(pdev, private->ioaddr);
279reg_fail: 294reg_fail:
280 kfree(private->tx_buffer); 295 pci_set_drvdata(pdev, NULL);
296 dma_free_coherent(d, 8192, private->tx_buffer, private->tx_dma_handle);
281tx_buf_fail: 297tx_buf_fail:
282 kfree(private->rx_buffer); 298 dma_free_coherent(d, 8192, private->rx_buffer, private->rx_dma_handle);
283rx_buf_fail: 299rx_buf_fail:
284 free_netdev(dev); 300 free_netdev(dev);
285device_fail: 301err_release:
286 return -ENODEV; 302 pci_release_regions(pdev);
303err_disable:
304 pci_disable_device(pdev);
305 goto out;
287} 306}
288 307
289 308
@@ -297,25 +316,28 @@ static void __devexit xircom_remove(struct pci_dev *pdev)
297{ 316{
298 struct net_device *dev = pci_get_drvdata(pdev); 317 struct net_device *dev = pci_get_drvdata(pdev);
299 struct xircom_private *card = netdev_priv(dev); 318 struct xircom_private *card = netdev_priv(dev);
319 struct device *d = &pdev->dev;
300 320
301 pci_free_consistent(pdev,8192,card->rx_buffer,card->rx_dma_handle);
302 pci_free_consistent(pdev,8192,card->tx_buffer,card->tx_dma_handle);
303
304 release_region(dev->base_addr, 128);
305 unregister_netdev(dev); 321 unregister_netdev(dev);
306 free_netdev(dev); 322 pci_iounmap(pdev, card->ioaddr);
307 pci_set_drvdata(pdev, NULL); 323 pci_set_drvdata(pdev, NULL);
324 dma_free_coherent(d, 8192, card->tx_buffer, card->tx_dma_handle);
325 dma_free_coherent(d, 8192, card->rx_buffer, card->rx_dma_handle);
326 free_netdev(dev);
327 pci_release_regions(pdev);
328 pci_disable_device(pdev);
308} 329}
309 330
310static irqreturn_t xircom_interrupt(int irq, void *dev_instance) 331static irqreturn_t xircom_interrupt(int irq, void *dev_instance)
311{ 332{
312 struct net_device *dev = (struct net_device *) dev_instance; 333 struct net_device *dev = (struct net_device *) dev_instance;
313 struct xircom_private *card = netdev_priv(dev); 334 struct xircom_private *card = netdev_priv(dev);
335 void __iomem *ioaddr = card->ioaddr;
314 unsigned int status; 336 unsigned int status;
315 int i; 337 int i;
316 338
317 spin_lock(&card->lock); 339 spin_lock(&card->lock);
318 status = inl(card->io_port+CSR5); 340 status = xr32(CSR5);
319 341
320#if defined DEBUG && DEBUG > 1 342#if defined DEBUG && DEBUG > 1
321 print_binary(status); 343 print_binary(status);
@@ -345,7 +367,7 @@ static irqreturn_t xircom_interrupt(int irq, void *dev_instance)
345 /* Clear all remaining interrupts */ 367 /* Clear all remaining interrupts */
346 status |= 0xffffffff; /* FIXME: make this clear only the 368 status |= 0xffffffff; /* FIXME: make this clear only the
347 real existing bits */ 369 real existing bits */
348 outl(status,card->io_port+CSR5); 370 xw32(CSR5, status);
349 371
350 372
351 for (i=0;i<NUMDESCRIPTORS;i++) 373 for (i=0;i<NUMDESCRIPTORS;i++)
@@ -423,11 +445,11 @@ static netdev_tx_t xircom_start_xmit(struct sk_buff *skb,
423static int xircom_open(struct net_device *dev) 445static int xircom_open(struct net_device *dev)
424{ 446{
425 struct xircom_private *xp = netdev_priv(dev); 447 struct xircom_private *xp = netdev_priv(dev);
448 const int irq = xp->pdev->irq;
426 int retval; 449 int retval;
427 450
428 netdev_info(dev, "xircom cardbus adaptor found, using irq %i\n", 451 netdev_info(dev, "xircom cardbus adaptor found, using irq %i\n", irq);
429 dev->irq); 452 retval = request_irq(irq, xircom_interrupt, IRQF_SHARED, dev->name, dev);
430 retval = request_irq(dev->irq, xircom_interrupt, IRQF_SHARED, dev->name, dev);
431 if (retval) 453 if (retval)
432 return retval; 454 return retval;
433 455
@@ -459,7 +481,7 @@ static int xircom_close(struct net_device *dev)
459 spin_unlock_irqrestore(&card->lock,flags); 481 spin_unlock_irqrestore(&card->lock,flags);
460 482
461 card->open = 0; 483 card->open = 0;
462 free_irq(dev->irq,dev); 484 free_irq(card->pdev->irq, dev);
463 485
464 return 0; 486 return 0;
465 487
@@ -469,35 +491,39 @@ static int xircom_close(struct net_device *dev)
469#ifdef CONFIG_NET_POLL_CONTROLLER 491#ifdef CONFIG_NET_POLL_CONTROLLER
470static void xircom_poll_controller(struct net_device *dev) 492static void xircom_poll_controller(struct net_device *dev)
471{ 493{
472 disable_irq(dev->irq); 494 struct xircom_private *xp = netdev_priv(dev);
473 xircom_interrupt(dev->irq, dev); 495 const int irq = xp->pdev->irq;
474 enable_irq(dev->irq); 496
497 disable_irq(irq);
498 xircom_interrupt(irq, dev);
499 enable_irq(irq);
475} 500}
476#endif 501#endif
477 502
478 503
479static void initialize_card(struct xircom_private *card) 504static void initialize_card(struct xircom_private *card)
480{ 505{
481 unsigned int val; 506 void __iomem *ioaddr = card->ioaddr;
482 unsigned long flags; 507 unsigned long flags;
508 u32 val;
483 509
484 spin_lock_irqsave(&card->lock, flags); 510 spin_lock_irqsave(&card->lock, flags);
485 511
486 /* First: reset the card */ 512 /* First: reset the card */
487 val = inl(card->io_port + CSR0); 513 val = xr32(CSR0);
488 val |= 0x01; /* Software reset */ 514 val |= 0x01; /* Software reset */
489 outl(val, card->io_port + CSR0); 515 xw32(CSR0, val);
490 516
491 udelay(100); /* give the card some time to reset */ 517 udelay(100); /* give the card some time to reset */
492 518
493 val = inl(card->io_port + CSR0); 519 val = xr32(CSR0);
494 val &= ~0x01; /* disable Software reset */ 520 val &= ~0x01; /* disable Software reset */
495 outl(val, card->io_port + CSR0); 521 xw32(CSR0, val);
496 522
497 523
498 val = 0; /* Value 0x00 is a safe and conservative value 524 val = 0; /* Value 0x00 is a safe and conservative value
499 for the PCI configuration settings */ 525 for the PCI configuration settings */
500 outl(val, card->io_port + CSR0); 526 xw32(CSR0, val);
501 527
502 528
503 disable_all_interrupts(card); 529 disable_all_interrupts(card);
@@ -515,10 +541,9 @@ ignored; I chose zero.
515*/ 541*/
516static void trigger_transmit(struct xircom_private *card) 542static void trigger_transmit(struct xircom_private *card)
517{ 543{
518 unsigned int val; 544 void __iomem *ioaddr = card->ioaddr;
519 545
520 val = 0; 546 xw32(CSR1, 0);
521 outl(val, card->io_port + CSR1);
522} 547}
523 548
524/* 549/*
@@ -530,10 +555,9 @@ ignored; I chose zero.
530*/ 555*/
531static void trigger_receive(struct xircom_private *card) 556static void trigger_receive(struct xircom_private *card)
532{ 557{
533 unsigned int val; 558 void __iomem *ioaddr = card->ioaddr;
534 559
535 val = 0; 560 xw32(CSR2, 0);
536 outl(val, card->io_port + CSR2);
537} 561}
538 562
539/* 563/*
@@ -542,6 +566,7 @@ descriptors and programs the addresses into the card.
542*/ 566*/
543static void setup_descriptors(struct xircom_private *card) 567static void setup_descriptors(struct xircom_private *card)
544{ 568{
569 void __iomem *ioaddr = card->ioaddr;
545 u32 address; 570 u32 address;
546 int i; 571 int i;
547 572
@@ -571,7 +596,7 @@ static void setup_descriptors(struct xircom_private *card)
571 wmb(); 596 wmb();
572 /* Write the receive descriptor ring address to the card */ 597 /* Write the receive descriptor ring address to the card */
573 address = card->rx_dma_handle; 598 address = card->rx_dma_handle;
574 outl(address, card->io_port + CSR3); /* Receive descr list address */ 599 xw32(CSR3, address); /* Receive descr list address */
575 600
576 601
577 /* transmit descriptors */ 602 /* transmit descriptors */
@@ -596,7 +621,7 @@ static void setup_descriptors(struct xircom_private *card)
596 wmb(); 621 wmb();
597 /* wite the transmit descriptor ring to the card */ 622 /* wite the transmit descriptor ring to the card */
598 address = card->tx_dma_handle; 623 address = card->tx_dma_handle;
599 outl(address, card->io_port + CSR4); /* xmit descr list address */ 624 xw32(CSR4, address); /* xmit descr list address */
600} 625}
601 626
602/* 627/*
@@ -605,11 +630,12 @@ valid by setting the address in the card to 0x00.
605*/ 630*/
606static void remove_descriptors(struct xircom_private *card) 631static void remove_descriptors(struct xircom_private *card)
607{ 632{
633 void __iomem *ioaddr = card->ioaddr;
608 unsigned int val; 634 unsigned int val;
609 635
610 val = 0; 636 val = 0;
611 outl(val, card->io_port + CSR3); /* Receive descriptor address */ 637 xw32(CSR3, val); /* Receive descriptor address */
612 outl(val, card->io_port + CSR4); /* Send descriptor address */ 638 xw32(CSR4, val); /* Send descriptor address */
613} 639}
614 640
615/* 641/*
@@ -620,17 +646,17 @@ This function also clears the status-bit.
620*/ 646*/
621static int link_status_changed(struct xircom_private *card) 647static int link_status_changed(struct xircom_private *card)
622{ 648{
649 void __iomem *ioaddr = card->ioaddr;
623 unsigned int val; 650 unsigned int val;
624 651
625 val = inl(card->io_port + CSR5); /* Status register */ 652 val = xr32(CSR5); /* Status register */
626 653 if (!(val & (1 << 27))) /* no change */
627 if ((val & (1 << 27)) == 0) /* no change */
628 return 0; 654 return 0;
629 655
630 /* clear the event by writing a 1 to the bit in the 656 /* clear the event by writing a 1 to the bit in the
631 status register. */ 657 status register. */
632 val = (1 << 27); 658 val = (1 << 27);
633 outl(val, card->io_port + CSR5); 659 xw32(CSR5, val);
634 660
635 return 1; 661 return 1;
636} 662}
@@ -642,11 +668,9 @@ in a non-stopped state.
642*/ 668*/
643static int transmit_active(struct xircom_private *card) 669static int transmit_active(struct xircom_private *card)
644{ 670{
645 unsigned int val; 671 void __iomem *ioaddr = card->ioaddr;
646
647 val = inl(card->io_port + CSR5); /* Status register */
648 672
649 if ((val & (7 << 20)) == 0) /* transmitter disabled */ 673 if (!(xr32(CSR5) & (7 << 20))) /* transmitter disabled */
650 return 0; 674 return 0;
651 675
652 return 1; 676 return 1;
@@ -658,11 +682,9 @@ in a non-stopped state.
658*/ 682*/
659static int receive_active(struct xircom_private *card) 683static int receive_active(struct xircom_private *card)
660{ 684{
661 unsigned int val; 685 void __iomem *ioaddr = card->ioaddr;
662
663 val = inl(card->io_port + CSR5); /* Status register */
664 686
665 if ((val & (7 << 17)) == 0) /* receiver disabled */ 687 if (!(xr32(CSR5) & (7 << 17))) /* receiver disabled */
666 return 0; 688 return 0;
667 689
668 return 1; 690 return 1;
@@ -680,10 +702,11 @@ must be called with the lock held and interrupts disabled.
680*/ 702*/
681static void activate_receiver(struct xircom_private *card) 703static void activate_receiver(struct xircom_private *card)
682{ 704{
705 void __iomem *ioaddr = card->ioaddr;
683 unsigned int val; 706 unsigned int val;
684 int counter; 707 int counter;
685 708
686 val = inl(card->io_port + CSR6); /* Operation mode */ 709 val = xr32(CSR6); /* Operation mode */
687 710
688 /* If the "active" bit is set and the receiver is already 711 /* If the "active" bit is set and the receiver is already
689 active, no need to do the expensive thing */ 712 active, no need to do the expensive thing */
@@ -692,7 +715,7 @@ static void activate_receiver(struct xircom_private *card)
692 715
693 716
694 val = val & ~2; /* disable the receiver */ 717 val = val & ~2; /* disable the receiver */
695 outl(val, card->io_port + CSR6); 718 xw32(CSR6, val);
696 719
697 counter = 10; 720 counter = 10;
698 while (counter > 0) { 721 while (counter > 0) {
@@ -706,9 +729,9 @@ static void activate_receiver(struct xircom_private *card)
706 } 729 }
707 730
708 /* enable the receiver */ 731 /* enable the receiver */
709 val = inl(card->io_port + CSR6); /* Operation mode */ 732 val = xr32(CSR6); /* Operation mode */
710 val = val | 2; /* enable the receiver */ 733 val = val | 2; /* enable the receiver */
711 outl(val, card->io_port + CSR6); 734 xw32(CSR6, val);
712 735
713 /* now wait for the card to activate again */ 736 /* now wait for the card to activate again */
714 counter = 10; 737 counter = 10;
@@ -733,12 +756,13 @@ must be called with the lock held and interrupts disabled.
733*/ 756*/
734static void deactivate_receiver(struct xircom_private *card) 757static void deactivate_receiver(struct xircom_private *card)
735{ 758{
759 void __iomem *ioaddr = card->ioaddr;
736 unsigned int val; 760 unsigned int val;
737 int counter; 761 int counter;
738 762
739 val = inl(card->io_port + CSR6); /* Operation mode */ 763 val = xr32(CSR6); /* Operation mode */
740 val = val & ~2; /* disable the receiver */ 764 val = val & ~2; /* disable the receiver */
741 outl(val, card->io_port + CSR6); 765 xw32(CSR6, val);
742 766
743 counter = 10; 767 counter = 10;
744 while (counter > 0) { 768 while (counter > 0) {
@@ -765,10 +789,11 @@ must be called with the lock held and interrupts disabled.
765*/ 789*/
766static void activate_transmitter(struct xircom_private *card) 790static void activate_transmitter(struct xircom_private *card)
767{ 791{
792 void __iomem *ioaddr = card->ioaddr;
768 unsigned int val; 793 unsigned int val;
769 int counter; 794 int counter;
770 795
771 val = inl(card->io_port + CSR6); /* Operation mode */ 796 val = xr32(CSR6); /* Operation mode */
772 797
773 /* If the "active" bit is set and the receiver is already 798 /* If the "active" bit is set and the receiver is already
774 active, no need to do the expensive thing */ 799 active, no need to do the expensive thing */
@@ -776,7 +801,7 @@ static void activate_transmitter(struct xircom_private *card)
776 return; 801 return;
777 802
778 val = val & ~(1 << 13); /* disable the transmitter */ 803 val = val & ~(1 << 13); /* disable the transmitter */
779 outl(val, card->io_port + CSR6); 804 xw32(CSR6, val);
780 805
781 counter = 10; 806 counter = 10;
782 while (counter > 0) { 807 while (counter > 0) {
@@ -791,9 +816,9 @@ static void activate_transmitter(struct xircom_private *card)
791 } 816 }
792 817
793 /* enable the transmitter */ 818 /* enable the transmitter */
794 val = inl(card->io_port + CSR6); /* Operation mode */ 819 val = xr32(CSR6); /* Operation mode */
795 val = val | (1 << 13); /* enable the transmitter */ 820 val = val | (1 << 13); /* enable the transmitter */
796 outl(val, card->io_port + CSR6); 821 xw32(CSR6, val);
797 822
798 /* now wait for the card to activate again */ 823 /* now wait for the card to activate again */
799 counter = 10; 824 counter = 10;
@@ -818,12 +843,13 @@ must be called with the lock held and interrupts disabled.
818*/ 843*/
819static void deactivate_transmitter(struct xircom_private *card) 844static void deactivate_transmitter(struct xircom_private *card)
820{ 845{
846 void __iomem *ioaddr = card->ioaddr;
821 unsigned int val; 847 unsigned int val;
822 int counter; 848 int counter;
823 849
824 val = inl(card->io_port + CSR6); /* Operation mode */ 850 val = xr32(CSR6); /* Operation mode */
825 val = val & ~2; /* disable the transmitter */ 851 val = val & ~2; /* disable the transmitter */
826 outl(val, card->io_port + CSR6); 852 xw32(CSR6, val);
827 853
828 counter = 20; 854 counter = 20;
829 while (counter > 0) { 855 while (counter > 0) {
@@ -846,11 +872,12 @@ must be called with the lock held and interrupts disabled.
846*/ 872*/
847static void enable_transmit_interrupt(struct xircom_private *card) 873static void enable_transmit_interrupt(struct xircom_private *card)
848{ 874{
875 void __iomem *ioaddr = card->ioaddr;
849 unsigned int val; 876 unsigned int val;
850 877
851 val = inl(card->io_port + CSR7); /* Interrupt enable register */ 878 val = xr32(CSR7); /* Interrupt enable register */
852 val |= 1; /* enable the transmit interrupt */ 879 val |= 1; /* enable the transmit interrupt */
853 outl(val, card->io_port + CSR7); 880 xw32(CSR7, val);
854} 881}
855 882
856 883
@@ -861,11 +888,12 @@ must be called with the lock held and interrupts disabled.
861*/ 888*/
862static void enable_receive_interrupt(struct xircom_private *card) 889static void enable_receive_interrupt(struct xircom_private *card)
863{ 890{
891 void __iomem *ioaddr = card->ioaddr;
864 unsigned int val; 892 unsigned int val;
865 893
866 val = inl(card->io_port + CSR7); /* Interrupt enable register */ 894 val = xr32(CSR7); /* Interrupt enable register */
867 val = val | (1 << 6); /* enable the receive interrupt */ 895 val = val | (1 << 6); /* enable the receive interrupt */
868 outl(val, card->io_port + CSR7); 896 xw32(CSR7, val);
869} 897}
870 898
871/* 899/*
@@ -875,11 +903,12 @@ must be called with the lock held and interrupts disabled.
875*/ 903*/
876static void enable_link_interrupt(struct xircom_private *card) 904static void enable_link_interrupt(struct xircom_private *card)
877{ 905{
906 void __iomem *ioaddr = card->ioaddr;
878 unsigned int val; 907 unsigned int val;
879 908
880 val = inl(card->io_port + CSR7); /* Interrupt enable register */ 909 val = xr32(CSR7); /* Interrupt enable register */
881 val = val | (1 << 27); /* enable the link status chage interrupt */ 910 val = val | (1 << 27); /* enable the link status chage interrupt */
882 outl(val, card->io_port + CSR7); 911 xw32(CSR7, val);
883} 912}
884 913
885 914
@@ -891,10 +920,9 @@ must be called with the lock held and interrupts disabled.
891*/ 920*/
892static void disable_all_interrupts(struct xircom_private *card) 921static void disable_all_interrupts(struct xircom_private *card)
893{ 922{
894 unsigned int val; 923 void __iomem *ioaddr = card->ioaddr;
895 924
896 val = 0; /* disable all interrupts */ 925 xw32(CSR7, 0);
897 outl(val, card->io_port + CSR7);
898} 926}
899 927
900/* 928/*
@@ -904,9 +932,10 @@ must be called with the lock held and interrupts disabled.
904*/ 932*/
905static void enable_common_interrupts(struct xircom_private *card) 933static void enable_common_interrupts(struct xircom_private *card)
906{ 934{
935 void __iomem *ioaddr = card->ioaddr;
907 unsigned int val; 936 unsigned int val;
908 937
909 val = inl(card->io_port + CSR7); /* Interrupt enable register */ 938 val = xr32(CSR7); /* Interrupt enable register */
910 val |= (1<<16); /* Normal Interrupt Summary */ 939 val |= (1<<16); /* Normal Interrupt Summary */
911 val |= (1<<15); /* Abnormal Interrupt Summary */ 940 val |= (1<<15); /* Abnormal Interrupt Summary */
912 val |= (1<<13); /* Fatal bus error */ 941 val |= (1<<13); /* Fatal bus error */
@@ -915,7 +944,7 @@ static void enable_common_interrupts(struct xircom_private *card)
915 val |= (1<<5); /* Transmit Underflow */ 944 val |= (1<<5); /* Transmit Underflow */
916 val |= (1<<2); /* Transmit Buffer Unavailable */ 945 val |= (1<<2); /* Transmit Buffer Unavailable */
917 val |= (1<<1); /* Transmit Process Stopped */ 946 val |= (1<<1); /* Transmit Process Stopped */
918 outl(val, card->io_port + CSR7); 947 xw32(CSR7, val);
919} 948}
920 949
921/* 950/*
@@ -925,11 +954,12 @@ must be called with the lock held and interrupts disabled.
925*/ 954*/
926static int enable_promisc(struct xircom_private *card) 955static int enable_promisc(struct xircom_private *card)
927{ 956{
957 void __iomem *ioaddr = card->ioaddr;
928 unsigned int val; 958 unsigned int val;
929 959
930 val = inl(card->io_port + CSR6); 960 val = xr32(CSR6);
931 val = val | (1 << 6); 961 val = val | (1 << 6);
932 outl(val, card->io_port + CSR6); 962 xw32(CSR6, val);
933 963
934 return 1; 964 return 1;
935} 965}
@@ -944,13 +974,16 @@ Must be called in locked state with interrupts disabled
944*/ 974*/
945static int link_status(struct xircom_private *card) 975static int link_status(struct xircom_private *card)
946{ 976{
947 unsigned int val; 977 void __iomem *ioaddr = card->ioaddr;
978 u8 val;
948 979
949 val = inb(card->io_port + CSR12); 980 val = xr8(CSR12);
950 981
951 if (!(val&(1<<2))) /* bit 2 is 0 for 10mbit link, 1 for not an 10mbit link */ 982 /* bit 2 is 0 for 10mbit link, 1 for not an 10mbit link */
983 if (!(val & (1 << 2)))
952 return 10; 984 return 10;
953 if (!(val&(1<<1))) /* bit 1 is 0 for 100mbit link, 1 for not an 100mbit link */ 985 /* bit 1 is 0 for 100mbit link, 1 for not an 100mbit link */
986 if (!(val & (1 << 1)))
954 return 100; 987 return 100;
955 988
956 /* If we get here -> no link at all */ 989 /* If we get here -> no link at all */
@@ -969,29 +1002,31 @@ static int link_status(struct xircom_private *card)
969 */ 1002 */
970static void read_mac_address(struct xircom_private *card) 1003static void read_mac_address(struct xircom_private *card)
971{ 1004{
972 unsigned char j, tuple, link, data_id, data_count; 1005 void __iomem *ioaddr = card->ioaddr;
973 unsigned long flags; 1006 unsigned long flags;
1007 u8 link;
974 int i; 1008 int i;
975 1009
976 spin_lock_irqsave(&card->lock, flags); 1010 spin_lock_irqsave(&card->lock, flags);
977 1011
978 outl(1 << 12, card->io_port + CSR9); /* enable boot rom access */ 1012 xw32(CSR9, 1 << 12); /* enable boot rom access */
979 for (i = 0x100; i < 0x1f7; i += link + 2) { 1013 for (i = 0x100; i < 0x1f7; i += link + 2) {
980 outl(i, card->io_port + CSR10); 1014 u8 tuple, data_id, data_count;
981 tuple = inl(card->io_port + CSR9) & 0xff; 1015
982 outl(i + 1, card->io_port + CSR10); 1016 xw32(CSR10, i);
983 link = inl(card->io_port + CSR9) & 0xff; 1017 tuple = xr32(CSR9);
984 outl(i + 2, card->io_port + CSR10); 1018 xw32(CSR10, i + 1);
985 data_id = inl(card->io_port + CSR9) & 0xff; 1019 link = xr32(CSR9);
986 outl(i + 3, card->io_port + CSR10); 1020 xw32(CSR10, i + 2);
987 data_count = inl(card->io_port + CSR9) & 0xff; 1021 data_id = xr32(CSR9);
1022 xw32(CSR10, i + 3);
1023 data_count = xr32(CSR9);
988 if ((tuple == 0x22) && (data_id == 0x04) && (data_count == 0x06)) { 1024 if ((tuple == 0x22) && (data_id == 0x04) && (data_count == 0x06)) {
989 /* 1025 int j;
990 * This is it. We have the data we want. 1026
991 */
992 for (j = 0; j < 6; j++) { 1027 for (j = 0; j < 6; j++) {
993 outl(i + j + 4, card->io_port + CSR10); 1028 xw32(CSR10, i + j + 4);
994 card->dev->dev_addr[j] = inl(card->io_port + CSR9) & 0xff; 1029 card->dev->dev_addr[j] = xr32(CSR9) & 0xff;
995 } 1030 }
996 break; 1031 break;
997 } else if (link == 0) { 1032 } else if (link == 0) {
@@ -1010,6 +1045,7 @@ static void read_mac_address(struct xircom_private *card)
1010 */ 1045 */
1011static void transceiver_voodoo(struct xircom_private *card) 1046static void transceiver_voodoo(struct xircom_private *card)
1012{ 1047{
1048 void __iomem *ioaddr = card->ioaddr;
1013 unsigned long flags; 1049 unsigned long flags;
1014 1050
1015 /* disable all powermanagement */ 1051 /* disable all powermanagement */
@@ -1019,14 +1055,14 @@ static void transceiver_voodoo(struct xircom_private *card)
1019 1055
1020 spin_lock_irqsave(&card->lock, flags); 1056 spin_lock_irqsave(&card->lock, flags);
1021 1057
1022 outl(0x0008, card->io_port + CSR15); 1058 xw32(CSR15, 0x0008);
1023 udelay(25); 1059 udelay(25);
1024 outl(0xa8050000, card->io_port + CSR15); 1060 xw32(CSR15, 0xa8050000);
1025 udelay(25); 1061 udelay(25);
1026 outl(0xa00f0000, card->io_port + CSR15); 1062 xw32(CSR15, 0xa00f0000);
1027 udelay(25); 1063 udelay(25);
1028 1064
1029 spin_unlock_irqrestore(&card->lock, flags); 1065 spin_unlock_irqrestore(&card->lock, flags);
1030 1066
1031 netif_start_queue(card->dev); 1067 netif_start_queue(card->dev);
1032} 1068}
diff --git a/drivers/net/ethernet/dlink/dl2k.c b/drivers/net/ethernet/dlink/dl2k.c
index b2dc2c81a147..ef4499d2ee4b 100644
--- a/drivers/net/ethernet/dlink/dl2k.c
+++ b/drivers/net/ethernet/dlink/dl2k.c
@@ -16,6 +16,13 @@
16#include "dl2k.h" 16#include "dl2k.h"
17#include <linux/dma-mapping.h> 17#include <linux/dma-mapping.h>
18 18
19#define dw32(reg, val) iowrite32(val, ioaddr + (reg))
20#define dw16(reg, val) iowrite16(val, ioaddr + (reg))
21#define dw8(reg, val) iowrite8(val, ioaddr + (reg))
22#define dr32(reg) ioread32(ioaddr + (reg))
23#define dr16(reg) ioread16(ioaddr + (reg))
24#define dr8(reg) ioread8(ioaddr + (reg))
25
19static char version[] __devinitdata = 26static char version[] __devinitdata =
20 KERN_INFO DRV_NAME " " DRV_VERSION " " DRV_RELDATE "\n"; 27 KERN_INFO DRV_NAME " " DRV_VERSION " " DRV_RELDATE "\n";
21#define MAX_UNITS 8 28#define MAX_UNITS 8
@@ -49,8 +56,13 @@ module_param(tx_coalesce, int, 0); /* HW xmit count each TxDMAComplete */
49/* Enable the default interrupts */ 56/* Enable the default interrupts */
50#define DEFAULT_INTR (RxDMAComplete | HostError | IntRequested | TxDMAComplete| \ 57#define DEFAULT_INTR (RxDMAComplete | HostError | IntRequested | TxDMAComplete| \
51 UpdateStats | LinkEvent) 58 UpdateStats | LinkEvent)
52#define EnableInt() \ 59
53writew(DEFAULT_INTR, ioaddr + IntEnable) 60static void dl2k_enable_int(struct netdev_private *np)
61{
62 void __iomem *ioaddr = np->ioaddr;
63
64 dw16(IntEnable, DEFAULT_INTR);
65}
54 66
55static const int max_intrloop = 50; 67static const int max_intrloop = 50;
56static const int multicast_filter_limit = 0x40; 68static const int multicast_filter_limit = 0x40;
@@ -73,7 +85,7 @@ static int rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);
73static int rio_close (struct net_device *dev); 85static int rio_close (struct net_device *dev);
74static int find_miiphy (struct net_device *dev); 86static int find_miiphy (struct net_device *dev);
75static int parse_eeprom (struct net_device *dev); 87static int parse_eeprom (struct net_device *dev);
76static int read_eeprom (long ioaddr, int eep_addr); 88static int read_eeprom (struct netdev_private *, int eep_addr);
77static int mii_wait_link (struct net_device *dev, int wait); 89static int mii_wait_link (struct net_device *dev, int wait);
78static int mii_set_media (struct net_device *dev); 90static int mii_set_media (struct net_device *dev);
79static int mii_get_media (struct net_device *dev); 91static int mii_get_media (struct net_device *dev);
@@ -106,7 +118,7 @@ rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)
106 static int card_idx; 118 static int card_idx;
107 int chip_idx = ent->driver_data; 119 int chip_idx = ent->driver_data;
108 int err, irq; 120 int err, irq;
109 long ioaddr; 121 void __iomem *ioaddr;
110 static int version_printed; 122 static int version_printed;
111 void *ring_space; 123 void *ring_space;
112 dma_addr_t ring_dma; 124 dma_addr_t ring_dma;
@@ -124,26 +136,29 @@ rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)
124 goto err_out_disable; 136 goto err_out_disable;
125 137
126 pci_set_master (pdev); 138 pci_set_master (pdev);
139
140 err = -ENOMEM;
141
127 dev = alloc_etherdev (sizeof (*np)); 142 dev = alloc_etherdev (sizeof (*np));
128 if (!dev) { 143 if (!dev)
129 err = -ENOMEM;
130 goto err_out_res; 144 goto err_out_res;
131 }
132 SET_NETDEV_DEV(dev, &pdev->dev); 145 SET_NETDEV_DEV(dev, &pdev->dev);
133 146
134#ifdef MEM_MAPPING 147 np = netdev_priv(dev);
135 ioaddr = pci_resource_start (pdev, 1); 148
136 ioaddr = (long) ioremap (ioaddr, RIO_IO_SIZE); 149 /* IO registers range. */
137 if (!ioaddr) { 150 ioaddr = pci_iomap(pdev, 0, 0);
138 err = -ENOMEM; 151 if (!ioaddr)
139 goto err_out_dev; 152 goto err_out_dev;
140 } 153 np->eeprom_addr = ioaddr;
141#else 154
142 ioaddr = pci_resource_start (pdev, 0); 155#ifdef MEM_MAPPING
156 /* MM registers range. */
157 ioaddr = pci_iomap(pdev, 1, 0);
158 if (!ioaddr)
159 goto err_out_iounmap;
143#endif 160#endif
144 dev->base_addr = ioaddr; 161 np->ioaddr = ioaddr;
145 dev->irq = irq;
146 np = netdev_priv(dev);
147 np->chip_id = chip_idx; 162 np->chip_id = chip_idx;
148 np->pdev = pdev; 163 np->pdev = pdev;
149 spin_lock_init (&np->tx_lock); 164 spin_lock_init (&np->tx_lock);
@@ -239,7 +254,7 @@ rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)
239 goto err_out_unmap_rx; 254 goto err_out_unmap_rx;
240 255
241 /* Fiber device? */ 256 /* Fiber device? */
242 np->phy_media = (readw(ioaddr + ASICCtrl) & PhyMedia) ? 1 : 0; 257 np->phy_media = (dr16(ASICCtrl) & PhyMedia) ? 1 : 0;
243 np->link_status = 0; 258 np->link_status = 0;
244 /* Set media and reset PHY */ 259 /* Set media and reset PHY */
245 if (np->phy_media) { 260 if (np->phy_media) {
@@ -276,22 +291,20 @@ rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)
276 printk(KERN_INFO "vlan(id):\t%d\n", np->vlan); 291 printk(KERN_INFO "vlan(id):\t%d\n", np->vlan);
277 return 0; 292 return 0;
278 293
279 err_out_unmap_rx: 294err_out_unmap_rx:
280 pci_free_consistent (pdev, RX_TOTAL_SIZE, np->rx_ring, np->rx_ring_dma); 295 pci_free_consistent (pdev, RX_TOTAL_SIZE, np->rx_ring, np->rx_ring_dma);
281 err_out_unmap_tx: 296err_out_unmap_tx:
282 pci_free_consistent (pdev, TX_TOTAL_SIZE, np->tx_ring, np->tx_ring_dma); 297 pci_free_consistent (pdev, TX_TOTAL_SIZE, np->tx_ring, np->tx_ring_dma);
283 err_out_iounmap: 298err_out_iounmap:
284#ifdef MEM_MAPPING 299#ifdef MEM_MAPPING
285 iounmap ((void *) ioaddr); 300 pci_iounmap(pdev, np->ioaddr);
286
287 err_out_dev:
288#endif 301#endif
302 pci_iounmap(pdev, np->eeprom_addr);
303err_out_dev:
289 free_netdev (dev); 304 free_netdev (dev);
290 305err_out_res:
291 err_out_res:
292 pci_release_regions (pdev); 306 pci_release_regions (pdev);
293 307err_out_disable:
294 err_out_disable:
295 pci_disable_device (pdev); 308 pci_disable_device (pdev);
296 return err; 309 return err;
297} 310}
@@ -299,11 +312,9 @@ rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)
299static int 312static int
300find_miiphy (struct net_device *dev) 313find_miiphy (struct net_device *dev)
301{ 314{
315 struct netdev_private *np = netdev_priv(dev);
302 int i, phy_found = 0; 316 int i, phy_found = 0;
303 struct netdev_private *np;
304 long ioaddr;
305 np = netdev_priv(dev); 317 np = netdev_priv(dev);
306 ioaddr = dev->base_addr;
307 np->phy_addr = 1; 318 np->phy_addr = 1;
308 319
309 for (i = 31; i >= 0; i--) { 320 for (i = 31; i >= 0; i--) {
@@ -323,26 +334,19 @@ find_miiphy (struct net_device *dev)
323static int 334static int
324parse_eeprom (struct net_device *dev) 335parse_eeprom (struct net_device *dev)
325{ 336{
337 struct netdev_private *np = netdev_priv(dev);
338 void __iomem *ioaddr = np->ioaddr;
326 int i, j; 339 int i, j;
327 long ioaddr = dev->base_addr;
328 u8 sromdata[256]; 340 u8 sromdata[256];
329 u8 *psib; 341 u8 *psib;
330 u32 crc; 342 u32 crc;
331 PSROM_t psrom = (PSROM_t) sromdata; 343 PSROM_t psrom = (PSROM_t) sromdata;
332 struct netdev_private *np = netdev_priv(dev);
333 344
334 int cid, next; 345 int cid, next;
335 346
336#ifdef MEM_MAPPING 347 for (i = 0; i < 128; i++)
337 ioaddr = pci_resource_start (np->pdev, 0); 348 ((__le16 *) sromdata)[i] = cpu_to_le16(read_eeprom(np, i));
338#endif 349
339 /* Read eeprom */
340 for (i = 0; i < 128; i++) {
341 ((__le16 *) sromdata)[i] = cpu_to_le16(read_eeprom (ioaddr, i));
342 }
343#ifdef MEM_MAPPING
344 ioaddr = dev->base_addr;
345#endif
346 if (np->pdev->vendor == PCI_VENDOR_ID_DLINK) { /* D-Link Only */ 350 if (np->pdev->vendor == PCI_VENDOR_ID_DLINK) { /* D-Link Only */
347 /* Check CRC */ 351 /* Check CRC */
348 crc = ~ether_crc_le (256 - 4, sromdata); 352 crc = ~ether_crc_le (256 - 4, sromdata);
@@ -378,8 +382,7 @@ parse_eeprom (struct net_device *dev)
378 return 0; 382 return 0;
379 case 2: /* Duplex Polarity */ 383 case 2: /* Duplex Polarity */
380 np->duplex_polarity = psib[i]; 384 np->duplex_polarity = psib[i];
381 writeb (readb (ioaddr + PhyCtrl) | psib[i], 385 dw8(PhyCtrl, dr8(PhyCtrl) | psib[i]);
382 ioaddr + PhyCtrl);
383 break; 386 break;
384 case 3: /* Wake Polarity */ 387 case 3: /* Wake Polarity */
385 np->wake_polarity = psib[i]; 388 np->wake_polarity = psib[i];
@@ -407,59 +410,57 @@ static int
407rio_open (struct net_device *dev) 410rio_open (struct net_device *dev)
408{ 411{
409 struct netdev_private *np = netdev_priv(dev); 412 struct netdev_private *np = netdev_priv(dev);
410 long ioaddr = dev->base_addr; 413 void __iomem *ioaddr = np->ioaddr;
414 const int irq = np->pdev->irq;
411 int i; 415 int i;
412 u16 macctrl; 416 u16 macctrl;
413 417
414 i = request_irq (dev->irq, rio_interrupt, IRQF_SHARED, dev->name, dev); 418 i = request_irq(irq, rio_interrupt, IRQF_SHARED, dev->name, dev);
415 if (i) 419 if (i)
416 return i; 420 return i;
417 421
418 /* Reset all logic functions */ 422 /* Reset all logic functions */
419 writew (GlobalReset | DMAReset | FIFOReset | NetworkReset | HostReset, 423 dw16(ASICCtrl + 2,
420 ioaddr + ASICCtrl + 2); 424 GlobalReset | DMAReset | FIFOReset | NetworkReset | HostReset);
421 mdelay(10); 425 mdelay(10);
422 426
423 /* DebugCtrl bit 4, 5, 9 must set */ 427 /* DebugCtrl bit 4, 5, 9 must set */
424 writel (readl (ioaddr + DebugCtrl) | 0x0230, ioaddr + DebugCtrl); 428 dw32(DebugCtrl, dr32(DebugCtrl) | 0x0230);
425 429
426 /* Jumbo frame */ 430 /* Jumbo frame */
427 if (np->jumbo != 0) 431 if (np->jumbo != 0)
428 writew (MAX_JUMBO+14, ioaddr + MaxFrameSize); 432 dw16(MaxFrameSize, MAX_JUMBO+14);
429 433
430 alloc_list (dev); 434 alloc_list (dev);
431 435
432 /* Get station address */ 436 /* Get station address */
433 for (i = 0; i < 6; i++) 437 for (i = 0; i < 6; i++)
434 writeb (dev->dev_addr[i], ioaddr + StationAddr0 + i); 438 dw8(StationAddr0 + i, dev->dev_addr[i]);
435 439
436 set_multicast (dev); 440 set_multicast (dev);
437 if (np->coalesce) { 441 if (np->coalesce) {
438 writel (np->rx_coalesce | np->rx_timeout << 16, 442 dw32(RxDMAIntCtrl, np->rx_coalesce | np->rx_timeout << 16);
439 ioaddr + RxDMAIntCtrl);
440 } 443 }
441 /* Set RIO to poll every N*320nsec. */ 444 /* Set RIO to poll every N*320nsec. */
442 writeb (0x20, ioaddr + RxDMAPollPeriod); 445 dw8(RxDMAPollPeriod, 0x20);
443 writeb (0xff, ioaddr + TxDMAPollPeriod); 446 dw8(TxDMAPollPeriod, 0xff);
444 writeb (0x30, ioaddr + RxDMABurstThresh); 447 dw8(RxDMABurstThresh, 0x30);
445 writeb (0x30, ioaddr + RxDMAUrgentThresh); 448 dw8(RxDMAUrgentThresh, 0x30);
446 writel (0x0007ffff, ioaddr + RmonStatMask); 449 dw32(RmonStatMask, 0x0007ffff);
447 /* clear statistics */ 450 /* clear statistics */
448 clear_stats (dev); 451 clear_stats (dev);
449 452
450 /* VLAN supported */ 453 /* VLAN supported */
451 if (np->vlan) { 454 if (np->vlan) {
452 /* priority field in RxDMAIntCtrl */ 455 /* priority field in RxDMAIntCtrl */
453 writel (readl(ioaddr + RxDMAIntCtrl) | 0x7 << 10, 456 dw32(RxDMAIntCtrl, dr32(RxDMAIntCtrl) | 0x7 << 10);
454 ioaddr + RxDMAIntCtrl);
455 /* VLANId */ 457 /* VLANId */
456 writew (np->vlan, ioaddr + VLANId); 458 dw16(VLANId, np->vlan);
457 /* Length/Type should be 0x8100 */ 459 /* Length/Type should be 0x8100 */
458 writel (0x8100 << 16 | np->vlan, ioaddr + VLANTag); 460 dw32(VLANTag, 0x8100 << 16 | np->vlan);
459 /* Enable AutoVLANuntagging, but disable AutoVLANtagging. 461 /* Enable AutoVLANuntagging, but disable AutoVLANtagging.
460 VLAN information tagged by TFC' VID, CFI fields. */ 462 VLAN information tagged by TFC' VID, CFI fields. */
461 writel (readl (ioaddr + MACCtrl) | AutoVLANuntagging, 463 dw32(MACCtrl, dr32(MACCtrl) | AutoVLANuntagging);
462 ioaddr + MACCtrl);
463 } 464 }
464 465
465 init_timer (&np->timer); 466 init_timer (&np->timer);
@@ -469,20 +470,18 @@ rio_open (struct net_device *dev)
469 add_timer (&np->timer); 470 add_timer (&np->timer);
470 471
471 /* Start Tx/Rx */ 472 /* Start Tx/Rx */
472 writel (readl (ioaddr + MACCtrl) | StatsEnable | RxEnable | TxEnable, 473 dw32(MACCtrl, dr32(MACCtrl) | StatsEnable | RxEnable | TxEnable);
473 ioaddr + MACCtrl);
474 474
475 macctrl = 0; 475 macctrl = 0;
476 macctrl |= (np->vlan) ? AutoVLANuntagging : 0; 476 macctrl |= (np->vlan) ? AutoVLANuntagging : 0;
477 macctrl |= (np->full_duplex) ? DuplexSelect : 0; 477 macctrl |= (np->full_duplex) ? DuplexSelect : 0;
478 macctrl |= (np->tx_flow) ? TxFlowControlEnable : 0; 478 macctrl |= (np->tx_flow) ? TxFlowControlEnable : 0;
479 macctrl |= (np->rx_flow) ? RxFlowControlEnable : 0; 479 macctrl |= (np->rx_flow) ? RxFlowControlEnable : 0;
480 writew(macctrl, ioaddr + MACCtrl); 480 dw16(MACCtrl, macctrl);
481 481
482 netif_start_queue (dev); 482 netif_start_queue (dev);
483 483
484 /* Enable default interrupts */ 484 dl2k_enable_int(np);
485 EnableInt ();
486 return 0; 485 return 0;
487} 486}
488 487
@@ -533,10 +532,11 @@ rio_timer (unsigned long data)
533static void 532static void
534rio_tx_timeout (struct net_device *dev) 533rio_tx_timeout (struct net_device *dev)
535{ 534{
536 long ioaddr = dev->base_addr; 535 struct netdev_private *np = netdev_priv(dev);
536 void __iomem *ioaddr = np->ioaddr;
537 537
538 printk (KERN_INFO "%s: Tx timed out (%4.4x), is buffer full?\n", 538 printk (KERN_INFO "%s: Tx timed out (%4.4x), is buffer full?\n",
539 dev->name, readl (ioaddr + TxStatus)); 539 dev->name, dr32(TxStatus));
540 rio_free_tx(dev, 0); 540 rio_free_tx(dev, 0);
541 dev->if_port = 0; 541 dev->if_port = 0;
542 dev->trans_start = jiffies; /* prevent tx timeout */ 542 dev->trans_start = jiffies; /* prevent tx timeout */
@@ -547,6 +547,7 @@ static void
547alloc_list (struct net_device *dev) 547alloc_list (struct net_device *dev)
548{ 548{
549 struct netdev_private *np = netdev_priv(dev); 549 struct netdev_private *np = netdev_priv(dev);
550 void __iomem *ioaddr = np->ioaddr;
550 int i; 551 int i;
551 552
552 np->cur_rx = np->cur_tx = 0; 553 np->cur_rx = np->cur_tx = 0;
@@ -594,24 +595,23 @@ alloc_list (struct net_device *dev)
594 } 595 }
595 596
596 /* Set RFDListPtr */ 597 /* Set RFDListPtr */
597 writel (np->rx_ring_dma, dev->base_addr + RFDListPtr0); 598 dw32(RFDListPtr0, np->rx_ring_dma);
598 writel (0, dev->base_addr + RFDListPtr1); 599 dw32(RFDListPtr1, 0);
599} 600}
600 601
601static netdev_tx_t 602static netdev_tx_t
602start_xmit (struct sk_buff *skb, struct net_device *dev) 603start_xmit (struct sk_buff *skb, struct net_device *dev)
603{ 604{
604 struct netdev_private *np = netdev_priv(dev); 605 struct netdev_private *np = netdev_priv(dev);
606 void __iomem *ioaddr = np->ioaddr;
605 struct netdev_desc *txdesc; 607 struct netdev_desc *txdesc;
606 unsigned entry; 608 unsigned entry;
607 u32 ioaddr;
608 u64 tfc_vlan_tag = 0; 609 u64 tfc_vlan_tag = 0;
609 610
610 if (np->link_status == 0) { /* Link Down */ 611 if (np->link_status == 0) { /* Link Down */
611 dev_kfree_skb(skb); 612 dev_kfree_skb(skb);
612 return NETDEV_TX_OK; 613 return NETDEV_TX_OK;
613 } 614 }
614 ioaddr = dev->base_addr;
615 entry = np->cur_tx % TX_RING_SIZE; 615 entry = np->cur_tx % TX_RING_SIZE;
616 np->tx_skbuff[entry] = skb; 616 np->tx_skbuff[entry] = skb;
617 txdesc = &np->tx_ring[entry]; 617 txdesc = &np->tx_ring[entry];
@@ -646,9 +646,9 @@ start_xmit (struct sk_buff *skb, struct net_device *dev)
646 (1 << FragCountShift)); 646 (1 << FragCountShift));
647 647
648 /* TxDMAPollNow */ 648 /* TxDMAPollNow */
649 writel (readl (ioaddr + DMACtrl) | 0x00001000, ioaddr + DMACtrl); 649 dw32(DMACtrl, dr32(DMACtrl) | 0x00001000);
650 /* Schedule ISR */ 650 /* Schedule ISR */
651 writel(10000, ioaddr + CountDown); 651 dw32(CountDown, 10000);
652 np->cur_tx = (np->cur_tx + 1) % TX_RING_SIZE; 652 np->cur_tx = (np->cur_tx + 1) % TX_RING_SIZE;
653 if ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE 653 if ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE
654 < TX_QUEUE_LEN - 1 && np->speed != 10) { 654 < TX_QUEUE_LEN - 1 && np->speed != 10) {
@@ -658,10 +658,10 @@ start_xmit (struct sk_buff *skb, struct net_device *dev)
658 } 658 }
659 659
660 /* The first TFDListPtr */ 660 /* The first TFDListPtr */
661 if (readl (dev->base_addr + TFDListPtr0) == 0) { 661 if (!dr32(TFDListPtr0)) {
662 writel (np->tx_ring_dma + entry * sizeof (struct netdev_desc), 662 dw32(TFDListPtr0, np->tx_ring_dma +
663 dev->base_addr + TFDListPtr0); 663 entry * sizeof (struct netdev_desc));
664 writel (0, dev->base_addr + TFDListPtr1); 664 dw32(TFDListPtr1, 0);
665 } 665 }
666 666
667 return NETDEV_TX_OK; 667 return NETDEV_TX_OK;
@@ -671,17 +671,15 @@ static irqreturn_t
671rio_interrupt (int irq, void *dev_instance) 671rio_interrupt (int irq, void *dev_instance)
672{ 672{
673 struct net_device *dev = dev_instance; 673 struct net_device *dev = dev_instance;
674 struct netdev_private *np; 674 struct netdev_private *np = netdev_priv(dev);
675 void __iomem *ioaddr = np->ioaddr;
675 unsigned int_status; 676 unsigned int_status;
676 long ioaddr;
677 int cnt = max_intrloop; 677 int cnt = max_intrloop;
678 int handled = 0; 678 int handled = 0;
679 679
680 ioaddr = dev->base_addr;
681 np = netdev_priv(dev);
682 while (1) { 680 while (1) {
683 int_status = readw (ioaddr + IntStatus); 681 int_status = dr16(IntStatus);
684 writew (int_status, ioaddr + IntStatus); 682 dw16(IntStatus, int_status);
685 int_status &= DEFAULT_INTR; 683 int_status &= DEFAULT_INTR;
686 if (int_status == 0 || --cnt < 0) 684 if (int_status == 0 || --cnt < 0)
687 break; 685 break;
@@ -692,7 +690,7 @@ rio_interrupt (int irq, void *dev_instance)
692 /* TxDMAComplete interrupt */ 690 /* TxDMAComplete interrupt */
693 if ((int_status & (TxDMAComplete|IntRequested))) { 691 if ((int_status & (TxDMAComplete|IntRequested))) {
694 int tx_status; 692 int tx_status;
695 tx_status = readl (ioaddr + TxStatus); 693 tx_status = dr32(TxStatus);
696 if (tx_status & 0x01) 694 if (tx_status & 0x01)
697 tx_error (dev, tx_status); 695 tx_error (dev, tx_status);
698 /* Free used tx skbuffs */ 696 /* Free used tx skbuffs */
@@ -705,7 +703,7 @@ rio_interrupt (int irq, void *dev_instance)
705 rio_error (dev, int_status); 703 rio_error (dev, int_status);
706 } 704 }
707 if (np->cur_tx != np->old_tx) 705 if (np->cur_tx != np->old_tx)
708 writel (100, ioaddr + CountDown); 706 dw32(CountDown, 100);
709 return IRQ_RETVAL(handled); 707 return IRQ_RETVAL(handled);
710} 708}
711 709
@@ -765,13 +763,11 @@ rio_free_tx (struct net_device *dev, int irq)
765static void 763static void
766tx_error (struct net_device *dev, int tx_status) 764tx_error (struct net_device *dev, int tx_status)
767{ 765{
768 struct netdev_private *np; 766 struct netdev_private *np = netdev_priv(dev);
769 long ioaddr = dev->base_addr; 767 void __iomem *ioaddr = np->ioaddr;
770 int frame_id; 768 int frame_id;
771 int i; 769 int i;
772 770
773 np = netdev_priv(dev);
774
775 frame_id = (tx_status & 0xffff0000); 771 frame_id = (tx_status & 0xffff0000);
776 printk (KERN_ERR "%s: Transmit error, TxStatus %4.4x, FrameId %d.\n", 772 printk (KERN_ERR "%s: Transmit error, TxStatus %4.4x, FrameId %d.\n",
777 dev->name, tx_status, frame_id); 773 dev->name, tx_status, frame_id);
@@ -779,23 +775,21 @@ tx_error (struct net_device *dev, int tx_status)
779 /* Ttransmit Underrun */ 775 /* Ttransmit Underrun */
780 if (tx_status & 0x10) { 776 if (tx_status & 0x10) {
781 np->stats.tx_fifo_errors++; 777 np->stats.tx_fifo_errors++;
782 writew (readw (ioaddr + TxStartThresh) + 0x10, 778 dw16(TxStartThresh, dr16(TxStartThresh) + 0x10);
783 ioaddr + TxStartThresh);
784 /* Transmit Underrun need to set TxReset, DMARest, FIFOReset */ 779 /* Transmit Underrun need to set TxReset, DMARest, FIFOReset */
785 writew (TxReset | DMAReset | FIFOReset | NetworkReset, 780 dw16(ASICCtrl + 2,
786 ioaddr + ASICCtrl + 2); 781 TxReset | DMAReset | FIFOReset | NetworkReset);
787 /* Wait for ResetBusy bit clear */ 782 /* Wait for ResetBusy bit clear */
788 for (i = 50; i > 0; i--) { 783 for (i = 50; i > 0; i--) {
789 if ((readw (ioaddr + ASICCtrl + 2) & ResetBusy) == 0) 784 if (!(dr16(ASICCtrl + 2) & ResetBusy))
790 break; 785 break;
791 mdelay (1); 786 mdelay (1);
792 } 787 }
793 rio_free_tx (dev, 1); 788 rio_free_tx (dev, 1);
794 /* Reset TFDListPtr */ 789 /* Reset TFDListPtr */
795 writel (np->tx_ring_dma + 790 dw32(TFDListPtr0, np->tx_ring_dma +
796 np->old_tx * sizeof (struct netdev_desc), 791 np->old_tx * sizeof (struct netdev_desc));
797 dev->base_addr + TFDListPtr0); 792 dw32(TFDListPtr1, 0);
798 writel (0, dev->base_addr + TFDListPtr1);
799 793
800 /* Let TxStartThresh stay default value */ 794 /* Let TxStartThresh stay default value */
801 } 795 }
@@ -803,10 +797,10 @@ tx_error (struct net_device *dev, int tx_status)
803 if (tx_status & 0x04) { 797 if (tx_status & 0x04) {
804 np->stats.tx_fifo_errors++; 798 np->stats.tx_fifo_errors++;
805 /* TxReset and clear FIFO */ 799 /* TxReset and clear FIFO */
806 writew (TxReset | FIFOReset, ioaddr + ASICCtrl + 2); 800 dw16(ASICCtrl + 2, TxReset | FIFOReset);
807 /* Wait reset done */ 801 /* Wait reset done */
808 for (i = 50; i > 0; i--) { 802 for (i = 50; i > 0; i--) {
809 if ((readw (ioaddr + ASICCtrl + 2) & ResetBusy) == 0) 803 if (!(dr16(ASICCtrl + 2) & ResetBusy))
810 break; 804 break;
811 mdelay (1); 805 mdelay (1);
812 } 806 }
@@ -821,7 +815,7 @@ tx_error (struct net_device *dev, int tx_status)
821 np->stats.collisions++; 815 np->stats.collisions++;
822#endif 816#endif
823 /* Restart the Tx */ 817 /* Restart the Tx */
824 writel (readw (dev->base_addr + MACCtrl) | TxEnable, ioaddr + MACCtrl); 818 dw32(MACCtrl, dr16(MACCtrl) | TxEnable);
825} 819}
826 820
827static int 821static int
@@ -931,8 +925,8 @@ receive_packet (struct net_device *dev)
931static void 925static void
932rio_error (struct net_device *dev, int int_status) 926rio_error (struct net_device *dev, int int_status)
933{ 927{
934 long ioaddr = dev->base_addr;
935 struct netdev_private *np = netdev_priv(dev); 928 struct netdev_private *np = netdev_priv(dev);
929 void __iomem *ioaddr = np->ioaddr;
936 u16 macctrl; 930 u16 macctrl;
937 931
938 /* Link change event */ 932 /* Link change event */
@@ -954,7 +948,7 @@ rio_error (struct net_device *dev, int int_status)
954 TxFlowControlEnable : 0; 948 TxFlowControlEnable : 0;
955 macctrl |= (np->rx_flow) ? 949 macctrl |= (np->rx_flow) ?
956 RxFlowControlEnable : 0; 950 RxFlowControlEnable : 0;
957 writew(macctrl, ioaddr + MACCtrl); 951 dw16(MACCtrl, macctrl);
958 np->link_status = 1; 952 np->link_status = 1;
959 netif_carrier_on(dev); 953 netif_carrier_on(dev);
960 } else { 954 } else {
@@ -974,7 +968,7 @@ rio_error (struct net_device *dev, int int_status)
974 if (int_status & HostError) { 968 if (int_status & HostError) {
975 printk (KERN_ERR "%s: HostError! IntStatus %4.4x.\n", 969 printk (KERN_ERR "%s: HostError! IntStatus %4.4x.\n",
976 dev->name, int_status); 970 dev->name, int_status);
977 writew (GlobalReset | HostReset, ioaddr + ASICCtrl + 2); 971 dw16(ASICCtrl + 2, GlobalReset | HostReset);
978 mdelay (500); 972 mdelay (500);
979 } 973 }
980} 974}
@@ -982,8 +976,8 @@ rio_error (struct net_device *dev, int int_status)
982static struct net_device_stats * 976static struct net_device_stats *
983get_stats (struct net_device *dev) 977get_stats (struct net_device *dev)
984{ 978{
985 long ioaddr = dev->base_addr;
986 struct netdev_private *np = netdev_priv(dev); 979 struct netdev_private *np = netdev_priv(dev);
980 void __iomem *ioaddr = np->ioaddr;
987#ifdef MEM_MAPPING 981#ifdef MEM_MAPPING
988 int i; 982 int i;
989#endif 983#endif
@@ -992,106 +986,107 @@ get_stats (struct net_device *dev)
992 /* All statistics registers need to be acknowledged, 986 /* All statistics registers need to be acknowledged,
993 else statistic overflow could cause problems */ 987 else statistic overflow could cause problems */
994 988
995 np->stats.rx_packets += readl (ioaddr + FramesRcvOk); 989 np->stats.rx_packets += dr32(FramesRcvOk);
996 np->stats.tx_packets += readl (ioaddr + FramesXmtOk); 990 np->stats.tx_packets += dr32(FramesXmtOk);
997 np->stats.rx_bytes += readl (ioaddr + OctetRcvOk); 991 np->stats.rx_bytes += dr32(OctetRcvOk);
998 np->stats.tx_bytes += readl (ioaddr + OctetXmtOk); 992 np->stats.tx_bytes += dr32(OctetXmtOk);
999 993
1000 np->stats.multicast = readl (ioaddr + McstFramesRcvdOk); 994 np->stats.multicast = dr32(McstFramesRcvdOk);
1001 np->stats.collisions += readl (ioaddr + SingleColFrames) 995 np->stats.collisions += dr32(SingleColFrames)
1002 + readl (ioaddr + MultiColFrames); 996 + dr32(MultiColFrames);
1003 997
1004 /* detailed tx errors */ 998 /* detailed tx errors */
1005 stat_reg = readw (ioaddr + FramesAbortXSColls); 999 stat_reg = dr16(FramesAbortXSColls);
1006 np->stats.tx_aborted_errors += stat_reg; 1000 np->stats.tx_aborted_errors += stat_reg;
1007 np->stats.tx_errors += stat_reg; 1001 np->stats.tx_errors += stat_reg;
1008 1002
1009 stat_reg = readw (ioaddr + CarrierSenseErrors); 1003 stat_reg = dr16(CarrierSenseErrors);
1010 np->stats.tx_carrier_errors += stat_reg; 1004 np->stats.tx_carrier_errors += stat_reg;
1011 np->stats.tx_errors += stat_reg; 1005 np->stats.tx_errors += stat_reg;
1012 1006
1013 /* Clear all other statistic register. */ 1007 /* Clear all other statistic register. */
1014 readl (ioaddr + McstOctetXmtOk); 1008 dr32(McstOctetXmtOk);
1015 readw (ioaddr + BcstFramesXmtdOk); 1009 dr16(BcstFramesXmtdOk);
1016 readl (ioaddr + McstFramesXmtdOk); 1010 dr32(McstFramesXmtdOk);
1017 readw (ioaddr + BcstFramesRcvdOk); 1011 dr16(BcstFramesRcvdOk);
1018 readw (ioaddr + MacControlFramesRcvd); 1012 dr16(MacControlFramesRcvd);
1019 readw (ioaddr + FrameTooLongErrors); 1013 dr16(FrameTooLongErrors);
1020 readw (ioaddr + InRangeLengthErrors); 1014 dr16(InRangeLengthErrors);
1021 readw (ioaddr + FramesCheckSeqErrors); 1015 dr16(FramesCheckSeqErrors);
1022 readw (ioaddr + FramesLostRxErrors); 1016 dr16(FramesLostRxErrors);
1023 readl (ioaddr + McstOctetXmtOk); 1017 dr32(McstOctetXmtOk);
1024 readl (ioaddr + BcstOctetXmtOk); 1018 dr32(BcstOctetXmtOk);
1025 readl (ioaddr + McstFramesXmtdOk); 1019 dr32(McstFramesXmtdOk);
1026 readl (ioaddr + FramesWDeferredXmt); 1020 dr32(FramesWDeferredXmt);
1027 readl (ioaddr + LateCollisions); 1021 dr32(LateCollisions);
1028 readw (ioaddr + BcstFramesXmtdOk); 1022 dr16(BcstFramesXmtdOk);
1029 readw (ioaddr + MacControlFramesXmtd); 1023 dr16(MacControlFramesXmtd);
1030 readw (ioaddr + FramesWEXDeferal); 1024 dr16(FramesWEXDeferal);
1031 1025
1032#ifdef MEM_MAPPING 1026#ifdef MEM_MAPPING
1033 for (i = 0x100; i <= 0x150; i += 4) 1027 for (i = 0x100; i <= 0x150; i += 4)
1034 readl (ioaddr + i); 1028 dr32(i);
1035#endif 1029#endif
1036 readw (ioaddr + TxJumboFrames); 1030 dr16(TxJumboFrames);
1037 readw (ioaddr + RxJumboFrames); 1031 dr16(RxJumboFrames);
1038 readw (ioaddr + TCPCheckSumErrors); 1032 dr16(TCPCheckSumErrors);
1039 readw (ioaddr + UDPCheckSumErrors); 1033 dr16(UDPCheckSumErrors);
1040 readw (ioaddr + IPCheckSumErrors); 1034 dr16(IPCheckSumErrors);
1041 return &np->stats; 1035 return &np->stats;
1042} 1036}
1043 1037
1044static int 1038static int
1045clear_stats (struct net_device *dev) 1039clear_stats (struct net_device *dev)
1046{ 1040{
1047 long ioaddr = dev->base_addr; 1041 struct netdev_private *np = netdev_priv(dev);
1042 void __iomem *ioaddr = np->ioaddr;
1048#ifdef MEM_MAPPING 1043#ifdef MEM_MAPPING
1049 int i; 1044 int i;
1050#endif 1045#endif
1051 1046
1052 /* All statistics registers need to be acknowledged, 1047 /* All statistics registers need to be acknowledged,
1053 else statistic overflow could cause problems */ 1048 else statistic overflow could cause problems */
1054 readl (ioaddr + FramesRcvOk); 1049 dr32(FramesRcvOk);
1055 readl (ioaddr + FramesXmtOk); 1050 dr32(FramesXmtOk);
1056 readl (ioaddr + OctetRcvOk); 1051 dr32(OctetRcvOk);
1057 readl (ioaddr + OctetXmtOk); 1052 dr32(OctetXmtOk);
1058 1053
1059 readl (ioaddr + McstFramesRcvdOk); 1054 dr32(McstFramesRcvdOk);
1060 readl (ioaddr + SingleColFrames); 1055 dr32(SingleColFrames);
1061 readl (ioaddr + MultiColFrames); 1056 dr32(MultiColFrames);
1062 readl (ioaddr + LateCollisions); 1057 dr32(LateCollisions);
1063 /* detailed rx errors */ 1058 /* detailed rx errors */
1064 readw (ioaddr + FrameTooLongErrors); 1059 dr16(FrameTooLongErrors);
1065 readw (ioaddr + InRangeLengthErrors); 1060 dr16(InRangeLengthErrors);
1066 readw (ioaddr + FramesCheckSeqErrors); 1061 dr16(FramesCheckSeqErrors);
1067 readw (ioaddr + FramesLostRxErrors); 1062 dr16(FramesLostRxErrors);
1068 1063
1069 /* detailed tx errors */ 1064 /* detailed tx errors */
1070 readw (ioaddr + FramesAbortXSColls); 1065 dr16(FramesAbortXSColls);
1071 readw (ioaddr + CarrierSenseErrors); 1066 dr16(CarrierSenseErrors);
1072 1067
1073 /* Clear all other statistic register. */ 1068 /* Clear all other statistic register. */
1074 readl (ioaddr + McstOctetXmtOk); 1069 dr32(McstOctetXmtOk);
1075 readw (ioaddr + BcstFramesXmtdOk); 1070 dr16(BcstFramesXmtdOk);
1076 readl (ioaddr + McstFramesXmtdOk); 1071 dr32(McstFramesXmtdOk);
1077 readw (ioaddr + BcstFramesRcvdOk); 1072 dr16(BcstFramesRcvdOk);
1078 readw (ioaddr + MacControlFramesRcvd); 1073 dr16(MacControlFramesRcvd);
1079 readl (ioaddr + McstOctetXmtOk); 1074 dr32(McstOctetXmtOk);
1080 readl (ioaddr + BcstOctetXmtOk); 1075 dr32(BcstOctetXmtOk);
1081 readl (ioaddr + McstFramesXmtdOk); 1076 dr32(McstFramesXmtdOk);
1082 readl (ioaddr + FramesWDeferredXmt); 1077 dr32(FramesWDeferredXmt);
1083 readw (ioaddr + BcstFramesXmtdOk); 1078 dr16(BcstFramesXmtdOk);
1084 readw (ioaddr + MacControlFramesXmtd); 1079 dr16(MacControlFramesXmtd);
1085 readw (ioaddr + FramesWEXDeferal); 1080 dr16(FramesWEXDeferal);
1086#ifdef MEM_MAPPING 1081#ifdef MEM_MAPPING
1087 for (i = 0x100; i <= 0x150; i += 4) 1082 for (i = 0x100; i <= 0x150; i += 4)
1088 readl (ioaddr + i); 1083 dr32(i);
1089#endif 1084#endif
1090 readw (ioaddr + TxJumboFrames); 1085 dr16(TxJumboFrames);
1091 readw (ioaddr + RxJumboFrames); 1086 dr16(RxJumboFrames);
1092 readw (ioaddr + TCPCheckSumErrors); 1087 dr16(TCPCheckSumErrors);
1093 readw (ioaddr + UDPCheckSumErrors); 1088 dr16(UDPCheckSumErrors);
1094 readw (ioaddr + IPCheckSumErrors); 1089 dr16(IPCheckSumErrors);
1095 return 0; 1090 return 0;
1096} 1091}
1097 1092
@@ -1114,10 +1109,10 @@ change_mtu (struct net_device *dev, int new_mtu)
1114static void 1109static void
1115set_multicast (struct net_device *dev) 1110set_multicast (struct net_device *dev)
1116{ 1111{
1117 long ioaddr = dev->base_addr; 1112 struct netdev_private *np = netdev_priv(dev);
1113 void __iomem *ioaddr = np->ioaddr;
1118 u32 hash_table[2]; 1114 u32 hash_table[2];
1119 u16 rx_mode = 0; 1115 u16 rx_mode = 0;
1120 struct netdev_private *np = netdev_priv(dev);
1121 1116
1122 hash_table[0] = hash_table[1] = 0; 1117 hash_table[0] = hash_table[1] = 0;
1123 /* RxFlowcontrol DA: 01-80-C2-00-00-01. Hash index=0x39 */ 1118 /* RxFlowcontrol DA: 01-80-C2-00-00-01. Hash index=0x39 */
@@ -1153,9 +1148,9 @@ set_multicast (struct net_device *dev)
1153 rx_mode |= ReceiveVLANMatch; 1148 rx_mode |= ReceiveVLANMatch;
1154 } 1149 }
1155 1150
1156 writel (hash_table[0], ioaddr + HashTable0); 1151 dw32(HashTable0, hash_table[0]);
1157 writel (hash_table[1], ioaddr + HashTable1); 1152 dw32(HashTable1, hash_table[1]);
1158 writew (rx_mode, ioaddr + ReceiveMode); 1153 dw16(ReceiveMode, rx_mode);
1159} 1154}
1160 1155
1161static void rio_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 1156static void rio_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
@@ -1318,15 +1313,15 @@ rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
1318#define EEP_BUSY 0x8000 1313#define EEP_BUSY 0x8000
1319/* Read the EEPROM word */ 1314/* Read the EEPROM word */
1320/* We use I/O instruction to read/write eeprom to avoid fail on some machines */ 1315/* We use I/O instruction to read/write eeprom to avoid fail on some machines */
1321static int 1316static int read_eeprom(struct netdev_private *np, int eep_addr)
1322read_eeprom (long ioaddr, int eep_addr)
1323{ 1317{
1318 void __iomem *ioaddr = np->eeprom_addr;
1324 int i = 1000; 1319 int i = 1000;
1325 outw (EEP_READ | (eep_addr & 0xff), ioaddr + EepromCtrl); 1320
1321 dw16(EepromCtrl, EEP_READ | (eep_addr & 0xff));
1326 while (i-- > 0) { 1322 while (i-- > 0) {
1327 if (!(inw (ioaddr + EepromCtrl) & EEP_BUSY)) { 1323 if (!(dr16(EepromCtrl) & EEP_BUSY))
1328 return inw (ioaddr + EepromData); 1324 return dr16(EepromData);
1329 }
1330 } 1325 }
1331 return 0; 1326 return 0;
1332} 1327}
@@ -1336,38 +1331,40 @@ enum phy_ctrl_bits {
1336 MII_DUPLEX = 0x08, 1331 MII_DUPLEX = 0x08,
1337}; 1332};
1338 1333
1339#define mii_delay() readb(ioaddr) 1334#define mii_delay() dr8(PhyCtrl)
1340static void 1335static void
1341mii_sendbit (struct net_device *dev, u32 data) 1336mii_sendbit (struct net_device *dev, u32 data)
1342{ 1337{
1343 long ioaddr = dev->base_addr + PhyCtrl; 1338 struct netdev_private *np = netdev_priv(dev);
1344 data = (data) ? MII_DATA1 : 0; 1339 void __iomem *ioaddr = np->ioaddr;
1345 data |= MII_WRITE; 1340
1346 data |= (readb (ioaddr) & 0xf8) | MII_WRITE; 1341 data = ((data) ? MII_DATA1 : 0) | (dr8(PhyCtrl) & 0xf8) | MII_WRITE;
1347 writeb (data, ioaddr); 1342 dw8(PhyCtrl, data);
1348 mii_delay (); 1343 mii_delay ();
1349 writeb (data | MII_CLK, ioaddr); 1344 dw8(PhyCtrl, data | MII_CLK);
1350 mii_delay (); 1345 mii_delay ();
1351} 1346}
1352 1347
1353static int 1348static int
1354mii_getbit (struct net_device *dev) 1349mii_getbit (struct net_device *dev)
1355{ 1350{
1356 long ioaddr = dev->base_addr + PhyCtrl; 1351 struct netdev_private *np = netdev_priv(dev);
1352 void __iomem *ioaddr = np->ioaddr;
1357 u8 data; 1353 u8 data;
1358 1354
1359 data = (readb (ioaddr) & 0xf8) | MII_READ; 1355 data = (dr8(PhyCtrl) & 0xf8) | MII_READ;
1360 writeb (data, ioaddr); 1356 dw8(PhyCtrl, data);
1361 mii_delay (); 1357 mii_delay ();
1362 writeb (data | MII_CLK, ioaddr); 1358 dw8(PhyCtrl, data | MII_CLK);
1363 mii_delay (); 1359 mii_delay ();
1364 return ((readb (ioaddr) >> 1) & 1); 1360 return (dr8(PhyCtrl) >> 1) & 1;
1365} 1361}
1366 1362
1367static void 1363static void
1368mii_send_bits (struct net_device *dev, u32 data, int len) 1364mii_send_bits (struct net_device *dev, u32 data, int len)
1369{ 1365{
1370 int i; 1366 int i;
1367
1371 for (i = len - 1; i >= 0; i--) { 1368 for (i = len - 1; i >= 0; i--) {
1372 mii_sendbit (dev, data & (1 << i)); 1369 mii_sendbit (dev, data & (1 << i));
1373 } 1370 }
@@ -1721,28 +1718,29 @@ mii_set_media_pcs (struct net_device *dev)
1721static int 1718static int
1722rio_close (struct net_device *dev) 1719rio_close (struct net_device *dev)
1723{ 1720{
1724 long ioaddr = dev->base_addr;
1725 struct netdev_private *np = netdev_priv(dev); 1721 struct netdev_private *np = netdev_priv(dev);
1722 void __iomem *ioaddr = np->ioaddr;
1723
1724 struct pci_dev *pdev = np->pdev;
1726 struct sk_buff *skb; 1725 struct sk_buff *skb;
1727 int i; 1726 int i;
1728 1727
1729 netif_stop_queue (dev); 1728 netif_stop_queue (dev);
1730 1729
1731 /* Disable interrupts */ 1730 /* Disable interrupts */
1732 writew (0, ioaddr + IntEnable); 1731 dw16(IntEnable, 0);
1733 1732
1734 /* Stop Tx and Rx logics */ 1733 /* Stop Tx and Rx logics */
1735 writel (TxDisable | RxDisable | StatsDisable, ioaddr + MACCtrl); 1734 dw32(MACCtrl, TxDisable | RxDisable | StatsDisable);
1736 1735
1737 free_irq (dev->irq, dev); 1736 free_irq(pdev->irq, dev);
1738 del_timer_sync (&np->timer); 1737 del_timer_sync (&np->timer);
1739 1738
1740 /* Free all the skbuffs in the queue. */ 1739 /* Free all the skbuffs in the queue. */
1741 for (i = 0; i < RX_RING_SIZE; i++) { 1740 for (i = 0; i < RX_RING_SIZE; i++) {
1742 skb = np->rx_skbuff[i]; 1741 skb = np->rx_skbuff[i];
1743 if (skb) { 1742 if (skb) {
1744 pci_unmap_single(np->pdev, 1743 pci_unmap_single(pdev, desc_to_dma(&np->rx_ring[i]),
1745 desc_to_dma(&np->rx_ring[i]),
1746 skb->len, PCI_DMA_FROMDEVICE); 1744 skb->len, PCI_DMA_FROMDEVICE);
1747 dev_kfree_skb (skb); 1745 dev_kfree_skb (skb);
1748 np->rx_skbuff[i] = NULL; 1746 np->rx_skbuff[i] = NULL;
@@ -1753,8 +1751,7 @@ rio_close (struct net_device *dev)
1753 for (i = 0; i < TX_RING_SIZE; i++) { 1751 for (i = 0; i < TX_RING_SIZE; i++) {
1754 skb = np->tx_skbuff[i]; 1752 skb = np->tx_skbuff[i];
1755 if (skb) { 1753 if (skb) {
1756 pci_unmap_single(np->pdev, 1754 pci_unmap_single(pdev, desc_to_dma(&np->tx_ring[i]),
1757 desc_to_dma(&np->tx_ring[i]),
1758 skb->len, PCI_DMA_TODEVICE); 1755 skb->len, PCI_DMA_TODEVICE);
1759 dev_kfree_skb (skb); 1756 dev_kfree_skb (skb);
1760 np->tx_skbuff[i] = NULL; 1757 np->tx_skbuff[i] = NULL;
@@ -1778,8 +1775,9 @@ rio_remove1 (struct pci_dev *pdev)
1778 pci_free_consistent (pdev, TX_TOTAL_SIZE, np->tx_ring, 1775 pci_free_consistent (pdev, TX_TOTAL_SIZE, np->tx_ring,
1779 np->tx_ring_dma); 1776 np->tx_ring_dma);
1780#ifdef MEM_MAPPING 1777#ifdef MEM_MAPPING
1781 iounmap ((char *) (dev->base_addr)); 1778 pci_iounmap(pdev, np->ioaddr);
1782#endif 1779#endif
1780 pci_iounmap(pdev, np->eeprom_addr);
1783 free_netdev (dev); 1781 free_netdev (dev);
1784 pci_release_regions (pdev); 1782 pci_release_regions (pdev);
1785 pci_disable_device (pdev); 1783 pci_disable_device (pdev);
diff --git a/drivers/net/ethernet/dlink/dl2k.h b/drivers/net/ethernet/dlink/dl2k.h
index ba0adcafa55a..40ba6e02988c 100644
--- a/drivers/net/ethernet/dlink/dl2k.h
+++ b/drivers/net/ethernet/dlink/dl2k.h
@@ -42,23 +42,6 @@
42#define TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct netdev_desc) 42#define TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct netdev_desc)
43#define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct netdev_desc) 43#define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct netdev_desc)
44 44
45/* This driver was written to use PCI memory space, however x86-oriented
46 hardware often uses I/O space accesses. */
47#ifndef MEM_MAPPING
48#undef readb
49#undef readw
50#undef readl
51#undef writeb
52#undef writew
53#undef writel
54#define readb inb
55#define readw inw
56#define readl inl
57#define writeb outb
58#define writew outw
59#define writel outl
60#endif
61
62/* Offsets to the device registers. 45/* Offsets to the device registers.
63 Unlike software-only systems, device drivers interact with complex hardware. 46 Unlike software-only systems, device drivers interact with complex hardware.
64 It's not useful to define symbolic names for every register bit in the 47 It's not useful to define symbolic names for every register bit in the
@@ -391,6 +374,8 @@ struct netdev_private {
391 dma_addr_t tx_ring_dma; 374 dma_addr_t tx_ring_dma;
392 dma_addr_t rx_ring_dma; 375 dma_addr_t rx_ring_dma;
393 struct pci_dev *pdev; 376 struct pci_dev *pdev;
377 void __iomem *ioaddr;
378 void __iomem *eeprom_addr;
394 spinlock_t tx_lock; 379 spinlock_t tx_lock;
395 spinlock_t rx_lock; 380 spinlock_t rx_lock;
396 struct net_device_stats stats; 381 struct net_device_stats stats;
diff --git a/drivers/net/ethernet/dlink/sundance.c b/drivers/net/ethernet/dlink/sundance.c
index d783f4f96ec0..d7bb52a7bda1 100644
--- a/drivers/net/ethernet/dlink/sundance.c
+++ b/drivers/net/ethernet/dlink/sundance.c
@@ -522,9 +522,6 @@ static int __devinit sundance_probe1 (struct pci_dev *pdev,
522 cpu_to_le16(eeprom_read(ioaddr, i + EEPROM_SA_OFFSET)); 522 cpu_to_le16(eeprom_read(ioaddr, i + EEPROM_SA_OFFSET));
523 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); 523 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
524 524
525 dev->base_addr = (unsigned long)ioaddr;
526 dev->irq = irq;
527
528 np = netdev_priv(dev); 525 np = netdev_priv(dev);
529 np->base = ioaddr; 526 np->base = ioaddr;
530 np->pci_dev = pdev; 527 np->pci_dev = pdev;
@@ -828,18 +825,19 @@ static int netdev_open(struct net_device *dev)
828{ 825{
829 struct netdev_private *np = netdev_priv(dev); 826 struct netdev_private *np = netdev_priv(dev);
830 void __iomem *ioaddr = np->base; 827 void __iomem *ioaddr = np->base;
828 const int irq = np->pci_dev->irq;
831 unsigned long flags; 829 unsigned long flags;
832 int i; 830 int i;
833 831
834 /* Do we need to reset the chip??? */ 832 /* Do we need to reset the chip??? */
835 833
836 i = request_irq(dev->irq, intr_handler, IRQF_SHARED, dev->name, dev); 834 i = request_irq(irq, intr_handler, IRQF_SHARED, dev->name, dev);
837 if (i) 835 if (i)
838 return i; 836 return i;
839 837
840 if (netif_msg_ifup(np)) 838 if (netif_msg_ifup(np))
841 printk(KERN_DEBUG "%s: netdev_open() irq %d.\n", 839 printk(KERN_DEBUG "%s: netdev_open() irq %d\n", dev->name, irq);
842 dev->name, dev->irq); 840
843 init_ring(dev); 841 init_ring(dev);
844 842
845 iowrite32(np->rx_ring_dma, ioaddr + RxListPtr); 843 iowrite32(np->rx_ring_dma, ioaddr + RxListPtr);
@@ -1814,7 +1812,7 @@ static int netdev_close(struct net_device *dev)
1814 } 1812 }
1815#endif /* __i386__ debugging only */ 1813#endif /* __i386__ debugging only */
1816 1814
1817 free_irq(dev->irq, dev); 1815 free_irq(np->pci_dev->irq, dev);
1818 1816
1819 del_timer_sync(&np->timer); 1817 del_timer_sync(&np->timer);
1820 1818
diff --git a/drivers/net/ethernet/dnet.c b/drivers/net/ethernet/dnet.c
index b276469f74e9..290b26f868c9 100644
--- a/drivers/net/ethernet/dnet.c
+++ b/drivers/net/ethernet/dnet.c
@@ -815,6 +815,7 @@ static const struct ethtool_ops dnet_ethtool_ops = {
815 .set_settings = dnet_set_settings, 815 .set_settings = dnet_set_settings,
816 .get_drvinfo = dnet_get_drvinfo, 816 .get_drvinfo = dnet_get_drvinfo,
817 .get_link = ethtool_op_get_link, 817 .get_link = ethtool_op_get_link,
818 .get_ts_info = ethtool_op_get_ts_info,
818}; 819};
819 820
820static const struct net_device_ops dnet_netdev_ops = { 821static const struct net_device_ops dnet_netdev_ops = {
diff --git a/drivers/net/ethernet/fealnx.c b/drivers/net/ethernet/fealnx.c
index 1637b9862292..9d71c9cc300b 100644
--- a/drivers/net/ethernet/fealnx.c
+++ b/drivers/net/ethernet/fealnx.c
@@ -545,9 +545,6 @@ static int __devinit fealnx_init_one(struct pci_dev *pdev,
545 /* Reset the chip to erase previous misconfiguration. */ 545 /* Reset the chip to erase previous misconfiguration. */
546 iowrite32(0x00000001, ioaddr + BCR); 546 iowrite32(0x00000001, ioaddr + BCR);
547 547
548 dev->base_addr = (unsigned long)ioaddr;
549 dev->irq = irq;
550
551 /* Make certain the descriptor lists are aligned. */ 548 /* Make certain the descriptor lists are aligned. */
552 np = netdev_priv(dev); 549 np = netdev_priv(dev);
553 np->mem = ioaddr; 550 np->mem = ioaddr;
@@ -832,11 +829,13 @@ static int netdev_open(struct net_device *dev)
832{ 829{
833 struct netdev_private *np = netdev_priv(dev); 830 struct netdev_private *np = netdev_priv(dev);
834 void __iomem *ioaddr = np->mem; 831 void __iomem *ioaddr = np->mem;
835 int i; 832 const int irq = np->pci_dev->irq;
833 int rc, i;
836 834
837 iowrite32(0x00000001, ioaddr + BCR); /* Reset */ 835 iowrite32(0x00000001, ioaddr + BCR); /* Reset */
838 836
839 if (request_irq(dev->irq, intr_handler, IRQF_SHARED, dev->name, dev)) 837 rc = request_irq(irq, intr_handler, IRQF_SHARED, dev->name, dev);
838 if (rc)
840 return -EAGAIN; 839 return -EAGAIN;
841 840
842 for (i = 0; i < 3; i++) 841 for (i = 0; i < 3; i++)
@@ -924,8 +923,7 @@ static int netdev_open(struct net_device *dev)
924 np->reset_timer.data = (unsigned long) dev; 923 np->reset_timer.data = (unsigned long) dev;
925 np->reset_timer.function = reset_timer; 924 np->reset_timer.function = reset_timer;
926 np->reset_timer_armed = 0; 925 np->reset_timer_armed = 0;
927 926 return rc;
928 return 0;
929} 927}
930 928
931 929
@@ -1910,7 +1908,7 @@ static int netdev_close(struct net_device *dev)
1910 del_timer_sync(&np->timer); 1908 del_timer_sync(&np->timer);
1911 del_timer_sync(&np->reset_timer); 1909 del_timer_sync(&np->reset_timer);
1912 1910
1913 free_irq(dev->irq, dev); 1911 free_irq(np->pci_dev->irq, dev);
1914 1912
1915 /* Free all the skbuffs in the Rx queue. */ 1913 /* Free all the skbuffs in the Rx queue. */
1916 for (i = 0; i < RX_RING_SIZE; i++) { 1914 for (i = 0; i < RX_RING_SIZE; i++) {
diff --git a/drivers/net/ethernet/freescale/fec.c b/drivers/net/ethernet/freescale/fec.c
index a12b3f5bc025..7fa0227c9c02 100644
--- a/drivers/net/ethernet/freescale/fec.c
+++ b/drivers/net/ethernet/freescale/fec.c
@@ -1161,6 +1161,7 @@ static const struct ethtool_ops fec_enet_ethtool_ops = {
1161 .set_settings = fec_enet_set_settings, 1161 .set_settings = fec_enet_set_settings,
1162 .get_drvinfo = fec_enet_get_drvinfo, 1162 .get_drvinfo = fec_enet_get_drvinfo,
1163 .get_link = ethtool_op_get_link, 1163 .get_link = ethtool_op_get_link,
1164 .get_ts_info = ethtool_op_get_ts_info,
1164}; 1165};
1165 1166
1166static int fec_enet_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd) 1167static int fec_enet_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)
diff --git a/drivers/net/ethernet/freescale/fec_mpc52xx.c b/drivers/net/ethernet/freescale/fec_mpc52xx.c
index 7b34d8c698da..97f947b3d94a 100644
--- a/drivers/net/ethernet/freescale/fec_mpc52xx.c
+++ b/drivers/net/ethernet/freescale/fec_mpc52xx.c
@@ -811,6 +811,7 @@ static const struct ethtool_ops mpc52xx_fec_ethtool_ops = {
811 .get_link = ethtool_op_get_link, 811 .get_link = ethtool_op_get_link,
812 .get_msglevel = mpc52xx_fec_get_msglevel, 812 .get_msglevel = mpc52xx_fec_get_msglevel,
813 .set_msglevel = mpc52xx_fec_set_msglevel, 813 .set_msglevel = mpc52xx_fec_set_msglevel,
814 .get_ts_info = ethtool_op_get_ts_info,
814}; 815};
815 816
816 817
diff --git a/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c b/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
index e4e6cd2c5f82..2b7633f766d9 100644
--- a/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
+++ b/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
@@ -963,6 +963,7 @@ static const struct ethtool_ops fs_ethtool_ops = {
963 .get_msglevel = fs_get_msglevel, 963 .get_msglevel = fs_get_msglevel,
964 .set_msglevel = fs_set_msglevel, 964 .set_msglevel = fs_set_msglevel,
965 .get_regs = fs_get_regs, 965 .get_regs = fs_get_regs,
966 .get_ts_info = ethtool_op_get_ts_info,
966}; 967};
967 968
968static int fs_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 969static int fs_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
diff --git a/drivers/net/ethernet/freescale/gianfar.h b/drivers/net/ethernet/freescale/gianfar.h
index 4c9f8d487dbb..2136c7ff5e6d 100644
--- a/drivers/net/ethernet/freescale/gianfar.h
+++ b/drivers/net/ethernet/freescale/gianfar.h
@@ -1210,4 +1210,7 @@ struct filer_table {
1210 struct gfar_filer_entry fe[MAX_FILER_CACHE_IDX + 20]; 1210 struct gfar_filer_entry fe[MAX_FILER_CACHE_IDX + 20];
1211}; 1211};
1212 1212
1213/* The gianfar_ptp module will set this variable */
1214extern int gfar_phc_index;
1215
1213#endif /* __GIANFAR_H */ 1216#endif /* __GIANFAR_H */
diff --git a/drivers/net/ethernet/freescale/gianfar_ethtool.c b/drivers/net/ethernet/freescale/gianfar_ethtool.c
index 8d74efd04bb9..8a025570d97e 100644
--- a/drivers/net/ethernet/freescale/gianfar_ethtool.c
+++ b/drivers/net/ethernet/freescale/gianfar_ethtool.c
@@ -26,6 +26,7 @@
26#include <linux/delay.h> 26#include <linux/delay.h>
27#include <linux/netdevice.h> 27#include <linux/netdevice.h>
28#include <linux/etherdevice.h> 28#include <linux/etherdevice.h>
29#include <linux/net_tstamp.h>
29#include <linux/skbuff.h> 30#include <linux/skbuff.h>
30#include <linux/spinlock.h> 31#include <linux/spinlock.h>
31#include <linux/mm.h> 32#include <linux/mm.h>
@@ -1739,6 +1740,34 @@ static int gfar_get_nfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
1739 return ret; 1740 return ret;
1740} 1741}
1741 1742
1743int gfar_phc_index = -1;
1744
1745static int gfar_get_ts_info(struct net_device *dev,
1746 struct ethtool_ts_info *info)
1747{
1748 struct gfar_private *priv = netdev_priv(dev);
1749
1750 if (!(priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER)) {
1751 info->so_timestamping =
1752 SOF_TIMESTAMPING_RX_SOFTWARE |
1753 SOF_TIMESTAMPING_SOFTWARE;
1754 info->phc_index = -1;
1755 return 0;
1756 }
1757 info->so_timestamping =
1758 SOF_TIMESTAMPING_TX_HARDWARE |
1759 SOF_TIMESTAMPING_RX_HARDWARE |
1760 SOF_TIMESTAMPING_RAW_HARDWARE;
1761 info->phc_index = gfar_phc_index;
1762 info->tx_types =
1763 (1 << HWTSTAMP_TX_OFF) |
1764 (1 << HWTSTAMP_TX_ON);
1765 info->rx_filters =
1766 (1 << HWTSTAMP_FILTER_NONE) |
1767 (1 << HWTSTAMP_FILTER_ALL);
1768 return 0;
1769}
1770
1742const struct ethtool_ops gfar_ethtool_ops = { 1771const struct ethtool_ops gfar_ethtool_ops = {
1743 .get_settings = gfar_gsettings, 1772 .get_settings = gfar_gsettings,
1744 .set_settings = gfar_ssettings, 1773 .set_settings = gfar_ssettings,
@@ -1761,4 +1790,5 @@ const struct ethtool_ops gfar_ethtool_ops = {
1761#endif 1790#endif
1762 .set_rxnfc = gfar_set_nfc, 1791 .set_rxnfc = gfar_set_nfc,
1763 .get_rxnfc = gfar_get_nfc, 1792 .get_rxnfc = gfar_get_nfc,
1793 .get_ts_info = gfar_get_ts_info,
1764}; 1794};
diff --git a/drivers/net/ethernet/freescale/gianfar_ptp.c b/drivers/net/ethernet/freescale/gianfar_ptp.c
index 5fd620bec15c..c08e5d40fecb 100644
--- a/drivers/net/ethernet/freescale/gianfar_ptp.c
+++ b/drivers/net/ethernet/freescale/gianfar_ptp.c
@@ -515,6 +515,7 @@ static int gianfar_ptp_probe(struct platform_device *dev)
515 err = PTR_ERR(etsects->clock); 515 err = PTR_ERR(etsects->clock);
516 goto no_clock; 516 goto no_clock;
517 } 517 }
518 gfar_phc_clock = ptp_clock_index(etsects->clock);
518 519
519 dev_set_drvdata(&dev->dev, etsects); 520 dev_set_drvdata(&dev->dev, etsects);
520 521
@@ -538,6 +539,7 @@ static int gianfar_ptp_remove(struct platform_device *dev)
538 gfar_write(&etsects->regs->tmr_temask, 0); 539 gfar_write(&etsects->regs->tmr_temask, 0);
539 gfar_write(&etsects->regs->tmr_ctrl, 0); 540 gfar_write(&etsects->regs->tmr_ctrl, 0);
540 541
542 gfar_phc_clock = -1;
541 ptp_clock_unregister(etsects->clock); 543 ptp_clock_unregister(etsects->clock);
542 iounmap(etsects->regs); 544 iounmap(etsects->regs);
543 release_resource(etsects->rsrc); 545 release_resource(etsects->rsrc);
diff --git a/drivers/net/ethernet/freescale/ucc_geth_ethtool.c b/drivers/net/ethernet/freescale/ucc_geth_ethtool.c
index a97257f91a3d..37b035306013 100644
--- a/drivers/net/ethernet/freescale/ucc_geth_ethtool.c
+++ b/drivers/net/ethernet/freescale/ucc_geth_ethtool.c
@@ -415,6 +415,7 @@ static const struct ethtool_ops uec_ethtool_ops = {
415 .get_ethtool_stats = uec_get_ethtool_stats, 415 .get_ethtool_stats = uec_get_ethtool_stats,
416 .get_wol = uec_get_wol, 416 .get_wol = uec_get_wol,
417 .set_wol = uec_set_wol, 417 .set_wol = uec_set_wol,
418 .get_ts_info = ethtool_op_get_ts_info,
418}; 419};
419 420
420void uec_set_ethtool_ops(struct net_device *netdev) 421void uec_set_ethtool_ops(struct net_device *netdev)
diff --git a/drivers/net/ethernet/intel/Kconfig b/drivers/net/ethernet/intel/Kconfig
index 76213162fbe3..74215c05d799 100644
--- a/drivers/net/ethernet/intel/Kconfig
+++ b/drivers/net/ethernet/intel/Kconfig
@@ -7,7 +7,7 @@ config NET_VENDOR_INTEL
7 default y 7 default y
8 depends on PCI || PCI_MSI || ISA || ISA_DMA_API || ARM || \ 8 depends on PCI || PCI_MSI || ISA || ISA_DMA_API || ARM || \
9 ARCH_ACORN || MCA || MCA_LEGACY || SNI_RM || SUN3 || \ 9 ARCH_ACORN || MCA || MCA_LEGACY || SNI_RM || SUN3 || \
10 GSC || BVME6000 || MVME16x || ARCH_ENP2611 || \ 10 GSC || BVME6000 || MVME16x || \
11 (ARM && ARCH_IXP4XX && IXP4XX_NPE && IXP4XX_QMGR) || \ 11 (ARM && ARCH_IXP4XX && IXP4XX_NPE && IXP4XX_QMGR) || \
12 EXPERIMENTAL 12 EXPERIMENTAL
13 ---help--- 13 ---help---
@@ -120,6 +120,17 @@ config IGB_DCA
120 driver. DCA is a method for warming the CPU cache before data 120 driver. DCA is a method for warming the CPU cache before data
121 is used, with the intent of lessening the impact of cache misses. 121 is used, with the intent of lessening the impact of cache misses.
122 122
123config IGB_PTP
124 bool "PTP Hardware Clock (PHC)"
125 default y
126 depends on IGB && PTP_1588_CLOCK
127 ---help---
128 Say Y here if you want to use PTP Hardware Clock (PHC) in the
129 driver. Only the basic clock operations have been implemented.
130
131 Every timestamp and clock read operations must consult the
132 overflow counter to form a correct time value.
133
123config IGBVF 134config IGBVF
124 tristate "Intel(R) 82576 Virtual Function Ethernet support" 135 tristate "Intel(R) 82576 Virtual Function Ethernet support"
125 depends on PCI 136 depends on PCI
diff --git a/drivers/net/ethernet/intel/e1000/e1000_main.c b/drivers/net/ethernet/intel/e1000/e1000_main.c
index 4348b6fd44fa..3d712f262e83 100644
--- a/drivers/net/ethernet/intel/e1000/e1000_main.c
+++ b/drivers/net/ethernet/intel/e1000/e1000_main.c
@@ -827,9 +827,10 @@ static int e1000_set_features(struct net_device *netdev,
827 if (changed & NETIF_F_HW_VLAN_RX) 827 if (changed & NETIF_F_HW_VLAN_RX)
828 e1000_vlan_mode(netdev, features); 828 e1000_vlan_mode(netdev, features);
829 829
830 if (!(changed & NETIF_F_RXCSUM)) 830 if (!(changed & (NETIF_F_RXCSUM | NETIF_F_RXALL)))
831 return 0; 831 return 0;
832 832
833 netdev->features = features;
833 adapter->rx_csum = !!(features & NETIF_F_RXCSUM); 834 adapter->rx_csum = !!(features & NETIF_F_RXCSUM);
834 835
835 if (netif_running(netdev)) 836 if (netif_running(netdev))
@@ -1074,6 +1075,7 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
1074 1075
1075 netdev->features |= netdev->hw_features; 1076 netdev->features |= netdev->hw_features;
1076 netdev->hw_features |= NETIF_F_RXCSUM; 1077 netdev->hw_features |= NETIF_F_RXCSUM;
1078 netdev->hw_features |= NETIF_F_RXALL;
1077 netdev->hw_features |= NETIF_F_RXFCS; 1079 netdev->hw_features |= NETIF_F_RXFCS;
1078 1080
1079 if (pci_using_dac) { 1081 if (pci_using_dac) {
@@ -1841,6 +1843,22 @@ static void e1000_setup_rctl(struct e1000_adapter *adapter)
1841 break; 1843 break;
1842 } 1844 }
1843 1845
1846 /* This is useful for sniffing bad packets. */
1847 if (adapter->netdev->features & NETIF_F_RXALL) {
1848 /* UPE and MPE will be handled by normal PROMISC logic
1849 * in e1000e_set_rx_mode */
1850 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
1851 E1000_RCTL_BAM | /* RX All Bcast Pkts */
1852 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
1853
1854 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
1855 E1000_RCTL_DPF | /* Allow filtered pause */
1856 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
1857 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
1858 * and that breaks VLANs.
1859 */
1860 }
1861
1844 ew32(RCTL, rctl); 1862 ew32(RCTL, rctl);
1845} 1863}
1846 1864
@@ -4057,6 +4075,8 @@ static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
4057 irq_flags); 4075 irq_flags);
4058 length--; 4076 length--;
4059 } else { 4077 } else {
4078 if (netdev->features & NETIF_F_RXALL)
4079 goto process_skb;
4060 /* recycle both page and skb */ 4080 /* recycle both page and skb */
4061 buffer_info->skb = skb; 4081 buffer_info->skb = skb;
4062 /* an error means any chain goes out the window 4082 /* an error means any chain goes out the window
@@ -4069,6 +4089,7 @@ static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
4069 } 4089 }
4070 4090
4071#define rxtop rx_ring->rx_skb_top 4091#define rxtop rx_ring->rx_skb_top
4092process_skb:
4072 if (!(status & E1000_RXD_STAT_EOP)) { 4093 if (!(status & E1000_RXD_STAT_EOP)) {
4073 /* this descriptor is only the beginning (or middle) */ 4094 /* this descriptor is only the beginning (or middle) */
4074 if (!rxtop) { 4095 if (!rxtop) {
@@ -4276,12 +4297,15 @@ static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
4276 flags); 4297 flags);
4277 length--; 4298 length--;
4278 } else { 4299 } else {
4300 if (netdev->features & NETIF_F_RXALL)
4301 goto process_skb;
4279 /* recycle */ 4302 /* recycle */
4280 buffer_info->skb = skb; 4303 buffer_info->skb = skb;
4281 goto next_desc; 4304 goto next_desc;
4282 } 4305 }
4283 } 4306 }
4284 4307
4308process_skb:
4285 total_rx_bytes += (length - 4); /* don't count FCS */ 4309 total_rx_bytes += (length - 4); /* don't count FCS */
4286 total_rx_packets++; 4310 total_rx_packets++;
4287 4311
diff --git a/drivers/net/ethernet/intel/e1000e/ethtool.c b/drivers/net/ethernet/intel/e1000e/ethtool.c
index db35dd5d96de..6302b10cb3a6 100644
--- a/drivers/net/ethernet/intel/e1000e/ethtool.c
+++ b/drivers/net/ethernet/intel/e1000e/ethtool.c
@@ -403,15 +403,15 @@ static void e1000_get_regs(struct net_device *netdev,
403 regs_buff[1] = er32(STATUS); 403 regs_buff[1] = er32(STATUS);
404 404
405 regs_buff[2] = er32(RCTL); 405 regs_buff[2] = er32(RCTL);
406 regs_buff[3] = er32(RDLEN); 406 regs_buff[3] = er32(RDLEN(0));
407 regs_buff[4] = er32(RDH); 407 regs_buff[4] = er32(RDH(0));
408 regs_buff[5] = er32(RDT); 408 regs_buff[5] = er32(RDT(0));
409 regs_buff[6] = er32(RDTR); 409 regs_buff[6] = er32(RDTR);
410 410
411 regs_buff[7] = er32(TCTL); 411 regs_buff[7] = er32(TCTL);
412 regs_buff[8] = er32(TDLEN); 412 regs_buff[8] = er32(TDLEN(0));
413 regs_buff[9] = er32(TDH); 413 regs_buff[9] = er32(TDH(0));
414 regs_buff[10] = er32(TDT); 414 regs_buff[10] = er32(TDT(0));
415 regs_buff[11] = er32(TIDV); 415 regs_buff[11] = er32(TIDV);
416 416
417 regs_buff[12] = adapter->hw.phy.type; /* PHY type (IGP=1, M88=0) */ 417 regs_buff[12] = adapter->hw.phy.type; /* PHY type (IGP=1, M88=0) */
@@ -813,15 +813,15 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
813 } 813 }
814 814
815 REG_PATTERN_TEST(E1000_RDTR, 0x0000FFFF, 0xFFFFFFFF); 815 REG_PATTERN_TEST(E1000_RDTR, 0x0000FFFF, 0xFFFFFFFF);
816 REG_PATTERN_TEST(E1000_RDBAH, 0xFFFFFFFF, 0xFFFFFFFF); 816 REG_PATTERN_TEST(E1000_RDBAH(0), 0xFFFFFFFF, 0xFFFFFFFF);
817 REG_PATTERN_TEST(E1000_RDLEN, 0x000FFF80, 0x000FFFFF); 817 REG_PATTERN_TEST(E1000_RDLEN(0), 0x000FFF80, 0x000FFFFF);
818 REG_PATTERN_TEST(E1000_RDH, 0x0000FFFF, 0x0000FFFF); 818 REG_PATTERN_TEST(E1000_RDH(0), 0x0000FFFF, 0x0000FFFF);
819 REG_PATTERN_TEST(E1000_RDT, 0x0000FFFF, 0x0000FFFF); 819 REG_PATTERN_TEST(E1000_RDT(0), 0x0000FFFF, 0x0000FFFF);
820 REG_PATTERN_TEST(E1000_FCRTH, 0x0000FFF8, 0x0000FFF8); 820 REG_PATTERN_TEST(E1000_FCRTH, 0x0000FFF8, 0x0000FFF8);
821 REG_PATTERN_TEST(E1000_FCTTV, 0x0000FFFF, 0x0000FFFF); 821 REG_PATTERN_TEST(E1000_FCTTV, 0x0000FFFF, 0x0000FFFF);
822 REG_PATTERN_TEST(E1000_TIPG, 0x3FFFFFFF, 0x3FFFFFFF); 822 REG_PATTERN_TEST(E1000_TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
823 REG_PATTERN_TEST(E1000_TDBAH, 0xFFFFFFFF, 0xFFFFFFFF); 823 REG_PATTERN_TEST(E1000_TDBAH(0), 0xFFFFFFFF, 0xFFFFFFFF);
824 REG_PATTERN_TEST(E1000_TDLEN, 0x000FFF80, 0x000FFFFF); 824 REG_PATTERN_TEST(E1000_TDLEN(0), 0x000FFF80, 0x000FFFFF);
825 825
826 REG_SET_AND_CHECK(E1000_RCTL, 0xFFFFFFFF, 0x00000000); 826 REG_SET_AND_CHECK(E1000_RCTL, 0xFFFFFFFF, 0x00000000);
827 827
@@ -830,10 +830,10 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
830 REG_SET_AND_CHECK(E1000_TCTL, 0xFFFFFFFF, 0x00000000); 830 REG_SET_AND_CHECK(E1000_TCTL, 0xFFFFFFFF, 0x00000000);
831 831
832 REG_SET_AND_CHECK(E1000_RCTL, before, 0xFFFFFFFF); 832 REG_SET_AND_CHECK(E1000_RCTL, before, 0xFFFFFFFF);
833 REG_PATTERN_TEST(E1000_RDBAL, 0xFFFFFFF0, 0xFFFFFFFF); 833 REG_PATTERN_TEST(E1000_RDBAL(0), 0xFFFFFFF0, 0xFFFFFFFF);
834 if (!(adapter->flags & FLAG_IS_ICH)) 834 if (!(adapter->flags & FLAG_IS_ICH))
835 REG_PATTERN_TEST(E1000_TXCW, 0xC000FFFF, 0x0000FFFF); 835 REG_PATTERN_TEST(E1000_TXCW, 0xC000FFFF, 0x0000FFFF);
836 REG_PATTERN_TEST(E1000_TDBAL, 0xFFFFFFF0, 0xFFFFFFFF); 836 REG_PATTERN_TEST(E1000_TDBAL(0), 0xFFFFFFF0, 0xFFFFFFFF);
837 REG_PATTERN_TEST(E1000_TIDV, 0x0000FFFF, 0x0000FFFF); 837 REG_PATTERN_TEST(E1000_TIDV, 0x0000FFFF, 0x0000FFFF);
838 mask = 0x8003FFFF; 838 mask = 0x8003FFFF;
839 switch (mac->type) { 839 switch (mac->type) {
@@ -1104,11 +1104,11 @@ static int e1000_setup_desc_rings(struct e1000_adapter *adapter)
1104 tx_ring->next_to_use = 0; 1104 tx_ring->next_to_use = 0;
1105 tx_ring->next_to_clean = 0; 1105 tx_ring->next_to_clean = 0;
1106 1106
1107 ew32(TDBAL, ((u64) tx_ring->dma & 0x00000000FFFFFFFF)); 1107 ew32(TDBAL(0), ((u64) tx_ring->dma & 0x00000000FFFFFFFF));
1108 ew32(TDBAH, ((u64) tx_ring->dma >> 32)); 1108 ew32(TDBAH(0), ((u64) tx_ring->dma >> 32));
1109 ew32(TDLEN, tx_ring->count * sizeof(struct e1000_tx_desc)); 1109 ew32(TDLEN(0), tx_ring->count * sizeof(struct e1000_tx_desc));
1110 ew32(TDH, 0); 1110 ew32(TDH(0), 0);
1111 ew32(TDT, 0); 1111 ew32(TDT(0), 0);
1112 ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN | E1000_TCTL_MULR | 1112 ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN | E1000_TCTL_MULR |
1113 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT | 1113 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1114 E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT); 1114 E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT);
@@ -1168,11 +1168,11 @@ static int e1000_setup_desc_rings(struct e1000_adapter *adapter)
1168 rctl = er32(RCTL); 1168 rctl = er32(RCTL);
1169 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX)) 1169 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
1170 ew32(RCTL, rctl & ~E1000_RCTL_EN); 1170 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1171 ew32(RDBAL, ((u64) rx_ring->dma & 0xFFFFFFFF)); 1171 ew32(RDBAL(0), ((u64) rx_ring->dma & 0xFFFFFFFF));
1172 ew32(RDBAH, ((u64) rx_ring->dma >> 32)); 1172 ew32(RDBAH(0), ((u64) rx_ring->dma >> 32));
1173 ew32(RDLEN, rx_ring->size); 1173 ew32(RDLEN(0), rx_ring->size);
1174 ew32(RDH, 0); 1174 ew32(RDH(0), 0);
1175 ew32(RDT, 0); 1175 ew32(RDT(0), 0);
1176 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 | 1176 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1177 E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_LPE | 1177 E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_LPE |
1178 E1000_RCTL_SBP | E1000_RCTL_SECRC | 1178 E1000_RCTL_SBP | E1000_RCTL_SECRC |
@@ -1534,7 +1534,7 @@ static int e1000_run_loopback_test(struct e1000_adapter *adapter)
1534 int ret_val = 0; 1534 int ret_val = 0;
1535 unsigned long time; 1535 unsigned long time;
1536 1536
1537 ew32(RDT, rx_ring->count - 1); 1537 ew32(RDT(0), rx_ring->count - 1);
1538 1538
1539 /* 1539 /*
1540 * Calculate the loop count based on the largest descriptor ring 1540 * Calculate the loop count based on the largest descriptor ring
@@ -1561,7 +1561,7 @@ static int e1000_run_loopback_test(struct e1000_adapter *adapter)
1561 if (k == tx_ring->count) 1561 if (k == tx_ring->count)
1562 k = 0; 1562 k = 0;
1563 } 1563 }
1564 ew32(TDT, k); 1564 ew32(TDT(0), k);
1565 e1e_flush(); 1565 e1e_flush();
1566 msleep(200); 1566 msleep(200);
1567 time = jiffies; /* set the start time for the receive */ 1567 time = jiffies; /* set the start time for the receive */
diff --git a/drivers/net/ethernet/intel/e1000e/hw.h b/drivers/net/ethernet/intel/e1000e/hw.h
index f82ecf536c8b..923d3fd6ce11 100644
--- a/drivers/net/ethernet/intel/e1000e/hw.h
+++ b/drivers/net/ethernet/intel/e1000e/hw.h
@@ -94,31 +94,40 @@ enum e1e_registers {
94 E1000_FCRTL = 0x02160, /* Flow Control Receive Threshold Low - RW */ 94 E1000_FCRTL = 0x02160, /* Flow Control Receive Threshold Low - RW */
95 E1000_FCRTH = 0x02168, /* Flow Control Receive Threshold High - RW */ 95 E1000_FCRTH = 0x02168, /* Flow Control Receive Threshold High - RW */
96 E1000_PSRCTL = 0x02170, /* Packet Split Receive Control - RW */ 96 E1000_PSRCTL = 0x02170, /* Packet Split Receive Control - RW */
97 E1000_RDBAL = 0x02800, /* Rx Descriptor Base Address Low - RW */ 97/*
98 E1000_RDBAH = 0x02804, /* Rx Descriptor Base Address High - RW */ 98 * Convenience macros
99 E1000_RDLEN = 0x02808, /* Rx Descriptor Length - RW */
100 E1000_RDH = 0x02810, /* Rx Descriptor Head - RW */
101 E1000_RDT = 0x02818, /* Rx Descriptor Tail - RW */
102 E1000_RDTR = 0x02820, /* Rx Delay Timer - RW */
103 E1000_RXDCTL_BASE = 0x02828, /* Rx Descriptor Control - RW */
104#define E1000_RXDCTL(_n) (E1000_RXDCTL_BASE + (_n << 8))
105 E1000_RADV = 0x0282C, /* Rx Interrupt Absolute Delay Timer - RW */
106
107/* Convenience macros
108 * 99 *
109 * Note: "_n" is the queue number of the register to be written to. 100 * Note: "_n" is the queue number of the register to be written to.
110 * 101 *
111 * Example usage: 102 * Example usage:
112 * E1000_RDBAL_REG(current_rx_queue) 103 * E1000_RDBAL(current_rx_queue)
113 *
114 */ 104 */
115#define E1000_RDBAL_REG(_n) (E1000_RDBAL + (_n << 8)) 105 E1000_RDBAL_BASE = 0x02800, /* Rx Descriptor Base Address Low - RW */
106#define E1000_RDBAL(_n) (E1000_RDBAL_BASE + (_n << 8))
107 E1000_RDBAH_BASE = 0x02804, /* Rx Descriptor Base Address High - RW */
108#define E1000_RDBAH(_n) (E1000_RDBAH_BASE + (_n << 8))
109 E1000_RDLEN_BASE = 0x02808, /* Rx Descriptor Length - RW */
110#define E1000_RDLEN(_n) (E1000_RDLEN_BASE + (_n << 8))
111 E1000_RDH_BASE = 0x02810, /* Rx Descriptor Head - RW */
112#define E1000_RDH(_n) (E1000_RDH_BASE + (_n << 8))
113 E1000_RDT_BASE = 0x02818, /* Rx Descriptor Tail - RW */
114#define E1000_RDT(_n) (E1000_RDT_BASE + (_n << 8))
115 E1000_RDTR = 0x02820, /* Rx Delay Timer - RW */
116 E1000_RXDCTL_BASE = 0x02828, /* Rx Descriptor Control - RW */
117#define E1000_RXDCTL(_n) (E1000_RXDCTL_BASE + (_n << 8))
118 E1000_RADV = 0x0282C, /* Rx Interrupt Absolute Delay Timer - RW */
119
116 E1000_KABGTXD = 0x03004, /* AFE Band Gap Transmit Ref Data */ 120 E1000_KABGTXD = 0x03004, /* AFE Band Gap Transmit Ref Data */
117 E1000_TDBAL = 0x03800, /* Tx Descriptor Base Address Low - RW */ 121 E1000_TDBAL_BASE = 0x03800, /* Tx Descriptor Base Address Low - RW */
118 E1000_TDBAH = 0x03804, /* Tx Descriptor Base Address High - RW */ 122#define E1000_TDBAL(_n) (E1000_TDBAL_BASE + (_n << 8))
119 E1000_TDLEN = 0x03808, /* Tx Descriptor Length - RW */ 123 E1000_TDBAH_BASE = 0x03804, /* Tx Descriptor Base Address High - RW */
120 E1000_TDH = 0x03810, /* Tx Descriptor Head - RW */ 124#define E1000_TDBAH(_n) (E1000_TDBAH_BASE + (_n << 8))
121 E1000_TDT = 0x03818, /* Tx Descriptor Tail - RW */ 125 E1000_TDLEN_BASE = 0x03808, /* Tx Descriptor Length - RW */
126#define E1000_TDLEN(_n) (E1000_TDLEN_BASE + (_n << 8))
127 E1000_TDH_BASE = 0x03810, /* Tx Descriptor Head - RW */
128#define E1000_TDH(_n) (E1000_TDH_BASE + (_n << 8))
129 E1000_TDT_BASE = 0x03818, /* Tx Descriptor Tail - RW */
130#define E1000_TDT(_n) (E1000_TDT_BASE + (_n << 8))
122 E1000_TIDV = 0x03820, /* Tx Interrupt Delay Value - RW */ 131 E1000_TIDV = 0x03820, /* Tx Interrupt Delay Value - RW */
123 E1000_TXDCTL_BASE = 0x03828, /* Tx Descriptor Control - RW */ 132 E1000_TXDCTL_BASE = 0x03828, /* Tx Descriptor Control - RW */
124#define E1000_TXDCTL(_n) (E1000_TXDCTL_BASE + (_n << 8)) 133#define E1000_TXDCTL(_n) (E1000_TXDCTL_BASE + (_n << 8))
diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c
index 19ab2154802c..851f7937db29 100644
--- a/drivers/net/ethernet/intel/e1000e/netdev.c
+++ b/drivers/net/ethernet/intel/e1000e/netdev.c
@@ -56,7 +56,7 @@
56 56
57#define DRV_EXTRAVERSION "-k" 57#define DRV_EXTRAVERSION "-k"
58 58
59#define DRV_VERSION "1.9.5" DRV_EXTRAVERSION 59#define DRV_VERSION "1.10.6" DRV_EXTRAVERSION
60char e1000e_driver_name[] = "e1000e"; 60char e1000e_driver_name[] = "e1000e";
61const char e1000e_driver_version[] = DRV_VERSION; 61const char e1000e_driver_version[] = DRV_VERSION;
62 62
@@ -110,14 +110,14 @@ static const struct e1000_reg_info e1000_reg_info_tbl[] = {
110 110
111 /* Rx Registers */ 111 /* Rx Registers */
112 {E1000_RCTL, "RCTL"}, 112 {E1000_RCTL, "RCTL"},
113 {E1000_RDLEN, "RDLEN"}, 113 {E1000_RDLEN(0), "RDLEN"},
114 {E1000_RDH, "RDH"}, 114 {E1000_RDH(0), "RDH"},
115 {E1000_RDT, "RDT"}, 115 {E1000_RDT(0), "RDT"},
116 {E1000_RDTR, "RDTR"}, 116 {E1000_RDTR, "RDTR"},
117 {E1000_RXDCTL(0), "RXDCTL"}, 117 {E1000_RXDCTL(0), "RXDCTL"},
118 {E1000_ERT, "ERT"}, 118 {E1000_ERT, "ERT"},
119 {E1000_RDBAL, "RDBAL"}, 119 {E1000_RDBAL(0), "RDBAL"},
120 {E1000_RDBAH, "RDBAH"}, 120 {E1000_RDBAH(0), "RDBAH"},
121 {E1000_RDFH, "RDFH"}, 121 {E1000_RDFH, "RDFH"},
122 {E1000_RDFT, "RDFT"}, 122 {E1000_RDFT, "RDFT"},
123 {E1000_RDFHS, "RDFHS"}, 123 {E1000_RDFHS, "RDFHS"},
@@ -126,11 +126,11 @@ static const struct e1000_reg_info e1000_reg_info_tbl[] = {
126 126
127 /* Tx Registers */ 127 /* Tx Registers */
128 {E1000_TCTL, "TCTL"}, 128 {E1000_TCTL, "TCTL"},
129 {E1000_TDBAL, "TDBAL"}, 129 {E1000_TDBAL(0), "TDBAL"},
130 {E1000_TDBAH, "TDBAH"}, 130 {E1000_TDBAH(0), "TDBAH"},
131 {E1000_TDLEN, "TDLEN"}, 131 {E1000_TDLEN(0), "TDLEN"},
132 {E1000_TDH, "TDH"}, 132 {E1000_TDH(0), "TDH"},
133 {E1000_TDT, "TDT"}, 133 {E1000_TDT(0), "TDT"},
134 {E1000_TIDV, "TIDV"}, 134 {E1000_TIDV, "TIDV"},
135 {E1000_TXDCTL(0), "TXDCTL"}, 135 {E1000_TXDCTL(0), "TXDCTL"},
136 {E1000_TADV, "TADV"}, 136 {E1000_TADV, "TADV"},
@@ -1053,7 +1053,8 @@ static void e1000_print_hw_hang(struct work_struct *work)
1053 1053
1054 if (!adapter->tx_hang_recheck && 1054 if (!adapter->tx_hang_recheck &&
1055 (adapter->flags2 & FLAG2_DMA_BURST)) { 1055 (adapter->flags2 & FLAG2_DMA_BURST)) {
1056 /* May be block on write-back, flush and detect again 1056 /*
1057 * May be block on write-back, flush and detect again
1057 * flush pending descriptor writebacks to memory 1058 * flush pending descriptor writebacks to memory
1058 */ 1059 */
1059 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 1060 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
@@ -2530,33 +2531,31 @@ err:
2530} 2531}
2531 2532
2532/** 2533/**
2533 * e1000_clean - NAPI Rx polling callback 2534 * e1000e_poll - NAPI Rx polling callback
2534 * @napi: struct associated with this polling callback 2535 * @napi: struct associated with this polling callback
2535 * @budget: amount of packets driver is allowed to process this poll 2536 * @weight: number of packets driver is allowed to process this poll
2536 **/ 2537 **/
2537static int e1000_clean(struct napi_struct *napi, int budget) 2538static int e1000e_poll(struct napi_struct *napi, int weight)
2538{ 2539{
2539 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi); 2540 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2541 napi);
2540 struct e1000_hw *hw = &adapter->hw; 2542 struct e1000_hw *hw = &adapter->hw;
2541 struct net_device *poll_dev = adapter->netdev; 2543 struct net_device *poll_dev = adapter->netdev;
2542 int tx_cleaned = 1, work_done = 0; 2544 int tx_cleaned = 1, work_done = 0;
2543 2545
2544 adapter = netdev_priv(poll_dev); 2546 adapter = netdev_priv(poll_dev);
2545 2547
2546 if (adapter->msix_entries && 2548 if (!adapter->msix_entries ||
2547 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val)) 2549 (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2548 goto clean_rx; 2550 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2549
2550 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2551 2551
2552clean_rx: 2552 adapter->clean_rx(adapter->rx_ring, &work_done, weight);
2553 adapter->clean_rx(adapter->rx_ring, &work_done, budget);
2554 2553
2555 if (!tx_cleaned) 2554 if (!tx_cleaned)
2556 work_done = budget; 2555 work_done = weight;
2557 2556
2558 /* If budget not fully consumed, exit the polling mode */ 2557 /* If weight not fully consumed, exit the polling mode */
2559 if (work_done < budget) { 2558 if (work_done < weight) {
2560 if (adapter->itr_setting & 3) 2559 if (adapter->itr_setting & 3)
2561 e1000_set_itr(adapter); 2560 e1000_set_itr(adapter);
2562 napi_complete(napi); 2561 napi_complete(napi);
@@ -2800,13 +2799,13 @@ static void e1000_configure_tx(struct e1000_adapter *adapter)
2800 /* Setup the HW Tx Head and Tail descriptor pointers */ 2799 /* Setup the HW Tx Head and Tail descriptor pointers */
2801 tdba = tx_ring->dma; 2800 tdba = tx_ring->dma;
2802 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc); 2801 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2803 ew32(TDBAL, (tdba & DMA_BIT_MASK(32))); 2802 ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2804 ew32(TDBAH, (tdba >> 32)); 2803 ew32(TDBAH(0), (tdba >> 32));
2805 ew32(TDLEN, tdlen); 2804 ew32(TDLEN(0), tdlen);
2806 ew32(TDH, 0); 2805 ew32(TDH(0), 0);
2807 ew32(TDT, 0); 2806 ew32(TDT(0), 0);
2808 tx_ring->head = adapter->hw.hw_addr + E1000_TDH; 2807 tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2809 tx_ring->tail = adapter->hw.hw_addr + E1000_TDT; 2808 tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2810 2809
2811 /* Set the Tx Interrupt Delay register */ 2810 /* Set the Tx Interrupt Delay register */
2812 ew32(TIDV, adapter->tx_int_delay); 2811 ew32(TIDV, adapter->tx_int_delay);
@@ -3110,13 +3109,13 @@ static void e1000_configure_rx(struct e1000_adapter *adapter)
3110 * the Base and Length of the Rx Descriptor Ring 3109 * the Base and Length of the Rx Descriptor Ring
3111 */ 3110 */
3112 rdba = rx_ring->dma; 3111 rdba = rx_ring->dma;
3113 ew32(RDBAL, (rdba & DMA_BIT_MASK(32))); 3112 ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3114 ew32(RDBAH, (rdba >> 32)); 3113 ew32(RDBAH(0), (rdba >> 32));
3115 ew32(RDLEN, rdlen); 3114 ew32(RDLEN(0), rdlen);
3116 ew32(RDH, 0); 3115 ew32(RDH(0), 0);
3117 ew32(RDT, 0); 3116 ew32(RDT(0), 0);
3118 rx_ring->head = adapter->hw.hw_addr + E1000_RDH; 3117 rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3119 rx_ring->tail = adapter->hw.hw_addr + E1000_RDT; 3118 rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3120 3119
3121 /* Enable Receive Checksum Offload for TCP and UDP */ 3120 /* Enable Receive Checksum Offload for TCP and UDP */
3122 rxcsum = er32(RXCSUM); 3121 rxcsum = er32(RXCSUM);
@@ -6226,7 +6225,7 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
6226 netdev->netdev_ops = &e1000e_netdev_ops; 6225 netdev->netdev_ops = &e1000e_netdev_ops;
6227 e1000e_set_ethtool_ops(netdev); 6226 e1000e_set_ethtool_ops(netdev);
6228 netdev->watchdog_timeo = 5 * HZ; 6227 netdev->watchdog_timeo = 5 * HZ;
6229 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64); 6228 netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
6230 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name)); 6229 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
6231 6230
6232 netdev->mem_start = mmio_start; 6231 netdev->mem_start = mmio_start;
diff --git a/drivers/net/ethernet/intel/igb/Makefile b/drivers/net/ethernet/intel/igb/Makefile
index 6565c463185c..4bd16e266414 100644
--- a/drivers/net/ethernet/intel/igb/Makefile
+++ b/drivers/net/ethernet/intel/igb/Makefile
@@ -35,3 +35,4 @@ obj-$(CONFIG_IGB) += igb.o
35igb-objs := igb_main.o igb_ethtool.o e1000_82575.o \ 35igb-objs := igb_main.o igb_ethtool.o e1000_82575.o \
36 e1000_mac.o e1000_nvm.o e1000_phy.o e1000_mbx.o 36 e1000_mac.o e1000_nvm.o e1000_phy.o e1000_mbx.o
37 37
38igb-$(CONFIG_IGB_PTP) += igb_ptp.o
diff --git a/drivers/net/ethernet/intel/igb/igb.h b/drivers/net/ethernet/intel/igb/igb.h
index 8e33bdd33eea..3758ad246742 100644
--- a/drivers/net/ethernet/intel/igb/igb.h
+++ b/drivers/net/ethernet/intel/igb/igb.h
@@ -35,8 +35,8 @@
35#include "e1000_82575.h" 35#include "e1000_82575.h"
36 36
37#include <linux/clocksource.h> 37#include <linux/clocksource.h>
38#include <linux/timecompare.h>
39#include <linux/net_tstamp.h> 38#include <linux/net_tstamp.h>
39#include <linux/ptp_clock_kernel.h>
40#include <linux/bitops.h> 40#include <linux/bitops.h>
41#include <linux/if_vlan.h> 41#include <linux/if_vlan.h>
42 42
@@ -328,9 +328,6 @@ struct igb_adapter {
328 328
329 /* OS defined structs */ 329 /* OS defined structs */
330 struct pci_dev *pdev; 330 struct pci_dev *pdev;
331 struct cyclecounter cycles;
332 struct timecounter clock;
333 struct timecompare compare;
334 struct hwtstamp_config hwtstamp_config; 331 struct hwtstamp_config hwtstamp_config;
335 332
336 spinlock_t stats64_lock; 333 spinlock_t stats64_lock;
@@ -364,6 +361,13 @@ struct igb_adapter {
364 u32 wvbr; 361 u32 wvbr;
365 int node; 362 int node;
366 u32 *shadow_vfta; 363 u32 *shadow_vfta;
364
365 struct ptp_clock *ptp_clock;
366 struct ptp_clock_info caps;
367 struct delayed_work overflow_work;
368 spinlock_t tmreg_lock;
369 struct cyclecounter cc;
370 struct timecounter tc;
367}; 371};
368 372
369#define IGB_FLAG_HAS_MSI (1 << 0) 373#define IGB_FLAG_HAS_MSI (1 << 0)
@@ -378,7 +382,6 @@ struct igb_adapter {
378#define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coal Flush */ 382#define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coal Flush */
379 383
380#define IGB_82576_TSYNC_SHIFT 19 384#define IGB_82576_TSYNC_SHIFT 19
381#define IGB_82580_TSYNC_SHIFT 24
382#define IGB_TS_HDR_LEN 16 385#define IGB_TS_HDR_LEN 16
383enum e1000_state_t { 386enum e1000_state_t {
384 __IGB_TESTING, 387 __IGB_TESTING,
@@ -414,7 +417,15 @@ extern void igb_update_stats(struct igb_adapter *, struct rtnl_link_stats64 *);
414extern bool igb_has_link(struct igb_adapter *adapter); 417extern bool igb_has_link(struct igb_adapter *adapter);
415extern void igb_set_ethtool_ops(struct net_device *); 418extern void igb_set_ethtool_ops(struct net_device *);
416extern void igb_power_up_link(struct igb_adapter *); 419extern void igb_power_up_link(struct igb_adapter *);
420#ifdef CONFIG_IGB_PTP
421extern void igb_ptp_init(struct igb_adapter *adapter);
422extern void igb_ptp_remove(struct igb_adapter *adapter);
423
424extern void igb_systim_to_hwtstamp(struct igb_adapter *adapter,
425 struct skb_shared_hwtstamps *hwtstamps,
426 u64 systim);
417 427
428#endif
418static inline s32 igb_reset_phy(struct e1000_hw *hw) 429static inline s32 igb_reset_phy(struct e1000_hw *hw)
419{ 430{
420 if (hw->phy.ops.reset) 431 if (hw->phy.ops.reset)
diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c
index 5ec31598ee47..f022ff7900f7 100644
--- a/drivers/net/ethernet/intel/igb/igb_main.c
+++ b/drivers/net/ethernet/intel/igb/igb_main.c
@@ -114,7 +114,6 @@ static void igb_free_all_rx_resources(struct igb_adapter *);
114static void igb_setup_mrqc(struct igb_adapter *); 114static void igb_setup_mrqc(struct igb_adapter *);
115static int igb_probe(struct pci_dev *, const struct pci_device_id *); 115static int igb_probe(struct pci_dev *, const struct pci_device_id *);
116static void __devexit igb_remove(struct pci_dev *pdev); 116static void __devexit igb_remove(struct pci_dev *pdev);
117static void igb_init_hw_timer(struct igb_adapter *adapter);
118static int igb_sw_init(struct igb_adapter *); 117static int igb_sw_init(struct igb_adapter *);
119static int igb_open(struct net_device *); 118static int igb_open(struct net_device *);
120static int igb_close(struct net_device *); 119static int igb_close(struct net_device *);
@@ -565,33 +564,6 @@ exit:
565 return; 564 return;
566} 565}
567 566
568
569/**
570 * igb_read_clock - read raw cycle counter (to be used by time counter)
571 */
572static cycle_t igb_read_clock(const struct cyclecounter *tc)
573{
574 struct igb_adapter *adapter =
575 container_of(tc, struct igb_adapter, cycles);
576 struct e1000_hw *hw = &adapter->hw;
577 u64 stamp = 0;
578 int shift = 0;
579
580 /*
581 * The timestamp latches on lowest register read. For the 82580
582 * the lowest register is SYSTIMR instead of SYSTIML. However we never
583 * adjusted TIMINCA so SYSTIMR will just read as all 0s so ignore it.
584 */
585 if (hw->mac.type >= e1000_82580) {
586 stamp = rd32(E1000_SYSTIMR) >> 8;
587 shift = IGB_82580_TSYNC_SHIFT;
588 }
589
590 stamp |= (u64)rd32(E1000_SYSTIML) << shift;
591 stamp |= (u64)rd32(E1000_SYSTIMH) << (shift + 32);
592 return stamp;
593}
594
595/** 567/**
596 * igb_get_hw_dev - return device 568 * igb_get_hw_dev - return device
597 * used by hardware layer to print debugging information 569 * used by hardware layer to print debugging information
@@ -2110,9 +2082,11 @@ static int __devinit igb_probe(struct pci_dev *pdev,
2110 } 2082 }
2111 2083
2112#endif 2084#endif
2085#ifdef CONFIG_IGB_PTP
2113 /* do hw tstamp init after resetting */ 2086 /* do hw tstamp init after resetting */
2114 igb_init_hw_timer(adapter); 2087 igb_ptp_init(adapter);
2115 2088
2089#endif
2116 dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n"); 2090 dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2117 /* print bus type/speed/width info */ 2091 /* print bus type/speed/width info */
2118 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n", 2092 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
@@ -2184,7 +2158,10 @@ static void __devexit igb_remove(struct pci_dev *pdev)
2184 struct e1000_hw *hw = &adapter->hw; 2158 struct e1000_hw *hw = &adapter->hw;
2185 2159
2186 pm_runtime_get_noresume(&pdev->dev); 2160 pm_runtime_get_noresume(&pdev->dev);
2161#ifdef CONFIG_IGB_PTP
2162 igb_ptp_remove(adapter);
2187 2163
2164#endif
2188 /* 2165 /*
2189 * The watchdog timer may be rescheduled, so explicitly 2166 * The watchdog timer may be rescheduled, so explicitly
2190 * disable watchdog from being rescheduled. 2167 * disable watchdog from being rescheduled.
@@ -2304,112 +2281,6 @@ out:
2304} 2281}
2305 2282
2306/** 2283/**
2307 * igb_init_hw_timer - Initialize hardware timer used with IEEE 1588 timestamp
2308 * @adapter: board private structure to initialize
2309 *
2310 * igb_init_hw_timer initializes the function pointer and values for the hw
2311 * timer found in hardware.
2312 **/
2313static void igb_init_hw_timer(struct igb_adapter *adapter)
2314{
2315 struct e1000_hw *hw = &adapter->hw;
2316
2317 switch (hw->mac.type) {
2318 case e1000_i350:
2319 case e1000_82580:
2320 memset(&adapter->cycles, 0, sizeof(adapter->cycles));
2321 adapter->cycles.read = igb_read_clock;
2322 adapter->cycles.mask = CLOCKSOURCE_MASK(64);
2323 adapter->cycles.mult = 1;
2324 /*
2325 * The 82580 timesync updates the system timer every 8ns by 8ns
2326 * and the value cannot be shifted. Instead we need to shift
2327 * the registers to generate a 64bit timer value. As a result
2328 * SYSTIMR/L/H, TXSTMPL/H, RXSTMPL/H all have to be shifted by
2329 * 24 in order to generate a larger value for synchronization.
2330 */
2331 adapter->cycles.shift = IGB_82580_TSYNC_SHIFT;
2332 /* disable system timer temporarily by setting bit 31 */
2333 wr32(E1000_TSAUXC, 0x80000000);
2334 wrfl();
2335
2336 /* Set registers so that rollover occurs soon to test this. */
2337 wr32(E1000_SYSTIMR, 0x00000000);
2338 wr32(E1000_SYSTIML, 0x80000000);
2339 wr32(E1000_SYSTIMH, 0x000000FF);
2340 wrfl();
2341
2342 /* enable system timer by clearing bit 31 */
2343 wr32(E1000_TSAUXC, 0x0);
2344 wrfl();
2345
2346 timecounter_init(&adapter->clock,
2347 &adapter->cycles,
2348 ktime_to_ns(ktime_get_real()));
2349 /*
2350 * Synchronize our NIC clock against system wall clock. NIC
2351 * time stamp reading requires ~3us per sample, each sample
2352 * was pretty stable even under load => only require 10
2353 * samples for each offset comparison.
2354 */
2355 memset(&adapter->compare, 0, sizeof(adapter->compare));
2356 adapter->compare.source = &adapter->clock;
2357 adapter->compare.target = ktime_get_real;
2358 adapter->compare.num_samples = 10;
2359 timecompare_update(&adapter->compare, 0);
2360 break;
2361 case e1000_82576:
2362 /*
2363 * Initialize hardware timer: we keep it running just in case
2364 * that some program needs it later on.
2365 */
2366 memset(&adapter->cycles, 0, sizeof(adapter->cycles));
2367 adapter->cycles.read = igb_read_clock;
2368 adapter->cycles.mask = CLOCKSOURCE_MASK(64);
2369 adapter->cycles.mult = 1;
2370 /**
2371 * Scale the NIC clock cycle by a large factor so that
2372 * relatively small clock corrections can be added or
2373 * subtracted at each clock tick. The drawbacks of a large
2374 * factor are a) that the clock register overflows more quickly
2375 * (not such a big deal) and b) that the increment per tick has
2376 * to fit into 24 bits. As a result we need to use a shift of
2377 * 19 so we can fit a value of 16 into the TIMINCA register.
2378 */
2379 adapter->cycles.shift = IGB_82576_TSYNC_SHIFT;
2380 wr32(E1000_TIMINCA,
2381 (1 << E1000_TIMINCA_16NS_SHIFT) |
2382 (16 << IGB_82576_TSYNC_SHIFT));
2383
2384 /* Set registers so that rollover occurs soon to test this. */
2385 wr32(E1000_SYSTIML, 0x00000000);
2386 wr32(E1000_SYSTIMH, 0xFF800000);
2387 wrfl();
2388
2389 timecounter_init(&adapter->clock,
2390 &adapter->cycles,
2391 ktime_to_ns(ktime_get_real()));
2392 /*
2393 * Synchronize our NIC clock against system wall clock. NIC
2394 * time stamp reading requires ~3us per sample, each sample
2395 * was pretty stable even under load => only require 10
2396 * samples for each offset comparison.
2397 */
2398 memset(&adapter->compare, 0, sizeof(adapter->compare));
2399 adapter->compare.source = &adapter->clock;
2400 adapter->compare.target = ktime_get_real;
2401 adapter->compare.num_samples = 10;
2402 timecompare_update(&adapter->compare, 0);
2403 break;
2404 case e1000_82575:
2405 /* 82575 does not support timesync */
2406 default:
2407 break;
2408 }
2409
2410}
2411
2412/**
2413 * igb_sw_init - Initialize general software structures (struct igb_adapter) 2284 * igb_sw_init - Initialize general software structures (struct igb_adapter)
2414 * @adapter: board private structure to initialize 2285 * @adapter: board private structure to initialize
2415 * 2286 *
@@ -5718,35 +5589,7 @@ static int igb_poll(struct napi_struct *napi, int budget)
5718 return 0; 5589 return 0;
5719} 5590}
5720 5591
5721/** 5592#ifdef CONFIG_IGB_PTP
5722 * igb_systim_to_hwtstamp - convert system time value to hw timestamp
5723 * @adapter: board private structure
5724 * @shhwtstamps: timestamp structure to update
5725 * @regval: unsigned 64bit system time value.
5726 *
5727 * We need to convert the system time value stored in the RX/TXSTMP registers
5728 * into a hwtstamp which can be used by the upper level timestamping functions
5729 */
5730static void igb_systim_to_hwtstamp(struct igb_adapter *adapter,
5731 struct skb_shared_hwtstamps *shhwtstamps,
5732 u64 regval)
5733{
5734 u64 ns;
5735
5736 /*
5737 * The 82580 starts with 1ns at bit 0 in RX/TXSTMPL, shift this up to
5738 * 24 to match clock shift we setup earlier.
5739 */
5740 if (adapter->hw.mac.type >= e1000_82580)
5741 regval <<= IGB_82580_TSYNC_SHIFT;
5742
5743 ns = timecounter_cyc2time(&adapter->clock, regval);
5744 timecompare_update(&adapter->compare, ns);
5745 memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));
5746 shhwtstamps->hwtstamp = ns_to_ktime(ns);
5747 shhwtstamps->syststamp = timecompare_transform(&adapter->compare, ns);
5748}
5749
5750/** 5593/**
5751 * igb_tx_hwtstamp - utility function which checks for TX time stamp 5594 * igb_tx_hwtstamp - utility function which checks for TX time stamp
5752 * @q_vector: pointer to q_vector containing needed info 5595 * @q_vector: pointer to q_vector containing needed info
@@ -5776,6 +5619,7 @@ static void igb_tx_hwtstamp(struct igb_q_vector *q_vector,
5776 skb_tstamp_tx(buffer_info->skb, &shhwtstamps); 5619 skb_tstamp_tx(buffer_info->skb, &shhwtstamps);
5777} 5620}
5778 5621
5622#endif
5779/** 5623/**
5780 * igb_clean_tx_irq - Reclaim resources after transmit completes 5624 * igb_clean_tx_irq - Reclaim resources after transmit completes
5781 * @q_vector: pointer to q_vector containing needed info 5625 * @q_vector: pointer to q_vector containing needed info
@@ -5819,9 +5663,11 @@ static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
5819 total_bytes += tx_buffer->bytecount; 5663 total_bytes += tx_buffer->bytecount;
5820 total_packets += tx_buffer->gso_segs; 5664 total_packets += tx_buffer->gso_segs;
5821 5665
5666#ifdef CONFIG_IGB_PTP
5822 /* retrieve hardware timestamp */ 5667 /* retrieve hardware timestamp */
5823 igb_tx_hwtstamp(q_vector, tx_buffer); 5668 igb_tx_hwtstamp(q_vector, tx_buffer);
5824 5669
5670#endif
5825 /* free the skb */ 5671 /* free the skb */
5826 dev_kfree_skb_any(tx_buffer->skb); 5672 dev_kfree_skb_any(tx_buffer->skb);
5827 tx_buffer->skb = NULL; 5673 tx_buffer->skb = NULL;
@@ -5993,6 +5839,7 @@ static inline void igb_rx_hash(struct igb_ring *ring,
5993 skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss); 5839 skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
5994} 5840}
5995 5841
5842#ifdef CONFIG_IGB_PTP
5996static void igb_rx_hwtstamp(struct igb_q_vector *q_vector, 5843static void igb_rx_hwtstamp(struct igb_q_vector *q_vector,
5997 union e1000_adv_rx_desc *rx_desc, 5844 union e1000_adv_rx_desc *rx_desc,
5998 struct sk_buff *skb) 5845 struct sk_buff *skb)
@@ -6032,6 +5879,7 @@ static void igb_rx_hwtstamp(struct igb_q_vector *q_vector,
6032 igb_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), regval); 5879 igb_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), regval);
6033} 5880}
6034 5881
5882#endif
6035static void igb_rx_vlan(struct igb_ring *ring, 5883static void igb_rx_vlan(struct igb_ring *ring,
6036 union e1000_adv_rx_desc *rx_desc, 5884 union e1000_adv_rx_desc *rx_desc,
6037 struct sk_buff *skb) 5885 struct sk_buff *skb)
@@ -6142,7 +5990,9 @@ static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
6142 goto next_desc; 5990 goto next_desc;
6143 } 5991 }
6144 5992
5993#ifdef CONFIG_IGB_PTP
6145 igb_rx_hwtstamp(q_vector, rx_desc, skb); 5994 igb_rx_hwtstamp(q_vector, rx_desc, skb);
5995#endif
6146 igb_rx_hash(rx_ring, rx_desc, skb); 5996 igb_rx_hash(rx_ring, rx_desc, skb);
6147 igb_rx_checksum(rx_ring, rx_desc, skb); 5997 igb_rx_checksum(rx_ring, rx_desc, skb);
6148 igb_rx_vlan(rx_ring, rx_desc, skb); 5998 igb_rx_vlan(rx_ring, rx_desc, skb);
diff --git a/drivers/net/ethernet/intel/igb/igb_ptp.c b/drivers/net/ethernet/intel/igb/igb_ptp.c
new file mode 100644
index 000000000000..c9b71c5bc475
--- /dev/null
+++ b/drivers/net/ethernet/intel/igb/igb_ptp.c
@@ -0,0 +1,381 @@
1/*
2 * PTP Hardware Clock (PHC) driver for the Intel 82576 and 82580
3 *
4 * Copyright (C) 2011 Richard Cochran <richardcochran@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20#include <linux/module.h>
21#include <linux/device.h>
22#include <linux/pci.h>
23
24#include "igb.h"
25
26#define INCVALUE_MASK 0x7fffffff
27#define ISGN 0x80000000
28
29/*
30 * The 82580 timesync updates the system timer every 8ns by 8ns,
31 * and this update value cannot be reprogrammed.
32 *
33 * Neither the 82576 nor the 82580 offer registers wide enough to hold
34 * nanoseconds time values for very long. For the 82580, SYSTIM always
35 * counts nanoseconds, but the upper 24 bits are not availible. The
36 * frequency is adjusted by changing the 32 bit fractional nanoseconds
37 * register, TIMINCA.
38 *
39 * For the 82576, the SYSTIM register time unit is affect by the
40 * choice of the 24 bit TININCA:IV (incvalue) field. Five bits of this
41 * field are needed to provide the nominal 16 nanosecond period,
42 * leaving 19 bits for fractional nanoseconds.
43 *
44 * We scale the NIC clock cycle by a large factor so that relatively
45 * small clock corrections can be added or subtracted at each clock
46 * tick. The drawbacks of a large factor are a) that the clock
47 * register overflows more quickly (not such a big deal) and b) that
48 * the increment per tick has to fit into 24 bits. As a result we
49 * need to use a shift of 19 so we can fit a value of 16 into the
50 * TIMINCA register.
51 *
52 *
53 * SYSTIMH SYSTIML
54 * +--------------+ +---+---+------+
55 * 82576 | 32 | | 8 | 5 | 19 |
56 * +--------------+ +---+---+------+
57 * \________ 45 bits _______/ fract
58 *
59 * +----------+---+ +--------------+
60 * 82580 | 24 | 8 | | 32 |
61 * +----------+---+ +--------------+
62 * reserved \______ 40 bits _____/
63 *
64 *
65 * The 45 bit 82576 SYSTIM overflows every
66 * 2^45 * 10^-9 / 3600 = 9.77 hours.
67 *
68 * The 40 bit 82580 SYSTIM overflows every
69 * 2^40 * 10^-9 / 60 = 18.3 minutes.
70 */
71
72#define IGB_OVERFLOW_PERIOD (HZ * 60 * 9)
73#define INCPERIOD_82576 (1 << E1000_TIMINCA_16NS_SHIFT)
74#define INCVALUE_82576_MASK ((1 << E1000_TIMINCA_16NS_SHIFT) - 1)
75#define INCVALUE_82576 (16 << IGB_82576_TSYNC_SHIFT)
76#define IGB_NBITS_82580 40
77
78/*
79 * SYSTIM read access for the 82576
80 */
81
82static cycle_t igb_82576_systim_read(const struct cyclecounter *cc)
83{
84 u64 val;
85 u32 lo, hi;
86 struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);
87 struct e1000_hw *hw = &igb->hw;
88
89 lo = rd32(E1000_SYSTIML);
90 hi = rd32(E1000_SYSTIMH);
91
92 val = ((u64) hi) << 32;
93 val |= lo;
94
95 return val;
96}
97
98/*
99 * SYSTIM read access for the 82580
100 */
101
102static cycle_t igb_82580_systim_read(const struct cyclecounter *cc)
103{
104 u64 val;
105 u32 lo, hi, jk;
106 struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);
107 struct e1000_hw *hw = &igb->hw;
108
109 /*
110 * The timestamp latches on lowest register read. For the 82580
111 * the lowest register is SYSTIMR instead of SYSTIML. However we only
112 * need to provide nanosecond resolution, so we just ignore it.
113 */
114 jk = rd32(E1000_SYSTIMR);
115 lo = rd32(E1000_SYSTIML);
116 hi = rd32(E1000_SYSTIMH);
117
118 val = ((u64) hi) << 32;
119 val |= lo;
120
121 return val;
122}
123
124/*
125 * PTP clock operations
126 */
127
128static int ptp_82576_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
129{
130 u64 rate;
131 u32 incvalue;
132 int neg_adj = 0;
133 struct igb_adapter *igb = container_of(ptp, struct igb_adapter, caps);
134 struct e1000_hw *hw = &igb->hw;
135
136 if (ppb < 0) {
137 neg_adj = 1;
138 ppb = -ppb;
139 }
140 rate = ppb;
141 rate <<= 14;
142 rate = div_u64(rate, 1953125);
143
144 incvalue = 16 << IGB_82576_TSYNC_SHIFT;
145
146 if (neg_adj)
147 incvalue -= rate;
148 else
149 incvalue += rate;
150
151 wr32(E1000_TIMINCA, INCPERIOD_82576 | (incvalue & INCVALUE_82576_MASK));
152
153 return 0;
154}
155
156static int ptp_82580_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
157{
158 u64 rate;
159 u32 inca;
160 int neg_adj = 0;
161 struct igb_adapter *igb = container_of(ptp, struct igb_adapter, caps);
162 struct e1000_hw *hw = &igb->hw;
163
164 if (ppb < 0) {
165 neg_adj = 1;
166 ppb = -ppb;
167 }
168 rate = ppb;
169 rate <<= 26;
170 rate = div_u64(rate, 1953125);
171
172 inca = rate & INCVALUE_MASK;
173 if (neg_adj)
174 inca |= ISGN;
175
176 wr32(E1000_TIMINCA, inca);
177
178 return 0;
179}
180
181static int igb_adjtime(struct ptp_clock_info *ptp, s64 delta)
182{
183 s64 now;
184 unsigned long flags;
185 struct igb_adapter *igb = container_of(ptp, struct igb_adapter, caps);
186
187 spin_lock_irqsave(&igb->tmreg_lock, flags);
188
189 now = timecounter_read(&igb->tc);
190 now += delta;
191 timecounter_init(&igb->tc, &igb->cc, now);
192
193 spin_unlock_irqrestore(&igb->tmreg_lock, flags);
194
195 return 0;
196}
197
198static int igb_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
199{
200 u64 ns;
201 u32 remainder;
202 unsigned long flags;
203 struct igb_adapter *igb = container_of(ptp, struct igb_adapter, caps);
204
205 spin_lock_irqsave(&igb->tmreg_lock, flags);
206
207 ns = timecounter_read(&igb->tc);
208
209 spin_unlock_irqrestore(&igb->tmreg_lock, flags);
210
211 ts->tv_sec = div_u64_rem(ns, 1000000000, &remainder);
212 ts->tv_nsec = remainder;
213
214 return 0;
215}
216
217static int igb_settime(struct ptp_clock_info *ptp, const struct timespec *ts)
218{
219 u64 ns;
220 unsigned long flags;
221 struct igb_adapter *igb = container_of(ptp, struct igb_adapter, caps);
222
223 ns = ts->tv_sec * 1000000000ULL;
224 ns += ts->tv_nsec;
225
226 spin_lock_irqsave(&igb->tmreg_lock, flags);
227
228 timecounter_init(&igb->tc, &igb->cc, ns);
229
230 spin_unlock_irqrestore(&igb->tmreg_lock, flags);
231
232 return 0;
233}
234
235static int ptp_82576_enable(struct ptp_clock_info *ptp,
236 struct ptp_clock_request *rq, int on)
237{
238 return -EOPNOTSUPP;
239}
240
241static int ptp_82580_enable(struct ptp_clock_info *ptp,
242 struct ptp_clock_request *rq, int on)
243{
244 return -EOPNOTSUPP;
245}
246
247static void igb_overflow_check(struct work_struct *work)
248{
249 struct timespec ts;
250 struct igb_adapter *igb =
251 container_of(work, struct igb_adapter, overflow_work.work);
252
253 igb_gettime(&igb->caps, &ts);
254
255 pr_debug("igb overflow check at %ld.%09lu\n", ts.tv_sec, ts.tv_nsec);
256
257 schedule_delayed_work(&igb->overflow_work, IGB_OVERFLOW_PERIOD);
258}
259
260void igb_ptp_init(struct igb_adapter *adapter)
261{
262 struct e1000_hw *hw = &adapter->hw;
263
264 switch (hw->mac.type) {
265 case e1000_i350:
266 case e1000_82580:
267 adapter->caps.owner = THIS_MODULE;
268 strcpy(adapter->caps.name, "igb-82580");
269 adapter->caps.max_adj = 62499999;
270 adapter->caps.n_ext_ts = 0;
271 adapter->caps.pps = 0;
272 adapter->caps.adjfreq = ptp_82580_adjfreq;
273 adapter->caps.adjtime = igb_adjtime;
274 adapter->caps.gettime = igb_gettime;
275 adapter->caps.settime = igb_settime;
276 adapter->caps.enable = ptp_82580_enable;
277 adapter->cc.read = igb_82580_systim_read;
278 adapter->cc.mask = CLOCKSOURCE_MASK(IGB_NBITS_82580);
279 adapter->cc.mult = 1;
280 adapter->cc.shift = 0;
281 /* Enable the timer functions by clearing bit 31. */
282 wr32(E1000_TSAUXC, 0x0);
283 break;
284
285 case e1000_82576:
286 adapter->caps.owner = THIS_MODULE;
287 strcpy(adapter->caps.name, "igb-82576");
288 adapter->caps.max_adj = 1000000000;
289 adapter->caps.n_ext_ts = 0;
290 adapter->caps.pps = 0;
291 adapter->caps.adjfreq = ptp_82576_adjfreq;
292 adapter->caps.adjtime = igb_adjtime;
293 adapter->caps.gettime = igb_gettime;
294 adapter->caps.settime = igb_settime;
295 adapter->caps.enable = ptp_82576_enable;
296 adapter->cc.read = igb_82576_systim_read;
297 adapter->cc.mask = CLOCKSOURCE_MASK(64);
298 adapter->cc.mult = 1;
299 adapter->cc.shift = IGB_82576_TSYNC_SHIFT;
300 /* Dial the nominal frequency. */
301 wr32(E1000_TIMINCA, INCPERIOD_82576 | INCVALUE_82576);
302 break;
303
304 default:
305 adapter->ptp_clock = NULL;
306 return;
307 }
308
309 wrfl();
310
311 timecounter_init(&adapter->tc, &adapter->cc,
312 ktime_to_ns(ktime_get_real()));
313
314 INIT_DELAYED_WORK(&adapter->overflow_work, igb_overflow_check);
315
316 spin_lock_init(&adapter->tmreg_lock);
317
318 schedule_delayed_work(&adapter->overflow_work, IGB_OVERFLOW_PERIOD);
319
320 adapter->ptp_clock = ptp_clock_register(&adapter->caps);
321 if (IS_ERR(adapter->ptp_clock)) {
322 adapter->ptp_clock = NULL;
323 dev_err(&adapter->pdev->dev, "ptp_clock_register failed\n");
324 } else
325 dev_info(&adapter->pdev->dev, "added PHC on %s\n",
326 adapter->netdev->name);
327}
328
329void igb_ptp_remove(struct igb_adapter *adapter)
330{
331 cancel_delayed_work_sync(&adapter->overflow_work);
332
333 if (adapter->ptp_clock) {
334 ptp_clock_unregister(adapter->ptp_clock);
335 dev_info(&adapter->pdev->dev, "removed PHC on %s\n",
336 adapter->netdev->name);
337 }
338}
339
340/**
341 * igb_systim_to_hwtstamp - convert system time value to hw timestamp
342 * @adapter: board private structure
343 * @hwtstamps: timestamp structure to update
344 * @systim: unsigned 64bit system time value.
345 *
346 * We need to convert the system time value stored in the RX/TXSTMP registers
347 * into a hwtstamp which can be used by the upper level timestamping functions.
348 *
349 * The 'tmreg_lock' spinlock is used to protect the consistency of the
350 * system time value. This is needed because reading the 64 bit time
351 * value involves reading two (or three) 32 bit registers. The first
352 * read latches the value. Ditto for writing.
353 *
354 * In addition, here have extended the system time with an overflow
355 * counter in software.
356 **/
357void igb_systim_to_hwtstamp(struct igb_adapter *adapter,
358 struct skb_shared_hwtstamps *hwtstamps,
359 u64 systim)
360{
361 u64 ns;
362 unsigned long flags;
363
364 switch (adapter->hw.mac.type) {
365 case e1000_i350:
366 case e1000_82580:
367 case e1000_82576:
368 break;
369 default:
370 return;
371 }
372
373 spin_lock_irqsave(&adapter->tmreg_lock, flags);
374
375 ns = timecounter_cyc2time(&adapter->tc, systim);
376
377 spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
378
379 memset(hwtstamps, 0, sizeof(*hwtstamps));
380 hwtstamps->hwtstamp = ns_to_ktime(ns);
381}
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c
index 85d2e2c4ce4a..56fd46844f65 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c
@@ -91,29 +91,6 @@ out:
91 IXGBE_WRITE_REG(hw, IXGBE_GCR, gcr); 91 IXGBE_WRITE_REG(hw, IXGBE_GCR, gcr);
92} 92}
93 93
94/**
95 * ixgbe_get_pcie_msix_count_82598 - Gets MSI-X vector count
96 * @hw: pointer to hardware structure
97 *
98 * Read PCIe configuration space, and get the MSI-X vector count from
99 * the capabilities table.
100 **/
101static u16 ixgbe_get_pcie_msix_count_82598(struct ixgbe_hw *hw)
102{
103 struct ixgbe_adapter *adapter = hw->back;
104 u16 msix_count;
105 pci_read_config_word(adapter->pdev, IXGBE_PCIE_MSIX_82598_CAPS,
106 &msix_count);
107 msix_count &= IXGBE_PCIE_MSIX_TBL_SZ_MASK;
108
109 /* MSI-X count is zero-based in HW, so increment to give proper value */
110 msix_count++;
111
112 return msix_count;
113}
114
115/**
116 */
117static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw) 94static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw)
118{ 95{
119 struct ixgbe_mac_info *mac = &hw->mac; 96 struct ixgbe_mac_info *mac = &hw->mac;
@@ -126,7 +103,7 @@ static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw)
126 mac->num_rar_entries = IXGBE_82598_RAR_ENTRIES; 103 mac->num_rar_entries = IXGBE_82598_RAR_ENTRIES;
127 mac->max_rx_queues = IXGBE_82598_MAX_RX_QUEUES; 104 mac->max_rx_queues = IXGBE_82598_MAX_RX_QUEUES;
128 mac->max_tx_queues = IXGBE_82598_MAX_TX_QUEUES; 105 mac->max_tx_queues = IXGBE_82598_MAX_TX_QUEUES;
129 mac->max_msix_vectors = ixgbe_get_pcie_msix_count_82598(hw); 106 mac->max_msix_vectors = ixgbe_get_pcie_msix_count_generic(hw);
130 107
131 return 0; 108 return 0;
132} 109}
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
index 49aa41fe7b84..e59888163a17 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
@@ -2783,17 +2783,36 @@ san_mac_addr_out:
2783 * Read PCIe configuration space, and get the MSI-X vector count from 2783 * Read PCIe configuration space, and get the MSI-X vector count from
2784 * the capabilities table. 2784 * the capabilities table.
2785 **/ 2785 **/
2786u32 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw) 2786u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw)
2787{ 2787{
2788 struct ixgbe_adapter *adapter = hw->back; 2788 struct ixgbe_adapter *adapter = hw->back;
2789 u16 msix_count; 2789 u16 msix_count = 1;
2790 pci_read_config_word(adapter->pdev, IXGBE_PCIE_MSIX_82599_CAPS, 2790 u16 max_msix_count;
2791 &msix_count); 2791 u16 pcie_offset;
2792
2793 switch (hw->mac.type) {
2794 case ixgbe_mac_82598EB:
2795 pcie_offset = IXGBE_PCIE_MSIX_82598_CAPS;
2796 max_msix_count = IXGBE_MAX_MSIX_VECTORS_82598;
2797 break;
2798 case ixgbe_mac_82599EB:
2799 case ixgbe_mac_X540:
2800 pcie_offset = IXGBE_PCIE_MSIX_82599_CAPS;
2801 max_msix_count = IXGBE_MAX_MSIX_VECTORS_82599;
2802 break;
2803 default:
2804 return msix_count;
2805 }
2806
2807 pci_read_config_word(adapter->pdev, pcie_offset, &msix_count);
2792 msix_count &= IXGBE_PCIE_MSIX_TBL_SZ_MASK; 2808 msix_count &= IXGBE_PCIE_MSIX_TBL_SZ_MASK;
2793 2809
2794 /* MSI-X count is zero-based in HW, so increment to give proper value */ 2810 /* MSI-X count is zero-based in HW */
2795 msix_count++; 2811 msix_count++;
2796 2812
2813 if (msix_count > max_msix_count)
2814 msix_count = max_msix_count;
2815
2797 return msix_count; 2816 return msix_count;
2798} 2817}
2799 2818
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h
index 204f06235b45..d6d34324540c 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h
@@ -31,7 +31,7 @@
31#include "ixgbe_type.h" 31#include "ixgbe_type.h"
32#include "ixgbe.h" 32#include "ixgbe.h"
33 33
34u32 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw); 34u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);
35s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw); 35s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);
36s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw); 36s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);
37s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw); 37s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
index 8636e8344fc9..ffa6679e943b 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
@@ -1681,7 +1681,9 @@ enum {
1681#define IXGBE_DEVICE_CAPS 0x2C 1681#define IXGBE_DEVICE_CAPS 0x2C
1682#define IXGBE_SERIAL_NUMBER_MAC_ADDR 0x11 1682#define IXGBE_SERIAL_NUMBER_MAC_ADDR 0x11
1683#define IXGBE_PCIE_MSIX_82599_CAPS 0x72 1683#define IXGBE_PCIE_MSIX_82599_CAPS 0x72
1684#define IXGBE_MAX_MSIX_VECTORS_82599 0x40
1684#define IXGBE_PCIE_MSIX_82598_CAPS 0x62 1685#define IXGBE_PCIE_MSIX_82598_CAPS 0x62
1686#define IXGBE_MAX_MSIX_VECTORS_82598 0x13
1685 1687
1686/* MSI-X capability fields masks */ 1688/* MSI-X capability fields masks */
1687#define IXGBE_PCIE_MSIX_TBL_SZ_MASK 0x7FF 1689#define IXGBE_PCIE_MSIX_TBL_SZ_MASK 0x7FF
@@ -2813,6 +2815,7 @@ struct ixgbe_mac_info {
2813 u16 wwnn_prefix; 2815 u16 wwnn_prefix;
2814 /* prefix for World Wide Port Name (WWPN) */ 2816 /* prefix for World Wide Port Name (WWPN) */
2815 u16 wwpn_prefix; 2817 u16 wwpn_prefix;
2818 u16 max_msix_vectors;
2816#define IXGBE_MAX_MTA 128 2819#define IXGBE_MAX_MTA 128
2817 u32 mta_shadow[IXGBE_MAX_MTA]; 2820 u32 mta_shadow[IXGBE_MAX_MTA];
2818 s32 mc_filter_type; 2821 s32 mc_filter_type;
@@ -2823,7 +2826,6 @@ struct ixgbe_mac_info {
2823 u32 rx_pb_size; 2826 u32 rx_pb_size;
2824 u32 max_tx_queues; 2827 u32 max_tx_queues;
2825 u32 max_rx_queues; 2828 u32 max_rx_queues;
2826 u32 max_msix_vectors;
2827 u32 orig_autoc; 2829 u32 orig_autoc;
2828 u32 orig_autoc2; 2830 u32 orig_autoc2;
2829 bool orig_link_settings_stored; 2831 bool orig_link_settings_stored;
diff --git a/drivers/net/ethernet/marvell/mv643xx_eth.c b/drivers/net/ethernet/marvell/mv643xx_eth.c
index 5e1ca0f05090..c8950da60e6b 100644
--- a/drivers/net/ethernet/marvell/mv643xx_eth.c
+++ b/drivers/net/ethernet/marvell/mv643xx_eth.c
@@ -1665,6 +1665,7 @@ static const struct ethtool_ops mv643xx_eth_ethtool_ops = {
1665 .get_strings = mv643xx_eth_get_strings, 1665 .get_strings = mv643xx_eth_get_strings,
1666 .get_ethtool_stats = mv643xx_eth_get_ethtool_stats, 1666 .get_ethtool_stats = mv643xx_eth_get_ethtool_stats,
1667 .get_sset_count = mv643xx_eth_get_sset_count, 1667 .get_sset_count = mv643xx_eth_get_sset_count,
1668 .get_ts_info = ethtool_op_get_ts_info,
1668}; 1669};
1669 1670
1670 1671
diff --git a/drivers/net/ethernet/marvell/pxa168_eth.c b/drivers/net/ethernet/marvell/pxa168_eth.c
index efec6b60b327..1db023b075a1 100644
--- a/drivers/net/ethernet/marvell/pxa168_eth.c
+++ b/drivers/net/ethernet/marvell/pxa168_eth.c
@@ -1456,6 +1456,7 @@ static const struct ethtool_ops pxa168_ethtool_ops = {
1456 .set_settings = pxa168_set_settings, 1456 .set_settings = pxa168_set_settings,
1457 .get_drvinfo = pxa168_get_drvinfo, 1457 .get_drvinfo = pxa168_get_drvinfo,
1458 .get_link = ethtool_op_get_link, 1458 .get_link = ethtool_op_get_link,
1459 .get_ts_info = ethtool_op_get_ts_info,
1459}; 1460};
1460 1461
1461static const struct net_device_ops pxa168_eth_netdev_ops = { 1462static const struct net_device_ops pxa168_eth_netdev_ops = {
diff --git a/drivers/net/ethernet/marvell/sky2.c b/drivers/net/ethernet/marvell/sky2.c
index c9b504e2dfc3..7732474263da 100644
--- a/drivers/net/ethernet/marvell/sky2.c
+++ b/drivers/net/ethernet/marvell/sky2.c
@@ -4816,14 +4816,14 @@ static int __devinit sky2_test_msi(struct sky2_hw *hw)
4816 4816
4817 init_waitqueue_head(&hw->msi_wait); 4817 init_waitqueue_head(&hw->msi_wait);
4818 4818
4819 sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW);
4820
4821 err = request_irq(pdev->irq, sky2_test_intr, 0, DRV_NAME, hw); 4819 err = request_irq(pdev->irq, sky2_test_intr, 0, DRV_NAME, hw);
4822 if (err) { 4820 if (err) {
4823 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq); 4821 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
4824 return err; 4822 return err;
4825 } 4823 }
4826 4824
4825 sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW);
4826
4827 sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ); 4827 sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ);
4828 sky2_read8(hw, B0_CTST); 4828 sky2_read8(hw, B0_CTST);
4829 4829
diff --git a/drivers/net/ethernet/mellanox/mlx4/Kconfig b/drivers/net/ethernet/mellanox/mlx4/Kconfig
index 1bb93531f1ba..5f027f95cc84 100644
--- a/drivers/net/ethernet/mellanox/mlx4/Kconfig
+++ b/drivers/net/ethernet/mellanox/mlx4/Kconfig
@@ -11,6 +11,18 @@ config MLX4_EN
11 This driver supports Mellanox Technologies ConnectX Ethernet 11 This driver supports Mellanox Technologies ConnectX Ethernet
12 devices. 12 devices.
13 13
14config MLX4_EN_DCB
15 bool "Data Center Bridging (DCB) Support"
16 default y
17 depends on MLX4_EN && DCB
18 ---help---
19 Say Y here if you want to use Data Center Bridging (DCB) in the
20 driver.
21 If set to N, will not be able to configure QoS and ratelimit attributes.
22 This flag is depended on the kernel's DCB support.
23
24 If unsure, set to Y
25
14config MLX4_CORE 26config MLX4_CORE
15 tristate 27 tristate
16 depends on PCI 28 depends on PCI
diff --git a/drivers/net/ethernet/mellanox/mlx4/Makefile b/drivers/net/ethernet/mellanox/mlx4/Makefile
index 4a40ab967eeb..293127d28b33 100644
--- a/drivers/net/ethernet/mellanox/mlx4/Makefile
+++ b/drivers/net/ethernet/mellanox/mlx4/Makefile
@@ -7,3 +7,4 @@ obj-$(CONFIG_MLX4_EN) += mlx4_en.o
7 7
8mlx4_en-y := en_main.o en_tx.o en_rx.o en_ethtool.o en_port.o en_cq.o \ 8mlx4_en-y := en_main.o en_tx.o en_rx.o en_ethtool.o en_port.o en_cq.o \
9 en_resources.o en_netdev.o en_selftest.o 9 en_resources.o en_netdev.o en_selftest.o
10mlx4_en-$(CONFIG_MLX4_EN_DCB) += en_dcb_nl.o
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c b/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c
new file mode 100644
index 000000000000..0cc6c9651473
--- /dev/null
+++ b/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c
@@ -0,0 +1,254 @@
1/*
2 * Copyright (c) 2011 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34#include <linux/dcbnl.h>
35
36#include "mlx4_en.h"
37
38static int mlx4_en_dcbnl_ieee_getets(struct net_device *dev,
39 struct ieee_ets *ets)
40{
41 struct mlx4_en_priv *priv = netdev_priv(dev);
42 struct ieee_ets *my_ets = &priv->ets;
43
44 /* No IEEE PFC settings available */
45 if (!my_ets)
46 return -EINVAL;
47
48 ets->ets_cap = IEEE_8021QAZ_MAX_TCS;
49 ets->cbs = my_ets->cbs;
50 memcpy(ets->tc_tx_bw, my_ets->tc_tx_bw, sizeof(ets->tc_tx_bw));
51 memcpy(ets->tc_tsa, my_ets->tc_tsa, sizeof(ets->tc_tsa));
52 memcpy(ets->prio_tc, my_ets->prio_tc, sizeof(ets->prio_tc));
53
54 return 0;
55}
56
57static int mlx4_en_ets_validate(struct mlx4_en_priv *priv, struct ieee_ets *ets)
58{
59 int i;
60 int total_ets_bw = 0;
61 int has_ets_tc = 0;
62
63 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
64 if (ets->prio_tc[i] > MLX4_EN_NUM_UP) {
65 en_err(priv, "Bad priority in UP <=> TC mapping. TC: %d, UP: %d\n",
66 i, ets->prio_tc[i]);
67 return -EINVAL;
68 }
69
70 switch (ets->tc_tsa[i]) {
71 case IEEE_8021QAZ_TSA_STRICT:
72 break;
73 case IEEE_8021QAZ_TSA_ETS:
74 has_ets_tc = 1;
75 total_ets_bw += ets->tc_tx_bw[i];
76 break;
77 default:
78 en_err(priv, "TC[%d]: Not supported TSA: %d\n",
79 i, ets->tc_tsa[i]);
80 return -ENOTSUPP;
81 }
82 }
83
84 if (has_ets_tc && total_ets_bw != MLX4_EN_BW_MAX) {
85 en_err(priv, "Bad ETS BW sum: %d. Should be exactly 100%%\n",
86 total_ets_bw);
87 return -EINVAL;
88 }
89
90 return 0;
91}
92
93static int mlx4_en_config_port_scheduler(struct mlx4_en_priv *priv,
94 struct ieee_ets *ets, u16 *ratelimit)
95{
96 struct mlx4_en_dev *mdev = priv->mdev;
97 int num_strict = 0;
98 int i;
99 __u8 tc_tx_bw[IEEE_8021QAZ_MAX_TCS] = { 0 };
100 __u8 pg[IEEE_8021QAZ_MAX_TCS] = { 0 };
101
102 ets = ets ?: &priv->ets;
103 ratelimit = ratelimit ?: priv->maxrate;
104
105 /* higher TC means higher priority => lower pg */
106 for (i = IEEE_8021QAZ_MAX_TCS - 1; i >= 0; i--) {
107 switch (ets->tc_tsa[i]) {
108 case IEEE_8021QAZ_TSA_STRICT:
109 pg[i] = num_strict++;
110 tc_tx_bw[i] = MLX4_EN_BW_MAX;
111 break;
112 case IEEE_8021QAZ_TSA_ETS:
113 pg[i] = MLX4_EN_TC_ETS;
114 tc_tx_bw[i] = ets->tc_tx_bw[i] ?: MLX4_EN_BW_MIN;
115 break;
116 }
117 }
118
119 return mlx4_SET_PORT_SCHEDULER(mdev->dev, priv->port, tc_tx_bw, pg,
120 ratelimit);
121}
122
123static int
124mlx4_en_dcbnl_ieee_setets(struct net_device *dev, struct ieee_ets *ets)
125{
126 struct mlx4_en_priv *priv = netdev_priv(dev);
127 struct mlx4_en_dev *mdev = priv->mdev;
128 int err;
129
130 err = mlx4_en_ets_validate(priv, ets);
131 if (err)
132 return err;
133
134 err = mlx4_SET_PORT_PRIO2TC(mdev->dev, priv->port, ets->prio_tc);
135 if (err)
136 return err;
137
138 err = mlx4_en_config_port_scheduler(priv, ets, NULL);
139 if (err)
140 return err;
141
142 memcpy(&priv->ets, ets, sizeof(priv->ets));
143
144 return 0;
145}
146
147static int mlx4_en_dcbnl_ieee_getpfc(struct net_device *dev,
148 struct ieee_pfc *pfc)
149{
150 struct mlx4_en_priv *priv = netdev_priv(dev);
151
152 pfc->pfc_cap = IEEE_8021QAZ_MAX_TCS;
153 pfc->pfc_en = priv->prof->tx_ppp;
154
155 return 0;
156}
157
158static int mlx4_en_dcbnl_ieee_setpfc(struct net_device *dev,
159 struct ieee_pfc *pfc)
160{
161 struct mlx4_en_priv *priv = netdev_priv(dev);
162 struct mlx4_en_dev *mdev = priv->mdev;
163 int err;
164
165 en_dbg(DRV, priv, "cap: 0x%x en: 0x%x mbc: 0x%x delay: %d\n",
166 pfc->pfc_cap,
167 pfc->pfc_en,
168 pfc->mbc,
169 pfc->delay);
170
171 priv->prof->rx_pause = priv->prof->tx_pause = !!pfc->pfc_en;
172 priv->prof->rx_ppp = priv->prof->tx_ppp = pfc->pfc_en;
173
174 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
175 priv->rx_skb_size + ETH_FCS_LEN,
176 priv->prof->tx_pause,
177 priv->prof->tx_ppp,
178 priv->prof->rx_pause,
179 priv->prof->rx_ppp);
180 if (err)
181 en_err(priv, "Failed setting pause params\n");
182
183 return err;
184}
185
186static u8 mlx4_en_dcbnl_getdcbx(struct net_device *dev)
187{
188 return DCB_CAP_DCBX_VER_IEEE;
189}
190
191static u8 mlx4_en_dcbnl_setdcbx(struct net_device *dev, u8 mode)
192{
193 if ((mode & DCB_CAP_DCBX_LLD_MANAGED) ||
194 (mode & DCB_CAP_DCBX_VER_CEE) ||
195 !(mode & DCB_CAP_DCBX_VER_IEEE) ||
196 !(mode & DCB_CAP_DCBX_HOST))
197 return 1;
198
199 return 0;
200}
201
202#define MLX4_RATELIMIT_UNITS_IN_KB 100000 /* rate-limit HW unit in Kbps */
203static int mlx4_en_dcbnl_ieee_getmaxrate(struct net_device *dev,
204 struct ieee_maxrate *maxrate)
205{
206 struct mlx4_en_priv *priv = netdev_priv(dev);
207 int i;
208
209 if (!priv->maxrate)
210 return -EINVAL;
211
212 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
213 maxrate->tc_maxrate[i] =
214 priv->maxrate[i] * MLX4_RATELIMIT_UNITS_IN_KB;
215
216 return 0;
217}
218
219static int mlx4_en_dcbnl_ieee_setmaxrate(struct net_device *dev,
220 struct ieee_maxrate *maxrate)
221{
222 struct mlx4_en_priv *priv = netdev_priv(dev);
223 u16 tmp[IEEE_8021QAZ_MAX_TCS];
224 int i, err;
225
226 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
227 /* Convert from Kbps into HW units, rounding result up.
228 * Setting to 0, means unlimited BW.
229 */
230 tmp[i] =
231 (maxrate->tc_maxrate[i] + MLX4_RATELIMIT_UNITS_IN_KB -
232 1) / MLX4_RATELIMIT_UNITS_IN_KB;
233 }
234
235 err = mlx4_en_config_port_scheduler(priv, NULL, tmp);
236 if (err)
237 return err;
238
239 memcpy(priv->maxrate, tmp, sizeof(*priv->maxrate));
240
241 return 0;
242}
243
244const struct dcbnl_rtnl_ops mlx4_en_dcbnl_ops = {
245 .ieee_getets = mlx4_en_dcbnl_ieee_getets,
246 .ieee_setets = mlx4_en_dcbnl_ieee_setets,
247 .ieee_getmaxrate = mlx4_en_dcbnl_ieee_getmaxrate,
248 .ieee_setmaxrate = mlx4_en_dcbnl_ieee_setmaxrate,
249 .ieee_getpfc = mlx4_en_dcbnl_ieee_getpfc,
250 .ieee_setpfc = mlx4_en_dcbnl_ieee_setpfc,
251
252 .getdcbx = mlx4_en_dcbnl_getdcbx,
253 .setdcbx = mlx4_en_dcbnl_setdcbx,
254};
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_main.c b/drivers/net/ethernet/mellanox/mlx4/en_main.c
index 2097a7d3c5b8..346fdb2e92a6 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_main.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_main.c
@@ -114,7 +114,7 @@ static int mlx4_en_get_profile(struct mlx4_en_dev *mdev)
114 params->prof[i].tx_ring_size = MLX4_EN_DEF_TX_RING_SIZE; 114 params->prof[i].tx_ring_size = MLX4_EN_DEF_TX_RING_SIZE;
115 params->prof[i].rx_ring_size = MLX4_EN_DEF_RX_RING_SIZE; 115 params->prof[i].rx_ring_size = MLX4_EN_DEF_RX_RING_SIZE;
116 params->prof[i].tx_ring_num = MLX4_EN_NUM_TX_RINGS + 116 params->prof[i].tx_ring_num = MLX4_EN_NUM_TX_RINGS +
117 (!!pfcrx) * MLX4_EN_NUM_PPP_RINGS; 117 MLX4_EN_NUM_PPP_RINGS;
118 params->prof[i].rss_rings = 0; 118 params->prof[i].rss_rings = 0;
119 } 119 }
120 120
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
index 31b455a49273..35003ada04ec 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
@@ -45,6 +45,14 @@
45#include "mlx4_en.h" 45#include "mlx4_en.h"
46#include "en_port.h" 46#include "en_port.h"
47 47
48static int mlx4_en_setup_tc(struct net_device *dev, u8 up)
49{
50 if (up != MLX4_EN_NUM_UP)
51 return -EINVAL;
52
53 return 0;
54}
55
48static int mlx4_en_vlan_rx_add_vid(struct net_device *dev, unsigned short vid) 56static int mlx4_en_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
49{ 57{
50 struct mlx4_en_priv *priv = netdev_priv(dev); 58 struct mlx4_en_priv *priv = netdev_priv(dev);
@@ -650,7 +658,8 @@ int mlx4_en_start_port(struct net_device *dev)
650 658
651 /* Configure ring */ 659 /* Configure ring */
652 tx_ring = &priv->tx_ring[i]; 660 tx_ring = &priv->tx_ring[i];
653 err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn); 661 err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
662 max(0, i - MLX4_EN_NUM_TX_RINGS));
654 if (err) { 663 if (err) {
655 en_err(priv, "Failed allocating Tx ring\n"); 664 en_err(priv, "Failed allocating Tx ring\n");
656 mlx4_en_deactivate_cq(priv, cq); 665 mlx4_en_deactivate_cq(priv, cq);
@@ -966,6 +975,7 @@ void mlx4_en_destroy_netdev(struct net_device *dev)
966 mutex_unlock(&mdev->state_lock); 975 mutex_unlock(&mdev->state_lock);
967 976
968 mlx4_en_free_resources(priv); 977 mlx4_en_free_resources(priv);
978
969 free_netdev(dev); 979 free_netdev(dev);
970} 980}
971 981
@@ -1036,6 +1046,7 @@ static const struct net_device_ops mlx4_netdev_ops = {
1036 .ndo_poll_controller = mlx4_en_netpoll, 1046 .ndo_poll_controller = mlx4_en_netpoll,
1037#endif 1047#endif
1038 .ndo_set_features = mlx4_en_set_features, 1048 .ndo_set_features = mlx4_en_set_features,
1049 .ndo_setup_tc = mlx4_en_setup_tc,
1039}; 1050};
1040 1051
1041int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, 1052int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
@@ -1079,6 +1090,10 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
1079 INIT_WORK(&priv->watchdog_task, mlx4_en_restart); 1090 INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
1080 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate); 1091 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
1081 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats); 1092 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
1093#ifdef CONFIG_MLX4_EN_DCB
1094 if (!mlx4_is_slave(priv->mdev->dev))
1095 dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
1096#endif
1082 1097
1083 /* Query for default mac and max mtu */ 1098 /* Query for default mac and max mtu */
1084 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port]; 1099 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
@@ -1113,6 +1128,15 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
1113 netif_set_real_num_tx_queues(dev, priv->tx_ring_num); 1128 netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
1114 netif_set_real_num_rx_queues(dev, priv->rx_ring_num); 1129 netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
1115 1130
1131 netdev_set_num_tc(dev, MLX4_EN_NUM_UP);
1132
1133 /* First 9 rings are for UP 0 */
1134 netdev_set_tc_queue(dev, 0, MLX4_EN_NUM_TX_RINGS + 1, 0);
1135
1136 /* Partition Tx queues evenly amongst UP's 1-7 */
1137 for (i = 1; i < MLX4_EN_NUM_UP; i++)
1138 netdev_set_tc_queue(dev, i, 1, MLX4_EN_NUM_TX_RINGS + i);
1139
1116 SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops); 1140 SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops);
1117 1141
1118 /* Set defualt MAC */ 1142 /* Set defualt MAC */
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_port.h b/drivers/net/ethernet/mellanox/mlx4/en_port.h
index 6934fd7e66ed..745090b49d9e 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_port.h
+++ b/drivers/net/ethernet/mellanox/mlx4/en_port.h
@@ -39,6 +39,8 @@
39#define SET_PORT_PROMISC_SHIFT 31 39#define SET_PORT_PROMISC_SHIFT 31
40#define SET_PORT_MC_PROMISC_SHIFT 30 40#define SET_PORT_MC_PROMISC_SHIFT 30
41 41
42#define MLX4_EN_NUM_TC 8
43
42#define VLAN_FLTR_SIZE 128 44#define VLAN_FLTR_SIZE 128
43struct mlx4_set_vlan_fltr_mbox { 45struct mlx4_set_vlan_fltr_mbox {
44 __be32 entry[VLAN_FLTR_SIZE]; 46 __be32 entry[VLAN_FLTR_SIZE];
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_resources.c b/drivers/net/ethernet/mellanox/mlx4/en_resources.c
index bcbc54c16947..10c24c784b70 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_resources.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_resources.c
@@ -39,7 +39,7 @@
39 39
40void mlx4_en_fill_qp_context(struct mlx4_en_priv *priv, int size, int stride, 40void mlx4_en_fill_qp_context(struct mlx4_en_priv *priv, int size, int stride,
41 int is_tx, int rss, int qpn, int cqn, 41 int is_tx, int rss, int qpn, int cqn,
42 struct mlx4_qp_context *context) 42 int user_prio, struct mlx4_qp_context *context)
43{ 43{
44 struct mlx4_en_dev *mdev = priv->mdev; 44 struct mlx4_en_dev *mdev = priv->mdev;
45 45
@@ -57,6 +57,10 @@ void mlx4_en_fill_qp_context(struct mlx4_en_priv *priv, int size, int stride,
57 context->local_qpn = cpu_to_be32(qpn); 57 context->local_qpn = cpu_to_be32(qpn);
58 context->pri_path.ackto = 1 & 0x07; 58 context->pri_path.ackto = 1 & 0x07;
59 context->pri_path.sched_queue = 0x83 | (priv->port - 1) << 6; 59 context->pri_path.sched_queue = 0x83 | (priv->port - 1) << 6;
60 if (user_prio >= 0) {
61 context->pri_path.sched_queue |= user_prio << 3;
62 context->pri_path.feup = 1 << 6;
63 }
60 context->pri_path.counter_index = 0xff; 64 context->pri_path.counter_index = 0xff;
61 context->cqn_send = cpu_to_be32(cqn); 65 context->cqn_send = cpu_to_be32(cqn);
62 context->cqn_recv = cpu_to_be32(cqn); 66 context->cqn_recv = cpu_to_be32(cqn);
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_rx.c b/drivers/net/ethernet/mellanox/mlx4/en_rx.c
index 9adbd53da525..d49a7ac3187d 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_rx.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_rx.c
@@ -823,7 +823,7 @@ static int mlx4_en_config_rss_qp(struct mlx4_en_priv *priv, int qpn,
823 823
824 memset(context, 0, sizeof *context); 824 memset(context, 0, sizeof *context);
825 mlx4_en_fill_qp_context(priv, ring->actual_size, ring->stride, 0, 0, 825 mlx4_en_fill_qp_context(priv, ring->actual_size, ring->stride, 0, 0,
826 qpn, ring->cqn, context); 826 qpn, ring->cqn, -1, context);
827 context->db_rec_addr = cpu_to_be64(ring->wqres.db.dma); 827 context->db_rec_addr = cpu_to_be64(ring->wqres.db.dma);
828 828
829 /* Cancel FCS removal if FW allows */ 829 /* Cancel FCS removal if FW allows */
@@ -890,7 +890,7 @@ int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv)
890 } 890 }
891 rss_map->indir_qp.event = mlx4_en_sqp_event; 891 rss_map->indir_qp.event = mlx4_en_sqp_event;
892 mlx4_en_fill_qp_context(priv, 0, 0, 0, 1, priv->base_qpn, 892 mlx4_en_fill_qp_context(priv, 0, 0, 0, 1, priv->base_qpn,
893 priv->rx_ring[0].cqn, &context); 893 priv->rx_ring[0].cqn, -1, &context);
894 894
895 if (!priv->prof->rss_rings || priv->prof->rss_rings > priv->rx_ring_num) 895 if (!priv->prof->rss_rings || priv->prof->rss_rings > priv->rx_ring_num)
896 rss_rings = priv->rx_ring_num; 896 rss_rings = priv->rx_ring_num;
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_tx.c b/drivers/net/ethernet/mellanox/mlx4/en_tx.c
index 17968244c399..d9bab5338c2f 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_tx.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_tx.c
@@ -156,7 +156,7 @@ void mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv,
156 156
157int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv, 157int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv,
158 struct mlx4_en_tx_ring *ring, 158 struct mlx4_en_tx_ring *ring,
159 int cq) 159 int cq, int user_prio)
160{ 160{
161 struct mlx4_en_dev *mdev = priv->mdev; 161 struct mlx4_en_dev *mdev = priv->mdev;
162 int err; 162 int err;
@@ -174,7 +174,7 @@ int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv,
174 ring->doorbell_qpn = ring->qp.qpn << 8; 174 ring->doorbell_qpn = ring->qp.qpn << 8;
175 175
176 mlx4_en_fill_qp_context(priv, ring->size, ring->stride, 1, 0, ring->qpn, 176 mlx4_en_fill_qp_context(priv, ring->size, ring->stride, 1, 0, ring->qpn,
177 ring->cqn, &ring->context); 177 ring->cqn, user_prio, &ring->context);
178 if (ring->bf_enabled) 178 if (ring->bf_enabled)
179 ring->context.usr_page = cpu_to_be32(ring->bf.uar->index); 179 ring->context.usr_page = cpu_to_be32(ring->bf.uar->index);
180 180
@@ -570,13 +570,9 @@ static void build_inline_wqe(struct mlx4_en_tx_desc *tx_desc, struct sk_buff *sk
570 570
571u16 mlx4_en_select_queue(struct net_device *dev, struct sk_buff *skb) 571u16 mlx4_en_select_queue(struct net_device *dev, struct sk_buff *skb)
572{ 572{
573 struct mlx4_en_priv *priv = netdev_priv(dev);
574 u16 vlan_tag = 0; 573 u16 vlan_tag = 0;
575 574
576 /* If we support per priority flow control and the packet contains 575 if (vlan_tx_tag_present(skb)) {
577 * a vlan tag, send the packet to the TX ring assigned to that priority
578 */
579 if (priv->prof->rx_ppp && vlan_tx_tag_present(skb)) {
580 vlan_tag = vlan_tx_tag_get(skb); 576 vlan_tag = vlan_tx_tag_get(skb);
581 return MLX4_EN_NUM_TX_RINGS + (vlan_tag >> 13); 577 return MLX4_EN_NUM_TX_RINGS + (vlan_tag >> 13);
582 } 578 }
diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4.h b/drivers/net/ethernet/mellanox/mlx4/mlx4.h
index 2a0ff2cc7182..cd56f1aea4b5 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mlx4.h
+++ b/drivers/net/ethernet/mellanox/mlx4/mlx4.h
@@ -53,6 +53,26 @@
53#define DRV_VERSION "1.1" 53#define DRV_VERSION "1.1"
54#define DRV_RELDATE "Dec, 2011" 54#define DRV_RELDATE "Dec, 2011"
55 55
56#define MLX4_NUM_UP 8
57#define MLX4_NUM_TC 8
58#define MLX4_RATELIMIT_UNITS 3 /* 100 Mbps */
59#define MLX4_RATELIMIT_DEFAULT 0xffff
60
61struct mlx4_set_port_prio2tc_context {
62 u8 prio2tc[4];
63};
64
65struct mlx4_port_scheduler_tc_cfg_be {
66 __be16 pg;
67 __be16 bw_precentage;
68 __be16 max_bw_units; /* 3-100Mbps, 4-1Gbps, other values - reserved */
69 __be16 max_bw_value;
70};
71
72struct mlx4_set_port_scheduler_context {
73 struct mlx4_port_scheduler_tc_cfg_be tc[MLX4_NUM_TC];
74};
75
56enum { 76enum {
57 MLX4_HCR_BASE = 0x80680, 77 MLX4_HCR_BASE = 0x80680,
58 MLX4_HCR_SIZE = 0x0001c, 78 MLX4_HCR_SIZE = 0x0001c,
diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
index d69fee41f24a..47e1c0ff1775 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
+++ b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
@@ -40,6 +40,9 @@
40#include <linux/mutex.h> 40#include <linux/mutex.h>
41#include <linux/netdevice.h> 41#include <linux/netdevice.h>
42#include <linux/if_vlan.h> 42#include <linux/if_vlan.h>
43#ifdef CONFIG_MLX4_EN_DCB
44#include <linux/dcbnl.h>
45#endif
43 46
44#include <linux/mlx4/device.h> 47#include <linux/mlx4/device.h>
45#include <linux/mlx4/qp.h> 48#include <linux/mlx4/qp.h>
@@ -111,6 +114,7 @@ enum {
111#define MLX4_EN_NUM_TX_RINGS 8 114#define MLX4_EN_NUM_TX_RINGS 8
112#define MLX4_EN_NUM_PPP_RINGS 8 115#define MLX4_EN_NUM_PPP_RINGS 8
113#define MAX_TX_RINGS (MLX4_EN_NUM_TX_RINGS + MLX4_EN_NUM_PPP_RINGS) 116#define MAX_TX_RINGS (MLX4_EN_NUM_TX_RINGS + MLX4_EN_NUM_PPP_RINGS)
117#define MLX4_EN_NUM_UP 8
114#define MLX4_EN_DEF_TX_RING_SIZE 512 118#define MLX4_EN_DEF_TX_RING_SIZE 512
115#define MLX4_EN_DEF_RX_RING_SIZE 1024 119#define MLX4_EN_DEF_RX_RING_SIZE 1024
116 120
@@ -411,6 +415,15 @@ struct mlx4_en_frag_info {
411 415
412}; 416};
413 417
418#ifdef CONFIG_MLX4_EN_DCB
419/* Minimal TC BW - setting to 0 will block traffic */
420#define MLX4_EN_BW_MIN 1
421#define MLX4_EN_BW_MAX 100 /* Utilize 100% of the line */
422
423#define MLX4_EN_TC_ETS 7
424
425#endif
426
414struct mlx4_en_priv { 427struct mlx4_en_priv {
415 struct mlx4_en_dev *mdev; 428 struct mlx4_en_dev *mdev;
416 struct mlx4_en_port_profile *prof; 429 struct mlx4_en_port_profile *prof;
@@ -484,6 +497,11 @@ struct mlx4_en_priv {
484 int vids[128]; 497 int vids[128];
485 bool wol; 498 bool wol;
486 struct device *ddev; 499 struct device *ddev;
500
501#ifdef CONFIG_MLX4_EN_DCB
502 struct ieee_ets ets;
503 u16 maxrate[IEEE_8021QAZ_MAX_TCS];
504#endif
487}; 505};
488 506
489enum mlx4_en_wol { 507enum mlx4_en_wol {
@@ -522,7 +540,7 @@ int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv, struct mlx4_en_tx_ring *ri
522void mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv, struct mlx4_en_tx_ring *ring); 540void mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv, struct mlx4_en_tx_ring *ring);
523int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv, 541int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv,
524 struct mlx4_en_tx_ring *ring, 542 struct mlx4_en_tx_ring *ring,
525 int cq); 543 int cq, int user_prio);
526void mlx4_en_deactivate_tx_ring(struct mlx4_en_priv *priv, 544void mlx4_en_deactivate_tx_ring(struct mlx4_en_priv *priv,
527 struct mlx4_en_tx_ring *ring); 545 struct mlx4_en_tx_ring *ring);
528 546
@@ -540,8 +558,8 @@ int mlx4_en_process_rx_cq(struct net_device *dev,
540 int budget); 558 int budget);
541int mlx4_en_poll_rx_cq(struct napi_struct *napi, int budget); 559int mlx4_en_poll_rx_cq(struct napi_struct *napi, int budget);
542void mlx4_en_fill_qp_context(struct mlx4_en_priv *priv, int size, int stride, 560void mlx4_en_fill_qp_context(struct mlx4_en_priv *priv, int size, int stride,
543 int is_tx, int rss, int qpn, int cqn, 561 int is_tx, int rss, int qpn, int cqn, int user_prio,
544 struct mlx4_qp_context *context); 562 struct mlx4_qp_context *context);
545void mlx4_en_sqp_event(struct mlx4_qp *qp, enum mlx4_event event); 563void mlx4_en_sqp_event(struct mlx4_qp *qp, enum mlx4_event event);
546int mlx4_en_map_buffer(struct mlx4_buf *buf); 564int mlx4_en_map_buffer(struct mlx4_buf *buf);
547void mlx4_en_unmap_buffer(struct mlx4_buf *buf); 565void mlx4_en_unmap_buffer(struct mlx4_buf *buf);
@@ -558,6 +576,10 @@ int mlx4_SET_VLAN_FLTR(struct mlx4_dev *dev, struct mlx4_en_priv *priv);
558int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset); 576int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset);
559int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port); 577int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port);
560 578
579#ifdef CONFIG_MLX4_EN_DCB
580extern const struct dcbnl_rtnl_ops mlx4_en_dcbnl_ops;
581#endif
582
561#define MLX4_EN_NUM_SELF_TEST 5 583#define MLX4_EN_NUM_SELF_TEST 5
562void mlx4_en_ex_selftest(struct net_device *dev, u32 *flags, u64 *buf); 584void mlx4_en_ex_selftest(struct net_device *dev, u32 *flags, u64 *buf);
563u64 mlx4_en_mac_to_u64(u8 *addr); 585u64 mlx4_en_mac_to_u64(u8 *addr);
diff --git a/drivers/net/ethernet/mellanox/mlx4/port.c b/drivers/net/ethernet/mellanox/mlx4/port.c
index 77535ff18f1b..55b12e6bed87 100644
--- a/drivers/net/ethernet/mellanox/mlx4/port.c
+++ b/drivers/net/ethernet/mellanox/mlx4/port.c
@@ -834,6 +834,68 @@ int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn,
834} 834}
835EXPORT_SYMBOL(mlx4_SET_PORT_qpn_calc); 835EXPORT_SYMBOL(mlx4_SET_PORT_qpn_calc);
836 836
837int mlx4_SET_PORT_PRIO2TC(struct mlx4_dev *dev, u8 port, u8 *prio2tc)
838{
839 struct mlx4_cmd_mailbox *mailbox;
840 struct mlx4_set_port_prio2tc_context *context;
841 int err;
842 u32 in_mod;
843 int i;
844
845 mailbox = mlx4_alloc_cmd_mailbox(dev);
846 if (IS_ERR(mailbox))
847 return PTR_ERR(mailbox);
848 context = mailbox->buf;
849 memset(context, 0, sizeof *context);
850
851 for (i = 0; i < MLX4_NUM_UP; i += 2)
852 context->prio2tc[i >> 1] = prio2tc[i] << 4 | prio2tc[i + 1];
853
854 in_mod = MLX4_SET_PORT_PRIO2TC << 8 | port;
855 err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
856 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
857
858 mlx4_free_cmd_mailbox(dev, mailbox);
859 return err;
860}
861EXPORT_SYMBOL(mlx4_SET_PORT_PRIO2TC);
862
863int mlx4_SET_PORT_SCHEDULER(struct mlx4_dev *dev, u8 port, u8 *tc_tx_bw,
864 u8 *pg, u16 *ratelimit)
865{
866 struct mlx4_cmd_mailbox *mailbox;
867 struct mlx4_set_port_scheduler_context *context;
868 int err;
869 u32 in_mod;
870 int i;
871
872 mailbox = mlx4_alloc_cmd_mailbox(dev);
873 if (IS_ERR(mailbox))
874 return PTR_ERR(mailbox);
875 context = mailbox->buf;
876 memset(context, 0, sizeof *context);
877
878 for (i = 0; i < MLX4_NUM_TC; i++) {
879 struct mlx4_port_scheduler_tc_cfg_be *tc = &context->tc[i];
880 u16 r = ratelimit && ratelimit[i] ? ratelimit[i] :
881 MLX4_RATELIMIT_DEFAULT;
882
883 tc->pg = htons(pg[i]);
884 tc->bw_precentage = htons(tc_tx_bw[i]);
885
886 tc->max_bw_units = htons(MLX4_RATELIMIT_UNITS);
887 tc->max_bw_value = htons(r);
888 }
889
890 in_mod = MLX4_SET_PORT_SCHEDULER << 8 | port;
891 err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
892 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
893
894 mlx4_free_cmd_mailbox(dev, mailbox);
895 return err;
896}
897EXPORT_SYMBOL(mlx4_SET_PORT_SCHEDULER);
898
837int mlx4_SET_MCAST_FLTR_wrapper(struct mlx4_dev *dev, int slave, 899int mlx4_SET_MCAST_FLTR_wrapper(struct mlx4_dev *dev, int slave,
838 struct mlx4_vhcr *vhcr, 900 struct mlx4_vhcr *vhcr,
839 struct mlx4_cmd_mailbox *inbox, 901 struct mlx4_cmd_mailbox *inbox,
diff --git a/drivers/net/ethernet/myricom/myri10ge/myri10ge.c b/drivers/net/ethernet/myricom/myri10ge/myri10ge.c
index 27273ae1a6e6..90153fc983cb 100644
--- a/drivers/net/ethernet/myricom/myri10ge/myri10ge.c
+++ b/drivers/net/ethernet/myricom/myri10ge/myri10ge.c
@@ -4033,7 +4033,6 @@ static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4033 4033
4034 netdev->netdev_ops = &myri10ge_netdev_ops; 4034 netdev->netdev_ops = &myri10ge_netdev_ops;
4035 netdev->mtu = myri10ge_initial_mtu; 4035 netdev->mtu = myri10ge_initial_mtu;
4036 netdev->base_addr = mgp->iomem_base;
4037 netdev->hw_features = mgp->features | NETIF_F_LRO | NETIF_F_RXCSUM; 4036 netdev->hw_features = mgp->features | NETIF_F_LRO | NETIF_F_RXCSUM;
4038 netdev->features = netdev->hw_features; 4037 netdev->features = netdev->hw_features;
4039 4038
@@ -4047,12 +4046,10 @@ static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4047 netdev->vlan_features &= ~NETIF_F_TSO; 4046 netdev->vlan_features &= ~NETIF_F_TSO;
4048 4047
4049 /* make sure we can get an irq, and that MSI can be 4048 /* make sure we can get an irq, and that MSI can be
4050 * setup (if available). Also ensure netdev->irq 4049 * setup (if available). */
4051 * is set to correct value if MSI is enabled */
4052 status = myri10ge_request_irq(mgp); 4050 status = myri10ge_request_irq(mgp);
4053 if (status != 0) 4051 if (status != 0)
4054 goto abort_with_firmware; 4052 goto abort_with_firmware;
4055 netdev->irq = pdev->irq;
4056 myri10ge_free_irq(mgp); 4053 myri10ge_free_irq(mgp);
4057 4054
4058 /* Save configuration space to be restored if the 4055 /* Save configuration space to be restored if the
@@ -4077,7 +4074,7 @@ static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4077 else 4074 else
4078 dev_info(dev, "%s IRQ %d, tx bndry %d, fw %s, WC %s\n", 4075 dev_info(dev, "%s IRQ %d, tx bndry %d, fw %s, WC %s\n",
4079 mgp->msi_enabled ? "MSI" : "xPIC", 4076 mgp->msi_enabled ? "MSI" : "xPIC",
4080 netdev->irq, mgp->tx_boundary, mgp->fw_name, 4077 pdev->irq, mgp->tx_boundary, mgp->fw_name,
4081 (mgp->wc_enabled ? "Enabled" : "Disabled")); 4078 (mgp->wc_enabled ? "Enabled" : "Disabled"));
4082 4079
4083 board_number++; 4080 board_number++;
diff --git a/drivers/net/ethernet/natsemi/natsemi.c b/drivers/net/ethernet/natsemi/natsemi.c
index d38e48d4f430..5b61d12f8b91 100644
--- a/drivers/net/ethernet/natsemi/natsemi.c
+++ b/drivers/net/ethernet/natsemi/natsemi.c
@@ -547,6 +547,7 @@ struct netdev_private {
547 struct sk_buff *tx_skbuff[TX_RING_SIZE]; 547 struct sk_buff *tx_skbuff[TX_RING_SIZE];
548 dma_addr_t tx_dma[TX_RING_SIZE]; 548 dma_addr_t tx_dma[TX_RING_SIZE];
549 struct net_device *dev; 549 struct net_device *dev;
550 void __iomem *ioaddr;
550 struct napi_struct napi; 551 struct napi_struct napi;
551 /* Media monitoring timer */ 552 /* Media monitoring timer */
552 struct timer_list timer; 553 struct timer_list timer;
@@ -699,7 +700,9 @@ static ssize_t natsemi_set_dspcfg_workaround(struct device *dev,
699 700
700static inline void __iomem *ns_ioaddr(struct net_device *dev) 701static inline void __iomem *ns_ioaddr(struct net_device *dev)
701{ 702{
702 return (void __iomem *) dev->base_addr; 703 struct netdev_private *np = netdev_priv(dev);
704
705 return np->ioaddr;
703} 706}
704 707
705static inline void natsemi_irq_enable(struct net_device *dev) 708static inline void natsemi_irq_enable(struct net_device *dev)
@@ -863,10 +866,9 @@ static int __devinit natsemi_probe1 (struct pci_dev *pdev,
863 /* Store MAC Address in perm_addr */ 866 /* Store MAC Address in perm_addr */
864 memcpy(dev->perm_addr, dev->dev_addr, ETH_ALEN); 867 memcpy(dev->perm_addr, dev->dev_addr, ETH_ALEN);
865 868
866 dev->base_addr = (unsigned long __force) ioaddr;
867 dev->irq = irq;
868
869 np = netdev_priv(dev); 869 np = netdev_priv(dev);
870 np->ioaddr = ioaddr;
871
870 netif_napi_add(dev, &np->napi, natsemi_poll, 64); 872 netif_napi_add(dev, &np->napi, natsemi_poll, 64);
871 np->dev = dev; 873 np->dev = dev;
872 874
@@ -914,9 +916,6 @@ static int __devinit natsemi_probe1 (struct pci_dev *pdev,
914 } 916 }
915 917
916 option = find_cnt < MAX_UNITS ? options[find_cnt] : 0; 918 option = find_cnt < MAX_UNITS ? options[find_cnt] : 0;
917 if (dev->mem_start)
918 option = dev->mem_start;
919
920 /* The lower four bits are the media type. */ 919 /* The lower four bits are the media type. */
921 if (option) { 920 if (option) {
922 if (option & 0x200) 921 if (option & 0x200)
@@ -1532,20 +1531,21 @@ static int netdev_open(struct net_device *dev)
1532{ 1531{
1533 struct netdev_private *np = netdev_priv(dev); 1532 struct netdev_private *np = netdev_priv(dev);
1534 void __iomem * ioaddr = ns_ioaddr(dev); 1533 void __iomem * ioaddr = ns_ioaddr(dev);
1534 const int irq = np->pci_dev->irq;
1535 int i; 1535 int i;
1536 1536
1537 /* Reset the chip, just in case. */ 1537 /* Reset the chip, just in case. */
1538 natsemi_reset(dev); 1538 natsemi_reset(dev);
1539 1539
1540 i = request_irq(dev->irq, intr_handler, IRQF_SHARED, dev->name, dev); 1540 i = request_irq(irq, intr_handler, IRQF_SHARED, dev->name, dev);
1541 if (i) return i; 1541 if (i) return i;
1542 1542
1543 if (netif_msg_ifup(np)) 1543 if (netif_msg_ifup(np))
1544 printk(KERN_DEBUG "%s: netdev_open() irq %d.\n", 1544 printk(KERN_DEBUG "%s: netdev_open() irq %d.\n",
1545 dev->name, dev->irq); 1545 dev->name, irq);
1546 i = alloc_ring(dev); 1546 i = alloc_ring(dev);
1547 if (i < 0) { 1547 if (i < 0) {
1548 free_irq(dev->irq, dev); 1548 free_irq(irq, dev);
1549 return i; 1549 return i;
1550 } 1550 }
1551 napi_enable(&np->napi); 1551 napi_enable(&np->napi);
@@ -1794,6 +1794,7 @@ static void netdev_timer(unsigned long data)
1794 struct netdev_private *np = netdev_priv(dev); 1794 struct netdev_private *np = netdev_priv(dev);
1795 void __iomem * ioaddr = ns_ioaddr(dev); 1795 void __iomem * ioaddr = ns_ioaddr(dev);
1796 int next_tick = NATSEMI_TIMER_FREQ; 1796 int next_tick = NATSEMI_TIMER_FREQ;
1797 const int irq = np->pci_dev->irq;
1797 1798
1798 if (netif_msg_timer(np)) { 1799 if (netif_msg_timer(np)) {
1799 /* DO NOT read the IntrStatus register, 1800 /* DO NOT read the IntrStatus register,
@@ -1817,14 +1818,14 @@ static void netdev_timer(unsigned long data)
1817 if (netif_msg_drv(np)) 1818 if (netif_msg_drv(np))
1818 printk(KERN_NOTICE "%s: possible phy reset: " 1819 printk(KERN_NOTICE "%s: possible phy reset: "
1819 "re-initializing\n", dev->name); 1820 "re-initializing\n", dev->name);
1820 disable_irq(dev->irq); 1821 disable_irq(irq);
1821 spin_lock_irq(&np->lock); 1822 spin_lock_irq(&np->lock);
1822 natsemi_stop_rxtx(dev); 1823 natsemi_stop_rxtx(dev);
1823 dump_ring(dev); 1824 dump_ring(dev);
1824 reinit_ring(dev); 1825 reinit_ring(dev);
1825 init_registers(dev); 1826 init_registers(dev);
1826 spin_unlock_irq(&np->lock); 1827 spin_unlock_irq(&np->lock);
1827 enable_irq(dev->irq); 1828 enable_irq(irq);
1828 } else { 1829 } else {
1829 /* hurry back */ 1830 /* hurry back */
1830 next_tick = HZ; 1831 next_tick = HZ;
@@ -1841,10 +1842,10 @@ static void netdev_timer(unsigned long data)
1841 spin_unlock_irq(&np->lock); 1842 spin_unlock_irq(&np->lock);
1842 } 1843 }
1843 if (np->oom) { 1844 if (np->oom) {
1844 disable_irq(dev->irq); 1845 disable_irq(irq);
1845 np->oom = 0; 1846 np->oom = 0;
1846 refill_rx(dev); 1847 refill_rx(dev);
1847 enable_irq(dev->irq); 1848 enable_irq(irq);
1848 if (!np->oom) { 1849 if (!np->oom) {
1849 writel(RxOn, ioaddr + ChipCmd); 1850 writel(RxOn, ioaddr + ChipCmd);
1850 } else { 1851 } else {
@@ -1885,8 +1886,9 @@ static void ns_tx_timeout(struct net_device *dev)
1885{ 1886{
1886 struct netdev_private *np = netdev_priv(dev); 1887 struct netdev_private *np = netdev_priv(dev);
1887 void __iomem * ioaddr = ns_ioaddr(dev); 1888 void __iomem * ioaddr = ns_ioaddr(dev);
1889 const int irq = np->pci_dev->irq;
1888 1890
1889 disable_irq(dev->irq); 1891 disable_irq(irq);
1890 spin_lock_irq(&np->lock); 1892 spin_lock_irq(&np->lock);
1891 if (!np->hands_off) { 1893 if (!np->hands_off) {
1892 if (netif_msg_tx_err(np)) 1894 if (netif_msg_tx_err(np))
@@ -1905,7 +1907,7 @@ static void ns_tx_timeout(struct net_device *dev)
1905 dev->name); 1907 dev->name);
1906 } 1908 }
1907 spin_unlock_irq(&np->lock); 1909 spin_unlock_irq(&np->lock);
1908 enable_irq(dev->irq); 1910 enable_irq(irq);
1909 1911
1910 dev->trans_start = jiffies; /* prevent tx timeout */ 1912 dev->trans_start = jiffies; /* prevent tx timeout */
1911 dev->stats.tx_errors++; 1913 dev->stats.tx_errors++;
@@ -2470,9 +2472,12 @@ static struct net_device_stats *get_stats(struct net_device *dev)
2470#ifdef CONFIG_NET_POLL_CONTROLLER 2472#ifdef CONFIG_NET_POLL_CONTROLLER
2471static void natsemi_poll_controller(struct net_device *dev) 2473static void natsemi_poll_controller(struct net_device *dev)
2472{ 2474{
2473 disable_irq(dev->irq); 2475 struct netdev_private *np = netdev_priv(dev);
2474 intr_handler(dev->irq, dev); 2476 const int irq = np->pci_dev->irq;
2475 enable_irq(dev->irq); 2477
2478 disable_irq(irq);
2479 intr_handler(irq, dev);
2480 enable_irq(irq);
2476} 2481}
2477#endif 2482#endif
2478 2483
@@ -2523,8 +2528,9 @@ static int natsemi_change_mtu(struct net_device *dev, int new_mtu)
2523 if (netif_running(dev)) { 2528 if (netif_running(dev)) {
2524 struct netdev_private *np = netdev_priv(dev); 2529 struct netdev_private *np = netdev_priv(dev);
2525 void __iomem * ioaddr = ns_ioaddr(dev); 2530 void __iomem * ioaddr = ns_ioaddr(dev);
2531 const int irq = np->pci_dev->irq;
2526 2532
2527 disable_irq(dev->irq); 2533 disable_irq(irq);
2528 spin_lock(&np->lock); 2534 spin_lock(&np->lock);
2529 /* stop engines */ 2535 /* stop engines */
2530 natsemi_stop_rxtx(dev); 2536 natsemi_stop_rxtx(dev);
@@ -2537,7 +2543,7 @@ static int natsemi_change_mtu(struct net_device *dev, int new_mtu)
2537 /* restart engines */ 2543 /* restart engines */
2538 writel(RxOn | TxOn, ioaddr + ChipCmd); 2544 writel(RxOn | TxOn, ioaddr + ChipCmd);
2539 spin_unlock(&np->lock); 2545 spin_unlock(&np->lock);
2540 enable_irq(dev->irq); 2546 enable_irq(irq);
2541 } 2547 }
2542 return 0; 2548 return 0;
2543} 2549}
@@ -3135,6 +3141,7 @@ static int netdev_close(struct net_device *dev)
3135{ 3141{
3136 void __iomem * ioaddr = ns_ioaddr(dev); 3142 void __iomem * ioaddr = ns_ioaddr(dev);
3137 struct netdev_private *np = netdev_priv(dev); 3143 struct netdev_private *np = netdev_priv(dev);
3144 const int irq = np->pci_dev->irq;
3138 3145
3139 if (netif_msg_ifdown(np)) 3146 if (netif_msg_ifdown(np))
3140 printk(KERN_DEBUG 3147 printk(KERN_DEBUG
@@ -3156,14 +3163,14 @@ static int netdev_close(struct net_device *dev)
3156 */ 3163 */
3157 3164
3158 del_timer_sync(&np->timer); 3165 del_timer_sync(&np->timer);
3159 disable_irq(dev->irq); 3166 disable_irq(irq);
3160 spin_lock_irq(&np->lock); 3167 spin_lock_irq(&np->lock);
3161 natsemi_irq_disable(dev); 3168 natsemi_irq_disable(dev);
3162 np->hands_off = 1; 3169 np->hands_off = 1;
3163 spin_unlock_irq(&np->lock); 3170 spin_unlock_irq(&np->lock);
3164 enable_irq(dev->irq); 3171 enable_irq(irq);
3165 3172
3166 free_irq(dev->irq, dev); 3173 free_irq(irq, dev);
3167 3174
3168 /* Interrupt disabled, interrupt handler released, 3175 /* Interrupt disabled, interrupt handler released,
3169 * queue stopped, timer deleted, rtnl_lock held 3176 * queue stopped, timer deleted, rtnl_lock held
@@ -3256,9 +3263,11 @@ static int natsemi_suspend (struct pci_dev *pdev, pm_message_t state)
3256 3263
3257 rtnl_lock(); 3264 rtnl_lock();
3258 if (netif_running (dev)) { 3265 if (netif_running (dev)) {
3266 const int irq = np->pci_dev->irq;
3267
3259 del_timer_sync(&np->timer); 3268 del_timer_sync(&np->timer);
3260 3269
3261 disable_irq(dev->irq); 3270 disable_irq(irq);
3262 spin_lock_irq(&np->lock); 3271 spin_lock_irq(&np->lock);
3263 3272
3264 natsemi_irq_disable(dev); 3273 natsemi_irq_disable(dev);
@@ -3267,7 +3276,7 @@ static int natsemi_suspend (struct pci_dev *pdev, pm_message_t state)
3267 netif_stop_queue(dev); 3276 netif_stop_queue(dev);
3268 3277
3269 spin_unlock_irq(&np->lock); 3278 spin_unlock_irq(&np->lock);
3270 enable_irq(dev->irq); 3279 enable_irq(irq);
3271 3280
3272 napi_disable(&np->napi); 3281 napi_disable(&np->napi);
3273 3282
@@ -3307,6 +3316,8 @@ static int natsemi_resume (struct pci_dev *pdev)
3307 if (netif_device_present(dev)) 3316 if (netif_device_present(dev))
3308 goto out; 3317 goto out;
3309 if (netif_running(dev)) { 3318 if (netif_running(dev)) {
3319 const int irq = np->pci_dev->irq;
3320
3310 BUG_ON(!np->hands_off); 3321 BUG_ON(!np->hands_off);
3311 ret = pci_enable_device(pdev); 3322 ret = pci_enable_device(pdev);
3312 if (ret < 0) { 3323 if (ret < 0) {
@@ -3320,13 +3331,13 @@ static int natsemi_resume (struct pci_dev *pdev)
3320 3331
3321 natsemi_reset(dev); 3332 natsemi_reset(dev);
3322 init_ring(dev); 3333 init_ring(dev);
3323 disable_irq(dev->irq); 3334 disable_irq(irq);
3324 spin_lock_irq(&np->lock); 3335 spin_lock_irq(&np->lock);
3325 np->hands_off = 0; 3336 np->hands_off = 0;
3326 init_registers(dev); 3337 init_registers(dev);
3327 netif_device_attach(dev); 3338 netif_device_attach(dev);
3328 spin_unlock_irq(&np->lock); 3339 spin_unlock_irq(&np->lock);
3329 enable_irq(dev->irq); 3340 enable_irq(irq);
3330 3341
3331 mod_timer(&np->timer, round_jiffies(jiffies + 1*HZ)); 3342 mod_timer(&np->timer, round_jiffies(jiffies + 1*HZ));
3332 } 3343 }
diff --git a/drivers/net/ethernet/neterion/s2io.c b/drivers/net/ethernet/neterion/s2io.c
index 6338ef8606ae..bb367582c1e8 100644
--- a/drivers/net/ethernet/neterion/s2io.c
+++ b/drivers/net/ethernet/neterion/s2io.c
@@ -2846,6 +2846,7 @@ static int s2io_poll_inta(struct napi_struct *napi, int budget)
2846static void s2io_netpoll(struct net_device *dev) 2846static void s2io_netpoll(struct net_device *dev)
2847{ 2847{
2848 struct s2io_nic *nic = netdev_priv(dev); 2848 struct s2io_nic *nic = netdev_priv(dev);
2849 const int irq = nic->pdev->irq;
2849 struct XENA_dev_config __iomem *bar0 = nic->bar0; 2850 struct XENA_dev_config __iomem *bar0 = nic->bar0;
2850 u64 val64 = 0xFFFFFFFFFFFFFFFFULL; 2851 u64 val64 = 0xFFFFFFFFFFFFFFFFULL;
2851 int i; 2852 int i;
@@ -2855,7 +2856,7 @@ static void s2io_netpoll(struct net_device *dev)
2855 if (pci_channel_offline(nic->pdev)) 2856 if (pci_channel_offline(nic->pdev))
2856 return; 2857 return;
2857 2858
2858 disable_irq(dev->irq); 2859 disable_irq(irq);
2859 2860
2860 writeq(val64, &bar0->rx_traffic_int); 2861 writeq(val64, &bar0->rx_traffic_int);
2861 writeq(val64, &bar0->tx_traffic_int); 2862 writeq(val64, &bar0->tx_traffic_int);
@@ -2884,7 +2885,7 @@ static void s2io_netpoll(struct net_device *dev)
2884 break; 2885 break;
2885 } 2886 }
2886 } 2887 }
2887 enable_irq(dev->irq); 2888 enable_irq(irq);
2888} 2889}
2889#endif 2890#endif
2890 2891
@@ -3897,9 +3898,7 @@ static void remove_msix_isr(struct s2io_nic *sp)
3897 3898
3898static void remove_inta_isr(struct s2io_nic *sp) 3899static void remove_inta_isr(struct s2io_nic *sp)
3899{ 3900{
3900 struct net_device *dev = sp->dev; 3901 free_irq(sp->pdev->irq, sp->dev);
3901
3902 free_irq(sp->pdev->irq, dev);
3903} 3902}
3904 3903
3905/* ********************************************************* * 3904/* ********************************************************* *
@@ -7046,7 +7045,7 @@ static int s2io_add_isr(struct s2io_nic *sp)
7046 } 7045 }
7047 } 7046 }
7048 if (sp->config.intr_type == INTA) { 7047 if (sp->config.intr_type == INTA) {
7049 err = request_irq((int)sp->pdev->irq, s2io_isr, IRQF_SHARED, 7048 err = request_irq(sp->pdev->irq, s2io_isr, IRQF_SHARED,
7050 sp->name, dev); 7049 sp->name, dev);
7051 if (err) { 7050 if (err) {
7052 DBG_PRINT(ERR_DBG, "%s: ISR registration failed\n", 7051 DBG_PRINT(ERR_DBG, "%s: ISR registration failed\n",
@@ -7908,9 +7907,6 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
7908 goto bar1_remap_failed; 7907 goto bar1_remap_failed;
7909 } 7908 }
7910 7909
7911 dev->irq = pdev->irq;
7912 dev->base_addr = (unsigned long)sp->bar0;
7913
7914 /* Initializing the BAR1 address as the start of the FIFO pointer. */ 7910 /* Initializing the BAR1 address as the start of the FIFO pointer. */
7915 for (j = 0; j < MAX_TX_FIFOS; j++) { 7911 for (j = 0; j < MAX_TX_FIFOS; j++) {
7916 mac_control->tx_FIFO_start[j] = sp->bar1 + (j * 0x00020000); 7912 mac_control->tx_FIFO_start[j] = sp->bar1 + (j * 0x00020000);
diff --git a/drivers/net/ethernet/neterion/vxge/vxge-main.c b/drivers/net/ethernet/neterion/vxge/vxge-main.c
index ef76725454d2..51387c31914b 100644
--- a/drivers/net/ethernet/neterion/vxge/vxge-main.c
+++ b/drivers/net/ethernet/neterion/vxge/vxge-main.c
@@ -1882,25 +1882,24 @@ static int vxge_poll_inta(struct napi_struct *napi, int budget)
1882 */ 1882 */
1883static void vxge_netpoll(struct net_device *dev) 1883static void vxge_netpoll(struct net_device *dev)
1884{ 1884{
1885 struct __vxge_hw_device *hldev; 1885 struct vxgedev *vdev = netdev_priv(dev);
1886 struct vxgedev *vdev; 1886 struct pci_dev *pdev = vdev->pdev;
1887 1887 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
1888 vdev = netdev_priv(dev); 1888 const int irq = pdev->irq;
1889 hldev = pci_get_drvdata(vdev->pdev);
1890 1889
1891 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__); 1890 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1892 1891
1893 if (pci_channel_offline(vdev->pdev)) 1892 if (pci_channel_offline(pdev))
1894 return; 1893 return;
1895 1894
1896 disable_irq(dev->irq); 1895 disable_irq(irq);
1897 vxge_hw_device_clear_tx_rx(hldev); 1896 vxge_hw_device_clear_tx_rx(hldev);
1898 1897
1899 vxge_hw_device_clear_tx_rx(hldev); 1898 vxge_hw_device_clear_tx_rx(hldev);
1900 VXGE_COMPLETE_ALL_RX(vdev); 1899 VXGE_COMPLETE_ALL_RX(vdev);
1901 VXGE_COMPLETE_ALL_TX(vdev); 1900 VXGE_COMPLETE_ALL_TX(vdev);
1902 1901
1903 enable_irq(dev->irq); 1902 enable_irq(irq);
1904 1903
1905 vxge_debug_entryexit(VXGE_TRACE, 1904 vxge_debug_entryexit(VXGE_TRACE,
1906 "%s:%d Exiting...", __func__, __LINE__); 1905 "%s:%d Exiting...", __func__, __LINE__);
@@ -2860,12 +2859,12 @@ static int vxge_open(struct net_device *dev)
2860 vdev->config.rx_pause_enable); 2859 vdev->config.rx_pause_enable);
2861 2860
2862 if (vdev->vp_reset_timer.function == NULL) 2861 if (vdev->vp_reset_timer.function == NULL)
2863 vxge_os_timer(vdev->vp_reset_timer, 2862 vxge_os_timer(&vdev->vp_reset_timer, vxge_poll_vp_reset, vdev,
2864 vxge_poll_vp_reset, vdev, (HZ/2)); 2863 HZ / 2);
2865 2864
2866 /* There is no need to check for RxD leak and RxD lookup on Titan1A */ 2865 /* There is no need to check for RxD leak and RxD lookup on Titan1A */
2867 if (vdev->titan1 && vdev->vp_lockup_timer.function == NULL) 2866 if (vdev->titan1 && vdev->vp_lockup_timer.function == NULL)
2868 vxge_os_timer(vdev->vp_lockup_timer, vxge_poll_vp_lockup, vdev, 2867 vxge_os_timer(&vdev->vp_lockup_timer, vxge_poll_vp_lockup, vdev,
2869 HZ / 2); 2868 HZ / 2);
2870 2869
2871 set_bit(__VXGE_STATE_CARD_UP, &vdev->state); 2870 set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
@@ -3424,9 +3423,6 @@ static int __devinit vxge_device_register(struct __vxge_hw_device *hldev,
3424 ndev->features |= ndev->hw_features | 3423 ndev->features |= ndev->hw_features |
3425 NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER; 3424 NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER;
3426 3425
3427 /* Driver entry points */
3428 ndev->irq = vdev->pdev->irq;
3429 ndev->base_addr = (unsigned long) hldev->bar0;
3430 3426
3431 ndev->netdev_ops = &vxge_netdev_ops; 3427 ndev->netdev_ops = &vxge_netdev_ops;
3432 3428
diff --git a/drivers/net/ethernet/neterion/vxge/vxge-main.h b/drivers/net/ethernet/neterion/vxge/vxge-main.h
index f52a42d1dbb7..35f3e7552ec2 100644
--- a/drivers/net/ethernet/neterion/vxge/vxge-main.h
+++ b/drivers/net/ethernet/neterion/vxge/vxge-main.h
@@ -416,12 +416,15 @@ struct vxge_tx_priv {
416 static int p = val; \ 416 static int p = val; \
417 module_param(p, int, 0) 417 module_param(p, int, 0)
418 418
419#define vxge_os_timer(timer, handle, arg, exp) do { \ 419static inline
420 init_timer(&timer); \ 420void vxge_os_timer(struct timer_list *timer, void (*func)(unsigned long data),
421 timer.function = handle; \ 421 struct vxgedev *vdev, unsigned long timeout)
422 timer.data = (unsigned long) arg; \ 422{
423 mod_timer(&timer, (jiffies + exp)); \ 423 init_timer(timer);
424 } while (0); 424 timer->function = func;
425 timer->data = (unsigned long)vdev;
426 mod_timer(timer, jiffies + timeout);
427}
425 428
426void vxge_initialize_ethtool_ops(struct net_device *ndev); 429void vxge_initialize_ethtool_ops(struct net_device *ndev);
427enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev); 430enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev);
diff --git a/drivers/net/ethernet/nvidia/forcedeth.c b/drivers/net/ethernet/nvidia/forcedeth.c
index aca13046e432..d93a088debc3 100644
--- a/drivers/net/ethernet/nvidia/forcedeth.c
+++ b/drivers/net/ethernet/nvidia/forcedeth.c
@@ -3942,13 +3942,11 @@ static int nv_request_irq(struct net_device *dev, int intr_test)
3942 ret = pci_enable_msi(np->pci_dev); 3942 ret = pci_enable_msi(np->pci_dev);
3943 if (ret == 0) { 3943 if (ret == 0) {
3944 np->msi_flags |= NV_MSI_ENABLED; 3944 np->msi_flags |= NV_MSI_ENABLED;
3945 dev->irq = np->pci_dev->irq;
3946 if (request_irq(np->pci_dev->irq, handler, IRQF_SHARED, dev->name, dev) != 0) { 3945 if (request_irq(np->pci_dev->irq, handler, IRQF_SHARED, dev->name, dev) != 0) {
3947 netdev_info(dev, "request_irq failed %d\n", 3946 netdev_info(dev, "request_irq failed %d\n",
3948 ret); 3947 ret);
3949 pci_disable_msi(np->pci_dev); 3948 pci_disable_msi(np->pci_dev);
3950 np->msi_flags &= ~NV_MSI_ENABLED; 3949 np->msi_flags &= ~NV_MSI_ENABLED;
3951 dev->irq = np->pci_dev->irq;
3952 goto out_err; 3950 goto out_err;
3953 } 3951 }
3954 3952
@@ -5649,9 +5647,6 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
5649 np->base = ioremap(addr, np->register_size); 5647 np->base = ioremap(addr, np->register_size);
5650 if (!np->base) 5648 if (!np->base)
5651 goto out_relreg; 5649 goto out_relreg;
5652 dev->base_addr = (unsigned long)np->base;
5653
5654 dev->irq = pci_dev->irq;
5655 5650
5656 np->rx_ring_size = RX_RING_DEFAULT; 5651 np->rx_ring_size = RX_RING_DEFAULT;
5657 np->tx_ring_size = TX_RING_DEFAULT; 5652 np->tx_ring_size = TX_RING_DEFAULT;
diff --git a/drivers/net/ethernet/nxp/lpc_eth.c b/drivers/net/ethernet/nxp/lpc_eth.c
index 6dfc26d85e47..d3469d8e3f0d 100644
--- a/drivers/net/ethernet/nxp/lpc_eth.c
+++ b/drivers/net/ethernet/nxp/lpc_eth.c
@@ -990,10 +990,10 @@ static int __lpc_handle_recv(struct net_device *ndev, int budget)
990 ndev->stats.rx_errors++; 990 ndev->stats.rx_errors++;
991 } else { 991 } else {
992 /* Packet is good */ 992 /* Packet is good */
993 skb = dev_alloc_skb(len + 8); 993 skb = dev_alloc_skb(len);
994 if (!skb) 994 if (!skb) {
995 ndev->stats.rx_dropped++; 995 ndev->stats.rx_dropped++;
996 else { 996 } else {
997 prdbuf = skb_put(skb, len); 997 prdbuf = skb_put(skb, len);
998 998
999 /* Copy packet from buffer */ 999 /* Copy packet from buffer */
diff --git a/drivers/net/ethernet/packetengines/hamachi.c b/drivers/net/ethernet/packetengines/hamachi.c
index 0d29f5f4b8e4..c2367158350e 100644
--- a/drivers/net/ethernet/packetengines/hamachi.c
+++ b/drivers/net/ethernet/packetengines/hamachi.c
@@ -683,8 +683,6 @@ static int __devinit hamachi_init_one (struct pci_dev *pdev,
683 } 683 }
684 684
685 hmp->base = ioaddr; 685 hmp->base = ioaddr;
686 dev->base_addr = (unsigned long)ioaddr;
687 dev->irq = irq;
688 pci_set_drvdata(pdev, dev); 686 pci_set_drvdata(pdev, dev);
689 687
690 hmp->chip_id = chip_id; 688 hmp->chip_id = chip_id;
@@ -859,14 +857,11 @@ static int hamachi_open(struct net_device *dev)
859 u32 rx_int_var, tx_int_var; 857 u32 rx_int_var, tx_int_var;
860 u16 fifo_info; 858 u16 fifo_info;
861 859
862 i = request_irq(dev->irq, hamachi_interrupt, IRQF_SHARED, dev->name, dev); 860 i = request_irq(hmp->pci_dev->irq, hamachi_interrupt, IRQF_SHARED,
861 dev->name, dev);
863 if (i) 862 if (i)
864 return i; 863 return i;
865 864
866 if (hamachi_debug > 1)
867 printk(KERN_DEBUG "%s: hamachi_open() irq %d.\n",
868 dev->name, dev->irq);
869
870 hamachi_init_ring(dev); 865 hamachi_init_ring(dev);
871 866
872#if ADDRLEN == 64 867#if ADDRLEN == 64
@@ -1705,7 +1700,7 @@ static int hamachi_close(struct net_device *dev)
1705 } 1700 }
1706#endif /* __i386__ debugging only */ 1701#endif /* __i386__ debugging only */
1707 1702
1708 free_irq(dev->irq, dev); 1703 free_irq(hmp->pci_dev->irq, dev);
1709 1704
1710 del_timer_sync(&hmp->timer); 1705 del_timer_sync(&hmp->timer);
1711 1706
diff --git a/drivers/net/ethernet/packetengines/yellowfin.c b/drivers/net/ethernet/packetengines/yellowfin.c
index 7757b80ef924..04e622fd468d 100644
--- a/drivers/net/ethernet/packetengines/yellowfin.c
+++ b/drivers/net/ethernet/packetengines/yellowfin.c
@@ -427,9 +427,6 @@ static int __devinit yellowfin_init_one(struct pci_dev *pdev,
427 /* Reset the chip. */ 427 /* Reset the chip. */
428 iowrite32(0x80000000, ioaddr + DMACtrl); 428 iowrite32(0x80000000, ioaddr + DMACtrl);
429 429
430 dev->base_addr = (unsigned long)ioaddr;
431 dev->irq = irq;
432
433 pci_set_drvdata(pdev, dev); 430 pci_set_drvdata(pdev, dev);
434 spin_lock_init(&np->lock); 431 spin_lock_init(&np->lock);
435 432
@@ -569,25 +566,20 @@ static void mdio_write(void __iomem *ioaddr, int phy_id, int location, int value
569static int yellowfin_open(struct net_device *dev) 566static int yellowfin_open(struct net_device *dev)
570{ 567{
571 struct yellowfin_private *yp = netdev_priv(dev); 568 struct yellowfin_private *yp = netdev_priv(dev);
569 const int irq = yp->pci_dev->irq;
572 void __iomem *ioaddr = yp->base; 570 void __iomem *ioaddr = yp->base;
573 int i, ret; 571 int i, rc;
574 572
575 /* Reset the chip. */ 573 /* Reset the chip. */
576 iowrite32(0x80000000, ioaddr + DMACtrl); 574 iowrite32(0x80000000, ioaddr + DMACtrl);
577 575
578 ret = request_irq(dev->irq, yellowfin_interrupt, IRQF_SHARED, dev->name, dev); 576 rc = request_irq(irq, yellowfin_interrupt, IRQF_SHARED, dev->name, dev);
579 if (ret) 577 if (rc)
580 return ret; 578 return rc;
581
582 if (yellowfin_debug > 1)
583 netdev_printk(KERN_DEBUG, dev, "%s() irq %d\n",
584 __func__, dev->irq);
585 579
586 ret = yellowfin_init_ring(dev); 580 rc = yellowfin_init_ring(dev);
587 if (ret) { 581 if (rc < 0)
588 free_irq(dev->irq, dev); 582 goto err_free_irq;
589 return ret;
590 }
591 583
592 iowrite32(yp->rx_ring_dma, ioaddr + RxPtr); 584 iowrite32(yp->rx_ring_dma, ioaddr + RxPtr);
593 iowrite32(yp->tx_ring_dma, ioaddr + TxPtr); 585 iowrite32(yp->tx_ring_dma, ioaddr + TxPtr);
@@ -647,8 +639,12 @@ static int yellowfin_open(struct net_device *dev)
647 yp->timer.data = (unsigned long)dev; 639 yp->timer.data = (unsigned long)dev;
648 yp->timer.function = yellowfin_timer; /* timer handler */ 640 yp->timer.function = yellowfin_timer; /* timer handler */
649 add_timer(&yp->timer); 641 add_timer(&yp->timer);
642out:
643 return rc;
650 644
651 return 0; 645err_free_irq:
646 free_irq(irq, dev);
647 goto out;
652} 648}
653 649
654static void yellowfin_timer(unsigned long data) 650static void yellowfin_timer(unsigned long data)
@@ -1251,7 +1247,7 @@ static int yellowfin_close(struct net_device *dev)
1251 } 1247 }
1252#endif /* __i386__ debugging only */ 1248#endif /* __i386__ debugging only */
1253 1249
1254 free_irq(dev->irq, dev); 1250 free_irq(yp->pci_dev->irq, dev);
1255 1251
1256 /* Free all the skbuffs in the Rx queue. */ 1252 /* Free all the skbuffs in the Rx queue. */
1257 for (i = 0; i < RX_RING_SIZE; i++) { 1253 for (i = 0; i < RX_RING_SIZE; i++) {
diff --git a/drivers/net/ethernet/rdc/r6040.c b/drivers/net/ethernet/rdc/r6040.c
index b96e1920e045..a26307fe143e 100644
--- a/drivers/net/ethernet/rdc/r6040.c
+++ b/drivers/net/ethernet/rdc/r6040.c
@@ -973,6 +973,7 @@ static const struct ethtool_ops netdev_ethtool_ops = {
973 .get_settings = netdev_get_settings, 973 .get_settings = netdev_get_settings,
974 .set_settings = netdev_set_settings, 974 .set_settings = netdev_set_settings,
975 .get_link = ethtool_op_get_link, 975 .get_link = ethtool_op_get_link,
976 .get_ts_info = ethtool_op_get_ts_info,
976}; 977};
977 978
978static const struct net_device_ops r6040_netdev_ops = { 979static const struct net_device_ops r6040_netdev_ops = {
diff --git a/drivers/net/ethernet/realtek/8139cp.c b/drivers/net/ethernet/realtek/8139cp.c
index abc79076f867..69c7d695807c 100644
--- a/drivers/net/ethernet/realtek/8139cp.c
+++ b/drivers/net/ethernet/realtek/8139cp.c
@@ -635,9 +635,12 @@ static irqreturn_t cp_interrupt (int irq, void *dev_instance)
635 */ 635 */
636static void cp_poll_controller(struct net_device *dev) 636static void cp_poll_controller(struct net_device *dev)
637{ 637{
638 disable_irq(dev->irq); 638 struct cp_private *cp = netdev_priv(dev);
639 cp_interrupt(dev->irq, dev); 639 const int irq = cp->pdev->irq;
640 enable_irq(dev->irq); 640
641 disable_irq(irq);
642 cp_interrupt(irq, dev);
643 enable_irq(irq);
641} 644}
642#endif 645#endif
643 646
@@ -1114,6 +1117,7 @@ static void cp_free_rings (struct cp_private *cp)
1114static int cp_open (struct net_device *dev) 1117static int cp_open (struct net_device *dev)
1115{ 1118{
1116 struct cp_private *cp = netdev_priv(dev); 1119 struct cp_private *cp = netdev_priv(dev);
1120 const int irq = cp->pdev->irq;
1117 int rc; 1121 int rc;
1118 1122
1119 netif_dbg(cp, ifup, dev, "enabling interface\n"); 1123 netif_dbg(cp, ifup, dev, "enabling interface\n");
@@ -1126,7 +1130,7 @@ static int cp_open (struct net_device *dev)
1126 1130
1127 cp_init_hw(cp); 1131 cp_init_hw(cp);
1128 1132
1129 rc = request_irq(dev->irq, cp_interrupt, IRQF_SHARED, dev->name, dev); 1133 rc = request_irq(irq, cp_interrupt, IRQF_SHARED, dev->name, dev);
1130 if (rc) 1134 if (rc)
1131 goto err_out_hw; 1135 goto err_out_hw;
1132 1136
@@ -1161,7 +1165,7 @@ static int cp_close (struct net_device *dev)
1161 1165
1162 spin_unlock_irqrestore(&cp->lock, flags); 1166 spin_unlock_irqrestore(&cp->lock, flags);
1163 1167
1164 free_irq(dev->irq, dev); 1168 free_irq(cp->pdev->irq, dev);
1165 1169
1166 cp_free_rings(cp); 1170 cp_free_rings(cp);
1167 return 0; 1171 return 0;
@@ -1909,7 +1913,6 @@ static int cp_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
1909 (unsigned long long)pciaddr); 1913 (unsigned long long)pciaddr);
1910 goto err_out_res; 1914 goto err_out_res;
1911 } 1915 }
1912 dev->base_addr = (unsigned long) regs;
1913 cp->regs = regs; 1916 cp->regs = regs;
1914 1917
1915 cp_stop_hw(cp); 1918 cp_stop_hw(cp);
@@ -1937,14 +1940,12 @@ static int cp_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
1937 dev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO | 1940 dev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
1938 NETIF_F_HIGHDMA; 1941 NETIF_F_HIGHDMA;
1939 1942
1940 dev->irq = pdev->irq;
1941
1942 rc = register_netdev(dev); 1943 rc = register_netdev(dev);
1943 if (rc) 1944 if (rc)
1944 goto err_out_iomap; 1945 goto err_out_iomap;
1945 1946
1946 netdev_info(dev, "RTL-8139C+ at 0x%lx, %pM, IRQ %d\n", 1947 netdev_info(dev, "RTL-8139C+ at 0x%p, %pM, IRQ %d\n",
1947 dev->base_addr, dev->dev_addr, dev->irq); 1948 regs, dev->dev_addr, pdev->irq);
1948 1949
1949 pci_set_drvdata(pdev, dev); 1950 pci_set_drvdata(pdev, dev);
1950 1951
diff --git a/drivers/net/ethernet/realtek/8139too.c b/drivers/net/ethernet/realtek/8139too.c
index df7fd8d083dc..03df076ed596 100644
--- a/drivers/net/ethernet/realtek/8139too.c
+++ b/drivers/net/ethernet/realtek/8139too.c
@@ -148,9 +148,9 @@ static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
148 148
149/* Whether to use MMIO or PIO. Default to MMIO. */ 149/* Whether to use MMIO or PIO. Default to MMIO. */
150#ifdef CONFIG_8139TOO_PIO 150#ifdef CONFIG_8139TOO_PIO
151static int use_io = 1; 151static bool use_io = true;
152#else 152#else
153static int use_io = 0; 153static bool use_io = false;
154#endif 154#endif
155 155
156/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). 156/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
@@ -620,7 +620,7 @@ MODULE_DESCRIPTION ("RealTek RTL-8139 Fast Ethernet driver");
620MODULE_LICENSE("GPL"); 620MODULE_LICENSE("GPL");
621MODULE_VERSION(DRV_VERSION); 621MODULE_VERSION(DRV_VERSION);
622 622
623module_param(use_io, int, 0); 623module_param(use_io, bool, 0);
624MODULE_PARM_DESC(use_io, "Force use of I/O access mode. 0=MMIO 1=PIO"); 624MODULE_PARM_DESC(use_io, "Force use of I/O access mode. 0=MMIO 1=PIO");
625module_param(multicast_filter_limit, int, 0); 625module_param(multicast_filter_limit, int, 0);
626module_param_array(media, int, NULL, 0); 626module_param_array(media, int, NULL, 0);
@@ -750,15 +750,22 @@ static void rtl8139_chip_reset (void __iomem *ioaddr)
750 750
751static __devinit struct net_device * rtl8139_init_board (struct pci_dev *pdev) 751static __devinit struct net_device * rtl8139_init_board (struct pci_dev *pdev)
752{ 752{
753 struct device *d = &pdev->dev;
753 void __iomem *ioaddr; 754 void __iomem *ioaddr;
754 struct net_device *dev; 755 struct net_device *dev;
755 struct rtl8139_private *tp; 756 struct rtl8139_private *tp;
756 u8 tmp8; 757 u8 tmp8;
757 int rc, disable_dev_on_err = 0; 758 int rc, disable_dev_on_err = 0;
758 unsigned int i; 759 unsigned int i, bar;
759 unsigned long pio_start, pio_end, pio_flags, pio_len; 760 unsigned long io_len;
760 unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
761 u32 version; 761 u32 version;
762 static const struct {
763 unsigned long mask;
764 char *type;
765 } res[] = {
766 { IORESOURCE_IO, "PIO" },
767 { IORESOURCE_MEM, "MMIO" }
768 };
762 769
763 assert (pdev != NULL); 770 assert (pdev != NULL);
764 771
@@ -777,78 +784,45 @@ static __devinit struct net_device * rtl8139_init_board (struct pci_dev *pdev)
777 if (rc) 784 if (rc)
778 goto err_out; 785 goto err_out;
779 786
780 pio_start = pci_resource_start (pdev, 0);
781 pio_end = pci_resource_end (pdev, 0);
782 pio_flags = pci_resource_flags (pdev, 0);
783 pio_len = pci_resource_len (pdev, 0);
784
785 mmio_start = pci_resource_start (pdev, 1);
786 mmio_end = pci_resource_end (pdev, 1);
787 mmio_flags = pci_resource_flags (pdev, 1);
788 mmio_len = pci_resource_len (pdev, 1);
789
790 /* set this immediately, we need to know before
791 * we talk to the chip directly */
792 pr_debug("PIO region size == 0x%02lX\n", pio_len);
793 pr_debug("MMIO region size == 0x%02lX\n", mmio_len);
794
795retry:
796 if (use_io) {
797 /* make sure PCI base addr 0 is PIO */
798 if (!(pio_flags & IORESOURCE_IO)) {
799 dev_err(&pdev->dev, "region #0 not a PIO resource, aborting\n");
800 rc = -ENODEV;
801 goto err_out;
802 }
803 /* check for weird/broken PCI region reporting */
804 if (pio_len < RTL_MIN_IO_SIZE) {
805 dev_err(&pdev->dev, "Invalid PCI I/O region size(s), aborting\n");
806 rc = -ENODEV;
807 goto err_out;
808 }
809 } else {
810 /* make sure PCI base addr 1 is MMIO */
811 if (!(mmio_flags & IORESOURCE_MEM)) {
812 dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n");
813 rc = -ENODEV;
814 goto err_out;
815 }
816 if (mmio_len < RTL_MIN_IO_SIZE) {
817 dev_err(&pdev->dev, "Invalid PCI mem region size(s), aborting\n");
818 rc = -ENODEV;
819 goto err_out;
820 }
821 }
822
823 rc = pci_request_regions (pdev, DRV_NAME); 787 rc = pci_request_regions (pdev, DRV_NAME);
824 if (rc) 788 if (rc)
825 goto err_out; 789 goto err_out;
826 disable_dev_on_err = 1; 790 disable_dev_on_err = 1;
827 791
828 /* enable PCI bus-mastering */
829 pci_set_master (pdev); 792 pci_set_master (pdev);
830 793
831 if (use_io) { 794retry:
832 ioaddr = pci_iomap(pdev, 0, 0); 795 /* PIO bar register comes first. */
833 if (!ioaddr) { 796 bar = !use_io;
834 dev_err(&pdev->dev, "cannot map PIO, aborting\n"); 797
835 rc = -EIO; 798 io_len = pci_resource_len(pdev, bar);
836 goto err_out; 799
837 } 800 dev_dbg(d, "%s region size = 0x%02lX\n", res[bar].type, io_len);
838 dev->base_addr = pio_start; 801
839 tp->regs_len = pio_len; 802 if (!(pci_resource_flags(pdev, bar) & res[bar].mask)) {
840 } else { 803 dev_err(d, "region #%d not a %s resource, aborting\n", bar,
841 /* ioremap MMIO region */ 804 res[bar].type);
842 ioaddr = pci_iomap(pdev, 1, 0); 805 rc = -ENODEV;
843 if (ioaddr == NULL) { 806 goto err_out;
844 dev_err(&pdev->dev, "cannot remap MMIO, trying PIO\n"); 807 }
845 pci_release_regions(pdev); 808 if (io_len < RTL_MIN_IO_SIZE) {
846 use_io = 1; 809 dev_err(d, "Invalid PCI %s region size(s), aborting\n",
810 res[bar].type);
811 rc = -ENODEV;
812 goto err_out;
813 }
814
815 ioaddr = pci_iomap(pdev, bar, 0);
816 if (!ioaddr) {
817 dev_err(d, "cannot map %s\n", res[bar].type);
818 if (!use_io) {
819 use_io = true;
847 goto retry; 820 goto retry;
848 } 821 }
849 dev->base_addr = (long) ioaddr; 822 rc = -ENODEV;
850 tp->regs_len = mmio_len; 823 goto err_out;
851 } 824 }
825 tp->regs_len = io_len;
852 tp->mmio_addr = ioaddr; 826 tp->mmio_addr = ioaddr;
853 827
854 /* Bring old chips out of low-power mode. */ 828 /* Bring old chips out of low-power mode. */
@@ -1035,8 +1009,6 @@ static int __devinit rtl8139_init_one (struct pci_dev *pdev,
1035 dev->hw_features |= NETIF_F_RXALL; 1009 dev->hw_features |= NETIF_F_RXALL;
1036 dev->hw_features |= NETIF_F_RXFCS; 1010 dev->hw_features |= NETIF_F_RXFCS;
1037 1011
1038 dev->irq = pdev->irq;
1039
1040 /* tp zeroed and aligned in alloc_etherdev */ 1012 /* tp zeroed and aligned in alloc_etherdev */
1041 tp = netdev_priv(dev); 1013 tp = netdev_priv(dev);
1042 1014
@@ -1062,9 +1034,9 @@ static int __devinit rtl8139_init_one (struct pci_dev *pdev,
1062 1034
1063 pci_set_drvdata (pdev, dev); 1035 pci_set_drvdata (pdev, dev);
1064 1036
1065 netdev_info(dev, "%s at 0x%lx, %pM, IRQ %d\n", 1037 netdev_info(dev, "%s at 0x%p, %pM, IRQ %d\n",
1066 board_info[ent->driver_data].name, 1038 board_info[ent->driver_data].name,
1067 dev->base_addr, dev->dev_addr, dev->irq); 1039 ioaddr, dev->dev_addr, pdev->irq);
1068 1040
1069 netdev_dbg(dev, "Identified 8139 chip type '%s'\n", 1041 netdev_dbg(dev, "Identified 8139 chip type '%s'\n",
1070 rtl_chip_info[tp->chipset].name); 1042 rtl_chip_info[tp->chipset].name);
@@ -1339,10 +1311,11 @@ static void mdio_write (struct net_device *dev, int phy_id, int location,
1339static int rtl8139_open (struct net_device *dev) 1311static int rtl8139_open (struct net_device *dev)
1340{ 1312{
1341 struct rtl8139_private *tp = netdev_priv(dev); 1313 struct rtl8139_private *tp = netdev_priv(dev);
1342 int retval;
1343 void __iomem *ioaddr = tp->mmio_addr; 1314 void __iomem *ioaddr = tp->mmio_addr;
1315 const int irq = tp->pci_dev->irq;
1316 int retval;
1344 1317
1345 retval = request_irq (dev->irq, rtl8139_interrupt, IRQF_SHARED, dev->name, dev); 1318 retval = request_irq(irq, rtl8139_interrupt, IRQF_SHARED, dev->name, dev);
1346 if (retval) 1319 if (retval)
1347 return retval; 1320 return retval;
1348 1321
@@ -1351,7 +1324,7 @@ static int rtl8139_open (struct net_device *dev)
1351 tp->rx_ring = dma_alloc_coherent(&tp->pci_dev->dev, RX_BUF_TOT_LEN, 1324 tp->rx_ring = dma_alloc_coherent(&tp->pci_dev->dev, RX_BUF_TOT_LEN,
1352 &tp->rx_ring_dma, GFP_KERNEL); 1325 &tp->rx_ring_dma, GFP_KERNEL);
1353 if (tp->tx_bufs == NULL || tp->rx_ring == NULL) { 1326 if (tp->tx_bufs == NULL || tp->rx_ring == NULL) {
1354 free_irq(dev->irq, dev); 1327 free_irq(irq, dev);
1355 1328
1356 if (tp->tx_bufs) 1329 if (tp->tx_bufs)
1357 dma_free_coherent(&tp->pci_dev->dev, TX_BUF_TOT_LEN, 1330 dma_free_coherent(&tp->pci_dev->dev, TX_BUF_TOT_LEN,
@@ -1377,7 +1350,7 @@ static int rtl8139_open (struct net_device *dev)
1377 "%s() ioaddr %#llx IRQ %d GP Pins %02x %s-duplex\n", 1350 "%s() ioaddr %#llx IRQ %d GP Pins %02x %s-duplex\n",
1378 __func__, 1351 __func__,
1379 (unsigned long long)pci_resource_start (tp->pci_dev, 1), 1352 (unsigned long long)pci_resource_start (tp->pci_dev, 1),
1380 dev->irq, RTL_R8 (MediaStatus), 1353 irq, RTL_R8 (MediaStatus),
1381 tp->mii.full_duplex ? "full" : "half"); 1354 tp->mii.full_duplex ? "full" : "half");
1382 1355
1383 rtl8139_start_thread(tp); 1356 rtl8139_start_thread(tp);
@@ -2240,9 +2213,12 @@ static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance)
2240 */ 2213 */
2241static void rtl8139_poll_controller(struct net_device *dev) 2214static void rtl8139_poll_controller(struct net_device *dev)
2242{ 2215{
2243 disable_irq(dev->irq); 2216 struct rtl8139_private *tp = netdev_priv(dev);
2244 rtl8139_interrupt(dev->irq, dev); 2217 const int irq = tp->pci_dev->irq;
2245 enable_irq(dev->irq); 2218
2219 disable_irq(irq);
2220 rtl8139_interrupt(irq, dev);
2221 enable_irq(irq);
2246} 2222}
2247#endif 2223#endif
2248 2224
@@ -2295,7 +2271,7 @@ static int rtl8139_close (struct net_device *dev)
2295 2271
2296 spin_unlock_irqrestore (&tp->lock, flags); 2272 spin_unlock_irqrestore (&tp->lock, flags);
2297 2273
2298 free_irq (dev->irq, dev); 2274 free_irq(tp->pci_dev->irq, dev);
2299 2275
2300 rtl8139_tx_clear (tp); 2276 rtl8139_tx_clear (tp);
2301 2277
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index f54509377efa..71393ea8ef51 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -1853,6 +1853,7 @@ static const struct ethtool_ops rtl8169_ethtool_ops = {
1853 .get_strings = rtl8169_get_strings, 1853 .get_strings = rtl8169_get_strings,
1854 .get_sset_count = rtl8169_get_sset_count, 1854 .get_sset_count = rtl8169_get_sset_count,
1855 .get_ethtool_stats = rtl8169_get_ethtool_stats, 1855 .get_ethtool_stats = rtl8169_get_ethtool_stats,
1856 .get_ts_info = ethtool_op_get_ts_info,
1856}; 1857};
1857 1858
1858static void rtl8169_get_mac_version(struct rtl8169_private *tp, 1859static void rtl8169_get_mac_version(struct rtl8169_private *tp,
diff --git a/drivers/net/ethernet/renesas/Kconfig b/drivers/net/ethernet/renesas/Kconfig
index 3fb2355af37e..46df3a04030c 100644
--- a/drivers/net/ethernet/renesas/Kconfig
+++ b/drivers/net/ethernet/renesas/Kconfig
@@ -4,11 +4,11 @@
4 4
5config SH_ETH 5config SH_ETH
6 tristate "Renesas SuperH Ethernet support" 6 tristate "Renesas SuperH Ethernet support"
7 depends on SUPERH && \ 7 depends on (SUPERH || ARCH_SHMOBILE) && \
8 (CPU_SUBTYPE_SH7710 || CPU_SUBTYPE_SH7712 || \ 8 (CPU_SUBTYPE_SH7710 || CPU_SUBTYPE_SH7712 || \
9 CPU_SUBTYPE_SH7763 || CPU_SUBTYPE_SH7619 || \ 9 CPU_SUBTYPE_SH7763 || CPU_SUBTYPE_SH7619 || \
10 CPU_SUBTYPE_SH7724 || CPU_SUBTYPE_SH7734 || \ 10 CPU_SUBTYPE_SH7724 || CPU_SUBTYPE_SH7734 || \
11 CPU_SUBTYPE_SH7757) 11 CPU_SUBTYPE_SH7757 || ARCH_R8A7740)
12 select CRC32 12 select CRC32
13 select NET_CORE 13 select NET_CORE
14 select MII 14 select MII
@@ -17,4 +17,5 @@ config SH_ETH
17 ---help--- 17 ---help---
18 Renesas SuperH Ethernet device driver. 18 Renesas SuperH Ethernet device driver.
19 This driver supporting CPUs are: 19 This driver supporting CPUs are:
20 - SH7619, SH7710, SH7712, SH7724, SH7734, SH7763 and SH7757. 20 - SH7619, SH7710, SH7712, SH7724, SH7734, SH7763, SH7757,
21 and R8A7740.
diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
index d63e09b29a96..be3c22179161 100644
--- a/drivers/net/ethernet/renesas/sh_eth.c
+++ b/drivers/net/ethernet/renesas/sh_eth.c
@@ -386,6 +386,114 @@ static void sh_eth_reset_hw_crc(struct net_device *ndev)
386 sh_eth_write(ndev, 0x0, CSMR); 386 sh_eth_write(ndev, 0x0, CSMR);
387} 387}
388 388
389#elif defined(CONFIG_ARCH_R8A7740)
390#define SH_ETH_HAS_TSU 1
391static void sh_eth_chip_reset(struct net_device *ndev)
392{
393 struct sh_eth_private *mdp = netdev_priv(ndev);
394 unsigned long mii;
395
396 /* reset device */
397 sh_eth_tsu_write(mdp, ARSTR_ARSTR, ARSTR);
398 mdelay(1);
399
400 switch (mdp->phy_interface) {
401 case PHY_INTERFACE_MODE_GMII:
402 mii = 2;
403 break;
404 case PHY_INTERFACE_MODE_MII:
405 mii = 1;
406 break;
407 case PHY_INTERFACE_MODE_RMII:
408 default:
409 mii = 0;
410 break;
411 }
412 sh_eth_write(ndev, mii, RMII_MII);
413}
414
415static void sh_eth_reset(struct net_device *ndev)
416{
417 int cnt = 100;
418
419 sh_eth_write(ndev, EDSR_ENALL, EDSR);
420 sh_eth_write(ndev, sh_eth_read(ndev, EDMR) | EDMR_SRST_GETHER, EDMR);
421 while (cnt > 0) {
422 if (!(sh_eth_read(ndev, EDMR) & 0x3))
423 break;
424 mdelay(1);
425 cnt--;
426 }
427 if (cnt == 0)
428 printk(KERN_ERR "Device reset fail\n");
429
430 /* Table Init */
431 sh_eth_write(ndev, 0x0, TDLAR);
432 sh_eth_write(ndev, 0x0, TDFAR);
433 sh_eth_write(ndev, 0x0, TDFXR);
434 sh_eth_write(ndev, 0x0, TDFFR);
435 sh_eth_write(ndev, 0x0, RDLAR);
436 sh_eth_write(ndev, 0x0, RDFAR);
437 sh_eth_write(ndev, 0x0, RDFXR);
438 sh_eth_write(ndev, 0x0, RDFFR);
439}
440
441static void sh_eth_set_duplex(struct net_device *ndev)
442{
443 struct sh_eth_private *mdp = netdev_priv(ndev);
444
445 if (mdp->duplex) /* Full */
446 sh_eth_write(ndev, sh_eth_read(ndev, ECMR) | ECMR_DM, ECMR);
447 else /* Half */
448 sh_eth_write(ndev, sh_eth_read(ndev, ECMR) & ~ECMR_DM, ECMR);
449}
450
451static void sh_eth_set_rate(struct net_device *ndev)
452{
453 struct sh_eth_private *mdp = netdev_priv(ndev);
454
455 switch (mdp->speed) {
456 case 10: /* 10BASE */
457 sh_eth_write(ndev, GECMR_10, GECMR);
458 break;
459 case 100:/* 100BASE */
460 sh_eth_write(ndev, GECMR_100, GECMR);
461 break;
462 case 1000: /* 1000BASE */
463 sh_eth_write(ndev, GECMR_1000, GECMR);
464 break;
465 default:
466 break;
467 }
468}
469
470/* R8A7740 */
471static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
472 .chip_reset = sh_eth_chip_reset,
473 .set_duplex = sh_eth_set_duplex,
474 .set_rate = sh_eth_set_rate,
475
476 .ecsr_value = ECSR_ICD | ECSR_MPD,
477 .ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
478 .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
479
480 .tx_check = EESR_TC1 | EESR_FTC,
481 .eesr_err_check = EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT | \
482 EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE | \
483 EESR_ECI,
484 .tx_error_check = EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_TDE | \
485 EESR_TFE,
486
487 .apr = 1,
488 .mpr = 1,
489 .tpauser = 1,
490 .bculr = 1,
491 .hw_swap = 1,
492 .no_trimd = 1,
493 .no_ade = 1,
494 .tsu = 1,
495};
496
389#elif defined(CONFIG_CPU_SUBTYPE_SH7619) 497#elif defined(CONFIG_CPU_SUBTYPE_SH7619)
390#define SH_ETH_RESET_DEFAULT 1 498#define SH_ETH_RESET_DEFAULT 1
391static struct sh_eth_cpu_data sh_eth_my_cpu_data = { 499static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
@@ -443,7 +551,7 @@ static void sh_eth_reset(struct net_device *ndev)
443} 551}
444#endif 552#endif
445 553
446#if defined(CONFIG_CPU_SH4) 554#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_SHMOBILE)
447static void sh_eth_set_receive_align(struct sk_buff *skb) 555static void sh_eth_set_receive_align(struct sk_buff *skb)
448{ 556{
449 int reserve; 557 int reserve;
@@ -919,6 +1027,10 @@ static int sh_eth_rx(struct net_device *ndev)
919 desc_status = edmac_to_cpu(mdp, rxdesc->status); 1027 desc_status = edmac_to_cpu(mdp, rxdesc->status);
920 pkt_len = rxdesc->frame_length; 1028 pkt_len = rxdesc->frame_length;
921 1029
1030#if defined(CONFIG_ARCH_R8A7740)
1031 desc_status >>= 16;
1032#endif
1033
922 if (--boguscnt < 0) 1034 if (--boguscnt < 0)
923 break; 1035 break;
924 1036
diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
index 0fa14afce23d..57b8e1fc5d15 100644
--- a/drivers/net/ethernet/renesas/sh_eth.h
+++ b/drivers/net/ethernet/renesas/sh_eth.h
@@ -372,7 +372,7 @@ static const u16 sh_eth_offset_fast_sh3_sh2[SH_ETH_MAX_REGISTER_OFFSET] = {
372}; 372};
373 373
374/* Driver's parameters */ 374/* Driver's parameters */
375#if defined(CONFIG_CPU_SH4) 375#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_SHMOBILE)
376#define SH4_SKB_RX_ALIGN 32 376#define SH4_SKB_RX_ALIGN 32
377#else 377#else
378#define SH2_SH3_SKB_RX_ALIGN 2 378#define SH2_SH3_SKB_RX_ALIGN 2
@@ -381,7 +381,8 @@ static const u16 sh_eth_offset_fast_sh3_sh2[SH_ETH_MAX_REGISTER_OFFSET] = {
381/* 381/*
382 * Register's bits 382 * Register's bits
383 */ 383 */
384#if defined(CONFIG_CPU_SUBTYPE_SH7734) || defined(CONFIG_CPU_SUBTYPE_SH7763) 384#if defined(CONFIG_CPU_SUBTYPE_SH7734) || defined(CONFIG_CPU_SUBTYPE_SH7763) ||\
385 defined(CONFIG_ARCH_R8A7740)
385/* EDSR */ 386/* EDSR */
386enum EDSR_BIT { 387enum EDSR_BIT {
387 EDSR_ENT = 0x01, EDSR_ENR = 0x02, 388 EDSR_ENT = 0x01, EDSR_ENR = 0x02,
diff --git a/drivers/net/ethernet/silan/sc92031.c b/drivers/net/ethernet/silan/sc92031.c
index a284d6440538..32e55664df6e 100644
--- a/drivers/net/ethernet/silan/sc92031.c
+++ b/drivers/net/ethernet/silan/sc92031.c
@@ -39,9 +39,7 @@
39#define SC92031_NAME "sc92031" 39#define SC92031_NAME "sc92031"
40 40
41/* BAR 0 is MMIO, BAR 1 is PIO */ 41/* BAR 0 is MMIO, BAR 1 is PIO */
42#ifndef SC92031_USE_BAR 42#define SC92031_USE_PIO 0
43#define SC92031_USE_BAR 0
44#endif
45 43
46/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). */ 44/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). */
47static int multicast_filter_limit = 64; 45static int multicast_filter_limit = 64;
@@ -366,7 +364,7 @@ static void sc92031_disable_interrupts(struct net_device *dev)
366 mmiowb(); 364 mmiowb();
367 365
368 /* wait for any concurrent interrupt/tasklet to finish */ 366 /* wait for any concurrent interrupt/tasklet to finish */
369 synchronize_irq(dev->irq); 367 synchronize_irq(priv->pdev->irq);
370 tasklet_disable(&priv->tasklet); 368 tasklet_disable(&priv->tasklet);
371} 369}
372 370
@@ -1114,10 +1112,13 @@ static void sc92031_tx_timeout(struct net_device *dev)
1114#ifdef CONFIG_NET_POLL_CONTROLLER 1112#ifdef CONFIG_NET_POLL_CONTROLLER
1115static void sc92031_poll_controller(struct net_device *dev) 1113static void sc92031_poll_controller(struct net_device *dev)
1116{ 1114{
1117 disable_irq(dev->irq); 1115 struct sc92031_priv *priv = netdev_priv(dev);
1118 if (sc92031_interrupt(dev->irq, dev) != IRQ_NONE) 1116 const int irq = priv->pdev->irq;
1117
1118 disable_irq(irq);
1119 if (sc92031_interrupt(irq, dev) != IRQ_NONE)
1119 sc92031_tasklet((unsigned long)dev); 1120 sc92031_tasklet((unsigned long)dev);
1120 enable_irq(dev->irq); 1121 enable_irq(irq);
1121} 1122}
1122#endif 1123#endif
1123 1124
@@ -1402,7 +1403,6 @@ static int __devinit sc92031_probe(struct pci_dev *pdev,
1402 struct net_device *dev; 1403 struct net_device *dev;
1403 struct sc92031_priv *priv; 1404 struct sc92031_priv *priv;
1404 u32 mac0, mac1; 1405 u32 mac0, mac1;
1405 unsigned long base_addr;
1406 1406
1407 err = pci_enable_device(pdev); 1407 err = pci_enable_device(pdev);
1408 if (unlikely(err < 0)) 1408 if (unlikely(err < 0))
@@ -1422,7 +1422,7 @@ static int __devinit sc92031_probe(struct pci_dev *pdev,
1422 if (unlikely(err < 0)) 1422 if (unlikely(err < 0))
1423 goto out_request_regions; 1423 goto out_request_regions;
1424 1424
1425 port_base = pci_iomap(pdev, SC92031_USE_BAR, 0); 1425 port_base = pci_iomap(pdev, SC92031_USE_PIO, 0);
1426 if (unlikely(!port_base)) { 1426 if (unlikely(!port_base)) {
1427 err = -EIO; 1427 err = -EIO;
1428 goto out_iomap; 1428 goto out_iomap;
@@ -1437,14 +1437,6 @@ static int __devinit sc92031_probe(struct pci_dev *pdev,
1437 pci_set_drvdata(pdev, dev); 1437 pci_set_drvdata(pdev, dev);
1438 SET_NETDEV_DEV(dev, &pdev->dev); 1438 SET_NETDEV_DEV(dev, &pdev->dev);
1439 1439
1440#if SC92031_USE_BAR == 0
1441 dev->mem_start = pci_resource_start(pdev, SC92031_USE_BAR);
1442 dev->mem_end = pci_resource_end(pdev, SC92031_USE_BAR);
1443#elif SC92031_USE_BAR == 1
1444 dev->base_addr = pci_resource_start(pdev, SC92031_USE_BAR);
1445#endif
1446 dev->irq = pdev->irq;
1447
1448 /* faked with skb_copy_and_csum_dev */ 1440 /* faked with skb_copy_and_csum_dev */
1449 dev->features = NETIF_F_SG | NETIF_F_HIGHDMA | 1441 dev->features = NETIF_F_SG | NETIF_F_HIGHDMA |
1450 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; 1442 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
@@ -1478,13 +1470,9 @@ static int __devinit sc92031_probe(struct pci_dev *pdev,
1478 if (err < 0) 1470 if (err < 0)
1479 goto out_register_netdev; 1471 goto out_register_netdev;
1480 1472
1481#if SC92031_USE_BAR == 0
1482 base_addr = dev->mem_start;
1483#elif SC92031_USE_BAR == 1
1484 base_addr = dev->base_addr;
1485#endif
1486 printk(KERN_INFO "%s: SC92031 at 0x%lx, %pM, IRQ %d\n", dev->name, 1473 printk(KERN_INFO "%s: SC92031 at 0x%lx, %pM, IRQ %d\n", dev->name,
1487 base_addr, dev->dev_addr, dev->irq); 1474 (long)pci_resource_start(pdev, SC92031_USE_PIO), dev->dev_addr,
1475 pdev->irq);
1488 1476
1489 return 0; 1477 return 0;
1490 1478
diff --git a/drivers/net/ethernet/sis/sis190.c b/drivers/net/ethernet/sis/sis190.c
index a9deda8eaf63..4613591b43e7 100644
--- a/drivers/net/ethernet/sis/sis190.c
+++ b/drivers/net/ethernet/sis/sis190.c
@@ -729,7 +729,7 @@ static void sis190_tx_interrupt(struct net_device *dev,
729 * The interrupt handler does all of the Rx thread work and cleans up after 729 * The interrupt handler does all of the Rx thread work and cleans up after
730 * the Tx thread. 730 * the Tx thread.
731 */ 731 */
732static irqreturn_t sis190_interrupt(int irq, void *__dev) 732static irqreturn_t sis190_irq(int irq, void *__dev)
733{ 733{
734 struct net_device *dev = __dev; 734 struct net_device *dev = __dev;
735 struct sis190_private *tp = netdev_priv(dev); 735 struct sis190_private *tp = netdev_priv(dev);
@@ -772,11 +772,11 @@ out:
772static void sis190_netpoll(struct net_device *dev) 772static void sis190_netpoll(struct net_device *dev)
773{ 773{
774 struct sis190_private *tp = netdev_priv(dev); 774 struct sis190_private *tp = netdev_priv(dev);
775 struct pci_dev *pdev = tp->pci_dev; 775 const int irq = tp->pci_dev->irq;
776 776
777 disable_irq(pdev->irq); 777 disable_irq(irq);
778 sis190_interrupt(pdev->irq, dev); 778 sis190_irq(irq, dev);
779 enable_irq(pdev->irq); 779 enable_irq(irq);
780} 780}
781#endif 781#endif
782 782
@@ -1085,7 +1085,7 @@ static int sis190_open(struct net_device *dev)
1085 1085
1086 sis190_request_timer(dev); 1086 sis190_request_timer(dev);
1087 1087
1088 rc = request_irq(dev->irq, sis190_interrupt, IRQF_SHARED, dev->name, dev); 1088 rc = request_irq(pdev->irq, sis190_irq, IRQF_SHARED, dev->name, dev);
1089 if (rc < 0) 1089 if (rc < 0)
1090 goto err_release_timer_2; 1090 goto err_release_timer_2;
1091 1091
@@ -1097,11 +1097,9 @@ err_release_timer_2:
1097 sis190_delete_timer(dev); 1097 sis190_delete_timer(dev);
1098 sis190_rx_clear(tp); 1098 sis190_rx_clear(tp);
1099err_free_rx_1: 1099err_free_rx_1:
1100 pci_free_consistent(tp->pci_dev, RX_RING_BYTES, tp->RxDescRing, 1100 pci_free_consistent(pdev, RX_RING_BYTES, tp->RxDescRing, tp->rx_dma);
1101 tp->rx_dma);
1102err_free_tx_0: 1101err_free_tx_0:
1103 pci_free_consistent(tp->pci_dev, TX_RING_BYTES, tp->TxDescRing, 1102 pci_free_consistent(pdev, TX_RING_BYTES, tp->TxDescRing, tp->tx_dma);
1104 tp->tx_dma);
1105 goto out; 1103 goto out;
1106} 1104}
1107 1105
@@ -1141,7 +1139,7 @@ static void sis190_down(struct net_device *dev)
1141 1139
1142 spin_unlock_irq(&tp->lock); 1140 spin_unlock_irq(&tp->lock);
1143 1141
1144 synchronize_irq(dev->irq); 1142 synchronize_irq(tp->pci_dev->irq);
1145 1143
1146 if (!poll_locked) 1144 if (!poll_locked)
1147 poll_locked++; 1145 poll_locked++;
@@ -1161,7 +1159,7 @@ static int sis190_close(struct net_device *dev)
1161 1159
1162 sis190_down(dev); 1160 sis190_down(dev);
1163 1161
1164 free_irq(dev->irq, dev); 1162 free_irq(pdev->irq, dev);
1165 1163
1166 pci_free_consistent(pdev, TX_RING_BYTES, tp->TxDescRing, tp->tx_dma); 1164 pci_free_consistent(pdev, TX_RING_BYTES, tp->TxDescRing, tp->tx_dma);
1167 pci_free_consistent(pdev, RX_RING_BYTES, tp->RxDescRing, tp->rx_dma); 1165 pci_free_consistent(pdev, RX_RING_BYTES, tp->RxDescRing, tp->rx_dma);
@@ -1884,8 +1882,6 @@ static int __devinit sis190_init_one(struct pci_dev *pdev,
1884 dev->netdev_ops = &sis190_netdev_ops; 1882 dev->netdev_ops = &sis190_netdev_ops;
1885 1883
1886 SET_ETHTOOL_OPS(dev, &sis190_ethtool_ops); 1884 SET_ETHTOOL_OPS(dev, &sis190_ethtool_ops);
1887 dev->irq = pdev->irq;
1888 dev->base_addr = (unsigned long) 0xdead;
1889 dev->watchdog_timeo = SIS190_TX_TIMEOUT; 1885 dev->watchdog_timeo = SIS190_TX_TIMEOUT;
1890 1886
1891 spin_lock_init(&tp->lock); 1887 spin_lock_init(&tp->lock);
@@ -1902,7 +1898,7 @@ static int __devinit sis190_init_one(struct pci_dev *pdev,
1902 netdev_info(dev, "%s: %s at %p (IRQ: %d), %pM\n", 1898 netdev_info(dev, "%s: %s at %p (IRQ: %d), %pM\n",
1903 pci_name(pdev), 1899 pci_name(pdev),
1904 sis_chip_info[ent->driver_data].name, 1900 sis_chip_info[ent->driver_data].name,
1905 ioaddr, dev->irq, dev->dev_addr); 1901 ioaddr, pdev->irq, dev->dev_addr);
1906 netdev_info(dev, "%s mode.\n", 1902 netdev_info(dev, "%s mode.\n",
1907 (tp->features & F_HAS_RGMII) ? "RGMII" : "GMII"); 1903 (tp->features & F_HAS_RGMII) ? "RGMII" : "GMII");
1908 } 1904 }
diff --git a/drivers/net/ethernet/sis/sis900.c b/drivers/net/ethernet/sis/sis900.c
index 5ccf02e7e3ad..203d9c6ec23a 100644
--- a/drivers/net/ethernet/sis/sis900.c
+++ b/drivers/net/ethernet/sis/sis900.c
@@ -168,6 +168,8 @@ struct sis900_private {
168 unsigned int cur_phy; 168 unsigned int cur_phy;
169 struct mii_if_info mii_info; 169 struct mii_if_info mii_info;
170 170
171 void __iomem *ioaddr;
172
171 struct timer_list timer; /* Link status detection timer. */ 173 struct timer_list timer; /* Link status detection timer. */
172 u8 autong_complete; /* 1: auto-negotiate complete */ 174 u8 autong_complete; /* 1: auto-negotiate complete */
173 175
@@ -201,13 +203,18 @@ MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtere
201MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt"); 203MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
202MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level"); 204MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
203 205
206#define sw32(reg, val) iowrite32(val, ioaddr + (reg))
207#define sw8(reg, val) iowrite8(val, ioaddr + (reg))
208#define sr32(reg) ioread32(ioaddr + (reg))
209#define sr16(reg) ioread16(ioaddr + (reg))
210
204#ifdef CONFIG_NET_POLL_CONTROLLER 211#ifdef CONFIG_NET_POLL_CONTROLLER
205static void sis900_poll(struct net_device *dev); 212static void sis900_poll(struct net_device *dev);
206#endif 213#endif
207static int sis900_open(struct net_device *net_dev); 214static int sis900_open(struct net_device *net_dev);
208static int sis900_mii_probe (struct net_device * net_dev); 215static int sis900_mii_probe (struct net_device * net_dev);
209static void sis900_init_rxfilter (struct net_device * net_dev); 216static void sis900_init_rxfilter (struct net_device * net_dev);
210static u16 read_eeprom(long ioaddr, int location); 217static u16 read_eeprom(void __iomem *ioaddr, int location);
211static int mdio_read(struct net_device *net_dev, int phy_id, int location); 218static int mdio_read(struct net_device *net_dev, int phy_id, int location);
212static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val); 219static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
213static void sis900_timer(unsigned long data); 220static void sis900_timer(unsigned long data);
@@ -231,7 +238,7 @@ static u16 sis900_default_phy(struct net_device * net_dev);
231static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy); 238static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
232static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr); 239static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
233static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr); 240static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
234static void sis900_set_mode (long ioaddr, int speed, int duplex); 241static void sis900_set_mode(struct sis900_private *, int speed, int duplex);
235static const struct ethtool_ops sis900_ethtool_ops; 242static const struct ethtool_ops sis900_ethtool_ops;
236 243
237/** 244/**
@@ -246,7 +253,8 @@ static const struct ethtool_ops sis900_ethtool_ops;
246 253
247static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev) 254static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
248{ 255{
249 long ioaddr = pci_resource_start(pci_dev, 0); 256 struct sis900_private *sis_priv = netdev_priv(net_dev);
257 void __iomem *ioaddr = sis_priv->ioaddr;
250 u16 signature; 258 u16 signature;
251 int i; 259 int i;
252 260
@@ -325,29 +333,30 @@ static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev,
325static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev, 333static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,
326 struct net_device *net_dev) 334 struct net_device *net_dev)
327{ 335{
328 long ioaddr = net_dev->base_addr; 336 struct sis900_private *sis_priv = netdev_priv(net_dev);
337 void __iomem *ioaddr = sis_priv->ioaddr;
329 u32 rfcrSave; 338 u32 rfcrSave;
330 u32 i; 339 u32 i;
331 340
332 rfcrSave = inl(rfcr + ioaddr); 341 rfcrSave = sr32(rfcr);
333 342
334 outl(rfcrSave | RELOAD, ioaddr + cr); 343 sw32(cr, rfcrSave | RELOAD);
335 outl(0, ioaddr + cr); 344 sw32(cr, 0);
336 345
337 /* disable packet filtering before setting filter */ 346 /* disable packet filtering before setting filter */
338 outl(rfcrSave & ~RFEN, rfcr + ioaddr); 347 sw32(rfcr, rfcrSave & ~RFEN);
339 348
340 /* load MAC addr to filter data register */ 349 /* load MAC addr to filter data register */
341 for (i = 0 ; i < 3 ; i++) { 350 for (i = 0 ; i < 3 ; i++) {
342 outl((i << RFADDR_shift), ioaddr + rfcr); 351 sw32(rfcr, (i << RFADDR_shift));
343 *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr); 352 *( ((u16 *)net_dev->dev_addr) + i) = sr16(rfdr);
344 } 353 }
345 354
346 /* Store MAC Address in perm_addr */ 355 /* Store MAC Address in perm_addr */
347 memcpy(net_dev->perm_addr, net_dev->dev_addr, ETH_ALEN); 356 memcpy(net_dev->perm_addr, net_dev->dev_addr, ETH_ALEN);
348 357
349 /* enable packet filtering */ 358 /* enable packet filtering */
350 outl(rfcrSave | RFEN, rfcr + ioaddr); 359 sw32(rfcr, rfcrSave | RFEN);
351 360
352 return 1; 361 return 1;
353} 362}
@@ -371,31 +380,30 @@ static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,
371static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev, 380static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
372 struct net_device *net_dev) 381 struct net_device *net_dev)
373{ 382{
374 long ioaddr = net_dev->base_addr; 383 struct sis900_private *sis_priv = netdev_priv(net_dev);
375 long ee_addr = ioaddr + mear; 384 void __iomem *ioaddr = sis_priv->ioaddr;
376 u32 waittime = 0; 385 int wait, rc = 0;
377 int i;
378 386
379 outl(EEREQ, ee_addr); 387 sw32(mear, EEREQ);
380 while(waittime < 2000) { 388 for (wait = 0; wait < 2000; wait++) {
381 if(inl(ee_addr) & EEGNT) { 389 if (sr32(mear) & EEGNT) {
390 u16 *mac = (u16 *)net_dev->dev_addr;
391 int i;
382 392
383 /* get MAC address from EEPROM */ 393 /* get MAC address from EEPROM */
384 for (i = 0; i < 3; i++) 394 for (i = 0; i < 3; i++)
385 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr); 395 mac[i] = read_eeprom(ioaddr, i + EEPROMMACAddr);
386 396
387 /* Store MAC Address in perm_addr */ 397 /* Store MAC Address in perm_addr */
388 memcpy(net_dev->perm_addr, net_dev->dev_addr, ETH_ALEN); 398 memcpy(net_dev->perm_addr, net_dev->dev_addr, ETH_ALEN);
389 399
390 outl(EEDONE, ee_addr); 400 rc = 1;
391 return 1; 401 break;
392 } else {
393 udelay(1);
394 waittime ++;
395 } 402 }
403 udelay(1);
396 } 404 }
397 outl(EEDONE, ee_addr); 405 sw32(mear, EEDONE);
398 return 0; 406 return rc;
399} 407}
400 408
401static const struct net_device_ops sis900_netdev_ops = { 409static const struct net_device_ops sis900_netdev_ops = {
@@ -433,7 +441,7 @@ static int __devinit sis900_probe(struct pci_dev *pci_dev,
433 struct pci_dev *dev; 441 struct pci_dev *dev;
434 dma_addr_t ring_dma; 442 dma_addr_t ring_dma;
435 void *ring_space; 443 void *ring_space;
436 long ioaddr; 444 void __iomem *ioaddr;
437 int i, ret; 445 int i, ret;
438 const char *card_name = card_names[pci_id->driver_data]; 446 const char *card_name = card_names[pci_id->driver_data];
439 const char *dev_name = pci_name(pci_dev); 447 const char *dev_name = pci_name(pci_dev);
@@ -464,14 +472,17 @@ static int __devinit sis900_probe(struct pci_dev *pci_dev,
464 SET_NETDEV_DEV(net_dev, &pci_dev->dev); 472 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
465 473
466 /* We do a request_region() to register /proc/ioports info. */ 474 /* We do a request_region() to register /proc/ioports info. */
467 ioaddr = pci_resource_start(pci_dev, 0);
468 ret = pci_request_regions(pci_dev, "sis900"); 475 ret = pci_request_regions(pci_dev, "sis900");
469 if (ret) 476 if (ret)
470 goto err_out; 477 goto err_out;
471 478
479 /* IO region. */
480 ioaddr = pci_iomap(pci_dev, 0, 0);
481 if (!ioaddr)
482 goto err_out_cleardev;
483
472 sis_priv = netdev_priv(net_dev); 484 sis_priv = netdev_priv(net_dev);
473 net_dev->base_addr = ioaddr; 485 sis_priv->ioaddr = ioaddr;
474 net_dev->irq = pci_dev->irq;
475 sis_priv->pci_dev = pci_dev; 486 sis_priv->pci_dev = pci_dev;
476 spin_lock_init(&sis_priv->lock); 487 spin_lock_init(&sis_priv->lock);
477 488
@@ -480,7 +491,7 @@ static int __devinit sis900_probe(struct pci_dev *pci_dev,
480 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma); 491 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
481 if (!ring_space) { 492 if (!ring_space) {
482 ret = -ENOMEM; 493 ret = -ENOMEM;
483 goto err_out_cleardev; 494 goto err_out_unmap;
484 } 495 }
485 sis_priv->tx_ring = ring_space; 496 sis_priv->tx_ring = ring_space;
486 sis_priv->tx_ring_dma = ring_dma; 497 sis_priv->tx_ring_dma = ring_dma;
@@ -534,7 +545,7 @@ static int __devinit sis900_probe(struct pci_dev *pci_dev,
534 545
535 /* 630ET : set the mii access mode as software-mode */ 546 /* 630ET : set the mii access mode as software-mode */
536 if (sis_priv->chipset_rev == SIS630ET_900_REV) 547 if (sis_priv->chipset_rev == SIS630ET_900_REV)
537 outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr); 548 sw32(cr, ACCESSMODE | sr32(cr));
538 549
539 /* probe for mii transceiver */ 550 /* probe for mii transceiver */
540 if (sis900_mii_probe(net_dev) == 0) { 551 if (sis900_mii_probe(net_dev) == 0) {
@@ -556,25 +567,27 @@ static int __devinit sis900_probe(struct pci_dev *pci_dev,
556 goto err_unmap_rx; 567 goto err_unmap_rx;
557 568
558 /* print some information about our NIC */ 569 /* print some information about our NIC */
559 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, %pM\n", 570 printk(KERN_INFO "%s: %s at 0x%p, IRQ %d, %pM\n",
560 net_dev->name, card_name, ioaddr, net_dev->irq, 571 net_dev->name, card_name, ioaddr, pci_dev->irq,
561 net_dev->dev_addr); 572 net_dev->dev_addr);
562 573
563 /* Detect Wake on Lan support */ 574 /* Detect Wake on Lan support */
564 ret = (inl(net_dev->base_addr + CFGPMC) & PMESP) >> 27; 575 ret = (sr32(CFGPMC) & PMESP) >> 27;
565 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0) 576 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
566 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name); 577 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
567 578
568 return 0; 579 return 0;
569 580
570 err_unmap_rx: 581err_unmap_rx:
571 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring, 582 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
572 sis_priv->rx_ring_dma); 583 sis_priv->rx_ring_dma);
573 err_unmap_tx: 584err_unmap_tx:
574 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring, 585 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
575 sis_priv->tx_ring_dma); 586 sis_priv->tx_ring_dma);
576 err_out_cleardev: 587err_out_unmap:
577 pci_set_drvdata(pci_dev, NULL); 588 pci_iounmap(pci_dev, ioaddr);
589err_out_cleardev:
590 pci_set_drvdata(pci_dev, NULL);
578 pci_release_regions(pci_dev); 591 pci_release_regions(pci_dev);
579 err_out: 592 err_out:
580 free_netdev(net_dev); 593 free_netdev(net_dev);
@@ -798,7 +811,7 @@ static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *ph
798 811
799 812
800/* Delay between EEPROM clock transitions. */ 813/* Delay between EEPROM clock transitions. */
801#define eeprom_delay() inl(ee_addr) 814#define eeprom_delay() sr32(mear)
802 815
803/** 816/**
804 * read_eeprom - Read Serial EEPROM 817 * read_eeprom - Read Serial EEPROM
@@ -809,41 +822,41 @@ static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *ph
809 * Note that location is in word (16 bits) unit 822 * Note that location is in word (16 bits) unit
810 */ 823 */
811 824
812static u16 __devinit read_eeprom(long ioaddr, int location) 825static u16 __devinit read_eeprom(void __iomem *ioaddr, int location)
813{ 826{
827 u32 read_cmd = location | EEread;
814 int i; 828 int i;
815 u16 retval = 0; 829 u16 retval = 0;
816 long ee_addr = ioaddr + mear;
817 u32 read_cmd = location | EEread;
818 830
819 outl(0, ee_addr); 831 sw32(mear, 0);
820 eeprom_delay(); 832 eeprom_delay();
821 outl(EECS, ee_addr); 833 sw32(mear, EECS);
822 eeprom_delay(); 834 eeprom_delay();
823 835
824 /* Shift the read command (9) bits out. */ 836 /* Shift the read command (9) bits out. */
825 for (i = 8; i >= 0; i--) { 837 for (i = 8; i >= 0; i--) {
826 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS; 838 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
827 outl(dataval, ee_addr); 839
840 sw32(mear, dataval);
828 eeprom_delay(); 841 eeprom_delay();
829 outl(dataval | EECLK, ee_addr); 842 sw32(mear, dataval | EECLK);
830 eeprom_delay(); 843 eeprom_delay();
831 } 844 }
832 outl(EECS, ee_addr); 845 sw32(mear, EECS);
833 eeprom_delay(); 846 eeprom_delay();
834 847
835 /* read the 16-bits data in */ 848 /* read the 16-bits data in */
836 for (i = 16; i > 0; i--) { 849 for (i = 16; i > 0; i--) {
837 outl(EECS, ee_addr); 850 sw32(mear, EECS);
838 eeprom_delay(); 851 eeprom_delay();
839 outl(EECS | EECLK, ee_addr); 852 sw32(mear, EECS | EECLK);
840 eeprom_delay(); 853 eeprom_delay();
841 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0); 854 retval = (retval << 1) | ((sr32(mear) & EEDO) ? 1 : 0);
842 eeprom_delay(); 855 eeprom_delay();
843 } 856 }
844 857
845 /* Terminate the EEPROM access. */ 858 /* Terminate the EEPROM access. */
846 outl(0, ee_addr); 859 sw32(mear, 0);
847 eeprom_delay(); 860 eeprom_delay();
848 861
849 return retval; 862 return retval;
@@ -852,24 +865,27 @@ static u16 __devinit read_eeprom(long ioaddr, int location)
852/* Read and write the MII management registers using software-generated 865/* Read and write the MII management registers using software-generated
853 serial MDIO protocol. Note that the command bits and data bits are 866 serial MDIO protocol. Note that the command bits and data bits are
854 send out separately */ 867 send out separately */
855#define mdio_delay() inl(mdio_addr) 868#define mdio_delay() sr32(mear)
856 869
857static void mdio_idle(long mdio_addr) 870static void mdio_idle(struct sis900_private *sp)
858{ 871{
859 outl(MDIO | MDDIR, mdio_addr); 872 void __iomem *ioaddr = sp->ioaddr;
873
874 sw32(mear, MDIO | MDDIR);
860 mdio_delay(); 875 mdio_delay();
861 outl(MDIO | MDDIR | MDC, mdio_addr); 876 sw32(mear, MDIO | MDDIR | MDC);
862} 877}
863 878
864/* Syncronize the MII management interface by shifting 32 one bits out. */ 879/* Synchronize the MII management interface by shifting 32 one bits out. */
865static void mdio_reset(long mdio_addr) 880static void mdio_reset(struct sis900_private *sp)
866{ 881{
882 void __iomem *ioaddr = sp->ioaddr;
867 int i; 883 int i;
868 884
869 for (i = 31; i >= 0; i--) { 885 for (i = 31; i >= 0; i--) {
870 outl(MDDIR | MDIO, mdio_addr); 886 sw32(mear, MDDIR | MDIO);
871 mdio_delay(); 887 mdio_delay();
872 outl(MDDIR | MDIO | MDC, mdio_addr); 888 sw32(mear, MDDIR | MDIO | MDC);
873 mdio_delay(); 889 mdio_delay();
874 } 890 }
875} 891}
@@ -887,31 +903,33 @@ static void mdio_reset(long mdio_addr)
887 903
888static int mdio_read(struct net_device *net_dev, int phy_id, int location) 904static int mdio_read(struct net_device *net_dev, int phy_id, int location)
889{ 905{
890 long mdio_addr = net_dev->base_addr + mear;
891 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift); 906 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
907 struct sis900_private *sp = netdev_priv(net_dev);
908 void __iomem *ioaddr = sp->ioaddr;
892 u16 retval = 0; 909 u16 retval = 0;
893 int i; 910 int i;
894 911
895 mdio_reset(mdio_addr); 912 mdio_reset(sp);
896 mdio_idle(mdio_addr); 913 mdio_idle(sp);
897 914
898 for (i = 15; i >= 0; i--) { 915 for (i = 15; i >= 0; i--) {
899 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; 916 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
900 outl(dataval, mdio_addr); 917
918 sw32(mear, dataval);
901 mdio_delay(); 919 mdio_delay();
902 outl(dataval | MDC, mdio_addr); 920 sw32(mear, dataval | MDC);
903 mdio_delay(); 921 mdio_delay();
904 } 922 }
905 923
906 /* Read the 16 data bits. */ 924 /* Read the 16 data bits. */
907 for (i = 16; i > 0; i--) { 925 for (i = 16; i > 0; i--) {
908 outl(0, mdio_addr); 926 sw32(mear, 0);
909 mdio_delay(); 927 mdio_delay();
910 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0); 928 retval = (retval << 1) | ((sr32(mear) & MDIO) ? 1 : 0);
911 outl(MDC, mdio_addr); 929 sw32(mear, MDC);
912 mdio_delay(); 930 mdio_delay();
913 } 931 }
914 outl(0x00, mdio_addr); 932 sw32(mear, 0x00);
915 933
916 return retval; 934 return retval;
917} 935}
@@ -931,19 +949,21 @@ static int mdio_read(struct net_device *net_dev, int phy_id, int location)
931static void mdio_write(struct net_device *net_dev, int phy_id, int location, 949static void mdio_write(struct net_device *net_dev, int phy_id, int location,
932 int value) 950 int value)
933{ 951{
934 long mdio_addr = net_dev->base_addr + mear;
935 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift); 952 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
953 struct sis900_private *sp = netdev_priv(net_dev);
954 void __iomem *ioaddr = sp->ioaddr;
936 int i; 955 int i;
937 956
938 mdio_reset(mdio_addr); 957 mdio_reset(sp);
939 mdio_idle(mdio_addr); 958 mdio_idle(sp);
940 959
941 /* Shift the command bits out. */ 960 /* Shift the command bits out. */
942 for (i = 15; i >= 0; i--) { 961 for (i = 15; i >= 0; i--) {
943 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; 962 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
944 outb(dataval, mdio_addr); 963
964 sw8(mear, dataval);
945 mdio_delay(); 965 mdio_delay();
946 outb(dataval | MDC, mdio_addr); 966 sw8(mear, dataval | MDC);
947 mdio_delay(); 967 mdio_delay();
948 } 968 }
949 mdio_delay(); 969 mdio_delay();
@@ -951,21 +971,22 @@ static void mdio_write(struct net_device *net_dev, int phy_id, int location,
951 /* Shift the value bits out. */ 971 /* Shift the value bits out. */
952 for (i = 15; i >= 0; i--) { 972 for (i = 15; i >= 0; i--) {
953 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR; 973 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
954 outl(dataval, mdio_addr); 974
975 sw32(mear, dataval);
955 mdio_delay(); 976 mdio_delay();
956 outl(dataval | MDC, mdio_addr); 977 sw32(mear, dataval | MDC);
957 mdio_delay(); 978 mdio_delay();
958 } 979 }
959 mdio_delay(); 980 mdio_delay();
960 981
961 /* Clear out extra bits. */ 982 /* Clear out extra bits. */
962 for (i = 2; i > 0; i--) { 983 for (i = 2; i > 0; i--) {
963 outb(0, mdio_addr); 984 sw8(mear, 0);
964 mdio_delay(); 985 mdio_delay();
965 outb(MDC, mdio_addr); 986 sw8(mear, MDC);
966 mdio_delay(); 987 mdio_delay();
967 } 988 }
968 outl(0x00, mdio_addr); 989 sw32(mear, 0x00);
969} 990}
970 991
971 992
@@ -1000,9 +1021,12 @@ static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
1000*/ 1021*/
1001static void sis900_poll(struct net_device *dev) 1022static void sis900_poll(struct net_device *dev)
1002{ 1023{
1003 disable_irq(dev->irq); 1024 struct sis900_private *sp = netdev_priv(dev);
1004 sis900_interrupt(dev->irq, dev); 1025 const int irq = sp->pci_dev->irq;
1005 enable_irq(dev->irq); 1026
1027 disable_irq(irq);
1028 sis900_interrupt(irq, dev);
1029 enable_irq(irq);
1006} 1030}
1007#endif 1031#endif
1008 1032
@@ -1018,7 +1042,7 @@ static int
1018sis900_open(struct net_device *net_dev) 1042sis900_open(struct net_device *net_dev)
1019{ 1043{
1020 struct sis900_private *sis_priv = netdev_priv(net_dev); 1044 struct sis900_private *sis_priv = netdev_priv(net_dev);
1021 long ioaddr = net_dev->base_addr; 1045 void __iomem *ioaddr = sis_priv->ioaddr;
1022 int ret; 1046 int ret;
1023 1047
1024 /* Soft reset the chip. */ 1048 /* Soft reset the chip. */
@@ -1027,8 +1051,8 @@ sis900_open(struct net_device *net_dev)
1027 /* Equalizer workaround Rule */ 1051 /* Equalizer workaround Rule */
1028 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1052 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1029 1053
1030 ret = request_irq(net_dev->irq, sis900_interrupt, IRQF_SHARED, 1054 ret = request_irq(sis_priv->pci_dev->irq, sis900_interrupt, IRQF_SHARED,
1031 net_dev->name, net_dev); 1055 net_dev->name, net_dev);
1032 if (ret) 1056 if (ret)
1033 return ret; 1057 return ret;
1034 1058
@@ -1042,12 +1066,12 @@ sis900_open(struct net_device *net_dev)
1042 netif_start_queue(net_dev); 1066 netif_start_queue(net_dev);
1043 1067
1044 /* Workaround for EDB */ 1068 /* Workaround for EDB */
1045 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); 1069 sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
1046 1070
1047 /* Enable all known interrupts by setting the interrupt mask. */ 1071 /* Enable all known interrupts by setting the interrupt mask. */
1048 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr); 1072 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE);
1049 outl(RxENA | inl(ioaddr + cr), ioaddr + cr); 1073 sw32(cr, RxENA | sr32(cr));
1050 outl(IE, ioaddr + ier); 1074 sw32(ier, IE);
1051 1075
1052 sis900_check_mode(net_dev, sis_priv->mii); 1076 sis900_check_mode(net_dev, sis_priv->mii);
1053 1077
@@ -1074,31 +1098,30 @@ static void
1074sis900_init_rxfilter (struct net_device * net_dev) 1098sis900_init_rxfilter (struct net_device * net_dev)
1075{ 1099{
1076 struct sis900_private *sis_priv = netdev_priv(net_dev); 1100 struct sis900_private *sis_priv = netdev_priv(net_dev);
1077 long ioaddr = net_dev->base_addr; 1101 void __iomem *ioaddr = sis_priv->ioaddr;
1078 u32 rfcrSave; 1102 u32 rfcrSave;
1079 u32 i; 1103 u32 i;
1080 1104
1081 rfcrSave = inl(rfcr + ioaddr); 1105 rfcrSave = sr32(rfcr);
1082 1106
1083 /* disable packet filtering before setting filter */ 1107 /* disable packet filtering before setting filter */
1084 outl(rfcrSave & ~RFEN, rfcr + ioaddr); 1108 sw32(rfcr, rfcrSave & ~RFEN);
1085 1109
1086 /* load MAC addr to filter data register */ 1110 /* load MAC addr to filter data register */
1087 for (i = 0 ; i < 3 ; i++) { 1111 for (i = 0 ; i < 3 ; i++) {
1088 u32 w; 1112 u32 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1089 1113
1090 w = (u32) *((u16 *)(net_dev->dev_addr)+i); 1114 sw32(rfcr, i << RFADDR_shift);
1091 outl((i << RFADDR_shift), ioaddr + rfcr); 1115 sw32(rfdr, w);
1092 outl(w, ioaddr + rfdr);
1093 1116
1094 if (netif_msg_hw(sis_priv)) { 1117 if (netif_msg_hw(sis_priv)) {
1095 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n", 1118 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
1096 net_dev->name, i, inl(ioaddr + rfdr)); 1119 net_dev->name, i, sr32(rfdr));
1097 } 1120 }
1098 } 1121 }
1099 1122
1100 /* enable packet filtering */ 1123 /* enable packet filtering */
1101 outl(rfcrSave | RFEN, rfcr + ioaddr); 1124 sw32(rfcr, rfcrSave | RFEN);
1102} 1125}
1103 1126
1104/** 1127/**
@@ -1112,7 +1135,7 @@ static void
1112sis900_init_tx_ring(struct net_device *net_dev) 1135sis900_init_tx_ring(struct net_device *net_dev)
1113{ 1136{
1114 struct sis900_private *sis_priv = netdev_priv(net_dev); 1137 struct sis900_private *sis_priv = netdev_priv(net_dev);
1115 long ioaddr = net_dev->base_addr; 1138 void __iomem *ioaddr = sis_priv->ioaddr;
1116 int i; 1139 int i;
1117 1140
1118 sis_priv->tx_full = 0; 1141 sis_priv->tx_full = 0;
@@ -1128,10 +1151,10 @@ sis900_init_tx_ring(struct net_device *net_dev)
1128 } 1151 }
1129 1152
1130 /* load Transmit Descriptor Register */ 1153 /* load Transmit Descriptor Register */
1131 outl(sis_priv->tx_ring_dma, ioaddr + txdp); 1154 sw32(txdp, sis_priv->tx_ring_dma);
1132 if (netif_msg_hw(sis_priv)) 1155 if (netif_msg_hw(sis_priv))
1133 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n", 1156 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
1134 net_dev->name, inl(ioaddr + txdp)); 1157 net_dev->name, sr32(txdp));
1135} 1158}
1136 1159
1137/** 1160/**
@@ -1146,7 +1169,7 @@ static void
1146sis900_init_rx_ring(struct net_device *net_dev) 1169sis900_init_rx_ring(struct net_device *net_dev)
1147{ 1170{
1148 struct sis900_private *sis_priv = netdev_priv(net_dev); 1171 struct sis900_private *sis_priv = netdev_priv(net_dev);
1149 long ioaddr = net_dev->base_addr; 1172 void __iomem *ioaddr = sis_priv->ioaddr;
1150 int i; 1173 int i;
1151 1174
1152 sis_priv->cur_rx = 0; 1175 sis_priv->cur_rx = 0;
@@ -1181,10 +1204,10 @@ sis900_init_rx_ring(struct net_device *net_dev)
1181 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC); 1204 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1182 1205
1183 /* load Receive Descriptor Register */ 1206 /* load Receive Descriptor Register */
1184 outl(sis_priv->rx_ring_dma, ioaddr + rxdp); 1207 sw32(rxdp, sis_priv->rx_ring_dma);
1185 if (netif_msg_hw(sis_priv)) 1208 if (netif_msg_hw(sis_priv))
1186 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n", 1209 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
1187 net_dev->name, inl(ioaddr + rxdp)); 1210 net_dev->name, sr32(rxdp));
1188} 1211}
1189 1212
1190/** 1213/**
@@ -1298,7 +1321,7 @@ static void sis900_timer(unsigned long data)
1298 1321
1299 sis900_read_mode(net_dev, &speed, &duplex); 1322 sis900_read_mode(net_dev, &speed, &duplex);
1300 if (duplex){ 1323 if (duplex){
1301 sis900_set_mode(net_dev->base_addr, speed, duplex); 1324 sis900_set_mode(sis_priv, speed, duplex);
1302 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1325 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1303 netif_start_queue(net_dev); 1326 netif_start_queue(net_dev);
1304 } 1327 }
@@ -1359,25 +1382,25 @@ static void sis900_timer(unsigned long data)
1359static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy) 1382static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1360{ 1383{
1361 struct sis900_private *sis_priv = netdev_priv(net_dev); 1384 struct sis900_private *sis_priv = netdev_priv(net_dev);
1362 long ioaddr = net_dev->base_addr; 1385 void __iomem *ioaddr = sis_priv->ioaddr;
1363 int speed, duplex; 1386 int speed, duplex;
1364 1387
1365 if (mii_phy->phy_types == LAN) { 1388 if (mii_phy->phy_types == LAN) {
1366 outl(~EXD & inl(ioaddr + cfg), ioaddr + cfg); 1389 sw32(cfg, ~EXD & sr32(cfg));
1367 sis900_set_capability(net_dev , mii_phy); 1390 sis900_set_capability(net_dev , mii_phy);
1368 sis900_auto_negotiate(net_dev, sis_priv->cur_phy); 1391 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1369 } else { 1392 } else {
1370 outl(EXD | inl(ioaddr + cfg), ioaddr + cfg); 1393 sw32(cfg, EXD | sr32(cfg));
1371 speed = HW_SPEED_HOME; 1394 speed = HW_SPEED_HOME;
1372 duplex = FDX_CAPABLE_HALF_SELECTED; 1395 duplex = FDX_CAPABLE_HALF_SELECTED;
1373 sis900_set_mode(ioaddr, speed, duplex); 1396 sis900_set_mode(sis_priv, speed, duplex);
1374 sis_priv->autong_complete = 1; 1397 sis_priv->autong_complete = 1;
1375 } 1398 }
1376} 1399}
1377 1400
1378/** 1401/**
1379 * sis900_set_mode - Set the media mode of mac register. 1402 * sis900_set_mode - Set the media mode of mac register.
1380 * @ioaddr: the address of the device 1403 * @sp: the device private data
1381 * @speed : the transmit speed to be determined 1404 * @speed : the transmit speed to be determined
1382 * @duplex: the duplex mode to be determined 1405 * @duplex: the duplex mode to be determined
1383 * 1406 *
@@ -1388,11 +1411,12 @@ static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_ph
1388 * double words. 1411 * double words.
1389 */ 1412 */
1390 1413
1391static void sis900_set_mode (long ioaddr, int speed, int duplex) 1414static void sis900_set_mode(struct sis900_private *sp, int speed, int duplex)
1392{ 1415{
1416 void __iomem *ioaddr = sp->ioaddr;
1393 u32 tx_flags = 0, rx_flags = 0; 1417 u32 tx_flags = 0, rx_flags = 0;
1394 1418
1395 if (inl(ioaddr + cfg) & EDB_MASTER_EN) { 1419 if (sr32( cfg) & EDB_MASTER_EN) {
1396 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) | 1420 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1397 (TX_FILL_THRESH << TxFILLT_shift); 1421 (TX_FILL_THRESH << TxFILLT_shift);
1398 rx_flags = DMA_BURST_64 << RxMXDMA_shift; 1422 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
@@ -1420,8 +1444,8 @@ static void sis900_set_mode (long ioaddr, int speed, int duplex)
1420 rx_flags |= RxAJAB; 1444 rx_flags |= RxAJAB;
1421#endif 1445#endif
1422 1446
1423 outl (tx_flags, ioaddr + txcfg); 1447 sw32(txcfg, tx_flags);
1424 outl (rx_flags, ioaddr + rxcfg); 1448 sw32(rxcfg, rx_flags);
1425} 1449}
1426 1450
1427/** 1451/**
@@ -1528,16 +1552,17 @@ static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex
1528static void sis900_tx_timeout(struct net_device *net_dev) 1552static void sis900_tx_timeout(struct net_device *net_dev)
1529{ 1553{
1530 struct sis900_private *sis_priv = netdev_priv(net_dev); 1554 struct sis900_private *sis_priv = netdev_priv(net_dev);
1531 long ioaddr = net_dev->base_addr; 1555 void __iomem *ioaddr = sis_priv->ioaddr;
1532 unsigned long flags; 1556 unsigned long flags;
1533 int i; 1557 int i;
1534 1558
1535 if(netif_msg_tx_err(sis_priv)) 1559 if (netif_msg_tx_err(sis_priv)) {
1536 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x\n", 1560 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x\n",
1537 net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr)); 1561 net_dev->name, sr32(cr), sr32(isr));
1562 }
1538 1563
1539 /* Disable interrupts by clearing the interrupt mask. */ 1564 /* Disable interrupts by clearing the interrupt mask. */
1540 outl(0x0000, ioaddr + imr); 1565 sw32(imr, 0x0000);
1541 1566
1542 /* use spinlock to prevent interrupt handler accessing buffer ring */ 1567 /* use spinlock to prevent interrupt handler accessing buffer ring */
1543 spin_lock_irqsave(&sis_priv->lock, flags); 1568 spin_lock_irqsave(&sis_priv->lock, flags);
@@ -1566,10 +1591,10 @@ static void sis900_tx_timeout(struct net_device *net_dev)
1566 net_dev->trans_start = jiffies; /* prevent tx timeout */ 1591 net_dev->trans_start = jiffies; /* prevent tx timeout */
1567 1592
1568 /* load Transmit Descriptor Register */ 1593 /* load Transmit Descriptor Register */
1569 outl(sis_priv->tx_ring_dma, ioaddr + txdp); 1594 sw32(txdp, sis_priv->tx_ring_dma);
1570 1595
1571 /* Enable all known interrupts by setting the interrupt mask. */ 1596 /* Enable all known interrupts by setting the interrupt mask. */
1572 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr); 1597 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE);
1573} 1598}
1574 1599
1575/** 1600/**
@@ -1586,7 +1611,7 @@ static netdev_tx_t
1586sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev) 1611sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1587{ 1612{
1588 struct sis900_private *sis_priv = netdev_priv(net_dev); 1613 struct sis900_private *sis_priv = netdev_priv(net_dev);
1589 long ioaddr = net_dev->base_addr; 1614 void __iomem *ioaddr = sis_priv->ioaddr;
1590 unsigned int entry; 1615 unsigned int entry;
1591 unsigned long flags; 1616 unsigned long flags;
1592 unsigned int index_cur_tx, index_dirty_tx; 1617 unsigned int index_cur_tx, index_dirty_tx;
@@ -1608,7 +1633,7 @@ sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1608 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev, 1633 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1609 skb->data, skb->len, PCI_DMA_TODEVICE); 1634 skb->data, skb->len, PCI_DMA_TODEVICE);
1610 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len); 1635 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1611 outl(TxENA | inl(ioaddr + cr), ioaddr + cr); 1636 sw32(cr, TxENA | sr32(cr));
1612 1637
1613 sis_priv->cur_tx ++; 1638 sis_priv->cur_tx ++;
1614 index_cur_tx = sis_priv->cur_tx; 1639 index_cur_tx = sis_priv->cur_tx;
@@ -1654,14 +1679,14 @@ static irqreturn_t sis900_interrupt(int irq, void *dev_instance)
1654 struct net_device *net_dev = dev_instance; 1679 struct net_device *net_dev = dev_instance;
1655 struct sis900_private *sis_priv = netdev_priv(net_dev); 1680 struct sis900_private *sis_priv = netdev_priv(net_dev);
1656 int boguscnt = max_interrupt_work; 1681 int boguscnt = max_interrupt_work;
1657 long ioaddr = net_dev->base_addr; 1682 void __iomem *ioaddr = sis_priv->ioaddr;
1658 u32 status; 1683 u32 status;
1659 unsigned int handled = 0; 1684 unsigned int handled = 0;
1660 1685
1661 spin_lock (&sis_priv->lock); 1686 spin_lock (&sis_priv->lock);
1662 1687
1663 do { 1688 do {
1664 status = inl(ioaddr + isr); 1689 status = sr32(isr);
1665 1690
1666 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0) 1691 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1667 /* nothing intresting happened */ 1692 /* nothing intresting happened */
@@ -1696,7 +1721,7 @@ static irqreturn_t sis900_interrupt(int irq, void *dev_instance)
1696 if(netif_msg_intr(sis_priv)) 1721 if(netif_msg_intr(sis_priv))
1697 printk(KERN_DEBUG "%s: exiting interrupt, " 1722 printk(KERN_DEBUG "%s: exiting interrupt, "
1698 "interrupt status = 0x%#8.8x.\n", 1723 "interrupt status = 0x%#8.8x.\n",
1699 net_dev->name, inl(ioaddr + isr)); 1724 net_dev->name, sr32(isr));
1700 1725
1701 spin_unlock (&sis_priv->lock); 1726 spin_unlock (&sis_priv->lock);
1702 return IRQ_RETVAL(handled); 1727 return IRQ_RETVAL(handled);
@@ -1715,7 +1740,7 @@ static irqreturn_t sis900_interrupt(int irq, void *dev_instance)
1715static int sis900_rx(struct net_device *net_dev) 1740static int sis900_rx(struct net_device *net_dev)
1716{ 1741{
1717 struct sis900_private *sis_priv = netdev_priv(net_dev); 1742 struct sis900_private *sis_priv = netdev_priv(net_dev);
1718 long ioaddr = net_dev->base_addr; 1743 void __iomem *ioaddr = sis_priv->ioaddr;
1719 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC; 1744 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1720 u32 rx_status = sis_priv->rx_ring[entry].cmdsts; 1745 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
1721 int rx_work_limit; 1746 int rx_work_limit;
@@ -1847,7 +1872,7 @@ refill_rx_ring:
1847 } 1872 }
1848 } 1873 }
1849 /* re-enable the potentially idle receive state matchine */ 1874 /* re-enable the potentially idle receive state matchine */
1850 outl(RxENA | inl(ioaddr + cr), ioaddr + cr ); 1875 sw32(cr , RxENA | sr32(cr));
1851 1876
1852 return 0; 1877 return 0;
1853} 1878}
@@ -1932,31 +1957,31 @@ static void sis900_finish_xmit (struct net_device *net_dev)
1932 1957
1933static int sis900_close(struct net_device *net_dev) 1958static int sis900_close(struct net_device *net_dev)
1934{ 1959{
1935 long ioaddr = net_dev->base_addr;
1936 struct sis900_private *sis_priv = netdev_priv(net_dev); 1960 struct sis900_private *sis_priv = netdev_priv(net_dev);
1961 struct pci_dev *pdev = sis_priv->pci_dev;
1962 void __iomem *ioaddr = sis_priv->ioaddr;
1937 struct sk_buff *skb; 1963 struct sk_buff *skb;
1938 int i; 1964 int i;
1939 1965
1940 netif_stop_queue(net_dev); 1966 netif_stop_queue(net_dev);
1941 1967
1942 /* Disable interrupts by clearing the interrupt mask. */ 1968 /* Disable interrupts by clearing the interrupt mask. */
1943 outl(0x0000, ioaddr + imr); 1969 sw32(imr, 0x0000);
1944 outl(0x0000, ioaddr + ier); 1970 sw32(ier, 0x0000);
1945 1971
1946 /* Stop the chip's Tx and Rx Status Machine */ 1972 /* Stop the chip's Tx and Rx Status Machine */
1947 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr); 1973 sw32(cr, RxDIS | TxDIS | sr32(cr));
1948 1974
1949 del_timer(&sis_priv->timer); 1975 del_timer(&sis_priv->timer);
1950 1976
1951 free_irq(net_dev->irq, net_dev); 1977 free_irq(pdev->irq, net_dev);
1952 1978
1953 /* Free Tx and RX skbuff */ 1979 /* Free Tx and RX skbuff */
1954 for (i = 0; i < NUM_RX_DESC; i++) { 1980 for (i = 0; i < NUM_RX_DESC; i++) {
1955 skb = sis_priv->rx_skbuff[i]; 1981 skb = sis_priv->rx_skbuff[i];
1956 if (skb) { 1982 if (skb) {
1957 pci_unmap_single(sis_priv->pci_dev, 1983 pci_unmap_single(pdev, sis_priv->rx_ring[i].bufptr,
1958 sis_priv->rx_ring[i].bufptr, 1984 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1959 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1960 dev_kfree_skb(skb); 1985 dev_kfree_skb(skb);
1961 sis_priv->rx_skbuff[i] = NULL; 1986 sis_priv->rx_skbuff[i] = NULL;
1962 } 1987 }
@@ -1964,9 +1989,8 @@ static int sis900_close(struct net_device *net_dev)
1964 for (i = 0; i < NUM_TX_DESC; i++) { 1989 for (i = 0; i < NUM_TX_DESC; i++) {
1965 skb = sis_priv->tx_skbuff[i]; 1990 skb = sis_priv->tx_skbuff[i];
1966 if (skb) { 1991 if (skb) {
1967 pci_unmap_single(sis_priv->pci_dev, 1992 pci_unmap_single(pdev, sis_priv->tx_ring[i].bufptr,
1968 sis_priv->tx_ring[i].bufptr, skb->len, 1993 skb->len, PCI_DMA_TODEVICE);
1969 PCI_DMA_TODEVICE);
1970 dev_kfree_skb(skb); 1994 dev_kfree_skb(skb);
1971 sis_priv->tx_skbuff[i] = NULL; 1995 sis_priv->tx_skbuff[i] = NULL;
1972 } 1996 }
@@ -2055,14 +2079,14 @@ static int sis900_nway_reset(struct net_device *net_dev)
2055static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) 2079static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2056{ 2080{
2057 struct sis900_private *sis_priv = netdev_priv(net_dev); 2081 struct sis900_private *sis_priv = netdev_priv(net_dev);
2058 long pmctrl_addr = net_dev->base_addr + pmctrl; 2082 void __iomem *ioaddr = sis_priv->ioaddr;
2059 u32 cfgpmcsr = 0, pmctrl_bits = 0; 2083 u32 cfgpmcsr = 0, pmctrl_bits = 0;
2060 2084
2061 if (wol->wolopts == 0) { 2085 if (wol->wolopts == 0) {
2062 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); 2086 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2063 cfgpmcsr &= ~PME_EN; 2087 cfgpmcsr &= ~PME_EN;
2064 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); 2088 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2065 outl(pmctrl_bits, pmctrl_addr); 2089 sw32(pmctrl, pmctrl_bits);
2066 if (netif_msg_wol(sis_priv)) 2090 if (netif_msg_wol(sis_priv))
2067 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name); 2091 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name);
2068 return 0; 2092 return 0;
@@ -2077,7 +2101,7 @@ static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wo
2077 if (wol->wolopts & WAKE_PHY) 2101 if (wol->wolopts & WAKE_PHY)
2078 pmctrl_bits |= LINKON; 2102 pmctrl_bits |= LINKON;
2079 2103
2080 outl(pmctrl_bits, pmctrl_addr); 2104 sw32(pmctrl, pmctrl_bits);
2081 2105
2082 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); 2106 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2083 cfgpmcsr |= PME_EN; 2107 cfgpmcsr |= PME_EN;
@@ -2090,10 +2114,11 @@ static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wo
2090 2114
2091static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) 2115static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2092{ 2116{
2093 long pmctrl_addr = net_dev->base_addr + pmctrl; 2117 struct sis900_private *sp = netdev_priv(net_dev);
2118 void __iomem *ioaddr = sp->ioaddr;
2094 u32 pmctrl_bits; 2119 u32 pmctrl_bits;
2095 2120
2096 pmctrl_bits = inl(pmctrl_addr); 2121 pmctrl_bits = sr32(pmctrl);
2097 if (pmctrl_bits & MAGICPKT) 2122 if (pmctrl_bits & MAGICPKT)
2098 wol->wolopts |= WAKE_MAGIC; 2123 wol->wolopts |= WAKE_MAGIC;
2099 if (pmctrl_bits & LINKON) 2124 if (pmctrl_bits & LINKON)
@@ -2279,8 +2304,8 @@ static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2279 2304
2280static void set_rx_mode(struct net_device *net_dev) 2305static void set_rx_mode(struct net_device *net_dev)
2281{ 2306{
2282 long ioaddr = net_dev->base_addr;
2283 struct sis900_private *sis_priv = netdev_priv(net_dev); 2307 struct sis900_private *sis_priv = netdev_priv(net_dev);
2308 void __iomem *ioaddr = sis_priv->ioaddr;
2284 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */ 2309 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
2285 int i, table_entries; 2310 int i, table_entries;
2286 u32 rx_mode; 2311 u32 rx_mode;
@@ -2322,24 +2347,24 @@ static void set_rx_mode(struct net_device *net_dev)
2322 /* update Multicast Hash Table in Receive Filter */ 2347 /* update Multicast Hash Table in Receive Filter */
2323 for (i = 0; i < table_entries; i++) { 2348 for (i = 0; i < table_entries; i++) {
2324 /* why plus 0x04 ??, That makes the correct value for hash table. */ 2349 /* why plus 0x04 ??, That makes the correct value for hash table. */
2325 outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr); 2350 sw32(rfcr, (u32)(0x00000004 + i) << RFADDR_shift);
2326 outl(mc_filter[i], ioaddr + rfdr); 2351 sw32(rfdr, mc_filter[i]);
2327 } 2352 }
2328 2353
2329 outl(RFEN | rx_mode, ioaddr + rfcr); 2354 sw32(rfcr, RFEN | rx_mode);
2330 2355
2331 /* sis900 is capable of looping back packets at MAC level for 2356 /* sis900 is capable of looping back packets at MAC level for
2332 * debugging purpose */ 2357 * debugging purpose */
2333 if (net_dev->flags & IFF_LOOPBACK) { 2358 if (net_dev->flags & IFF_LOOPBACK) {
2334 u32 cr_saved; 2359 u32 cr_saved;
2335 /* We must disable Tx/Rx before setting loopback mode */ 2360 /* We must disable Tx/Rx before setting loopback mode */
2336 cr_saved = inl(ioaddr + cr); 2361 cr_saved = sr32(cr);
2337 outl(cr_saved | TxDIS | RxDIS, ioaddr + cr); 2362 sw32(cr, cr_saved | TxDIS | RxDIS);
2338 /* enable loopback */ 2363 /* enable loopback */
2339 outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg); 2364 sw32(txcfg, sr32(txcfg) | TxMLB);
2340 outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg); 2365 sw32(rxcfg, sr32(rxcfg) | RxATX);
2341 /* restore cr */ 2366 /* restore cr */
2342 outl(cr_saved, ioaddr + cr); 2367 sw32(cr, cr_saved);
2343 } 2368 }
2344} 2369}
2345 2370
@@ -2355,26 +2380,25 @@ static void set_rx_mode(struct net_device *net_dev)
2355static void sis900_reset(struct net_device *net_dev) 2380static void sis900_reset(struct net_device *net_dev)
2356{ 2381{
2357 struct sis900_private *sis_priv = netdev_priv(net_dev); 2382 struct sis900_private *sis_priv = netdev_priv(net_dev);
2358 long ioaddr = net_dev->base_addr; 2383 void __iomem *ioaddr = sis_priv->ioaddr;
2359 int i = 0;
2360 u32 status = TxRCMP | RxRCMP; 2384 u32 status = TxRCMP | RxRCMP;
2385 int i;
2361 2386
2362 outl(0, ioaddr + ier); 2387 sw32(ier, 0);
2363 outl(0, ioaddr + imr); 2388 sw32(imr, 0);
2364 outl(0, ioaddr + rfcr); 2389 sw32(rfcr, 0);
2365 2390
2366 outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr); 2391 sw32(cr, RxRESET | TxRESET | RESET | sr32(cr));
2367 2392
2368 /* Check that the chip has finished the reset. */ 2393 /* Check that the chip has finished the reset. */
2369 while (status && (i++ < 1000)) { 2394 for (i = 0; status && (i < 1000); i++)
2370 status ^= (inl(isr + ioaddr) & status); 2395 status ^= sr32(isr) & status;
2371 }
2372 2396
2373 if( (sis_priv->chipset_rev >= SIS635A_900_REV) || 2397 if (sis_priv->chipset_rev >= SIS635A_900_REV ||
2374 (sis_priv->chipset_rev == SIS900B_900_REV) ) 2398 sis_priv->chipset_rev == SIS900B_900_REV)
2375 outl(PESEL | RND_CNT, ioaddr + cfg); 2399 sw32(cfg, PESEL | RND_CNT);
2376 else 2400 else
2377 outl(PESEL, ioaddr + cfg); 2401 sw32(cfg, PESEL);
2378} 2402}
2379 2403
2380/** 2404/**
@@ -2388,10 +2412,12 @@ static void __devexit sis900_remove(struct pci_dev *pci_dev)
2388{ 2412{
2389 struct net_device *net_dev = pci_get_drvdata(pci_dev); 2413 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2390 struct sis900_private *sis_priv = netdev_priv(net_dev); 2414 struct sis900_private *sis_priv = netdev_priv(net_dev);
2391 struct mii_phy *phy = NULL; 2415
2416 unregister_netdev(net_dev);
2392 2417
2393 while (sis_priv->first_mii) { 2418 while (sis_priv->first_mii) {
2394 phy = sis_priv->first_mii; 2419 struct mii_phy *phy = sis_priv->first_mii;
2420
2395 sis_priv->first_mii = phy->next; 2421 sis_priv->first_mii = phy->next;
2396 kfree(phy); 2422 kfree(phy);
2397 } 2423 }
@@ -2400,7 +2426,7 @@ static void __devexit sis900_remove(struct pci_dev *pci_dev)
2400 sis_priv->rx_ring_dma); 2426 sis_priv->rx_ring_dma);
2401 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring, 2427 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2402 sis_priv->tx_ring_dma); 2428 sis_priv->tx_ring_dma);
2403 unregister_netdev(net_dev); 2429 pci_iounmap(pci_dev, sis_priv->ioaddr);
2404 free_netdev(net_dev); 2430 free_netdev(net_dev);
2405 pci_release_regions(pci_dev); 2431 pci_release_regions(pci_dev);
2406 pci_set_drvdata(pci_dev, NULL); 2432 pci_set_drvdata(pci_dev, NULL);
@@ -2411,7 +2437,8 @@ static void __devexit sis900_remove(struct pci_dev *pci_dev)
2411static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state) 2437static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
2412{ 2438{
2413 struct net_device *net_dev = pci_get_drvdata(pci_dev); 2439 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2414 long ioaddr = net_dev->base_addr; 2440 struct sis900_private *sis_priv = netdev_priv(net_dev);
2441 void __iomem *ioaddr = sis_priv->ioaddr;
2415 2442
2416 if(!netif_running(net_dev)) 2443 if(!netif_running(net_dev))
2417 return 0; 2444 return 0;
@@ -2420,7 +2447,7 @@ static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
2420 netif_device_detach(net_dev); 2447 netif_device_detach(net_dev);
2421 2448
2422 /* Stop the chip's Tx and Rx Status Machine */ 2449 /* Stop the chip's Tx and Rx Status Machine */
2423 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr); 2450 sw32(cr, RxDIS | TxDIS | sr32(cr));
2424 2451
2425 pci_set_power_state(pci_dev, PCI_D3hot); 2452 pci_set_power_state(pci_dev, PCI_D3hot);
2426 pci_save_state(pci_dev); 2453 pci_save_state(pci_dev);
@@ -2432,7 +2459,7 @@ static int sis900_resume(struct pci_dev *pci_dev)
2432{ 2459{
2433 struct net_device *net_dev = pci_get_drvdata(pci_dev); 2460 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2434 struct sis900_private *sis_priv = netdev_priv(net_dev); 2461 struct sis900_private *sis_priv = netdev_priv(net_dev);
2435 long ioaddr = net_dev->base_addr; 2462 void __iomem *ioaddr = sis_priv->ioaddr;
2436 2463
2437 if(!netif_running(net_dev)) 2464 if(!netif_running(net_dev))
2438 return 0; 2465 return 0;
@@ -2453,9 +2480,9 @@ static int sis900_resume(struct pci_dev *pci_dev)
2453 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); 2480 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2454 2481
2455 /* Enable all known interrupts by setting the interrupt mask. */ 2482 /* Enable all known interrupts by setting the interrupt mask. */
2456 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr); 2483 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE);
2457 outl(RxENA | inl(ioaddr + cr), ioaddr + cr); 2484 sw32(cr, RxENA | sr32(cr));
2458 outl(IE, ioaddr + ier); 2485 sw32(ier, IE);
2459 2486
2460 sis900_check_mode(net_dev, sis_priv->mii); 2487 sis900_check_mode(net_dev, sis_priv->mii);
2461 2488
diff --git a/drivers/net/ethernet/smsc/epic100.c b/drivers/net/ethernet/smsc/epic100.c
index 2a662e6112e9..d01e59c348ad 100644
--- a/drivers/net/ethernet/smsc/epic100.c
+++ b/drivers/net/ethernet/smsc/epic100.c
@@ -146,6 +146,12 @@ enum chip_capability_flags { MII_PWRDWN=1, TYPE2_INTR=2, NO_MII=4 };
146#define EPIC_TOTAL_SIZE 0x100 146#define EPIC_TOTAL_SIZE 0x100
147#define USE_IO_OPS 1 147#define USE_IO_OPS 1
148 148
149#ifdef USE_IO_OPS
150#define EPIC_BAR 0
151#else
152#define EPIC_BAR 1
153#endif
154
149typedef enum { 155typedef enum {
150 SMSC_83C170_0, 156 SMSC_83C170_0,
151 SMSC_83C170, 157 SMSC_83C170,
@@ -176,21 +182,11 @@ static DEFINE_PCI_DEVICE_TABLE(epic_pci_tbl) = {
176}; 182};
177MODULE_DEVICE_TABLE (pci, epic_pci_tbl); 183MODULE_DEVICE_TABLE (pci, epic_pci_tbl);
178 184
179 185#define ew16(reg, val) iowrite16(val, ioaddr + (reg))
180#ifndef USE_IO_OPS 186#define ew32(reg, val) iowrite32(val, ioaddr + (reg))
181#undef inb 187#define er8(reg) ioread8(ioaddr + (reg))
182#undef inw 188#define er16(reg) ioread16(ioaddr + (reg))
183#undef inl 189#define er32(reg) ioread32(ioaddr + (reg))
184#undef outb
185#undef outw
186#undef outl
187#define inb readb
188#define inw readw
189#define inl readl
190#define outb writeb
191#define outw writew
192#define outl writel
193#endif
194 190
195/* Offsets to registers, using the (ugh) SMC names. */ 191/* Offsets to registers, using the (ugh) SMC names. */
196enum epic_registers { 192enum epic_registers {
@@ -275,6 +271,7 @@ struct epic_private {
275 u32 irq_mask; 271 u32 irq_mask;
276 unsigned int rx_buf_sz; /* Based on MTU+slack. */ 272 unsigned int rx_buf_sz; /* Based on MTU+slack. */
277 273
274 void __iomem *ioaddr;
278 struct pci_dev *pci_dev; /* PCI bus location. */ 275 struct pci_dev *pci_dev; /* PCI bus location. */
279 int chip_id, chip_flags; 276 int chip_id, chip_flags;
280 277
@@ -290,7 +287,7 @@ struct epic_private {
290}; 287};
291 288
292static int epic_open(struct net_device *dev); 289static int epic_open(struct net_device *dev);
293static int read_eeprom(long ioaddr, int location); 290static int read_eeprom(struct epic_private *, int);
294static int mdio_read(struct net_device *dev, int phy_id, int location); 291static int mdio_read(struct net_device *dev, int phy_id, int location);
295static void mdio_write(struct net_device *dev, int phy_id, int loc, int val); 292static void mdio_write(struct net_device *dev, int phy_id, int loc, int val);
296static void epic_restart(struct net_device *dev); 293static void epic_restart(struct net_device *dev);
@@ -321,11 +318,11 @@ static const struct net_device_ops epic_netdev_ops = {
321 .ndo_validate_addr = eth_validate_addr, 318 .ndo_validate_addr = eth_validate_addr,
322}; 319};
323 320
324static int __devinit epic_init_one (struct pci_dev *pdev, 321static int __devinit epic_init_one(struct pci_dev *pdev,
325 const struct pci_device_id *ent) 322 const struct pci_device_id *ent)
326{ 323{
327 static int card_idx = -1; 324 static int card_idx = -1;
328 long ioaddr; 325 void __iomem *ioaddr;
329 int chip_idx = (int) ent->driver_data; 326 int chip_idx = (int) ent->driver_data;
330 int irq; 327 int irq;
331 struct net_device *dev; 328 struct net_device *dev;
@@ -368,19 +365,15 @@ static int __devinit epic_init_one (struct pci_dev *pdev,
368 365
369 SET_NETDEV_DEV(dev, &pdev->dev); 366 SET_NETDEV_DEV(dev, &pdev->dev);
370 367
371#ifdef USE_IO_OPS 368 ioaddr = pci_iomap(pdev, EPIC_BAR, 0);
372 ioaddr = pci_resource_start (pdev, 0);
373#else
374 ioaddr = pci_resource_start (pdev, 1);
375 ioaddr = (long) pci_ioremap_bar(pdev, 1);
376 if (!ioaddr) { 369 if (!ioaddr) {
377 dev_err(&pdev->dev, "ioremap failed\n"); 370 dev_err(&pdev->dev, "ioremap failed\n");
378 goto err_out_free_netdev; 371 goto err_out_free_netdev;
379 } 372 }
380#endif
381 373
382 pci_set_drvdata(pdev, dev); 374 pci_set_drvdata(pdev, dev);
383 ep = netdev_priv(dev); 375 ep = netdev_priv(dev);
376 ep->ioaddr = ioaddr;
384 ep->mii.dev = dev; 377 ep->mii.dev = dev;
385 ep->mii.mdio_read = mdio_read; 378 ep->mii.mdio_read = mdio_read;
386 ep->mii.mdio_write = mdio_write; 379 ep->mii.mdio_write = mdio_write;
@@ -409,34 +402,31 @@ static int __devinit epic_init_one (struct pci_dev *pdev,
409 duplex = full_duplex[card_idx]; 402 duplex = full_duplex[card_idx];
410 } 403 }
411 404
412 dev->base_addr = ioaddr;
413 dev->irq = irq;
414
415 spin_lock_init(&ep->lock); 405 spin_lock_init(&ep->lock);
416 spin_lock_init(&ep->napi_lock); 406 spin_lock_init(&ep->napi_lock);
417 ep->reschedule_in_poll = 0; 407 ep->reschedule_in_poll = 0;
418 408
419 /* Bring the chip out of low-power mode. */ 409 /* Bring the chip out of low-power mode. */
420 outl(0x4200, ioaddr + GENCTL); 410 ew32(GENCTL, 0x4200);
421 /* Magic?! If we don't set this bit the MII interface won't work. */ 411 /* Magic?! If we don't set this bit the MII interface won't work. */
422 /* This magic is documented in SMSC app note 7.15 */ 412 /* This magic is documented in SMSC app note 7.15 */
423 for (i = 16; i > 0; i--) 413 for (i = 16; i > 0; i--)
424 outl(0x0008, ioaddr + TEST1); 414 ew32(TEST1, 0x0008);
425 415
426 /* Turn on the MII transceiver. */ 416 /* Turn on the MII transceiver. */
427 outl(0x12, ioaddr + MIICfg); 417 ew32(MIICfg, 0x12);
428 if (chip_idx == 1) 418 if (chip_idx == 1)
429 outl((inl(ioaddr + NVCTL) & ~0x003C) | 0x4800, ioaddr + NVCTL); 419 ew32(NVCTL, (er32(NVCTL) & ~0x003c) | 0x4800);
430 outl(0x0200, ioaddr + GENCTL); 420 ew32(GENCTL, 0x0200);
431 421
432 /* Note: the '175 does not have a serial EEPROM. */ 422 /* Note: the '175 does not have a serial EEPROM. */
433 for (i = 0; i < 3; i++) 423 for (i = 0; i < 3; i++)
434 ((__le16 *)dev->dev_addr)[i] = cpu_to_le16(inw(ioaddr + LAN0 + i*4)); 424 ((__le16 *)dev->dev_addr)[i] = cpu_to_le16(er16(LAN0 + i*4));
435 425
436 if (debug > 2) { 426 if (debug > 2) {
437 dev_printk(KERN_DEBUG, &pdev->dev, "EEPROM contents:\n"); 427 dev_printk(KERN_DEBUG, &pdev->dev, "EEPROM contents:\n");
438 for (i = 0; i < 64; i++) 428 for (i = 0; i < 64; i++)
439 printk(" %4.4x%s", read_eeprom(ioaddr, i), 429 printk(" %4.4x%s", read_eeprom(ep, i),
440 i % 16 == 15 ? "\n" : ""); 430 i % 16 == 15 ? "\n" : "");
441 } 431 }
442 432
@@ -481,8 +471,8 @@ static int __devinit epic_init_one (struct pci_dev *pdev,
481 471
482 /* Turn off the MII xcvr (175 only!), leave the chip in low-power mode. */ 472 /* Turn off the MII xcvr (175 only!), leave the chip in low-power mode. */
483 if (ep->chip_flags & MII_PWRDWN) 473 if (ep->chip_flags & MII_PWRDWN)
484 outl(inl(ioaddr + NVCTL) & ~0x483C, ioaddr + NVCTL); 474 ew32(NVCTL, er32(NVCTL) & ~0x483c);
485 outl(0x0008, ioaddr + GENCTL); 475 ew32(GENCTL, 0x0008);
486 476
487 /* The lower four bits are the media type. */ 477 /* The lower four bits are the media type. */
488 if (duplex) { 478 if (duplex) {
@@ -501,8 +491,9 @@ static int __devinit epic_init_one (struct pci_dev *pdev,
501 if (ret < 0) 491 if (ret < 0)
502 goto err_out_unmap_rx; 492 goto err_out_unmap_rx;
503 493
504 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, %pM\n", 494 printk(KERN_INFO "%s: %s at %lx, IRQ %d, %pM\n",
505 dev->name, pci_id_tbl[chip_idx].name, ioaddr, dev->irq, 495 dev->name, pci_id_tbl[chip_idx].name,
496 (long)pci_resource_start(pdev, EPIC_BAR), pdev->irq,
506 dev->dev_addr); 497 dev->dev_addr);
507 498
508out: 499out:
@@ -513,10 +504,8 @@ err_out_unmap_rx:
513err_out_unmap_tx: 504err_out_unmap_tx:
514 pci_free_consistent(pdev, TX_TOTAL_SIZE, ep->tx_ring, ep->tx_ring_dma); 505 pci_free_consistent(pdev, TX_TOTAL_SIZE, ep->tx_ring, ep->tx_ring_dma);
515err_out_iounmap: 506err_out_iounmap:
516#ifndef USE_IO_OPS 507 pci_iounmap(pdev, ioaddr);
517 iounmap(ioaddr);
518err_out_free_netdev: 508err_out_free_netdev:
519#endif
520 free_netdev(dev); 509 free_netdev(dev);
521err_out_free_res: 510err_out_free_res:
522 pci_release_regions(pdev); 511 pci_release_regions(pdev);
@@ -540,7 +529,7 @@ err_out_disable:
540 This serves to flush the operation to the PCI bus. 529 This serves to flush the operation to the PCI bus.
541 */ 530 */
542 531
543#define eeprom_delay() inl(ee_addr) 532#define eeprom_delay() er32(EECTL)
544 533
545/* The EEPROM commands include the alway-set leading bit. */ 534/* The EEPROM commands include the alway-set leading bit. */
546#define EE_WRITE_CMD (5 << 6) 535#define EE_WRITE_CMD (5 << 6)
@@ -550,67 +539,67 @@ err_out_disable:
550 539
551static void epic_disable_int(struct net_device *dev, struct epic_private *ep) 540static void epic_disable_int(struct net_device *dev, struct epic_private *ep)
552{ 541{
553 long ioaddr = dev->base_addr; 542 void __iomem *ioaddr = ep->ioaddr;
554 543
555 outl(0x00000000, ioaddr + INTMASK); 544 ew32(INTMASK, 0x00000000);
556} 545}
557 546
558static inline void __epic_pci_commit(long ioaddr) 547static inline void __epic_pci_commit(void __iomem *ioaddr)
559{ 548{
560#ifndef USE_IO_OPS 549#ifndef USE_IO_OPS
561 inl(ioaddr + INTMASK); 550 er32(INTMASK);
562#endif 551#endif
563} 552}
564 553
565static inline void epic_napi_irq_off(struct net_device *dev, 554static inline void epic_napi_irq_off(struct net_device *dev,
566 struct epic_private *ep) 555 struct epic_private *ep)
567{ 556{
568 long ioaddr = dev->base_addr; 557 void __iomem *ioaddr = ep->ioaddr;
569 558
570 outl(ep->irq_mask & ~EpicNapiEvent, ioaddr + INTMASK); 559 ew32(INTMASK, ep->irq_mask & ~EpicNapiEvent);
571 __epic_pci_commit(ioaddr); 560 __epic_pci_commit(ioaddr);
572} 561}
573 562
574static inline void epic_napi_irq_on(struct net_device *dev, 563static inline void epic_napi_irq_on(struct net_device *dev,
575 struct epic_private *ep) 564 struct epic_private *ep)
576{ 565{
577 long ioaddr = dev->base_addr; 566 void __iomem *ioaddr = ep->ioaddr;
578 567
579 /* No need to commit possible posted write */ 568 /* No need to commit possible posted write */
580 outl(ep->irq_mask | EpicNapiEvent, ioaddr + INTMASK); 569 ew32(INTMASK, ep->irq_mask | EpicNapiEvent);
581} 570}
582 571
583static int __devinit read_eeprom(long ioaddr, int location) 572static int __devinit read_eeprom(struct epic_private *ep, int location)
584{ 573{
574 void __iomem *ioaddr = ep->ioaddr;
585 int i; 575 int i;
586 int retval = 0; 576 int retval = 0;
587 long ee_addr = ioaddr + EECTL;
588 int read_cmd = location | 577 int read_cmd = location |
589 (inl(ee_addr) & 0x40 ? EE_READ64_CMD : EE_READ256_CMD); 578 (er32(EECTL) & 0x40 ? EE_READ64_CMD : EE_READ256_CMD);
590 579
591 outl(EE_ENB & ~EE_CS, ee_addr); 580 ew32(EECTL, EE_ENB & ~EE_CS);
592 outl(EE_ENB, ee_addr); 581 ew32(EECTL, EE_ENB);
593 582
594 /* Shift the read command bits out. */ 583 /* Shift the read command bits out. */
595 for (i = 12; i >= 0; i--) { 584 for (i = 12; i >= 0; i--) {
596 short dataval = (read_cmd & (1 << i)) ? EE_WRITE_1 : EE_WRITE_0; 585 short dataval = (read_cmd & (1 << i)) ? EE_WRITE_1 : EE_WRITE_0;
597 outl(EE_ENB | dataval, ee_addr); 586 ew32(EECTL, EE_ENB | dataval);
598 eeprom_delay(); 587 eeprom_delay();
599 outl(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr); 588 ew32(EECTL, EE_ENB | dataval | EE_SHIFT_CLK);
600 eeprom_delay(); 589 eeprom_delay();
601 } 590 }
602 outl(EE_ENB, ee_addr); 591 ew32(EECTL, EE_ENB);
603 592
604 for (i = 16; i > 0; i--) { 593 for (i = 16; i > 0; i--) {
605 outl(EE_ENB | EE_SHIFT_CLK, ee_addr); 594 ew32(EECTL, EE_ENB | EE_SHIFT_CLK);
606 eeprom_delay(); 595 eeprom_delay();
607 retval = (retval << 1) | ((inl(ee_addr) & EE_DATA_READ) ? 1 : 0); 596 retval = (retval << 1) | ((er32(EECTL) & EE_DATA_READ) ? 1 : 0);
608 outl(EE_ENB, ee_addr); 597 ew32(EECTL, EE_ENB);
609 eeprom_delay(); 598 eeprom_delay();
610 } 599 }
611 600
612 /* Terminate the EEPROM access. */ 601 /* Terminate the EEPROM access. */
613 outl(EE_ENB & ~EE_CS, ee_addr); 602 ew32(EECTL, EE_ENB & ~EE_CS);
614 return retval; 603 return retval;
615} 604}
616 605
@@ -618,22 +607,23 @@ static int __devinit read_eeprom(long ioaddr, int location)
618#define MII_WRITEOP 2 607#define MII_WRITEOP 2
619static int mdio_read(struct net_device *dev, int phy_id, int location) 608static int mdio_read(struct net_device *dev, int phy_id, int location)
620{ 609{
621 long ioaddr = dev->base_addr; 610 struct epic_private *ep = netdev_priv(dev);
611 void __iomem *ioaddr = ep->ioaddr;
622 int read_cmd = (phy_id << 9) | (location << 4) | MII_READOP; 612 int read_cmd = (phy_id << 9) | (location << 4) | MII_READOP;
623 int i; 613 int i;
624 614
625 outl(read_cmd, ioaddr + MIICtrl); 615 ew32(MIICtrl, read_cmd);
626 /* Typical operation takes 25 loops. */ 616 /* Typical operation takes 25 loops. */
627 for (i = 400; i > 0; i--) { 617 for (i = 400; i > 0; i--) {
628 barrier(); 618 barrier();
629 if ((inl(ioaddr + MIICtrl) & MII_READOP) == 0) { 619 if ((er32(MIICtrl) & MII_READOP) == 0) {
630 /* Work around read failure bug. */ 620 /* Work around read failure bug. */
631 if (phy_id == 1 && location < 6 && 621 if (phy_id == 1 && location < 6 &&
632 inw(ioaddr + MIIData) == 0xffff) { 622 er16(MIIData) == 0xffff) {
633 outl(read_cmd, ioaddr + MIICtrl); 623 ew32(MIICtrl, read_cmd);
634 continue; 624 continue;
635 } 625 }
636 return inw(ioaddr + MIIData); 626 return er16(MIIData);
637 } 627 }
638 } 628 }
639 return 0xffff; 629 return 0xffff;
@@ -641,14 +631,15 @@ static int mdio_read(struct net_device *dev, int phy_id, int location)
641 631
642static void mdio_write(struct net_device *dev, int phy_id, int loc, int value) 632static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
643{ 633{
644 long ioaddr = dev->base_addr; 634 struct epic_private *ep = netdev_priv(dev);
635 void __iomem *ioaddr = ep->ioaddr;
645 int i; 636 int i;
646 637
647 outw(value, ioaddr + MIIData); 638 ew16(MIIData, value);
648 outl((phy_id << 9) | (loc << 4) | MII_WRITEOP, ioaddr + MIICtrl); 639 ew32(MIICtrl, (phy_id << 9) | (loc << 4) | MII_WRITEOP);
649 for (i = 10000; i > 0; i--) { 640 for (i = 10000; i > 0; i--) {
650 barrier(); 641 barrier();
651 if ((inl(ioaddr + MIICtrl) & MII_WRITEOP) == 0) 642 if ((er32(MIICtrl) & MII_WRITEOP) == 0)
652 break; 643 break;
653 } 644 }
654} 645}
@@ -657,25 +648,26 @@ static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
657static int epic_open(struct net_device *dev) 648static int epic_open(struct net_device *dev)
658{ 649{
659 struct epic_private *ep = netdev_priv(dev); 650 struct epic_private *ep = netdev_priv(dev);
660 long ioaddr = dev->base_addr; 651 void __iomem *ioaddr = ep->ioaddr;
661 int i; 652 const int irq = ep->pci_dev->irq;
662 int retval; 653 int rc, i;
663 654
664 /* Soft reset the chip. */ 655 /* Soft reset the chip. */
665 outl(0x4001, ioaddr + GENCTL); 656 ew32(GENCTL, 0x4001);
666 657
667 napi_enable(&ep->napi); 658 napi_enable(&ep->napi);
668 if ((retval = request_irq(dev->irq, epic_interrupt, IRQF_SHARED, dev->name, dev))) { 659 rc = request_irq(irq, epic_interrupt, IRQF_SHARED, dev->name, dev);
660 if (rc) {
669 napi_disable(&ep->napi); 661 napi_disable(&ep->napi);
670 return retval; 662 return rc;
671 } 663 }
672 664
673 epic_init_ring(dev); 665 epic_init_ring(dev);
674 666
675 outl(0x4000, ioaddr + GENCTL); 667 ew32(GENCTL, 0x4000);
676 /* This magic is documented in SMSC app note 7.15 */ 668 /* This magic is documented in SMSC app note 7.15 */
677 for (i = 16; i > 0; i--) 669 for (i = 16; i > 0; i--)
678 outl(0x0008, ioaddr + TEST1); 670 ew32(TEST1, 0x0008);
679 671
680 /* Pull the chip out of low-power mode, enable interrupts, and set for 672 /* Pull the chip out of low-power mode, enable interrupts, and set for
681 PCI read multiple. The MIIcfg setting and strange write order are 673 PCI read multiple. The MIIcfg setting and strange write order are
@@ -683,29 +675,29 @@ static int epic_open(struct net_device *dev)
683 wiring on the Ositech CardBus card. 675 wiring on the Ositech CardBus card.
684 */ 676 */
685#if 0 677#if 0
686 outl(dev->if_port == 1 ? 0x13 : 0x12, ioaddr + MIICfg); 678 ew32(MIICfg, dev->if_port == 1 ? 0x13 : 0x12);
687#endif 679#endif
688 if (ep->chip_flags & MII_PWRDWN) 680 if (ep->chip_flags & MII_PWRDWN)
689 outl((inl(ioaddr + NVCTL) & ~0x003C) | 0x4800, ioaddr + NVCTL); 681 ew32(NVCTL, (er32(NVCTL) & ~0x003c) | 0x4800);
690 682
691 /* Tell the chip to byteswap descriptors on big-endian hosts */ 683 /* Tell the chip to byteswap descriptors on big-endian hosts */
692#ifdef __BIG_ENDIAN 684#ifdef __BIG_ENDIAN
693 outl(0x4432 | (RX_FIFO_THRESH<<8), ioaddr + GENCTL); 685 ew32(GENCTL, 0x4432 | (RX_FIFO_THRESH << 8));
694 inl(ioaddr + GENCTL); 686 er32(GENCTL);
695 outl(0x0432 | (RX_FIFO_THRESH<<8), ioaddr + GENCTL); 687 ew32(GENCTL, 0x0432 | (RX_FIFO_THRESH << 8));
696#else 688#else
697 outl(0x4412 | (RX_FIFO_THRESH<<8), ioaddr + GENCTL); 689 ew32(GENCTL, 0x4412 | (RX_FIFO_THRESH << 8));
698 inl(ioaddr + GENCTL); 690 er32(GENCTL);
699 outl(0x0412 | (RX_FIFO_THRESH<<8), ioaddr + GENCTL); 691 ew32(GENCTL, 0x0412 | (RX_FIFO_THRESH << 8));
700#endif 692#endif
701 693
702 udelay(20); /* Looks like EPII needs that if you want reliable RX init. FIXME: pci posting bug? */ 694 udelay(20); /* Looks like EPII needs that if you want reliable RX init. FIXME: pci posting bug? */
703 695
704 for (i = 0; i < 3; i++) 696 for (i = 0; i < 3; i++)
705 outl(le16_to_cpu(((__le16*)dev->dev_addr)[i]), ioaddr + LAN0 + i*4); 697 ew32(LAN0 + i*4, le16_to_cpu(((__le16*)dev->dev_addr)[i]));
706 698
707 ep->tx_threshold = TX_FIFO_THRESH; 699 ep->tx_threshold = TX_FIFO_THRESH;
708 outl(ep->tx_threshold, ioaddr + TxThresh); 700 ew32(TxThresh, ep->tx_threshold);
709 701
710 if (media2miictl[dev->if_port & 15]) { 702 if (media2miictl[dev->if_port & 15]) {
711 if (ep->mii_phy_cnt) 703 if (ep->mii_phy_cnt)
@@ -731,26 +723,27 @@ static int epic_open(struct net_device *dev)
731 } 723 }
732 } 724 }
733 725
734 outl(ep->mii.full_duplex ? 0x7F : 0x79, ioaddr + TxCtrl); 726 ew32(TxCtrl, ep->mii.full_duplex ? 0x7f : 0x79);
735 outl(ep->rx_ring_dma, ioaddr + PRxCDAR); 727 ew32(PRxCDAR, ep->rx_ring_dma);
736 outl(ep->tx_ring_dma, ioaddr + PTxCDAR); 728 ew32(PTxCDAR, ep->tx_ring_dma);
737 729
738 /* Start the chip's Rx process. */ 730 /* Start the chip's Rx process. */
739 set_rx_mode(dev); 731 set_rx_mode(dev);
740 outl(StartRx | RxQueued, ioaddr + COMMAND); 732 ew32(COMMAND, StartRx | RxQueued);
741 733
742 netif_start_queue(dev); 734 netif_start_queue(dev);
743 735
744 /* Enable interrupts by setting the interrupt mask. */ 736 /* Enable interrupts by setting the interrupt mask. */
745 outl((ep->chip_flags & TYPE2_INTR ? PCIBusErr175 : PCIBusErr170) 737 ew32(INTMASK, RxError | RxHeader | EpicNapiEvent | CntFull |
746 | CntFull | TxUnderrun 738 ((ep->chip_flags & TYPE2_INTR) ? PCIBusErr175 : PCIBusErr170) |
747 | RxError | RxHeader | EpicNapiEvent, ioaddr + INTMASK); 739 TxUnderrun);
748 740
749 if (debug > 1) 741 if (debug > 1) {
750 printk(KERN_DEBUG "%s: epic_open() ioaddr %lx IRQ %d status %4.4x " 742 printk(KERN_DEBUG "%s: epic_open() ioaddr %p IRQ %d "
751 "%s-duplex.\n", 743 "status %4.4x %s-duplex.\n",
752 dev->name, ioaddr, dev->irq, (int)inl(ioaddr + GENCTL), 744 dev->name, ioaddr, irq, er32(GENCTL),
753 ep->mii.full_duplex ? "full" : "half"); 745 ep->mii.full_duplex ? "full" : "half");
746 }
754 747
755 /* Set the timer to switch to check for link beat and perhaps switch 748 /* Set the timer to switch to check for link beat and perhaps switch
756 to an alternate media type. */ 749 to an alternate media type. */
@@ -760,27 +753,29 @@ static int epic_open(struct net_device *dev)
760 ep->timer.function = epic_timer; /* timer handler */ 753 ep->timer.function = epic_timer; /* timer handler */
761 add_timer(&ep->timer); 754 add_timer(&ep->timer);
762 755
763 return 0; 756 return rc;
764} 757}
765 758
766/* Reset the chip to recover from a PCI transaction error. 759/* Reset the chip to recover from a PCI transaction error.
767 This may occur at interrupt time. */ 760 This may occur at interrupt time. */
768static void epic_pause(struct net_device *dev) 761static void epic_pause(struct net_device *dev)
769{ 762{
770 long ioaddr = dev->base_addr; 763 struct net_device_stats *stats = &dev->stats;
764 struct epic_private *ep = netdev_priv(dev);
765 void __iomem *ioaddr = ep->ioaddr;
771 766
772 netif_stop_queue (dev); 767 netif_stop_queue (dev);
773 768
774 /* Disable interrupts by clearing the interrupt mask. */ 769 /* Disable interrupts by clearing the interrupt mask. */
775 outl(0x00000000, ioaddr + INTMASK); 770 ew32(INTMASK, 0x00000000);
776 /* Stop the chip's Tx and Rx DMA processes. */ 771 /* Stop the chip's Tx and Rx DMA processes. */
777 outw(StopRx | StopTxDMA | StopRxDMA, ioaddr + COMMAND); 772 ew16(COMMAND, StopRx | StopTxDMA | StopRxDMA);
778 773
779 /* Update the error counts. */ 774 /* Update the error counts. */
780 if (inw(ioaddr + COMMAND) != 0xffff) { 775 if (er16(COMMAND) != 0xffff) {
781 dev->stats.rx_missed_errors += inb(ioaddr + MPCNT); 776 stats->rx_missed_errors += er8(MPCNT);
782 dev->stats.rx_frame_errors += inb(ioaddr + ALICNT); 777 stats->rx_frame_errors += er8(ALICNT);
783 dev->stats.rx_crc_errors += inb(ioaddr + CRCCNT); 778 stats->rx_crc_errors += er8(CRCCNT);
784 } 779 }
785 780
786 /* Remove the packets on the Rx queue. */ 781 /* Remove the packets on the Rx queue. */
@@ -789,12 +784,12 @@ static void epic_pause(struct net_device *dev)
789 784
790static void epic_restart(struct net_device *dev) 785static void epic_restart(struct net_device *dev)
791{ 786{
792 long ioaddr = dev->base_addr;
793 struct epic_private *ep = netdev_priv(dev); 787 struct epic_private *ep = netdev_priv(dev);
788 void __iomem *ioaddr = ep->ioaddr;
794 int i; 789 int i;
795 790
796 /* Soft reset the chip. */ 791 /* Soft reset the chip. */
797 outl(0x4001, ioaddr + GENCTL); 792 ew32(GENCTL, 0x4001);
798 793
799 printk(KERN_DEBUG "%s: Restarting the EPIC chip, Rx %d/%d Tx %d/%d.\n", 794 printk(KERN_DEBUG "%s: Restarting the EPIC chip, Rx %d/%d Tx %d/%d.\n",
800 dev->name, ep->cur_rx, ep->dirty_rx, ep->dirty_tx, ep->cur_tx); 795 dev->name, ep->cur_rx, ep->dirty_rx, ep->dirty_tx, ep->cur_tx);
@@ -802,47 +797,46 @@ static void epic_restart(struct net_device *dev)
802 797
803 /* This magic is documented in SMSC app note 7.15 */ 798 /* This magic is documented in SMSC app note 7.15 */
804 for (i = 16; i > 0; i--) 799 for (i = 16; i > 0; i--)
805 outl(0x0008, ioaddr + TEST1); 800 ew32(TEST1, 0x0008);
806 801
807#ifdef __BIG_ENDIAN 802#ifdef __BIG_ENDIAN
808 outl(0x0432 | (RX_FIFO_THRESH<<8), ioaddr + GENCTL); 803 ew32(GENCTL, 0x0432 | (RX_FIFO_THRESH << 8));
809#else 804#else
810 outl(0x0412 | (RX_FIFO_THRESH<<8), ioaddr + GENCTL); 805 ew32(GENCTL, 0x0412 | (RX_FIFO_THRESH << 8));
811#endif 806#endif
812 outl(dev->if_port == 1 ? 0x13 : 0x12, ioaddr + MIICfg); 807 ew32(MIICfg, dev->if_port == 1 ? 0x13 : 0x12);
813 if (ep->chip_flags & MII_PWRDWN) 808 if (ep->chip_flags & MII_PWRDWN)
814 outl((inl(ioaddr + NVCTL) & ~0x003C) | 0x4800, ioaddr + NVCTL); 809 ew32(NVCTL, (er32(NVCTL) & ~0x003c) | 0x4800);
815 810
816 for (i = 0; i < 3; i++) 811 for (i = 0; i < 3; i++)
817 outl(le16_to_cpu(((__le16*)dev->dev_addr)[i]), ioaddr + LAN0 + i*4); 812 ew32(LAN0 + i*4, le16_to_cpu(((__le16*)dev->dev_addr)[i]));
818 813
819 ep->tx_threshold = TX_FIFO_THRESH; 814 ep->tx_threshold = TX_FIFO_THRESH;
820 outl(ep->tx_threshold, ioaddr + TxThresh); 815 ew32(TxThresh, ep->tx_threshold);
821 outl(ep->mii.full_duplex ? 0x7F : 0x79, ioaddr + TxCtrl); 816 ew32(TxCtrl, ep->mii.full_duplex ? 0x7f : 0x79);
822 outl(ep->rx_ring_dma + (ep->cur_rx%RX_RING_SIZE)* 817 ew32(PRxCDAR, ep->rx_ring_dma +
823 sizeof(struct epic_rx_desc), ioaddr + PRxCDAR); 818 (ep->cur_rx % RX_RING_SIZE) * sizeof(struct epic_rx_desc));
824 outl(ep->tx_ring_dma + (ep->dirty_tx%TX_RING_SIZE)* 819 ew32(PTxCDAR, ep->tx_ring_dma +
825 sizeof(struct epic_tx_desc), ioaddr + PTxCDAR); 820 (ep->dirty_tx % TX_RING_SIZE) * sizeof(struct epic_tx_desc));
826 821
827 /* Start the chip's Rx process. */ 822 /* Start the chip's Rx process. */
828 set_rx_mode(dev); 823 set_rx_mode(dev);
829 outl(StartRx | RxQueued, ioaddr + COMMAND); 824 ew32(COMMAND, StartRx | RxQueued);
830 825
831 /* Enable interrupts by setting the interrupt mask. */ 826 /* Enable interrupts by setting the interrupt mask. */
832 outl((ep->chip_flags & TYPE2_INTR ? PCIBusErr175 : PCIBusErr170) 827 ew32(INTMASK, RxError | RxHeader | EpicNapiEvent | CntFull |
833 | CntFull | TxUnderrun 828 ((ep->chip_flags & TYPE2_INTR) ? PCIBusErr175 : PCIBusErr170) |
834 | RxError | RxHeader | EpicNapiEvent, ioaddr + INTMASK); 829 TxUnderrun);
835 830
836 printk(KERN_DEBUG "%s: epic_restart() done, cmd status %4.4x, ctl %4.4x" 831 printk(KERN_DEBUG "%s: epic_restart() done, cmd status %4.4x, ctl %4.4x"
837 " interrupt %4.4x.\n", 832 " interrupt %4.4x.\n",
838 dev->name, (int)inl(ioaddr + COMMAND), (int)inl(ioaddr + GENCTL), 833 dev->name, er32(COMMAND), er32(GENCTL), er32(INTSTAT));
839 (int)inl(ioaddr + INTSTAT));
840} 834}
841 835
842static void check_media(struct net_device *dev) 836static void check_media(struct net_device *dev)
843{ 837{
844 struct epic_private *ep = netdev_priv(dev); 838 struct epic_private *ep = netdev_priv(dev);
845 long ioaddr = dev->base_addr; 839 void __iomem *ioaddr = ep->ioaddr;
846 int mii_lpa = ep->mii_phy_cnt ? mdio_read(dev, ep->phys[0], MII_LPA) : 0; 840 int mii_lpa = ep->mii_phy_cnt ? mdio_read(dev, ep->phys[0], MII_LPA) : 0;
847 int negotiated = mii_lpa & ep->mii.advertising; 841 int negotiated = mii_lpa & ep->mii.advertising;
848 int duplex = (negotiated & 0x0100) || (negotiated & 0x01C0) == 0x0040; 842 int duplex = (negotiated & 0x0100) || (negotiated & 0x01C0) == 0x0040;
@@ -856,7 +850,7 @@ static void check_media(struct net_device *dev)
856 printk(KERN_INFO "%s: Setting %s-duplex based on MII #%d link" 850 printk(KERN_INFO "%s: Setting %s-duplex based on MII #%d link"
857 " partner capability of %4.4x.\n", dev->name, 851 " partner capability of %4.4x.\n", dev->name,
858 ep->mii.full_duplex ? "full" : "half", ep->phys[0], mii_lpa); 852 ep->mii.full_duplex ? "full" : "half", ep->phys[0], mii_lpa);
859 outl(ep->mii.full_duplex ? 0x7F : 0x79, ioaddr + TxCtrl); 853 ew32(TxCtrl, ep->mii.full_duplex ? 0x7F : 0x79);
860 } 854 }
861} 855}
862 856
@@ -864,16 +858,15 @@ static void epic_timer(unsigned long data)
864{ 858{
865 struct net_device *dev = (struct net_device *)data; 859 struct net_device *dev = (struct net_device *)data;
866 struct epic_private *ep = netdev_priv(dev); 860 struct epic_private *ep = netdev_priv(dev);
867 long ioaddr = dev->base_addr; 861 void __iomem *ioaddr = ep->ioaddr;
868 int next_tick = 5*HZ; 862 int next_tick = 5*HZ;
869 863
870 if (debug > 3) { 864 if (debug > 3) {
871 printk(KERN_DEBUG "%s: Media monitor tick, Tx status %8.8x.\n", 865 printk(KERN_DEBUG "%s: Media monitor tick, Tx status %8.8x.\n",
872 dev->name, (int)inl(ioaddr + TxSTAT)); 866 dev->name, er32(TxSTAT));
873 printk(KERN_DEBUG "%s: Other registers are IntMask %4.4x " 867 printk(KERN_DEBUG "%s: Other registers are IntMask %4.4x "
874 "IntStatus %4.4x RxStatus %4.4x.\n", 868 "IntStatus %4.4x RxStatus %4.4x.\n", dev->name,
875 dev->name, (int)inl(ioaddr + INTMASK), 869 er32(INTMASK), er32(INTSTAT), er32(RxSTAT));
876 (int)inl(ioaddr + INTSTAT), (int)inl(ioaddr + RxSTAT));
877 } 870 }
878 871
879 check_media(dev); 872 check_media(dev);
@@ -885,23 +878,22 @@ static void epic_timer(unsigned long data)
885static void epic_tx_timeout(struct net_device *dev) 878static void epic_tx_timeout(struct net_device *dev)
886{ 879{
887 struct epic_private *ep = netdev_priv(dev); 880 struct epic_private *ep = netdev_priv(dev);
888 long ioaddr = dev->base_addr; 881 void __iomem *ioaddr = ep->ioaddr;
889 882
890 if (debug > 0) { 883 if (debug > 0) {
891 printk(KERN_WARNING "%s: Transmit timeout using MII device, " 884 printk(KERN_WARNING "%s: Transmit timeout using MII device, "
892 "Tx status %4.4x.\n", 885 "Tx status %4.4x.\n", dev->name, er16(TxSTAT));
893 dev->name, (int)inw(ioaddr + TxSTAT));
894 if (debug > 1) { 886 if (debug > 1) {
895 printk(KERN_DEBUG "%s: Tx indices: dirty_tx %d, cur_tx %d.\n", 887 printk(KERN_DEBUG "%s: Tx indices: dirty_tx %d, cur_tx %d.\n",
896 dev->name, ep->dirty_tx, ep->cur_tx); 888 dev->name, ep->dirty_tx, ep->cur_tx);
897 } 889 }
898 } 890 }
899 if (inw(ioaddr + TxSTAT) & 0x10) { /* Tx FIFO underflow. */ 891 if (er16(TxSTAT) & 0x10) { /* Tx FIFO underflow. */
900 dev->stats.tx_fifo_errors++; 892 dev->stats.tx_fifo_errors++;
901 outl(RestartTx, ioaddr + COMMAND); 893 ew32(COMMAND, RestartTx);
902 } else { 894 } else {
903 epic_restart(dev); 895 epic_restart(dev);
904 outl(TxQueued, dev->base_addr + COMMAND); 896 ew32(COMMAND, TxQueued);
905 } 897 }
906 898
907 dev->trans_start = jiffies; /* prevent tx timeout */ 899 dev->trans_start = jiffies; /* prevent tx timeout */
@@ -959,6 +951,7 @@ static void epic_init_ring(struct net_device *dev)
959static netdev_tx_t epic_start_xmit(struct sk_buff *skb, struct net_device *dev) 951static netdev_tx_t epic_start_xmit(struct sk_buff *skb, struct net_device *dev)
960{ 952{
961 struct epic_private *ep = netdev_priv(dev); 953 struct epic_private *ep = netdev_priv(dev);
954 void __iomem *ioaddr = ep->ioaddr;
962 int entry, free_count; 955 int entry, free_count;
963 u32 ctrl_word; 956 u32 ctrl_word;
964 unsigned long flags; 957 unsigned long flags;
@@ -999,13 +992,12 @@ static netdev_tx_t epic_start_xmit(struct sk_buff *skb, struct net_device *dev)
999 992
1000 spin_unlock_irqrestore(&ep->lock, flags); 993 spin_unlock_irqrestore(&ep->lock, flags);
1001 /* Trigger an immediate transmit demand. */ 994 /* Trigger an immediate transmit demand. */
1002 outl(TxQueued, dev->base_addr + COMMAND); 995 ew32(COMMAND, TxQueued);
1003 996
1004 if (debug > 4) 997 if (debug > 4)
1005 printk(KERN_DEBUG "%s: Queued Tx packet size %d to slot %d, " 998 printk(KERN_DEBUG "%s: Queued Tx packet size %d to slot %d, "
1006 "flag %2.2x Tx status %8.8x.\n", 999 "flag %2.2x Tx status %8.8x.\n", dev->name, skb->len,
1007 dev->name, (int)skb->len, entry, ctrl_word, 1000 entry, ctrl_word, er32(TxSTAT));
1008 (int)inl(dev->base_addr + TxSTAT));
1009 1001
1010 return NETDEV_TX_OK; 1002 return NETDEV_TX_OK;
1011} 1003}
@@ -1086,18 +1078,17 @@ static irqreturn_t epic_interrupt(int irq, void *dev_instance)
1086{ 1078{
1087 struct net_device *dev = dev_instance; 1079 struct net_device *dev = dev_instance;
1088 struct epic_private *ep = netdev_priv(dev); 1080 struct epic_private *ep = netdev_priv(dev);
1089 long ioaddr = dev->base_addr; 1081 void __iomem *ioaddr = ep->ioaddr;
1090 unsigned int handled = 0; 1082 unsigned int handled = 0;
1091 int status; 1083 int status;
1092 1084
1093 status = inl(ioaddr + INTSTAT); 1085 status = er32(INTSTAT);
1094 /* Acknowledge all of the current interrupt sources ASAP. */ 1086 /* Acknowledge all of the current interrupt sources ASAP. */
1095 outl(status & EpicNormalEvent, ioaddr + INTSTAT); 1087 ew32(INTSTAT, status & EpicNormalEvent);
1096 1088
1097 if (debug > 4) { 1089 if (debug > 4) {
1098 printk(KERN_DEBUG "%s: Interrupt, status=%#8.8x new " 1090 printk(KERN_DEBUG "%s: Interrupt, status=%#8.8x new "
1099 "intstat=%#8.8x.\n", dev->name, status, 1091 "intstat=%#8.8x.\n", dev->name, status, er32(INTSTAT));
1100 (int)inl(ioaddr + INTSTAT));
1101 } 1092 }
1102 1093
1103 if ((status & IntrSummary) == 0) 1094 if ((status & IntrSummary) == 0)
@@ -1118,19 +1109,21 @@ static irqreturn_t epic_interrupt(int irq, void *dev_instance)
1118 1109
1119 /* Check uncommon events all at once. */ 1110 /* Check uncommon events all at once. */
1120 if (status & (CntFull | TxUnderrun | PCIBusErr170 | PCIBusErr175)) { 1111 if (status & (CntFull | TxUnderrun | PCIBusErr170 | PCIBusErr175)) {
1112 struct net_device_stats *stats = &dev->stats;
1113
1121 if (status == EpicRemoved) 1114 if (status == EpicRemoved)
1122 goto out; 1115 goto out;
1123 1116
1124 /* Always update the error counts to avoid overhead later. */ 1117 /* Always update the error counts to avoid overhead later. */
1125 dev->stats.rx_missed_errors += inb(ioaddr + MPCNT); 1118 stats->rx_missed_errors += er8(MPCNT);
1126 dev->stats.rx_frame_errors += inb(ioaddr + ALICNT); 1119 stats->rx_frame_errors += er8(ALICNT);
1127 dev->stats.rx_crc_errors += inb(ioaddr + CRCCNT); 1120 stats->rx_crc_errors += er8(CRCCNT);
1128 1121
1129 if (status & TxUnderrun) { /* Tx FIFO underflow. */ 1122 if (status & TxUnderrun) { /* Tx FIFO underflow. */
1130 dev->stats.tx_fifo_errors++; 1123 stats->tx_fifo_errors++;
1131 outl(ep->tx_threshold += 128, ioaddr + TxThresh); 1124 ew32(TxThresh, ep->tx_threshold += 128);
1132 /* Restart the transmit process. */ 1125 /* Restart the transmit process. */
1133 outl(RestartTx, ioaddr + COMMAND); 1126 ew32(COMMAND, RestartTx);
1134 } 1127 }
1135 if (status & PCIBusErr170) { 1128 if (status & PCIBusErr170) {
1136 printk(KERN_ERR "%s: PCI Bus Error! status %4.4x.\n", 1129 printk(KERN_ERR "%s: PCI Bus Error! status %4.4x.\n",
@@ -1139,7 +1132,7 @@ static irqreturn_t epic_interrupt(int irq, void *dev_instance)
1139 epic_restart(dev); 1132 epic_restart(dev);
1140 } 1133 }
1141 /* Clear all error sources. */ 1134 /* Clear all error sources. */
1142 outl(status & 0x7f18, ioaddr + INTSTAT); 1135 ew32(INTSTAT, status & 0x7f18);
1143 } 1136 }
1144 1137
1145out: 1138out:
@@ -1248,17 +1241,17 @@ static int epic_rx(struct net_device *dev, int budget)
1248 1241
1249static void epic_rx_err(struct net_device *dev, struct epic_private *ep) 1242static void epic_rx_err(struct net_device *dev, struct epic_private *ep)
1250{ 1243{
1251 long ioaddr = dev->base_addr; 1244 void __iomem *ioaddr = ep->ioaddr;
1252 int status; 1245 int status;
1253 1246
1254 status = inl(ioaddr + INTSTAT); 1247 status = er32(INTSTAT);
1255 1248
1256 if (status == EpicRemoved) 1249 if (status == EpicRemoved)
1257 return; 1250 return;
1258 if (status & RxOverflow) /* Missed a Rx frame. */ 1251 if (status & RxOverflow) /* Missed a Rx frame. */
1259 dev->stats.rx_errors++; 1252 dev->stats.rx_errors++;
1260 if (status & (RxOverflow | RxFull)) 1253 if (status & (RxOverflow | RxFull))
1261 outw(RxQueued, ioaddr + COMMAND); 1254 ew16(COMMAND, RxQueued);
1262} 1255}
1263 1256
1264static int epic_poll(struct napi_struct *napi, int budget) 1257static int epic_poll(struct napi_struct *napi, int budget)
@@ -1266,7 +1259,7 @@ static int epic_poll(struct napi_struct *napi, int budget)
1266 struct epic_private *ep = container_of(napi, struct epic_private, napi); 1259 struct epic_private *ep = container_of(napi, struct epic_private, napi);
1267 struct net_device *dev = ep->mii.dev; 1260 struct net_device *dev = ep->mii.dev;
1268 int work_done = 0; 1261 int work_done = 0;
1269 long ioaddr = dev->base_addr; 1262 void __iomem *ioaddr = ep->ioaddr;
1270 1263
1271rx_action: 1264rx_action:
1272 1265
@@ -1287,7 +1280,7 @@ rx_action:
1287 more = ep->reschedule_in_poll; 1280 more = ep->reschedule_in_poll;
1288 if (!more) { 1281 if (!more) {
1289 __napi_complete(napi); 1282 __napi_complete(napi);
1290 outl(EpicNapiEvent, ioaddr + INTSTAT); 1283 ew32(INTSTAT, EpicNapiEvent);
1291 epic_napi_irq_on(dev, ep); 1284 epic_napi_irq_on(dev, ep);
1292 } else 1285 } else
1293 ep->reschedule_in_poll--; 1286 ep->reschedule_in_poll--;
@@ -1303,8 +1296,9 @@ rx_action:
1303 1296
1304static int epic_close(struct net_device *dev) 1297static int epic_close(struct net_device *dev)
1305{ 1298{
1306 long ioaddr = dev->base_addr;
1307 struct epic_private *ep = netdev_priv(dev); 1299 struct epic_private *ep = netdev_priv(dev);
1300 struct pci_dev *pdev = ep->pci_dev;
1301 void __iomem *ioaddr = ep->ioaddr;
1308 struct sk_buff *skb; 1302 struct sk_buff *skb;
1309 int i; 1303 int i;
1310 1304
@@ -1313,13 +1307,13 @@ static int epic_close(struct net_device *dev)
1313 1307
1314 if (debug > 1) 1308 if (debug > 1)
1315 printk(KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n", 1309 printk(KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n",
1316 dev->name, (int)inl(ioaddr + INTSTAT)); 1310 dev->name, er32(INTSTAT));
1317 1311
1318 del_timer_sync(&ep->timer); 1312 del_timer_sync(&ep->timer);
1319 1313
1320 epic_disable_int(dev, ep); 1314 epic_disable_int(dev, ep);
1321 1315
1322 free_irq(dev->irq, dev); 1316 free_irq(pdev->irq, dev);
1323 1317
1324 epic_pause(dev); 1318 epic_pause(dev);
1325 1319
@@ -1330,7 +1324,7 @@ static int epic_close(struct net_device *dev)
1330 ep->rx_ring[i].rxstatus = 0; /* Not owned by Epic chip. */ 1324 ep->rx_ring[i].rxstatus = 0; /* Not owned by Epic chip. */
1331 ep->rx_ring[i].buflength = 0; 1325 ep->rx_ring[i].buflength = 0;
1332 if (skb) { 1326 if (skb) {
1333 pci_unmap_single(ep->pci_dev, ep->rx_ring[i].bufaddr, 1327 pci_unmap_single(pdev, ep->rx_ring[i].bufaddr,
1334 ep->rx_buf_sz, PCI_DMA_FROMDEVICE); 1328 ep->rx_buf_sz, PCI_DMA_FROMDEVICE);
1335 dev_kfree_skb(skb); 1329 dev_kfree_skb(skb);
1336 } 1330 }
@@ -1341,26 +1335,28 @@ static int epic_close(struct net_device *dev)
1341 ep->tx_skbuff[i] = NULL; 1335 ep->tx_skbuff[i] = NULL;
1342 if (!skb) 1336 if (!skb)
1343 continue; 1337 continue;
1344 pci_unmap_single(ep->pci_dev, ep->tx_ring[i].bufaddr, 1338 pci_unmap_single(pdev, ep->tx_ring[i].bufaddr, skb->len,
1345 skb->len, PCI_DMA_TODEVICE); 1339 PCI_DMA_TODEVICE);
1346 dev_kfree_skb(skb); 1340 dev_kfree_skb(skb);
1347 } 1341 }
1348 1342
1349 /* Green! Leave the chip in low-power mode. */ 1343 /* Green! Leave the chip in low-power mode. */
1350 outl(0x0008, ioaddr + GENCTL); 1344 ew32(GENCTL, 0x0008);
1351 1345
1352 return 0; 1346 return 0;
1353} 1347}
1354 1348
1355static struct net_device_stats *epic_get_stats(struct net_device *dev) 1349static struct net_device_stats *epic_get_stats(struct net_device *dev)
1356{ 1350{
1357 long ioaddr = dev->base_addr; 1351 struct epic_private *ep = netdev_priv(dev);
1352 void __iomem *ioaddr = ep->ioaddr;
1358 1353
1359 if (netif_running(dev)) { 1354 if (netif_running(dev)) {
1360 /* Update the error counts. */ 1355 struct net_device_stats *stats = &dev->stats;
1361 dev->stats.rx_missed_errors += inb(ioaddr + MPCNT); 1356
1362 dev->stats.rx_frame_errors += inb(ioaddr + ALICNT); 1357 stats->rx_missed_errors += er8(MPCNT);
1363 dev->stats.rx_crc_errors += inb(ioaddr + CRCCNT); 1358 stats->rx_frame_errors += er8(ALICNT);
1359 stats->rx_crc_errors += er8(CRCCNT);
1364 } 1360 }
1365 1361
1366 return &dev->stats; 1362 return &dev->stats;
@@ -1373,13 +1369,13 @@ static struct net_device_stats *epic_get_stats(struct net_device *dev)
1373 1369
1374static void set_rx_mode(struct net_device *dev) 1370static void set_rx_mode(struct net_device *dev)
1375{ 1371{
1376 long ioaddr = dev->base_addr;
1377 struct epic_private *ep = netdev_priv(dev); 1372 struct epic_private *ep = netdev_priv(dev);
1373 void __iomem *ioaddr = ep->ioaddr;
1378 unsigned char mc_filter[8]; /* Multicast hash filter */ 1374 unsigned char mc_filter[8]; /* Multicast hash filter */
1379 int i; 1375 int i;
1380 1376
1381 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */ 1377 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1382 outl(0x002C, ioaddr + RxCtrl); 1378 ew32(RxCtrl, 0x002c);
1383 /* Unconditionally log net taps. */ 1379 /* Unconditionally log net taps. */
1384 memset(mc_filter, 0xff, sizeof(mc_filter)); 1380 memset(mc_filter, 0xff, sizeof(mc_filter));
1385 } else if ((!netdev_mc_empty(dev)) || (dev->flags & IFF_ALLMULTI)) { 1381 } else if ((!netdev_mc_empty(dev)) || (dev->flags & IFF_ALLMULTI)) {
@@ -1387,9 +1383,9 @@ static void set_rx_mode(struct net_device *dev)
1387 is never enabled. */ 1383 is never enabled. */
1388 /* Too many to filter perfectly -- accept all multicasts. */ 1384 /* Too many to filter perfectly -- accept all multicasts. */
1389 memset(mc_filter, 0xff, sizeof(mc_filter)); 1385 memset(mc_filter, 0xff, sizeof(mc_filter));
1390 outl(0x000C, ioaddr + RxCtrl); 1386 ew32(RxCtrl, 0x000c);
1391 } else if (netdev_mc_empty(dev)) { 1387 } else if (netdev_mc_empty(dev)) {
1392 outl(0x0004, ioaddr + RxCtrl); 1388 ew32(RxCtrl, 0x0004);
1393 return; 1389 return;
1394 } else { /* Never executed, for now. */ 1390 } else { /* Never executed, for now. */
1395 struct netdev_hw_addr *ha; 1391 struct netdev_hw_addr *ha;
@@ -1404,7 +1400,7 @@ static void set_rx_mode(struct net_device *dev)
1404 /* ToDo: perhaps we need to stop the Tx and Rx process here? */ 1400 /* ToDo: perhaps we need to stop the Tx and Rx process here? */
1405 if (memcmp(mc_filter, ep->mc_filter, sizeof(mc_filter))) { 1401 if (memcmp(mc_filter, ep->mc_filter, sizeof(mc_filter))) {
1406 for (i = 0; i < 4; i++) 1402 for (i = 0; i < 4; i++)
1407 outw(((u16 *)mc_filter)[i], ioaddr + MC0 + i*4); 1403 ew16(MC0 + i*4, ((u16 *)mc_filter)[i]);
1408 memcpy(ep->mc_filter, mc_filter, sizeof(mc_filter)); 1404 memcpy(ep->mc_filter, mc_filter, sizeof(mc_filter));
1409 } 1405 }
1410} 1406}
@@ -1466,22 +1462,26 @@ static void netdev_set_msglevel(struct net_device *dev, u32 value)
1466 1462
1467static int ethtool_begin(struct net_device *dev) 1463static int ethtool_begin(struct net_device *dev)
1468{ 1464{
1469 unsigned long ioaddr = dev->base_addr; 1465 struct epic_private *ep = netdev_priv(dev);
1466 void __iomem *ioaddr = ep->ioaddr;
1467
1470 /* power-up, if interface is down */ 1468 /* power-up, if interface is down */
1471 if (! netif_running(dev)) { 1469 if (!netif_running(dev)) {
1472 outl(0x0200, ioaddr + GENCTL); 1470 ew32(GENCTL, 0x0200);
1473 outl((inl(ioaddr + NVCTL) & ~0x003C) | 0x4800, ioaddr + NVCTL); 1471 ew32(NVCTL, (er32(NVCTL) & ~0x003c) | 0x4800);
1474 } 1472 }
1475 return 0; 1473 return 0;
1476} 1474}
1477 1475
1478static void ethtool_complete(struct net_device *dev) 1476static void ethtool_complete(struct net_device *dev)
1479{ 1477{
1480 unsigned long ioaddr = dev->base_addr; 1478 struct epic_private *ep = netdev_priv(dev);
1479 void __iomem *ioaddr = ep->ioaddr;
1480
1481 /* power-down, if interface is down */ 1481 /* power-down, if interface is down */
1482 if (! netif_running(dev)) { 1482 if (!netif_running(dev)) {
1483 outl(0x0008, ioaddr + GENCTL); 1483 ew32(GENCTL, 0x0008);
1484 outl((inl(ioaddr + NVCTL) & ~0x483C) | 0x0000, ioaddr + NVCTL); 1484 ew32(NVCTL, (er32(NVCTL) & ~0x483c) | 0x0000);
1485 } 1485 }
1486} 1486}
1487 1487
@@ -1500,14 +1500,14 @@ static const struct ethtool_ops netdev_ethtool_ops = {
1500static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 1500static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1501{ 1501{
1502 struct epic_private *np = netdev_priv(dev); 1502 struct epic_private *np = netdev_priv(dev);
1503 long ioaddr = dev->base_addr; 1503 void __iomem *ioaddr = np->ioaddr;
1504 struct mii_ioctl_data *data = if_mii(rq); 1504 struct mii_ioctl_data *data = if_mii(rq);
1505 int rc; 1505 int rc;
1506 1506
1507 /* power-up, if interface is down */ 1507 /* power-up, if interface is down */
1508 if (! netif_running(dev)) { 1508 if (! netif_running(dev)) {
1509 outl(0x0200, ioaddr + GENCTL); 1509 ew32(GENCTL, 0x0200);
1510 outl((inl(ioaddr + NVCTL) & ~0x003C) | 0x4800, ioaddr + NVCTL); 1510 ew32(NVCTL, (er32(NVCTL) & ~0x003c) | 0x4800);
1511 } 1511 }
1512 1512
1513 /* all non-ethtool ioctls (the SIOC[GS]MIIxxx ioctls) */ 1513 /* all non-ethtool ioctls (the SIOC[GS]MIIxxx ioctls) */
@@ -1517,14 +1517,14 @@ static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1517 1517
1518 /* power-down, if interface is down */ 1518 /* power-down, if interface is down */
1519 if (! netif_running(dev)) { 1519 if (! netif_running(dev)) {
1520 outl(0x0008, ioaddr + GENCTL); 1520 ew32(GENCTL, 0x0008);
1521 outl((inl(ioaddr + NVCTL) & ~0x483C) | 0x0000, ioaddr + NVCTL); 1521 ew32(NVCTL, (er32(NVCTL) & ~0x483c) | 0x0000);
1522 } 1522 }
1523 return rc; 1523 return rc;
1524} 1524}
1525 1525
1526 1526
1527static void __devexit epic_remove_one (struct pci_dev *pdev) 1527static void __devexit epic_remove_one(struct pci_dev *pdev)
1528{ 1528{
1529 struct net_device *dev = pci_get_drvdata(pdev); 1529 struct net_device *dev = pci_get_drvdata(pdev);
1530 struct epic_private *ep = netdev_priv(dev); 1530 struct epic_private *ep = netdev_priv(dev);
@@ -1532,9 +1532,7 @@ static void __devexit epic_remove_one (struct pci_dev *pdev)
1532 pci_free_consistent(pdev, TX_TOTAL_SIZE, ep->tx_ring, ep->tx_ring_dma); 1532 pci_free_consistent(pdev, TX_TOTAL_SIZE, ep->tx_ring, ep->tx_ring_dma);
1533 pci_free_consistent(pdev, RX_TOTAL_SIZE, ep->rx_ring, ep->rx_ring_dma); 1533 pci_free_consistent(pdev, RX_TOTAL_SIZE, ep->rx_ring, ep->rx_ring_dma);
1534 unregister_netdev(dev); 1534 unregister_netdev(dev);
1535#ifndef USE_IO_OPS 1535 pci_iounmap(pdev, ep->ioaddr);
1536 iounmap((void*) dev->base_addr);
1537#endif
1538 pci_release_regions(pdev); 1536 pci_release_regions(pdev);
1539 free_netdev(dev); 1537 free_netdev(dev);
1540 pci_disable_device(pdev); 1538 pci_disable_device(pdev);
@@ -1548,13 +1546,14 @@ static void __devexit epic_remove_one (struct pci_dev *pdev)
1548static int epic_suspend (struct pci_dev *pdev, pm_message_t state) 1546static int epic_suspend (struct pci_dev *pdev, pm_message_t state)
1549{ 1547{
1550 struct net_device *dev = pci_get_drvdata(pdev); 1548 struct net_device *dev = pci_get_drvdata(pdev);
1551 long ioaddr = dev->base_addr; 1549 struct epic_private *ep = netdev_priv(dev);
1550 void __iomem *ioaddr = ep->ioaddr;
1552 1551
1553 if (!netif_running(dev)) 1552 if (!netif_running(dev))
1554 return 0; 1553 return 0;
1555 epic_pause(dev); 1554 epic_pause(dev);
1556 /* Put the chip into low-power mode. */ 1555 /* Put the chip into low-power mode. */
1557 outl(0x0008, ioaddr + GENCTL); 1556 ew32(GENCTL, 0x0008);
1558 /* pci_power_off(pdev, -1); */ 1557 /* pci_power_off(pdev, -1); */
1559 return 0; 1558 return 0;
1560} 1559}
diff --git a/drivers/net/ethernet/smsc/smsc911x.c b/drivers/net/ethernet/smsc/smsc911x.c
index 4a6971027076..519ed8ef54e0 100644
--- a/drivers/net/ethernet/smsc/smsc911x.c
+++ b/drivers/net/ethernet/smsc/smsc911x.c
@@ -2070,6 +2070,7 @@ static const struct ethtool_ops smsc911x_ethtool_ops = {
2070 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len, 2070 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
2071 .get_eeprom = smsc911x_ethtool_get_eeprom, 2071 .get_eeprom = smsc911x_ethtool_get_eeprom,
2072 .set_eeprom = smsc911x_ethtool_set_eeprom, 2072 .set_eeprom = smsc911x_ethtool_set_eeprom,
2073 .get_ts_info = ethtool_op_get_ts_info,
2073}; 2074};
2074 2075
2075static const struct net_device_ops smsc911x_netdev_ops = { 2076static const struct net_device_ops smsc911x_netdev_ops = {
diff --git a/drivers/net/ethernet/smsc/smsc9420.c b/drivers/net/ethernet/smsc/smsc9420.c
index 38386478532b..fd33b21f6c96 100644
--- a/drivers/net/ethernet/smsc/smsc9420.c
+++ b/drivers/net/ethernet/smsc/smsc9420.c
@@ -54,7 +54,7 @@ struct smsc9420_ring_info {
54}; 54};
55 55
56struct smsc9420_pdata { 56struct smsc9420_pdata {
57 void __iomem *base_addr; 57 void __iomem *ioaddr;
58 struct pci_dev *pdev; 58 struct pci_dev *pdev;
59 struct net_device *dev; 59 struct net_device *dev;
60 60
@@ -114,13 +114,13 @@ do { if ((pd)->msg_enable & NETIF_MSG_##TYPE) \
114 114
115static inline u32 smsc9420_reg_read(struct smsc9420_pdata *pd, u32 offset) 115static inline u32 smsc9420_reg_read(struct smsc9420_pdata *pd, u32 offset)
116{ 116{
117 return ioread32(pd->base_addr + offset); 117 return ioread32(pd->ioaddr + offset);
118} 118}
119 119
120static inline void 120static inline void
121smsc9420_reg_write(struct smsc9420_pdata *pd, u32 offset, u32 value) 121smsc9420_reg_write(struct smsc9420_pdata *pd, u32 offset, u32 value)
122{ 122{
123 iowrite32(value, pd->base_addr + offset); 123 iowrite32(value, pd->ioaddr + offset);
124} 124}
125 125
126static inline void smsc9420_pci_flush_write(struct smsc9420_pdata *pd) 126static inline void smsc9420_pci_flush_write(struct smsc9420_pdata *pd)
@@ -469,6 +469,7 @@ static const struct ethtool_ops smsc9420_ethtool_ops = {
469 .set_eeprom = smsc9420_ethtool_set_eeprom, 469 .set_eeprom = smsc9420_ethtool_set_eeprom,
470 .get_regs_len = smsc9420_ethtool_getregslen, 470 .get_regs_len = smsc9420_ethtool_getregslen,
471 .get_regs = smsc9420_ethtool_getregs, 471 .get_regs = smsc9420_ethtool_getregs,
472 .get_ts_info = ethtool_op_get_ts_info,
472}; 473};
473 474
474/* Sets the device MAC address to dev_addr */ 475/* Sets the device MAC address to dev_addr */
@@ -659,7 +660,7 @@ static irqreturn_t smsc9420_isr(int irq, void *dev_id)
659 ulong flags; 660 ulong flags;
660 661
661 BUG_ON(!pd); 662 BUG_ON(!pd);
662 BUG_ON(!pd->base_addr); 663 BUG_ON(!pd->ioaddr);
663 664
664 int_cfg = smsc9420_reg_read(pd, INT_CFG); 665 int_cfg = smsc9420_reg_read(pd, INT_CFG);
665 666
@@ -720,9 +721,12 @@ static irqreturn_t smsc9420_isr(int irq, void *dev_id)
720#ifdef CONFIG_NET_POLL_CONTROLLER 721#ifdef CONFIG_NET_POLL_CONTROLLER
721static void smsc9420_poll_controller(struct net_device *dev) 722static void smsc9420_poll_controller(struct net_device *dev)
722{ 723{
723 disable_irq(dev->irq); 724 struct smsc9420_pdata *pd = netdev_priv(dev);
725 const int irq = pd->pdev->irq;
726
727 disable_irq(irq);
724 smsc9420_isr(0, dev); 728 smsc9420_isr(0, dev);
725 enable_irq(dev->irq); 729 enable_irq(irq);
726} 730}
727#endif /* CONFIG_NET_POLL_CONTROLLER */ 731#endif /* CONFIG_NET_POLL_CONTROLLER */
728 732
@@ -759,7 +763,7 @@ static int smsc9420_stop(struct net_device *dev)
759 smsc9420_stop_rx(pd); 763 smsc9420_stop_rx(pd);
760 smsc9420_free_rx_ring(pd); 764 smsc9420_free_rx_ring(pd);
761 765
762 free_irq(dev->irq, pd); 766 free_irq(pd->pdev->irq, pd);
763 767
764 smsc9420_dmac_soft_reset(pd); 768 smsc9420_dmac_soft_reset(pd);
765 769
@@ -1331,15 +1335,12 @@ out:
1331 1335
1332static int smsc9420_open(struct net_device *dev) 1336static int smsc9420_open(struct net_device *dev)
1333{ 1337{
1334 struct smsc9420_pdata *pd; 1338 struct smsc9420_pdata *pd = netdev_priv(dev);
1335 u32 bus_mode, mac_cr, dmac_control, int_cfg, dma_intr_ena, int_ctl; 1339 u32 bus_mode, mac_cr, dmac_control, int_cfg, dma_intr_ena, int_ctl;
1340 const int irq = pd->pdev->irq;
1336 unsigned long flags; 1341 unsigned long flags;
1337 int result = 0, timeout; 1342 int result = 0, timeout;
1338 1343
1339 BUG_ON(!dev);
1340 pd = netdev_priv(dev);
1341 BUG_ON(!pd);
1342
1343 if (!is_valid_ether_addr(dev->dev_addr)) { 1344 if (!is_valid_ether_addr(dev->dev_addr)) {
1344 smsc_warn(IFUP, "dev_addr is not a valid MAC address"); 1345 smsc_warn(IFUP, "dev_addr is not a valid MAC address");
1345 result = -EADDRNOTAVAIL; 1346 result = -EADDRNOTAVAIL;
@@ -1358,9 +1359,10 @@ static int smsc9420_open(struct net_device *dev)
1358 smsc9420_reg_write(pd, INT_STAT, 0xFFFFFFFF); 1359 smsc9420_reg_write(pd, INT_STAT, 0xFFFFFFFF);
1359 smsc9420_pci_flush_write(pd); 1360 smsc9420_pci_flush_write(pd);
1360 1361
1361 if (request_irq(dev->irq, smsc9420_isr, IRQF_SHARED | IRQF_DISABLED, 1362 result = request_irq(irq, smsc9420_isr, IRQF_SHARED | IRQF_DISABLED,
1362 DRV_NAME, pd)) { 1363 DRV_NAME, pd);
1363 smsc_warn(IFUP, "Unable to use IRQ = %d", dev->irq); 1364 if (result) {
1365 smsc_warn(IFUP, "Unable to use IRQ = %d", irq);
1364 result = -ENODEV; 1366 result = -ENODEV;
1365 goto out_0; 1367 goto out_0;
1366 } 1368 }
@@ -1395,7 +1397,7 @@ static int smsc9420_open(struct net_device *dev)
1395 smsc9420_pci_flush_write(pd); 1397 smsc9420_pci_flush_write(pd);
1396 1398
1397 /* test the IRQ connection to the ISR */ 1399 /* test the IRQ connection to the ISR */
1398 smsc_dbg(IFUP, "Testing ISR using IRQ %d", dev->irq); 1400 smsc_dbg(IFUP, "Testing ISR using IRQ %d", irq);
1399 pd->software_irq_signal = false; 1401 pd->software_irq_signal = false;
1400 1402
1401 spin_lock_irqsave(&pd->int_lock, flags); 1403 spin_lock_irqsave(&pd->int_lock, flags);
@@ -1430,7 +1432,7 @@ static int smsc9420_open(struct net_device *dev)
1430 goto out_free_irq_1; 1432 goto out_free_irq_1;
1431 } 1433 }
1432 1434
1433 smsc_dbg(IFUP, "ISR passed test using IRQ %d", dev->irq); 1435 smsc_dbg(IFUP, "ISR passed test using IRQ %d", irq);
1434 1436
1435 result = smsc9420_alloc_tx_ring(pd); 1437 result = smsc9420_alloc_tx_ring(pd);
1436 if (result) { 1438 if (result) {
@@ -1490,7 +1492,7 @@ out_free_rx_ring_3:
1490out_free_tx_ring_2: 1492out_free_tx_ring_2:
1491 smsc9420_free_tx_ring(pd); 1493 smsc9420_free_tx_ring(pd);
1492out_free_irq_1: 1494out_free_irq_1:
1493 free_irq(dev->irq, pd); 1495 free_irq(irq, pd);
1494out_0: 1496out_0:
1495 return result; 1497 return result;
1496} 1498}
@@ -1519,7 +1521,7 @@ static int smsc9420_suspend(struct pci_dev *pdev, pm_message_t state)
1519 smsc9420_stop_rx(pd); 1521 smsc9420_stop_rx(pd);
1520 smsc9420_free_rx_ring(pd); 1522 smsc9420_free_rx_ring(pd);
1521 1523
1522 free_irq(dev->irq, pd); 1524 free_irq(pd->pdev->irq, pd);
1523 1525
1524 netif_device_detach(dev); 1526 netif_device_detach(dev);
1525 } 1527 }
@@ -1552,6 +1554,7 @@ static int smsc9420_resume(struct pci_dev *pdev)
1552 smsc_warn(IFUP, "pci_enable_wake failed: %d", err); 1554 smsc_warn(IFUP, "pci_enable_wake failed: %d", err);
1553 1555
1554 if (netif_running(dev)) { 1556 if (netif_running(dev)) {
1557 /* FIXME: gross. It looks like ancient PM relic.*/
1555 err = smsc9420_open(dev); 1558 err = smsc9420_open(dev);
1556 netif_device_attach(dev); 1559 netif_device_attach(dev);
1557 } 1560 }
@@ -1625,8 +1628,6 @@ smsc9420_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1625 /* registers are double mapped with 0 offset for LE and 0x200 for BE */ 1628 /* registers are double mapped with 0 offset for LE and 0x200 for BE */
1626 virt_addr += LAN9420_CPSR_ENDIAN_OFFSET; 1629 virt_addr += LAN9420_CPSR_ENDIAN_OFFSET;
1627 1630
1628 dev->base_addr = (ulong)virt_addr;
1629
1630 pd = netdev_priv(dev); 1631 pd = netdev_priv(dev);
1631 1632
1632 /* pci descriptors are created in the PCI consistent area */ 1633 /* pci descriptors are created in the PCI consistent area */
@@ -1646,7 +1647,7 @@ smsc9420_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1646 1647
1647 pd->pdev = pdev; 1648 pd->pdev = pdev;
1648 pd->dev = dev; 1649 pd->dev = dev;
1649 pd->base_addr = virt_addr; 1650 pd->ioaddr = virt_addr;
1650 pd->msg_enable = smsc_debug; 1651 pd->msg_enable = smsc_debug;
1651 pd->rx_csum = true; 1652 pd->rx_csum = true;
1652 1653
@@ -1669,7 +1670,6 @@ smsc9420_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1669 1670
1670 dev->netdev_ops = &smsc9420_netdev_ops; 1671 dev->netdev_ops = &smsc9420_netdev_ops;
1671 dev->ethtool_ops = &smsc9420_ethtool_ops; 1672 dev->ethtool_ops = &smsc9420_ethtool_ops;
1672 dev->irq = pdev->irq;
1673 1673
1674 netif_napi_add(dev, &pd->napi, smsc9420_rx_poll, NAPI_WEIGHT); 1674 netif_napi_add(dev, &pd->napi, smsc9420_rx_poll, NAPI_WEIGHT);
1675 1675
@@ -1727,7 +1727,7 @@ static void __devexit smsc9420_remove(struct pci_dev *pdev)
1727 pci_free_consistent(pdev, sizeof(struct smsc9420_dma_desc) * 1727 pci_free_consistent(pdev, sizeof(struct smsc9420_dma_desc) *
1728 (RX_RING_SIZE + TX_RING_SIZE), pd->rx_ring, pd->rx_dma_addr); 1728 (RX_RING_SIZE + TX_RING_SIZE), pd->rx_ring, pd->rx_dma_addr);
1729 1729
1730 iounmap(pd->base_addr - LAN9420_CPSR_ENDIAN_OFFSET); 1730 iounmap(pd->ioaddr - LAN9420_CPSR_ENDIAN_OFFSET);
1731 pci_release_regions(pdev); 1731 pci_release_regions(pdev);
1732 free_netdev(dev); 1732 free_netdev(dev);
1733 pci_disable_device(pdev); 1733 pci_disable_device(pdev);
diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h
index 0319d640f728..9e42b5d32cff 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -97,6 +97,16 @@ struct stmmac_extra_stats {
97 unsigned long normal_irq_n; 97 unsigned long normal_irq_n;
98}; 98};
99 99
100/* CSR Frequency Access Defines*/
101#define CSR_F_35M 35000000
102#define CSR_F_60M 60000000
103#define CSR_F_100M 100000000
104#define CSR_F_150M 150000000
105#define CSR_F_250M 250000000
106#define CSR_F_300M 300000000
107
108#define MAC_CSR_H_FRQ_MASK 0x20
109
100#define HASH_TABLE_SIZE 64 110#define HASH_TABLE_SIZE 64
101#define PAUSE_TIME 0x200 111#define PAUSE_TIME 0x200
102 112
@@ -228,7 +238,7 @@ struct stmmac_desc_ops {
228 int (*get_rx_owner) (struct dma_desc *p); 238 int (*get_rx_owner) (struct dma_desc *p);
229 void (*set_rx_owner) (struct dma_desc *p); 239 void (*set_rx_owner) (struct dma_desc *p);
230 /* Get the receive frame size */ 240 /* Get the receive frame size */
231 int (*get_rx_frame_len) (struct dma_desc *p); 241 int (*get_rx_frame_len) (struct dma_desc *p, int rx_coe_type);
232 /* Return the reception status looking at the RDES1 */ 242 /* Return the reception status looking at the RDES1 */
233 int (*rx_status) (void *data, struct stmmac_extra_stats *x, 243 int (*rx_status) (void *data, struct stmmac_extra_stats *x,
234 struct dma_desc *p); 244 struct dma_desc *p);
@@ -236,7 +246,8 @@ struct stmmac_desc_ops {
236 246
237struct stmmac_dma_ops { 247struct stmmac_dma_ops {
238 /* DMA core initialization */ 248 /* DMA core initialization */
239 int (*init) (void __iomem *ioaddr, int pbl, u32 dma_tx, u32 dma_rx); 249 int (*init) (void __iomem *ioaddr, int pbl, int fb, int burst_len,
250 u32 dma_tx, u32 dma_rx);
240 /* Dump DMA registers */ 251 /* Dump DMA registers */
241 void (*dump_regs) (void __iomem *ioaddr); 252 void (*dump_regs) (void __iomem *ioaddr);
242 /* Set tx/rx threshold in the csr6 register 253 /* Set tx/rx threshold in the csr6 register
@@ -261,8 +272,8 @@ struct stmmac_dma_ops {
261struct stmmac_ops { 272struct stmmac_ops {
262 /* MAC core initialization */ 273 /* MAC core initialization */
263 void (*core_init) (void __iomem *ioaddr) ____cacheline_aligned; 274 void (*core_init) (void __iomem *ioaddr) ____cacheline_aligned;
264 /* Support checksum offload engine */ 275 /* Enable and verify that the IPC module is supported */
265 int (*rx_coe) (void __iomem *ioaddr); 276 int (*rx_ipc) (void __iomem *ioaddr);
266 /* Dump MAC registers */ 277 /* Dump MAC registers */
267 void (*dump_regs) (void __iomem *ioaddr); 278 void (*dump_regs) (void __iomem *ioaddr);
268 /* Handle extra events on specific interrupts hw dependent */ 279 /* Handle extra events on specific interrupts hw dependent */
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
index cfcef0ea0fa5..54339a78e358 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
@@ -142,7 +142,7 @@ enum rx_tx_priority_ratio {
142#define DMA_BUS_MODE_RPBL_MASK 0x003e0000 /* Rx-Programmable Burst Len */ 142#define DMA_BUS_MODE_RPBL_MASK 0x003e0000 /* Rx-Programmable Burst Len */
143#define DMA_BUS_MODE_RPBL_SHIFT 17 143#define DMA_BUS_MODE_RPBL_SHIFT 17
144#define DMA_BUS_MODE_USP 0x00800000 144#define DMA_BUS_MODE_USP 0x00800000
145#define DMA_BUS_MODE_4PBL 0x01000000 145#define DMA_BUS_MODE_PBL 0x01000000
146#define DMA_BUS_MODE_AAL 0x02000000 146#define DMA_BUS_MODE_AAL 0x02000000
147 147
148/* DMA CRS Control and Status Register Mapping */ 148/* DMA CRS Control and Status Register Mapping */
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
index b1c48b975945..e7cbcd99c2cb 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
@@ -46,7 +46,7 @@ static void dwmac1000_core_init(void __iomem *ioaddr)
46#endif 46#endif
47} 47}
48 48
49static int dwmac1000_rx_coe_supported(void __iomem *ioaddr) 49static int dwmac1000_rx_ipc_enable(void __iomem *ioaddr)
50{ 50{
51 u32 value = readl(ioaddr + GMAC_CONTROL); 51 u32 value = readl(ioaddr + GMAC_CONTROL);
52 52
@@ -211,7 +211,7 @@ static void dwmac1000_irq_status(void __iomem *ioaddr)
211 211
212static const struct stmmac_ops dwmac1000_ops = { 212static const struct stmmac_ops dwmac1000_ops = {
213 .core_init = dwmac1000_core_init, 213 .core_init = dwmac1000_core_init,
214 .rx_coe = dwmac1000_rx_coe_supported, 214 .rx_ipc = dwmac1000_rx_ipc_enable,
215 .dump_regs = dwmac1000_dump_regs, 215 .dump_regs = dwmac1000_dump_regs,
216 .host_irq_status = dwmac1000_irq_status, 216 .host_irq_status = dwmac1000_irq_status,
217 .set_filter = dwmac1000_set_filter, 217 .set_filter = dwmac1000_set_filter,
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
index 4d5402a1d262..3675c5731565 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
@@ -30,8 +30,8 @@
30#include "dwmac1000.h" 30#include "dwmac1000.h"
31#include "dwmac_dma.h" 31#include "dwmac_dma.h"
32 32
33static int dwmac1000_dma_init(void __iomem *ioaddr, int pbl, u32 dma_tx, 33static int dwmac1000_dma_init(void __iomem *ioaddr, int pbl, int fb,
34 u32 dma_rx) 34 int burst_len, u32 dma_tx, u32 dma_rx)
35{ 35{
36 u32 value = readl(ioaddr + DMA_BUS_MODE); 36 u32 value = readl(ioaddr + DMA_BUS_MODE);
37 int limit; 37 int limit;
@@ -48,15 +48,47 @@ static int dwmac1000_dma_init(void __iomem *ioaddr, int pbl, u32 dma_tx,
48 if (limit < 0) 48 if (limit < 0)
49 return -EBUSY; 49 return -EBUSY;
50 50
51 value = /* DMA_BUS_MODE_FB | */ DMA_BUS_MODE_4PBL | 51 /*
52 ((pbl << DMA_BUS_MODE_PBL_SHIFT) | 52 * Set the DMA PBL (Programmable Burst Length) mode
53 (pbl << DMA_BUS_MODE_RPBL_SHIFT)); 53 * Before stmmac core 3.50 this mode bit was 4xPBL, and
54 * post 3.5 mode bit acts as 8*PBL.
55 * For core rev < 3.5, when the core is set for 4xPBL mode, the
56 * DMA transfers the data in 4, 8, 16, 32, 64 & 128 beats
57 * depending on pbl value.
58 * For core rev > 3.5, when the core is set for 8xPBL mode, the
59 * DMA transfers the data in 8, 16, 32, 64, 128 & 256 beats
60 * depending on pbl value.
61 */
62 value = DMA_BUS_MODE_PBL | ((pbl << DMA_BUS_MODE_PBL_SHIFT) |
63 (pbl << DMA_BUS_MODE_RPBL_SHIFT));
64
65 /* Set the Fixed burst mode */
66 if (fb)
67 value |= DMA_BUS_MODE_FB;
54 68
55#ifdef CONFIG_STMMAC_DA 69#ifdef CONFIG_STMMAC_DA
56 value |= DMA_BUS_MODE_DA; /* Rx has priority over tx */ 70 value |= DMA_BUS_MODE_DA; /* Rx has priority over tx */
57#endif 71#endif
58 writel(value, ioaddr + DMA_BUS_MODE); 72 writel(value, ioaddr + DMA_BUS_MODE);
59 73
74 /* In case of GMAC AXI configuration, program the DMA_AXI_BUS_MODE
75 * for supported bursts.
76 *
77 * Note: This is applicable only for revision GMACv3.61a. For
78 * older version this register is reserved and shall have no
79 * effect.
80 *
81 * Note:
82 * For Fixed Burst Mode: if we directly write 0xFF to this
83 * register using the configurations pass from platform code,
84 * this would ensure that all bursts supported by core are set
85 * and those which are not supported would remain ineffective.
86 *
87 * For Non Fixed Burst Mode: provide the maximum value of the
88 * burst length. Any burst equal or below the provided burst
89 * length would be allowed to perform. */
90 writel(burst_len, ioaddr + DMA_AXI_BUS_MODE);
91
60 /* Mask interrupts by writing to CSR7 */ 92 /* Mask interrupts by writing to CSR7 */
61 writel(DMA_INTR_DEFAULT_MASK, ioaddr + DMA_INTR_ENA); 93 writel(DMA_INTR_DEFAULT_MASK, ioaddr + DMA_INTR_ENA);
62 94
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
index 138fb8dd1e87..efde50ff03f8 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
@@ -43,11 +43,6 @@ static void dwmac100_core_init(void __iomem *ioaddr)
43#endif 43#endif
44} 44}
45 45
46static int dwmac100_rx_coe_supported(void __iomem *ioaddr)
47{
48 return 0;
49}
50
51static void dwmac100_dump_mac_regs(void __iomem *ioaddr) 46static void dwmac100_dump_mac_regs(void __iomem *ioaddr)
52{ 47{
53 pr_info("\t----------------------------------------------\n" 48 pr_info("\t----------------------------------------------\n"
@@ -72,6 +67,11 @@ static void dwmac100_dump_mac_regs(void __iomem *ioaddr)
72 readl(ioaddr + MAC_VLAN2)); 67 readl(ioaddr + MAC_VLAN2));
73} 68}
74 69
70static int dwmac100_rx_ipc_enable(void __iomem *ioaddr)
71{
72 return 0;
73}
74
75static void dwmac100_irq_status(void __iomem *ioaddr) 75static void dwmac100_irq_status(void __iomem *ioaddr)
76{ 76{
77 return; 77 return;
@@ -160,7 +160,7 @@ static void dwmac100_pmt(void __iomem *ioaddr, unsigned long mode)
160 160
161static const struct stmmac_ops dwmac100_ops = { 161static const struct stmmac_ops dwmac100_ops = {
162 .core_init = dwmac100_core_init, 162 .core_init = dwmac100_core_init,
163 .rx_coe = dwmac100_rx_coe_supported, 163 .rx_ipc = dwmac100_rx_ipc_enable,
164 .dump_regs = dwmac100_dump_mac_regs, 164 .dump_regs = dwmac100_dump_mac_regs,
165 .host_irq_status = dwmac100_irq_status, 165 .host_irq_status = dwmac100_irq_status,
166 .set_filter = dwmac100_set_filter, 166 .set_filter = dwmac100_set_filter,
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
index bc17fd08b55d..92ed2e07609e 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
@@ -32,8 +32,8 @@
32#include "dwmac100.h" 32#include "dwmac100.h"
33#include "dwmac_dma.h" 33#include "dwmac_dma.h"
34 34
35static int dwmac100_dma_init(void __iomem *ioaddr, int pbl, u32 dma_tx, 35static int dwmac100_dma_init(void __iomem *ioaddr, int pbl, int fb,
36 u32 dma_rx) 36 int burst_len, u32 dma_tx, u32 dma_rx)
37{ 37{
38 u32 value = readl(ioaddr + DMA_BUS_MODE); 38 u32 value = readl(ioaddr + DMA_BUS_MODE);
39 int limit; 39 int limit;
@@ -52,7 +52,7 @@ static int dwmac100_dma_init(void __iomem *ioaddr, int pbl, u32 dma_tx,
52 52
53 /* Enable Application Access by writing to DMA CSR0 */ 53 /* Enable Application Access by writing to DMA CSR0 */
54 writel(DMA_BUS_MODE_DEFAULT | (pbl << DMA_BUS_MODE_PBL_SHIFT), 54 writel(DMA_BUS_MODE_DEFAULT | (pbl << DMA_BUS_MODE_PBL_SHIFT),
55 ioaddr + DMA_BUS_MODE); 55 ioaddr + DMA_BUS_MODE);
56 56
57 /* Mask interrupts by writing to CSR7 */ 57 /* Mask interrupts by writing to CSR7 */
58 writel(DMA_INTR_DEFAULT_MASK, ioaddr + DMA_INTR_ENA); 58 writel(DMA_INTR_DEFAULT_MASK, ioaddr + DMA_INTR_ENA);
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h b/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h
index 437edacd602e..6e0360f9cfde 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h
@@ -32,6 +32,7 @@
32#define DMA_CONTROL 0x00001018 /* Ctrl (Operational Mode) */ 32#define DMA_CONTROL 0x00001018 /* Ctrl (Operational Mode) */
33#define DMA_INTR_ENA 0x0000101c /* Interrupt Enable */ 33#define DMA_INTR_ENA 0x0000101c /* Interrupt Enable */
34#define DMA_MISSED_FRAME_CTR 0x00001020 /* Missed Frame Counter */ 34#define DMA_MISSED_FRAME_CTR 0x00001020 /* Missed Frame Counter */
35#define DMA_AXI_BUS_MODE 0x00001028 /* AXI Bus Mode */
35#define DMA_CUR_TX_BUF_ADDR 0x00001050 /* Current Host Tx Buffer */ 36#define DMA_CUR_TX_BUF_ADDR 0x00001050 /* Current Host Tx Buffer */
36#define DMA_CUR_RX_BUF_ADDR 0x00001054 /* Current Host Rx Buffer */ 37#define DMA_CUR_RX_BUF_ADDR 0x00001054 /* Current Host Rx Buffer */
37#define DMA_HW_FEATURE 0x00001058 /* HW Feature Register */ 38#define DMA_HW_FEATURE 0x00001058 /* HW Feature Register */
diff --git a/drivers/net/ethernet/stmicro/stmmac/enh_desc.c b/drivers/net/ethernet/stmicro/stmmac/enh_desc.c
index ad1b627f8ec2..2fc8ef95f97a 100644
--- a/drivers/net/ethernet/stmicro/stmmac/enh_desc.c
+++ b/drivers/net/ethernet/stmicro/stmmac/enh_desc.c
@@ -22,6 +22,7 @@
22 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 22 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
23*******************************************************************************/ 23*******************************************************************************/
24 24
25#include <linux/stmmac.h>
25#include "common.h" 26#include "common.h"
26#include "descs_com.h" 27#include "descs_com.h"
27 28
@@ -309,9 +310,17 @@ static void enh_desc_close_tx_desc(struct dma_desc *p)
309 p->des01.etx.interrupt = 1; 310 p->des01.etx.interrupt = 1;
310} 311}
311 312
312static int enh_desc_get_rx_frame_len(struct dma_desc *p) 313static int enh_desc_get_rx_frame_len(struct dma_desc *p, int rx_coe_type)
313{ 314{
314 return p->des01.erx.frame_length; 315 /* The type-1 checksum offload engines append the checksum at
316 * the end of frame and the two bytes of checksum are added in
317 * the length.
318 * Adjust for that in the framelen for type-1 checksum offload
319 * engines. */
320 if (rx_coe_type == STMMAC_RX_COE_TYPE1)
321 return p->des01.erx.frame_length - 2;
322 else
323 return p->des01.erx.frame_length;
315} 324}
316 325
317const struct stmmac_desc_ops enh_desc_ops = { 326const struct stmmac_desc_ops enh_desc_ops = {
diff --git a/drivers/net/ethernet/stmicro/stmmac/norm_desc.c b/drivers/net/ethernet/stmicro/stmmac/norm_desc.c
index 25953bb45a73..68962c549a2d 100644
--- a/drivers/net/ethernet/stmicro/stmmac/norm_desc.c
+++ b/drivers/net/ethernet/stmicro/stmmac/norm_desc.c
@@ -22,6 +22,7 @@
22 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 22 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
23*******************************************************************************/ 23*******************************************************************************/
24 24
25#include <linux/stmmac.h>
25#include "common.h" 26#include "common.h"
26#include "descs_com.h" 27#include "descs_com.h"
27 28
@@ -201,9 +202,17 @@ static void ndesc_close_tx_desc(struct dma_desc *p)
201 p->des01.tx.interrupt = 1; 202 p->des01.tx.interrupt = 1;
202} 203}
203 204
204static int ndesc_get_rx_frame_len(struct dma_desc *p) 205static int ndesc_get_rx_frame_len(struct dma_desc *p, int rx_coe_type)
205{ 206{
206 return p->des01.rx.frame_length; 207 /* The type-1 checksum offload engines append the checksum at
208 * the end of frame and the two bytes of checksum are added in
209 * the length.
210 * Adjust for that in the framelen for type-1 checksum offload
211 * engines. */
212 if (rx_coe_type == STMMAC_RX_COE_TYPE1)
213 return p->des01.rx.frame_length - 2;
214 else
215 return p->des01.rx.frame_length;
207} 216}
208 217
209const struct stmmac_desc_ops ndesc_ops = { 218const struct stmmac_desc_ops ndesc_ops = {
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
index b4b095fdcf29..9f2435c53f57 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
@@ -21,7 +21,9 @@
21*******************************************************************************/ 21*******************************************************************************/
22 22
23#define STMMAC_RESOURCE_NAME "stmmaceth" 23#define STMMAC_RESOURCE_NAME "stmmaceth"
24#define DRV_MODULE_VERSION "Feb_2012" 24#define DRV_MODULE_VERSION "March_2012"
25
26#include <linux/clk.h>
25#include <linux/stmmac.h> 27#include <linux/stmmac.h>
26#include <linux/phy.h> 28#include <linux/phy.h>
27#include "common.h" 29#include "common.h"
@@ -56,8 +58,6 @@ struct stmmac_priv {
56 58
57 struct stmmac_extra_stats xstats; 59 struct stmmac_extra_stats xstats;
58 struct napi_struct napi; 60 struct napi_struct napi;
59
60 int rx_coe;
61 int no_csum_insertion; 61 int no_csum_insertion;
62 62
63 struct phy_device *phydev; 63 struct phy_device *phydev;
@@ -81,6 +81,10 @@ struct stmmac_priv {
81 struct stmmac_counters mmc; 81 struct stmmac_counters mmc;
82 struct dma_features dma_cap; 82 struct dma_features dma_cap;
83 int hw_cap_support; 83 int hw_cap_support;
84#ifdef CONFIG_HAVE_CLK
85 struct clk *stmmac_clk;
86#endif
87 int clk_csr;
84}; 88};
85 89
86extern int phyaddr; 90extern int phyaddr;
@@ -99,3 +103,41 @@ int stmmac_dvr_remove(struct net_device *ndev);
99struct stmmac_priv *stmmac_dvr_probe(struct device *device, 103struct stmmac_priv *stmmac_dvr_probe(struct device *device,
100 struct plat_stmmacenet_data *plat_dat, 104 struct plat_stmmacenet_data *plat_dat,
101 void __iomem *addr); 105 void __iomem *addr);
106
107#ifdef CONFIG_HAVE_CLK
108static inline int stmmac_clk_enable(struct stmmac_priv *priv)
109{
110 if (priv->stmmac_clk)
111 return clk_enable(priv->stmmac_clk);
112
113 return 0;
114}
115
116static inline void stmmac_clk_disable(struct stmmac_priv *priv)
117{
118 if (priv->stmmac_clk)
119 clk_disable(priv->stmmac_clk);
120}
121static inline int stmmac_clk_get(struct stmmac_priv *priv)
122{
123 priv->stmmac_clk = clk_get(priv->device, NULL);
124
125 if (IS_ERR(priv->stmmac_clk)) {
126 pr_err("%s: ERROR clk_get failed\n", __func__);
127 return PTR_ERR(priv->stmmac_clk);
128 }
129 return 0;
130}
131#else
132static inline int stmmac_clk_enable(struct stmmac_priv *priv)
133{
134 return 0;
135}
136static inline void stmmac_clk_disable(struct stmmac_priv *priv)
137{
138}
139static inline int stmmac_clk_get(struct stmmac_priv *priv)
140{
141 return 0;
142}
143#endif /* CONFIG_HAVE_CLK */
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
index f98e1511660f..ce431846fc6f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
@@ -481,6 +481,7 @@ static const struct ethtool_ops stmmac_ethtool_ops = {
481 .get_wol = stmmac_get_wol, 481 .get_wol = stmmac_get_wol,
482 .set_wol = stmmac_set_wol, 482 .set_wol = stmmac_set_wol,
483 .get_sset_count = stmmac_get_sset_count, 483 .get_sset_count = stmmac_get_sset_count,
484 .get_ts_info = ethtool_op_get_ts_info,
484}; 485};
485 486
486void stmmac_set_ethtool_ops(struct net_device *netdev) 487void stmmac_set_ethtool_ops(struct net_device *netdev)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 48d56da62f08..a64f0d422e76 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -163,6 +163,35 @@ static void stmmac_verify_args(void)
163 pause = PAUSE_TIME; 163 pause = PAUSE_TIME;
164} 164}
165 165
166static void stmmac_clk_csr_set(struct stmmac_priv *priv)
167{
168#ifdef CONFIG_HAVE_CLK
169 u32 clk_rate;
170
171 clk_rate = clk_get_rate(priv->stmmac_clk);
172
173 /* Platform provided default clk_csr would be assumed valid
174 * for all other cases except for the below mentioned ones. */
175 if (!(priv->clk_csr & MAC_CSR_H_FRQ_MASK)) {
176 if (clk_rate < CSR_F_35M)
177 priv->clk_csr = STMMAC_CSR_20_35M;
178 else if ((clk_rate >= CSR_F_35M) && (clk_rate < CSR_F_60M))
179 priv->clk_csr = STMMAC_CSR_35_60M;
180 else if ((clk_rate >= CSR_F_60M) && (clk_rate < CSR_F_100M))
181 priv->clk_csr = STMMAC_CSR_60_100M;
182 else if ((clk_rate >= CSR_F_100M) && (clk_rate < CSR_F_150M))
183 priv->clk_csr = STMMAC_CSR_100_150M;
184 else if ((clk_rate >= CSR_F_150M) && (clk_rate < CSR_F_250M))
185 priv->clk_csr = STMMAC_CSR_150_250M;
186 else if ((clk_rate >= CSR_F_250M) && (clk_rate < CSR_F_300M))
187 priv->clk_csr = STMMAC_CSR_250_300M;
188 } /* For values higher than the IEEE 802.3 specified frequency
189 * we can not estimate the proper divider as it is not known
190 * the frequency of clk_csr_i. So we do not change the default
191 * divider. */
192#endif
193}
194
166#if defined(STMMAC_XMIT_DEBUG) || defined(STMMAC_RX_DEBUG) 195#if defined(STMMAC_XMIT_DEBUG) || defined(STMMAC_RX_DEBUG)
167static void print_pkt(unsigned char *buf, int len) 196static void print_pkt(unsigned char *buf, int len)
168{ 197{
@@ -307,7 +336,13 @@ static int stmmac_init_phy(struct net_device *dev)
307 priv->speed = 0; 336 priv->speed = 0;
308 priv->oldduplex = -1; 337 priv->oldduplex = -1;
309 338
310 snprintf(bus_id, MII_BUS_ID_SIZE, "stmmac-%x", priv->plat->bus_id); 339 if (priv->plat->phy_bus_name)
340 snprintf(bus_id, MII_BUS_ID_SIZE, "%s-%x",
341 priv->plat->phy_bus_name, priv->plat->bus_id);
342 else
343 snprintf(bus_id, MII_BUS_ID_SIZE, "stmmac-%x",
344 priv->plat->bus_id);
345
311 snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id, 346 snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,
312 priv->plat->phy_addr); 347 priv->plat->phy_addr);
313 pr_debug("stmmac_init_phy: trying to attach to %s\n", phy_id); 348 pr_debug("stmmac_init_phy: trying to attach to %s\n", phy_id);
@@ -898,6 +933,8 @@ static int stmmac_open(struct net_device *dev)
898 struct stmmac_priv *priv = netdev_priv(dev); 933 struct stmmac_priv *priv = netdev_priv(dev);
899 int ret; 934 int ret;
900 935
936 stmmac_clk_enable(priv);
937
901 stmmac_check_ether_addr(priv); 938 stmmac_check_ether_addr(priv);
902 939
903 /* MDIO bus Registration */ 940 /* MDIO bus Registration */
@@ -905,13 +942,15 @@ static int stmmac_open(struct net_device *dev)
905 if (ret < 0) { 942 if (ret < 0) {
906 pr_debug("%s: MDIO bus (id: %d) registration failed", 943 pr_debug("%s: MDIO bus (id: %d) registration failed",
907 __func__, priv->plat->bus_id); 944 __func__, priv->plat->bus_id);
908 return ret; 945 goto open_clk_dis;
909 } 946 }
910 947
911#ifdef CONFIG_STMMAC_TIMER 948#ifdef CONFIG_STMMAC_TIMER
912 priv->tm = kzalloc(sizeof(struct stmmac_timer *), GFP_KERNEL); 949 priv->tm = kzalloc(sizeof(struct stmmac_timer *), GFP_KERNEL);
913 if (unlikely(priv->tm == NULL)) 950 if (unlikely(priv->tm == NULL)) {
914 return -ENOMEM; 951 ret = -ENOMEM;
952 goto open_clk_dis;
953 }
915 954
916 priv->tm->freq = tmrate; 955 priv->tm->freq = tmrate;
917 956
@@ -938,7 +977,9 @@ static int stmmac_open(struct net_device *dev)
938 init_dma_desc_rings(dev); 977 init_dma_desc_rings(dev);
939 978
940 /* DMA initialization and SW reset */ 979 /* DMA initialization and SW reset */
941 ret = priv->hw->dma->init(priv->ioaddr, priv->plat->pbl, 980 ret = priv->hw->dma->init(priv->ioaddr, priv->plat->dma_cfg->pbl,
981 priv->plat->dma_cfg->fixed_burst,
982 priv->plat->dma_cfg->burst_len,
942 priv->dma_tx_phy, priv->dma_rx_phy); 983 priv->dma_tx_phy, priv->dma_rx_phy);
943 if (ret < 0) { 984 if (ret < 0) {
944 pr_err("%s: DMA initialization failed\n", __func__); 985 pr_err("%s: DMA initialization failed\n", __func__);
@@ -1026,6 +1067,8 @@ open_error:
1026 if (priv->phydev) 1067 if (priv->phydev)
1027 phy_disconnect(priv->phydev); 1068 phy_disconnect(priv->phydev);
1028 1069
1070open_clk_dis:
1071 stmmac_clk_disable(priv);
1029 return ret; 1072 return ret;
1030} 1073}
1031 1074
@@ -1078,6 +1121,7 @@ static int stmmac_release(struct net_device *dev)
1078 stmmac_exit_fs(); 1121 stmmac_exit_fs();
1079#endif 1122#endif
1080 stmmac_mdio_unregister(dev); 1123 stmmac_mdio_unregister(dev);
1124 stmmac_clk_disable(priv);
1081 1125
1082 return 0; 1126 return 0;
1083} 1127}
@@ -1276,7 +1320,8 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit)
1276 struct sk_buff *skb; 1320 struct sk_buff *skb;
1277 int frame_len; 1321 int frame_len;
1278 1322
1279 frame_len = priv->hw->desc->get_rx_frame_len(p); 1323 frame_len = priv->hw->desc->get_rx_frame_len(p,
1324 priv->plat->rx_coe);
1280 /* ACS is set; GMAC core strips PAD/FCS for IEEE 802.3 1325 /* ACS is set; GMAC core strips PAD/FCS for IEEE 802.3
1281 * Type frames (LLC/LLC-SNAP) */ 1326 * Type frames (LLC/LLC-SNAP) */
1282 if (unlikely(status != llc_snap)) 1327 if (unlikely(status != llc_snap))
@@ -1312,7 +1357,7 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit)
1312#endif 1357#endif
1313 skb->protocol = eth_type_trans(skb, priv->dev); 1358 skb->protocol = eth_type_trans(skb, priv->dev);
1314 1359
1315 if (unlikely(!priv->rx_coe)) { 1360 if (unlikely(!priv->plat->rx_coe)) {
1316 /* No RX COE for old mac10/100 devices */ 1361 /* No RX COE for old mac10/100 devices */
1317 skb_checksum_none_assert(skb); 1362 skb_checksum_none_assert(skb);
1318 netif_receive_skb(skb); 1363 netif_receive_skb(skb);
@@ -1459,8 +1504,10 @@ static netdev_features_t stmmac_fix_features(struct net_device *dev,
1459{ 1504{
1460 struct stmmac_priv *priv = netdev_priv(dev); 1505 struct stmmac_priv *priv = netdev_priv(dev);
1461 1506
1462 if (!priv->rx_coe) 1507 if (priv->plat->rx_coe == STMMAC_RX_COE_NONE)
1463 features &= ~NETIF_F_RXCSUM; 1508 features &= ~NETIF_F_RXCSUM;
1509 else if (priv->plat->rx_coe == STMMAC_RX_COE_TYPE1)
1510 features &= ~NETIF_F_IPV6_CSUM;
1464 if (!priv->plat->tx_coe) 1511 if (!priv->plat->tx_coe)
1465 features &= ~NETIF_F_ALL_CSUM; 1512 features &= ~NETIF_F_ALL_CSUM;
1466 1513
@@ -1765,17 +1812,32 @@ static int stmmac_hw_init(struct stmmac_priv *priv)
1765 * register (if supported). 1812 * register (if supported).
1766 */ 1813 */
1767 priv->plat->enh_desc = priv->dma_cap.enh_desc; 1814 priv->plat->enh_desc = priv->dma_cap.enh_desc;
1768 priv->plat->tx_coe = priv->dma_cap.tx_coe;
1769 priv->plat->pmt = priv->dma_cap.pmt_remote_wake_up; 1815 priv->plat->pmt = priv->dma_cap.pmt_remote_wake_up;
1816
1817 priv->plat->tx_coe = priv->dma_cap.tx_coe;
1818
1819 if (priv->dma_cap.rx_coe_type2)
1820 priv->plat->rx_coe = STMMAC_RX_COE_TYPE2;
1821 else if (priv->dma_cap.rx_coe_type1)
1822 priv->plat->rx_coe = STMMAC_RX_COE_TYPE1;
1823
1770 } else 1824 } else
1771 pr_info(" No HW DMA feature register supported"); 1825 pr_info(" No HW DMA feature register supported");
1772 1826
1773 /* Select the enhnaced/normal descriptor structures */ 1827 /* Select the enhnaced/normal descriptor structures */
1774 stmmac_selec_desc_mode(priv); 1828 stmmac_selec_desc_mode(priv);
1775 1829
1776 priv->rx_coe = priv->hw->mac->rx_coe(priv->ioaddr); 1830 /* Enable the IPC (Checksum Offload) and check if the feature has been
1777 if (priv->rx_coe) 1831 * enabled during the core configuration. */
1778 pr_info(" RX Checksum Offload Engine supported\n"); 1832 ret = priv->hw->mac->rx_ipc(priv->ioaddr);
1833 if (!ret) {
1834 pr_warning(" RX IPC Checksum Offload not configured.\n");
1835 priv->plat->rx_coe = STMMAC_RX_COE_NONE;
1836 }
1837
1838 if (priv->plat->rx_coe)
1839 pr_info(" RX Checksum Offload Engine supported (type %d)\n",
1840 priv->plat->rx_coe);
1779 if (priv->plat->tx_coe) 1841 if (priv->plat->tx_coe)
1780 pr_info(" TX Checksum insertion supported\n"); 1842 pr_info(" TX Checksum insertion supported\n");
1781 1843
@@ -1856,6 +1918,20 @@ struct stmmac_priv *stmmac_dvr_probe(struct device *device,
1856 goto error; 1918 goto error;
1857 } 1919 }
1858 1920
1921 if (stmmac_clk_get(priv))
1922 goto error;
1923
1924 /* If a specific clk_csr value is passed from the platform
1925 * this means that the CSR Clock Range selection cannot be
1926 * changed at run-time and it is fixed. Viceversa the driver'll try to
1927 * set the MDC clock dynamically according to the csr actual
1928 * clock input.
1929 */
1930 if (!priv->plat->clk_csr)
1931 stmmac_clk_csr_set(priv);
1932 else
1933 priv->clk_csr = priv->plat->clk_csr;
1934
1859 return priv; 1935 return priv;
1860 1936
1861error: 1937error:
@@ -1925,9 +2001,11 @@ int stmmac_suspend(struct net_device *ndev)
1925 /* Enable Power down mode by programming the PMT regs */ 2001 /* Enable Power down mode by programming the PMT regs */
1926 if (device_may_wakeup(priv->device)) 2002 if (device_may_wakeup(priv->device))
1927 priv->hw->mac->pmt(priv->ioaddr, priv->wolopts); 2003 priv->hw->mac->pmt(priv->ioaddr, priv->wolopts);
1928 else 2004 else {
1929 stmmac_set_mac(priv->ioaddr, false); 2005 stmmac_set_mac(priv->ioaddr, false);
1930 2006 /* Disable clock in case of PWM is off */
2007 stmmac_clk_disable(priv);
2008 }
1931 spin_unlock(&priv->lock); 2009 spin_unlock(&priv->lock);
1932 return 0; 2010 return 0;
1933} 2011}
@@ -1948,6 +2026,9 @@ int stmmac_resume(struct net_device *ndev)
1948 * from another devices (e.g. serial console). */ 2026 * from another devices (e.g. serial console). */
1949 if (device_may_wakeup(priv->device)) 2027 if (device_may_wakeup(priv->device))
1950 priv->hw->mac->pmt(priv->ioaddr, 0); 2028 priv->hw->mac->pmt(priv->ioaddr, 0);
2029 else
2030 /* enable the clk prevously disabled */
2031 stmmac_clk_enable(priv);
1951 2032
1952 netif_device_attach(ndev); 2033 netif_device_attach(ndev);
1953 2034
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
index 73195329aa46..ade108232048 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
@@ -34,6 +34,22 @@
34#define MII_BUSY 0x00000001 34#define MII_BUSY 0x00000001
35#define MII_WRITE 0x00000002 35#define MII_WRITE 0x00000002
36 36
37static int stmmac_mdio_busy_wait(void __iomem *ioaddr, unsigned int mii_addr)
38{
39 unsigned long curr;
40 unsigned long finish = jiffies + 3 * HZ;
41
42 do {
43 curr = jiffies;
44 if (readl(ioaddr + mii_addr) & MII_BUSY)
45 cpu_relax();
46 else
47 return 0;
48 } while (!time_after_eq(curr, finish));
49
50 return -EBUSY;
51}
52
37/** 53/**
38 * stmmac_mdio_read 54 * stmmac_mdio_read
39 * @bus: points to the mii_bus structure 55 * @bus: points to the mii_bus structure
@@ -54,11 +70,15 @@ static int stmmac_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg)
54 int data; 70 int data;
55 u16 regValue = (((phyaddr << 11) & (0x0000F800)) | 71 u16 regValue = (((phyaddr << 11) & (0x0000F800)) |
56 ((phyreg << 6) & (0x000007C0))); 72 ((phyreg << 6) & (0x000007C0)));
57 regValue |= MII_BUSY | ((priv->plat->clk_csr & 7) << 2); 73 regValue |= MII_BUSY | ((priv->clk_csr & 0xF) << 2);
74
75 if (stmmac_mdio_busy_wait(priv->ioaddr, mii_address))
76 return -EBUSY;
58 77
59 do {} while (((readl(priv->ioaddr + mii_address)) & MII_BUSY) == 1);
60 writel(regValue, priv->ioaddr + mii_address); 78 writel(regValue, priv->ioaddr + mii_address);
61 do {} while (((readl(priv->ioaddr + mii_address)) & MII_BUSY) == 1); 79
80 if (stmmac_mdio_busy_wait(priv->ioaddr, mii_address))
81 return -EBUSY;
62 82
63 /* Read the data from the MII data register */ 83 /* Read the data from the MII data register */
64 data = (int)readl(priv->ioaddr + mii_data); 84 data = (int)readl(priv->ioaddr + mii_data);
@@ -86,20 +106,18 @@ static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg,
86 (((phyaddr << 11) & (0x0000F800)) | ((phyreg << 6) & (0x000007C0))) 106 (((phyaddr << 11) & (0x0000F800)) | ((phyreg << 6) & (0x000007C0)))
87 | MII_WRITE; 107 | MII_WRITE;
88 108
89 value |= MII_BUSY | ((priv->plat->clk_csr & 7) << 2); 109 value |= MII_BUSY | ((priv->clk_csr & 0xF) << 2);
90
91 110
92 /* Wait until any existing MII operation is complete */ 111 /* Wait until any existing MII operation is complete */
93 do {} while (((readl(priv->ioaddr + mii_address)) & MII_BUSY) == 1); 112 if (stmmac_mdio_busy_wait(priv->ioaddr, mii_address))
113 return -EBUSY;
94 114
95 /* Set the MII address register to write */ 115 /* Set the MII address register to write */
96 writel(phydata, priv->ioaddr + mii_data); 116 writel(phydata, priv->ioaddr + mii_data);
97 writel(value, priv->ioaddr + mii_address); 117 writel(value, priv->ioaddr + mii_address);
98 118
99 /* Wait until any existing MII operation is complete */ 119 /* Wait until any existing MII operation is complete */
100 do {} while (((readl(priv->ioaddr + mii_address)) & MII_BUSY) == 1); 120 return stmmac_mdio_busy_wait(priv->ioaddr, mii_address);
101
102 return 0;
103} 121}
104 122
105/** 123/**
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c
index da66ed7c3c5d..65e0f98520d6 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c
@@ -35,7 +35,8 @@ static void stmmac_default_data(void)
35 plat_dat.bus_id = 1; 35 plat_dat.bus_id = 1;
36 plat_dat.phy_addr = 0; 36 plat_dat.phy_addr = 0;
37 plat_dat.interface = PHY_INTERFACE_MODE_GMII; 37 plat_dat.interface = PHY_INTERFACE_MODE_GMII;
38 plat_dat.pbl = 32; 38 plat_dat.dma_cfg->pbl = 32;
39 plat_dat.dma_cfg->burst_len = DMA_AXI_BLEN_256;
39 plat_dat.clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ 40 plat_dat.clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */
40 plat_dat.has_gmac = 1; 41 plat_dat.has_gmac = 1;
41 plat_dat.force_sf_dma_mode = 1; 42 plat_dat.force_sf_dma_mode = 1;
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 116529a366b2..12bd221561e5 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -50,7 +50,7 @@ static int __devinit stmmac_probe_config_dt(struct platform_device *pdev,
50 * once needed on other platforms. 50 * once needed on other platforms.
51 */ 51 */
52 if (of_device_is_compatible(np, "st,spear600-gmac")) { 52 if (of_device_is_compatible(np, "st,spear600-gmac")) {
53 plat->pbl = 8; 53 plat->dma_cfg->pbl = 8;
54 plat->has_gmac = 1; 54 plat->has_gmac = 1;
55 plat->pmt = 1; 55 plat->pmt = 1;
56 } 56 }
diff --git a/drivers/net/ethernet/sun/sungem.c b/drivers/net/ethernet/sun/sungem.c
index 558409ff4058..dfd4b1d13a51 100644
--- a/drivers/net/ethernet/sun/sungem.c
+++ b/drivers/net/ethernet/sun/sungem.c
@@ -2898,7 +2898,6 @@ static int __devinit gem_init_one(struct pci_dev *pdev,
2898 } 2898 }
2899 2899
2900 gp->pdev = pdev; 2900 gp->pdev = pdev;
2901 dev->base_addr = (long) pdev;
2902 gp->dev = dev; 2901 gp->dev = dev;
2903 2902
2904 gp->msg_enable = DEFAULT_MSG; 2903 gp->msg_enable = DEFAULT_MSG;
@@ -2972,7 +2971,6 @@ static int __devinit gem_init_one(struct pci_dev *pdev,
2972 netif_napi_add(dev, &gp->napi, gem_poll, 64); 2971 netif_napi_add(dev, &gp->napi, gem_poll, 64);
2973 dev->ethtool_ops = &gem_ethtool_ops; 2972 dev->ethtool_ops = &gem_ethtool_ops;
2974 dev->watchdog_timeo = 5 * HZ; 2973 dev->watchdog_timeo = 5 * HZ;
2975 dev->irq = pdev->irq;
2976 dev->dma = 0; 2974 dev->dma = 0;
2977 2975
2978 /* Set that now, in case PM kicks in now */ 2976 /* Set that now, in case PM kicks in now */
diff --git a/drivers/net/ethernet/sun/sunhme.c b/drivers/net/ethernet/sun/sunhme.c
index b95e7e681b38..dfc00c4683e5 100644
--- a/drivers/net/ethernet/sun/sunhme.c
+++ b/drivers/net/ethernet/sun/sunhme.c
@@ -2182,11 +2182,12 @@ static int happy_meal_open(struct net_device *dev)
2182 * into a single source which we register handling at probe time. 2182 * into a single source which we register handling at probe time.
2183 */ 2183 */
2184 if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO) { 2184 if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO) {
2185 if (request_irq(dev->irq, happy_meal_interrupt, 2185 res = request_irq(hp->irq, happy_meal_interrupt, IRQF_SHARED,
2186 IRQF_SHARED, dev->name, (void *)dev)) { 2186 dev->name, dev);
2187 if (res) {
2187 HMD(("EAGAIN\n")); 2188 HMD(("EAGAIN\n"));
2188 printk(KERN_ERR "happy_meal(SBUS): Can't order irq %d to go.\n", 2189 printk(KERN_ERR "happy_meal(SBUS): Can't order irq %d to go.\n",
2189 dev->irq); 2190 hp->irq);
2190 2191
2191 return -EAGAIN; 2192 return -EAGAIN;
2192 } 2193 }
@@ -2199,7 +2200,7 @@ static int happy_meal_open(struct net_device *dev)
2199 spin_unlock_irq(&hp->happy_lock); 2200 spin_unlock_irq(&hp->happy_lock);
2200 2201
2201 if (res && ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO)) 2202 if (res && ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO))
2202 free_irq(dev->irq, dev); 2203 free_irq(hp->irq, dev);
2203 return res; 2204 return res;
2204} 2205}
2205 2206
@@ -2221,7 +2222,7 @@ static int happy_meal_close(struct net_device *dev)
2221 * time and never unregister. 2222 * time and never unregister.
2222 */ 2223 */
2223 if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO) 2224 if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO)
2224 free_irq(dev->irq, dev); 2225 free_irq(hp->irq, dev);
2225 2226
2226 return 0; 2227 return 0;
2227} 2228}
@@ -2777,7 +2778,7 @@ static int __devinit happy_meal_sbus_probe_one(struct platform_device *op, int i
2777 dev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM; 2778 dev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM;
2778 dev->features |= dev->hw_features | NETIF_F_RXCSUM; 2779 dev->features |= dev->hw_features | NETIF_F_RXCSUM;
2779 2780
2780 dev->irq = op->archdata.irqs[0]; 2781 hp->irq = op->archdata.irqs[0];
2781 2782
2782#if defined(CONFIG_SBUS) && defined(CONFIG_PCI) 2783#if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
2783 /* Hook up SBUS register/descriptor accessors. */ 2784 /* Hook up SBUS register/descriptor accessors. */
@@ -2981,8 +2982,6 @@ static int __devinit happy_meal_pci_probe(struct pci_dev *pdev,
2981 if (hme_version_printed++ == 0) 2982 if (hme_version_printed++ == 0)
2982 printk(KERN_INFO "%s", version); 2983 printk(KERN_INFO "%s", version);
2983 2984
2984 dev->base_addr = (long) pdev;
2985
2986 hp = netdev_priv(dev); 2985 hp = netdev_priv(dev);
2987 2986
2988 hp->happy_dev = pdev; 2987 hp->happy_dev = pdev;
@@ -3087,12 +3086,11 @@ static int __devinit happy_meal_pci_probe(struct pci_dev *pdev,
3087 3086
3088 init_timer(&hp->happy_timer); 3087 init_timer(&hp->happy_timer);
3089 3088
3089 hp->irq = pdev->irq;
3090 hp->dev = dev; 3090 hp->dev = dev;
3091 dev->netdev_ops = &hme_netdev_ops; 3091 dev->netdev_ops = &hme_netdev_ops;
3092 dev->watchdog_timeo = 5*HZ; 3092 dev->watchdog_timeo = 5*HZ;
3093 dev->ethtool_ops = &hme_ethtool_ops; 3093 dev->ethtool_ops = &hme_ethtool_ops;
3094 dev->irq = pdev->irq;
3095 dev->dma = 0;
3096 3094
3097 /* Happy Meal can do it all... */ 3095 /* Happy Meal can do it all... */
3098 dev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM; 3096 dev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM;
diff --git a/drivers/net/ethernet/sun/sunhme.h b/drivers/net/ethernet/sun/sunhme.h
index 64f278360d89..f4307654e4ae 100644
--- a/drivers/net/ethernet/sun/sunhme.h
+++ b/drivers/net/ethernet/sun/sunhme.h
@@ -432,6 +432,7 @@ struct happy_meal {
432 432
433 dma_addr_t hblock_dvma; /* DVMA visible address happy block */ 433 dma_addr_t hblock_dvma; /* DVMA visible address happy block */
434 unsigned int happy_flags; /* Driver state flags */ 434 unsigned int happy_flags; /* Driver state flags */
435 int irq;
435 enum happy_transceiver tcvr_type; /* Kind of transceiver in use */ 436 enum happy_transceiver tcvr_type; /* Kind of transceiver in use */
436 unsigned int happy_bursts; /* Get your mind out of the gutter */ 437 unsigned int happy_bursts; /* Get your mind out of the gutter */
437 unsigned int paddr; /* PHY address for transceiver */ 438 unsigned int paddr; /* PHY address for transceiver */
diff --git a/drivers/net/ethernet/tehuti/tehuti.c b/drivers/net/ethernet/tehuti/tehuti.c
index ad973ffc9ff3..dc242e28dbb5 100644
--- a/drivers/net/ethernet/tehuti/tehuti.c
+++ b/drivers/net/ethernet/tehuti/tehuti.c
@@ -1988,10 +1988,6 @@ bdx_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1988 /* these fields are used for info purposes only 1988 /* these fields are used for info purposes only
1989 * so we can have them same for all ports of the board */ 1989 * so we can have them same for all ports of the board */
1990 ndev->if_port = port; 1990 ndev->if_port = port;
1991 ndev->base_addr = pciaddr;
1992 ndev->mem_start = pciaddr;
1993 ndev->mem_end = pciaddr + regionSize;
1994 ndev->irq = pdev->irq;
1995 ndev->features = NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_TSO 1991 ndev->features = NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_TSO
1996 | NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX | 1992 | NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX |
1997 NETIF_F_HW_VLAN_FILTER | NETIF_F_RXCSUM 1993 NETIF_F_HW_VLAN_FILTER | NETIF_F_RXCSUM
diff --git a/drivers/net/ethernet/ti/davinci_emac.c b/drivers/net/ethernet/ti/davinci_emac.c
index 174a3348f676..8aa33326bec3 100644
--- a/drivers/net/ethernet/ti/davinci_emac.c
+++ b/drivers/net/ethernet/ti/davinci_emac.c
@@ -627,6 +627,7 @@ static const struct ethtool_ops ethtool_ops = {
627 .get_link = ethtool_op_get_link, 627 .get_link = ethtool_op_get_link,
628 .get_coalesce = emac_get_coalesce, 628 .get_coalesce = emac_get_coalesce,
629 .set_coalesce = emac_set_coalesce, 629 .set_coalesce = emac_set_coalesce,
630 .get_ts_info = ethtool_op_get_ts_info,
630}; 631};
631 632
632/** 633/**
diff --git a/drivers/net/ethernet/via/via-rhine.c b/drivers/net/ethernet/via/via-rhine.c
index fcfa01f7ceb6..0459c096629f 100644
--- a/drivers/net/ethernet/via/via-rhine.c
+++ b/drivers/net/ethernet/via/via-rhine.c
@@ -689,9 +689,12 @@ static void __devinit rhine_reload_eeprom(long pioaddr, struct net_device *dev)
689#ifdef CONFIG_NET_POLL_CONTROLLER 689#ifdef CONFIG_NET_POLL_CONTROLLER
690static void rhine_poll(struct net_device *dev) 690static void rhine_poll(struct net_device *dev)
691{ 691{
692 disable_irq(dev->irq); 692 struct rhine_private *rp = netdev_priv(dev);
693 rhine_interrupt(dev->irq, (void *)dev); 693 const int irq = rp->pdev->irq;
694 enable_irq(dev->irq); 694
695 disable_irq(irq);
696 rhine_interrupt(irq, dev);
697 enable_irq(irq);
695} 698}
696#endif 699#endif
697 700
@@ -972,7 +975,6 @@ static int __devinit rhine_init_one(struct pci_dev *pdev,
972 } 975 }
973#endif /* USE_MMIO */ 976#endif /* USE_MMIO */
974 977
975 dev->base_addr = (unsigned long)ioaddr;
976 rp->base = ioaddr; 978 rp->base = ioaddr;
977 979
978 /* Get chip registers into a sane state */ 980 /* Get chip registers into a sane state */
@@ -995,8 +997,6 @@ static int __devinit rhine_init_one(struct pci_dev *pdev,
995 if (!phy_id) 997 if (!phy_id)
996 phy_id = ioread8(ioaddr + 0x6C); 998 phy_id = ioread8(ioaddr + 0x6C);
997 999
998 dev->irq = pdev->irq;
999
1000 spin_lock_init(&rp->lock); 1000 spin_lock_init(&rp->lock);
1001 mutex_init(&rp->task_lock); 1001 mutex_init(&rp->task_lock);
1002 INIT_WORK(&rp->reset_task, rhine_reset_task); 1002 INIT_WORK(&rp->reset_task, rhine_reset_task);
diff --git a/drivers/net/ethernet/via/via-velocity.c b/drivers/net/ethernet/via/via-velocity.c
index 8a5d7c100a5e..ea3e0a21ba74 100644
--- a/drivers/net/ethernet/via/via-velocity.c
+++ b/drivers/net/ethernet/via/via-velocity.c
@@ -2488,8 +2488,8 @@ static int velocity_close(struct net_device *dev)
2488 2488
2489 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED) 2489 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED)
2490 velocity_get_ip(vptr); 2490 velocity_get_ip(vptr);
2491 if (dev->irq != 0) 2491
2492 free_irq(dev->irq, dev); 2492 free_irq(vptr->pdev->irq, dev);
2493 2493
2494 velocity_free_rings(vptr); 2494 velocity_free_rings(vptr);
2495 2495
@@ -2755,8 +2755,6 @@ static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_devi
2755 if (ret < 0) 2755 if (ret < 0)
2756 goto err_free_dev; 2756 goto err_free_dev;
2757 2757
2758 dev->irq = pdev->irq;
2759
2760 ret = velocity_get_pci_info(vptr, pdev); 2758 ret = velocity_get_pci_info(vptr, pdev);
2761 if (ret < 0) { 2759 if (ret < 0) {
2762 /* error message already printed */ 2760 /* error message already printed */
@@ -2779,8 +2777,6 @@ static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_devi
2779 2777
2780 mac_wol_reset(regs); 2778 mac_wol_reset(regs);
2781 2779
2782 dev->base_addr = vptr->ioaddr;
2783
2784 for (i = 0; i < 6; i++) 2780 for (i = 0; i < 6; i++)
2785 dev->dev_addr[i] = readb(&regs->PAR[i]); 2781 dev->dev_addr[i] = readb(&regs->PAR[i]);
2786 2782
@@ -2806,7 +2802,6 @@ static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_devi
2806 2802
2807 vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs); 2803 vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs);
2808 2804
2809 dev->irq = pdev->irq;
2810 dev->netdev_ops = &velocity_netdev_ops; 2805 dev->netdev_ops = &velocity_netdev_ops;
2811 dev->ethtool_ops = &velocity_ethtool_ops; 2806 dev->ethtool_ops = &velocity_ethtool_ops;
2812 netif_napi_add(dev, &vptr->napi, velocity_poll, VELOCITY_NAPI_WEIGHT); 2807 netif_napi_add(dev, &vptr->napi, velocity_poll, VELOCITY_NAPI_WEIGHT);
diff --git a/drivers/net/ethernet/wiznet/Kconfig b/drivers/net/ethernet/wiznet/Kconfig
new file mode 100644
index 000000000000..c8291bf905a7
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/Kconfig
@@ -0,0 +1,81 @@
1#
2# WIZnet devices configuration
3#
4
5config NET_VENDOR_WIZNET
6 bool "WIZnet devices"
7 default y
8 ---help---
9 If you have a network (Ethernet) card belonging to this class, say Y
10 and read the Ethernet-HOWTO, available from
11 <http://www.tldp.org/docs.html#howto>.
12
13 Note that the answer to this question doesn't directly affect the
14 kernel: saying N will just cause the configurator to skip all
15 the questions about WIZnet devices. If you say Y, you will be asked
16 for your specific card in the following questions.
17
18if NET_VENDOR_WIZNET
19
20config WIZNET_W5100
21 tristate "WIZnet W5100 Ethernet support"
22 depends on HAS_IOMEM
23 ---help---
24 Support for WIZnet W5100 chips.
25
26 W5100 is a single chip with integrated 10/100 Ethernet MAC,
27 PHY and hardware TCP/IP stack, but this driver is limited to
28 the MAC and PHY functions only, onchip TCP/IP is unused.
29
30 To compile this driver as a module, choose M here: the module
31 will be called w5100.
32
33config WIZNET_W5300
34 tristate "WIZnet W5300 Ethernet support"
35 depends on HAS_IOMEM
36 ---help---
37 Support for WIZnet W5300 chips.
38
39 W5300 is a single chip with integrated 10/100 Ethernet MAC,
40 PHY and hardware TCP/IP stack, but this driver is limited to
41 the MAC and PHY functions only, onchip TCP/IP is unused.
42
43 To compile this driver as a module, choose M here: the module
44 will be called w5300.
45
46choice
47 prompt "WIZnet interface mode"
48 depends on WIZNET_W5100 || WIZNET_W5300
49 default WIZNET_BUS_ANY
50
51config WIZNET_BUS_DIRECT
52 bool "Direct address bus mode"
53 ---help---
54 In direct address mode host system can directly access all registers
55 after mapping to Memory-Mapped I/O space.
56
57config WIZNET_BUS_INDIRECT
58 bool "Indirect address bus mode"
59 ---help---
60 In indirect address mode host system indirectly accesses registers
61 using Indirect Mode Address Register and Indirect Mode Data Register,
62 which are directly mapped to Memory-Mapped I/O space.
63
64config WIZNET_BUS_ANY
65 bool "Select interface mode in runtime"
66 ---help---
67 If interface mode is unknown in compile time, it can be selected
68 in runtime from board/platform resources configuration.
69
70 Performance may decrease compared to explicitly selected bus mode.
71endchoice
72
73config WIZNET_TX_FLOW
74 bool "Use transmit flow control"
75 depends on WIZNET_W5100 || WIZNET_W5300
76 default y
77 help
78 This enables transmit flow control for WIZnet chips.
79 If unsure, say Y.
80
81endif # NET_VENDOR_WIZNET
diff --git a/drivers/net/ethernet/wiznet/Makefile b/drivers/net/ethernet/wiznet/Makefile
new file mode 100644
index 000000000000..c614535227e8
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/Makefile
@@ -0,0 +1,2 @@
1obj-$(CONFIG_WIZNET_W5100) += w5100.o
2obj-$(CONFIG_WIZNET_W5300) += w5300.o
diff --git a/drivers/net/ethernet/wiznet/w5100.c b/drivers/net/ethernet/wiznet/w5100.c
new file mode 100644
index 000000000000..c28e1d57b02d
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/w5100.c
@@ -0,0 +1,808 @@
1/*
2 * Ethernet driver for the WIZnet W5100 chip.
3 *
4 * Copyright (C) 2006-2008 WIZnet Co.,Ltd.
5 * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru>
6 *
7 * Licensed under the GPL-2 or later.
8 */
9
10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/kconfig.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/platform_device.h>
16#include <linux/platform_data/wiznet.h>
17#include <linux/ethtool.h>
18#include <linux/skbuff.h>
19#include <linux/types.h>
20#include <linux/errno.h>
21#include <linux/delay.h>
22#include <linux/slab.h>
23#include <linux/spinlock.h>
24#include <linux/io.h>
25#include <linux/ioport.h>
26#include <linux/interrupt.h>
27#include <linux/gpio.h>
28
29#define DRV_NAME "w5100"
30#define DRV_VERSION "2012-04-04"
31
32MODULE_DESCRIPTION("WIZnet W5100 Ethernet driver v"DRV_VERSION);
33MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>");
34MODULE_ALIAS("platform:"DRV_NAME);
35MODULE_LICENSE("GPL");
36
37/*
38 * Registers
39 */
40#define W5100_COMMON_REGS 0x0000
41#define W5100_MR 0x0000 /* Mode Register */
42#define MR_RST 0x80 /* S/W reset */
43#define MR_PB 0x10 /* Ping block */
44#define MR_AI 0x02 /* Address Auto-Increment */
45#define MR_IND 0x01 /* Indirect mode */
46#define W5100_SHAR 0x0009 /* Source MAC address */
47#define W5100_IR 0x0015 /* Interrupt Register */
48#define W5100_IMR 0x0016 /* Interrupt Mask Register */
49#define IR_S0 0x01 /* S0 interrupt */
50#define W5100_RTR 0x0017 /* Retry Time-value Register */
51#define RTR_DEFAULT 2000 /* =0x07d0 (2000) */
52#define W5100_RMSR 0x001a /* Receive Memory Size */
53#define W5100_TMSR 0x001b /* Transmit Memory Size */
54#define W5100_COMMON_REGS_LEN 0x0040
55
56#define W5100_S0_REGS 0x0400
57#define W5100_S0_MR 0x0400 /* S0 Mode Register */
58#define S0_MR_MACRAW 0x04 /* MAC RAW mode (promiscous) */
59#define S0_MR_MACRAW_MF 0x44 /* MAC RAW mode (filtered) */
60#define W5100_S0_CR 0x0401 /* S0 Command Register */
61#define S0_CR_OPEN 0x01 /* OPEN command */
62#define S0_CR_CLOSE 0x10 /* CLOSE command */
63#define S0_CR_SEND 0x20 /* SEND command */
64#define S0_CR_RECV 0x40 /* RECV command */
65#define W5100_S0_IR 0x0402 /* S0 Interrupt Register */
66#define S0_IR_SENDOK 0x10 /* complete sending */
67#define S0_IR_RECV 0x04 /* receiving data */
68#define W5100_S0_SR 0x0403 /* S0 Status Register */
69#define S0_SR_MACRAW 0x42 /* mac raw mode */
70#define W5100_S0_TX_FSR 0x0420 /* S0 Transmit free memory size */
71#define W5100_S0_TX_RD 0x0422 /* S0 Transmit memory read pointer */
72#define W5100_S0_TX_WR 0x0424 /* S0 Transmit memory write pointer */
73#define W5100_S0_RX_RSR 0x0426 /* S0 Receive free memory size */
74#define W5100_S0_RX_RD 0x0428 /* S0 Receive memory read pointer */
75#define W5100_S0_REGS_LEN 0x0040
76
77#define W5100_TX_MEM_START 0x4000
78#define W5100_TX_MEM_END 0x5fff
79#define W5100_TX_MEM_MASK 0x1fff
80#define W5100_RX_MEM_START 0x6000
81#define W5100_RX_MEM_END 0x7fff
82#define W5100_RX_MEM_MASK 0x1fff
83
84/*
85 * Device driver private data structure
86 */
87struct w5100_priv {
88 void __iomem *base;
89 spinlock_t reg_lock;
90 bool indirect;
91 u8 (*read)(struct w5100_priv *priv, u16 addr);
92 void (*write)(struct w5100_priv *priv, u16 addr, u8 data);
93 u16 (*read16)(struct w5100_priv *priv, u16 addr);
94 void (*write16)(struct w5100_priv *priv, u16 addr, u16 data);
95 void (*readbuf)(struct w5100_priv *priv, u16 addr, u8 *buf, int len);
96 void (*writebuf)(struct w5100_priv *priv, u16 addr, u8 *buf, int len);
97 int irq;
98 int link_irq;
99 int link_gpio;
100
101 struct napi_struct napi;
102 struct net_device *ndev;
103 bool promisc;
104 u32 msg_enable;
105};
106
107/************************************************************************
108 *
109 * Lowlevel I/O functions
110 *
111 ***********************************************************************/
112
113/*
114 * In direct address mode host system can directly access W5100 registers
115 * after mapping to Memory-Mapped I/O space.
116 *
117 * 0x8000 bytes are required for memory space.
118 */
119static inline u8 w5100_read_direct(struct w5100_priv *priv, u16 addr)
120{
121 return ioread8(priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
122}
123
124static inline void w5100_write_direct(struct w5100_priv *priv,
125 u16 addr, u8 data)
126{
127 iowrite8(data, priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
128}
129
130static u16 w5100_read16_direct(struct w5100_priv *priv, u16 addr)
131{
132 u16 data;
133 data = w5100_read_direct(priv, addr) << 8;
134 data |= w5100_read_direct(priv, addr + 1);
135 return data;
136}
137
138static void w5100_write16_direct(struct w5100_priv *priv, u16 addr, u16 data)
139{
140 w5100_write_direct(priv, addr, data >> 8);
141 w5100_write_direct(priv, addr + 1, data);
142}
143
144static void w5100_readbuf_direct(struct w5100_priv *priv,
145 u16 offset, u8 *buf, int len)
146{
147 u16 addr = W5100_RX_MEM_START + (offset & W5100_RX_MEM_MASK);
148 int i;
149
150 for (i = 0; i < len; i++, addr++) {
151 if (unlikely(addr > W5100_RX_MEM_END))
152 addr = W5100_RX_MEM_START;
153 *buf++ = w5100_read_direct(priv, addr);
154 }
155}
156
157static void w5100_writebuf_direct(struct w5100_priv *priv,
158 u16 offset, u8 *buf, int len)
159{
160 u16 addr = W5100_TX_MEM_START + (offset & W5100_TX_MEM_MASK);
161 int i;
162
163 for (i = 0; i < len; i++, addr++) {
164 if (unlikely(addr > W5100_TX_MEM_END))
165 addr = W5100_TX_MEM_START;
166 w5100_write_direct(priv, addr, *buf++);
167 }
168}
169
170/*
171 * In indirect address mode host system indirectly accesses registers by
172 * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
173 * Register (IDM_DR), which are directly mapped to Memory-Mapped I/O space.
174 * Mode Register (MR) is directly accessible.
175 *
176 * Only 0x04 bytes are required for memory space.
177 */
178#define W5100_IDM_AR 0x01 /* Indirect Mode Address Register */
179#define W5100_IDM_DR 0x03 /* Indirect Mode Data Register */
180
181static u8 w5100_read_indirect(struct w5100_priv *priv, u16 addr)
182{
183 unsigned long flags;
184 u8 data;
185
186 spin_lock_irqsave(&priv->reg_lock, flags);
187 w5100_write16_direct(priv, W5100_IDM_AR, addr);
188 mmiowb();
189 data = w5100_read_direct(priv, W5100_IDM_DR);
190 spin_unlock_irqrestore(&priv->reg_lock, flags);
191
192 return data;
193}
194
195static void w5100_write_indirect(struct w5100_priv *priv, u16 addr, u8 data)
196{
197 unsigned long flags;
198
199 spin_lock_irqsave(&priv->reg_lock, flags);
200 w5100_write16_direct(priv, W5100_IDM_AR, addr);
201 mmiowb();
202 w5100_write_direct(priv, W5100_IDM_DR, data);
203 mmiowb();
204 spin_unlock_irqrestore(&priv->reg_lock, flags);
205}
206
207static u16 w5100_read16_indirect(struct w5100_priv *priv, u16 addr)
208{
209 unsigned long flags;
210 u16 data;
211
212 spin_lock_irqsave(&priv->reg_lock, flags);
213 w5100_write16_direct(priv, W5100_IDM_AR, addr);
214 mmiowb();
215 data = w5100_read_direct(priv, W5100_IDM_DR) << 8;
216 data |= w5100_read_direct(priv, W5100_IDM_DR);
217 spin_unlock_irqrestore(&priv->reg_lock, flags);
218
219 return data;
220}
221
222static void w5100_write16_indirect(struct w5100_priv *priv, u16 addr, u16 data)
223{
224 unsigned long flags;
225
226 spin_lock_irqsave(&priv->reg_lock, flags);
227 w5100_write16_direct(priv, W5100_IDM_AR, addr);
228 mmiowb();
229 w5100_write_direct(priv, W5100_IDM_DR, data >> 8);
230 w5100_write_direct(priv, W5100_IDM_DR, data);
231 mmiowb();
232 spin_unlock_irqrestore(&priv->reg_lock, flags);
233}
234
235static void w5100_readbuf_indirect(struct w5100_priv *priv,
236 u16 offset, u8 *buf, int len)
237{
238 u16 addr = W5100_RX_MEM_START + (offset & W5100_RX_MEM_MASK);
239 unsigned long flags;
240 int i;
241
242 spin_lock_irqsave(&priv->reg_lock, flags);
243 w5100_write16_direct(priv, W5100_IDM_AR, addr);
244 mmiowb();
245
246 for (i = 0; i < len; i++, addr++) {
247 if (unlikely(addr > W5100_RX_MEM_END)) {
248 addr = W5100_RX_MEM_START;
249 w5100_write16_direct(priv, W5100_IDM_AR, addr);
250 mmiowb();
251 }
252 *buf++ = w5100_read_direct(priv, W5100_IDM_DR);
253 }
254 mmiowb();
255 spin_unlock_irqrestore(&priv->reg_lock, flags);
256}
257
258static void w5100_writebuf_indirect(struct w5100_priv *priv,
259 u16 offset, u8 *buf, int len)
260{
261 u16 addr = W5100_TX_MEM_START + (offset & W5100_TX_MEM_MASK);
262 unsigned long flags;
263 int i;
264
265 spin_lock_irqsave(&priv->reg_lock, flags);
266 w5100_write16_direct(priv, W5100_IDM_AR, addr);
267 mmiowb();
268
269 for (i = 0; i < len; i++, addr++) {
270 if (unlikely(addr > W5100_TX_MEM_END)) {
271 addr = W5100_TX_MEM_START;
272 w5100_write16_direct(priv, W5100_IDM_AR, addr);
273 mmiowb();
274 }
275 w5100_write_direct(priv, W5100_IDM_DR, *buf++);
276 }
277 mmiowb();
278 spin_unlock_irqrestore(&priv->reg_lock, flags);
279}
280
281#if defined(CONFIG_WIZNET_BUS_DIRECT)
282#define w5100_read w5100_read_direct
283#define w5100_write w5100_write_direct
284#define w5100_read16 w5100_read16_direct
285#define w5100_write16 w5100_write16_direct
286#define w5100_readbuf w5100_readbuf_direct
287#define w5100_writebuf w5100_writebuf_direct
288
289#elif defined(CONFIG_WIZNET_BUS_INDIRECT)
290#define w5100_read w5100_read_indirect
291#define w5100_write w5100_write_indirect
292#define w5100_read16 w5100_read16_indirect
293#define w5100_write16 w5100_write16_indirect
294#define w5100_readbuf w5100_readbuf_indirect
295#define w5100_writebuf w5100_writebuf_indirect
296
297#else /* CONFIG_WIZNET_BUS_ANY */
298#define w5100_read priv->read
299#define w5100_write priv->write
300#define w5100_read16 priv->read16
301#define w5100_write16 priv->write16
302#define w5100_readbuf priv->readbuf
303#define w5100_writebuf priv->writebuf
304#endif
305
306static int w5100_command(struct w5100_priv *priv, u16 cmd)
307{
308 unsigned long timeout = jiffies + msecs_to_jiffies(100);
309
310 w5100_write(priv, W5100_S0_CR, cmd);
311 mmiowb();
312
313 while (w5100_read(priv, W5100_S0_CR) != 0) {
314 if (time_after(jiffies, timeout))
315 return -EIO;
316 cpu_relax();
317 }
318
319 return 0;
320}
321
322static void w5100_write_macaddr(struct w5100_priv *priv)
323{
324 struct net_device *ndev = priv->ndev;
325 int i;
326
327 for (i = 0; i < ETH_ALEN; i++)
328 w5100_write(priv, W5100_SHAR + i, ndev->dev_addr[i]);
329 mmiowb();
330}
331
332static void w5100_hw_reset(struct w5100_priv *priv)
333{
334 w5100_write_direct(priv, W5100_MR, MR_RST);
335 mmiowb();
336 mdelay(5);
337 w5100_write_direct(priv, W5100_MR, priv->indirect ?
338 MR_PB | MR_AI | MR_IND :
339 MR_PB);
340 mmiowb();
341 w5100_write(priv, W5100_IMR, 0);
342 w5100_write_macaddr(priv);
343
344 /* Configure 16K of internal memory
345 * as 8K RX buffer and 8K TX buffer
346 */
347 w5100_write(priv, W5100_RMSR, 0x03);
348 w5100_write(priv, W5100_TMSR, 0x03);
349 mmiowb();
350}
351
352static void w5100_hw_start(struct w5100_priv *priv)
353{
354 w5100_write(priv, W5100_S0_MR, priv->promisc ?
355 S0_MR_MACRAW : S0_MR_MACRAW_MF);
356 mmiowb();
357 w5100_command(priv, S0_CR_OPEN);
358 w5100_write(priv, W5100_IMR, IR_S0);
359 mmiowb();
360}
361
362static void w5100_hw_close(struct w5100_priv *priv)
363{
364 w5100_write(priv, W5100_IMR, 0);
365 mmiowb();
366 w5100_command(priv, S0_CR_CLOSE);
367}
368
369/***********************************************************************
370 *
371 * Device driver functions / callbacks
372 *
373 ***********************************************************************/
374
375static void w5100_get_drvinfo(struct net_device *ndev,
376 struct ethtool_drvinfo *info)
377{
378 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
379 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
380 strlcpy(info->bus_info, dev_name(ndev->dev.parent),
381 sizeof(info->bus_info));
382}
383
384static u32 w5100_get_link(struct net_device *ndev)
385{
386 struct w5100_priv *priv = netdev_priv(ndev);
387
388 if (gpio_is_valid(priv->link_gpio))
389 return !!gpio_get_value(priv->link_gpio);
390
391 return 1;
392}
393
394static u32 w5100_get_msglevel(struct net_device *ndev)
395{
396 struct w5100_priv *priv = netdev_priv(ndev);
397
398 return priv->msg_enable;
399}
400
401static void w5100_set_msglevel(struct net_device *ndev, u32 value)
402{
403 struct w5100_priv *priv = netdev_priv(ndev);
404
405 priv->msg_enable = value;
406}
407
408static int w5100_get_regs_len(struct net_device *ndev)
409{
410 return W5100_COMMON_REGS_LEN + W5100_S0_REGS_LEN;
411}
412
413static void w5100_get_regs(struct net_device *ndev,
414 struct ethtool_regs *regs, void *_buf)
415{
416 struct w5100_priv *priv = netdev_priv(ndev);
417 u8 *buf = _buf;
418 u16 i;
419
420 regs->version = 1;
421 for (i = 0; i < W5100_COMMON_REGS_LEN; i++)
422 *buf++ = w5100_read(priv, W5100_COMMON_REGS + i);
423 for (i = 0; i < W5100_S0_REGS_LEN; i++)
424 *buf++ = w5100_read(priv, W5100_S0_REGS + i);
425}
426
427static void w5100_tx_timeout(struct net_device *ndev)
428{
429 struct w5100_priv *priv = netdev_priv(ndev);
430
431 netif_stop_queue(ndev);
432 w5100_hw_reset(priv);
433 w5100_hw_start(priv);
434 ndev->stats.tx_errors++;
435 ndev->trans_start = jiffies;
436 netif_wake_queue(ndev);
437}
438
439static int w5100_start_tx(struct sk_buff *skb, struct net_device *ndev)
440{
441 struct w5100_priv *priv = netdev_priv(ndev);
442 u16 offset;
443
444 if (IS_ENABLED(CONFIG_WIZNET_TX_FLOW))
445 netif_stop_queue(ndev);
446
447 offset = w5100_read16(priv, W5100_S0_TX_WR);
448 w5100_writebuf(priv, offset, skb->data, skb->len);
449 w5100_write16(priv, W5100_S0_TX_WR, offset + skb->len);
450 mmiowb();
451 ndev->stats.tx_bytes += skb->len;
452 ndev->stats.tx_packets++;
453 dev_kfree_skb(skb);
454
455 w5100_command(priv, S0_CR_SEND);
456
457 return NETDEV_TX_OK;
458}
459
460static int w5100_napi_poll(struct napi_struct *napi, int budget)
461{
462 struct w5100_priv *priv = container_of(napi, struct w5100_priv, napi);
463 struct net_device *ndev = priv->ndev;
464 struct sk_buff *skb;
465 int rx_count;
466 u16 rx_len;
467 u16 offset;
468 u8 header[2];
469
470 for (rx_count = 0; rx_count < budget; rx_count++) {
471 u16 rx_buf_len = w5100_read16(priv, W5100_S0_RX_RSR);
472 if (rx_buf_len == 0)
473 break;
474
475 offset = w5100_read16(priv, W5100_S0_RX_RD);
476 w5100_readbuf(priv, offset, header, 2);
477 rx_len = get_unaligned_be16(header) - 2;
478
479 skb = netdev_alloc_skb_ip_align(ndev, rx_len);
480 if (unlikely(!skb)) {
481 w5100_write16(priv, W5100_S0_RX_RD,
482 offset + rx_buf_len);
483 w5100_command(priv, S0_CR_RECV);
484 ndev->stats.rx_dropped++;
485 return -ENOMEM;
486 }
487
488 skb_put(skb, rx_len);
489 w5100_readbuf(priv, offset + 2, skb->data, rx_len);
490 w5100_write16(priv, W5100_S0_RX_RD, offset + 2 + rx_len);
491 mmiowb();
492 w5100_command(priv, S0_CR_RECV);
493 skb->protocol = eth_type_trans(skb, ndev);
494
495 netif_receive_skb(skb);
496 ndev->stats.rx_packets++;
497 ndev->stats.rx_bytes += rx_len;
498 }
499
500 if (rx_count < budget) {
501 w5100_write(priv, W5100_IMR, IR_S0);
502 mmiowb();
503 napi_complete(napi);
504 }
505
506 return rx_count;
507}
508
509static irqreturn_t w5100_interrupt(int irq, void *ndev_instance)
510{
511 struct net_device *ndev = ndev_instance;
512 struct w5100_priv *priv = netdev_priv(ndev);
513
514 int ir = w5100_read(priv, W5100_S0_IR);
515 if (!ir)
516 return IRQ_NONE;
517 w5100_write(priv, W5100_S0_IR, ir);
518 mmiowb();
519
520 if (IS_ENABLED(CONFIG_WIZNET_TX_FLOW) && (ir & S0_IR_SENDOK)) {
521 netif_dbg(priv, tx_done, ndev, "tx done\n");
522 netif_wake_queue(ndev);
523 }
524
525 if (ir & S0_IR_RECV) {
526 if (napi_schedule_prep(&priv->napi)) {
527 w5100_write(priv, W5100_IMR, 0);
528 mmiowb();
529 __napi_schedule(&priv->napi);
530 }
531 }
532
533 return IRQ_HANDLED;
534}
535
536static irqreturn_t w5100_detect_link(int irq, void *ndev_instance)
537{
538 struct net_device *ndev = ndev_instance;
539 struct w5100_priv *priv = netdev_priv(ndev);
540
541 if (netif_running(ndev)) {
542 if (gpio_get_value(priv->link_gpio) != 0) {
543 netif_info(priv, link, ndev, "link is up\n");
544 netif_carrier_on(ndev);
545 } else {
546 netif_info(priv, link, ndev, "link is down\n");
547 netif_carrier_off(ndev);
548 }
549 }
550
551 return IRQ_HANDLED;
552}
553
554static void w5100_set_rx_mode(struct net_device *ndev)
555{
556 struct w5100_priv *priv = netdev_priv(ndev);
557 bool set_promisc = (ndev->flags & IFF_PROMISC) != 0;
558
559 if (priv->promisc != set_promisc) {
560 priv->promisc = set_promisc;
561 w5100_hw_start(priv);
562 }
563}
564
565static int w5100_set_macaddr(struct net_device *ndev, void *addr)
566{
567 struct w5100_priv *priv = netdev_priv(ndev);
568 struct sockaddr *sock_addr = addr;
569
570 if (!is_valid_ether_addr(sock_addr->sa_data))
571 return -EADDRNOTAVAIL;
572 memcpy(ndev->dev_addr, sock_addr->sa_data, ETH_ALEN);
573 ndev->addr_assign_type &= ~NET_ADDR_RANDOM;
574 w5100_write_macaddr(priv);
575 return 0;
576}
577
578static int w5100_open(struct net_device *ndev)
579{
580 struct w5100_priv *priv = netdev_priv(ndev);
581
582 netif_info(priv, ifup, ndev, "enabling\n");
583 if (!is_valid_ether_addr(ndev->dev_addr))
584 return -EINVAL;
585 w5100_hw_start(priv);
586 napi_enable(&priv->napi);
587 netif_start_queue(ndev);
588 if (!gpio_is_valid(priv->link_gpio) ||
589 gpio_get_value(priv->link_gpio) != 0)
590 netif_carrier_on(ndev);
591 return 0;
592}
593
594static int w5100_stop(struct net_device *ndev)
595{
596 struct w5100_priv *priv = netdev_priv(ndev);
597
598 netif_info(priv, ifdown, ndev, "shutting down\n");
599 w5100_hw_close(priv);
600 netif_carrier_off(ndev);
601 netif_stop_queue(ndev);
602 napi_disable(&priv->napi);
603 return 0;
604}
605
606static const struct ethtool_ops w5100_ethtool_ops = {
607 .get_drvinfo = w5100_get_drvinfo,
608 .get_msglevel = w5100_get_msglevel,
609 .set_msglevel = w5100_set_msglevel,
610 .get_link = w5100_get_link,
611 .get_regs_len = w5100_get_regs_len,
612 .get_regs = w5100_get_regs,
613};
614
615static const struct net_device_ops w5100_netdev_ops = {
616 .ndo_open = w5100_open,
617 .ndo_stop = w5100_stop,
618 .ndo_start_xmit = w5100_start_tx,
619 .ndo_tx_timeout = w5100_tx_timeout,
620 .ndo_set_rx_mode = w5100_set_rx_mode,
621 .ndo_set_mac_address = w5100_set_macaddr,
622 .ndo_validate_addr = eth_validate_addr,
623 .ndo_change_mtu = eth_change_mtu,
624};
625
626static int __devinit w5100_hw_probe(struct platform_device *pdev)
627{
628 struct wiznet_platform_data *data = pdev->dev.platform_data;
629 struct net_device *ndev = platform_get_drvdata(pdev);
630 struct w5100_priv *priv = netdev_priv(ndev);
631 const char *name = netdev_name(ndev);
632 struct resource *mem;
633 int mem_size;
634 int irq;
635 int ret;
636
637 if (data && is_valid_ether_addr(data->mac_addr)) {
638 memcpy(ndev->dev_addr, data->mac_addr, ETH_ALEN);
639 } else {
640 random_ether_addr(ndev->dev_addr);
641 ndev->addr_assign_type |= NET_ADDR_RANDOM;
642 }
643
644 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
645 if (!mem)
646 return -ENXIO;
647 mem_size = resource_size(mem);
648 if (!devm_request_mem_region(&pdev->dev, mem->start, mem_size, name))
649 return -EBUSY;
650 priv->base = devm_ioremap(&pdev->dev, mem->start, mem_size);
651 if (!priv->base)
652 return -EBUSY;
653
654 spin_lock_init(&priv->reg_lock);
655 priv->indirect = mem_size < W5100_BUS_DIRECT_SIZE;
656 if (priv->indirect) {
657 priv->read = w5100_read_indirect;
658 priv->write = w5100_write_indirect;
659 priv->read16 = w5100_read16_indirect;
660 priv->write16 = w5100_write16_indirect;
661 priv->readbuf = w5100_readbuf_indirect;
662 priv->writebuf = w5100_writebuf_indirect;
663 } else {
664 priv->read = w5100_read_direct;
665 priv->write = w5100_write_direct;
666 priv->read16 = w5100_read16_direct;
667 priv->write16 = w5100_write16_direct;
668 priv->readbuf = w5100_readbuf_direct;
669 priv->writebuf = w5100_writebuf_direct;
670 }
671
672 w5100_hw_reset(priv);
673 if (w5100_read16(priv, W5100_RTR) != RTR_DEFAULT)
674 return -ENODEV;
675
676 irq = platform_get_irq(pdev, 0);
677 if (irq < 0)
678 return irq;
679 ret = request_irq(irq, w5100_interrupt,
680 IRQ_TYPE_LEVEL_LOW, name, ndev);
681 if (ret < 0)
682 return ret;
683 priv->irq = irq;
684
685 priv->link_gpio = data->link_gpio;
686 if (gpio_is_valid(priv->link_gpio)) {
687 char *link_name = devm_kzalloc(&pdev->dev, 16, GFP_KERNEL);
688 if (!link_name)
689 return -ENOMEM;
690 snprintf(link_name, 16, "%s-link", name);
691 priv->link_irq = gpio_to_irq(priv->link_gpio);
692 if (request_any_context_irq(priv->link_irq, w5100_detect_link,
693 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
694 link_name, priv->ndev) < 0)
695 priv->link_gpio = -EINVAL;
696 }
697
698 netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem->start, irq);
699 return 0;
700}
701
702static int __devinit w5100_probe(struct platform_device *pdev)
703{
704 struct w5100_priv *priv;
705 struct net_device *ndev;
706 int err;
707
708 ndev = alloc_etherdev(sizeof(*priv));
709 if (!ndev)
710 return -ENOMEM;
711 SET_NETDEV_DEV(ndev, &pdev->dev);
712 platform_set_drvdata(pdev, ndev);
713 priv = netdev_priv(ndev);
714 priv->ndev = ndev;
715
716 ether_setup(ndev);
717 ndev->netdev_ops = &w5100_netdev_ops;
718 ndev->ethtool_ops = &w5100_ethtool_ops;
719 ndev->watchdog_timeo = HZ;
720 netif_napi_add(ndev, &priv->napi, w5100_napi_poll, 16);
721
722 /* This chip doesn't support VLAN packets with normal MTU,
723 * so disable VLAN for this device.
724 */
725 ndev->features |= NETIF_F_VLAN_CHALLENGED;
726
727 err = register_netdev(ndev);
728 if (err < 0)
729 goto err_register;
730
731 err = w5100_hw_probe(pdev);
732 if (err < 0)
733 goto err_hw_probe;
734
735 return 0;
736
737err_hw_probe:
738 unregister_netdev(ndev);
739err_register:
740 free_netdev(ndev);
741 platform_set_drvdata(pdev, NULL);
742 return err;
743}
744
745static int __devexit w5100_remove(struct platform_device *pdev)
746{
747 struct net_device *ndev = platform_get_drvdata(pdev);
748 struct w5100_priv *priv = netdev_priv(ndev);
749
750 w5100_hw_reset(priv);
751 free_irq(priv->irq, ndev);
752 if (gpio_is_valid(priv->link_gpio))
753 free_irq(priv->link_irq, ndev);
754
755 unregister_netdev(ndev);
756 free_netdev(ndev);
757 platform_set_drvdata(pdev, NULL);
758 return 0;
759}
760
761#ifdef CONFIG_PM
762static int w5100_suspend(struct device *dev)
763{
764 struct platform_device *pdev = to_platform_device(dev);
765 struct net_device *ndev = platform_get_drvdata(pdev);
766 struct w5100_priv *priv = netdev_priv(ndev);
767
768 if (netif_running(ndev)) {
769 netif_carrier_off(ndev);
770 netif_device_detach(ndev);
771
772 w5100_hw_close(priv);
773 }
774 return 0;
775}
776
777static int w5100_resume(struct device *dev)
778{
779 struct platform_device *pdev = to_platform_device(dev);
780 struct net_device *ndev = platform_get_drvdata(pdev);
781 struct w5100_priv *priv = netdev_priv(ndev);
782
783 if (netif_running(ndev)) {
784 w5100_hw_reset(priv);
785 w5100_hw_start(priv);
786
787 netif_device_attach(ndev);
788 if (!gpio_is_valid(priv->link_gpio) ||
789 gpio_get_value(priv->link_gpio) != 0)
790 netif_carrier_on(ndev);
791 }
792 return 0;
793}
794#endif /* CONFIG_PM */
795
796static SIMPLE_DEV_PM_OPS(w5100_pm_ops, w5100_suspend, w5100_resume);
797
798static struct platform_driver w5100_driver = {
799 .driver = {
800 .name = DRV_NAME,
801 .owner = THIS_MODULE,
802 .pm = &w5100_pm_ops,
803 },
804 .probe = w5100_probe,
805 .remove = __devexit_p(w5100_remove),
806};
807
808module_platform_driver(w5100_driver);
diff --git a/drivers/net/ethernet/wiznet/w5300.c b/drivers/net/ethernet/wiznet/w5300.c
new file mode 100644
index 000000000000..88afde99de8d
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/w5300.c
@@ -0,0 +1,722 @@
1/*
2 * Ethernet driver for the WIZnet W5300 chip.
3 *
4 * Copyright (C) 2008-2009 WIZnet Co.,Ltd.
5 * Copyright (C) 2011 Taehun Kim <kth3321 <at> gmail.com>
6 * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru>
7 *
8 * Licensed under the GPL-2 or later.
9 */
10
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/kconfig.h>
14#include <linux/netdevice.h>
15#include <linux/etherdevice.h>
16#include <linux/platform_device.h>
17#include <linux/platform_data/wiznet.h>
18#include <linux/ethtool.h>
19#include <linux/skbuff.h>
20#include <linux/types.h>
21#include <linux/errno.h>
22#include <linux/delay.h>
23#include <linux/slab.h>
24#include <linux/spinlock.h>
25#include <linux/io.h>
26#include <linux/ioport.h>
27#include <linux/interrupt.h>
28#include <linux/gpio.h>
29
30#define DRV_NAME "w5300"
31#define DRV_VERSION "2012-04-04"
32
33MODULE_DESCRIPTION("WIZnet W5300 Ethernet driver v"DRV_VERSION);
34MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>");
35MODULE_ALIAS("platform:"DRV_NAME);
36MODULE_LICENSE("GPL");
37
38/*
39 * Registers
40 */
41#define W5300_MR 0x0000 /* Mode Register */
42#define MR_DBW (1 << 15) /* Data bus width */
43#define MR_MPF (1 << 14) /* Mac layer pause frame */
44#define MR_WDF(n) (((n)&7)<<11) /* Write data fetch time */
45#define MR_RDH (1 << 10) /* Read data hold time */
46#define MR_FS (1 << 8) /* FIFO swap */
47#define MR_RST (1 << 7) /* S/W reset */
48#define MR_PB (1 << 4) /* Ping block */
49#define MR_DBS (1 << 2) /* Data bus swap */
50#define MR_IND (1 << 0) /* Indirect mode */
51#define W5300_IR 0x0002 /* Interrupt Register */
52#define W5300_IMR 0x0004 /* Interrupt Mask Register */
53#define IR_S0 0x0001 /* S0 interrupt */
54#define W5300_SHARL 0x0008 /* Source MAC address (0123) */
55#define W5300_SHARH 0x000c /* Source MAC address (45) */
56#define W5300_TMSRL 0x0020 /* Transmit Memory Size (0123) */
57#define W5300_TMSRH 0x0024 /* Transmit Memory Size (4567) */
58#define W5300_RMSRL 0x0028 /* Receive Memory Size (0123) */
59#define W5300_RMSRH 0x002c /* Receive Memory Size (4567) */
60#define W5300_MTYPE 0x0030 /* Memory Type */
61#define W5300_IDR 0x00fe /* Chip ID register */
62#define IDR_W5300 0x5300 /* =0x5300 for WIZnet W5300 */
63#define W5300_S0_MR 0x0200 /* S0 Mode Register */
64#define S0_MR_CLOSED 0x0000 /* Close mode */
65#define S0_MR_MACRAW 0x0004 /* MAC RAW mode (promiscous) */
66#define S0_MR_MACRAW_MF 0x0044 /* MAC RAW mode (filtered) */
67#define W5300_S0_CR 0x0202 /* S0 Command Register */
68#define S0_CR_OPEN 0x0001 /* OPEN command */
69#define S0_CR_CLOSE 0x0010 /* CLOSE command */
70#define S0_CR_SEND 0x0020 /* SEND command */
71#define S0_CR_RECV 0x0040 /* RECV command */
72#define W5300_S0_IMR 0x0204 /* S0 Interrupt Mask Register */
73#define W5300_S0_IR 0x0206 /* S0 Interrupt Register */
74#define S0_IR_RECV 0x0004 /* Receive interrupt */
75#define S0_IR_SENDOK 0x0010 /* Send OK interrupt */
76#define W5300_S0_SSR 0x0208 /* S0 Socket Status Register */
77#define W5300_S0_TX_WRSR 0x0220 /* S0 TX Write Size Register */
78#define W5300_S0_TX_FSR 0x0224 /* S0 TX Free Size Register */
79#define W5300_S0_RX_RSR 0x0228 /* S0 Received data Size */
80#define W5300_S0_TX_FIFO 0x022e /* S0 Transmit FIFO */
81#define W5300_S0_RX_FIFO 0x0230 /* S0 Receive FIFO */
82#define W5300_REGS_LEN 0x0400
83
84/*
85 * Device driver private data structure
86 */
87struct w5300_priv {
88 void __iomem *base;
89 spinlock_t reg_lock;
90 bool indirect;
91 u16 (*read) (struct w5300_priv *priv, u16 addr);
92 void (*write)(struct w5300_priv *priv, u16 addr, u16 data);
93 int irq;
94 int link_irq;
95 int link_gpio;
96
97 struct napi_struct napi;
98 struct net_device *ndev;
99 bool promisc;
100 u32 msg_enable;
101};
102
103/************************************************************************
104 *
105 * Lowlevel I/O functions
106 *
107 ***********************************************************************/
108
109/*
110 * In direct address mode host system can directly access W5300 registers
111 * after mapping to Memory-Mapped I/O space.
112 *
113 * 0x400 bytes are required for memory space.
114 */
115static inline u16 w5300_read_direct(struct w5300_priv *priv, u16 addr)
116{
117 return ioread16(priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
118}
119
120static inline void w5300_write_direct(struct w5300_priv *priv,
121 u16 addr, u16 data)
122{
123 iowrite16(data, priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
124}
125
126/*
127 * In indirect address mode host system indirectly accesses registers by
128 * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
129 * Register (IDM_DR), which are directly mapped to Memory-Mapped I/O space.
130 * Mode Register (MR) is directly accessible.
131 *
132 * Only 0x06 bytes are required for memory space.
133 */
134#define W5300_IDM_AR 0x0002 /* Indirect Mode Address */
135#define W5300_IDM_DR 0x0004 /* Indirect Mode Data */
136
137static u16 w5300_read_indirect(struct w5300_priv *priv, u16 addr)
138{
139 unsigned long flags;
140 u16 data;
141
142 spin_lock_irqsave(&priv->reg_lock, flags);
143 w5300_write_direct(priv, W5300_IDM_AR, addr);
144 mmiowb();
145 data = w5300_read_direct(priv, W5300_IDM_DR);
146 spin_unlock_irqrestore(&priv->reg_lock, flags);
147
148 return data;
149}
150
151static void w5300_write_indirect(struct w5300_priv *priv, u16 addr, u16 data)
152{
153 unsigned long flags;
154
155 spin_lock_irqsave(&priv->reg_lock, flags);
156 w5300_write_direct(priv, W5300_IDM_AR, addr);
157 mmiowb();
158 w5300_write_direct(priv, W5300_IDM_DR, data);
159 mmiowb();
160 spin_unlock_irqrestore(&priv->reg_lock, flags);
161}
162
163#if defined(CONFIG_WIZNET_BUS_DIRECT)
164#define w5300_read w5300_read_direct
165#define w5300_write w5300_write_direct
166
167#elif defined(CONFIG_WIZNET_BUS_INDIRECT)
168#define w5300_read w5300_read_indirect
169#define w5300_write w5300_write_indirect
170
171#else /* CONFIG_WIZNET_BUS_ANY */
172#define w5300_read priv->read
173#define w5300_write priv->write
174#endif
175
176static u32 w5300_read32(struct w5300_priv *priv, u16 addr)
177{
178 u32 data;
179 data = w5300_read(priv, addr) << 16;
180 data |= w5300_read(priv, addr + 2);
181 return data;
182}
183
184static void w5300_write32(struct w5300_priv *priv, u16 addr, u32 data)
185{
186 w5300_write(priv, addr, data >> 16);
187 w5300_write(priv, addr + 2, data);
188}
189
190static int w5300_command(struct w5300_priv *priv, u16 cmd)
191{
192 unsigned long timeout = jiffies + msecs_to_jiffies(100);
193
194 w5300_write(priv, W5300_S0_CR, cmd);
195 mmiowb();
196
197 while (w5300_read(priv, W5300_S0_CR) != 0) {
198 if (time_after(jiffies, timeout))
199 return -EIO;
200 cpu_relax();
201 }
202
203 return 0;
204}
205
206static void w5300_read_frame(struct w5300_priv *priv, u8 *buf, int len)
207{
208 u16 fifo;
209 int i;
210
211 for (i = 0; i < len; i += 2) {
212 fifo = w5300_read(priv, W5300_S0_RX_FIFO);
213 *buf++ = fifo >> 8;
214 *buf++ = fifo;
215 }
216 fifo = w5300_read(priv, W5300_S0_RX_FIFO);
217 fifo = w5300_read(priv, W5300_S0_RX_FIFO);
218}
219
220static void w5300_write_frame(struct w5300_priv *priv, u8 *buf, int len)
221{
222 u16 fifo;
223 int i;
224
225 for (i = 0; i < len; i += 2) {
226 fifo = *buf++ << 8;
227 fifo |= *buf++;
228 w5300_write(priv, W5300_S0_TX_FIFO, fifo);
229 }
230 w5300_write32(priv, W5300_S0_TX_WRSR, len);
231}
232
233static void w5300_write_macaddr(struct w5300_priv *priv)
234{
235 struct net_device *ndev = priv->ndev;
236 w5300_write32(priv, W5300_SHARL,
237 ndev->dev_addr[0] << 24 |
238 ndev->dev_addr[1] << 16 |
239 ndev->dev_addr[2] << 8 |
240 ndev->dev_addr[3]);
241 w5300_write(priv, W5300_SHARH,
242 ndev->dev_addr[4] << 8 |
243 ndev->dev_addr[5]);
244 mmiowb();
245}
246
247static void w5300_hw_reset(struct w5300_priv *priv)
248{
249 w5300_write_direct(priv, W5300_MR, MR_RST);
250 mmiowb();
251 mdelay(5);
252 w5300_write_direct(priv, W5300_MR, priv->indirect ?
253 MR_WDF(7) | MR_PB | MR_IND :
254 MR_WDF(7) | MR_PB);
255 mmiowb();
256 w5300_write(priv, W5300_IMR, 0);
257 w5300_write_macaddr(priv);
258
259 /* Configure 128K of internal memory
260 * as 64K RX fifo and 64K TX fifo
261 */
262 w5300_write32(priv, W5300_RMSRL, 64 << 24);
263 w5300_write32(priv, W5300_RMSRH, 0);
264 w5300_write32(priv, W5300_TMSRL, 64 << 24);
265 w5300_write32(priv, W5300_TMSRH, 0);
266 w5300_write(priv, W5300_MTYPE, 0x00ff);
267 mmiowb();
268}
269
270static void w5300_hw_start(struct w5300_priv *priv)
271{
272 w5300_write(priv, W5300_S0_MR, priv->promisc ?
273 S0_MR_MACRAW : S0_MR_MACRAW_MF);
274 mmiowb();
275 w5300_command(priv, S0_CR_OPEN);
276 w5300_write(priv, W5300_S0_IMR, IS_ENABLED(CONFIG_WIZNET_TX_FLOW) ?
277 S0_IR_RECV | S0_IR_SENDOK :
278 S0_IR_RECV);
279 w5300_write(priv, W5300_IMR, IR_S0);
280 mmiowb();
281}
282
283static void w5300_hw_close(struct w5300_priv *priv)
284{
285 w5300_write(priv, W5300_IMR, 0);
286 mmiowb();
287 w5300_command(priv, S0_CR_CLOSE);
288}
289
290/***********************************************************************
291 *
292 * Device driver functions / callbacks
293 *
294 ***********************************************************************/
295
296static void w5300_get_drvinfo(struct net_device *ndev,
297 struct ethtool_drvinfo *info)
298{
299 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
300 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
301 strlcpy(info->bus_info, dev_name(ndev->dev.parent),
302 sizeof(info->bus_info));
303}
304
305static u32 w5300_get_link(struct net_device *ndev)
306{
307 struct w5300_priv *priv = netdev_priv(ndev);
308
309 if (gpio_is_valid(priv->link_gpio))
310 return !!gpio_get_value(priv->link_gpio);
311
312 return 1;
313}
314
315static u32 w5300_get_msglevel(struct net_device *ndev)
316{
317 struct w5300_priv *priv = netdev_priv(ndev);
318
319 return priv->msg_enable;
320}
321
322static void w5300_set_msglevel(struct net_device *ndev, u32 value)
323{
324 struct w5300_priv *priv = netdev_priv(ndev);
325
326 priv->msg_enable = value;
327}
328
329static int w5300_get_regs_len(struct net_device *ndev)
330{
331 return W5300_REGS_LEN;
332}
333
334static void w5300_get_regs(struct net_device *ndev,
335 struct ethtool_regs *regs, void *_buf)
336{
337 struct w5300_priv *priv = netdev_priv(ndev);
338 u8 *buf = _buf;
339 u16 addr;
340 u16 data;
341
342 regs->version = 1;
343 for (addr = 0; addr < W5300_REGS_LEN; addr += 2) {
344 switch (addr & 0x23f) {
345 case W5300_S0_TX_FIFO: /* cannot read TX_FIFO */
346 case W5300_S0_RX_FIFO: /* cannot read RX_FIFO */
347 data = 0xffff;
348 break;
349 default:
350 data = w5300_read(priv, addr);
351 break;
352 }
353 *buf++ = data >> 8;
354 *buf++ = data;
355 }
356}
357
358static void w5300_tx_timeout(struct net_device *ndev)
359{
360 struct w5300_priv *priv = netdev_priv(ndev);
361
362 netif_stop_queue(ndev);
363 w5300_hw_reset(priv);
364 w5300_hw_start(priv);
365 ndev->stats.tx_errors++;
366 ndev->trans_start = jiffies;
367 netif_wake_queue(ndev);
368}
369
370static int w5300_start_tx(struct sk_buff *skb, struct net_device *ndev)
371{
372 struct w5300_priv *priv = netdev_priv(ndev);
373
374 if (IS_ENABLED(CONFIG_WIZNET_TX_FLOW))
375 netif_stop_queue(ndev);
376
377 w5300_write_frame(priv, skb->data, skb->len);
378 mmiowb();
379 ndev->stats.tx_packets++;
380 ndev->stats.tx_bytes += skb->len;
381 dev_kfree_skb(skb);
382 netif_dbg(priv, tx_queued, ndev, "tx queued\n");
383
384 w5300_command(priv, S0_CR_SEND);
385
386 return NETDEV_TX_OK;
387}
388
389static int w5300_napi_poll(struct napi_struct *napi, int budget)
390{
391 struct w5300_priv *priv = container_of(napi, struct w5300_priv, napi);
392 struct net_device *ndev = priv->ndev;
393 struct sk_buff *skb;
394 int rx_count;
395 u16 rx_len;
396
397 for (rx_count = 0; rx_count < budget; rx_count++) {
398 u32 rx_fifo_len = w5300_read32(priv, W5300_S0_RX_RSR);
399 if (rx_fifo_len == 0)
400 break;
401
402 rx_len = w5300_read(priv, W5300_S0_RX_FIFO);
403
404 skb = netdev_alloc_skb_ip_align(ndev, roundup(rx_len, 2));
405 if (unlikely(!skb)) {
406 u32 i;
407 for (i = 0; i < rx_fifo_len; i += 2)
408 w5300_read(priv, W5300_S0_RX_FIFO);
409 ndev->stats.rx_dropped++;
410 return -ENOMEM;
411 }
412
413 skb_put(skb, rx_len);
414 w5300_read_frame(priv, skb->data, rx_len);
415 skb->protocol = eth_type_trans(skb, ndev);
416
417 netif_receive_skb(skb);
418 ndev->stats.rx_packets++;
419 ndev->stats.rx_bytes += rx_len;
420 }
421
422 if (rx_count < budget) {
423 w5300_write(priv, W5300_IMR, IR_S0);
424 mmiowb();
425 napi_complete(napi);
426 }
427
428 return rx_count;
429}
430
431static irqreturn_t w5300_interrupt(int irq, void *ndev_instance)
432{
433 struct net_device *ndev = ndev_instance;
434 struct w5300_priv *priv = netdev_priv(ndev);
435
436 int ir = w5300_read(priv, W5300_S0_IR);
437 if (!ir)
438 return IRQ_NONE;
439 w5300_write(priv, W5300_S0_IR, ir);
440 mmiowb();
441
442 if (IS_ENABLED(CONFIG_WIZNET_TX_FLOW) && (ir & S0_IR_SENDOK)) {
443 netif_dbg(priv, tx_done, ndev, "tx done\n");
444 netif_wake_queue(ndev);
445 }
446
447 if (ir & S0_IR_RECV) {
448 if (napi_schedule_prep(&priv->napi)) {
449 w5300_write(priv, W5300_IMR, 0);
450 mmiowb();
451 __napi_schedule(&priv->napi);
452 }
453 }
454
455 return IRQ_HANDLED;
456}
457
458static irqreturn_t w5300_detect_link(int irq, void *ndev_instance)
459{
460 struct net_device *ndev = ndev_instance;
461 struct w5300_priv *priv = netdev_priv(ndev);
462
463 if (netif_running(ndev)) {
464 if (gpio_get_value(priv->link_gpio) != 0) {
465 netif_info(priv, link, ndev, "link is up\n");
466 netif_carrier_on(ndev);
467 } else {
468 netif_info(priv, link, ndev, "link is down\n");
469 netif_carrier_off(ndev);
470 }
471 }
472
473 return IRQ_HANDLED;
474}
475
476static void w5300_set_rx_mode(struct net_device *ndev)
477{
478 struct w5300_priv *priv = netdev_priv(ndev);
479 bool set_promisc = (ndev->flags & IFF_PROMISC) != 0;
480
481 if (priv->promisc != set_promisc) {
482 priv->promisc = set_promisc;
483 w5300_hw_start(priv);
484 }
485}
486
487static int w5300_set_macaddr(struct net_device *ndev, void *addr)
488{
489 struct w5300_priv *priv = netdev_priv(ndev);
490 struct sockaddr *sock_addr = addr;
491
492 if (!is_valid_ether_addr(sock_addr->sa_data))
493 return -EADDRNOTAVAIL;
494 memcpy(ndev->dev_addr, sock_addr->sa_data, ETH_ALEN);
495 ndev->addr_assign_type &= ~NET_ADDR_RANDOM;
496 w5300_write_macaddr(priv);
497 return 0;
498}
499
500static int w5300_open(struct net_device *ndev)
501{
502 struct w5300_priv *priv = netdev_priv(ndev);
503
504 netif_info(priv, ifup, ndev, "enabling\n");
505 if (!is_valid_ether_addr(ndev->dev_addr))
506 return -EINVAL;
507 w5300_hw_start(priv);
508 napi_enable(&priv->napi);
509 netif_start_queue(ndev);
510 if (!gpio_is_valid(priv->link_gpio) ||
511 gpio_get_value(priv->link_gpio) != 0)
512 netif_carrier_on(ndev);
513 return 0;
514}
515
516static int w5300_stop(struct net_device *ndev)
517{
518 struct w5300_priv *priv = netdev_priv(ndev);
519
520 netif_info(priv, ifdown, ndev, "shutting down\n");
521 w5300_hw_close(priv);
522 netif_carrier_off(ndev);
523 netif_stop_queue(ndev);
524 napi_disable(&priv->napi);
525 return 0;
526}
527
528static const struct ethtool_ops w5300_ethtool_ops = {
529 .get_drvinfo = w5300_get_drvinfo,
530 .get_msglevel = w5300_get_msglevel,
531 .set_msglevel = w5300_set_msglevel,
532 .get_link = w5300_get_link,
533 .get_regs_len = w5300_get_regs_len,
534 .get_regs = w5300_get_regs,
535};
536
537static const struct net_device_ops w5300_netdev_ops = {
538 .ndo_open = w5300_open,
539 .ndo_stop = w5300_stop,
540 .ndo_start_xmit = w5300_start_tx,
541 .ndo_tx_timeout = w5300_tx_timeout,
542 .ndo_set_rx_mode = w5300_set_rx_mode,
543 .ndo_set_mac_address = w5300_set_macaddr,
544 .ndo_validate_addr = eth_validate_addr,
545 .ndo_change_mtu = eth_change_mtu,
546};
547
548static int __devinit w5300_hw_probe(struct platform_device *pdev)
549{
550 struct wiznet_platform_data *data = pdev->dev.platform_data;
551 struct net_device *ndev = platform_get_drvdata(pdev);
552 struct w5300_priv *priv = netdev_priv(ndev);
553 const char *name = netdev_name(ndev);
554 struct resource *mem;
555 int mem_size;
556 int irq;
557 int ret;
558
559 if (data && is_valid_ether_addr(data->mac_addr)) {
560 memcpy(ndev->dev_addr, data->mac_addr, ETH_ALEN);
561 } else {
562 random_ether_addr(ndev->dev_addr);
563 ndev->addr_assign_type |= NET_ADDR_RANDOM;
564 }
565
566 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
567 if (!mem)
568 return -ENXIO;
569 mem_size = resource_size(mem);
570 if (!devm_request_mem_region(&pdev->dev, mem->start, mem_size, name))
571 return -EBUSY;
572 priv->base = devm_ioremap(&pdev->dev, mem->start, mem_size);
573 if (!priv->base)
574 return -EBUSY;
575
576 spin_lock_init(&priv->reg_lock);
577 priv->indirect = mem_size < W5300_BUS_DIRECT_SIZE;
578 if (priv->indirect) {
579 priv->read = w5300_read_indirect;
580 priv->write = w5300_write_indirect;
581 } else {
582 priv->read = w5300_read_direct;
583 priv->write = w5300_write_direct;
584 }
585
586 w5300_hw_reset(priv);
587 if (w5300_read(priv, W5300_IDR) != IDR_W5300)
588 return -ENODEV;
589
590 irq = platform_get_irq(pdev, 0);
591 if (irq < 0)
592 return irq;
593 ret = request_irq(irq, w5300_interrupt,
594 IRQ_TYPE_LEVEL_LOW, name, ndev);
595 if (ret < 0)
596 return ret;
597 priv->irq = irq;
598
599 priv->link_gpio = data->link_gpio;
600 if (gpio_is_valid(priv->link_gpio)) {
601 char *link_name = devm_kzalloc(&pdev->dev, 16, GFP_KERNEL);
602 if (!link_name)
603 return -ENOMEM;
604 snprintf(link_name, 16, "%s-link", name);
605 priv->link_irq = gpio_to_irq(priv->link_gpio);
606 if (request_any_context_irq(priv->link_irq, w5300_detect_link,
607 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
608 link_name, priv->ndev) < 0)
609 priv->link_gpio = -EINVAL;
610 }
611
612 netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem->start, irq);
613 return 0;
614}
615
616static int __devinit w5300_probe(struct platform_device *pdev)
617{
618 struct w5300_priv *priv;
619 struct net_device *ndev;
620 int err;
621
622 ndev = alloc_etherdev(sizeof(*priv));
623 if (!ndev)
624 return -ENOMEM;
625 SET_NETDEV_DEV(ndev, &pdev->dev);
626 platform_set_drvdata(pdev, ndev);
627 priv = netdev_priv(ndev);
628 priv->ndev = ndev;
629
630 ether_setup(ndev);
631 ndev->netdev_ops = &w5300_netdev_ops;
632 ndev->ethtool_ops = &w5300_ethtool_ops;
633 ndev->watchdog_timeo = HZ;
634 netif_napi_add(ndev, &priv->napi, w5300_napi_poll, 16);
635
636 /* This chip doesn't support VLAN packets with normal MTU,
637 * so disable VLAN for this device.
638 */
639 ndev->features |= NETIF_F_VLAN_CHALLENGED;
640
641 err = register_netdev(ndev);
642 if (err < 0)
643 goto err_register;
644
645 err = w5300_hw_probe(pdev);
646 if (err < 0)
647 goto err_hw_probe;
648
649 return 0;
650
651err_hw_probe:
652 unregister_netdev(ndev);
653err_register:
654 free_netdev(ndev);
655 platform_set_drvdata(pdev, NULL);
656 return err;
657}
658
659static int __devexit w5300_remove(struct platform_device *pdev)
660{
661 struct net_device *ndev = platform_get_drvdata(pdev);
662 struct w5300_priv *priv = netdev_priv(ndev);
663
664 w5300_hw_reset(priv);
665 free_irq(priv->irq, ndev);
666 if (gpio_is_valid(priv->link_gpio))
667 free_irq(priv->link_irq, ndev);
668
669 unregister_netdev(ndev);
670 free_netdev(ndev);
671 platform_set_drvdata(pdev, NULL);
672 return 0;
673}
674
675#ifdef CONFIG_PM
676static int w5300_suspend(struct device *dev)
677{
678 struct platform_device *pdev = to_platform_device(dev);
679 struct net_device *ndev = platform_get_drvdata(pdev);
680 struct w5300_priv *priv = netdev_priv(ndev);
681
682 if (netif_running(ndev)) {
683 netif_carrier_off(ndev);
684 netif_device_detach(ndev);
685
686 w5300_hw_close(priv);
687 }
688 return 0;
689}
690
691static int w5300_resume(struct device *dev)
692{
693 struct platform_device *pdev = to_platform_device(dev);
694 struct net_device *ndev = platform_get_drvdata(pdev);
695 struct w5300_priv *priv = netdev_priv(ndev);
696
697 if (!netif_running(ndev)) {
698 w5300_hw_reset(priv);
699 w5300_hw_start(priv);
700
701 netif_device_attach(ndev);
702 if (!gpio_is_valid(priv->link_gpio) ||
703 gpio_get_value(priv->link_gpio) != 0)
704 netif_carrier_on(ndev);
705 }
706 return 0;
707}
708#endif /* CONFIG_PM */
709
710static SIMPLE_DEV_PM_OPS(w5300_pm_ops, w5300_suspend, w5300_resume);
711
712static struct platform_driver w5300_driver = {
713 .driver = {
714 .name = DRV_NAME,
715 .owner = THIS_MODULE,
716 .pm = &w5300_pm_ops,
717 },
718 .probe = w5300_probe,
719 .remove = __devexit_p(w5300_remove),
720};
721
722module_platform_driver(w5300_driver);
diff --git a/drivers/net/ethernet/xilinx/ll_temac_main.c b/drivers/net/ethernet/xilinx/ll_temac_main.c
index d21591a2c593..1eaf7128afee 100644
--- a/drivers/net/ethernet/xilinx/ll_temac_main.c
+++ b/drivers/net/ethernet/xilinx/ll_temac_main.c
@@ -1000,6 +1000,7 @@ static const struct ethtool_ops temac_ethtool_ops = {
1000 .set_settings = temac_set_settings, 1000 .set_settings = temac_set_settings,
1001 .nway_reset = temac_nway_reset, 1001 .nway_reset = temac_nway_reset,
1002 .get_link = ethtool_op_get_link, 1002 .get_link = ethtool_op_get_link,
1003 .get_ts_info = ethtool_op_get_ts_info,
1003}; 1004};
1004 1005
1005static int __devinit temac_of_probe(struct platform_device *op) 1006static int __devinit temac_of_probe(struct platform_device *op)
diff --git a/drivers/net/ethernet/xscale/Kconfig b/drivers/net/ethernet/xscale/Kconfig
index cf67352cea14..3f431019e615 100644
--- a/drivers/net/ethernet/xscale/Kconfig
+++ b/drivers/net/ethernet/xscale/Kconfig
@@ -5,8 +5,8 @@
5config NET_VENDOR_XSCALE 5config NET_VENDOR_XSCALE
6 bool "Intel XScale IXP devices" 6 bool "Intel XScale IXP devices"
7 default y 7 default y
8 depends on NET_VENDOR_INTEL && ((ARM && ARCH_IXP4XX && \ 8 depends on NET_VENDOR_INTEL && (ARM && ARCH_IXP4XX && \
9 IXP4XX_NPE && IXP4XX_QMGR) || ARCH_ENP2611) 9 IXP4XX_NPE && IXP4XX_QMGR)
10 ---help--- 10 ---help---
11 If you have a network (Ethernet) card belonging to this class, say Y 11 If you have a network (Ethernet) card belonging to this class, say Y
12 and read the Ethernet-HOWTO, available from 12 and read the Ethernet-HOWTO, available from
@@ -27,6 +27,4 @@ config IXP4XX_ETH
27 Say Y here if you want to use built-in Ethernet ports 27 Say Y here if you want to use built-in Ethernet ports
28 on IXP4xx processor. 28 on IXP4xx processor.
29 29
30source "drivers/net/ethernet/xscale/ixp2000/Kconfig"
31
32endif # NET_VENDOR_XSCALE 30endif # NET_VENDOR_XSCALE
diff --git a/drivers/net/ethernet/xscale/Makefile b/drivers/net/ethernet/xscale/Makefile
index b195b9d7fe81..abc3b031fba7 100644
--- a/drivers/net/ethernet/xscale/Makefile
+++ b/drivers/net/ethernet/xscale/Makefile
@@ -2,5 +2,4 @@
2# Makefile for the Intel XScale IXP device drivers. 2# Makefile for the Intel XScale IXP device drivers.
3# 3#
4 4
5obj-$(CONFIG_ENP2611_MSF_NET) += ixp2000/
6obj-$(CONFIG_IXP4XX_ETH) += ixp4xx_eth.o 5obj-$(CONFIG_IXP4XX_ETH) += ixp4xx_eth.o
diff --git a/drivers/net/ethernet/xscale/ixp2000/Kconfig b/drivers/net/ethernet/xscale/ixp2000/Kconfig
deleted file mode 100644
index 58dbc5b876bc..000000000000
--- a/drivers/net/ethernet/xscale/ixp2000/Kconfig
+++ /dev/null
@@ -1,6 +0,0 @@
1config ENP2611_MSF_NET
2 tristate "Radisys ENP2611 MSF network interface support"
3 depends on ARCH_ENP2611
4 ---help---
5 This is a driver for the MSF network interface unit in
6 the IXP2400 on the Radisys ENP2611 platform.
diff --git a/drivers/net/ethernet/xscale/ixp2000/Makefile b/drivers/net/ethernet/xscale/ixp2000/Makefile
deleted file mode 100644
index fd38351ceaa7..000000000000
--- a/drivers/net/ethernet/xscale/ixp2000/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
1obj-$(CONFIG_ENP2611_MSF_NET) += enp2611_mod.o
2
3enp2611_mod-objs := caleb.o enp2611.o ixp2400-msf.o ixpdev.o pm3386.o
diff --git a/drivers/net/ethernet/xscale/ixp2000/caleb.c b/drivers/net/ethernet/xscale/ixp2000/caleb.c
deleted file mode 100644
index 7dea5b95012c..000000000000
--- a/drivers/net/ethernet/xscale/ixp2000/caleb.c
+++ /dev/null
@@ -1,136 +0,0 @@
1/*
2 * Helper functions for the SPI-3 bridge FPGA on the Radisys ENP2611
3 * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
4 * Dedicated to Marija Kulikova.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
13#include <linux/delay.h>
14#include <asm/io.h>
15#include "caleb.h"
16
17#define CALEB_IDLO 0x00
18#define CALEB_IDHI 0x01
19#define CALEB_RID 0x02
20#define CALEB_RESET 0x03
21#define CALEB_INTREN0 0x04
22#define CALEB_INTREN1 0x05
23#define CALEB_INTRSTAT0 0x06
24#define CALEB_INTRSTAT1 0x07
25#define CALEB_PORTEN 0x08
26#define CALEB_BURST 0x09
27#define CALEB_PORTPAUS 0x0A
28#define CALEB_PORTPAUSD 0x0B
29#define CALEB_PHY0RX 0x10
30#define CALEB_PHY1RX 0x11
31#define CALEB_PHY0TX 0x12
32#define CALEB_PHY1TX 0x13
33#define CALEB_IXPRX_HI_CNTR 0x15
34#define CALEB_PHY0RX_HI_CNTR 0x16
35#define CALEB_PHY1RX_HI_CNTR 0x17
36#define CALEB_IXPRX_CNTR 0x18
37#define CALEB_PHY0RX_CNTR 0x19
38#define CALEB_PHY1RX_CNTR 0x1A
39#define CALEB_IXPTX_CNTR 0x1B
40#define CALEB_PHY0TX_CNTR 0x1C
41#define CALEB_PHY1TX_CNTR 0x1D
42#define CALEB_DEBUG0 0x1E
43#define CALEB_DEBUG1 0x1F
44
45
46static u8 caleb_reg_read(int reg)
47{
48 u8 value;
49
50 value = *((volatile u8 *)(ENP2611_CALEB_VIRT_BASE + reg));
51
52// printk(KERN_INFO "caleb_reg_read(%d) = %.2x\n", reg, value);
53
54 return value;
55}
56
57static void caleb_reg_write(int reg, u8 value)
58{
59 u8 dummy;
60
61// printk(KERN_INFO "caleb_reg_write(%d, %.2x)\n", reg, value);
62
63 *((volatile u8 *)(ENP2611_CALEB_VIRT_BASE + reg)) = value;
64
65 dummy = *((volatile u8 *)ENP2611_CALEB_VIRT_BASE);
66 __asm__ __volatile__("mov %0, %0" : "+r" (dummy));
67}
68
69
70void caleb_reset(void)
71{
72 /*
73 * Perform a chip reset.
74 */
75 caleb_reg_write(CALEB_RESET, 0x02);
76 udelay(1);
77
78 /*
79 * Enable all interrupt sources. This is needed to get
80 * meaningful results out of the status bits (register 6
81 * and 7.)
82 */
83 caleb_reg_write(CALEB_INTREN0, 0xff);
84 caleb_reg_write(CALEB_INTREN1, 0x07);
85
86 /*
87 * Set RX and TX FIFO thresholds to 1.5kb.
88 */
89 caleb_reg_write(CALEB_PHY0RX, 0x11);
90 caleb_reg_write(CALEB_PHY1RX, 0x11);
91 caleb_reg_write(CALEB_PHY0TX, 0x11);
92 caleb_reg_write(CALEB_PHY1TX, 0x11);
93
94 /*
95 * Program SPI-3 burst size.
96 */
97 caleb_reg_write(CALEB_BURST, 0); // 64-byte RBUF mpackets
98// caleb_reg_write(CALEB_BURST, 1); // 128-byte RBUF mpackets
99// caleb_reg_write(CALEB_BURST, 2); // 256-byte RBUF mpackets
100}
101
102void caleb_enable_rx(int port)
103{
104 u8 temp;
105
106 temp = caleb_reg_read(CALEB_PORTEN);
107 temp |= 1 << port;
108 caleb_reg_write(CALEB_PORTEN, temp);
109}
110
111void caleb_disable_rx(int port)
112{
113 u8 temp;
114
115 temp = caleb_reg_read(CALEB_PORTEN);
116 temp &= ~(1 << port);
117 caleb_reg_write(CALEB_PORTEN, temp);
118}
119
120void caleb_enable_tx(int port)
121{
122 u8 temp;
123
124 temp = caleb_reg_read(CALEB_PORTEN);
125 temp |= 1 << (port + 4);
126 caleb_reg_write(CALEB_PORTEN, temp);
127}
128
129void caleb_disable_tx(int port)
130{
131 u8 temp;
132
133 temp = caleb_reg_read(CALEB_PORTEN);
134 temp &= ~(1 << (port + 4));
135 caleb_reg_write(CALEB_PORTEN, temp);
136}
diff --git a/drivers/net/ethernet/xscale/ixp2000/caleb.h b/drivers/net/ethernet/xscale/ixp2000/caleb.h
deleted file mode 100644
index e93a1ef5b8a3..000000000000
--- a/drivers/net/ethernet/xscale/ixp2000/caleb.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * Helper functions for the SPI-3 bridge FPGA on the Radisys ENP2611
3 * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
4 * Dedicated to Marija Kulikova.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#ifndef __CALEB_H
13#define __CALEB_H
14
15void caleb_reset(void);
16void caleb_enable_rx(int port);
17void caleb_disable_rx(int port);
18void caleb_enable_tx(int port);
19void caleb_disable_tx(int port);
20
21
22#endif
diff --git a/drivers/net/ethernet/xscale/ixp2000/enp2611.c b/drivers/net/ethernet/xscale/ixp2000/enp2611.c
deleted file mode 100644
index 34a6cfd17930..000000000000
--- a/drivers/net/ethernet/xscale/ixp2000/enp2611.c
+++ /dev/null
@@ -1,232 +0,0 @@
1/*
2 * IXP2400 MSF network device driver for the Radisys ENP2611
3 * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
4 * Dedicated to Marija Kulikova.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/netdevice.h>
15#include <linux/etherdevice.h>
16#include <linux/init.h>
17#include <linux/moduleparam.h>
18#include <asm/hardware/uengine.h>
19#include <asm/mach-types.h>
20#include <asm/io.h>
21#include "ixpdev.h"
22#include "caleb.h"
23#include "ixp2400-msf.h"
24#include "pm3386.h"
25
26/***********************************************************************
27 * The Radisys ENP2611 is a PCI form factor board with three SFP GBIC
28 * slots, connected via two PMC/Sierra 3386s and an SPI-3 bridge FPGA
29 * to the IXP2400.
30 *
31 * +-------------+
32 * SFP GBIC #0 ---+ | +---------+
33 * | PM3386 #0 +-------+ |
34 * SFP GBIC #1 ---+ | | "Caleb" | +---------+
35 * +-------------+ | | | |
36 * | SPI-3 +---------+ IXP2400 |
37 * +-------------+ | bridge | | |
38 * SFP GBIC #2 ---+ | | FPGA | +---------+
39 * | PM3386 #1 +-------+ |
40 * | | +---------+
41 * +-------------+
42 * ^ ^ ^
43 * | 1.25Gbaud | 104MHz | 104MHz
44 * | SERDES ea. | SPI-3 ea. | SPI-3
45 *
46 ***********************************************************************/
47static struct ixp2400_msf_parameters enp2611_msf_parameters =
48{
49 .rx_mode = IXP2400_RX_MODE_UTOPIA_POS |
50 IXP2400_RX_MODE_1x32 |
51 IXP2400_RX_MODE_MPHY |
52 IXP2400_RX_MODE_MPHY_32 |
53 IXP2400_RX_MODE_MPHY_POLLED_STATUS |
54 IXP2400_RX_MODE_MPHY_LEVEL3 |
55 IXP2400_RX_MODE_RBUF_SIZE_64,
56
57 .rxclk01_multiplier = IXP2400_PLL_MULTIPLIER_16,
58
59 .rx_poll_ports = 3,
60
61 .rx_channel_mode = {
62 IXP2400_PORT_RX_MODE_MASTER |
63 IXP2400_PORT_RX_MODE_POS_PHY |
64 IXP2400_PORT_RX_MODE_POS_PHY_L3 |
65 IXP2400_PORT_RX_MODE_ODD_PARITY |
66 IXP2400_PORT_RX_MODE_2_CYCLE_DECODE,
67
68 IXP2400_PORT_RX_MODE_MASTER |
69 IXP2400_PORT_RX_MODE_POS_PHY |
70 IXP2400_PORT_RX_MODE_POS_PHY_L3 |
71 IXP2400_PORT_RX_MODE_ODD_PARITY |
72 IXP2400_PORT_RX_MODE_2_CYCLE_DECODE,
73
74 IXP2400_PORT_RX_MODE_MASTER |
75 IXP2400_PORT_RX_MODE_POS_PHY |
76 IXP2400_PORT_RX_MODE_POS_PHY_L3 |
77 IXP2400_PORT_RX_MODE_ODD_PARITY |
78 IXP2400_PORT_RX_MODE_2_CYCLE_DECODE,
79
80 IXP2400_PORT_RX_MODE_MASTER |
81 IXP2400_PORT_RX_MODE_POS_PHY |
82 IXP2400_PORT_RX_MODE_POS_PHY_L3 |
83 IXP2400_PORT_RX_MODE_ODD_PARITY |
84 IXP2400_PORT_RX_MODE_2_CYCLE_DECODE
85 },
86
87 .tx_mode = IXP2400_TX_MODE_UTOPIA_POS |
88 IXP2400_TX_MODE_1x32 |
89 IXP2400_TX_MODE_MPHY |
90 IXP2400_TX_MODE_MPHY_32 |
91 IXP2400_TX_MODE_MPHY_POLLED_STATUS |
92 IXP2400_TX_MODE_MPHY_LEVEL3 |
93 IXP2400_TX_MODE_TBUF_SIZE_64,
94
95 .txclk01_multiplier = IXP2400_PLL_MULTIPLIER_16,
96
97 .tx_poll_ports = 3,
98
99 .tx_channel_mode = {
100 IXP2400_PORT_TX_MODE_MASTER |
101 IXP2400_PORT_TX_MODE_POS_PHY |
102 IXP2400_PORT_TX_MODE_ODD_PARITY |
103 IXP2400_PORT_TX_MODE_2_CYCLE_DECODE,
104
105 IXP2400_PORT_TX_MODE_MASTER |
106 IXP2400_PORT_TX_MODE_POS_PHY |
107 IXP2400_PORT_TX_MODE_ODD_PARITY |
108 IXP2400_PORT_TX_MODE_2_CYCLE_DECODE,
109
110 IXP2400_PORT_TX_MODE_MASTER |
111 IXP2400_PORT_TX_MODE_POS_PHY |
112 IXP2400_PORT_TX_MODE_ODD_PARITY |
113 IXP2400_PORT_TX_MODE_2_CYCLE_DECODE,
114
115 IXP2400_PORT_TX_MODE_MASTER |
116 IXP2400_PORT_TX_MODE_POS_PHY |
117 IXP2400_PORT_TX_MODE_ODD_PARITY |
118 IXP2400_PORT_TX_MODE_2_CYCLE_DECODE
119 }
120};
121
122static struct net_device *nds[3];
123static struct timer_list link_check_timer;
124
125/* @@@ Poll the SFP moddef0 line too. */
126/* @@@ Try to use the pm3386 DOOL interrupt as well. */
127static void enp2611_check_link_status(unsigned long __dummy)
128{
129 int i;
130
131 for (i = 0; i < 3; i++) {
132 struct net_device *dev;
133 int status;
134
135 dev = nds[i];
136 if (dev == NULL)
137 continue;
138
139 status = pm3386_is_link_up(i);
140 if (status && !netif_carrier_ok(dev)) {
141 /* @@@ Should report autonegotiation status. */
142 printk(KERN_INFO "%s: NIC Link is Up\n", dev->name);
143
144 pm3386_enable_tx(i);
145 caleb_enable_tx(i);
146 netif_carrier_on(dev);
147 } else if (!status && netif_carrier_ok(dev)) {
148 printk(KERN_INFO "%s: NIC Link is Down\n", dev->name);
149
150 netif_carrier_off(dev);
151 caleb_disable_tx(i);
152 pm3386_disable_tx(i);
153 }
154 }
155
156 link_check_timer.expires = jiffies + HZ / 10;
157 add_timer(&link_check_timer);
158}
159
160static void enp2611_set_port_admin_status(int port, int up)
161{
162 if (up) {
163 caleb_enable_rx(port);
164
165 pm3386_set_carrier(port, 1);
166 pm3386_enable_rx(port);
167 } else {
168 caleb_disable_tx(port);
169 pm3386_disable_tx(port);
170 /* @@@ Flush out pending packets. */
171 pm3386_set_carrier(port, 0);
172
173 pm3386_disable_rx(port);
174 caleb_disable_rx(port);
175 }
176}
177
178static int __init enp2611_init_module(void)
179{
180 int ports;
181 int i;
182
183 if (!machine_is_enp2611())
184 return -ENODEV;
185
186 caleb_reset();
187 pm3386_reset();
188
189 ports = pm3386_port_count();
190 for (i = 0; i < ports; i++) {
191 nds[i] = ixpdev_alloc(i, sizeof(struct ixpdev_priv));
192 if (nds[i] == NULL) {
193 while (--i >= 0)
194 free_netdev(nds[i]);
195 return -ENOMEM;
196 }
197
198 pm3386_init_port(i);
199 pm3386_get_mac(i, nds[i]->dev_addr);
200 }
201
202 ixp2400_msf_init(&enp2611_msf_parameters);
203
204 if (ixpdev_init(ports, nds, enp2611_set_port_admin_status)) {
205 for (i = 0; i < ports; i++)
206 if (nds[i])
207 free_netdev(nds[i]);
208 return -EINVAL;
209 }
210
211 init_timer(&link_check_timer);
212 link_check_timer.function = enp2611_check_link_status;
213 link_check_timer.expires = jiffies;
214 add_timer(&link_check_timer);
215
216 return 0;
217}
218
219static void __exit enp2611_cleanup_module(void)
220{
221 int i;
222
223 del_timer_sync(&link_check_timer);
224
225 ixpdev_deinit();
226 for (i = 0; i < 3; i++)
227 free_netdev(nds[i]);
228}
229
230module_init(enp2611_init_module);
231module_exit(enp2611_cleanup_module);
232MODULE_LICENSE("GPL");
diff --git a/drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.c b/drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.c
deleted file mode 100644
index f5ffd7e05d26..000000000000
--- a/drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.c
+++ /dev/null
@@ -1,212 +0,0 @@
1/*
2 * Generic library functions for the MSF (Media and Switch Fabric) unit
3 * found on the Intel IXP2400 network processor.
4 *
5 * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
6 * Dedicated to Marija Kulikova.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU Lesser General Public License as
10 * published by the Free Software Foundation; either version 2.1 of the
11 * License, or (at your option) any later version.
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <mach/hardware.h>
17#include <mach/ixp2000-regs.h>
18#include <asm/delay.h>
19#include <asm/io.h>
20#include "ixp2400-msf.h"
21
22/*
23 * This is the Intel recommended PLL init procedure as described on
24 * page 340 of the IXP2400/IXP2800 Programmer's Reference Manual.
25 */
26static void ixp2400_pll_init(struct ixp2400_msf_parameters *mp)
27{
28 int rx_dual_clock;
29 int tx_dual_clock;
30 u32 value;
31
32 /*
33 * If the RX mode is not 1x32, we have to enable both RX PLLs
34 * (#0 and #1.) The same thing for the TX direction.
35 */
36 rx_dual_clock = !!(mp->rx_mode & IXP2400_RX_MODE_WIDTH_MASK);
37 tx_dual_clock = !!(mp->tx_mode & IXP2400_TX_MODE_WIDTH_MASK);
38
39 /*
40 * Read initial value.
41 */
42 value = ixp2000_reg_read(IXP2000_MSF_CLK_CNTRL);
43
44 /*
45 * Put PLLs in powerdown and bypass mode.
46 */
47 value |= 0x0000f0f0;
48 ixp2000_reg_write(IXP2000_MSF_CLK_CNTRL, value);
49
50 /*
51 * Set single or dual clock mode bits.
52 */
53 value &= ~0x03000000;
54 value |= (rx_dual_clock << 24) | (tx_dual_clock << 25);
55
56 /*
57 * Set multipliers.
58 */
59 value &= ~0x00ff0000;
60 value |= mp->rxclk01_multiplier << 16;
61 value |= mp->rxclk23_multiplier << 18;
62 value |= mp->txclk01_multiplier << 20;
63 value |= mp->txclk23_multiplier << 22;
64
65 /*
66 * And write value.
67 */
68 ixp2000_reg_write(IXP2000_MSF_CLK_CNTRL, value);
69
70 /*
71 * Disable PLL bypass mode.
72 */
73 value &= ~(0x00005000 | rx_dual_clock << 13 | tx_dual_clock << 15);
74 ixp2000_reg_write(IXP2000_MSF_CLK_CNTRL, value);
75
76 /*
77 * Turn on PLLs.
78 */
79 value &= ~(0x00000050 | rx_dual_clock << 5 | tx_dual_clock << 7);
80 ixp2000_reg_write(IXP2000_MSF_CLK_CNTRL, value);
81
82 /*
83 * Wait for PLLs to lock. There are lock status bits, but IXP2400
84 * erratum #65 says that these lock bits should not be relied upon
85 * as they might not accurately reflect the true state of the PLLs.
86 */
87 udelay(100);
88}
89
90/*
91 * Needed according to p480 of Programmer's Reference Manual.
92 */
93static void ixp2400_msf_free_rbuf_entries(struct ixp2400_msf_parameters *mp)
94{
95 int size_bits;
96 int i;
97
98 /*
99 * Work around IXP2400 erratum #69 (silent RBUF-to-DRAM transfer
100 * corruption) in the Intel-recommended way: do not add the RBUF
101 * elements susceptible to corruption to the freelist.
102 */
103 size_bits = mp->rx_mode & IXP2400_RX_MODE_RBUF_SIZE_MASK;
104 if (size_bits == IXP2400_RX_MODE_RBUF_SIZE_64) {
105 for (i = 1; i < 128; i++) {
106 if (i == 9 || i == 18 || i == 27)
107 continue;
108 ixp2000_reg_write(IXP2000_MSF_RBUF_ELEMENT_DONE, i);
109 }
110 } else if (size_bits == IXP2400_RX_MODE_RBUF_SIZE_128) {
111 for (i = 1; i < 64; i++) {
112 if (i == 4 || i == 9 || i == 13)
113 continue;
114 ixp2000_reg_write(IXP2000_MSF_RBUF_ELEMENT_DONE, i);
115 }
116 } else if (size_bits == IXP2400_RX_MODE_RBUF_SIZE_256) {
117 for (i = 1; i < 32; i++) {
118 if (i == 2 || i == 4 || i == 6)
119 continue;
120 ixp2000_reg_write(IXP2000_MSF_RBUF_ELEMENT_DONE, i);
121 }
122 }
123}
124
125static u32 ixp2400_msf_valid_channels(u32 reg)
126{
127 u32 channels;
128
129 channels = 0;
130 switch (reg & IXP2400_RX_MODE_WIDTH_MASK) {
131 case IXP2400_RX_MODE_1x32:
132 channels = 0x1;
133 if (reg & IXP2400_RX_MODE_MPHY &&
134 !(reg & IXP2400_RX_MODE_MPHY_32))
135 channels = 0xf;
136 break;
137
138 case IXP2400_RX_MODE_2x16:
139 channels = 0x5;
140 break;
141
142 case IXP2400_RX_MODE_4x8:
143 channels = 0xf;
144 break;
145
146 case IXP2400_RX_MODE_1x16_2x8:
147 channels = 0xd;
148 break;
149 }
150
151 return channels;
152}
153
154static void ixp2400_msf_enable_rx(struct ixp2400_msf_parameters *mp)
155{
156 u32 value;
157
158 value = ixp2000_reg_read(IXP2000_MSF_RX_CONTROL) & 0x0fffffff;
159 value |= ixp2400_msf_valid_channels(mp->rx_mode) << 28;
160 ixp2000_reg_write(IXP2000_MSF_RX_CONTROL, value);
161}
162
163static void ixp2400_msf_enable_tx(struct ixp2400_msf_parameters *mp)
164{
165 u32 value;
166
167 value = ixp2000_reg_read(IXP2000_MSF_TX_CONTROL) & 0x0fffffff;
168 value |= ixp2400_msf_valid_channels(mp->tx_mode) << 28;
169 ixp2000_reg_write(IXP2000_MSF_TX_CONTROL, value);
170}
171
172
173void ixp2400_msf_init(struct ixp2400_msf_parameters *mp)
174{
175 u32 value;
176 int i;
177
178 /*
179 * Init the RX/TX PLLs based on the passed parameter block.
180 */
181 ixp2400_pll_init(mp);
182
183 /*
184 * Reset MSF. Bit 7 in IXP_RESET_0 resets the MSF.
185 */
186 value = ixp2000_reg_read(IXP2000_RESET0);
187 ixp2000_reg_write(IXP2000_RESET0, value | 0x80);
188 ixp2000_reg_write(IXP2000_RESET0, value & ~0x80);
189
190 /*
191 * Initialise the RX section.
192 */
193 ixp2000_reg_write(IXP2000_MSF_RX_MPHY_POLL_LIMIT, mp->rx_poll_ports - 1);
194 ixp2000_reg_write(IXP2000_MSF_RX_CONTROL, mp->rx_mode);
195 for (i = 0; i < 4; i++) {
196 ixp2000_reg_write(IXP2000_MSF_RX_UP_CONTROL_0 + i,
197 mp->rx_channel_mode[i]);
198 }
199 ixp2400_msf_free_rbuf_entries(mp);
200 ixp2400_msf_enable_rx(mp);
201
202 /*
203 * Initialise the TX section.
204 */
205 ixp2000_reg_write(IXP2000_MSF_TX_MPHY_POLL_LIMIT, mp->tx_poll_ports - 1);
206 ixp2000_reg_write(IXP2000_MSF_TX_CONTROL, mp->tx_mode);
207 for (i = 0; i < 4; i++) {
208 ixp2000_reg_write(IXP2000_MSF_TX_UP_CONTROL_0 + i,
209 mp->tx_channel_mode[i]);
210 }
211 ixp2400_msf_enable_tx(mp);
212}
diff --git a/drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.h b/drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.h
deleted file mode 100644
index 3ac1af2771da..000000000000
--- a/drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.h
+++ /dev/null
@@ -1,115 +0,0 @@
1/*
2 * Generic library functions for the MSF (Media and Switch Fabric) unit
3 * found on the Intel IXP2400 network processor.
4 *
5 * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
6 * Dedicated to Marija Kulikova.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU Lesser General Public License as
10 * published by the Free Software Foundation; either version 2.1 of the
11 * License, or (at your option) any later version.
12 */
13
14#ifndef __IXP2400_MSF_H
15#define __IXP2400_MSF_H
16
17struct ixp2400_msf_parameters
18{
19 u32 rx_mode;
20 unsigned rxclk01_multiplier:2;
21 unsigned rxclk23_multiplier:2;
22 unsigned rx_poll_ports:6;
23 u32 rx_channel_mode[4];
24
25 u32 tx_mode;
26 unsigned txclk01_multiplier:2;
27 unsigned txclk23_multiplier:2;
28 unsigned tx_poll_ports:6;
29 u32 tx_channel_mode[4];
30};
31
32void ixp2400_msf_init(struct ixp2400_msf_parameters *mp);
33
34#define IXP2400_PLL_MULTIPLIER_48 0x00
35#define IXP2400_PLL_MULTIPLIER_24 0x01
36#define IXP2400_PLL_MULTIPLIER_16 0x02
37#define IXP2400_PLL_MULTIPLIER_12 0x03
38
39#define IXP2400_RX_MODE_CSIX 0x00400000
40#define IXP2400_RX_MODE_UTOPIA_POS 0x00000000
41#define IXP2400_RX_MODE_WIDTH_MASK 0x00300000
42#define IXP2400_RX_MODE_1x16_2x8 0x00300000
43#define IXP2400_RX_MODE_4x8 0x00200000
44#define IXP2400_RX_MODE_2x16 0x00100000
45#define IXP2400_RX_MODE_1x32 0x00000000
46#define IXP2400_RX_MODE_MPHY 0x00080000
47#define IXP2400_RX_MODE_SPHY 0x00000000
48#define IXP2400_RX_MODE_MPHY_32 0x00040000
49#define IXP2400_RX_MODE_MPHY_4 0x00000000
50#define IXP2400_RX_MODE_MPHY_POLLED_STATUS 0x00020000
51#define IXP2400_RX_MODE_MPHY_DIRECT_STATUS 0x00000000
52#define IXP2400_RX_MODE_CBUS_FULL_DUPLEX 0x00010000
53#define IXP2400_RX_MODE_CBUS_SIMPLEX 0x00000000
54#define IXP2400_RX_MODE_MPHY_LEVEL2 0x00004000
55#define IXP2400_RX_MODE_MPHY_LEVEL3 0x00000000
56#define IXP2400_RX_MODE_CBUS_8BIT 0x00002000
57#define IXP2400_RX_MODE_CBUS_4BIT 0x00000000
58#define IXP2400_RX_MODE_CSIX_SINGLE_FREELIST 0x00000200
59#define IXP2400_RX_MODE_CSIX_SPLIT_FREELISTS 0x00000000
60#define IXP2400_RX_MODE_RBUF_SIZE_MASK 0x0000000c
61#define IXP2400_RX_MODE_RBUF_SIZE_256 0x00000008
62#define IXP2400_RX_MODE_RBUF_SIZE_128 0x00000004
63#define IXP2400_RX_MODE_RBUF_SIZE_64 0x00000000
64
65#define IXP2400_PORT_RX_MODE_SLAVE 0x00000040
66#define IXP2400_PORT_RX_MODE_MASTER 0x00000000
67#define IXP2400_PORT_RX_MODE_POS_PHY_L3 0x00000020
68#define IXP2400_PORT_RX_MODE_POS_PHY_L2 0x00000000
69#define IXP2400_PORT_RX_MODE_POS_PHY 0x00000010
70#define IXP2400_PORT_RX_MODE_UTOPIA 0x00000000
71#define IXP2400_PORT_RX_MODE_EVEN_PARITY 0x0000000c
72#define IXP2400_PORT_RX_MODE_ODD_PARITY 0x00000008
73#define IXP2400_PORT_RX_MODE_NO_PARITY 0x00000000
74#define IXP2400_PORT_RX_MODE_UTOPIA_BIG_CELLS 0x00000002
75#define IXP2400_PORT_RX_MODE_UTOPIA_NORMAL_CELLS 0x00000000
76#define IXP2400_PORT_RX_MODE_2_CYCLE_DECODE 0x00000001
77#define IXP2400_PORT_RX_MODE_1_CYCLE_DECODE 0x00000000
78
79#define IXP2400_TX_MODE_CSIX 0x00400000
80#define IXP2400_TX_MODE_UTOPIA_POS 0x00000000
81#define IXP2400_TX_MODE_WIDTH_MASK 0x00300000
82#define IXP2400_TX_MODE_1x16_2x8 0x00300000
83#define IXP2400_TX_MODE_4x8 0x00200000
84#define IXP2400_TX_MODE_2x16 0x00100000
85#define IXP2400_TX_MODE_1x32 0x00000000
86#define IXP2400_TX_MODE_MPHY 0x00080000
87#define IXP2400_TX_MODE_SPHY 0x00000000
88#define IXP2400_TX_MODE_MPHY_32 0x00040000
89#define IXP2400_TX_MODE_MPHY_4 0x00000000
90#define IXP2400_TX_MODE_MPHY_POLLED_STATUS 0x00020000
91#define IXP2400_TX_MODE_MPHY_DIRECT_STATUS 0x00000000
92#define IXP2400_TX_MODE_CBUS_FULL_DUPLEX 0x00010000
93#define IXP2400_TX_MODE_CBUS_SIMPLEX 0x00000000
94#define IXP2400_TX_MODE_MPHY_LEVEL2 0x00004000
95#define IXP2400_TX_MODE_MPHY_LEVEL3 0x00000000
96#define IXP2400_TX_MODE_CBUS_8BIT 0x00002000
97#define IXP2400_TX_MODE_CBUS_4BIT 0x00000000
98#define IXP2400_TX_MODE_TBUF_SIZE_MASK 0x0000000c
99#define IXP2400_TX_MODE_TBUF_SIZE_256 0x00000008
100#define IXP2400_TX_MODE_TBUF_SIZE_128 0x00000004
101#define IXP2400_TX_MODE_TBUF_SIZE_64 0x00000000
102
103#define IXP2400_PORT_TX_MODE_SLAVE 0x00000040
104#define IXP2400_PORT_TX_MODE_MASTER 0x00000000
105#define IXP2400_PORT_TX_MODE_POS_PHY 0x00000010
106#define IXP2400_PORT_TX_MODE_UTOPIA 0x00000000
107#define IXP2400_PORT_TX_MODE_EVEN_PARITY 0x0000000c
108#define IXP2400_PORT_TX_MODE_ODD_PARITY 0x00000008
109#define IXP2400_PORT_TX_MODE_NO_PARITY 0x00000000
110#define IXP2400_PORT_TX_MODE_UTOPIA_BIG_CELLS 0x00000002
111#define IXP2400_PORT_TX_MODE_2_CYCLE_DECODE 0x00000001
112#define IXP2400_PORT_TX_MODE_1_CYCLE_DECODE 0x00000000
113
114
115#endif
diff --git a/drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.uc b/drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.uc
deleted file mode 100644
index 42a73e357afa..000000000000
--- a/drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.uc
+++ /dev/null
@@ -1,408 +0,0 @@
1/*
2 * RX ucode for the Intel IXP2400 in POS-PHY mode.
3 * Copyright (C) 2004, 2005 Lennert Buytenhek
4 * Dedicated to Marija Kulikova.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * Assumptions made in this code:
12 * - The IXP2400 MSF is configured for POS-PHY mode, in a mode where
13 * only one full element list is used. This includes, for example,
14 * 1x32 SPHY and 1x32 MPHY32, but not 4x8 SPHY or 1x32 MPHY4. (This
15 * is not an exhaustive list.)
16 * - The RBUF uses 64-byte mpackets.
17 * - RX descriptors reside in SRAM, and have the following format:
18 * struct rx_desc
19 * {
20 * // to uengine
21 * u32 buf_phys_addr;
22 * u32 buf_length;
23 *
24 * // from uengine
25 * u32 channel;
26 * u32 pkt_length;
27 * };
28 * - Packet data resides in DRAM.
29 * - Packet buffer addresses are 8-byte aligned.
30 * - Scratch ring 0 is rx_pending.
31 * - Scratch ring 1 is rx_done, and has status condition 'full'.
32 * - The host triggers rx_done flush and rx_pending refill on seeing INTA.
33 * - This code is run on all eight threads of the microengine it runs on.
34 *
35 * Local memory is used for per-channel RX state.
36 */
37
38#define RX_THREAD_FREELIST_0 0x0030
39#define RBUF_ELEMENT_DONE 0x0044
40
41#define CHANNEL_FLAGS *l$index0[0]
42#define CHANNEL_FLAG_RECEIVING 1
43#define PACKET_LENGTH *l$index0[1]
44#define PACKET_CHECKSUM *l$index0[2]
45#define BUFFER_HANDLE *l$index0[3]
46#define BUFFER_START *l$index0[4]
47#define BUFFER_LENGTH *l$index0[5]
48
49#define CHANNEL_STATE_SIZE 24 // in bytes
50#define CHANNEL_STATE_SHIFT 5 // ceil(log2(state size))
51
52
53 .sig volatile sig1
54 .sig volatile sig2
55 .sig volatile sig3
56
57 .sig mpacket_arrived
58 .reg add_to_rx_freelist
59 .reg read $rsw0, $rsw1
60 .xfer_order $rsw0 $rsw1
61
62 .reg zero
63
64 /*
65 * Initialise add_to_rx_freelist.
66 */
67 .begin
68 .reg temp
69 .reg temp2
70
71 immed[add_to_rx_freelist, RX_THREAD_FREELIST_0]
72 immed_w1[add_to_rx_freelist, (&$rsw0 | (&mpacket_arrived << 12))]
73
74 local_csr_rd[ACTIVE_CTX_STS]
75 immed[temp, 0]
76 alu[temp2, temp, and, 0x1f]
77 alu_shf[add_to_rx_freelist, add_to_rx_freelist, or, temp2, <<20]
78 alu[temp2, temp, and, 0x80]
79 alu_shf[add_to_rx_freelist, add_to_rx_freelist, or, temp2, <<18]
80 .end
81
82 immed[zero, 0]
83
84 /*
85 * Skip context 0 initialisation?
86 */
87 .begin
88 br!=ctx[0, mpacket_receive_loop#]
89 .end
90
91 /*
92 * Initialise local memory.
93 */
94 .begin
95 .reg addr
96 .reg temp
97
98 immed[temp, 0]
99 init_local_mem_loop#:
100 alu_shf[addr, --, b, temp, <<CHANNEL_STATE_SHIFT]
101 local_csr_wr[ACTIVE_LM_ADDR_0, addr]
102 nop
103 nop
104 nop
105
106 immed[CHANNEL_FLAGS, 0]
107
108 alu[temp, temp, +, 1]
109 alu[--, temp, and, 0x20]
110 beq[init_local_mem_loop#]
111 .end
112
113 /*
114 * Initialise signal pipeline.
115 */
116 .begin
117 local_csr_wr[SAME_ME_SIGNAL, (&sig1 << 3)]
118 .set_sig sig1
119
120 local_csr_wr[SAME_ME_SIGNAL, (&sig2 << 3)]
121 .set_sig sig2
122
123 local_csr_wr[SAME_ME_SIGNAL, (&sig3 << 3)]
124 .set_sig sig3
125 .end
126
127mpacket_receive_loop#:
128 /*
129 * Synchronise and wait for mpacket.
130 */
131 .begin
132 ctx_arb[sig1]
133 local_csr_wr[SAME_ME_SIGNAL, (0x80 | (&sig1 << 3))]
134
135 msf[fast_wr, --, add_to_rx_freelist, 0]
136 .set_sig mpacket_arrived
137 ctx_arb[mpacket_arrived]
138 .set $rsw0 $rsw1
139 .end
140
141 /*
142 * We halt if we see {inbparerr,parerr,null,soperror}.
143 */
144 .begin
145 alu_shf[--, 0x1b, and, $rsw0, >>8]
146 bne[abort_rswerr#]
147 .end
148
149 /*
150 * Point local memory pointer to this channel's state area.
151 */
152 .begin
153 .reg chanaddr
154
155 alu[chanaddr, $rsw0, and, 0x1f]
156 alu_shf[chanaddr, --, b, chanaddr, <<CHANNEL_STATE_SHIFT]
157 local_csr_wr[ACTIVE_LM_ADDR_0, chanaddr]
158 nop
159 nop
160 nop
161 .end
162
163 /*
164 * Check whether we received a SOP mpacket while we were already
165 * working on a packet, or a non-SOP mpacket while there was no
166 * packet pending. (SOP == RECEIVING -> abort) If everything's
167 * okay, update the RECEIVING flag to reflect our new state.
168 */
169 .begin
170 .reg temp
171 .reg eop
172
173 #if CHANNEL_FLAG_RECEIVING != 1
174 #error CHANNEL_FLAG_RECEIVING is not 1
175 #endif
176
177 alu_shf[temp, 1, and, $rsw0, >>15]
178 alu[temp, temp, xor, CHANNEL_FLAGS]
179 alu[--, temp, and, CHANNEL_FLAG_RECEIVING]
180 beq[abort_proterr#]
181
182 alu_shf[eop, 1, and, $rsw0, >>14]
183 alu[CHANNEL_FLAGS, temp, xor, eop]
184 .end
185
186 /*
187 * Copy the mpacket into the right spot, and in case of EOP,
188 * write back the descriptor and pass the packet on.
189 */
190 .begin
191 .reg buffer_offset
192 .reg _packet_length
193 .reg _packet_checksum
194 .reg _buffer_handle
195 .reg _buffer_start
196 .reg _buffer_length
197
198 /*
199 * Determine buffer_offset, _packet_length and
200 * _packet_checksum.
201 */
202 .begin
203 .reg temp
204
205 alu[--, 1, and, $rsw0, >>15]
206 beq[not_sop#]
207
208 immed[PACKET_LENGTH, 0]
209 immed[PACKET_CHECKSUM, 0]
210
211 not_sop#:
212 alu[buffer_offset, --, b, PACKET_LENGTH]
213 alu_shf[temp, 0xff, and, $rsw0, >>16]
214 alu[_packet_length, buffer_offset, +, temp]
215 alu[PACKET_LENGTH, --, b, _packet_length]
216
217 immed[temp, 0xffff]
218 alu[temp, $rsw1, and, temp]
219 alu[_packet_checksum, PACKET_CHECKSUM, +, temp]
220 alu[PACKET_CHECKSUM, --, b, _packet_checksum]
221 .end
222
223 /*
224 * Allocate buffer in case of SOP.
225 */
226 .begin
227 .reg temp
228
229 alu[temp, 1, and, $rsw0, >>15]
230 beq[skip_buffer_alloc#]
231
232 .begin
233 .sig zzz
234 .reg read $stemp $stemp2
235 .xfer_order $stemp $stemp2
236
237 rx_nobufs#:
238 scratch[get, $stemp, zero, 0, 1], ctx_swap[zzz]
239 alu[_buffer_handle, --, b, $stemp]
240 beq[rx_nobufs#]
241
242 sram[read, $stemp, _buffer_handle, 0, 2],
243 ctx_swap[zzz]
244 alu[_buffer_start, --, b, $stemp]
245 alu[_buffer_length, --, b, $stemp2]
246 .end
247
248 skip_buffer_alloc#:
249 .end
250
251 /*
252 * Resynchronise.
253 */
254 .begin
255 ctx_arb[sig2]
256 local_csr_wr[SAME_ME_SIGNAL, (0x80 | (&sig2 << 3))]
257 .end
258
259 /*
260 * Synchronise buffer state.
261 */
262 .begin
263 .reg temp
264
265 alu[temp, 1, and, $rsw0, >>15]
266 beq[copy_from_local_mem#]
267
268 alu[BUFFER_HANDLE, --, b, _buffer_handle]
269 alu[BUFFER_START, --, b, _buffer_start]
270 alu[BUFFER_LENGTH, --, b, _buffer_length]
271 br[sync_state_done#]
272
273 copy_from_local_mem#:
274 alu[_buffer_handle, --, b, BUFFER_HANDLE]
275 alu[_buffer_start, --, b, BUFFER_START]
276 alu[_buffer_length, --, b, BUFFER_LENGTH]
277
278 sync_state_done#:
279 .end
280
281#if 0
282 /*
283 * Debug buffer state management.
284 */
285 .begin
286 .reg temp
287
288 alu[temp, 1, and, $rsw0, >>14]
289 beq[no_poison#]
290 immed[BUFFER_HANDLE, 0xdead]
291 immed[BUFFER_START, 0xdead]
292 immed[BUFFER_LENGTH, 0xdead]
293 no_poison#:
294
295 immed[temp, 0xdead]
296 alu[--, _buffer_handle, -, temp]
297 beq[state_corrupted#]
298 alu[--, _buffer_start, -, temp]
299 beq[state_corrupted#]
300 alu[--, _buffer_length, -, temp]
301 beq[state_corrupted#]
302 .end
303#endif
304
305 /*
306 * Check buffer length.
307 */
308 .begin
309 alu[--, _buffer_length, -, _packet_length]
310 blo[buffer_overflow#]
311 .end
312
313 /*
314 * Copy the mpacket and give back the RBUF element.
315 */
316 .begin
317 .reg element
318 .reg xfer_size
319 .reg temp
320 .sig copy_sig
321
322 alu_shf[element, 0x7f, and, $rsw0, >>24]
323 alu_shf[xfer_size, 0xff, and, $rsw0, >>16]
324
325 alu[xfer_size, xfer_size, -, 1]
326 alu_shf[xfer_size, 0x10, or, xfer_size, >>3]
327 alu_shf[temp, 0x10, or, xfer_size, <<21]
328 alu_shf[temp, temp, or, element, <<11]
329 alu_shf[--, temp, or, 1, <<18]
330
331 dram[rbuf_rd, --, _buffer_start, buffer_offset, max_8],
332 indirect_ref, sig_done[copy_sig]
333 ctx_arb[copy_sig]
334
335 alu[temp, RBUF_ELEMENT_DONE, or, element, <<16]
336 msf[fast_wr, --, temp, 0]
337 .end
338
339 /*
340 * If EOP, write back the packet descriptor.
341 */
342 .begin
343 .reg write $stemp $stemp2
344 .xfer_order $stemp $stemp2
345 .sig zzz
346
347 alu_shf[--, 1, and, $rsw0, >>14]
348 beq[no_writeback#]
349
350 alu[$stemp, $rsw0, and, 0x1f]
351 alu[$stemp2, --, b, _packet_length]
352 sram[write, $stemp, _buffer_handle, 8, 2], ctx_swap[zzz]
353
354 no_writeback#:
355 .end
356
357 /*
358 * Resynchronise.
359 */
360 .begin
361 ctx_arb[sig3]
362 local_csr_wr[SAME_ME_SIGNAL, (0x80 | (&sig3 << 3))]
363 .end
364
365 /*
366 * If EOP, put the buffer back onto the scratch ring.
367 */
368 .begin
369 .reg write $stemp
370 .sig zzz
371
372 br_inp_state[SCR_Ring1_Status, rx_done_ring_overflow#]
373
374 alu_shf[--, 1, and, $rsw0, >>14]
375 beq[mpacket_receive_loop#]
376
377 alu[--, 1, and, $rsw0, >>10]
378 bne[rxerr#]
379
380 alu[$stemp, --, b, _buffer_handle]
381 scratch[put, $stemp, zero, 4, 1], ctx_swap[zzz]
382 cap[fast_wr, 0, XSCALE_INT_A]
383 br[mpacket_receive_loop#]
384
385 rxerr#:
386 alu[$stemp, --, b, _buffer_handle]
387 scratch[put, $stemp, zero, 0, 1], ctx_swap[zzz]
388 br[mpacket_receive_loop#]
389 .end
390 .end
391
392
393abort_rswerr#:
394 halt
395
396abort_proterr#:
397 halt
398
399state_corrupted#:
400 halt
401
402buffer_overflow#:
403 halt
404
405rx_done_ring_overflow#:
406 halt
407
408
diff --git a/drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.ucode b/drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.ucode
deleted file mode 100644
index e8aee2f81aad..000000000000
--- a/drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.ucode
+++ /dev/null
@@ -1,130 +0,0 @@
1static struct ixp2000_uengine_code ixp2400_rx =
2{
3 .cpu_model_bitmask = 0x000003fe,
4 .cpu_min_revision = 0,
5 .cpu_max_revision = 255,
6
7 .uengine_parameters = IXP2000_UENGINE_8_CONTEXTS |
8 IXP2000_UENGINE_PRN_UPDATE_EVERY |
9 IXP2000_UENGINE_NN_FROM_PREVIOUS |
10 IXP2000_UENGINE_ASSERT_EMPTY_AT_0 |
11 IXP2000_UENGINE_LM_ADDR1_PER_CONTEXT |
12 IXP2000_UENGINE_LM_ADDR0_PER_CONTEXT,
13
14 .initial_reg_values = (struct ixp2000_reg_value []) {
15 { -1, -1 }
16 },
17
18 .num_insns = 109,
19 .insns = (u8 []) {
20 0xf0, 0x00, 0x0c, 0xc0, 0x05,
21 0xf4, 0x44, 0x0c, 0x00, 0x05,
22 0xfc, 0x04, 0x4c, 0x00, 0x00,
23 0xf0, 0x00, 0x00, 0x3b, 0x00,
24 0xb4, 0x40, 0xf0, 0x3b, 0x1f,
25 0x8a, 0xc0, 0x50, 0x3e, 0x05,
26 0xb4, 0x40, 0xf0, 0x3b, 0x80,
27 0x9a, 0xe0, 0x00, 0x3e, 0x05,
28 0xf0, 0x00, 0x00, 0x07, 0x00,
29 0xd8, 0x05, 0xc0, 0x00, 0x11,
30 0xf0, 0x00, 0x00, 0x0f, 0x00,
31 0x91, 0xb0, 0x20, 0x0e, 0x00,
32 0xfc, 0x06, 0x60, 0x0b, 0x00,
33 0xf0, 0x00, 0x0c, 0x03, 0x00,
34 0xf0, 0x00, 0x0c, 0x03, 0x00,
35 0xf0, 0x00, 0x0c, 0x03, 0x00,
36 0xf0, 0x00, 0x0c, 0x02, 0x00,
37 0xb0, 0xc0, 0x30, 0x0f, 0x01,
38 0xa4, 0x70, 0x00, 0x0f, 0x20,
39 0xd8, 0x02, 0xc0, 0x01, 0x00,
40 0xfc, 0x10, 0xac, 0x23, 0x08,
41 0xfc, 0x10, 0xac, 0x43, 0x10,
42 0xfc, 0x10, 0xac, 0x63, 0x18,
43 0xe0, 0x00, 0x00, 0x00, 0x02,
44 0xfc, 0x10, 0xae, 0x23, 0x88,
45 0x3d, 0x00, 0x04, 0x03, 0x20,
46 0xe0, 0x00, 0x00, 0x00, 0x10,
47 0x84, 0x82, 0x02, 0x01, 0x3b,
48 0xd8, 0x1a, 0x00, 0x01, 0x01,
49 0xb4, 0x00, 0x8c, 0x7d, 0x80,
50 0x91, 0xb0, 0x80, 0x22, 0x00,
51 0xfc, 0x06, 0x60, 0x23, 0x00,
52 0xf0, 0x00, 0x0c, 0x03, 0x00,
53 0xf0, 0x00, 0x0c, 0x03, 0x00,
54 0xf0, 0x00, 0x0c, 0x03, 0x00,
55 0x94, 0xf0, 0x92, 0x01, 0x21,
56 0xac, 0x40, 0x60, 0x26, 0x00,
57 0xa4, 0x30, 0x0c, 0x04, 0x06,
58 0xd8, 0x1a, 0x40, 0x01, 0x00,
59 0x94, 0xe0, 0xa2, 0x01, 0x21,
60 0xac, 0x20, 0x00, 0x28, 0x06,
61 0x84, 0xf2, 0x02, 0x01, 0x21,
62 0xd8, 0x0b, 0x40, 0x01, 0x00,
63 0xf0, 0x00, 0x0c, 0x02, 0x01,
64 0xf0, 0x00, 0x0c, 0x02, 0x02,
65 0xa0, 0x00, 0x08, 0x04, 0x00,
66 0x95, 0x00, 0xc6, 0x01, 0xff,
67 0xa0, 0x80, 0x10, 0x30, 0x00,
68 0xa0, 0x60, 0x1c, 0x00, 0x01,
69 0xf0, 0x0f, 0xf0, 0x33, 0xff,
70 0xb4, 0x00, 0xc0, 0x31, 0x81,
71 0xb0, 0x80, 0xb0, 0x32, 0x02,
72 0xa0, 0x20, 0x20, 0x2c, 0x00,
73 0x94, 0xf0, 0xd2, 0x01, 0x21,
74 0xd8, 0x0f, 0x40, 0x01, 0x00,
75 0x19, 0x40, 0x10, 0x04, 0x20,
76 0xa0, 0x00, 0x26, 0x04, 0x00,
77 0xd8, 0x0d, 0xc0, 0x01, 0x00,
78 0x00, 0x42, 0x10, 0x80, 0x02,
79 0xb0, 0x00, 0x46, 0x04, 0x00,
80 0xb0, 0x00, 0x56, 0x08, 0x00,
81 0xe0, 0x00, 0x00, 0x00, 0x04,
82 0xfc, 0x10, 0xae, 0x43, 0x90,
83 0x84, 0xf0, 0x32, 0x01, 0x21,
84 0xd8, 0x11, 0x40, 0x01, 0x00,
85 0xa0, 0x60, 0x3c, 0x00, 0x02,
86 0xa0, 0x20, 0x40, 0x10, 0x00,
87 0xa0, 0x20, 0x50, 0x14, 0x00,
88 0xd8, 0x12, 0x00, 0x00, 0x18,
89 0xa0, 0x00, 0x28, 0x0c, 0x00,
90 0xb0, 0x00, 0x48, 0x10, 0x00,
91 0xb0, 0x00, 0x58, 0x14, 0x00,
92 0xaa, 0xf0, 0x00, 0x14, 0x01,
93 0xd8, 0x1a, 0xc0, 0x01, 0x05,
94 0x85, 0x80, 0x42, 0x01, 0xff,
95 0x95, 0x00, 0x66, 0x01, 0xff,
96 0xba, 0xc0, 0x60, 0x1b, 0x01,
97 0x9a, 0x30, 0x60, 0x19, 0x30,
98 0x9a, 0xb0, 0x70, 0x1a, 0x30,
99 0x9b, 0x50, 0x78, 0x1e, 0x04,
100 0x8a, 0xe2, 0x08, 0x1e, 0x21,
101 0x6a, 0x4e, 0x00, 0x13, 0x00,
102 0xe0, 0x00, 0x00, 0x00, 0x30,
103 0x9b, 0x00, 0x7a, 0x92, 0x04,
104 0x3d, 0x00, 0x04, 0x1f, 0x20,
105 0x84, 0xe2, 0x02, 0x01, 0x21,
106 0xd8, 0x16, 0x80, 0x01, 0x00,
107 0xa4, 0x18, 0x0c, 0x7d, 0x80,
108 0xa0, 0x58, 0x1c, 0x00, 0x01,
109 0x01, 0x42, 0x00, 0xa0, 0x02,
110 0xe0, 0x00, 0x00, 0x00, 0x08,
111 0xfc, 0x10, 0xae, 0x63, 0x98,
112 0xd8, 0x1b, 0x00, 0xc2, 0x14,
113 0x84, 0xe2, 0x02, 0x01, 0x21,
114 0xd8, 0x05, 0xc0, 0x01, 0x00,
115 0x84, 0xa2, 0x02, 0x01, 0x21,
116 0xd8, 0x19, 0x40, 0x01, 0x01,
117 0xa0, 0x58, 0x0c, 0x00, 0x02,
118 0x1a, 0x40, 0x00, 0x04, 0x24,
119 0x33, 0x00, 0x01, 0x2f, 0x20,
120 0xd8, 0x05, 0xc0, 0x00, 0x18,
121 0xa0, 0x58, 0x0c, 0x00, 0x02,
122 0x1a, 0x40, 0x00, 0x04, 0x20,
123 0xd8, 0x05, 0xc0, 0x00, 0x18,
124 0xe0, 0x00, 0x02, 0x00, 0x00,
125 0xe0, 0x00, 0x02, 0x00, 0x00,
126 0xe0, 0x00, 0x02, 0x00, 0x00,
127 0xe0, 0x00, 0x02, 0x00, 0x00,
128 0xe0, 0x00, 0x02, 0x00, 0x00,
129 }
130};
diff --git a/drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.uc b/drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.uc
deleted file mode 100644
index d090d1884fb7..000000000000
--- a/drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.uc
+++ /dev/null
@@ -1,272 +0,0 @@
1/*
2 * TX ucode for the Intel IXP2400 in POS-PHY mode.
3 * Copyright (C) 2004, 2005 Lennert Buytenhek
4 * Dedicated to Marija Kulikova.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * Assumptions made in this code:
12 * - The IXP2400 MSF is configured for POS-PHY mode, in a mode where
13 * only one TBUF partition is used. This includes, for example,
14 * 1x32 SPHY and 1x32 MPHY32, but not 4x8 SPHY or 1x32 MPHY4. (This
15 * is not an exhaustive list.)
16 * - The TBUF uses 64-byte mpackets.
17 * - TX descriptors reside in SRAM, and have the following format:
18 * struct tx_desc
19 * {
20 * // to uengine
21 * u32 buf_phys_addr;
22 * u32 pkt_length;
23 * u32 channel;
24 * };
25 * - Packet data resides in DRAM.
26 * - Packet buffer addresses are 8-byte aligned.
27 * - Scratch ring 2 is tx_pending.
28 * - Scratch ring 3 is tx_done, and has status condition 'full'.
29 * - This code is run on all eight threads of the microengine it runs on.
30 */
31
32#define TX_SEQUENCE_0 0x0060
33#define TBUF_CTRL 0x1800
34
35#define PARTITION_SIZE 128
36#define PARTITION_THRESH 96
37
38
39 .sig volatile sig1
40 .sig volatile sig2
41 .sig volatile sig3
42
43 .reg @old_tx_seq_0
44 .reg @mpkts_in_flight
45 .reg @next_tbuf_mpacket
46
47 .reg @buffer_handle
48 .reg @buffer_start
49 .reg @packet_length
50 .reg @channel
51 .reg @packet_offset
52
53 .reg zero
54
55 immed[zero, 0]
56
57 /*
58 * Skip context 0 initialisation?
59 */
60 .begin
61 br!=ctx[0, mpacket_tx_loop#]
62 .end
63
64 /*
65 * Wait until all pending TBUF elements have been transmitted.
66 */
67 .begin
68 .reg read $tx
69 .sig zzz
70
71 loop_empty#:
72 msf[read, $tx, zero, TX_SEQUENCE_0, 1], ctx_swap[zzz]
73 alu_shf[--, --, b, $tx, >>31]
74 beq[loop_empty#]
75
76 alu[@old_tx_seq_0, --, b, $tx]
77 .end
78
79 immed[@mpkts_in_flight, 0]
80 alu[@next_tbuf_mpacket, @old_tx_seq_0, and, (PARTITION_SIZE - 1)]
81
82 immed[@buffer_handle, 0]
83
84 /*
85 * Initialise signal pipeline.
86 */
87 .begin
88 local_csr_wr[SAME_ME_SIGNAL, (&sig1 << 3)]
89 .set_sig sig1
90
91 local_csr_wr[SAME_ME_SIGNAL, (&sig2 << 3)]
92 .set_sig sig2
93
94 local_csr_wr[SAME_ME_SIGNAL, (&sig3 << 3)]
95 .set_sig sig3
96 .end
97
98mpacket_tx_loop#:
99 .begin
100 .reg tbuf_element_index
101 .reg buffer_handle
102 .reg sop_eop
103 .reg packet_data
104 .reg channel
105 .reg mpacket_size
106
107 /*
108 * If there is no packet currently being transmitted,
109 * dequeue the next TX descriptor, and fetch the buffer
110 * address, packet length and destination channel number.
111 */
112 .begin
113 .reg read $stemp $stemp2 $stemp3
114 .xfer_order $stemp $stemp2 $stemp3
115 .sig zzz
116
117 ctx_arb[sig1]
118
119 alu[--, --, b, @buffer_handle]
120 bne[already_got_packet#]
121
122 tx_nobufs#:
123 scratch[get, $stemp, zero, 8, 1], ctx_swap[zzz]
124 alu[@buffer_handle, --, b, $stemp]
125 beq[tx_nobufs#]
126
127 sram[read, $stemp, $stemp, 0, 3], ctx_swap[zzz]
128 alu[@buffer_start, --, b, $stemp]
129 alu[@packet_length, --, b, $stemp2]
130 beq[zero_byte_packet#]
131 alu[@channel, --, b, $stemp3]
132 immed[@packet_offset, 0]
133
134 already_got_packet#:
135 local_csr_wr[SAME_ME_SIGNAL, (0x80 | (&sig1 << 3))]
136 .end
137
138 /*
139 * Determine tbuf element index, SOP/EOP flags, mpacket
140 * offset and mpacket size and cache buffer_handle and
141 * channel number.
142 */
143 .begin
144 alu[tbuf_element_index, --, b, @next_tbuf_mpacket]
145 alu[@next_tbuf_mpacket, @next_tbuf_mpacket, +, 1]
146 alu[@next_tbuf_mpacket, @next_tbuf_mpacket, and,
147 (PARTITION_SIZE - 1)]
148
149 alu[buffer_handle, --, b, @buffer_handle]
150 immed[@buffer_handle, 0]
151
152 immed[sop_eop, 1]
153
154 alu[packet_data, --, b, @packet_offset]
155 bne[no_sop#]
156 alu[sop_eop, sop_eop, or, 2]
157 no_sop#:
158 alu[packet_data, packet_data, +, @buffer_start]
159
160 alu[channel, --, b, @channel]
161
162 alu[mpacket_size, @packet_length, -, @packet_offset]
163 alu[--, 64, -, mpacket_size]
164 bhs[eop#]
165 alu[@buffer_handle, --, b, buffer_handle]
166 immed[mpacket_size, 64]
167 alu[sop_eop, sop_eop, and, 2]
168 eop#:
169
170 alu[@packet_offset, @packet_offset, +, mpacket_size]
171 .end
172
173 /*
174 * Wait until there's enough space in the TBUF.
175 */
176 .begin
177 .reg read $tx
178 .reg temp
179 .sig zzz
180
181 ctx_arb[sig2]
182
183 br[test_space#]
184
185 loop_space#:
186 msf[read, $tx, zero, TX_SEQUENCE_0, 1], ctx_swap[zzz]
187
188 alu[temp, $tx, -, @old_tx_seq_0]
189 alu[temp, temp, and, 0xff]
190 alu[@mpkts_in_flight, @mpkts_in_flight, -, temp]
191
192 alu[@old_tx_seq_0, --, b, $tx]
193
194 test_space#:
195 alu[--, PARTITION_THRESH, -, @mpkts_in_flight]
196 blo[loop_space#]
197
198 alu[@mpkts_in_flight, @mpkts_in_flight, +, 1]
199
200 local_csr_wr[SAME_ME_SIGNAL, (0x80 | (&sig2 << 3))]
201 .end
202
203 /*
204 * Copy the packet data to the TBUF.
205 */
206 .begin
207 .reg temp
208 .sig copy_sig
209
210 alu[temp, mpacket_size, -, 1]
211 alu_shf[temp, 0x10, or, temp, >>3]
212 alu_shf[temp, 0x10, or, temp, <<21]
213 alu_shf[temp, temp, or, tbuf_element_index, <<11]
214 alu_shf[--, temp, or, 1, <<18]
215
216 dram[tbuf_wr, --, packet_data, 0, max_8],
217 indirect_ref, sig_done[copy_sig]
218 ctx_arb[copy_sig]
219 .end
220
221 /*
222 * Mark TBUF element as ready-to-be-transmitted.
223 */
224 .begin
225 .reg write $tsw $tsw2
226 .xfer_order $tsw $tsw2
227 .reg temp
228 .sig zzz
229
230 alu_shf[temp, channel, or, mpacket_size, <<24]
231 alu_shf[$tsw, temp, or, sop_eop, <<8]
232 immed[$tsw2, 0]
233
234 immed[temp, TBUF_CTRL]
235 alu_shf[temp, temp, or, tbuf_element_index, <<3]
236 msf[write, $tsw, temp, 0, 2], ctx_swap[zzz]
237 .end
238
239 /*
240 * Resynchronise.
241 */
242 .begin
243 ctx_arb[sig3]
244 local_csr_wr[SAME_ME_SIGNAL, (0x80 | (&sig3 << 3))]
245 .end
246
247 /*
248 * If this was an EOP mpacket, recycle the TX buffer
249 * and signal the host.
250 */
251 .begin
252 .reg write $stemp
253 .sig zzz
254
255 alu[--, sop_eop, and, 1]
256 beq[mpacket_tx_loop#]
257
258 tx_done_ring_full#:
259 br_inp_state[SCR_Ring3_Status, tx_done_ring_full#]
260
261 alu[$stemp, --, b, buffer_handle]
262 scratch[put, $stemp, zero, 12, 1], ctx_swap[zzz]
263 cap[fast_wr, 0, XSCALE_INT_A]
264 br[mpacket_tx_loop#]
265 .end
266 .end
267
268
269zero_byte_packet#:
270 halt
271
272
diff --git a/drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.ucode b/drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.ucode
deleted file mode 100644
index a433e24b0a51..000000000000
--- a/drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.ucode
+++ /dev/null
@@ -1,98 +0,0 @@
1static struct ixp2000_uengine_code ixp2400_tx =
2{
3 .cpu_model_bitmask = 0x000003fe,
4 .cpu_min_revision = 0,
5 .cpu_max_revision = 255,
6
7 .uengine_parameters = IXP2000_UENGINE_8_CONTEXTS |
8 IXP2000_UENGINE_PRN_UPDATE_EVERY |
9 IXP2000_UENGINE_NN_FROM_PREVIOUS |
10 IXP2000_UENGINE_ASSERT_EMPTY_AT_0 |
11 IXP2000_UENGINE_LM_ADDR1_PER_CONTEXT |
12 IXP2000_UENGINE_LM_ADDR0_PER_CONTEXT,
13
14 .initial_reg_values = (struct ixp2000_reg_value []) {
15 { -1, -1 }
16 },
17
18 .num_insns = 77,
19 .insns = (u8 []) {
20 0xf0, 0x00, 0x00, 0x07, 0x00,
21 0xd8, 0x03, 0x00, 0x00, 0x11,
22 0x3c, 0x40, 0x00, 0x04, 0xe0,
23 0x81, 0xf2, 0x02, 0x01, 0x00,
24 0xd8, 0x00, 0x80, 0x01, 0x00,
25 0xb0, 0x08, 0x06, 0x00, 0x00,
26 0xf0, 0x00, 0x0c, 0x00, 0x80,
27 0xb4, 0x49, 0x02, 0x03, 0x7f,
28 0xf0, 0x00, 0x02, 0x83, 0x00,
29 0xfc, 0x10, 0xac, 0x23, 0x08,
30 0xfc, 0x10, 0xac, 0x43, 0x10,
31 0xfc, 0x10, 0xac, 0x63, 0x18,
32 0xe0, 0x00, 0x00, 0x00, 0x02,
33 0xa0, 0x30, 0x02, 0x80, 0x00,
34 0xd8, 0x06, 0x00, 0x01, 0x01,
35 0x19, 0x40, 0x00, 0x04, 0x28,
36 0xb0, 0x0a, 0x06, 0x00, 0x00,
37 0xd8, 0x03, 0xc0, 0x01, 0x00,
38 0x00, 0x44, 0x00, 0x80, 0x80,
39 0xa0, 0x09, 0x06, 0x00, 0x00,
40 0xb0, 0x0b, 0x06, 0x04, 0x00,
41 0xd8, 0x13, 0x00, 0x01, 0x00,
42 0xb0, 0x0c, 0x06, 0x08, 0x00,
43 0xf0, 0x00, 0x0c, 0x00, 0xa0,
44 0xfc, 0x10, 0xae, 0x23, 0x88,
45 0xa0, 0x00, 0x12, 0x40, 0x00,
46 0xb0, 0xc9, 0x02, 0x43, 0x01,
47 0xb4, 0x49, 0x02, 0x43, 0x7f,
48 0xb0, 0x00, 0x22, 0x80, 0x00,
49 0xf0, 0x00, 0x02, 0x83, 0x00,
50 0xf0, 0x00, 0x0c, 0x04, 0x02,
51 0xb0, 0x40, 0x6c, 0x00, 0xa0,
52 0xd8, 0x08, 0x80, 0x01, 0x01,
53 0xaa, 0x00, 0x2c, 0x08, 0x02,
54 0xa0, 0xc0, 0x30, 0x18, 0x90,
55 0xa0, 0x00, 0x43, 0x00, 0x00,
56 0xba, 0xc0, 0x32, 0xc0, 0xa0,
57 0xaa, 0xb0, 0x00, 0x0f, 0x40,
58 0xd8, 0x0a, 0x80, 0x01, 0x04,
59 0xb0, 0x0a, 0x00, 0x08, 0x00,
60 0xf0, 0x00, 0x00, 0x0f, 0x40,
61 0xa4, 0x00, 0x2c, 0x08, 0x02,
62 0xa0, 0x8a, 0x00, 0x0c, 0xa0,
63 0xe0, 0x00, 0x00, 0x00, 0x04,
64 0xd8, 0x0c, 0x80, 0x00, 0x18,
65 0x3c, 0x40, 0x00, 0x04, 0xe0,
66 0xba, 0x80, 0x42, 0x01, 0x80,
67 0xb4, 0x40, 0x40, 0x13, 0xff,
68 0xaa, 0x88, 0x00, 0x10, 0x80,
69 0xb0, 0x08, 0x06, 0x00, 0x00,
70 0xaa, 0xf0, 0x0d, 0x80, 0x80,
71 0xd8, 0x0b, 0x40, 0x01, 0x05,
72 0xa0, 0x88, 0x0c, 0x04, 0x80,
73 0xfc, 0x10, 0xae, 0x43, 0x90,
74 0xba, 0xc0, 0x50, 0x0f, 0x01,
75 0x9a, 0x30, 0x50, 0x15, 0x30,
76 0x9a, 0xb0, 0x50, 0x16, 0x30,
77 0x9b, 0x50, 0x58, 0x16, 0x01,
78 0x8a, 0xe2, 0x08, 0x16, 0x21,
79 0x6b, 0x4e, 0x00, 0x83, 0x03,
80 0xe0, 0x00, 0x00, 0x00, 0x30,
81 0x9a, 0x80, 0x70, 0x0e, 0x04,
82 0x8b, 0x88, 0x08, 0x1e, 0x02,
83 0xf0, 0x00, 0x0c, 0x01, 0x81,
84 0xf0, 0x01, 0x80, 0x1f, 0x00,
85 0x9b, 0xd0, 0x78, 0x1e, 0x01,
86 0x3d, 0x42, 0x00, 0x1c, 0x20,
87 0xe0, 0x00, 0x00, 0x00, 0x08,
88 0xfc, 0x10, 0xae, 0x63, 0x98,
89 0xa4, 0x30, 0x0c, 0x04, 0x02,
90 0xd8, 0x03, 0x00, 0x01, 0x00,
91 0xd8, 0x11, 0xc1, 0x42, 0x14,
92 0xa0, 0x18, 0x00, 0x08, 0x00,
93 0x1a, 0x40, 0x00, 0x04, 0x2c,
94 0x33, 0x00, 0x01, 0x2f, 0x20,
95 0xd8, 0x03, 0x00, 0x00, 0x18,
96 0xe0, 0x00, 0x02, 0x00, 0x00,
97 }
98};
diff --git a/drivers/net/ethernet/xscale/ixp2000/ixpdev.c b/drivers/net/ethernet/xscale/ixp2000/ixpdev.c
deleted file mode 100644
index 45008377c8bf..000000000000
--- a/drivers/net/ethernet/xscale/ixp2000/ixpdev.c
+++ /dev/null
@@ -1,437 +0,0 @@
1/*
2 * IXP2000 MSF network device driver
3 * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
4 * Dedicated to Marija Kulikova.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/netdevice.h>
15#include <linux/etherdevice.h>
16#include <linux/init.h>
17#include <linux/interrupt.h>
18#include <linux/moduleparam.h>
19#include <linux/gfp.h>
20#include <asm/hardware/uengine.h>
21#include <asm/io.h>
22#include "ixp2400_rx.ucode"
23#include "ixp2400_tx.ucode"
24#include "ixpdev_priv.h"
25#include "ixpdev.h"
26#include "pm3386.h"
27
28#define DRV_MODULE_VERSION "0.2"
29
30static int nds_count;
31static struct net_device **nds;
32static int nds_open;
33static void (*set_port_admin_status)(int port, int up);
34
35static struct ixpdev_rx_desc * const rx_desc =
36 (struct ixpdev_rx_desc *)(IXP2000_SRAM0_VIRT_BASE + RX_BUF_DESC_BASE);
37static struct ixpdev_tx_desc * const tx_desc =
38 (struct ixpdev_tx_desc *)(IXP2000_SRAM0_VIRT_BASE + TX_BUF_DESC_BASE);
39static int tx_pointer;
40
41
42static int ixpdev_xmit(struct sk_buff *skb, struct net_device *dev)
43{
44 struct ixpdev_priv *ip = netdev_priv(dev);
45 struct ixpdev_tx_desc *desc;
46 int entry;
47 unsigned long flags;
48
49 if (unlikely(skb->len > PAGE_SIZE)) {
50 /* @@@ Count drops. */
51 dev_kfree_skb(skb);
52 return NETDEV_TX_OK;
53 }
54
55 entry = tx_pointer;
56 tx_pointer = (tx_pointer + 1) % TX_BUF_COUNT;
57
58 desc = tx_desc + entry;
59 desc->pkt_length = skb->len;
60 desc->channel = ip->channel;
61
62 skb_copy_and_csum_dev(skb, phys_to_virt(desc->buf_addr));
63 dev_kfree_skb(skb);
64
65 ixp2000_reg_write(RING_TX_PENDING,
66 TX_BUF_DESC_BASE + (entry * sizeof(struct ixpdev_tx_desc)));
67
68 local_irq_save(flags);
69 ip->tx_queue_entries++;
70 if (ip->tx_queue_entries == TX_BUF_COUNT_PER_CHAN)
71 netif_stop_queue(dev);
72 local_irq_restore(flags);
73
74 return NETDEV_TX_OK;
75}
76
77
78static int ixpdev_rx(struct net_device *dev, int processed, int budget)
79{
80 while (processed < budget) {
81 struct ixpdev_rx_desc *desc;
82 struct sk_buff *skb;
83 void *buf;
84 u32 _desc;
85
86 _desc = ixp2000_reg_read(RING_RX_DONE);
87 if (_desc == 0)
88 return 0;
89
90 desc = rx_desc +
91 ((_desc - RX_BUF_DESC_BASE) / sizeof(struct ixpdev_rx_desc));
92 buf = phys_to_virt(desc->buf_addr);
93
94 if (desc->pkt_length < 4 || desc->pkt_length > PAGE_SIZE) {
95 printk(KERN_ERR "ixp2000: rx err, length %d\n",
96 desc->pkt_length);
97 goto err;
98 }
99
100 if (desc->channel < 0 || desc->channel >= nds_count) {
101 printk(KERN_ERR "ixp2000: rx err, channel %d\n",
102 desc->channel);
103 goto err;
104 }
105
106 /* @@@ Make FCS stripping configurable. */
107 desc->pkt_length -= 4;
108
109 if (unlikely(!netif_running(nds[desc->channel])))
110 goto err;
111
112 skb = netdev_alloc_skb_ip_align(dev, desc->pkt_length);
113 if (likely(skb != NULL)) {
114 skb_copy_to_linear_data(skb, buf, desc->pkt_length);
115 skb_put(skb, desc->pkt_length);
116 skb->protocol = eth_type_trans(skb, nds[desc->channel]);
117
118 netif_receive_skb(skb);
119 }
120
121err:
122 ixp2000_reg_write(RING_RX_PENDING, _desc);
123 processed++;
124 }
125
126 return processed;
127}
128
129/* dev always points to nds[0]. */
130static int ixpdev_poll(struct napi_struct *napi, int budget)
131{
132 struct ixpdev_priv *ip = container_of(napi, struct ixpdev_priv, napi);
133 struct net_device *dev = ip->dev;
134 int rx;
135
136 rx = 0;
137 do {
138 ixp2000_reg_write(IXP2000_IRQ_THD_RAW_STATUS_A_0, 0x00ff);
139
140 rx = ixpdev_rx(dev, rx, budget);
141 if (rx >= budget)
142 break;
143 } while (ixp2000_reg_read(IXP2000_IRQ_THD_RAW_STATUS_A_0) & 0x00ff);
144
145 napi_complete(napi);
146 ixp2000_reg_write(IXP2000_IRQ_THD_ENABLE_SET_A_0, 0x00ff);
147
148 return rx;
149}
150
151static void ixpdev_tx_complete(void)
152{
153 int channel;
154 u32 wake;
155
156 wake = 0;
157 while (1) {
158 struct ixpdev_priv *ip;
159 u32 desc;
160 int entry;
161
162 desc = ixp2000_reg_read(RING_TX_DONE);
163 if (desc == 0)
164 break;
165
166 /* @@@ Check whether entries come back in order. */
167 entry = (desc - TX_BUF_DESC_BASE) / sizeof(struct ixpdev_tx_desc);
168 channel = tx_desc[entry].channel;
169
170 if (channel < 0 || channel >= nds_count) {
171 printk(KERN_ERR "ixp2000: txcomp channel index "
172 "out of bounds (%d, %.8i, %d)\n",
173 channel, (unsigned int)desc, entry);
174 continue;
175 }
176
177 ip = netdev_priv(nds[channel]);
178 if (ip->tx_queue_entries == TX_BUF_COUNT_PER_CHAN)
179 wake |= 1 << channel;
180 ip->tx_queue_entries--;
181 }
182
183 for (channel = 0; wake != 0; channel++) {
184 if (wake & (1 << channel)) {
185 netif_wake_queue(nds[channel]);
186 wake &= ~(1 << channel);
187 }
188 }
189}
190
191static irqreturn_t ixpdev_interrupt(int irq, void *dev_id)
192{
193 u32 status;
194
195 status = ixp2000_reg_read(IXP2000_IRQ_THD_STATUS_A_0);
196 if (status == 0)
197 return IRQ_NONE;
198
199 /*
200 * Any of the eight receive units signaled RX?
201 */
202 if (status & 0x00ff) {
203 struct net_device *dev = nds[0];
204 struct ixpdev_priv *ip = netdev_priv(dev);
205
206 ixp2000_reg_wrb(IXP2000_IRQ_THD_ENABLE_CLEAR_A_0, 0x00ff);
207 if (likely(napi_schedule_prep(&ip->napi))) {
208 __napi_schedule(&ip->napi);
209 } else {
210 printk(KERN_CRIT "ixp2000: irq while polling!!\n");
211 }
212 }
213
214 /*
215 * Any of the eight transmit units signaled TXdone?
216 */
217 if (status & 0xff00) {
218 ixp2000_reg_wrb(IXP2000_IRQ_THD_RAW_STATUS_A_0, 0xff00);
219 ixpdev_tx_complete();
220 }
221
222 return IRQ_HANDLED;
223}
224
225#ifdef CONFIG_NET_POLL_CONTROLLER
226static void ixpdev_poll_controller(struct net_device *dev)
227{
228 disable_irq(IRQ_IXP2000_THDA0);
229 ixpdev_interrupt(IRQ_IXP2000_THDA0, dev);
230 enable_irq(IRQ_IXP2000_THDA0);
231}
232#endif
233
234static int ixpdev_open(struct net_device *dev)
235{
236 struct ixpdev_priv *ip = netdev_priv(dev);
237 int err;
238
239 napi_enable(&ip->napi);
240 if (!nds_open++) {
241 err = request_irq(IRQ_IXP2000_THDA0, ixpdev_interrupt,
242 IRQF_SHARED, "ixp2000_eth", nds);
243 if (err) {
244 nds_open--;
245 napi_disable(&ip->napi);
246 return err;
247 }
248
249 ixp2000_reg_write(IXP2000_IRQ_THD_ENABLE_SET_A_0, 0xffff);
250 }
251
252 set_port_admin_status(ip->channel, 1);
253 netif_start_queue(dev);
254
255 return 0;
256}
257
258static int ixpdev_close(struct net_device *dev)
259{
260 struct ixpdev_priv *ip = netdev_priv(dev);
261
262 netif_stop_queue(dev);
263 napi_disable(&ip->napi);
264 set_port_admin_status(ip->channel, 0);
265
266 if (!--nds_open) {
267 ixp2000_reg_write(IXP2000_IRQ_THD_ENABLE_CLEAR_A_0, 0xffff);
268 free_irq(IRQ_IXP2000_THDA0, nds);
269 }
270
271 return 0;
272}
273
274static struct net_device_stats *ixpdev_get_stats(struct net_device *dev)
275{
276 struct ixpdev_priv *ip = netdev_priv(dev);
277
278 pm3386_get_stats(ip->channel, &(dev->stats));
279
280 return &(dev->stats);
281}
282
283static const struct net_device_ops ixpdev_netdev_ops = {
284 .ndo_open = ixpdev_open,
285 .ndo_stop = ixpdev_close,
286 .ndo_start_xmit = ixpdev_xmit,
287 .ndo_change_mtu = eth_change_mtu,
288 .ndo_validate_addr = eth_validate_addr,
289 .ndo_set_mac_address = eth_mac_addr,
290 .ndo_get_stats = ixpdev_get_stats,
291#ifdef CONFIG_NET_POLL_CONTROLLER
292 .ndo_poll_controller = ixpdev_poll_controller,
293#endif
294};
295
296struct net_device *ixpdev_alloc(int channel, int sizeof_priv)
297{
298 struct net_device *dev;
299 struct ixpdev_priv *ip;
300
301 dev = alloc_etherdev(sizeof_priv);
302 if (dev == NULL)
303 return NULL;
304
305 dev->netdev_ops = &ixpdev_netdev_ops;
306
307 dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
308
309 ip = netdev_priv(dev);
310 ip->dev = dev;
311 netif_napi_add(dev, &ip->napi, ixpdev_poll, 64);
312 ip->channel = channel;
313 ip->tx_queue_entries = 0;
314
315 return dev;
316}
317
318int ixpdev_init(int __nds_count, struct net_device **__nds,
319 void (*__set_port_admin_status)(int port, int up))
320{
321 int i;
322 int err;
323
324 BUILD_BUG_ON(RX_BUF_COUNT > 192 || TX_BUF_COUNT > 192);
325
326 printk(KERN_INFO "IXP2000 MSF ethernet driver %s\n", DRV_MODULE_VERSION);
327
328 nds_count = __nds_count;
329 nds = __nds;
330 set_port_admin_status = __set_port_admin_status;
331
332 for (i = 0; i < RX_BUF_COUNT; i++) {
333 void *buf;
334
335 buf = (void *)get_zeroed_page(GFP_KERNEL);
336 if (buf == NULL) {
337 err = -ENOMEM;
338 while (--i >= 0)
339 free_page((unsigned long)phys_to_virt(rx_desc[i].buf_addr));
340 goto err_out;
341 }
342 rx_desc[i].buf_addr = virt_to_phys(buf);
343 rx_desc[i].buf_length = PAGE_SIZE;
344 }
345
346 /* @@@ Maybe we shouldn't be preallocating TX buffers. */
347 for (i = 0; i < TX_BUF_COUNT; i++) {
348 void *buf;
349
350 buf = (void *)get_zeroed_page(GFP_KERNEL);
351 if (buf == NULL) {
352 err = -ENOMEM;
353 while (--i >= 0)
354 free_page((unsigned long)phys_to_virt(tx_desc[i].buf_addr));
355 goto err_free_rx;
356 }
357 tx_desc[i].buf_addr = virt_to_phys(buf);
358 }
359
360 /* 256 entries, ring status set means 'empty', base address 0x0000. */
361 ixp2000_reg_write(RING_RX_PENDING_BASE, 0x44000000);
362 ixp2000_reg_write(RING_RX_PENDING_HEAD, 0x00000000);
363 ixp2000_reg_write(RING_RX_PENDING_TAIL, 0x00000000);
364
365 /* 256 entries, ring status set means 'full', base address 0x0400. */
366 ixp2000_reg_write(RING_RX_DONE_BASE, 0x40000400);
367 ixp2000_reg_write(RING_RX_DONE_HEAD, 0x00000000);
368 ixp2000_reg_write(RING_RX_DONE_TAIL, 0x00000000);
369
370 for (i = 0; i < RX_BUF_COUNT; i++) {
371 ixp2000_reg_write(RING_RX_PENDING,
372 RX_BUF_DESC_BASE + (i * sizeof(struct ixpdev_rx_desc)));
373 }
374
375 ixp2000_uengine_load(0, &ixp2400_rx);
376 ixp2000_uengine_start_contexts(0, 0xff);
377
378 /* 256 entries, ring status set means 'empty', base address 0x0800. */
379 ixp2000_reg_write(RING_TX_PENDING_BASE, 0x44000800);
380 ixp2000_reg_write(RING_TX_PENDING_HEAD, 0x00000000);
381 ixp2000_reg_write(RING_TX_PENDING_TAIL, 0x00000000);
382
383 /* 256 entries, ring status set means 'full', base address 0x0c00. */
384 ixp2000_reg_write(RING_TX_DONE_BASE, 0x40000c00);
385 ixp2000_reg_write(RING_TX_DONE_HEAD, 0x00000000);
386 ixp2000_reg_write(RING_TX_DONE_TAIL, 0x00000000);
387
388 ixp2000_uengine_load(1, &ixp2400_tx);
389 ixp2000_uengine_start_contexts(1, 0xff);
390
391 for (i = 0; i < nds_count; i++) {
392 err = register_netdev(nds[i]);
393 if (err) {
394 while (--i >= 0)
395 unregister_netdev(nds[i]);
396 goto err_free_tx;
397 }
398 }
399
400 for (i = 0; i < nds_count; i++) {
401 printk(KERN_INFO "%s: IXP2000 MSF ethernet (port %d), %pM.\n",
402 nds[i]->name, i, nds[i]->dev_addr);
403 }
404
405 return 0;
406
407err_free_tx:
408 for (i = 0; i < TX_BUF_COUNT; i++)
409 free_page((unsigned long)phys_to_virt(tx_desc[i].buf_addr));
410
411err_free_rx:
412 for (i = 0; i < RX_BUF_COUNT; i++)
413 free_page((unsigned long)phys_to_virt(rx_desc[i].buf_addr));
414
415err_out:
416 return err;
417}
418
419void ixpdev_deinit(void)
420{
421 int i;
422
423 /* @@@ Flush out pending packets. */
424
425 for (i = 0; i < nds_count; i++)
426 unregister_netdev(nds[i]);
427
428 ixp2000_uengine_stop_contexts(1, 0xff);
429 ixp2000_uengine_stop_contexts(0, 0xff);
430 ixp2000_uengine_reset(0x3);
431
432 for (i = 0; i < TX_BUF_COUNT; i++)
433 free_page((unsigned long)phys_to_virt(tx_desc[i].buf_addr));
434
435 for (i = 0; i < RX_BUF_COUNT; i++)
436 free_page((unsigned long)phys_to_virt(rx_desc[i].buf_addr));
437}
diff --git a/drivers/net/ethernet/xscale/ixp2000/ixpdev.h b/drivers/net/ethernet/xscale/ixp2000/ixpdev.h
deleted file mode 100644
index 391ece623243..000000000000
--- a/drivers/net/ethernet/xscale/ixp2000/ixpdev.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/*
2 * IXP2000 MSF network device driver
3 * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
4 * Dedicated to Marija Kulikova.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#ifndef __IXPDEV_H
13#define __IXPDEV_H
14
15struct ixpdev_priv
16{
17 struct net_device *dev;
18 struct napi_struct napi;
19 int channel;
20 int tx_queue_entries;
21};
22
23struct net_device *ixpdev_alloc(int channel, int sizeof_priv);
24int ixpdev_init(int num_ports, struct net_device **nds,
25 void (*set_port_admin_status)(int port, int up));
26void ixpdev_deinit(void);
27
28
29#endif
diff --git a/drivers/net/ethernet/xscale/ixp2000/ixpdev_priv.h b/drivers/net/ethernet/xscale/ixp2000/ixpdev_priv.h
deleted file mode 100644
index 86aa08ea0c33..000000000000
--- a/drivers/net/ethernet/xscale/ixp2000/ixpdev_priv.h
+++ /dev/null
@@ -1,57 +0,0 @@
1/*
2 * IXP2000 MSF network device driver
3 * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
4 * Dedicated to Marija Kulikova.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#ifndef __IXPDEV_PRIV_H
13#define __IXPDEV_PRIV_H
14
15#define RX_BUF_DESC_BASE 0x00001000
16#define RX_BUF_COUNT ((3 * PAGE_SIZE) / (4 * sizeof(struct ixpdev_rx_desc)))
17#define TX_BUF_DESC_BASE 0x00002000
18#define TX_BUF_COUNT ((3 * PAGE_SIZE) / (4 * sizeof(struct ixpdev_tx_desc)))
19#define TX_BUF_COUNT_PER_CHAN (TX_BUF_COUNT / 4)
20
21#define RING_RX_PENDING ((u32 *)IXP2000_SCRATCH_RING_VIRT_BASE)
22#define RING_RX_DONE ((u32 *)(IXP2000_SCRATCH_RING_VIRT_BASE + 4))
23#define RING_TX_PENDING ((u32 *)(IXP2000_SCRATCH_RING_VIRT_BASE + 8))
24#define RING_TX_DONE ((u32 *)(IXP2000_SCRATCH_RING_VIRT_BASE + 12))
25
26#define SCRATCH_REG(x) ((u32 *)(IXP2000_GLOBAL_REG_VIRT_BASE | 0x0800 | (x)))
27#define RING_RX_PENDING_BASE SCRATCH_REG(0x00)
28#define RING_RX_PENDING_HEAD SCRATCH_REG(0x04)
29#define RING_RX_PENDING_TAIL SCRATCH_REG(0x08)
30#define RING_RX_DONE_BASE SCRATCH_REG(0x10)
31#define RING_RX_DONE_HEAD SCRATCH_REG(0x14)
32#define RING_RX_DONE_TAIL SCRATCH_REG(0x18)
33#define RING_TX_PENDING_BASE SCRATCH_REG(0x20)
34#define RING_TX_PENDING_HEAD SCRATCH_REG(0x24)
35#define RING_TX_PENDING_TAIL SCRATCH_REG(0x28)
36#define RING_TX_DONE_BASE SCRATCH_REG(0x30)
37#define RING_TX_DONE_HEAD SCRATCH_REG(0x34)
38#define RING_TX_DONE_TAIL SCRATCH_REG(0x38)
39
40struct ixpdev_rx_desc
41{
42 u32 buf_addr;
43 u32 buf_length;
44 u32 channel;
45 u32 pkt_length;
46};
47
48struct ixpdev_tx_desc
49{
50 u32 buf_addr;
51 u32 pkt_length;
52 u32 channel;
53 u32 unused;
54};
55
56
57#endif
diff --git a/drivers/net/ethernet/xscale/ixp2000/pm3386.c b/drivers/net/ethernet/xscale/ixp2000/pm3386.c
deleted file mode 100644
index e08d3f9863b8..000000000000
--- a/drivers/net/ethernet/xscale/ixp2000/pm3386.c
+++ /dev/null
@@ -1,351 +0,0 @@
1/*
2 * Helper functions for the PM3386s on the Radisys ENP2611
3 * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
4 * Dedicated to Marija Kulikova.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
13#include <linux/delay.h>
14#include <linux/netdevice.h>
15#include <asm/io.h>
16#include "pm3386.h"
17
18/*
19 * Read from register 'reg' of PM3386 device 'pm'.
20 */
21static u16 pm3386_reg_read(int pm, int reg)
22{
23 void *_reg;
24 u16 value;
25
26 _reg = (void *)ENP2611_PM3386_0_VIRT_BASE;
27 if (pm == 1)
28 _reg = (void *)ENP2611_PM3386_1_VIRT_BASE;
29
30 value = *((volatile u16 *)(_reg + (reg << 1)));
31
32// printk(KERN_INFO "pm3386_reg_read(%d, %.3x) = %.8x\n", pm, reg, value);
33
34 return value;
35}
36
37/*
38 * Write to register 'reg' of PM3386 device 'pm', and perform
39 * a readback from the identification register.
40 */
41static void pm3386_reg_write(int pm, int reg, u16 value)
42{
43 void *_reg;
44 u16 dummy;
45
46// printk(KERN_INFO "pm3386_reg_write(%d, %.3x, %.8x)\n", pm, reg, value);
47
48 _reg = (void *)ENP2611_PM3386_0_VIRT_BASE;
49 if (pm == 1)
50 _reg = (void *)ENP2611_PM3386_1_VIRT_BASE;
51
52 *((volatile u16 *)(_reg + (reg << 1))) = value;
53
54 dummy = *((volatile u16 *)_reg);
55 __asm__ __volatile__("mov %0, %0" : "+r" (dummy));
56}
57
58/*
59 * Read from port 'port' register 'reg', where the registers
60 * for the different ports are 'spacing' registers apart.
61 */
62static u16 pm3386_port_reg_read(int port, int _reg, int spacing)
63{
64 int reg;
65
66 reg = _reg;
67 if (port & 1)
68 reg += spacing;
69
70 return pm3386_reg_read(port >> 1, reg);
71}
72
73/*
74 * Write to port 'port' register 'reg', where the registers
75 * for the different ports are 'spacing' registers apart.
76 */
77static void pm3386_port_reg_write(int port, int _reg, int spacing, u16 value)
78{
79 int reg;
80
81 reg = _reg;
82 if (port & 1)
83 reg += spacing;
84
85 pm3386_reg_write(port >> 1, reg, value);
86}
87
88int pm3386_secondary_present(void)
89{
90 return pm3386_reg_read(1, 0) == 0x3386;
91}
92
93void pm3386_reset(void)
94{
95 u8 mac[3][6];
96 int secondary;
97
98 secondary = pm3386_secondary_present();
99
100 /* Save programmed MAC addresses. */
101 pm3386_get_mac(0, mac[0]);
102 pm3386_get_mac(1, mac[1]);
103 if (secondary)
104 pm3386_get_mac(2, mac[2]);
105
106 /* Assert analog and digital reset. */
107 pm3386_reg_write(0, 0x002, 0x0060);
108 if (secondary)
109 pm3386_reg_write(1, 0x002, 0x0060);
110 mdelay(1);
111
112 /* Deassert analog reset. */
113 pm3386_reg_write(0, 0x002, 0x0062);
114 if (secondary)
115 pm3386_reg_write(1, 0x002, 0x0062);
116 mdelay(10);
117
118 /* Deassert digital reset. */
119 pm3386_reg_write(0, 0x002, 0x0063);
120 if (secondary)
121 pm3386_reg_write(1, 0x002, 0x0063);
122 mdelay(10);
123
124 /* Restore programmed MAC addresses. */
125 pm3386_set_mac(0, mac[0]);
126 pm3386_set_mac(1, mac[1]);
127 if (secondary)
128 pm3386_set_mac(2, mac[2]);
129
130 /* Disable carrier on all ports. */
131 pm3386_set_carrier(0, 0);
132 pm3386_set_carrier(1, 0);
133 if (secondary)
134 pm3386_set_carrier(2, 0);
135}
136
137static u16 swaph(u16 x)
138{
139 return ((x << 8) | (x >> 8)) & 0xffff;
140}
141
142int pm3386_port_count(void)
143{
144 return 2 + pm3386_secondary_present();
145}
146
147void pm3386_init_port(int port)
148{
149 int pm = port >> 1;
150
151 /*
152 * Work around ENP2611 bootloader programming MAC address
153 * in reverse.
154 */
155 if (pm3386_port_reg_read(port, 0x30a, 0x100) == 0x0000 &&
156 (pm3386_port_reg_read(port, 0x309, 0x100) & 0xff00) == 0x5000) {
157 u16 temp[3];
158
159 temp[0] = pm3386_port_reg_read(port, 0x308, 0x100);
160 temp[1] = pm3386_port_reg_read(port, 0x309, 0x100);
161 temp[2] = pm3386_port_reg_read(port, 0x30a, 0x100);
162 pm3386_port_reg_write(port, 0x308, 0x100, swaph(temp[2]));
163 pm3386_port_reg_write(port, 0x309, 0x100, swaph(temp[1]));
164 pm3386_port_reg_write(port, 0x30a, 0x100, swaph(temp[0]));
165 }
166
167 /*
168 * Initialise narrowbanding mode. See application note 2010486
169 * for more information. (@@@ We also need to issue a reset
170 * when ROOL or DOOL are detected.)
171 */
172 pm3386_port_reg_write(port, 0x708, 0x10, 0xd055);
173 udelay(500);
174 pm3386_port_reg_write(port, 0x708, 0x10, 0x5055);
175
176 /*
177 * SPI-3 ingress block. Set 64 bytes SPI-3 burst size
178 * towards SPI-3 bridge.
179 */
180 pm3386_port_reg_write(port, 0x122, 0x20, 0x0002);
181
182 /*
183 * Enable ingress protocol checking, and soft reset the
184 * SPI-3 ingress block.
185 */
186 pm3386_reg_write(pm, 0x103, 0x0003);
187 while (!(pm3386_reg_read(pm, 0x103) & 0x80))
188 ;
189
190 /*
191 * SPI-3 egress block. Gather 12288 bytes of the current
192 * packet in the TX fifo before initiating transmit on the
193 * SERDES interface. (Prevents TX underflows.)
194 */
195 pm3386_port_reg_write(port, 0x221, 0x20, 0x0007);
196
197 /*
198 * Enforce odd parity from the SPI-3 bridge, and soft reset
199 * the SPI-3 egress block.
200 */
201 pm3386_reg_write(pm, 0x203, 0x000d & ~(4 << (port & 1)));
202 while ((pm3386_reg_read(pm, 0x203) & 0x000c) != 0x000c)
203 ;
204
205 /*
206 * EGMAC block. Set this channels to reject long preambles,
207 * not send or transmit PAUSE frames, enable preamble checking,
208 * disable frame length checking, enable FCS appending, enable
209 * TX frame padding.
210 */
211 pm3386_port_reg_write(port, 0x302, 0x100, 0x0113);
212
213 /*
214 * Soft reset the EGMAC block.
215 */
216 pm3386_port_reg_write(port, 0x301, 0x100, 0x8000);
217 pm3386_port_reg_write(port, 0x301, 0x100, 0x0000);
218
219 /*
220 * Auto-sense autonegotiation status.
221 */
222 pm3386_port_reg_write(port, 0x306, 0x100, 0x0100);
223
224 /*
225 * Allow reception of jumbo frames.
226 */
227 pm3386_port_reg_write(port, 0x310, 0x100, 9018);
228
229 /*
230 * Allow transmission of jumbo frames.
231 */
232 pm3386_port_reg_write(port, 0x336, 0x100, 9018);
233
234 /* @@@ Should set 0x337/0x437 (RX forwarding threshold.) */
235
236 /*
237 * Set autonegotiation parameters to 'no PAUSE, full duplex.'
238 */
239 pm3386_port_reg_write(port, 0x31c, 0x100, 0x0020);
240
241 /*
242 * Enable and restart autonegotiation.
243 */
244 pm3386_port_reg_write(port, 0x318, 0x100, 0x0003);
245 pm3386_port_reg_write(port, 0x318, 0x100, 0x0002);
246}
247
248void pm3386_get_mac(int port, u8 *mac)
249{
250 u16 temp;
251
252 temp = pm3386_port_reg_read(port, 0x308, 0x100);
253 mac[0] = temp & 0xff;
254 mac[1] = (temp >> 8) & 0xff;
255
256 temp = pm3386_port_reg_read(port, 0x309, 0x100);
257 mac[2] = temp & 0xff;
258 mac[3] = (temp >> 8) & 0xff;
259
260 temp = pm3386_port_reg_read(port, 0x30a, 0x100);
261 mac[4] = temp & 0xff;
262 mac[5] = (temp >> 8) & 0xff;
263}
264
265void pm3386_set_mac(int port, u8 *mac)
266{
267 pm3386_port_reg_write(port, 0x308, 0x100, (mac[1] << 8) | mac[0]);
268 pm3386_port_reg_write(port, 0x309, 0x100, (mac[3] << 8) | mac[2]);
269 pm3386_port_reg_write(port, 0x30a, 0x100, (mac[5] << 8) | mac[4]);
270}
271
272static u32 pm3386_get_stat(int port, u16 base)
273{
274 u32 value;
275
276 value = pm3386_port_reg_read(port, base, 0x100);
277 value |= pm3386_port_reg_read(port, base + 1, 0x100) << 16;
278
279 return value;
280}
281
282void pm3386_get_stats(int port, struct net_device_stats *stats)
283{
284 /*
285 * Snapshot statistics counters.
286 */
287 pm3386_port_reg_write(port, 0x500, 0x100, 0x0001);
288 while (pm3386_port_reg_read(port, 0x500, 0x100) & 0x0001)
289 ;
290
291 memset(stats, 0, sizeof(*stats));
292
293 stats->rx_packets = pm3386_get_stat(port, 0x510);
294 stats->tx_packets = pm3386_get_stat(port, 0x590);
295 stats->rx_bytes = pm3386_get_stat(port, 0x514);
296 stats->tx_bytes = pm3386_get_stat(port, 0x594);
297 /* @@@ Add other stats. */
298}
299
300void pm3386_set_carrier(int port, int state)
301{
302 pm3386_port_reg_write(port, 0x703, 0x10, state ? 0x1001 : 0x0000);
303}
304
305int pm3386_is_link_up(int port)
306{
307 u16 temp;
308
309 temp = pm3386_port_reg_read(port, 0x31a, 0x100);
310 temp = pm3386_port_reg_read(port, 0x31a, 0x100);
311
312 return !!(temp & 0x0002);
313}
314
315void pm3386_enable_rx(int port)
316{
317 u16 temp;
318
319 temp = pm3386_port_reg_read(port, 0x303, 0x100);
320 temp |= 0x1000;
321 pm3386_port_reg_write(port, 0x303, 0x100, temp);
322}
323
324void pm3386_disable_rx(int port)
325{
326 u16 temp;
327
328 temp = pm3386_port_reg_read(port, 0x303, 0x100);
329 temp &= 0xefff;
330 pm3386_port_reg_write(port, 0x303, 0x100, temp);
331}
332
333void pm3386_enable_tx(int port)
334{
335 u16 temp;
336
337 temp = pm3386_port_reg_read(port, 0x303, 0x100);
338 temp |= 0x4000;
339 pm3386_port_reg_write(port, 0x303, 0x100, temp);
340}
341
342void pm3386_disable_tx(int port)
343{
344 u16 temp;
345
346 temp = pm3386_port_reg_read(port, 0x303, 0x100);
347 temp &= 0xbfff;
348 pm3386_port_reg_write(port, 0x303, 0x100, temp);
349}
350
351MODULE_LICENSE("GPL");
diff --git a/drivers/net/ethernet/xscale/ixp2000/pm3386.h b/drivers/net/ethernet/xscale/ixp2000/pm3386.h
deleted file mode 100644
index cc4183dca911..000000000000
--- a/drivers/net/ethernet/xscale/ixp2000/pm3386.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/*
2 * Helper functions for the PM3386s on the Radisys ENP2611
3 * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
4 * Dedicated to Marija Kulikova.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#ifndef __PM3386_H
13#define __PM3386_H
14
15void pm3386_reset(void);
16int pm3386_port_count(void);
17void pm3386_init_port(int port);
18void pm3386_get_mac(int port, u8 *mac);
19void pm3386_set_mac(int port, u8 *mac);
20void pm3386_get_stats(int port, struct net_device_stats *stats);
21void pm3386_set_carrier(int port, int state);
22int pm3386_is_link_up(int port);
23void pm3386_enable_rx(int port);
24void pm3386_disable_rx(int port);
25void pm3386_enable_tx(int port);
26void pm3386_disable_tx(int port);
27
28
29#endif
diff --git a/drivers/net/ethernet/xscale/ixp4xx_eth.c b/drivers/net/ethernet/xscale/ixp4xx_eth.c
index 41a8b5a9849e..482648fcf0b6 100644
--- a/drivers/net/ethernet/xscale/ixp4xx_eth.c
+++ b/drivers/net/ethernet/xscale/ixp4xx_eth.c
@@ -1002,12 +1002,41 @@ static int ixp4xx_nway_reset(struct net_device *dev)
1002 return phy_start_aneg(port->phydev); 1002 return phy_start_aneg(port->phydev);
1003} 1003}
1004 1004
1005int ixp46x_phc_index = -1;
1006
1007static int ixp4xx_get_ts_info(struct net_device *dev,
1008 struct ethtool_ts_info *info)
1009{
1010 if (!cpu_is_ixp46x()) {
1011 info->so_timestamping =
1012 SOF_TIMESTAMPING_TX_SOFTWARE |
1013 SOF_TIMESTAMPING_RX_SOFTWARE |
1014 SOF_TIMESTAMPING_SOFTWARE;
1015 info->phc_index = -1;
1016 return 0;
1017 }
1018 info->so_timestamping =
1019 SOF_TIMESTAMPING_TX_HARDWARE |
1020 SOF_TIMESTAMPING_RX_HARDWARE |
1021 SOF_TIMESTAMPING_RAW_HARDWARE;
1022 info->phc_index = ixp46x_phc_index;
1023 info->tx_types =
1024 (1 << HWTSTAMP_TX_OFF) |
1025 (1 << HWTSTAMP_TX_ON);
1026 info->rx_filters =
1027 (1 << HWTSTAMP_FILTER_NONE) |
1028 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
1029 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ);
1030 return 0;
1031}
1032
1005static const struct ethtool_ops ixp4xx_ethtool_ops = { 1033static const struct ethtool_ops ixp4xx_ethtool_ops = {
1006 .get_drvinfo = ixp4xx_get_drvinfo, 1034 .get_drvinfo = ixp4xx_get_drvinfo,
1007 .get_settings = ixp4xx_get_settings, 1035 .get_settings = ixp4xx_get_settings,
1008 .set_settings = ixp4xx_set_settings, 1036 .set_settings = ixp4xx_set_settings,
1009 .nway_reset = ixp4xx_nway_reset, 1037 .nway_reset = ixp4xx_nway_reset,
1010 .get_link = ethtool_op_get_link, 1038 .get_link = ethtool_op_get_link,
1039 .get_ts_info = ixp4xx_get_ts_info,
1011}; 1040};
1012 1041
1013 1042
diff --git a/drivers/net/hippi/rrunner.c b/drivers/net/hippi/rrunner.c
index 168c8f41d09f..b6a2bdeff595 100644
--- a/drivers/net/hippi/rrunner.c
+++ b/drivers/net/hippi/rrunner.c
@@ -113,10 +113,9 @@ static int __devinit rr_init_one(struct pci_dev *pdev,
113 113
114 SET_NETDEV_DEV(dev, &pdev->dev); 114 SET_NETDEV_DEV(dev, &pdev->dev);
115 115
116 if (pci_request_regions(pdev, "rrunner")) { 116 ret = pci_request_regions(pdev, "rrunner");
117 ret = -EIO; 117 if (ret < 0)
118 goto out; 118 goto out;
119 }
120 119
121 pci_set_drvdata(pdev, dev); 120 pci_set_drvdata(pdev, dev);
122 121
@@ -124,11 +123,8 @@ static int __devinit rr_init_one(struct pci_dev *pdev,
124 123
125 spin_lock_init(&rrpriv->lock); 124 spin_lock_init(&rrpriv->lock);
126 125
127 dev->irq = pdev->irq;
128 dev->netdev_ops = &rr_netdev_ops; 126 dev->netdev_ops = &rr_netdev_ops;
129 127
130 dev->base_addr = pci_resource_start(pdev, 0);
131
132 /* display version info if adapter is found */ 128 /* display version info if adapter is found */
133 if (!version_disp) { 129 if (!version_disp) {
134 /* set display flag to TRUE so that */ 130 /* set display flag to TRUE so that */
@@ -146,16 +142,14 @@ static int __devinit rr_init_one(struct pci_dev *pdev,
146 pci_set_master(pdev); 142 pci_set_master(pdev);
147 143
148 printk(KERN_INFO "%s: Essential RoadRunner serial HIPPI " 144 printk(KERN_INFO "%s: Essential RoadRunner serial HIPPI "
149 "at 0x%08lx, irq %i, PCI latency %i\n", dev->name, 145 "at 0x%08llx, irq %i, PCI latency %i\n", dev->name,
150 dev->base_addr, dev->irq, pci_latency); 146 pci_resource_start(pdev, 0), pdev->irq, pci_latency);
151 147
152 /* 148 /*
153 * Remap the regs into kernel space. 149 * Remap the MMIO regs into kernel space.
154 */ 150 */
155 151 rrpriv->regs = pci_iomap(pdev, 0, 0x1000);
156 rrpriv->regs = ioremap(dev->base_addr, 0x1000); 152 if (!rrpriv->regs) {
157
158 if (!rrpriv->regs){
159 printk(KERN_ERR "%s: Unable to map I/O register, " 153 printk(KERN_ERR "%s: Unable to map I/O register, "
160 "RoadRunner will be disabled.\n", dev->name); 154 "RoadRunner will be disabled.\n", dev->name);
161 ret = -EIO; 155 ret = -EIO;
@@ -202,8 +196,6 @@ static int __devinit rr_init_one(struct pci_dev *pdev,
202 196
203 rr_init(dev); 197 rr_init(dev);
204 198
205 dev->base_addr = 0;
206
207 ret = register_netdev(dev); 199 ret = register_netdev(dev);
208 if (ret) 200 if (ret)
209 goto out; 201 goto out;
@@ -217,7 +209,7 @@ static int __devinit rr_init_one(struct pci_dev *pdev,
217 pci_free_consistent(pdev, TX_TOTAL_SIZE, rrpriv->tx_ring, 209 pci_free_consistent(pdev, TX_TOTAL_SIZE, rrpriv->tx_ring,
218 rrpriv->tx_ring_dma); 210 rrpriv->tx_ring_dma);
219 if (rrpriv->regs) 211 if (rrpriv->regs)
220 iounmap(rrpriv->regs); 212 pci_iounmap(pdev, rrpriv->regs);
221 if (pdev) { 213 if (pdev) {
222 pci_release_regions(pdev); 214 pci_release_regions(pdev);
223 pci_set_drvdata(pdev, NULL); 215 pci_set_drvdata(pdev, NULL);
@@ -231,29 +223,26 @@ static int __devinit rr_init_one(struct pci_dev *pdev,
231static void __devexit rr_remove_one (struct pci_dev *pdev) 223static void __devexit rr_remove_one (struct pci_dev *pdev)
232{ 224{
233 struct net_device *dev = pci_get_drvdata(pdev); 225 struct net_device *dev = pci_get_drvdata(pdev);
226 struct rr_private *rr = netdev_priv(dev);
234 227
235 if (dev) { 228 if (!(readl(&rr->regs->HostCtrl) & NIC_HALTED)) {
236 struct rr_private *rr = netdev_priv(dev); 229 printk(KERN_ERR "%s: trying to unload running NIC\n",
237 230 dev->name);
238 if (!(readl(&rr->regs->HostCtrl) & NIC_HALTED)){ 231 writel(HALT_NIC, &rr->regs->HostCtrl);
239 printk(KERN_ERR "%s: trying to unload running NIC\n",
240 dev->name);
241 writel(HALT_NIC, &rr->regs->HostCtrl);
242 }
243
244 pci_free_consistent(pdev, EVT_RING_SIZE, rr->evt_ring,
245 rr->evt_ring_dma);
246 pci_free_consistent(pdev, RX_TOTAL_SIZE, rr->rx_ring,
247 rr->rx_ring_dma);
248 pci_free_consistent(pdev, TX_TOTAL_SIZE, rr->tx_ring,
249 rr->tx_ring_dma);
250 unregister_netdev(dev);
251 iounmap(rr->regs);
252 free_netdev(dev);
253 pci_release_regions(pdev);
254 pci_disable_device(pdev);
255 pci_set_drvdata(pdev, NULL);
256 } 232 }
233
234 unregister_netdev(dev);
235 pci_free_consistent(pdev, EVT_RING_SIZE, rr->evt_ring,
236 rr->evt_ring_dma);
237 pci_free_consistent(pdev, RX_TOTAL_SIZE, rr->rx_ring,
238 rr->rx_ring_dma);
239 pci_free_consistent(pdev, TX_TOTAL_SIZE, rr->tx_ring,
240 rr->tx_ring_dma);
241 pci_iounmap(pdev, rr->regs);
242 pci_release_regions(pdev);
243 pci_disable_device(pdev);
244 pci_set_drvdata(pdev, NULL);
245 free_netdev(dev);
257} 246}
258 247
259 248
@@ -1229,9 +1218,9 @@ static int rr_open(struct net_device *dev)
1229 readl(&regs->HostCtrl); 1218 readl(&regs->HostCtrl);
1230 spin_unlock_irqrestore(&rrpriv->lock, flags); 1219 spin_unlock_irqrestore(&rrpriv->lock, flags);
1231 1220
1232 if (request_irq(dev->irq, rr_interrupt, IRQF_SHARED, dev->name, dev)) { 1221 if (request_irq(pdev->irq, rr_interrupt, IRQF_SHARED, dev->name, dev)) {
1233 printk(KERN_WARNING "%s: Requested IRQ %d is busy\n", 1222 printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
1234 dev->name, dev->irq); 1223 dev->name, pdev->irq);
1235 ecode = -EAGAIN; 1224 ecode = -EAGAIN;
1236 goto error; 1225 goto error;
1237 } 1226 }
@@ -1338,16 +1327,15 @@ static void rr_dump(struct net_device *dev)
1338 1327
1339static int rr_close(struct net_device *dev) 1328static int rr_close(struct net_device *dev)
1340{ 1329{
1341 struct rr_private *rrpriv; 1330 struct rr_private *rrpriv = netdev_priv(dev);
1342 struct rr_regs __iomem *regs; 1331 struct rr_regs __iomem *regs = rrpriv->regs;
1332 struct pci_dev *pdev = rrpriv->pci_dev;
1343 unsigned long flags; 1333 unsigned long flags;
1344 u32 tmp; 1334 u32 tmp;
1345 short i; 1335 short i;
1346 1336
1347 netif_stop_queue(dev); 1337 netif_stop_queue(dev);
1348 1338
1349 rrpriv = netdev_priv(dev);
1350 regs = rrpriv->regs;
1351 1339
1352 /* 1340 /*
1353 * Lock to make sure we are not cleaning up while another CPU 1341 * Lock to make sure we are not cleaning up while another CPU
@@ -1386,15 +1374,15 @@ static int rr_close(struct net_device *dev)
1386 rr_raz_tx(rrpriv, dev); 1374 rr_raz_tx(rrpriv, dev);
1387 rr_raz_rx(rrpriv, dev); 1375 rr_raz_rx(rrpriv, dev);
1388 1376
1389 pci_free_consistent(rrpriv->pci_dev, 256 * sizeof(struct ring_ctrl), 1377 pci_free_consistent(pdev, 256 * sizeof(struct ring_ctrl),
1390 rrpriv->rx_ctrl, rrpriv->rx_ctrl_dma); 1378 rrpriv->rx_ctrl, rrpriv->rx_ctrl_dma);
1391 rrpriv->rx_ctrl = NULL; 1379 rrpriv->rx_ctrl = NULL;
1392 1380
1393 pci_free_consistent(rrpriv->pci_dev, sizeof(struct rr_info), 1381 pci_free_consistent(pdev, sizeof(struct rr_info), rrpriv->info,
1394 rrpriv->info, rrpriv->info_dma); 1382 rrpriv->info_dma);
1395 rrpriv->info = NULL; 1383 rrpriv->info = NULL;
1396 1384
1397 free_irq(dev->irq, dev); 1385 free_irq(pdev->irq, dev);
1398 spin_unlock_irqrestore(&rrpriv->lock, flags); 1386 spin_unlock_irqrestore(&rrpriv->lock, flags);
1399 1387
1400 return 0; 1388 return 0;
diff --git a/drivers/net/hyperv/netvsc.c b/drivers/net/hyperv/netvsc.c
index d025c83cd12a..8b919471472f 100644
--- a/drivers/net/hyperv/netvsc.c
+++ b/drivers/net/hyperv/netvsc.c
@@ -428,6 +428,24 @@ int netvsc_device_remove(struct hv_device *device)
428 return 0; 428 return 0;
429} 429}
430 430
431
432#define RING_AVAIL_PERCENT_HIWATER 20
433#define RING_AVAIL_PERCENT_LOWATER 10
434
435/*
436 * Get the percentage of available bytes to write in the ring.
437 * The return value is in range from 0 to 100.
438 */
439static inline u32 hv_ringbuf_avail_percent(
440 struct hv_ring_buffer_info *ring_info)
441{
442 u32 avail_read, avail_write;
443
444 hv_get_ringbuffer_availbytes(ring_info, &avail_read, &avail_write);
445
446 return avail_write * 100 / ring_info->ring_datasize;
447}
448
431static void netvsc_send_completion(struct hv_device *device, 449static void netvsc_send_completion(struct hv_device *device,
432 struct vmpacket_descriptor *packet) 450 struct vmpacket_descriptor *packet)
433{ 451{
@@ -455,6 +473,8 @@ static void netvsc_send_completion(struct hv_device *device,
455 complete(&net_device->channel_init_wait); 473 complete(&net_device->channel_init_wait);
456 } else if (nvsp_packet->hdr.msg_type == 474 } else if (nvsp_packet->hdr.msg_type ==
457 NVSP_MSG1_TYPE_SEND_RNDIS_PKT_COMPLETE) { 475 NVSP_MSG1_TYPE_SEND_RNDIS_PKT_COMPLETE) {
476 int num_outstanding_sends;
477
458 /* Get the send context */ 478 /* Get the send context */
459 nvsc_packet = (struct hv_netvsc_packet *)(unsigned long) 479 nvsc_packet = (struct hv_netvsc_packet *)(unsigned long)
460 packet->trans_id; 480 packet->trans_id;
@@ -463,10 +483,14 @@ static void netvsc_send_completion(struct hv_device *device,
463 nvsc_packet->completion.send.send_completion( 483 nvsc_packet->completion.send.send_completion(
464 nvsc_packet->completion.send.send_completion_ctx); 484 nvsc_packet->completion.send.send_completion_ctx);
465 485
466 atomic_dec(&net_device->num_outstanding_sends); 486 num_outstanding_sends =
487 atomic_dec_return(&net_device->num_outstanding_sends);
467 488
468 if (netif_queue_stopped(ndev) && !net_device->start_remove) 489 if (netif_queue_stopped(ndev) && !net_device->start_remove &&
469 netif_wake_queue(ndev); 490 (hv_ringbuf_avail_percent(&device->channel->outbound)
491 > RING_AVAIL_PERCENT_HIWATER ||
492 num_outstanding_sends < 1))
493 netif_wake_queue(ndev);
470 } else { 494 } else {
471 netdev_err(ndev, "Unknown send completion packet type- " 495 netdev_err(ndev, "Unknown send completion packet type- "
472 "%d received!!\n", nvsp_packet->hdr.msg_type); 496 "%d received!!\n", nvsp_packet->hdr.msg_type);
@@ -519,10 +543,19 @@ int netvsc_send(struct hv_device *device,
519 543
520 if (ret == 0) { 544 if (ret == 0) {
521 atomic_inc(&net_device->num_outstanding_sends); 545 atomic_inc(&net_device->num_outstanding_sends);
546 if (hv_ringbuf_avail_percent(&device->channel->outbound) <
547 RING_AVAIL_PERCENT_LOWATER) {
548 netif_stop_queue(ndev);
549 if (atomic_read(&net_device->
550 num_outstanding_sends) < 1)
551 netif_wake_queue(ndev);
552 }
522 } else if (ret == -EAGAIN) { 553 } else if (ret == -EAGAIN) {
523 netif_stop_queue(ndev); 554 netif_stop_queue(ndev);
524 if (atomic_read(&net_device->num_outstanding_sends) < 1) 555 if (atomic_read(&net_device->num_outstanding_sends) < 1) {
525 netif_wake_queue(ndev); 556 netif_wake_queue(ndev);
557 ret = -ENOSPC;
558 }
526 } else { 559 } else {
527 netdev_err(ndev, "Unable to send packet %p ret %d\n", 560 netdev_err(ndev, "Unable to send packet %p ret %d\n",
528 packet, ret); 561 packet, ret);
diff --git a/drivers/net/hyperv/netvsc_drv.c b/drivers/net/hyperv/netvsc_drv.c
index dd294783b5c5..a0cc12786be4 100644
--- a/drivers/net/hyperv/netvsc_drv.c
+++ b/drivers/net/hyperv/netvsc_drv.c
@@ -224,9 +224,13 @@ static int netvsc_start_xmit(struct sk_buff *skb, struct net_device *net)
224 net->stats.tx_packets++; 224 net->stats.tx_packets++;
225 } else { 225 } else {
226 kfree(packet); 226 kfree(packet);
227 if (ret != -EAGAIN) {
228 dev_kfree_skb_any(skb);
229 net->stats.tx_dropped++;
230 }
227 } 231 }
228 232
229 return ret ? NETDEV_TX_BUSY : NETDEV_TX_OK; 233 return (ret == -EAGAIN) ? NETDEV_TX_BUSY : NETDEV_TX_OK;
230} 234}
231 235
232/* 236/*
diff --git a/drivers/net/macvlan.c b/drivers/net/macvlan.c
index f975afdc315c..b17fc9007099 100644
--- a/drivers/net/macvlan.c
+++ b/drivers/net/macvlan.c
@@ -773,7 +773,8 @@ static int macvlan_fill_info(struct sk_buff *skb,
773{ 773{
774 struct macvlan_dev *vlan = netdev_priv(dev); 774 struct macvlan_dev *vlan = netdev_priv(dev);
775 775
776 NLA_PUT_U32(skb, IFLA_MACVLAN_MODE, vlan->mode); 776 if (nla_put_u32(skb, IFLA_MACVLAN_MODE, vlan->mode))
777 goto nla_put_failure;
777 return 0; 778 return 0;
778 779
779nla_put_failure: 780nla_put_failure:
diff --git a/drivers/net/phy/bcm63xx.c b/drivers/net/phy/bcm63xx.c
index e16f98cb4f04..cd802eb25fd2 100644
--- a/drivers/net/phy/bcm63xx.c
+++ b/drivers/net/phy/bcm63xx.c
@@ -39,10 +39,7 @@ static int bcm63xx_config_init(struct phy_device *phydev)
39 MII_BCM63XX_IR_SPEED | 39 MII_BCM63XX_IR_SPEED |
40 MII_BCM63XX_IR_LINK) | 40 MII_BCM63XX_IR_LINK) |
41 MII_BCM63XX_IR_EN; 41 MII_BCM63XX_IR_EN;
42 err = phy_write(phydev, MII_BCM63XX_IR, reg); 42 return phy_write(phydev, MII_BCM63XX_IR, reg);
43 if (err < 0)
44 return err;
45 return 0;
46} 43}
47 44
48static int bcm63xx_ack_interrupt(struct phy_device *phydev) 45static int bcm63xx_ack_interrupt(struct phy_device *phydev)
diff --git a/drivers/net/phy/davicom.c b/drivers/net/phy/davicom.c
index 2f774acdb551..5f59cc064778 100644
--- a/drivers/net/phy/davicom.c
+++ b/drivers/net/phy/davicom.c
@@ -134,12 +134,7 @@ static int dm9161_config_init(struct phy_device *phydev)
134 return err; 134 return err;
135 135
136 /* Reconnect the PHY, and enable Autonegotiation */ 136 /* Reconnect the PHY, and enable Autonegotiation */
137 err = phy_write(phydev, MII_BMCR, BMCR_ANENABLE); 137 return phy_write(phydev, MII_BMCR, BMCR_ANENABLE);
138
139 if (err < 0)
140 return err;
141
142 return 0;
143} 138}
144 139
145static int dm9161_ack_interrupt(struct phy_device *phydev) 140static int dm9161_ack_interrupt(struct phy_device *phydev)
diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c
index dd7ae19579d1..940b29022d0c 100644
--- a/drivers/net/phy/dp83640.c
+++ b/drivers/net/phy/dp83640.c
@@ -1215,6 +1215,36 @@ static void dp83640_txtstamp(struct phy_device *phydev,
1215 } 1215 }
1216} 1216}
1217 1217
1218static int dp83640_ts_info(struct phy_device *dev, struct ethtool_ts_info *info)
1219{
1220 struct dp83640_private *dp83640 = dev->priv;
1221
1222 info->so_timestamping =
1223 SOF_TIMESTAMPING_TX_HARDWARE |
1224 SOF_TIMESTAMPING_RX_HARDWARE |
1225 SOF_TIMESTAMPING_RAW_HARDWARE;
1226 info->phc_index = ptp_clock_index(dp83640->clock->ptp_clock);
1227 info->tx_types =
1228 (1 << HWTSTAMP_TX_OFF) |
1229 (1 << HWTSTAMP_TX_ON) |
1230 (1 << HWTSTAMP_TX_ONESTEP_SYNC);
1231 info->rx_filters =
1232 (1 << HWTSTAMP_FILTER_NONE) |
1233 (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
1234 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
1235 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
1236 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
1237 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
1238 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
1239 (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
1240 (1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
1241 (1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
1242 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
1243 (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
1244 (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ);
1245 return 0;
1246}
1247
1218static struct phy_driver dp83640_driver = { 1248static struct phy_driver dp83640_driver = {
1219 .phy_id = DP83640_PHY_ID, 1249 .phy_id = DP83640_PHY_ID,
1220 .phy_id_mask = 0xfffffff0, 1250 .phy_id_mask = 0xfffffff0,
@@ -1225,6 +1255,7 @@ static struct phy_driver dp83640_driver = {
1225 .remove = dp83640_remove, 1255 .remove = dp83640_remove,
1226 .config_aneg = genphy_config_aneg, 1256 .config_aneg = genphy_config_aneg,
1227 .read_status = genphy_read_status, 1257 .read_status = genphy_read_status,
1258 .ts_info = dp83640_ts_info,
1228 .hwtstamp = dp83640_hwtstamp, 1259 .hwtstamp = dp83640_hwtstamp,
1229 .rxtstamp = dp83640_rxtstamp, 1260 .rxtstamp = dp83640_rxtstamp,
1230 .txtstamp = dp83640_txtstamp, 1261 .txtstamp = dp83640_txtstamp,
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index e8b9c53c304b..418928d644bf 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -455,11 +455,7 @@ static int m88e1111_config_init(struct phy_device *phydev)
455 if (err < 0) 455 if (err < 0)
456 return err; 456 return err;
457 457
458 err = phy_write(phydev, MII_BMCR, BMCR_RESET); 458 return phy_write(phydev, MII_BMCR, BMCR_RESET);
459 if (err < 0)
460 return err;
461
462 return 0;
463} 459}
464 460
465static int m88e1118_config_aneg(struct phy_device *phydev) 461static int m88e1118_config_aneg(struct phy_device *phydev)
@@ -515,11 +511,7 @@ static int m88e1118_config_init(struct phy_device *phydev)
515 if (err < 0) 511 if (err < 0)
516 return err; 512 return err;
517 513
518 err = phy_write(phydev, MII_BMCR, BMCR_RESET); 514 return phy_write(phydev, MII_BMCR, BMCR_RESET);
519 if (err < 0)
520 return err;
521
522 return 0;
523} 515}
524 516
525static int m88e1149_config_init(struct phy_device *phydev) 517static int m88e1149_config_init(struct phy_device *phydev)
@@ -545,11 +537,7 @@ static int m88e1149_config_init(struct phy_device *phydev)
545 if (err < 0) 537 if (err < 0)
546 return err; 538 return err;
547 539
548 err = phy_write(phydev, MII_BMCR, BMCR_RESET); 540 return phy_write(phydev, MII_BMCR, BMCR_RESET);
549 if (err < 0)
550 return err;
551
552 return 0;
553} 541}
554 542
555static int m88e1145_config_init(struct phy_device *phydev) 543static int m88e1145_config_init(struct phy_device *phydev)
diff --git a/drivers/net/ppp/pptp.c b/drivers/net/ppp/pptp.c
index 885dbdd9c39e..72b50f57e7b2 100644
--- a/drivers/net/ppp/pptp.c
+++ b/drivers/net/ppp/pptp.c
@@ -116,8 +116,8 @@ static int lookup_chan_dst(u16 call_id, __be32 d_addr)
116 int i; 116 int i;
117 117
118 rcu_read_lock(); 118 rcu_read_lock();
119 for (i = find_next_bit(callid_bitmap, MAX_CALLID, 1); i < MAX_CALLID; 119 i = 1;
120 i = find_next_bit(callid_bitmap, MAX_CALLID, i + 1)) { 120 for_each_set_bit_from(i, callid_bitmap, MAX_CALLID) {
121 sock = rcu_dereference(callid_sock[i]); 121 sock = rcu_dereference(callid_sock[i]);
122 if (!sock) 122 if (!sock)
123 continue; 123 continue;
diff --git a/drivers/net/team/Kconfig b/drivers/net/team/Kconfig
index 248a144033ca..89024d5fc33a 100644
--- a/drivers/net/team/Kconfig
+++ b/drivers/net/team/Kconfig
@@ -40,4 +40,15 @@ config NET_TEAM_MODE_ACTIVEBACKUP
40 To compile this team mode as a module, choose M here: the module 40 To compile this team mode as a module, choose M here: the module
41 will be called team_mode_activebackup. 41 will be called team_mode_activebackup.
42 42
43config NET_TEAM_MODE_LOADBALANCE
44 tristate "Load-balance mode support"
45 depends on NET_TEAM
46 ---help---
47 This mode provides load balancing functionality. Tx port selection
48 is done using BPF function set up from userspace (bpf_hash_func
49 option)
50
51 To compile this team mode as a module, choose M here: the module
52 will be called team_mode_loadbalance.
53
43endif # NET_TEAM 54endif # NET_TEAM
diff --git a/drivers/net/team/Makefile b/drivers/net/team/Makefile
index 85f2028a87af..fb9f4c1c51ff 100644
--- a/drivers/net/team/Makefile
+++ b/drivers/net/team/Makefile
@@ -5,3 +5,4 @@
5obj-$(CONFIG_NET_TEAM) += team.o 5obj-$(CONFIG_NET_TEAM) += team.o
6obj-$(CONFIG_NET_TEAM_MODE_ROUNDROBIN) += team_mode_roundrobin.o 6obj-$(CONFIG_NET_TEAM_MODE_ROUNDROBIN) += team_mode_roundrobin.o
7obj-$(CONFIG_NET_TEAM_MODE_ACTIVEBACKUP) += team_mode_activebackup.o 7obj-$(CONFIG_NET_TEAM_MODE_ACTIVEBACKUP) += team_mode_activebackup.o
8obj-$(CONFIG_NET_TEAM_MODE_LOADBALANCE) += team_mode_loadbalance.o
diff --git a/drivers/net/team/team.c b/drivers/net/team/team.c
index 8f81805c6825..ea96f822de52 100644
--- a/drivers/net/team/team.c
+++ b/drivers/net/team/team.c
@@ -1145,10 +1145,7 @@ team_nl_option_policy[TEAM_ATTR_OPTION_MAX + 1] = {
1145 }, 1145 },
1146 [TEAM_ATTR_OPTION_CHANGED] = { .type = NLA_FLAG }, 1146 [TEAM_ATTR_OPTION_CHANGED] = { .type = NLA_FLAG },
1147 [TEAM_ATTR_OPTION_TYPE] = { .type = NLA_U8 }, 1147 [TEAM_ATTR_OPTION_TYPE] = { .type = NLA_U8 },
1148 [TEAM_ATTR_OPTION_DATA] = { 1148 [TEAM_ATTR_OPTION_DATA] = { .type = NLA_BINARY },
1149 .type = NLA_BINARY,
1150 .len = TEAM_STRING_MAX_LEN,
1151 },
1152}; 1149};
1153 1150
1154static int team_nl_cmd_noop(struct sk_buff *skb, struct genl_info *info) 1151static int team_nl_cmd_noop(struct sk_buff *skb, struct genl_info *info)
@@ -1248,7 +1245,8 @@ static int team_nl_fill_options_get(struct sk_buff *skb,
1248 if (IS_ERR(hdr)) 1245 if (IS_ERR(hdr))
1249 return PTR_ERR(hdr); 1246 return PTR_ERR(hdr);
1250 1247
1251 NLA_PUT_U32(skb, TEAM_ATTR_TEAM_IFINDEX, team->dev->ifindex); 1248 if (nla_put_u32(skb, TEAM_ATTR_TEAM_IFINDEX, team->dev->ifindex))
1249 goto nla_put_failure;
1252 option_list = nla_nest_start(skb, TEAM_ATTR_LIST_OPTION); 1250 option_list = nla_nest_start(skb, TEAM_ATTR_LIST_OPTION);
1253 if (!option_list) 1251 if (!option_list)
1254 return -EMSGSIZE; 1252 return -EMSGSIZE;
@@ -1256,6 +1254,7 @@ static int team_nl_fill_options_get(struct sk_buff *skb,
1256 list_for_each_entry(option, &team->option_list, list) { 1254 list_for_each_entry(option, &team->option_list, list) {
1257 struct nlattr *option_item; 1255 struct nlattr *option_item;
1258 long arg; 1256 long arg;
1257 struct team_option_binary tbinary;
1259 1258
1260 /* Include only changed options if fill all mode is not on */ 1259 /* Include only changed options if fill all mode is not on */
1261 if (!fillall && !option->changed) 1260 if (!fillall && !option->changed)
@@ -1263,24 +1262,40 @@ static int team_nl_fill_options_get(struct sk_buff *skb,
1263 option_item = nla_nest_start(skb, TEAM_ATTR_ITEM_OPTION); 1262 option_item = nla_nest_start(skb, TEAM_ATTR_ITEM_OPTION);
1264 if (!option_item) 1263 if (!option_item)
1265 goto nla_put_failure; 1264 goto nla_put_failure;
1266 NLA_PUT_STRING(skb, TEAM_ATTR_OPTION_NAME, option->name); 1265 if (nla_put_string(skb, TEAM_ATTR_OPTION_NAME, option->name))
1266 goto nla_put_failure;
1267 if (option->changed) { 1267 if (option->changed) {
1268 NLA_PUT_FLAG(skb, TEAM_ATTR_OPTION_CHANGED); 1268 if (nla_put_flag(skb, TEAM_ATTR_OPTION_CHANGED))
1269 goto nla_put_failure;
1269 option->changed = false; 1270 option->changed = false;
1270 } 1271 }
1271 if (option->removed) 1272 if (option->removed &&
1272 NLA_PUT_FLAG(skb, TEAM_ATTR_OPTION_REMOVED); 1273 nla_put_flag(skb, TEAM_ATTR_OPTION_REMOVED))
1274 goto nla_put_failure;
1273 switch (option->type) { 1275 switch (option->type) {
1274 case TEAM_OPTION_TYPE_U32: 1276 case TEAM_OPTION_TYPE_U32:
1275 NLA_PUT_U8(skb, TEAM_ATTR_OPTION_TYPE, NLA_U32); 1277 if (nla_put_u8(skb, TEAM_ATTR_OPTION_TYPE, NLA_U32))
1278 goto nla_put_failure;
1276 team_option_get(team, option, &arg); 1279 team_option_get(team, option, &arg);
1277 NLA_PUT_U32(skb, TEAM_ATTR_OPTION_DATA, arg); 1280 if (nla_put_u32(skb, TEAM_ATTR_OPTION_DATA, arg))
1281 goto nla_put_failure;
1278 break; 1282 break;
1279 case TEAM_OPTION_TYPE_STRING: 1283 case TEAM_OPTION_TYPE_STRING:
1280 NLA_PUT_U8(skb, TEAM_ATTR_OPTION_TYPE, NLA_STRING); 1284 if (nla_put_u8(skb, TEAM_ATTR_OPTION_TYPE, NLA_STRING))
1285 goto nla_put_failure;
1286 team_option_get(team, option, &arg);
1287 if (nla_put_string(skb, TEAM_ATTR_OPTION_DATA,
1288 (char *) arg))
1289 goto nla_put_failure;
1290 break;
1291 case TEAM_OPTION_TYPE_BINARY:
1292 if (nla_put_u8(skb, TEAM_ATTR_OPTION_TYPE, NLA_BINARY))
1293 goto nla_put_failure;
1294 arg = (long) &tbinary;
1281 team_option_get(team, option, &arg); 1295 team_option_get(team, option, &arg);
1282 NLA_PUT_STRING(skb, TEAM_ATTR_OPTION_DATA, 1296 if (nla_put(skb, TEAM_ATTR_OPTION_DATA,
1283 (char *) arg); 1297 tbinary.data_len, tbinary.data))
1298 goto nla_put_failure;
1284 break; 1299 break;
1285 default: 1300 default:
1286 BUG(); 1301 BUG();
@@ -1366,6 +1381,9 @@ static int team_nl_cmd_options_set(struct sk_buff *skb, struct genl_info *info)
1366 case NLA_STRING: 1381 case NLA_STRING:
1367 opt_type = TEAM_OPTION_TYPE_STRING; 1382 opt_type = TEAM_OPTION_TYPE_STRING;
1368 break; 1383 break;
1384 case NLA_BINARY:
1385 opt_type = TEAM_OPTION_TYPE_BINARY;
1386 break;
1369 default: 1387 default:
1370 goto team_put; 1388 goto team_put;
1371 } 1389 }
@@ -1374,19 +1392,31 @@ static int team_nl_cmd_options_set(struct sk_buff *skb, struct genl_info *info)
1374 list_for_each_entry(option, &team->option_list, list) { 1392 list_for_each_entry(option, &team->option_list, list) {
1375 long arg; 1393 long arg;
1376 struct nlattr *opt_data_attr; 1394 struct nlattr *opt_data_attr;
1395 struct team_option_binary tbinary;
1396 int data_len;
1377 1397
1378 if (option->type != opt_type || 1398 if (option->type != opt_type ||
1379 strcmp(option->name, opt_name)) 1399 strcmp(option->name, opt_name))
1380 continue; 1400 continue;
1381 opt_found = true; 1401 opt_found = true;
1382 opt_data_attr = mode_attrs[TEAM_ATTR_OPTION_DATA]; 1402 opt_data_attr = mode_attrs[TEAM_ATTR_OPTION_DATA];
1403 data_len = nla_len(opt_data_attr);
1383 switch (opt_type) { 1404 switch (opt_type) {
1384 case TEAM_OPTION_TYPE_U32: 1405 case TEAM_OPTION_TYPE_U32:
1385 arg = nla_get_u32(opt_data_attr); 1406 arg = nla_get_u32(opt_data_attr);
1386 break; 1407 break;
1387 case TEAM_OPTION_TYPE_STRING: 1408 case TEAM_OPTION_TYPE_STRING:
1409 if (data_len > TEAM_STRING_MAX_LEN) {
1410 err = -EINVAL;
1411 goto team_put;
1412 }
1388 arg = (long) nla_data(opt_data_attr); 1413 arg = (long) nla_data(opt_data_attr);
1389 break; 1414 break;
1415 case TEAM_OPTION_TYPE_BINARY:
1416 tbinary.data_len = data_len;
1417 tbinary.data = nla_data(opt_data_attr);
1418 arg = (long) &tbinary;
1419 break;
1390 default: 1420 default:
1391 BUG(); 1421 BUG();
1392 } 1422 }
@@ -1420,7 +1450,8 @@ static int team_nl_fill_port_list_get(struct sk_buff *skb,
1420 if (IS_ERR(hdr)) 1450 if (IS_ERR(hdr))
1421 return PTR_ERR(hdr); 1451 return PTR_ERR(hdr);
1422 1452
1423 NLA_PUT_U32(skb, TEAM_ATTR_TEAM_IFINDEX, team->dev->ifindex); 1453 if (nla_put_u32(skb, TEAM_ATTR_TEAM_IFINDEX, team->dev->ifindex))
1454 goto nla_put_failure;
1424 port_list = nla_nest_start(skb, TEAM_ATTR_LIST_PORT); 1455 port_list = nla_nest_start(skb, TEAM_ATTR_LIST_PORT);
1425 if (!port_list) 1456 if (!port_list)
1426 return -EMSGSIZE; 1457 return -EMSGSIZE;
@@ -1434,17 +1465,20 @@ static int team_nl_fill_port_list_get(struct sk_buff *skb,
1434 port_item = nla_nest_start(skb, TEAM_ATTR_ITEM_PORT); 1465 port_item = nla_nest_start(skb, TEAM_ATTR_ITEM_PORT);
1435 if (!port_item) 1466 if (!port_item)
1436 goto nla_put_failure; 1467 goto nla_put_failure;
1437 NLA_PUT_U32(skb, TEAM_ATTR_PORT_IFINDEX, port->dev->ifindex); 1468 if (nla_put_u32(skb, TEAM_ATTR_PORT_IFINDEX, port->dev->ifindex))
1469 goto nla_put_failure;
1438 if (port->changed) { 1470 if (port->changed) {
1439 NLA_PUT_FLAG(skb, TEAM_ATTR_PORT_CHANGED); 1471 if (nla_put_flag(skb, TEAM_ATTR_PORT_CHANGED))
1472 goto nla_put_failure;
1440 port->changed = false; 1473 port->changed = false;
1441 } 1474 }
1442 if (port->removed) 1475 if ((port->removed &&
1443 NLA_PUT_FLAG(skb, TEAM_ATTR_PORT_REMOVED); 1476 nla_put_flag(skb, TEAM_ATTR_PORT_REMOVED)) ||
1444 if (port->linkup) 1477 (port->linkup &&
1445 NLA_PUT_FLAG(skb, TEAM_ATTR_PORT_LINKUP); 1478 nla_put_flag(skb, TEAM_ATTR_PORT_LINKUP)) ||
1446 NLA_PUT_U32(skb, TEAM_ATTR_PORT_SPEED, port->speed); 1479 nla_put_u32(skb, TEAM_ATTR_PORT_SPEED, port->speed) ||
1447 NLA_PUT_U8(skb, TEAM_ATTR_PORT_DUPLEX, port->duplex); 1480 nla_put_u8(skb, TEAM_ATTR_PORT_DUPLEX, port->duplex))
1481 goto nla_put_failure;
1448 nla_nest_end(skb, port_item); 1482 nla_nest_end(skb, port_item);
1449 } 1483 }
1450 1484
diff --git a/drivers/net/team/team_mode_loadbalance.c b/drivers/net/team/team_mode_loadbalance.c
new file mode 100644
index 000000000000..ed20f395be6f
--- /dev/null
+++ b/drivers/net/team/team_mode_loadbalance.c
@@ -0,0 +1,188 @@
1/*
2 * drivers/net/team/team_mode_loadbalance.c - Load-balancing mode for team
3 * Copyright (c) 2012 Jiri Pirko <jpirko@redhat.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/module.h>
14#include <linux/init.h>
15#include <linux/errno.h>
16#include <linux/netdevice.h>
17#include <linux/filter.h>
18#include <linux/if_team.h>
19
20struct lb_priv {
21 struct sk_filter __rcu *fp;
22 struct sock_fprog *orig_fprog;
23};
24
25static struct lb_priv *lb_priv(struct team *team)
26{
27 return (struct lb_priv *) &team->mode_priv;
28}
29
30static bool lb_transmit(struct team *team, struct sk_buff *skb)
31{
32 struct sk_filter *fp;
33 struct team_port *port;
34 unsigned int hash;
35 int port_index;
36
37 fp = rcu_dereference(lb_priv(team)->fp);
38 if (unlikely(!fp))
39 goto drop;
40 hash = SK_RUN_FILTER(fp, skb);
41 port_index = hash % team->port_count;
42 port = team_get_port_by_index_rcu(team, port_index);
43 if (unlikely(!port))
44 goto drop;
45 skb->dev = port->dev;
46 if (dev_queue_xmit(skb))
47 return false;
48 return true;
49
50drop:
51 dev_kfree_skb_any(skb);
52 return false;
53}
54
55static int lb_bpf_func_get(struct team *team, void *arg)
56{
57 struct team_option_binary *tbinary = team_optarg_tbinary(arg);
58
59 memset(tbinary, 0, sizeof(*tbinary));
60 if (!lb_priv(team)->orig_fprog)
61 return 0;
62
63 tbinary->data_len = lb_priv(team)->orig_fprog->len *
64 sizeof(struct sock_filter);
65 tbinary->data = lb_priv(team)->orig_fprog->filter;
66 return 0;
67}
68
69static int __fprog_create(struct sock_fprog **pfprog, u32 data_len,
70 void *data)
71{
72 struct sock_fprog *fprog;
73 struct sock_filter *filter = (struct sock_filter *) data;
74
75 if (data_len % sizeof(struct sock_filter))
76 return -EINVAL;
77 fprog = kmalloc(sizeof(struct sock_fprog), GFP_KERNEL);
78 if (!fprog)
79 return -ENOMEM;
80 fprog->filter = kmemdup(filter, data_len, GFP_KERNEL);
81 if (!fprog->filter) {
82 kfree(fprog);
83 return -ENOMEM;
84 }
85 fprog->len = data_len / sizeof(struct sock_filter);
86 *pfprog = fprog;
87 return 0;
88}
89
90static void __fprog_destroy(struct sock_fprog *fprog)
91{
92 kfree(fprog->filter);
93 kfree(fprog);
94}
95
96static int lb_bpf_func_set(struct team *team, void *arg)
97{
98 struct team_option_binary *tbinary = team_optarg_tbinary(arg);
99 struct sk_filter *fp = NULL;
100 struct sock_fprog *fprog = NULL;
101 int err;
102
103 if (tbinary->data_len) {
104 err = __fprog_create(&fprog, tbinary->data_len,
105 tbinary->data);
106 if (err)
107 return err;
108 err = sk_unattached_filter_create(&fp, fprog);
109 if (err) {
110 __fprog_destroy(fprog);
111 return err;
112 }
113 }
114
115 if (lb_priv(team)->orig_fprog) {
116 /* Clear old filter data */
117 __fprog_destroy(lb_priv(team)->orig_fprog);
118 sk_unattached_filter_destroy(lb_priv(team)->fp);
119 }
120
121 rcu_assign_pointer(lb_priv(team)->fp, fp);
122 lb_priv(team)->orig_fprog = fprog;
123 return 0;
124}
125
126static const struct team_option lb_options[] = {
127 {
128 .name = "bpf_hash_func",
129 .type = TEAM_OPTION_TYPE_BINARY,
130 .getter = lb_bpf_func_get,
131 .setter = lb_bpf_func_set,
132 },
133};
134
135int lb_init(struct team *team)
136{
137 return team_options_register(team, lb_options,
138 ARRAY_SIZE(lb_options));
139}
140
141void lb_exit(struct team *team)
142{
143 team_options_unregister(team, lb_options,
144 ARRAY_SIZE(lb_options));
145}
146
147static int lb_port_enter(struct team *team, struct team_port *port)
148{
149 return team_port_set_team_mac(port);
150}
151
152static void lb_port_change_mac(struct team *team, struct team_port *port)
153{
154 team_port_set_team_mac(port);
155}
156
157static const struct team_mode_ops lb_mode_ops = {
158 .init = lb_init,
159 .exit = lb_exit,
160 .transmit = lb_transmit,
161 .port_enter = lb_port_enter,
162 .port_change_mac = lb_port_change_mac,
163};
164
165static struct team_mode lb_mode = {
166 .kind = "loadbalance",
167 .owner = THIS_MODULE,
168 .priv_size = sizeof(struct lb_priv),
169 .ops = &lb_mode_ops,
170};
171
172static int __init lb_init_module(void)
173{
174 return team_mode_register(&lb_mode);
175}
176
177static void __exit lb_cleanup_module(void)
178{
179 team_mode_unregister(&lb_mode);
180}
181
182module_init(lb_init_module);
183module_exit(lb_cleanup_module);
184
185MODULE_LICENSE("GPL v2");
186MODULE_AUTHOR("Jiri Pirko <jpirko@redhat.com>");
187MODULE_DESCRIPTION("Load-balancing mode for team");
188MODULE_ALIAS("team-mode-loadbalance");
diff --git a/drivers/net/usb/usbnet.c b/drivers/net/usb/usbnet.c
index b7b3f5b0d406..db9953630da5 100644
--- a/drivers/net/usb/usbnet.c
+++ b/drivers/net/usb/usbnet.c
@@ -884,6 +884,7 @@ static const struct ethtool_ops usbnet_ethtool_ops = {
884 .get_drvinfo = usbnet_get_drvinfo, 884 .get_drvinfo = usbnet_get_drvinfo,
885 .get_msglevel = usbnet_get_msglevel, 885 .get_msglevel = usbnet_get_msglevel,
886 .set_msglevel = usbnet_set_msglevel, 886 .set_msglevel = usbnet_set_msglevel,
887 .get_ts_info = ethtool_op_get_ts_info,
887}; 888};
888 889
889/*-------------------------------------------------------------------------*/ 890/*-------------------------------------------------------------------------*/
diff --git a/drivers/net/wireless/ath/ath6kl/testmode.c b/drivers/net/wireless/ath/ath6kl/testmode.c
index 6675c92b542b..acc9aa832f76 100644
--- a/drivers/net/wireless/ath/ath6kl/testmode.c
+++ b/drivers/net/wireless/ath/ath6kl/testmode.c
@@ -55,8 +55,9 @@ void ath6kl_tm_rx_event(struct ath6kl *ar, void *buf, size_t buf_len)
55 ath6kl_warn("failed to allocate testmode rx skb!\n"); 55 ath6kl_warn("failed to allocate testmode rx skb!\n");
56 return; 56 return;
57 } 57 }
58 NLA_PUT_U32(skb, ATH6KL_TM_ATTR_CMD, ATH6KL_TM_CMD_TCMD); 58 if (nla_put_u32(skb, ATH6KL_TM_ATTR_CMD, ATH6KL_TM_CMD_TCMD) ||
59 NLA_PUT(skb, ATH6KL_TM_ATTR_DATA, buf_len, buf); 59 nla_put(skb, ATH6KL_TM_ATTR_DATA, buf_len, buf))
60 goto nla_put_failure;
60 cfg80211_testmode_event(skb, GFP_KERNEL); 61 cfg80211_testmode_event(skb, GFP_KERNEL);
61 return; 62 return;
62 63
diff --git a/drivers/net/wireless/ipw2x00/ipw2100.c b/drivers/net/wireless/ipw2x00/ipw2100.c
index f0551f807f69..3c06c6b093e9 100644
--- a/drivers/net/wireless/ipw2x00/ipw2100.c
+++ b/drivers/net/wireless/ipw2x00/ipw2100.c
@@ -343,38 +343,50 @@ static struct iw_handler_def ipw2100_wx_handler_def;
343 343
344static inline void read_register(struct net_device *dev, u32 reg, u32 * val) 344static inline void read_register(struct net_device *dev, u32 reg, u32 * val)
345{ 345{
346 *val = readl((void __iomem *)(dev->base_addr + reg)); 346 struct ipw2100_priv *priv = libipw_priv(dev);
347
348 *val = ioread32(priv->ioaddr + reg);
347 IPW_DEBUG_IO("r: 0x%08X => 0x%08X\n", reg, *val); 349 IPW_DEBUG_IO("r: 0x%08X => 0x%08X\n", reg, *val);
348} 350}
349 351
350static inline void write_register(struct net_device *dev, u32 reg, u32 val) 352static inline void write_register(struct net_device *dev, u32 reg, u32 val)
351{ 353{
352 writel(val, (void __iomem *)(dev->base_addr + reg)); 354 struct ipw2100_priv *priv = libipw_priv(dev);
355
356 iowrite32(val, priv->ioaddr + reg);
353 IPW_DEBUG_IO("w: 0x%08X <= 0x%08X\n", reg, val); 357 IPW_DEBUG_IO("w: 0x%08X <= 0x%08X\n", reg, val);
354} 358}
355 359
356static inline void read_register_word(struct net_device *dev, u32 reg, 360static inline void read_register_word(struct net_device *dev, u32 reg,
357 u16 * val) 361 u16 * val)
358{ 362{
359 *val = readw((void __iomem *)(dev->base_addr + reg)); 363 struct ipw2100_priv *priv = libipw_priv(dev);
364
365 *val = ioread16(priv->ioaddr + reg);
360 IPW_DEBUG_IO("r: 0x%08X => %04X\n", reg, *val); 366 IPW_DEBUG_IO("r: 0x%08X => %04X\n", reg, *val);
361} 367}
362 368
363static inline void read_register_byte(struct net_device *dev, u32 reg, u8 * val) 369static inline void read_register_byte(struct net_device *dev, u32 reg, u8 * val)
364{ 370{
365 *val = readb((void __iomem *)(dev->base_addr + reg)); 371 struct ipw2100_priv *priv = libipw_priv(dev);
372
373 *val = ioread8(priv->ioaddr + reg);
366 IPW_DEBUG_IO("r: 0x%08X => %02X\n", reg, *val); 374 IPW_DEBUG_IO("r: 0x%08X => %02X\n", reg, *val);
367} 375}
368 376
369static inline void write_register_word(struct net_device *dev, u32 reg, u16 val) 377static inline void write_register_word(struct net_device *dev, u32 reg, u16 val)
370{ 378{
371 writew(val, (void __iomem *)(dev->base_addr + reg)); 379 struct ipw2100_priv *priv = libipw_priv(dev);
380
381 iowrite16(val, priv->ioaddr + reg);
372 IPW_DEBUG_IO("w: 0x%08X <= %04X\n", reg, val); 382 IPW_DEBUG_IO("w: 0x%08X <= %04X\n", reg, val);
373} 383}
374 384
375static inline void write_register_byte(struct net_device *dev, u32 reg, u8 val) 385static inline void write_register_byte(struct net_device *dev, u32 reg, u8 val)
376{ 386{
377 writeb(val, (void __iomem *)(dev->base_addr + reg)); 387 struct ipw2100_priv *priv = libipw_priv(dev);
388
389 iowrite8(val, priv->ioaddr + reg);
378 IPW_DEBUG_IO("w: 0x%08X =< %02X\n", reg, val); 390 IPW_DEBUG_IO("w: 0x%08X =< %02X\n", reg, val);
379} 391}
380 392
@@ -506,13 +518,13 @@ static void read_nic_memory(struct net_device *dev, u32 addr, u32 len,
506 read_register_byte(dev, IPW_REG_INDIRECT_ACCESS_DATA + i, buf); 518 read_register_byte(dev, IPW_REG_INDIRECT_ACCESS_DATA + i, buf);
507} 519}
508 520
509static inline int ipw2100_hw_is_adapter_in_system(struct net_device *dev) 521static bool ipw2100_hw_is_adapter_in_system(struct net_device *dev)
510{ 522{
511 return (dev->base_addr && 523 u32 dbg;
512 (readl 524
513 ((void __iomem *)(dev->base_addr + 525 read_register(dev, IPW_REG_DOA_DEBUG_AREA_START, &dbg);
514 IPW_REG_DOA_DEBUG_AREA_START)) 526
515 == IPW_DATA_DOA_DEBUG_VALUE)); 527 return dbg == IPW_DATA_DOA_DEBUG_VALUE;
516} 528}
517 529
518static int ipw2100_get_ordinal(struct ipw2100_priv *priv, u32 ord, 530static int ipw2100_get_ordinal(struct ipw2100_priv *priv, u32 ord,
@@ -6082,9 +6094,7 @@ static const struct net_device_ops ipw2100_netdev_ops = {
6082/* Look into using netdev destructor to shutdown libipw? */ 6094/* Look into using netdev destructor to shutdown libipw? */
6083 6095
6084static struct net_device *ipw2100_alloc_device(struct pci_dev *pci_dev, 6096static struct net_device *ipw2100_alloc_device(struct pci_dev *pci_dev,
6085 void __iomem * base_addr, 6097 void __iomem * ioaddr)
6086 unsigned long mem_start,
6087 unsigned long mem_len)
6088{ 6098{
6089 struct ipw2100_priv *priv; 6099 struct ipw2100_priv *priv;
6090 struct net_device *dev; 6100 struct net_device *dev;
@@ -6096,6 +6106,7 @@ static struct net_device *ipw2100_alloc_device(struct pci_dev *pci_dev,
6096 priv->ieee = netdev_priv(dev); 6106 priv->ieee = netdev_priv(dev);
6097 priv->pci_dev = pci_dev; 6107 priv->pci_dev = pci_dev;
6098 priv->net_dev = dev; 6108 priv->net_dev = dev;
6109 priv->ioaddr = ioaddr;
6099 6110
6100 priv->ieee->hard_start_xmit = ipw2100_tx; 6111 priv->ieee->hard_start_xmit = ipw2100_tx;
6101 priv->ieee->set_security = shim__set_security; 6112 priv->ieee->set_security = shim__set_security;
@@ -6111,10 +6122,6 @@ static struct net_device *ipw2100_alloc_device(struct pci_dev *pci_dev,
6111 dev->watchdog_timeo = 3 * HZ; 6122 dev->watchdog_timeo = 3 * HZ;
6112 dev->irq = 0; 6123 dev->irq = 0;
6113 6124
6114 dev->base_addr = (unsigned long)base_addr;
6115 dev->mem_start = mem_start;
6116 dev->mem_end = dev->mem_start + mem_len - 1;
6117
6118 /* NOTE: We don't use the wireless_handlers hook 6125 /* NOTE: We don't use the wireless_handlers hook
6119 * in dev as the system will start throwing WX requests 6126 * in dev as the system will start throwing WX requests
6120 * to us before we're actually initialized and it just 6127 * to us before we're actually initialized and it just
@@ -6215,8 +6222,7 @@ static struct net_device *ipw2100_alloc_device(struct pci_dev *pci_dev,
6215static int ipw2100_pci_init_one(struct pci_dev *pci_dev, 6222static int ipw2100_pci_init_one(struct pci_dev *pci_dev,
6216 const struct pci_device_id *ent) 6223 const struct pci_device_id *ent)
6217{ 6224{
6218 unsigned long mem_start, mem_len, mem_flags; 6225 void __iomem *ioaddr;
6219 void __iomem *base_addr = NULL;
6220 struct net_device *dev = NULL; 6226 struct net_device *dev = NULL;
6221 struct ipw2100_priv *priv = NULL; 6227 struct ipw2100_priv *priv = NULL;
6222 int err = 0; 6228 int err = 0;
@@ -6225,18 +6231,14 @@ static int ipw2100_pci_init_one(struct pci_dev *pci_dev,
6225 6231
6226 IPW_DEBUG_INFO("enter\n"); 6232 IPW_DEBUG_INFO("enter\n");
6227 6233
6228 mem_start = pci_resource_start(pci_dev, 0); 6234 if (!(pci_resource_flags(pci_dev, 0) & IORESOURCE_MEM)) {
6229 mem_len = pci_resource_len(pci_dev, 0);
6230 mem_flags = pci_resource_flags(pci_dev, 0);
6231
6232 if ((mem_flags & IORESOURCE_MEM) != IORESOURCE_MEM) {
6233 IPW_DEBUG_INFO("weird - resource type is not memory\n"); 6235 IPW_DEBUG_INFO("weird - resource type is not memory\n");
6234 err = -ENODEV; 6236 err = -ENODEV;
6235 goto fail; 6237 goto out;
6236 } 6238 }
6237 6239
6238 base_addr = ioremap_nocache(mem_start, mem_len); 6240 ioaddr = pci_iomap(pci_dev, 0, 0);
6239 if (!base_addr) { 6241 if (!ioaddr) {
6240 printk(KERN_WARNING DRV_NAME 6242 printk(KERN_WARNING DRV_NAME
6241 "Error calling ioremap_nocache.\n"); 6243 "Error calling ioremap_nocache.\n");
6242 err = -EIO; 6244 err = -EIO;
@@ -6244,7 +6246,7 @@ static int ipw2100_pci_init_one(struct pci_dev *pci_dev,
6244 } 6246 }
6245 6247
6246 /* allocate and initialize our net_device */ 6248 /* allocate and initialize our net_device */
6247 dev = ipw2100_alloc_device(pci_dev, base_addr, mem_start, mem_len); 6249 dev = ipw2100_alloc_device(pci_dev, ioaddr);
6248 if (!dev) { 6250 if (!dev) {
6249 printk(KERN_WARNING DRV_NAME 6251 printk(KERN_WARNING DRV_NAME
6250 "Error calling ipw2100_alloc_device.\n"); 6252 "Error calling ipw2100_alloc_device.\n");
@@ -6379,8 +6381,8 @@ static int ipw2100_pci_init_one(struct pci_dev *pci_dev,
6379 priv->status |= STATUS_INITIALIZED; 6381 priv->status |= STATUS_INITIALIZED;
6380 6382
6381 mutex_unlock(&priv->action_mutex); 6383 mutex_unlock(&priv->action_mutex);
6382 6384out:
6383 return 0; 6385 return err;
6384 6386
6385 fail_unlock: 6387 fail_unlock:
6386 mutex_unlock(&priv->action_mutex); 6388 mutex_unlock(&priv->action_mutex);
@@ -6409,63 +6411,56 @@ static int ipw2100_pci_init_one(struct pci_dev *pci_dev,
6409 pci_set_drvdata(pci_dev, NULL); 6411 pci_set_drvdata(pci_dev, NULL);
6410 } 6412 }
6411 6413
6412 if (base_addr) 6414 pci_iounmap(pci_dev, ioaddr);
6413 iounmap(base_addr);
6414 6415
6415 pci_release_regions(pci_dev); 6416 pci_release_regions(pci_dev);
6416 pci_disable_device(pci_dev); 6417 pci_disable_device(pci_dev);
6417 6418 goto out;
6418 return err;
6419} 6419}
6420 6420
6421static void __devexit ipw2100_pci_remove_one(struct pci_dev *pci_dev) 6421static void __devexit ipw2100_pci_remove_one(struct pci_dev *pci_dev)
6422{ 6422{
6423 struct ipw2100_priv *priv = pci_get_drvdata(pci_dev); 6423 struct ipw2100_priv *priv = pci_get_drvdata(pci_dev);
6424 struct net_device *dev; 6424 struct net_device *dev = priv->net_dev;
6425 6425
6426 if (priv) { 6426 mutex_lock(&priv->action_mutex);
6427 mutex_lock(&priv->action_mutex);
6428 6427
6429 priv->status &= ~STATUS_INITIALIZED; 6428 priv->status &= ~STATUS_INITIALIZED;
6430 6429
6431 dev = priv->net_dev; 6430 sysfs_remove_group(&pci_dev->dev.kobj, &ipw2100_attribute_group);
6432 sysfs_remove_group(&pci_dev->dev.kobj,
6433 &ipw2100_attribute_group);
6434 6431
6435#ifdef CONFIG_PM 6432#ifdef CONFIG_PM
6436 if (ipw2100_firmware.version) 6433 if (ipw2100_firmware.version)
6437 ipw2100_release_firmware(priv, &ipw2100_firmware); 6434 ipw2100_release_firmware(priv, &ipw2100_firmware);
6438#endif 6435#endif
6439 /* Take down the hardware */ 6436 /* Take down the hardware */
6440 ipw2100_down(priv); 6437 ipw2100_down(priv);
6441 6438
6442 /* Release the mutex so that the network subsystem can 6439 /* Release the mutex so that the network subsystem can
6443 * complete any needed calls into the driver... */ 6440 * complete any needed calls into the driver... */
6444 mutex_unlock(&priv->action_mutex); 6441 mutex_unlock(&priv->action_mutex);
6445 6442
6446 /* Unregister the device first - this results in close() 6443 /* Unregister the device first - this results in close()
6447 * being called if the device is open. If we free storage 6444 * being called if the device is open. If we free storage
6448 * first, then close() will crash. */ 6445 * first, then close() will crash.
6449 unregister_netdev(dev); 6446 * FIXME: remove the comment above. */
6447 unregister_netdev(dev);
6450 6448
6451 ipw2100_kill_works(priv); 6449 ipw2100_kill_works(priv);
6452 6450
6453 ipw2100_queues_free(priv); 6451 ipw2100_queues_free(priv);
6454 6452
6455 /* Free potential debugging firmware snapshot */ 6453 /* Free potential debugging firmware snapshot */
6456 ipw2100_snapshot_free(priv); 6454 ipw2100_snapshot_free(priv);
6457 6455
6458 if (dev->irq) 6456 free_irq(dev->irq, priv);
6459 free_irq(dev->irq, priv);
6460 6457
6461 if (dev->base_addr) 6458 pci_iounmap(pci_dev, priv->ioaddr);
6462 iounmap((void __iomem *)dev->base_addr);
6463 6459
6464 /* wiphy_unregister needs to be here, before free_libipw */ 6460 /* wiphy_unregister needs to be here, before free_libipw */
6465 wiphy_unregister(priv->ieee->wdev.wiphy); 6461 wiphy_unregister(priv->ieee->wdev.wiphy);
6466 kfree(priv->ieee->bg_band.channels); 6462 kfree(priv->ieee->bg_band.channels);
6467 free_libipw(dev, 0); 6463 free_libipw(dev, 0);
6468 }
6469 6464
6470 pci_release_regions(pci_dev); 6465 pci_release_regions(pci_dev);
6471 pci_disable_device(pci_dev); 6466 pci_disable_device(pci_dev);
@@ -8609,7 +8604,7 @@ static int ipw2100_ucode_download(struct ipw2100_priv *priv,
8609 struct net_device *dev = priv->net_dev; 8604 struct net_device *dev = priv->net_dev;
8610 const unsigned char *microcode_data = fw->uc.data; 8605 const unsigned char *microcode_data = fw->uc.data;
8611 unsigned int microcode_data_left = fw->uc.size; 8606 unsigned int microcode_data_left = fw->uc.size;
8612 void __iomem *reg = (void __iomem *)dev->base_addr; 8607 void __iomem *reg = priv->ioaddr;
8613 8608
8614 struct symbol_alive_response response; 8609 struct symbol_alive_response response;
8615 int i, j; 8610 int i, j;
diff --git a/drivers/net/wireless/ipw2x00/ipw2100.h b/drivers/net/wireless/ipw2x00/ipw2100.h
index 99cba968aa58..e5b1c77ae0eb 100644
--- a/drivers/net/wireless/ipw2x00/ipw2100.h
+++ b/drivers/net/wireless/ipw2x00/ipw2100.h
@@ -488,6 +488,7 @@ enum {
488#define CAP_PRIVACY_ON (1<<1) /* Off = No privacy */ 488#define CAP_PRIVACY_ON (1<<1) /* Off = No privacy */
489 489
490struct ipw2100_priv { 490struct ipw2100_priv {
491 void __iomem *ioaddr;
491 492
492 int stop_hang_check; /* Set 1 when shutting down to kill hang_check */ 493 int stop_hang_check; /* Set 1 when shutting down to kill hang_check */
493 int stop_rf_kill; /* Set 1 when shutting down to kill rf_kill */ 494 int stop_rf_kill; /* Set 1 when shutting down to kill rf_kill */
diff --git a/drivers/net/wireless/ipw2x00/ipw2200.c b/drivers/net/wireless/ipw2x00/ipw2200.c
index 2b022571a859..57af0fc76d12 100644
--- a/drivers/net/wireless/ipw2x00/ipw2200.c
+++ b/drivers/net/wireless/ipw2x00/ipw2200.c
@@ -11826,10 +11826,6 @@ static int __devinit ipw_pci_probe(struct pci_dev *pdev,
11826 net_dev->wireless_data = &priv->wireless_data; 11826 net_dev->wireless_data = &priv->wireless_data;
11827 net_dev->wireless_handlers = &ipw_wx_handler_def; 11827 net_dev->wireless_handlers = &ipw_wx_handler_def;
11828 net_dev->ethtool_ops = &ipw_ethtool_ops; 11828 net_dev->ethtool_ops = &ipw_ethtool_ops;
11829 net_dev->irq = pdev->irq;
11830 net_dev->base_addr = (unsigned long)priv->hw_base;
11831 net_dev->mem_start = pci_resource_start(pdev, 0);
11832 net_dev->mem_end = net_dev->mem_start + pci_resource_len(pdev, 0) - 1;
11833 11829
11834 err = sysfs_create_group(&pdev->dev.kobj, &ipw_attribute_group); 11830 err = sysfs_create_group(&pdev->dev.kobj, &ipw_attribute_group);
11835 if (err) { 11831 if (err) {
diff --git a/drivers/net/wireless/iwlwifi/iwl-testmode.c b/drivers/net/wireless/iwlwifi/iwl-testmode.c
index 76f7f9251436..a54e20e7b17f 100644
--- a/drivers/net/wireless/iwlwifi/iwl-testmode.c
+++ b/drivers/net/wireless/iwlwifi/iwl-testmode.c
@@ -184,9 +184,10 @@ static void iwl_testmode_ucode_rx_pkt(struct iwl_priv *priv,
184 "Run out of memory for messages to user space ?\n"); 184 "Run out of memory for messages to user space ?\n");
185 return; 185 return;
186 } 186 }
187 NLA_PUT_U32(skb, IWL_TM_ATTR_COMMAND, IWL_TM_CMD_DEV2APP_UCODE_RX_PKT); 187 if (nla_put_u32(skb, IWL_TM_ATTR_COMMAND, IWL_TM_CMD_DEV2APP_UCODE_RX_PKT) ||
188 /* the length doesn't include len_n_flags field, so add it manually */ 188 /* the length doesn't include len_n_flags field, so add it manually */
189 NLA_PUT(skb, IWL_TM_ATTR_UCODE_RX_PKT, length + sizeof(__le32), data); 189 nla_put(skb, IWL_TM_ATTR_UCODE_RX_PKT, length + sizeof(__le32), data))
190 goto nla_put_failure;
190 cfg80211_testmode_event(skb, GFP_ATOMIC); 191 cfg80211_testmode_event(skb, GFP_ATOMIC);
191 return; 192 return;
192 193
@@ -314,8 +315,9 @@ static int iwl_testmode_ucode(struct ieee80211_hw *hw, struct nlattr **tb)
314 memcpy(reply_buf, &(pkt->hdr), reply_len); 315 memcpy(reply_buf, &(pkt->hdr), reply_len);
315 iwl_free_resp(&cmd); 316 iwl_free_resp(&cmd);
316 317
317 NLA_PUT_U32(skb, IWL_TM_ATTR_COMMAND, IWL_TM_CMD_DEV2APP_UCODE_RX_PKT); 318 if (nla_put_u32(skb, IWL_TM_ATTR_COMMAND, IWL_TM_CMD_DEV2APP_UCODE_RX_PKT) ||
318 NLA_PUT(skb, IWL_TM_ATTR_UCODE_RX_PKT, reply_len, reply_buf); 319 nla_put(skb, IWL_TM_ATTR_UCODE_RX_PKT, reply_len, reply_buf))
320 goto nla_put_failure;
319 return cfg80211_testmode_reply(skb); 321 return cfg80211_testmode_reply(skb);
320 322
321nla_put_failure: 323nla_put_failure:
@@ -379,7 +381,8 @@ static int iwl_testmode_reg(struct ieee80211_hw *hw, struct nlattr **tb)
379 IWL_ERR(priv, "Memory allocation fail\n"); 381 IWL_ERR(priv, "Memory allocation fail\n");
380 return -ENOMEM; 382 return -ENOMEM;
381 } 383 }
382 NLA_PUT_U32(skb, IWL_TM_ATTR_REG_VALUE32, val32); 384 if (nla_put_u32(skb, IWL_TM_ATTR_REG_VALUE32, val32))
385 goto nla_put_failure;
383 status = cfg80211_testmode_reply(skb); 386 status = cfg80211_testmode_reply(skb);
384 if (status < 0) 387 if (status < 0)
385 IWL_ERR(priv, "Error sending msg : %d\n", status); 388 IWL_ERR(priv, "Error sending msg : %d\n", status);
@@ -478,10 +481,11 @@ static int iwl_testmode_driver(struct ieee80211_hw *hw, struct nlattr **tb)
478 IWL_ERR(priv, "Memory allocation fail\n"); 481 IWL_ERR(priv, "Memory allocation fail\n");
479 return -ENOMEM; 482 return -ENOMEM;
480 } 483 }
481 NLA_PUT_U32(skb, IWL_TM_ATTR_COMMAND, 484 if (nla_put_u32(skb, IWL_TM_ATTR_COMMAND,
482 IWL_TM_CMD_DEV2APP_SYNC_RSP); 485 IWL_TM_CMD_DEV2APP_SYNC_RSP) ||
483 NLA_PUT(skb, IWL_TM_ATTR_SYNC_RSP, 486 nla_put(skb, IWL_TM_ATTR_SYNC_RSP,
484 rsp_data_len, rsp_data_ptr); 487 rsp_data_len, rsp_data_ptr))
488 goto nla_put_failure;
485 status = cfg80211_testmode_reply(skb); 489 status = cfg80211_testmode_reply(skb);
486 if (status < 0) 490 if (status < 0)
487 IWL_ERR(priv, "Error sending msg : %d\n", status); 491 IWL_ERR(priv, "Error sending msg : %d\n", status);
@@ -536,11 +540,12 @@ static int iwl_testmode_driver(struct ieee80211_hw *hw, struct nlattr **tb)
536 IWL_ERR(priv, "Memory allocation fail\n"); 540 IWL_ERR(priv, "Memory allocation fail\n");
537 return -ENOMEM; 541 return -ENOMEM;
538 } 542 }
539 NLA_PUT_U32(skb, IWL_TM_ATTR_COMMAND, 543 if (nla_put_u32(skb, IWL_TM_ATTR_COMMAND,
540 IWL_TM_CMD_DEV2APP_EEPROM_RSP); 544 IWL_TM_CMD_DEV2APP_EEPROM_RSP) ||
541 NLA_PUT(skb, IWL_TM_ATTR_EEPROM, 545 nla_put(skb, IWL_TM_ATTR_EEPROM,
542 cfg(priv)->base_params->eeprom_size, 546 cfg(priv)->base_params->eeprom_size,
543 priv->shrd->eeprom); 547 priv->shrd->eeprom))
548 goto nla_put_failure;
544 status = cfg80211_testmode_reply(skb); 549 status = cfg80211_testmode_reply(skb);
545 if (status < 0) 550 if (status < 0)
546 IWL_ERR(priv, "Error sending msg : %d\n", 551 IWL_ERR(priv, "Error sending msg : %d\n",
@@ -566,8 +571,9 @@ static int iwl_testmode_driver(struct ieee80211_hw *hw, struct nlattr **tb)
566 IWL_ERR(priv, "Memory allocation fail\n"); 571 IWL_ERR(priv, "Memory allocation fail\n");
567 return -ENOMEM; 572 return -ENOMEM;
568 } 573 }
569 NLA_PUT_U32(skb, IWL_TM_ATTR_FW_VERSION, 574 if (nla_put_u32(skb, IWL_TM_ATTR_FW_VERSION,
570 priv->fw->ucode_ver); 575 priv->fw->ucode_ver))
576 goto nla_put_failure;
571 status = cfg80211_testmode_reply(skb); 577 status = cfg80211_testmode_reply(skb);
572 if (status < 0) 578 if (status < 0)
573 IWL_ERR(priv, "Error sending msg : %d\n", status); 579 IWL_ERR(priv, "Error sending msg : %d\n", status);
@@ -582,7 +588,8 @@ static int iwl_testmode_driver(struct ieee80211_hw *hw, struct nlattr **tb)
582 IWL_ERR(priv, "Memory allocation fail\n"); 588 IWL_ERR(priv, "Memory allocation fail\n");
583 return -ENOMEM; 589 return -ENOMEM;
584 } 590 }
585 NLA_PUT_U32(skb, IWL_TM_ATTR_DEVICE_ID, devid); 591 if (nla_put_u32(skb, IWL_TM_ATTR_DEVICE_ID, devid))
592 goto nla_put_failure;
586 status = cfg80211_testmode_reply(skb); 593 status = cfg80211_testmode_reply(skb);
587 if (status < 0) 594 if (status < 0)
588 IWL_ERR(priv, "Error sending msg : %d\n", status); 595 IWL_ERR(priv, "Error sending msg : %d\n", status);
@@ -602,9 +609,10 @@ static int iwl_testmode_driver(struct ieee80211_hw *hw, struct nlattr **tb)
602 inst_size = img->sec[IWL_UCODE_SECTION_INST].len; 609 inst_size = img->sec[IWL_UCODE_SECTION_INST].len;
603 data_size = img->sec[IWL_UCODE_SECTION_DATA].len; 610 data_size = img->sec[IWL_UCODE_SECTION_DATA].len;
604 } 611 }
605 NLA_PUT_U32(skb, IWL_TM_ATTR_FW_TYPE, priv->shrd->ucode_type); 612 if (nla_put_u32(skb, IWL_TM_ATTR_FW_TYPE, priv->shrd->ucode_type) ||
606 NLA_PUT_U32(skb, IWL_TM_ATTR_FW_INST_SIZE, inst_size); 613 nla_put_u32(skb, IWL_TM_ATTR_FW_INST_SIZE, inst_size) ||
607 NLA_PUT_U32(skb, IWL_TM_ATTR_FW_DATA_SIZE, data_size); 614 nla_put_u32(skb, IWL_TM_ATTR_FW_DATA_SIZE, data_size))
615 goto nla_put_failure;
608 status = cfg80211_testmode_reply(skb); 616 status = cfg80211_testmode_reply(skb);
609 if (status < 0) 617 if (status < 0)
610 IWL_ERR(priv, "Error sending msg : %d\n", status); 618 IWL_ERR(priv, "Error sending msg : %d\n", status);
@@ -678,9 +686,10 @@ static int iwl_testmode_trace(struct ieee80211_hw *hw, struct nlattr **tb)
678 iwl_trace_cleanup(priv); 686 iwl_trace_cleanup(priv);
679 return -ENOMEM; 687 return -ENOMEM;
680 } 688 }
681 NLA_PUT(skb, IWL_TM_ATTR_TRACE_ADDR, 689 if (nla_put(skb, IWL_TM_ATTR_TRACE_ADDR,
682 sizeof(priv->testmode_trace.dma_addr), 690 sizeof(priv->testmode_trace.dma_addr),
683 (u64 *)&priv->testmode_trace.dma_addr); 691 (u64 *)&priv->testmode_trace.dma_addr))
692 goto nla_put_failure;
684 status = cfg80211_testmode_reply(skb); 693 status = cfg80211_testmode_reply(skb);
685 if (status < 0) { 694 if (status < 0) {
686 IWL_ERR(priv, "Error sending msg : %d\n", status); 695 IWL_ERR(priv, "Error sending msg : %d\n", status);
@@ -725,9 +734,10 @@ static int iwl_testmode_trace_dump(struct ieee80211_hw *hw,
725 length = priv->testmode_trace.buff_size % 734 length = priv->testmode_trace.buff_size %
726 DUMP_CHUNK_SIZE; 735 DUMP_CHUNK_SIZE;
727 736
728 NLA_PUT(skb, IWL_TM_ATTR_TRACE_DUMP, length, 737 if (nla_put(skb, IWL_TM_ATTR_TRACE_DUMP, length,
729 priv->testmode_trace.trace_addr + 738 priv->testmode_trace.trace_addr +
730 (DUMP_CHUNK_SIZE * idx)); 739 (DUMP_CHUNK_SIZE * idx)))
740 goto nla_put_failure;
731 idx++; 741 idx++;
732 cb->args[4] = idx; 742 cb->args[4] = idx;
733 return 0; 743 return 0;
@@ -922,9 +932,10 @@ static int iwl_testmode_buffer_dump(struct ieee80211_hw *hw,
922 length = priv->testmode_mem.buff_size % 932 length = priv->testmode_mem.buff_size %
923 DUMP_CHUNK_SIZE; 933 DUMP_CHUNK_SIZE;
924 934
925 NLA_PUT(skb, IWL_TM_ATTR_BUFFER_DUMP, length, 935 if (nla_put(skb, IWL_TM_ATTR_BUFFER_DUMP, length,
926 priv->testmode_mem.buff_addr + 936 priv->testmode_mem.buff_addr +
927 (DUMP_CHUNK_SIZE * idx)); 937 (DUMP_CHUNK_SIZE * idx)))
938 goto nla_put_failure;
928 idx++; 939 idx++;
929 cb->args[4] = idx; 940 cb->args[4] = idx;
930 return 0; 941 return 0;
diff --git a/drivers/net/wireless/mac80211_hwsim.c b/drivers/net/wireless/mac80211_hwsim.c
index b7ce6a6e355f..538783f51989 100644
--- a/drivers/net/wireless/mac80211_hwsim.c
+++ b/drivers/net/wireless/mac80211_hwsim.c
@@ -582,11 +582,13 @@ static void mac80211_hwsim_tx_frame_nl(struct ieee80211_hw *hw,
582 goto nla_put_failure; 582 goto nla_put_failure;
583 } 583 }
584 584
585 NLA_PUT(skb, HWSIM_ATTR_ADDR_TRANSMITTER, 585 if (nla_put(skb, HWSIM_ATTR_ADDR_TRANSMITTER,
586 sizeof(struct mac_address), data->addresses[1].addr); 586 sizeof(struct mac_address), data->addresses[1].addr))
587 goto nla_put_failure;
587 588
588 /* We get the skb->data */ 589 /* We get the skb->data */
589 NLA_PUT(skb, HWSIM_ATTR_FRAME, my_skb->len, my_skb->data); 590 if (nla_put(skb, HWSIM_ATTR_FRAME, my_skb->len, my_skb->data))
591 goto nla_put_failure;
590 592
591 /* We get the flags for this transmission, and we translate them to 593 /* We get the flags for this transmission, and we translate them to
592 wmediumd flags */ 594 wmediumd flags */
@@ -597,7 +599,8 @@ static void mac80211_hwsim_tx_frame_nl(struct ieee80211_hw *hw,
597 if (info->flags & IEEE80211_TX_CTL_NO_ACK) 599 if (info->flags & IEEE80211_TX_CTL_NO_ACK)
598 hwsim_flags |= HWSIM_TX_CTL_NO_ACK; 600 hwsim_flags |= HWSIM_TX_CTL_NO_ACK;
599 601
600 NLA_PUT_U32(skb, HWSIM_ATTR_FLAGS, hwsim_flags); 602 if (nla_put_u32(skb, HWSIM_ATTR_FLAGS, hwsim_flags))
603 goto nla_put_failure;
601 604
602 /* We get the tx control (rate and retries) info*/ 605 /* We get the tx control (rate and retries) info*/
603 606
@@ -606,12 +609,14 @@ static void mac80211_hwsim_tx_frame_nl(struct ieee80211_hw *hw,
606 tx_attempts[i].count = info->status.rates[i].count; 609 tx_attempts[i].count = info->status.rates[i].count;
607 } 610 }
608 611
609 NLA_PUT(skb, HWSIM_ATTR_TX_INFO, 612 if (nla_put(skb, HWSIM_ATTR_TX_INFO,
610 sizeof(struct hwsim_tx_rate)*IEEE80211_TX_MAX_RATES, 613 sizeof(struct hwsim_tx_rate)*IEEE80211_TX_MAX_RATES,
611 tx_attempts); 614 tx_attempts))
615 goto nla_put_failure;
612 616
613 /* We create a cookie to identify this skb */ 617 /* We create a cookie to identify this skb */
614 NLA_PUT_U64(skb, HWSIM_ATTR_COOKIE, (unsigned long) my_skb); 618 if (nla_put_u64(skb, HWSIM_ATTR_COOKIE, (unsigned long) my_skb))
619 goto nla_put_failure;
615 620
616 genlmsg_end(skb, msg_head); 621 genlmsg_end(skb, msg_head);
617 genlmsg_unicast(&init_net, skb, dst_pid); 622 genlmsg_unicast(&init_net, skb, dst_pid);
@@ -1108,7 +1113,8 @@ static int mac80211_hwsim_testmode_cmd(struct ieee80211_hw *hw,
1108 nla_total_size(sizeof(u32))); 1113 nla_total_size(sizeof(u32)));
1109 if (!skb) 1114 if (!skb)
1110 return -ENOMEM; 1115 return -ENOMEM;
1111 NLA_PUT_U32(skb, HWSIM_TM_ATTR_PS, hwsim->ps); 1116 if (nla_put_u32(skb, HWSIM_TM_ATTR_PS, hwsim->ps))
1117 goto nla_put_failure;
1112 return cfg80211_testmode_reply(skb); 1118 return cfg80211_testmode_reply(skb);
1113 default: 1119 default:
1114 return -EOPNOTSUPP; 1120 return -EOPNOTSUPP;
diff --git a/drivers/net/wireless/wl12xx/testmode.c b/drivers/net/wireless/wl12xx/testmode.c
index 1e93bb9c0246..b41428f5b3b2 100644
--- a/drivers/net/wireless/wl12xx/testmode.c
+++ b/drivers/net/wireless/wl12xx/testmode.c
@@ -116,7 +116,8 @@ static int wl1271_tm_cmd_test(struct wl1271 *wl, struct nlattr *tb[])
116 goto out_sleep; 116 goto out_sleep;
117 } 117 }
118 118
119 NLA_PUT(skb, WL1271_TM_ATTR_DATA, buf_len, buf); 119 if (nla_put(skb, WL1271_TM_ATTR_DATA, buf_len, buf))
120 goto nla_put_failure;
120 ret = cfg80211_testmode_reply(skb); 121 ret = cfg80211_testmode_reply(skb);
121 if (ret < 0) 122 if (ret < 0)
122 goto out_sleep; 123 goto out_sleep;
@@ -178,7 +179,8 @@ static int wl1271_tm_cmd_interrogate(struct wl1271 *wl, struct nlattr *tb[])
178 goto out_free; 179 goto out_free;
179 } 180 }
180 181
181 NLA_PUT(skb, WL1271_TM_ATTR_DATA, sizeof(*cmd), cmd); 182 if (nla_put(skb, WL1271_TM_ATTR_DATA, sizeof(*cmd), cmd))
183 goto nla_put_failure;
182 ret = cfg80211_testmode_reply(skb); 184 ret = cfg80211_testmode_reply(skb);
183 if (ret < 0) 185 if (ret < 0)
184 goto out_free; 186 goto out_free;
@@ -297,7 +299,8 @@ static int wl12xx_tm_cmd_get_mac(struct wl1271 *wl, struct nlattr *tb[])
297 goto out; 299 goto out;
298 } 300 }
299 301
300 NLA_PUT(skb, WL1271_TM_ATTR_DATA, ETH_ALEN, mac_addr); 302 if (nla_put(skb, WL1271_TM_ATTR_DATA, ETH_ALEN, mac_addr))
303 goto nla_put_failure;
301 ret = cfg80211_testmode_reply(skb); 304 ret = cfg80211_testmode_reply(skb);
302 if (ret < 0) 305 if (ret < 0)
303 goto out; 306 goto out;
diff --git a/drivers/ptp/ptp_clock.c b/drivers/ptp/ptp_clock.c
index f519a131238d..1e528b539a07 100644
--- a/drivers/ptp/ptp_clock.c
+++ b/drivers/ptp/ptp_clock.c
@@ -304,6 +304,12 @@ void ptp_clock_event(struct ptp_clock *ptp, struct ptp_clock_event *event)
304} 304}
305EXPORT_SYMBOL(ptp_clock_event); 305EXPORT_SYMBOL(ptp_clock_event);
306 306
307int ptp_clock_index(struct ptp_clock *ptp)
308{
309 return ptp->index;
310}
311EXPORT_SYMBOL(ptp_clock_index);
312
307/* module operations */ 313/* module operations */
308 314
309static void __exit ptp_exit(void) 315static void __exit ptp_exit(void)
diff --git a/drivers/ptp/ptp_ixp46x.c b/drivers/ptp/ptp_ixp46x.c
index 6f2782bb5f41..9d13a71c5367 100644
--- a/drivers/ptp/ptp_ixp46x.c
+++ b/drivers/ptp/ptp_ixp46x.c
@@ -284,6 +284,7 @@ static void __exit ptp_ixp_exit(void)
284{ 284{
285 free_irq(MASTER_IRQ, &ixp_clock); 285 free_irq(MASTER_IRQ, &ixp_clock);
286 free_irq(SLAVE_IRQ, &ixp_clock); 286 free_irq(SLAVE_IRQ, &ixp_clock);
287 ixp46x_phc_clock = -1;
287 ptp_clock_unregister(ixp_clock.ptp_clock); 288 ptp_clock_unregister(ixp_clock.ptp_clock);
288} 289}
289 290
@@ -302,6 +303,8 @@ static int __init ptp_ixp_init(void)
302 if (IS_ERR(ixp_clock.ptp_clock)) 303 if (IS_ERR(ixp_clock.ptp_clock))
303 return PTR_ERR(ixp_clock.ptp_clock); 304 return PTR_ERR(ixp_clock.ptp_clock);
304 305
306 ixp46x_phc_clock = ptp_clock_index(ixp_clock.ptp_clock);
307
305 __raw_writel(DEFAULT_ADDEND, &ixp_clock.regs->addend); 308 __raw_writel(DEFAULT_ADDEND, &ixp_clock.regs->addend);
306 __raw_writel(1, &ixp_clock.regs->trgt_lo); 309 __raw_writel(1, &ixp_clock.regs->trgt_lo);
307 __raw_writel(0, &ixp_clock.regs->trgt_hi); 310 __raw_writel(0, &ixp_clock.regs->trgt_hi);
diff --git a/include/linux/dcbnl.h b/include/linux/dcbnl.h
index 65a2562f66b4..6bb43382f3f3 100644
--- a/include/linux/dcbnl.h
+++ b/include/linux/dcbnl.h
@@ -67,6 +67,17 @@ struct ieee_ets {
67 __u8 reco_prio_tc[IEEE_8021QAZ_MAX_TCS]; 67 __u8 reco_prio_tc[IEEE_8021QAZ_MAX_TCS];
68}; 68};
69 69
70/* This structure contains rate limit extension to the IEEE 802.1Qaz ETS
71 * managed object.
72 * Values are 64 bits long and specified in Kbps to enable usage over both
73 * slow and very fast networks.
74 *
75 * @tc_maxrate: maximal tc tx bandwidth indexed by traffic class
76 */
77struct ieee_maxrate {
78 __u64 tc_maxrate[IEEE_8021QAZ_MAX_TCS];
79};
80
70/* This structure contains the IEEE 802.1Qaz PFC managed object 81/* This structure contains the IEEE 802.1Qaz PFC managed object
71 * 82 *
72 * @pfc_cap: Indicates the number of traffic classes on the local device 83 * @pfc_cap: Indicates the number of traffic classes on the local device
@@ -321,6 +332,7 @@ enum ieee_attrs {
321 DCB_ATTR_IEEE_PEER_ETS, 332 DCB_ATTR_IEEE_PEER_ETS,
322 DCB_ATTR_IEEE_PEER_PFC, 333 DCB_ATTR_IEEE_PEER_PFC,
323 DCB_ATTR_IEEE_PEER_APP, 334 DCB_ATTR_IEEE_PEER_APP,
335 DCB_ATTR_IEEE_MAXRATE,
324 __DCB_ATTR_IEEE_MAX 336 __DCB_ATTR_IEEE_MAX
325}; 337};
326#define DCB_ATTR_IEEE_MAX (__DCB_ATTR_IEEE_MAX - 1) 338#define DCB_ATTR_IEEE_MAX (__DCB_ATTR_IEEE_MAX - 1)
diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h
index f5647b59a90e..89d68d837b6e 100644
--- a/include/linux/ethtool.h
+++ b/include/linux/ethtool.h
@@ -726,6 +726,29 @@ struct ethtool_sfeatures {
726 struct ethtool_set_features_block features[0]; 726 struct ethtool_set_features_block features[0];
727}; 727};
728 728
729/**
730 * struct ethtool_ts_info - holds a device's timestamping and PHC association
731 * @cmd: command number = %ETHTOOL_GET_TS_INFO
732 * @so_timestamping: bit mask of the sum of the supported SO_TIMESTAMPING flags
733 * @phc_index: device index of the associated PHC, or -1 if there is none
734 * @tx_types: bit mask of the supported hwtstamp_tx_types enumeration values
735 * @rx_filters: bit mask of the supported hwtstamp_rx_filters enumeration values
736 *
737 * The bits in the 'tx_types' and 'rx_filters' fields correspond to
738 * the 'hwtstamp_tx_types' and 'hwtstamp_rx_filters' enumeration values,
739 * respectively. For example, if the device supports HWTSTAMP_TX_ON,
740 * then (1 << HWTSTAMP_TX_ON) in 'tx_types' will be set.
741 */
742struct ethtool_ts_info {
743 __u32 cmd;
744 __u32 so_timestamping;
745 __s32 phc_index;
746 __u32 tx_types;
747 __u32 tx_reserved[3];
748 __u32 rx_filters;
749 __u32 rx_reserved[3];
750};
751
729/* 752/*
730 * %ETHTOOL_SFEATURES changes features present in features[].valid to the 753 * %ETHTOOL_SFEATURES changes features present in features[].valid to the
731 * values of corresponding bits in features[].requested. Bits in .requested 754 * values of corresponding bits in features[].requested. Bits in .requested
@@ -788,6 +811,7 @@ struct net_device;
788 811
789/* Some generic methods drivers may use in their ethtool_ops */ 812/* Some generic methods drivers may use in their ethtool_ops */
790u32 ethtool_op_get_link(struct net_device *dev); 813u32 ethtool_op_get_link(struct net_device *dev);
814int ethtool_op_get_ts_info(struct net_device *dev, struct ethtool_ts_info *eti);
791 815
792/** 816/**
793 * ethtool_rxfh_indir_default - get default value for RX flow hash indirection 817 * ethtool_rxfh_indir_default - get default value for RX flow hash indirection
@@ -893,6 +917,9 @@ static inline u32 ethtool_rxfh_indir_default(u32 index, u32 n_rx_rings)
893 * and flag of the device. 917 * and flag of the device.
894 * @get_dump_data: Get dump data. 918 * @get_dump_data: Get dump data.
895 * @set_dump: Set dump specific flags to the device. 919 * @set_dump: Set dump specific flags to the device.
920 * @get_ts_info: Get the time stamping and PTP hardware clock capabilities.
921 * Drivers supporting transmit time stamps in software should set this to
922 * ethtool_op_get_ts_info().
896 * 923 *
897 * All operations are optional (i.e. the function pointer may be set 924 * All operations are optional (i.e. the function pointer may be set
898 * to %NULL) and callers must take this into account. Callers must 925 * to %NULL) and callers must take this into account. Callers must
@@ -954,6 +981,7 @@ struct ethtool_ops {
954 int (*get_dump_data)(struct net_device *, 981 int (*get_dump_data)(struct net_device *,
955 struct ethtool_dump *, void *); 982 struct ethtool_dump *, void *);
956 int (*set_dump)(struct net_device *, struct ethtool_dump *); 983 int (*set_dump)(struct net_device *, struct ethtool_dump *);
984 int (*get_ts_info)(struct net_device *, struct ethtool_ts_info *);
957 985
958}; 986};
959#endif /* __KERNEL__ */ 987#endif /* __KERNEL__ */
@@ -1028,6 +1056,7 @@ struct ethtool_ops {
1028#define ETHTOOL_SET_DUMP 0x0000003e /* Set dump settings */ 1056#define ETHTOOL_SET_DUMP 0x0000003e /* Set dump settings */
1029#define ETHTOOL_GET_DUMP_FLAG 0x0000003f /* Get dump settings */ 1057#define ETHTOOL_GET_DUMP_FLAG 0x0000003f /* Get dump settings */
1030#define ETHTOOL_GET_DUMP_DATA 0x00000040 /* Get dump data */ 1058#define ETHTOOL_GET_DUMP_DATA 0x00000040 /* Get dump data */
1059#define ETHTOOL_GET_TS_INFO 0x00000041 /* Get time stamping and PHC info */
1031 1060
1032/* compatibility with older code */ 1061/* compatibility with older code */
1033#define SPARC_ETH_GSET ETHTOOL_GSET 1062#define SPARC_ETH_GSET ETHTOOL_GSET
diff --git a/include/linux/filter.h b/include/linux/filter.h
index 8eeb205f298b..72090994d789 100644
--- a/include/linux/filter.h
+++ b/include/linux/filter.h
@@ -126,7 +126,8 @@ struct sock_fprog { /* Required for SO_ATTACH_FILTER. */
126#define SKF_AD_HATYPE 28 126#define SKF_AD_HATYPE 28
127#define SKF_AD_RXHASH 32 127#define SKF_AD_RXHASH 32
128#define SKF_AD_CPU 36 128#define SKF_AD_CPU 36
129#define SKF_AD_MAX 40 129#define SKF_AD_ALU_XOR_X 40
130#define SKF_AD_MAX 44
130#define SKF_NET_OFF (-0x100000) 131#define SKF_NET_OFF (-0x100000)
131#define SKF_LL_OFF (-0x200000) 132#define SKF_LL_OFF (-0x200000)
132 133
@@ -153,6 +154,9 @@ static inline unsigned int sk_filter_len(const struct sk_filter *fp)
153extern int sk_filter(struct sock *sk, struct sk_buff *skb); 154extern int sk_filter(struct sock *sk, struct sk_buff *skb);
154extern unsigned int sk_run_filter(const struct sk_buff *skb, 155extern unsigned int sk_run_filter(const struct sk_buff *skb,
155 const struct sock_filter *filter); 156 const struct sock_filter *filter);
157extern int sk_unattached_filter_create(struct sk_filter **pfp,
158 struct sock_fprog *fprog);
159extern void sk_unattached_filter_destroy(struct sk_filter *fp);
156extern int sk_attach_filter(struct sock_fprog *fprog, struct sock *sk); 160extern int sk_attach_filter(struct sock_fprog *fprog, struct sock *sk);
157extern int sk_detach_filter(struct sock *sk); 161extern int sk_detach_filter(struct sock *sk);
158extern int sk_chk_filter(struct sock_filter *filter, unsigned int flen); 162extern int sk_chk_filter(struct sock_filter *filter, unsigned int flen);
@@ -228,6 +232,7 @@ enum {
228 BPF_S_ANC_HATYPE, 232 BPF_S_ANC_HATYPE,
229 BPF_S_ANC_RXHASH, 233 BPF_S_ANC_RXHASH,
230 BPF_S_ANC_CPU, 234 BPF_S_ANC_CPU,
235 BPF_S_ANC_ALU_XOR_X,
231}; 236};
232 237
233#endif /* __KERNEL__ */ 238#endif /* __KERNEL__ */
diff --git a/include/linux/hyperv.h b/include/linux/hyperv.h
index 5852545e6bba..6af8738ae7e9 100644
--- a/include/linux/hyperv.h
+++ b/include/linux/hyperv.h
@@ -274,6 +274,33 @@ struct hv_ring_buffer_debug_info {
274 u32 bytes_avail_towrite; 274 u32 bytes_avail_towrite;
275}; 275};
276 276
277
278/*
279 *
280 * hv_get_ringbuffer_availbytes()
281 *
282 * Get number of bytes available to read and to write to
283 * for the specified ring buffer
284 */
285static inline void
286hv_get_ringbuffer_availbytes(struct hv_ring_buffer_info *rbi,
287 u32 *read, u32 *write)
288{
289 u32 read_loc, write_loc, dsize;
290
291 smp_read_barrier_depends();
292
293 /* Capture the read/write indices before they changed */
294 read_loc = rbi->ring_buffer->read_index;
295 write_loc = rbi->ring_buffer->write_index;
296 dsize = rbi->ring_datasize;
297
298 *write = write_loc >= read_loc ? dsize - (write_loc - read_loc) :
299 read_loc - write_loc;
300 *read = dsize - *write;
301}
302
303
277/* 304/*
278 * We use the same version numbering for all Hyper-V modules. 305 * We use the same version numbering for all Hyper-V modules.
279 * 306 *
diff --git a/include/linux/if_link.h b/include/linux/if_link.h
index 4b24ff453aee..2f4fa93454c7 100644
--- a/include/linux/if_link.h
+++ b/include/linux/if_link.h
@@ -138,6 +138,8 @@ enum {
138 IFLA_GROUP, /* Group the device belongs to */ 138 IFLA_GROUP, /* Group the device belongs to */
139 IFLA_NET_NS_FD, 139 IFLA_NET_NS_FD,
140 IFLA_EXT_MASK, /* Extended info mask, VFs, etc */ 140 IFLA_EXT_MASK, /* Extended info mask, VFs, etc */
141 IFLA_PROMISCUITY, /* Promiscuity count: > 0 means acts PROMISC */
142#define IFLA_PROMISCUITY IFLA_PROMISCUITY
141 __IFLA_MAX 143 __IFLA_MAX
142}; 144};
143 145
diff --git a/include/linux/if_team.h b/include/linux/if_team.h
index 58404b0c5010..41163ac14ab4 100644
--- a/include/linux/if_team.h
+++ b/include/linux/if_team.h
@@ -68,6 +68,7 @@ struct team_mode_ops {
68enum team_option_type { 68enum team_option_type {
69 TEAM_OPTION_TYPE_U32, 69 TEAM_OPTION_TYPE_U32,
70 TEAM_OPTION_TYPE_STRING, 70 TEAM_OPTION_TYPE_STRING,
71 TEAM_OPTION_TYPE_BINARY,
71}; 72};
72 73
73struct team_option { 74struct team_option {
@@ -82,6 +83,13 @@ struct team_option {
82 bool removed; 83 bool removed;
83}; 84};
84 85
86struct team_option_binary {
87 u32 data_len;
88 void *data;
89};
90
91#define team_optarg_tbinary(arg) (*((struct team_option_binary **) arg))
92
85struct team_mode { 93struct team_mode {
86 struct list_head list; 94 struct list_head list;
87 const char *kind; 95 const char *kind;
diff --git a/include/linux/mlx4/cmd.h b/include/linux/mlx4/cmd.h
index 9958ff2cad3c..1f3860a8a109 100644
--- a/include/linux/mlx4/cmd.h
+++ b/include/linux/mlx4/cmd.h
@@ -150,6 +150,10 @@ enum {
150 /* statistics commands */ 150 /* statistics commands */
151 MLX4_CMD_QUERY_IF_STAT = 0X54, 151 MLX4_CMD_QUERY_IF_STAT = 0X54,
152 MLX4_CMD_SET_IF_STAT = 0X55, 152 MLX4_CMD_SET_IF_STAT = 0X55,
153
154 /* set port opcode modifiers */
155 MLX4_SET_PORT_PRIO2TC = 0x8,
156 MLX4_SET_PORT_SCHEDULER = 0x9,
153}; 157};
154 158
155enum { 159enum {
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index 834c96c5d879..6d028247f79d 100644
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -628,6 +628,9 @@ int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu,
628 u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx); 628 u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx);
629int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn, 629int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn,
630 u8 promisc); 630 u8 promisc);
631int mlx4_SET_PORT_PRIO2TC(struct mlx4_dev *dev, u8 port, u8 *prio2tc);
632int mlx4_SET_PORT_SCHEDULER(struct mlx4_dev *dev, u8 port, u8 *tc_tx_bw,
633 u8 *pg, u16 *ratelimit);
631int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx); 634int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx);
632int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index); 635int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index);
633void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, int index); 636void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, int index);
diff --git a/include/linux/mlx4/qp.h b/include/linux/mlx4/qp.h
index 091f9e7dc8b9..96005d75893c 100644
--- a/include/linux/mlx4/qp.h
+++ b/include/linux/mlx4/qp.h
@@ -139,7 +139,8 @@ struct mlx4_qp_path {
139 u8 rgid[16]; 139 u8 rgid[16];
140 u8 sched_queue; 140 u8 sched_queue;
141 u8 vlan_index; 141 u8 vlan_index;
142 u8 reserved3[2]; 142 u8 feup;
143 u8 reserved3;
143 u8 reserved4[2]; 144 u8 reserved4[2];
144 u8 dmac[6]; 145 u8 dmac[6];
145}; 146};
diff --git a/include/linux/netfilter/ipset/ip_set.h b/include/linux/netfilter/ipset/ip_set.h
index 2f8e18a23227..d6d549cf1f23 100644
--- a/include/linux/netfilter/ipset/ip_set.h
+++ b/include/linux/netfilter/ipset/ip_set.h
@@ -411,26 +411,32 @@ ip_set_get_h16(const struct nlattr *attr)
411#define ipset_nest_start(skb, attr) nla_nest_start(skb, attr | NLA_F_NESTED) 411#define ipset_nest_start(skb, attr) nla_nest_start(skb, attr | NLA_F_NESTED)
412#define ipset_nest_end(skb, start) nla_nest_end(skb, start) 412#define ipset_nest_end(skb, start) nla_nest_end(skb, start)
413 413
414#define NLA_PUT_IPADDR4(skb, type, ipaddr) \ 414static inline int nla_put_ipaddr4(struct sk_buff *skb, int type, __be32 ipaddr)
415do { \ 415{
416 struct nlattr *__nested = ipset_nest_start(skb, type); \ 416 struct nlattr *__nested = ipset_nest_start(skb, type);
417 \ 417 int ret;
418 if (!__nested) \ 418
419 goto nla_put_failure; \ 419 if (!__nested)
420 NLA_PUT_NET32(skb, IPSET_ATTR_IPADDR_IPV4, ipaddr); \ 420 return -EMSGSIZE;
421 ipset_nest_end(skb, __nested); \ 421 ret = nla_put_net32(skb, IPSET_ATTR_IPADDR_IPV4, ipaddr);
422} while (0) 422 if (!ret)
423 423 ipset_nest_end(skb, __nested);
424#define NLA_PUT_IPADDR6(skb, type, ipaddrptr) \ 424 return ret;
425do { \ 425}
426 struct nlattr *__nested = ipset_nest_start(skb, type); \ 426
427 \ 427static inline int nla_put_ipaddr6(struct sk_buff *skb, int type, const struct in6_addr *ipaddrptr)
428 if (!__nested) \ 428{
429 goto nla_put_failure; \ 429 struct nlattr *__nested = ipset_nest_start(skb, type);
430 NLA_PUT(skb, IPSET_ATTR_IPADDR_IPV6, \ 430 int ret;
431 sizeof(struct in6_addr), ipaddrptr); \ 431
432 ipset_nest_end(skb, __nested); \ 432 if (!__nested)
433} while (0) 433 return -EMSGSIZE;
434 ret = nla_put(skb, IPSET_ATTR_IPADDR_IPV6,
435 sizeof(struct in6_addr), ipaddrptr);
436 if (!ret)
437 ipset_nest_end(skb, __nested);
438 return ret;
439}
434 440
435/* Get address from skbuff */ 441/* Get address from skbuff */
436static inline __be32 442static inline __be32
diff --git a/include/linux/netfilter/ipset/ip_set_ahash.h b/include/linux/netfilter/ipset/ip_set_ahash.h
index 05a5d72680be..289b62d9dd1f 100644
--- a/include/linux/netfilter/ipset/ip_set_ahash.h
+++ b/include/linux/netfilter/ipset/ip_set_ahash.h
@@ -594,17 +594,20 @@ type_pf_head(struct ip_set *set, struct sk_buff *skb)
594 nested = ipset_nest_start(skb, IPSET_ATTR_DATA); 594 nested = ipset_nest_start(skb, IPSET_ATTR_DATA);
595 if (!nested) 595 if (!nested)
596 goto nla_put_failure; 596 goto nla_put_failure;
597 NLA_PUT_NET32(skb, IPSET_ATTR_HASHSIZE, 597 if (nla_put_net32(skb, IPSET_ATTR_HASHSIZE,
598 htonl(jhash_size(h->table->htable_bits))); 598 htonl(jhash_size(h->table->htable_bits))) ||
599 NLA_PUT_NET32(skb, IPSET_ATTR_MAXELEM, htonl(h->maxelem)); 599 nla_put_net32(skb, IPSET_ATTR_MAXELEM, htonl(h->maxelem)))
600 goto nla_put_failure;
600#ifdef IP_SET_HASH_WITH_NETMASK 601#ifdef IP_SET_HASH_WITH_NETMASK
601 if (h->netmask != HOST_MASK) 602 if (h->netmask != HOST_MASK &&
602 NLA_PUT_U8(skb, IPSET_ATTR_NETMASK, h->netmask); 603 nla_put_u8(skb, IPSET_ATTR_NETMASK, h->netmask))
604 goto nla_put_failure;
603#endif 605#endif
604 NLA_PUT_NET32(skb, IPSET_ATTR_REFERENCES, htonl(set->ref - 1)); 606 if (nla_put_net32(skb, IPSET_ATTR_REFERENCES, htonl(set->ref - 1)) ||
605 NLA_PUT_NET32(skb, IPSET_ATTR_MEMSIZE, htonl(memsize)); 607 nla_put_net32(skb, IPSET_ATTR_MEMSIZE, htonl(memsize)) ||
606 if (with_timeout(h->timeout)) 608 (with_timeout(h->timeout) &&
607 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, htonl(h->timeout)); 609 nla_put_net32(skb, IPSET_ATTR_TIMEOUT, htonl(h->timeout))))
610 goto nla_put_failure;
608 ipset_nest_end(skb, nested); 611 ipset_nest_end(skb, nested);
609 612
610 return 0; 613 return 0;
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 6fe0a37d4abf..f092032f1c98 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -412,6 +412,9 @@ struct phy_driver {
412 /* Clears up any memory if needed */ 412 /* Clears up any memory if needed */
413 void (*remove)(struct phy_device *phydev); 413 void (*remove)(struct phy_device *phydev);
414 414
415 /* Handles ethtool queries for hardware time stamping. */
416 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
417
415 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */ 418 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
416 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr); 419 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
417 420
diff --git a/include/linux/platform_data/wiznet.h b/include/linux/platform_data/wiznet.h
new file mode 100644
index 000000000000..b5d8c192d84d
--- /dev/null
+++ b/include/linux/platform_data/wiznet.h
@@ -0,0 +1,24 @@
1/*
2 * Ethernet driver for the WIZnet W5x00 chip.
3 *
4 * Licensed under the GPL-2 or later.
5 */
6
7#ifndef PLATFORM_DATA_WIZNET_H
8#define PLATFORM_DATA_WIZNET_H
9
10#include <linux/if_ether.h>
11
12struct wiznet_platform_data {
13 int link_gpio;
14 u8 mac_addr[ETH_ALEN];
15};
16
17#ifndef CONFIG_WIZNET_BUS_SHIFT
18#define CONFIG_WIZNET_BUS_SHIFT 0
19#endif
20
21#define W5100_BUS_DIRECT_SIZE (0x8000 << CONFIG_WIZNET_BUS_SHIFT)
22#define W5300_BUS_DIRECT_SIZE (0x0400 << CONFIG_WIZNET_BUS_SHIFT)
23
24#endif /* PLATFORM_DATA_WIZNET_H */
diff --git a/include/linux/ptp_clock_kernel.h b/include/linux/ptp_clock_kernel.h
index dd2e44fba63e..945704c2ed65 100644
--- a/include/linux/ptp_clock_kernel.h
+++ b/include/linux/ptp_clock_kernel.h
@@ -136,4 +136,12 @@ struct ptp_clock_event {
136extern void ptp_clock_event(struct ptp_clock *ptp, 136extern void ptp_clock_event(struct ptp_clock *ptp,
137 struct ptp_clock_event *event); 137 struct ptp_clock_event *event);
138 138
139/**
140 * ptp_clock_index() - obtain the device index of a PTP clock
141 *
142 * @ptp: The clock obtained from ptp_clock_register().
143 */
144
145extern int ptp_clock_index(struct ptp_clock *ptp);
146
139#endif 147#endif
diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
index 0dddc9e42b6b..cf6403186359 100644
--- a/include/linux/stmmac.h
+++ b/include/linux/stmmac.h
@@ -28,6 +28,51 @@
28 28
29#include <linux/platform_device.h> 29#include <linux/platform_device.h>
30 30
31#define STMMAC_RX_COE_NONE 0
32#define STMMAC_RX_COE_TYPE1 1
33#define STMMAC_RX_COE_TYPE2 2
34
35/* Define the macros for CSR clock range parameters to be passed by
36 * platform code.
37 * This could also be configured at run time using CPU freq framework. */
38
39/* MDC Clock Selection define*/
40#define STMMAC_CSR_60_100M 0x0 /* MDC = clk_scr_i/42 */
41#define STMMAC_CSR_100_150M 0x1 /* MDC = clk_scr_i/62 */
42#define STMMAC_CSR_20_35M 0x2 /* MDC = clk_scr_i/16 */
43#define STMMAC_CSR_35_60M 0x3 /* MDC = clk_scr_i/26 */
44#define STMMAC_CSR_150_250M 0x4 /* MDC = clk_scr_i/102 */
45#define STMMAC_CSR_250_300M 0x5 /* MDC = clk_scr_i/122 */
46
47/* The MDC clock could be set higher than the IEEE 802.3
48 * specified frequency limit 0f 2.5 MHz, by programming a clock divider
49 * of value different than the above defined values. The resultant MDIO
50 * clock frequency of 12.5 MHz is applicable for the interfacing chips
51 * supporting higher MDC clocks.
52 * The MDC clock selection macros need to be defined for MDC clock rate
53 * of 12.5 MHz, corresponding to the following selection.
54 */
55#define STMMAC_CSR_I_4 0x8 /* clk_csr_i/4 */
56#define STMMAC_CSR_I_6 0x9 /* clk_csr_i/6 */
57#define STMMAC_CSR_I_8 0xA /* clk_csr_i/8 */
58#define STMMAC_CSR_I_10 0xB /* clk_csr_i/10 */
59#define STMMAC_CSR_I_12 0xC /* clk_csr_i/12 */
60#define STMMAC_CSR_I_14 0xD /* clk_csr_i/14 */
61#define STMMAC_CSR_I_16 0xE /* clk_csr_i/16 */
62#define STMMAC_CSR_I_18 0xF /* clk_csr_i/18 */
63
64/* AXI DMA Burst length suported */
65#define DMA_AXI_BLEN_4 (1 << 1)
66#define DMA_AXI_BLEN_8 (1 << 2)
67#define DMA_AXI_BLEN_16 (1 << 3)
68#define DMA_AXI_BLEN_32 (1 << 4)
69#define DMA_AXI_BLEN_64 (1 << 5)
70#define DMA_AXI_BLEN_128 (1 << 6)
71#define DMA_AXI_BLEN_256 (1 << 7)
72#define DMA_AXI_BLEN_ALL (DMA_AXI_BLEN_4 | DMA_AXI_BLEN_8 | DMA_AXI_BLEN_16 \
73 | DMA_AXI_BLEN_32 | DMA_AXI_BLEN_64 \
74 | DMA_AXI_BLEN_128 | DMA_AXI_BLEN_256)
75
31/* Platfrom data for platform device structure's platform_data field */ 76/* Platfrom data for platform device structure's platform_data field */
32 77
33struct stmmac_mdio_bus_data { 78struct stmmac_mdio_bus_data {
@@ -38,16 +83,24 @@ struct stmmac_mdio_bus_data {
38 int probed_phy_irq; 83 int probed_phy_irq;
39}; 84};
40 85
86struct stmmac_dma_cfg {
87 int pbl;
88 int fixed_burst;
89 int burst_len;
90};
91
41struct plat_stmmacenet_data { 92struct plat_stmmacenet_data {
93 char *phy_bus_name;
42 int bus_id; 94 int bus_id;
43 int phy_addr; 95 int phy_addr;
44 int interface; 96 int interface;
45 struct stmmac_mdio_bus_data *mdio_bus_data; 97 struct stmmac_mdio_bus_data *mdio_bus_data;
46 int pbl; 98 struct stmmac_dma_cfg *dma_cfg;
47 int clk_csr; 99 int clk_csr;
48 int has_gmac; 100 int has_gmac;
49 int enh_desc; 101 int enh_desc;
50 int tx_coe; 102 int tx_coe;
103 int rx_coe;
51 int bugged_jumbo; 104 int bugged_jumbo;
52 int pmt; 105 int pmt;
53 int force_sf_dma_mode; 106 int force_sf_dma_mode;
diff --git a/include/net/dcbnl.h b/include/net/dcbnl.h
index f55c980d8e23..fc5d5dcebb00 100644
--- a/include/net/dcbnl.h
+++ b/include/net/dcbnl.h
@@ -48,6 +48,8 @@ struct dcbnl_rtnl_ops {
48 /* IEEE 802.1Qaz std */ 48 /* IEEE 802.1Qaz std */
49 int (*ieee_getets) (struct net_device *, struct ieee_ets *); 49 int (*ieee_getets) (struct net_device *, struct ieee_ets *);
50 int (*ieee_setets) (struct net_device *, struct ieee_ets *); 50 int (*ieee_setets) (struct net_device *, struct ieee_ets *);
51 int (*ieee_getmaxrate) (struct net_device *, struct ieee_maxrate *);
52 int (*ieee_setmaxrate) (struct net_device *, struct ieee_maxrate *);
51 int (*ieee_getpfc) (struct net_device *, struct ieee_pfc *); 53 int (*ieee_getpfc) (struct net_device *, struct ieee_pfc *);
52 int (*ieee_setpfc) (struct net_device *, struct ieee_pfc *); 54 int (*ieee_setpfc) (struct net_device *, struct ieee_pfc *);
53 int (*ieee_getapp) (struct net_device *, struct dcb_app *); 55 int (*ieee_getapp) (struct net_device *, struct dcb_app *);
diff --git a/include/net/icmp.h b/include/net/icmp.h
index 75d615649071..ce70a581d95c 100644
--- a/include/net/icmp.h
+++ b/include/net/icmp.h
@@ -41,7 +41,6 @@ struct net;
41 41
42extern void icmp_send(struct sk_buff *skb_in, int type, int code, __be32 info); 42extern void icmp_send(struct sk_buff *skb_in, int type, int code, __be32 info);
43extern int icmp_rcv(struct sk_buff *skb); 43extern int icmp_rcv(struct sk_buff *skb);
44extern int icmp_ioctl(struct sock *sk, int cmd, unsigned long arg);
45extern int icmp_init(void); 44extern int icmp_init(void);
46extern void icmp_out_count(struct net *net, unsigned char type); 45extern void icmp_out_count(struct net *net, unsigned char type);
47 46
diff --git a/include/net/netlink.h b/include/net/netlink.h
index f394fe5d7641..785f37a3b44e 100644
--- a/include/net/netlink.h
+++ b/include/net/netlink.h
@@ -102,20 +102,6 @@
102 * nla_put_flag(skb, type) add flag attribute to skb 102 * nla_put_flag(skb, type) add flag attribute to skb
103 * nla_put_msecs(skb, type, jiffies) add msecs attribute to skb 103 * nla_put_msecs(skb, type, jiffies) add msecs attribute to skb
104 * 104 *
105 * Exceptions Based Attribute Construction:
106 * NLA_PUT(skb, type, len, data) add attribute to skb
107 * NLA_PUT_U8(skb, type, value) add u8 attribute to skb
108 * NLA_PUT_U16(skb, type, value) add u16 attribute to skb
109 * NLA_PUT_U32(skb, type, value) add u32 attribute to skb
110 * NLA_PUT_U64(skb, type, value) add u64 attribute to skb
111 * NLA_PUT_STRING(skb, type, str) add string attribute to skb
112 * NLA_PUT_FLAG(skb, type) add flag attribute to skb
113 * NLA_PUT_MSECS(skb, type, jiffies) add msecs attribute to skb
114 *
115 * The meaning of these functions is equal to their lower case
116 * variants but they jump to the label nla_put_failure in case
117 * of a failure.
118 *
119 * Nested Attributes Construction: 105 * Nested Attributes Construction:
120 * nla_nest_start(skb, type) start a nested attribute 106 * nla_nest_start(skb, type) start a nested attribute
121 * nla_nest_end(skb, nla) finalize a nested attribute 107 * nla_nest_end(skb, nla) finalize a nested attribute
@@ -772,6 +758,39 @@ static inline int nla_put_u16(struct sk_buff *skb, int attrtype, u16 value)
772} 758}
773 759
774/** 760/**
761 * nla_put_be16 - Add a __be16 netlink attribute to a socket buffer
762 * @skb: socket buffer to add attribute to
763 * @attrtype: attribute type
764 * @value: numeric value
765 */
766static inline int nla_put_be16(struct sk_buff *skb, int attrtype, __be16 value)
767{
768 return nla_put(skb, attrtype, sizeof(__be16), &value);
769}
770
771/**
772 * nla_put_net16 - Add 16-bit network byte order netlink attribute to a socket buffer
773 * @skb: socket buffer to add attribute to
774 * @attrtype: attribute type
775 * @value: numeric value
776 */
777static inline int nla_put_net16(struct sk_buff *skb, int attrtype, __be16 value)
778{
779 return nla_put_be16(skb, attrtype | NLA_F_NET_BYTEORDER, value);
780}
781
782/**
783 * nla_put_le16 - Add a __le16 netlink attribute to a socket buffer
784 * @skb: socket buffer to add attribute to
785 * @attrtype: attribute type
786 * @value: numeric value
787 */
788static inline int nla_put_le16(struct sk_buff *skb, int attrtype, __le16 value)
789{
790 return nla_put(skb, attrtype, sizeof(__le16), &value);
791}
792
793/**
775 * nla_put_u32 - Add a u32 netlink attribute to a socket buffer 794 * nla_put_u32 - Add a u32 netlink attribute to a socket buffer
776 * @skb: socket buffer to add attribute to 795 * @skb: socket buffer to add attribute to
777 * @attrtype: attribute type 796 * @attrtype: attribute type
@@ -783,7 +802,40 @@ static inline int nla_put_u32(struct sk_buff *skb, int attrtype, u32 value)
783} 802}
784 803
785/** 804/**
786 * nla_put_64 - Add a u64 netlink attribute to a socket buffer 805 * nla_put_be32 - Add a __be32 netlink attribute to a socket buffer
806 * @skb: socket buffer to add attribute to
807 * @attrtype: attribute type
808 * @value: numeric value
809 */
810static inline int nla_put_be32(struct sk_buff *skb, int attrtype, __be32 value)
811{
812 return nla_put(skb, attrtype, sizeof(__be32), &value);
813}
814
815/**
816 * nla_put_net32 - Add 32-bit network byte order netlink attribute to a socket buffer
817 * @skb: socket buffer to add attribute to
818 * @attrtype: attribute type
819 * @value: numeric value
820 */
821static inline int nla_put_net32(struct sk_buff *skb, int attrtype, __be32 value)
822{
823 return nla_put_be32(skb, attrtype | NLA_F_NET_BYTEORDER, value);
824}
825
826/**
827 * nla_put_le32 - Add a __le32 netlink attribute to a socket buffer
828 * @skb: socket buffer to add attribute to
829 * @attrtype: attribute type
830 * @value: numeric value
831 */
832static inline int nla_put_le32(struct sk_buff *skb, int attrtype, __le32 value)
833{
834 return nla_put(skb, attrtype, sizeof(__le32), &value);
835}
836
837/**
838 * nla_put_u64 - Add a u64 netlink attribute to a socket buffer
787 * @skb: socket buffer to add attribute to 839 * @skb: socket buffer to add attribute to
788 * @attrtype: attribute type 840 * @attrtype: attribute type
789 * @value: numeric value 841 * @value: numeric value
@@ -794,6 +846,39 @@ static inline int nla_put_u64(struct sk_buff *skb, int attrtype, u64 value)
794} 846}
795 847
796/** 848/**
849 * nla_put_be64 - Add a __be64 netlink attribute to a socket buffer
850 * @skb: socket buffer to add attribute to
851 * @attrtype: attribute type
852 * @value: numeric value
853 */
854static inline int nla_put_be64(struct sk_buff *skb, int attrtype, __be64 value)
855{
856 return nla_put(skb, attrtype, sizeof(__be64), &value);
857}
858
859/**
860 * nla_put_net64 - Add 64-bit network byte order netlink attribute to a socket buffer
861 * @skb: socket buffer to add attribute to
862 * @attrtype: attribute type
863 * @value: numeric value
864 */
865static inline int nla_put_net64(struct sk_buff *skb, int attrtype, __be64 value)
866{
867 return nla_put_be64(skb, attrtype | NLA_F_NET_BYTEORDER, value);
868}
869
870/**
871 * nla_put_le64 - Add a __le64 netlink attribute to a socket buffer
872 * @skb: socket buffer to add attribute to
873 * @attrtype: attribute type
874 * @value: numeric value
875 */
876static inline int nla_put_le64(struct sk_buff *skb, int attrtype, __le64 value)
877{
878 return nla_put(skb, attrtype, sizeof(__le64), &value);
879}
880
881/**
797 * nla_put_string - Add a string netlink attribute to a socket buffer 882 * nla_put_string - Add a string netlink attribute to a socket buffer
798 * @skb: socket buffer to add attribute to 883 * @skb: socket buffer to add attribute to
799 * @attrtype: attribute type 884 * @attrtype: attribute type
@@ -828,60 +913,6 @@ static inline int nla_put_msecs(struct sk_buff *skb, int attrtype,
828 return nla_put(skb, attrtype, sizeof(u64), &tmp); 913 return nla_put(skb, attrtype, sizeof(u64), &tmp);
829} 914}
830 915
831#define NLA_PUT(skb, attrtype, attrlen, data) \
832 do { \
833 if (unlikely(nla_put(skb, attrtype, attrlen, data) < 0)) \
834 goto nla_put_failure; \
835 } while(0)
836
837#define NLA_PUT_TYPE(skb, type, attrtype, value) \
838 do { \
839 type __tmp = value; \
840 NLA_PUT(skb, attrtype, sizeof(type), &__tmp); \
841 } while(0)
842
843#define NLA_PUT_U8(skb, attrtype, value) \
844 NLA_PUT_TYPE(skb, u8, attrtype, value)
845
846#define NLA_PUT_U16(skb, attrtype, value) \
847 NLA_PUT_TYPE(skb, u16, attrtype, value)
848
849#define NLA_PUT_LE16(skb, attrtype, value) \
850 NLA_PUT_TYPE(skb, __le16, attrtype, value)
851
852#define NLA_PUT_BE16(skb, attrtype, value) \
853 NLA_PUT_TYPE(skb, __be16, attrtype, value)
854
855#define NLA_PUT_NET16(skb, attrtype, value) \
856 NLA_PUT_BE16(skb, attrtype | NLA_F_NET_BYTEORDER, value)
857
858#define NLA_PUT_U32(skb, attrtype, value) \
859 NLA_PUT_TYPE(skb, u32, attrtype, value)
860
861#define NLA_PUT_BE32(skb, attrtype, value) \
862 NLA_PUT_TYPE(skb, __be32, attrtype, value)
863
864#define NLA_PUT_NET32(skb, attrtype, value) \
865 NLA_PUT_BE32(skb, attrtype | NLA_F_NET_BYTEORDER, value)
866
867#define NLA_PUT_U64(skb, attrtype, value) \
868 NLA_PUT_TYPE(skb, u64, attrtype, value)
869
870#define NLA_PUT_BE64(skb, attrtype, value) \
871 NLA_PUT_TYPE(skb, __be64, attrtype, value)
872
873#define NLA_PUT_NET64(skb, attrtype, value) \
874 NLA_PUT_BE64(skb, attrtype | NLA_F_NET_BYTEORDER, value)
875
876#define NLA_PUT_STRING(skb, attrtype, value) \
877 NLA_PUT(skb, attrtype, strlen(value) + 1, value)
878
879#define NLA_PUT_FLAG(skb, attrtype) \
880 NLA_PUT(skb, attrtype, 0, NULL)
881
882#define NLA_PUT_MSECS(skb, attrtype, jiffies) \
883 NLA_PUT_U64(skb, attrtype, jiffies_to_msecs(jiffies))
884
885/** 916/**
886 * nla_get_u32 - return payload of u32 attribute 917 * nla_get_u32 - return payload of u32 attribute
887 * @nla: u32 netlink attribute 918 * @nla: u32 netlink attribute
diff --git a/include/net/xfrm.h b/include/net/xfrm.h
index 96239e78e621..1cb32bf107de 100644
--- a/include/net/xfrm.h
+++ b/include/net/xfrm.h
@@ -1682,8 +1682,9 @@ static inline int xfrm_mark_get(struct nlattr **attrs, struct xfrm_mark *m)
1682 1682
1683static inline int xfrm_mark_put(struct sk_buff *skb, const struct xfrm_mark *m) 1683static inline int xfrm_mark_put(struct sk_buff *skb, const struct xfrm_mark *m)
1684{ 1684{
1685 if (m->m | m->v) 1685 if ((m->m | m->v) &&
1686 NLA_PUT(skb, XFRMA_MARK, sizeof(struct xfrm_mark), m); 1686 nla_put(skb, XFRMA_MARK, sizeof(struct xfrm_mark), m))
1687 goto nla_put_failure;
1687 return 0; 1688 return 0;
1688 1689
1689nla_put_failure: 1690nla_put_failure:
diff --git a/net/8021q/vlan_netlink.c b/net/8021q/vlan_netlink.c
index 50711368ad6a..708c80ea1874 100644
--- a/net/8021q/vlan_netlink.c
+++ b/net/8021q/vlan_netlink.c
@@ -166,11 +166,13 @@ static int vlan_fill_info(struct sk_buff *skb, const struct net_device *dev)
166 struct nlattr *nest; 166 struct nlattr *nest;
167 unsigned int i; 167 unsigned int i;
168 168
169 NLA_PUT_U16(skb, IFLA_VLAN_ID, vlan_dev_priv(dev)->vlan_id); 169 if (nla_put_u16(skb, IFLA_VLAN_ID, vlan_dev_priv(dev)->vlan_id))
170 goto nla_put_failure;
170 if (vlan->flags) { 171 if (vlan->flags) {
171 f.flags = vlan->flags; 172 f.flags = vlan->flags;
172 f.mask = ~0; 173 f.mask = ~0;
173 NLA_PUT(skb, IFLA_VLAN_FLAGS, sizeof(f), &f); 174 if (nla_put(skb, IFLA_VLAN_FLAGS, sizeof(f), &f))
175 goto nla_put_failure;
174 } 176 }
175 if (vlan->nr_ingress_mappings) { 177 if (vlan->nr_ingress_mappings) {
176 nest = nla_nest_start(skb, IFLA_VLAN_INGRESS_QOS); 178 nest = nla_nest_start(skb, IFLA_VLAN_INGRESS_QOS);
@@ -183,8 +185,9 @@ static int vlan_fill_info(struct sk_buff *skb, const struct net_device *dev)
183 185
184 m.from = i; 186 m.from = i;
185 m.to = vlan->ingress_priority_map[i]; 187 m.to = vlan->ingress_priority_map[i];
186 NLA_PUT(skb, IFLA_VLAN_QOS_MAPPING, 188 if (nla_put(skb, IFLA_VLAN_QOS_MAPPING,
187 sizeof(m), &m); 189 sizeof(m), &m))
190 goto nla_put_failure;
188 } 191 }
189 nla_nest_end(skb, nest); 192 nla_nest_end(skb, nest);
190 } 193 }
@@ -202,8 +205,9 @@ static int vlan_fill_info(struct sk_buff *skb, const struct net_device *dev)
202 205
203 m.from = pm->priority; 206 m.from = pm->priority;
204 m.to = (pm->vlan_qos >> 13) & 0x7; 207 m.to = (pm->vlan_qos >> 13) & 0x7;
205 NLA_PUT(skb, IFLA_VLAN_QOS_MAPPING, 208 if (nla_put(skb, IFLA_VLAN_QOS_MAPPING,
206 sizeof(m), &m); 209 sizeof(m), &m))
210 goto nla_put_failure;
207 } 211 }
208 } 212 }
209 nla_nest_end(skb, nest); 213 nla_nest_end(skb, nest);
diff --git a/net/appletalk/ddp.c b/net/appletalk/ddp.c
index bfa9ab93eda5..0301b328cf0f 100644
--- a/net/appletalk/ddp.c
+++ b/net/appletalk/ddp.c
@@ -63,7 +63,7 @@
63#include <net/tcp_states.h> 63#include <net/tcp_states.h>
64#include <net/route.h> 64#include <net/route.h>
65#include <linux/atalk.h> 65#include <linux/atalk.h>
66#include "../core/kmap_skb.h" 66#include <linux/highmem.h>
67 67
68struct datalink_proto *ddp_dl, *aarp_dl; 68struct datalink_proto *ddp_dl, *aarp_dl;
69static const struct proto_ops atalk_dgram_ops; 69static const struct proto_ops atalk_dgram_ops;
@@ -960,10 +960,10 @@ static unsigned long atalk_sum_skb(const struct sk_buff *skb, int offset,
960 960
961 if (copy > len) 961 if (copy > len)
962 copy = len; 962 copy = len;
963 vaddr = kmap_skb_frag(frag); 963 vaddr = kmap_atomic(skb_frag_page(frag));
964 sum = atalk_sum_partial(vaddr + frag->page_offset + 964 sum = atalk_sum_partial(vaddr + frag->page_offset +
965 offset - start, copy, sum); 965 offset - start, copy, sum);
966 kunmap_skb_frag(vaddr); 966 kunmap_atomic(vaddr);
967 967
968 if (!(len -= copy)) 968 if (!(len -= copy))
969 return sum; 969 return sum;
diff --git a/net/bridge/br_fdb.c b/net/bridge/br_fdb.c
index 5ba0c844d508..80dbce4974ce 100644
--- a/net/bridge/br_fdb.c
+++ b/net/bridge/br_fdb.c
@@ -487,14 +487,14 @@ static int fdb_fill_info(struct sk_buff *skb, const struct net_bridge *br,
487 ndm->ndm_ifindex = fdb->dst ? fdb->dst->dev->ifindex : br->dev->ifindex; 487 ndm->ndm_ifindex = fdb->dst ? fdb->dst->dev->ifindex : br->dev->ifindex;
488 ndm->ndm_state = fdb_to_nud(fdb); 488 ndm->ndm_state = fdb_to_nud(fdb);
489 489
490 NLA_PUT(skb, NDA_LLADDR, ETH_ALEN, &fdb->addr); 490 if (nla_put(skb, NDA_LLADDR, ETH_ALEN, &fdb->addr))
491 491 goto nla_put_failure;
492 ci.ndm_used = jiffies_to_clock_t(now - fdb->used); 492 ci.ndm_used = jiffies_to_clock_t(now - fdb->used);
493 ci.ndm_confirmed = 0; 493 ci.ndm_confirmed = 0;
494 ci.ndm_updated = jiffies_to_clock_t(now - fdb->updated); 494 ci.ndm_updated = jiffies_to_clock_t(now - fdb->updated);
495 ci.ndm_refcnt = 0; 495 ci.ndm_refcnt = 0;
496 NLA_PUT(skb, NDA_CACHEINFO, sizeof(ci), &ci); 496 if (nla_put(skb, NDA_CACHEINFO, sizeof(ci), &ci))
497 497 goto nla_put_failure;
498 return nlmsg_end(skb, nlh); 498 return nlmsg_end(skb, nlh);
499 499
500nla_put_failure: 500nla_put_failure:
diff --git a/net/bridge/br_netlink.c b/net/bridge/br_netlink.c
index a1daf8227ed1..346b368d8698 100644
--- a/net/bridge/br_netlink.c
+++ b/net/bridge/br_netlink.c
@@ -60,20 +60,17 @@ static int br_fill_ifinfo(struct sk_buff *skb, const struct net_bridge_port *por
60 hdr->ifi_flags = dev_get_flags(dev); 60 hdr->ifi_flags = dev_get_flags(dev);
61 hdr->ifi_change = 0; 61 hdr->ifi_change = 0;
62 62
63 NLA_PUT_STRING(skb, IFLA_IFNAME, dev->name); 63 if (nla_put_string(skb, IFLA_IFNAME, dev->name) ||
64 NLA_PUT_U32(skb, IFLA_MASTER, br->dev->ifindex); 64 nla_put_u32(skb, IFLA_MASTER, br->dev->ifindex) ||
65 NLA_PUT_U32(skb, IFLA_MTU, dev->mtu); 65 nla_put_u32(skb, IFLA_MTU, dev->mtu) ||
66 NLA_PUT_U8(skb, IFLA_OPERSTATE, operstate); 66 nla_put_u8(skb, IFLA_OPERSTATE, operstate) ||
67 67 (dev->addr_len &&
68 if (dev->addr_len) 68 nla_put(skb, IFLA_ADDRESS, dev->addr_len, dev->dev_addr)) ||
69 NLA_PUT(skb, IFLA_ADDRESS, dev->addr_len, dev->dev_addr); 69 (dev->ifindex != dev->iflink &&
70 70 nla_put_u32(skb, IFLA_LINK, dev->iflink)) ||
71 if (dev->ifindex != dev->iflink) 71 (event == RTM_NEWLINK &&
72 NLA_PUT_U32(skb, IFLA_LINK, dev->iflink); 72 nla_put_u8(skb, IFLA_PROTINFO, port->state)))
73 73 goto nla_put_failure;
74 if (event == RTM_NEWLINK)
75 NLA_PUT_U8(skb, IFLA_PROTINFO, port->state);
76
77 return nlmsg_end(skb, nlh); 74 return nlmsg_end(skb, nlh);
78 75
79nla_put_failure: 76nla_put_failure:
diff --git a/net/caif/chnl_net.c b/net/caif/chnl_net.c
index 20618dd3088b..93e9c6dc9ddf 100644
--- a/net/caif/chnl_net.c
+++ b/net/caif/chnl_net.c
@@ -421,14 +421,14 @@ static int ipcaif_fill_info(struct sk_buff *skb, const struct net_device *dev)
421 struct chnl_net *priv; 421 struct chnl_net *priv;
422 u8 loop; 422 u8 loop;
423 priv = netdev_priv(dev); 423 priv = netdev_priv(dev);
424 NLA_PUT_U32(skb, IFLA_CAIF_IPV4_CONNID, 424 if (nla_put_u32(skb, IFLA_CAIF_IPV4_CONNID,
425 priv->conn_req.sockaddr.u.dgm.connection_id); 425 priv->conn_req.sockaddr.u.dgm.connection_id) ||
426 NLA_PUT_U32(skb, IFLA_CAIF_IPV6_CONNID, 426 nla_put_u32(skb, IFLA_CAIF_IPV6_CONNID,
427 priv->conn_req.sockaddr.u.dgm.connection_id); 427 priv->conn_req.sockaddr.u.dgm.connection_id))
428 goto nla_put_failure;
428 loop = priv->conn_req.protocol == CAIFPROTO_DATAGRAM_LOOP; 429 loop = priv->conn_req.protocol == CAIFPROTO_DATAGRAM_LOOP;
429 NLA_PUT_U8(skb, IFLA_CAIF_LOOPBACK, loop); 430 if (nla_put_u8(skb, IFLA_CAIF_LOOPBACK, loop))
430 431 goto nla_put_failure;
431
432 return 0; 432 return 0;
433nla_put_failure: 433nla_put_failure:
434 return -EMSGSIZE; 434 return -EMSGSIZE;
diff --git a/net/core/ethtool.c b/net/core/ethtool.c
index 6d6d7d25caaa..beacdd93cd8f 100644
--- a/net/core/ethtool.c
+++ b/net/core/ethtool.c
@@ -17,6 +17,8 @@
17#include <linux/errno.h> 17#include <linux/errno.h>
18#include <linux/ethtool.h> 18#include <linux/ethtool.h>
19#include <linux/netdevice.h> 19#include <linux/netdevice.h>
20#include <linux/net_tstamp.h>
21#include <linux/phy.h>
20#include <linux/bitops.h> 22#include <linux/bitops.h>
21#include <linux/uaccess.h> 23#include <linux/uaccess.h>
22#include <linux/vmalloc.h> 24#include <linux/vmalloc.h>
@@ -36,6 +38,17 @@ u32 ethtool_op_get_link(struct net_device *dev)
36} 38}
37EXPORT_SYMBOL(ethtool_op_get_link); 39EXPORT_SYMBOL(ethtool_op_get_link);
38 40
41int ethtool_op_get_ts_info(struct net_device *dev, struct ethtool_ts_info *info)
42{
43 info->so_timestamping =
44 SOF_TIMESTAMPING_TX_SOFTWARE |
45 SOF_TIMESTAMPING_RX_SOFTWARE |
46 SOF_TIMESTAMPING_SOFTWARE;
47 info->phc_index = -1;
48 return 0;
49}
50EXPORT_SYMBOL(ethtool_op_get_ts_info);
51
39/* Handlers for each ethtool command */ 52/* Handlers for each ethtool command */
40 53
41#define ETHTOOL_DEV_FEATURE_WORDS ((NETDEV_FEATURE_COUNT + 31) / 32) 54#define ETHTOOL_DEV_FEATURE_WORDS ((NETDEV_FEATURE_COUNT + 31) / 32)
@@ -1278,6 +1291,40 @@ out:
1278 return ret; 1291 return ret;
1279} 1292}
1280 1293
1294static int ethtool_get_ts_info(struct net_device *dev, void __user *useraddr)
1295{
1296 int err = 0;
1297 struct ethtool_ts_info info;
1298 const struct ethtool_ops *ops = dev->ethtool_ops;
1299 struct phy_device *phydev = dev->phydev;
1300
1301 memset(&info, 0, sizeof(info));
1302 info.cmd = ETHTOOL_GET_TS_INFO;
1303
1304 if (phydev && phydev->drv && phydev->drv->ts_info) {
1305
1306 err = phydev->drv->ts_info(phydev, &info);
1307
1308 } else if (dev->ethtool_ops && dev->ethtool_ops->get_ts_info) {
1309
1310 err = ops->get_ts_info(dev, &info);
1311
1312 } else {
1313 info.so_timestamping =
1314 SOF_TIMESTAMPING_RX_SOFTWARE |
1315 SOF_TIMESTAMPING_SOFTWARE;
1316 info.phc_index = -1;
1317 }
1318
1319 if (err)
1320 return err;
1321
1322 if (copy_to_user(useraddr, &info, sizeof(info)))
1323 err = -EFAULT;
1324
1325 return err;
1326}
1327
1281/* The main entry point in this file. Called from net/core/dev.c */ 1328/* The main entry point in this file. Called from net/core/dev.c */
1282 1329
1283int dev_ethtool(struct net *net, struct ifreq *ifr) 1330int dev_ethtool(struct net *net, struct ifreq *ifr)
@@ -1295,11 +1342,13 @@ int dev_ethtool(struct net *net, struct ifreq *ifr)
1295 return -EFAULT; 1342 return -EFAULT;
1296 1343
1297 if (!dev->ethtool_ops) { 1344 if (!dev->ethtool_ops) {
1298 /* ETHTOOL_GDRVINFO does not require any driver support. 1345 /* A few commands do not require any driver support,
1299 * It is also unprivileged and does not change anything, 1346 * are unprivileged, and do not change anything, so we
1300 * so we can take a shortcut to it. */ 1347 * can take a shortcut to them. */
1301 if (ethcmd == ETHTOOL_GDRVINFO) 1348 if (ethcmd == ETHTOOL_GDRVINFO)
1302 return ethtool_get_drvinfo(dev, useraddr); 1349 return ethtool_get_drvinfo(dev, useraddr);
1350 else if (ethcmd == ETHTOOL_GET_TS_INFO)
1351 return ethtool_get_ts_info(dev, useraddr);
1303 else 1352 else
1304 return -EOPNOTSUPP; 1353 return -EOPNOTSUPP;
1305 } 1354 }
@@ -1330,6 +1379,7 @@ int dev_ethtool(struct net *net, struct ifreq *ifr)
1330 case ETHTOOL_GRXCLSRULE: 1379 case ETHTOOL_GRXCLSRULE:
1331 case ETHTOOL_GRXCLSRLALL: 1380 case ETHTOOL_GRXCLSRLALL:
1332 case ETHTOOL_GFEATURES: 1381 case ETHTOOL_GFEATURES:
1382 case ETHTOOL_GET_TS_INFO:
1333 break; 1383 break;
1334 default: 1384 default:
1335 if (!capable(CAP_NET_ADMIN)) 1385 if (!capable(CAP_NET_ADMIN))
@@ -1496,6 +1546,9 @@ int dev_ethtool(struct net *net, struct ifreq *ifr)
1496 case ETHTOOL_GET_DUMP_DATA: 1546 case ETHTOOL_GET_DUMP_DATA:
1497 rc = ethtool_get_dump_data(dev, useraddr); 1547 rc = ethtool_get_dump_data(dev, useraddr);
1498 break; 1548 break;
1549 case ETHTOOL_GET_TS_INFO:
1550 rc = ethtool_get_ts_info(dev, useraddr);
1551 break;
1499 default: 1552 default:
1500 rc = -EOPNOTSUPP; 1553 rc = -EOPNOTSUPP;
1501 } 1554 }
diff --git a/net/core/fib_rules.c b/net/core/fib_rules.c
index c02e63c908da..72cceb79d0d4 100644
--- a/net/core/fib_rules.c
+++ b/net/core/fib_rules.c
@@ -542,7 +542,8 @@ static int fib_nl_fill_rule(struct sk_buff *skb, struct fib_rule *rule,
542 frh = nlmsg_data(nlh); 542 frh = nlmsg_data(nlh);
543 frh->family = ops->family; 543 frh->family = ops->family;
544 frh->table = rule->table; 544 frh->table = rule->table;
545 NLA_PUT_U32(skb, FRA_TABLE, rule->table); 545 if (nla_put_u32(skb, FRA_TABLE, rule->table))
546 goto nla_put_failure;
546 frh->res1 = 0; 547 frh->res1 = 0;
547 frh->res2 = 0; 548 frh->res2 = 0;
548 frh->action = rule->action; 549 frh->action = rule->action;
@@ -553,31 +554,28 @@ static int fib_nl_fill_rule(struct sk_buff *skb, struct fib_rule *rule,
553 frh->flags |= FIB_RULE_UNRESOLVED; 554 frh->flags |= FIB_RULE_UNRESOLVED;
554 555
555 if (rule->iifname[0]) { 556 if (rule->iifname[0]) {
556 NLA_PUT_STRING(skb, FRA_IIFNAME, rule->iifname); 557 if (nla_put_string(skb, FRA_IIFNAME, rule->iifname))
557 558 goto nla_put_failure;
558 if (rule->iifindex == -1) 559 if (rule->iifindex == -1)
559 frh->flags |= FIB_RULE_IIF_DETACHED; 560 frh->flags |= FIB_RULE_IIF_DETACHED;
560 } 561 }
561 562
562 if (rule->oifname[0]) { 563 if (rule->oifname[0]) {
563 NLA_PUT_STRING(skb, FRA_OIFNAME, rule->oifname); 564 if (nla_put_string(skb, FRA_OIFNAME, rule->oifname))
564 565 goto nla_put_failure;
565 if (rule->oifindex == -1) 566 if (rule->oifindex == -1)
566 frh->flags |= FIB_RULE_OIF_DETACHED; 567 frh->flags |= FIB_RULE_OIF_DETACHED;
567 } 568 }
568 569
569 if (rule->pref) 570 if ((rule->pref &&
570 NLA_PUT_U32(skb, FRA_PRIORITY, rule->pref); 571 nla_put_u32(skb, FRA_PRIORITY, rule->pref)) ||
571 572 (rule->mark &&
572 if (rule->mark) 573 nla_put_u32(skb, FRA_FWMARK, rule->mark)) ||
573 NLA_PUT_U32(skb, FRA_FWMARK, rule->mark); 574 ((rule->mark_mask || rule->mark) &&
574 575 nla_put_u32(skb, FRA_FWMASK, rule->mark_mask)) ||
575 if (rule->mark_mask || rule->mark) 576 (rule->target &&
576 NLA_PUT_U32(skb, FRA_FWMASK, rule->mark_mask); 577 nla_put_u32(skb, FRA_GOTO, rule->target)))
577 578 goto nla_put_failure;
578 if (rule->target)
579 NLA_PUT_U32(skb, FRA_GOTO, rule->target);
580
581 if (ops->fill(rule, skb, frh) < 0) 579 if (ops->fill(rule, skb, frh) < 0)
582 goto nla_put_failure; 580 goto nla_put_failure;
583 581
diff --git a/net/core/filter.c b/net/core/filter.c
index 6f755cca4520..95d05a6012d1 100644
--- a/net/core/filter.c
+++ b/net/core/filter.c
@@ -317,6 +317,9 @@ load_b:
317 case BPF_S_ANC_CPU: 317 case BPF_S_ANC_CPU:
318 A = raw_smp_processor_id(); 318 A = raw_smp_processor_id();
319 continue; 319 continue;
320 case BPF_S_ANC_ALU_XOR_X:
321 A ^= X;
322 continue;
320 case BPF_S_ANC_NLATTR: { 323 case BPF_S_ANC_NLATTR: {
321 struct nlattr *nla; 324 struct nlattr *nla;
322 325
@@ -561,6 +564,7 @@ int sk_chk_filter(struct sock_filter *filter, unsigned int flen)
561 ANCILLARY(HATYPE); 564 ANCILLARY(HATYPE);
562 ANCILLARY(RXHASH); 565 ANCILLARY(RXHASH);
563 ANCILLARY(CPU); 566 ANCILLARY(CPU);
567 ANCILLARY(ALU_XOR_X);
564 } 568 }
565 } 569 }
566 ftest->code = code; 570 ftest->code = code;
@@ -589,6 +593,67 @@ void sk_filter_release_rcu(struct rcu_head *rcu)
589} 593}
590EXPORT_SYMBOL(sk_filter_release_rcu); 594EXPORT_SYMBOL(sk_filter_release_rcu);
591 595
596static int __sk_prepare_filter(struct sk_filter *fp)
597{
598 int err;
599
600 fp->bpf_func = sk_run_filter;
601
602 err = sk_chk_filter(fp->insns, fp->len);
603 if (err)
604 return err;
605
606 bpf_jit_compile(fp);
607 return 0;
608}
609
610/**
611 * sk_unattached_filter_create - create an unattached filter
612 * @fprog: the filter program
613 * @sk: the socket to use
614 *
615 * Create a filter independent ofr any socket. We first run some
616 * sanity checks on it to make sure it does not explode on us later.
617 * If an error occurs or there is insufficient memory for the filter
618 * a negative errno code is returned. On success the return is zero.
619 */
620int sk_unattached_filter_create(struct sk_filter **pfp,
621 struct sock_fprog *fprog)
622{
623 struct sk_filter *fp;
624 unsigned int fsize = sizeof(struct sock_filter) * fprog->len;
625 int err;
626
627 /* Make sure new filter is there and in the right amounts. */
628 if (fprog->filter == NULL)
629 return -EINVAL;
630
631 fp = kmalloc(fsize + sizeof(*fp), GFP_KERNEL);
632 if (!fp)
633 return -ENOMEM;
634 memcpy(fp->insns, fprog->filter, fsize);
635
636 atomic_set(&fp->refcnt, 1);
637 fp->len = fprog->len;
638
639 err = __sk_prepare_filter(fp);
640 if (err)
641 goto free_mem;
642
643 *pfp = fp;
644 return 0;
645free_mem:
646 kfree(fp);
647 return err;
648}
649EXPORT_SYMBOL_GPL(sk_unattached_filter_create);
650
651void sk_unattached_filter_destroy(struct sk_filter *fp)
652{
653 sk_filter_release(fp);
654}
655EXPORT_SYMBOL_GPL(sk_unattached_filter_destroy);
656
592/** 657/**
593 * sk_attach_filter - attach a socket filter 658 * sk_attach_filter - attach a socket filter
594 * @fprog: the filter program 659 * @fprog: the filter program
@@ -619,16 +684,13 @@ int sk_attach_filter(struct sock_fprog *fprog, struct sock *sk)
619 684
620 atomic_set(&fp->refcnt, 1); 685 atomic_set(&fp->refcnt, 1);
621 fp->len = fprog->len; 686 fp->len = fprog->len;
622 fp->bpf_func = sk_run_filter;
623 687
624 err = sk_chk_filter(fp->insns, fp->len); 688 err = __sk_prepare_filter(fp);
625 if (err) { 689 if (err) {
626 sk_filter_uncharge(sk, fp); 690 sk_filter_uncharge(sk, fp);
627 return err; 691 return err;
628 } 692 }
629 693
630 bpf_jit_compile(fp);
631
632 old_fp = rcu_dereference_protected(sk->sk_filter, 694 old_fp = rcu_dereference_protected(sk->sk_filter,
633 sock_owned_by_user(sk)); 695 sock_owned_by_user(sk));
634 rcu_assign_pointer(sk->sk_filter, fp); 696 rcu_assign_pointer(sk->sk_filter, fp);
diff --git a/net/core/gen_stats.c b/net/core/gen_stats.c
index 0452eb27a272..ddedf211e588 100644
--- a/net/core/gen_stats.c
+++ b/net/core/gen_stats.c
@@ -27,7 +27,8 @@
27static inline int 27static inline int
28gnet_stats_copy(struct gnet_dump *d, int type, void *buf, int size) 28gnet_stats_copy(struct gnet_dump *d, int type, void *buf, int size)
29{ 29{
30 NLA_PUT(d->skb, type, size, buf); 30 if (nla_put(d->skb, type, size, buf))
31 goto nla_put_failure;
31 return 0; 32 return 0;
32 33
33nla_put_failure: 34nla_put_failure:
diff --git a/net/core/kmap_skb.h b/net/core/kmap_skb.h
deleted file mode 100644
index 52d0a4459041..000000000000
--- a/net/core/kmap_skb.h
+++ /dev/null
@@ -1,19 +0,0 @@
1#include <linux/highmem.h>
2
3static inline void *kmap_skb_frag(const skb_frag_t *frag)
4{
5#ifdef CONFIG_HIGHMEM
6 BUG_ON(in_irq());
7
8 local_bh_disable();
9#endif
10 return kmap_atomic(skb_frag_page(frag));
11}
12
13static inline void kunmap_skb_frag(void *vaddr)
14{
15 kunmap_atomic(vaddr);
16#ifdef CONFIG_HIGHMEM
17 local_bh_enable();
18#endif
19}
diff --git a/net/core/neighbour.c b/net/core/neighbour.c
index 0a68045782d1..ac71765d6fd0 100644
--- a/net/core/neighbour.c
+++ b/net/core/neighbour.c
@@ -1768,29 +1768,29 @@ static int neightbl_fill_parms(struct sk_buff *skb, struct neigh_parms *parms)
1768 if (nest == NULL) 1768 if (nest == NULL)
1769 return -ENOBUFS; 1769 return -ENOBUFS;
1770 1770
1771 if (parms->dev) 1771 if ((parms->dev &&
1772 NLA_PUT_U32(skb, NDTPA_IFINDEX, parms->dev->ifindex); 1772 nla_put_u32(skb, NDTPA_IFINDEX, parms->dev->ifindex)) ||
1773 1773 nla_put_u32(skb, NDTPA_REFCNT, atomic_read(&parms->refcnt)) ||
1774 NLA_PUT_U32(skb, NDTPA_REFCNT, atomic_read(&parms->refcnt)); 1774 nla_put_u32(skb, NDTPA_QUEUE_LENBYTES, parms->queue_len_bytes) ||
1775 NLA_PUT_U32(skb, NDTPA_QUEUE_LENBYTES, parms->queue_len_bytes); 1775 /* approximative value for deprecated QUEUE_LEN (in packets) */
1776 /* approximative value for deprecated QUEUE_LEN (in packets) */ 1776 nla_put_u32(skb, NDTPA_QUEUE_LEN,
1777 NLA_PUT_U32(skb, NDTPA_QUEUE_LEN, 1777 DIV_ROUND_UP(parms->queue_len_bytes,
1778 DIV_ROUND_UP(parms->queue_len_bytes, 1778 SKB_TRUESIZE(ETH_FRAME_LEN))) ||
1779 SKB_TRUESIZE(ETH_FRAME_LEN))); 1779 nla_put_u32(skb, NDTPA_PROXY_QLEN, parms->proxy_qlen) ||
1780 NLA_PUT_U32(skb, NDTPA_PROXY_QLEN, parms->proxy_qlen); 1780 nla_put_u32(skb, NDTPA_APP_PROBES, parms->app_probes) ||
1781 NLA_PUT_U32(skb, NDTPA_APP_PROBES, parms->app_probes); 1781 nla_put_u32(skb, NDTPA_UCAST_PROBES, parms->ucast_probes) ||
1782 NLA_PUT_U32(skb, NDTPA_UCAST_PROBES, parms->ucast_probes); 1782 nla_put_u32(skb, NDTPA_MCAST_PROBES, parms->mcast_probes) ||
1783 NLA_PUT_U32(skb, NDTPA_MCAST_PROBES, parms->mcast_probes); 1783 nla_put_msecs(skb, NDTPA_REACHABLE_TIME, parms->reachable_time) ||
1784 NLA_PUT_MSECS(skb, NDTPA_REACHABLE_TIME, parms->reachable_time); 1784 nla_put_msecs(skb, NDTPA_BASE_REACHABLE_TIME,
1785 NLA_PUT_MSECS(skb, NDTPA_BASE_REACHABLE_TIME, 1785 parms->base_reachable_time) ||
1786 parms->base_reachable_time); 1786 nla_put_msecs(skb, NDTPA_GC_STALETIME, parms->gc_staletime) ||
1787 NLA_PUT_MSECS(skb, NDTPA_GC_STALETIME, parms->gc_staletime); 1787 nla_put_msecs(skb, NDTPA_DELAY_PROBE_TIME,
1788 NLA_PUT_MSECS(skb, NDTPA_DELAY_PROBE_TIME, parms->delay_probe_time); 1788 parms->delay_probe_time) ||
1789 NLA_PUT_MSECS(skb, NDTPA_RETRANS_TIME, parms->retrans_time); 1789 nla_put_msecs(skb, NDTPA_RETRANS_TIME, parms->retrans_time) ||
1790 NLA_PUT_MSECS(skb, NDTPA_ANYCAST_DELAY, parms->anycast_delay); 1790 nla_put_msecs(skb, NDTPA_ANYCAST_DELAY, parms->anycast_delay) ||
1791 NLA_PUT_MSECS(skb, NDTPA_PROXY_DELAY, parms->proxy_delay); 1791 nla_put_msecs(skb, NDTPA_PROXY_DELAY, parms->proxy_delay) ||
1792 NLA_PUT_MSECS(skb, NDTPA_LOCKTIME, parms->locktime); 1792 nla_put_msecs(skb, NDTPA_LOCKTIME, parms->locktime))
1793 1793 goto nla_put_failure;
1794 return nla_nest_end(skb, nest); 1794 return nla_nest_end(skb, nest);
1795 1795
1796nla_put_failure: 1796nla_put_failure:
@@ -1815,12 +1815,12 @@ static int neightbl_fill_info(struct sk_buff *skb, struct neigh_table *tbl,
1815 ndtmsg->ndtm_pad1 = 0; 1815 ndtmsg->ndtm_pad1 = 0;
1816 ndtmsg->ndtm_pad2 = 0; 1816 ndtmsg->ndtm_pad2 = 0;
1817 1817
1818 NLA_PUT_STRING(skb, NDTA_NAME, tbl->id); 1818 if (nla_put_string(skb, NDTA_NAME, tbl->id) ||
1819 NLA_PUT_MSECS(skb, NDTA_GC_INTERVAL, tbl->gc_interval); 1819 nla_put_msecs(skb, NDTA_GC_INTERVAL, tbl->gc_interval) ||
1820 NLA_PUT_U32(skb, NDTA_THRESH1, tbl->gc_thresh1); 1820 nla_put_u32(skb, NDTA_THRESH1, tbl->gc_thresh1) ||
1821 NLA_PUT_U32(skb, NDTA_THRESH2, tbl->gc_thresh2); 1821 nla_put_u32(skb, NDTA_THRESH2, tbl->gc_thresh2) ||
1822 NLA_PUT_U32(skb, NDTA_THRESH3, tbl->gc_thresh3); 1822 nla_put_u32(skb, NDTA_THRESH3, tbl->gc_thresh3))
1823 1823 goto nla_put_failure;
1824 { 1824 {
1825 unsigned long now = jiffies; 1825 unsigned long now = jiffies;
1826 unsigned int flush_delta = now - tbl->last_flush; 1826 unsigned int flush_delta = now - tbl->last_flush;
@@ -1841,7 +1841,8 @@ static int neightbl_fill_info(struct sk_buff *skb, struct neigh_table *tbl,
1841 ndc.ndtc_hash_mask = ((1 << nht->hash_shift) - 1); 1841 ndc.ndtc_hash_mask = ((1 << nht->hash_shift) - 1);
1842 rcu_read_unlock_bh(); 1842 rcu_read_unlock_bh();
1843 1843
1844 NLA_PUT(skb, NDTA_CONFIG, sizeof(ndc), &ndc); 1844 if (nla_put(skb, NDTA_CONFIG, sizeof(ndc), &ndc))
1845 goto nla_put_failure;
1845 } 1846 }
1846 1847
1847 { 1848 {
@@ -1866,7 +1867,8 @@ static int neightbl_fill_info(struct sk_buff *skb, struct neigh_table *tbl,
1866 ndst.ndts_forced_gc_runs += st->forced_gc_runs; 1867 ndst.ndts_forced_gc_runs += st->forced_gc_runs;
1867 } 1868 }
1868 1869
1869 NLA_PUT(skb, NDTA_STATS, sizeof(ndst), &ndst); 1870 if (nla_put(skb, NDTA_STATS, sizeof(ndst), &ndst))
1871 goto nla_put_failure;
1870 } 1872 }
1871 1873
1872 BUG_ON(tbl->parms.dev); 1874 BUG_ON(tbl->parms.dev);
@@ -2137,7 +2139,8 @@ static int neigh_fill_info(struct sk_buff *skb, struct neighbour *neigh,
2137 ndm->ndm_type = neigh->type; 2139 ndm->ndm_type = neigh->type;
2138 ndm->ndm_ifindex = neigh->dev->ifindex; 2140 ndm->ndm_ifindex = neigh->dev->ifindex;
2139 2141
2140 NLA_PUT(skb, NDA_DST, neigh->tbl->key_len, neigh->primary_key); 2142 if (nla_put(skb, NDA_DST, neigh->tbl->key_len, neigh->primary_key))
2143 goto nla_put_failure;
2141 2144
2142 read_lock_bh(&neigh->lock); 2145 read_lock_bh(&neigh->lock);
2143 ndm->ndm_state = neigh->nud_state; 2146 ndm->ndm_state = neigh->nud_state;
@@ -2157,8 +2160,9 @@ static int neigh_fill_info(struct sk_buff *skb, struct neighbour *neigh,
2157 ci.ndm_refcnt = atomic_read(&neigh->refcnt) - 1; 2160 ci.ndm_refcnt = atomic_read(&neigh->refcnt) - 1;
2158 read_unlock_bh(&neigh->lock); 2161 read_unlock_bh(&neigh->lock);
2159 2162
2160 NLA_PUT_U32(skb, NDA_PROBES, atomic_read(&neigh->probes)); 2163 if (nla_put_u32(skb, NDA_PROBES, atomic_read(&neigh->probes)) ||
2161 NLA_PUT(skb, NDA_CACHEINFO, sizeof(ci), &ci); 2164 nla_put(skb, NDA_CACHEINFO, sizeof(ci), &ci))
2165 goto nla_put_failure;
2162 2166
2163 return nlmsg_end(skb, nlh); 2167 return nlmsg_end(skb, nlh);
2164 2168
@@ -2187,7 +2191,8 @@ static int pneigh_fill_info(struct sk_buff *skb, struct pneigh_entry *pn,
2187 ndm->ndm_ifindex = pn->dev->ifindex; 2191 ndm->ndm_ifindex = pn->dev->ifindex;
2188 ndm->ndm_state = NUD_NONE; 2192 ndm->ndm_state = NUD_NONE;
2189 2193
2190 NLA_PUT(skb, NDA_DST, tbl->key_len, pn->key); 2194 if (nla_put(skb, NDA_DST, tbl->key_len, pn->key))
2195 goto nla_put_failure;
2191 2196
2192 return nlmsg_end(skb, nlh); 2197 return nlmsg_end(skb, nlh);
2193 2198
diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c
index 90430b776ece..545a969672ab 100644
--- a/net/core/rtnetlink.c
+++ b/net/core/rtnetlink.c
@@ -607,7 +607,8 @@ int rtnetlink_put_metrics(struct sk_buff *skb, u32 *metrics)
607 for (i = 0; i < RTAX_MAX; i++) { 607 for (i = 0; i < RTAX_MAX; i++) {
608 if (metrics[i]) { 608 if (metrics[i]) {
609 valid++; 609 valid++;
610 NLA_PUT_U32(skb, i+1, metrics[i]); 610 if (nla_put_u32(skb, i+1, metrics[i]))
611 goto nla_put_failure;
611 } 612 }
612 } 613 }
613 614
@@ -782,6 +783,7 @@ static noinline size_t if_nlmsg_size(const struct net_device *dev,
782 + nla_total_size(4) /* IFLA_MTU */ 783 + nla_total_size(4) /* IFLA_MTU */
783 + nla_total_size(4) /* IFLA_LINK */ 784 + nla_total_size(4) /* IFLA_LINK */
784 + nla_total_size(4) /* IFLA_MASTER */ 785 + nla_total_size(4) /* IFLA_MASTER */
786 + nla_total_size(4) /* IFLA_PROMISCUITY */
785 + nla_total_size(1) /* IFLA_OPERSTATE */ 787 + nla_total_size(1) /* IFLA_OPERSTATE */
786 + nla_total_size(1) /* IFLA_LINKMODE */ 788 + nla_total_size(1) /* IFLA_LINKMODE */
787 + nla_total_size(ext_filter_mask 789 + nla_total_size(ext_filter_mask
@@ -807,7 +809,8 @@ static int rtnl_vf_ports_fill(struct sk_buff *skb, struct net_device *dev)
807 vf_port = nla_nest_start(skb, IFLA_VF_PORT); 809 vf_port = nla_nest_start(skb, IFLA_VF_PORT);
808 if (!vf_port) 810 if (!vf_port)
809 goto nla_put_failure; 811 goto nla_put_failure;
810 NLA_PUT_U32(skb, IFLA_PORT_VF, vf); 812 if (nla_put_u32(skb, IFLA_PORT_VF, vf))
813 goto nla_put_failure;
811 err = dev->netdev_ops->ndo_get_vf_port(dev, vf, skb); 814 err = dev->netdev_ops->ndo_get_vf_port(dev, vf, skb);
812 if (err == -EMSGSIZE) 815 if (err == -EMSGSIZE)
813 goto nla_put_failure; 816 goto nla_put_failure;
@@ -891,25 +894,23 @@ static int rtnl_fill_ifinfo(struct sk_buff *skb, struct net_device *dev,
891 ifm->ifi_flags = dev_get_flags(dev); 894 ifm->ifi_flags = dev_get_flags(dev);
892 ifm->ifi_change = change; 895 ifm->ifi_change = change;
893 896
894 NLA_PUT_STRING(skb, IFLA_IFNAME, dev->name); 897 if (nla_put_string(skb, IFLA_IFNAME, dev->name) ||
895 NLA_PUT_U32(skb, IFLA_TXQLEN, dev->tx_queue_len); 898 nla_put_u32(skb, IFLA_TXQLEN, dev->tx_queue_len) ||
896 NLA_PUT_U8(skb, IFLA_OPERSTATE, 899 nla_put_u8(skb, IFLA_OPERSTATE,
897 netif_running(dev) ? dev->operstate : IF_OPER_DOWN); 900 netif_running(dev) ? dev->operstate : IF_OPER_DOWN) ||
898 NLA_PUT_U8(skb, IFLA_LINKMODE, dev->link_mode); 901 nla_put_u8(skb, IFLA_LINKMODE, dev->link_mode) ||
899 NLA_PUT_U32(skb, IFLA_MTU, dev->mtu); 902 nla_put_u32(skb, IFLA_MTU, dev->mtu) ||
900 NLA_PUT_U32(skb, IFLA_GROUP, dev->group); 903 nla_put_u32(skb, IFLA_GROUP, dev->group) ||
901 904 nla_put_u32(skb, IFLA_PROMISCUITY, dev->promiscuity) ||
902 if (dev->ifindex != dev->iflink) 905 (dev->ifindex != dev->iflink &&
903 NLA_PUT_U32(skb, IFLA_LINK, dev->iflink); 906 nla_put_u32(skb, IFLA_LINK, dev->iflink)) ||
904 907 (dev->master &&
905 if (dev->master) 908 nla_put_u32(skb, IFLA_MASTER, dev->master->ifindex)) ||
906 NLA_PUT_U32(skb, IFLA_MASTER, dev->master->ifindex); 909 (dev->qdisc &&
907 910 nla_put_string(skb, IFLA_QDISC, dev->qdisc->ops->id)) ||
908 if (dev->qdisc) 911 (dev->ifalias &&
909 NLA_PUT_STRING(skb, IFLA_QDISC, dev->qdisc->ops->id); 912 nla_put_string(skb, IFLA_IFALIAS, dev->ifalias)))
910 913 goto nla_put_failure;
911 if (dev->ifalias)
912 NLA_PUT_STRING(skb, IFLA_IFALIAS, dev->ifalias);
913 914
914 if (1) { 915 if (1) {
915 struct rtnl_link_ifmap map = { 916 struct rtnl_link_ifmap map = {
@@ -920,12 +921,14 @@ static int rtnl_fill_ifinfo(struct sk_buff *skb, struct net_device *dev,
920 .dma = dev->dma, 921 .dma = dev->dma,
921 .port = dev->if_port, 922 .port = dev->if_port,
922 }; 923 };
923 NLA_PUT(skb, IFLA_MAP, sizeof(map), &map); 924 if (nla_put(skb, IFLA_MAP, sizeof(map), &map))
925 goto nla_put_failure;
924 } 926 }
925 927
926 if (dev->addr_len) { 928 if (dev->addr_len) {
927 NLA_PUT(skb, IFLA_ADDRESS, dev->addr_len, dev->dev_addr); 929 if (nla_put(skb, IFLA_ADDRESS, dev->addr_len, dev->dev_addr) ||
928 NLA_PUT(skb, IFLA_BROADCAST, dev->addr_len, dev->broadcast); 930 nla_put(skb, IFLA_BROADCAST, dev->addr_len, dev->broadcast))
931 goto nla_put_failure;
929 } 932 }
930 933
931 attr = nla_reserve(skb, IFLA_STATS, 934 attr = nla_reserve(skb, IFLA_STATS,
@@ -942,8 +945,9 @@ static int rtnl_fill_ifinfo(struct sk_buff *skb, struct net_device *dev,
942 goto nla_put_failure; 945 goto nla_put_failure;
943 copy_rtnl_link_stats64(nla_data(attr), stats); 946 copy_rtnl_link_stats64(nla_data(attr), stats);
944 947
945 if (dev->dev.parent && (ext_filter_mask & RTEXT_FILTER_VF)) 948 if (dev->dev.parent && (ext_filter_mask & RTEXT_FILTER_VF) &&
946 NLA_PUT_U32(skb, IFLA_NUM_VF, dev_num_vf(dev->dev.parent)); 949 nla_put_u32(skb, IFLA_NUM_VF, dev_num_vf(dev->dev.parent)))
950 goto nla_put_failure;
947 951
948 if (dev->netdev_ops->ndo_get_vf_config && dev->dev.parent 952 if (dev->netdev_ops->ndo_get_vf_config && dev->dev.parent
949 && (ext_filter_mask & RTEXT_FILTER_VF)) { 953 && (ext_filter_mask & RTEXT_FILTER_VF)) {
@@ -986,12 +990,13 @@ static int rtnl_fill_ifinfo(struct sk_buff *skb, struct net_device *dev,
986 nla_nest_cancel(skb, vfinfo); 990 nla_nest_cancel(skb, vfinfo);
987 goto nla_put_failure; 991 goto nla_put_failure;
988 } 992 }
989 NLA_PUT(skb, IFLA_VF_MAC, sizeof(vf_mac), &vf_mac); 993 if (nla_put(skb, IFLA_VF_MAC, sizeof(vf_mac), &vf_mac) ||
990 NLA_PUT(skb, IFLA_VF_VLAN, sizeof(vf_vlan), &vf_vlan); 994 nla_put(skb, IFLA_VF_VLAN, sizeof(vf_vlan), &vf_vlan) ||
991 NLA_PUT(skb, IFLA_VF_TX_RATE, sizeof(vf_tx_rate), 995 nla_put(skb, IFLA_VF_TX_RATE, sizeof(vf_tx_rate),
992 &vf_tx_rate); 996 &vf_tx_rate) ||
993 NLA_PUT(skb, IFLA_VF_SPOOFCHK, sizeof(vf_spoofchk), 997 nla_put(skb, IFLA_VF_SPOOFCHK, sizeof(vf_spoofchk),
994 &vf_spoofchk); 998 &vf_spoofchk))
999 goto nla_put_failure;
995 nla_nest_end(skb, vf); 1000 nla_nest_end(skb, vf);
996 } 1001 }
997 nla_nest_end(skb, vfinfo); 1002 nla_nest_end(skb, vfinfo);
@@ -1113,6 +1118,7 @@ const struct nla_policy ifla_policy[IFLA_MAX+1] = {
1113 [IFLA_PORT_SELF] = { .type = NLA_NESTED }, 1118 [IFLA_PORT_SELF] = { .type = NLA_NESTED },
1114 [IFLA_AF_SPEC] = { .type = NLA_NESTED }, 1119 [IFLA_AF_SPEC] = { .type = NLA_NESTED },
1115 [IFLA_EXT_MASK] = { .type = NLA_U32 }, 1120 [IFLA_EXT_MASK] = { .type = NLA_U32 },
1121 [IFLA_PROMISCUITY] = { .type = NLA_U32 },
1116}; 1122};
1117EXPORT_SYMBOL(ifla_policy); 1123EXPORT_SYMBOL(ifla_policy);
1118 1124
diff --git a/net/core/skbuff.c b/net/core/skbuff.c
index baf8d281152c..a396a6926238 100644
--- a/net/core/skbuff.c
+++ b/net/core/skbuff.c
@@ -67,8 +67,7 @@
67 67
68#include <asm/uaccess.h> 68#include <asm/uaccess.h>
69#include <trace/events/skb.h> 69#include <trace/events/skb.h>
70 70#include <linux/highmem.h>
71#include "kmap_skb.h"
72 71
73static struct kmem_cache *skbuff_head_cache __read_mostly; 72static struct kmem_cache *skbuff_head_cache __read_mostly;
74static struct kmem_cache *skbuff_fclone_cache __read_mostly; 73static struct kmem_cache *skbuff_fclone_cache __read_mostly;
@@ -707,10 +706,10 @@ int skb_copy_ubufs(struct sk_buff *skb, gfp_t gfp_mask)
707 } 706 }
708 return -ENOMEM; 707 return -ENOMEM;
709 } 708 }
710 vaddr = kmap_skb_frag(&skb_shinfo(skb)->frags[i]); 709 vaddr = kmap_atomic(skb_frag_page(f));
711 memcpy(page_address(page), 710 memcpy(page_address(page),
712 vaddr + f->page_offset, skb_frag_size(f)); 711 vaddr + f->page_offset, skb_frag_size(f));
713 kunmap_skb_frag(vaddr); 712 kunmap_atomic(vaddr);
714 page->private = (unsigned long)head; 713 page->private = (unsigned long)head;
715 head = page; 714 head = page;
716 } 715 }
@@ -1485,21 +1484,22 @@ int skb_copy_bits(const struct sk_buff *skb, int offset, void *to, int len)
1485 1484
1486 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 1485 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1487 int end; 1486 int end;
1487 skb_frag_t *f = &skb_shinfo(skb)->frags[i];
1488 1488
1489 WARN_ON(start > offset + len); 1489 WARN_ON(start > offset + len);
1490 1490
1491 end = start + skb_frag_size(&skb_shinfo(skb)->frags[i]); 1491 end = start + skb_frag_size(f);
1492 if ((copy = end - offset) > 0) { 1492 if ((copy = end - offset) > 0) {
1493 u8 *vaddr; 1493 u8 *vaddr;
1494 1494
1495 if (copy > len) 1495 if (copy > len)
1496 copy = len; 1496 copy = len;
1497 1497
1498 vaddr = kmap_skb_frag(&skb_shinfo(skb)->frags[i]); 1498 vaddr = kmap_atomic(skb_frag_page(f));
1499 memcpy(to, 1499 memcpy(to,
1500 vaddr + skb_shinfo(skb)->frags[i].page_offset+ 1500 vaddr + f->page_offset + offset - start,
1501 offset - start, copy); 1501 copy);
1502 kunmap_skb_frag(vaddr); 1502 kunmap_atomic(vaddr);
1503 1503
1504 if ((len -= copy) == 0) 1504 if ((len -= copy) == 0)
1505 return 0; 1505 return 0;
@@ -1804,10 +1804,10 @@ int skb_store_bits(struct sk_buff *skb, int offset, const void *from, int len)
1804 if (copy > len) 1804 if (copy > len)
1805 copy = len; 1805 copy = len;
1806 1806
1807 vaddr = kmap_skb_frag(frag); 1807 vaddr = kmap_atomic(skb_frag_page(frag));
1808 memcpy(vaddr + frag->page_offset + offset - start, 1808 memcpy(vaddr + frag->page_offset + offset - start,
1809 from, copy); 1809 from, copy);
1810 kunmap_skb_frag(vaddr); 1810 kunmap_atomic(vaddr);
1811 1811
1812 if ((len -= copy) == 0) 1812 if ((len -= copy) == 0)
1813 return 0; 1813 return 0;
@@ -1867,21 +1867,21 @@ __wsum skb_checksum(const struct sk_buff *skb, int offset,
1867 1867
1868 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 1868 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1869 int end; 1869 int end;
1870 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1870 1871
1871 WARN_ON(start > offset + len); 1872 WARN_ON(start > offset + len);
1872 1873
1873 end = start + skb_frag_size(&skb_shinfo(skb)->frags[i]); 1874 end = start + skb_frag_size(frag);
1874 if ((copy = end - offset) > 0) { 1875 if ((copy = end - offset) > 0) {
1875 __wsum csum2; 1876 __wsum csum2;
1876 u8 *vaddr; 1877 u8 *vaddr;
1877 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1878 1878
1879 if (copy > len) 1879 if (copy > len)
1880 copy = len; 1880 copy = len;
1881 vaddr = kmap_skb_frag(frag); 1881 vaddr = kmap_atomic(skb_frag_page(frag));
1882 csum2 = csum_partial(vaddr + frag->page_offset + 1882 csum2 = csum_partial(vaddr + frag->page_offset +
1883 offset - start, copy, 0); 1883 offset - start, copy, 0);
1884 kunmap_skb_frag(vaddr); 1884 kunmap_atomic(vaddr);
1885 csum = csum_block_add(csum, csum2, pos); 1885 csum = csum_block_add(csum, csum2, pos);
1886 if (!(len -= copy)) 1886 if (!(len -= copy))
1887 return csum; 1887 return csum;
@@ -1953,12 +1953,12 @@ __wsum skb_copy_and_csum_bits(const struct sk_buff *skb, int offset,
1953 1953
1954 if (copy > len) 1954 if (copy > len)
1955 copy = len; 1955 copy = len;
1956 vaddr = kmap_skb_frag(frag); 1956 vaddr = kmap_atomic(skb_frag_page(frag));
1957 csum2 = csum_partial_copy_nocheck(vaddr + 1957 csum2 = csum_partial_copy_nocheck(vaddr +
1958 frag->page_offset + 1958 frag->page_offset +
1959 offset - start, to, 1959 offset - start, to,
1960 copy, 0); 1960 copy, 0);
1961 kunmap_skb_frag(vaddr); 1961 kunmap_atomic(vaddr);
1962 csum = csum_block_add(csum, csum2, pos); 1962 csum = csum_block_add(csum, csum2, pos);
1963 if (!(len -= copy)) 1963 if (!(len -= copy))
1964 return csum; 1964 return csum;
@@ -2478,7 +2478,7 @@ next_skb:
2478 2478
2479 if (abs_offset < block_limit) { 2479 if (abs_offset < block_limit) {
2480 if (!st->frag_data) 2480 if (!st->frag_data)
2481 st->frag_data = kmap_skb_frag(frag); 2481 st->frag_data = kmap_atomic(skb_frag_page(frag));
2482 2482
2483 *data = (u8 *) st->frag_data + frag->page_offset + 2483 *data = (u8 *) st->frag_data + frag->page_offset +
2484 (abs_offset - st->stepped_offset); 2484 (abs_offset - st->stepped_offset);
@@ -2487,7 +2487,7 @@ next_skb:
2487 } 2487 }
2488 2488
2489 if (st->frag_data) { 2489 if (st->frag_data) {
2490 kunmap_skb_frag(st->frag_data); 2490 kunmap_atomic(st->frag_data);
2491 st->frag_data = NULL; 2491 st->frag_data = NULL;
2492 } 2492 }
2493 2493
@@ -2496,7 +2496,7 @@ next_skb:
2496 } 2496 }
2497 2497
2498 if (st->frag_data) { 2498 if (st->frag_data) {
2499 kunmap_skb_frag(st->frag_data); 2499 kunmap_atomic(st->frag_data);
2500 st->frag_data = NULL; 2500 st->frag_data = NULL;
2501 } 2501 }
2502 2502
@@ -2524,7 +2524,7 @@ EXPORT_SYMBOL(skb_seq_read);
2524void skb_abort_seq_read(struct skb_seq_state *st) 2524void skb_abort_seq_read(struct skb_seq_state *st)
2525{ 2525{
2526 if (st->frag_data) 2526 if (st->frag_data)
2527 kunmap_skb_frag(st->frag_data); 2527 kunmap_atomic(st->frag_data);
2528} 2528}
2529EXPORT_SYMBOL(skb_abort_seq_read); 2529EXPORT_SYMBOL(skb_abort_seq_read);
2530 2530
diff --git a/net/dcb/dcbnl.c b/net/dcb/dcbnl.c
index d86053002c16..8dfa1da7c40d 100644
--- a/net/dcb/dcbnl.c
+++ b/net/dcb/dcbnl.c
@@ -178,6 +178,7 @@ static const struct nla_policy dcbnl_ieee_policy[DCB_ATTR_IEEE_MAX + 1] = {
178 [DCB_ATTR_IEEE_ETS] = {.len = sizeof(struct ieee_ets)}, 178 [DCB_ATTR_IEEE_ETS] = {.len = sizeof(struct ieee_ets)},
179 [DCB_ATTR_IEEE_PFC] = {.len = sizeof(struct ieee_pfc)}, 179 [DCB_ATTR_IEEE_PFC] = {.len = sizeof(struct ieee_pfc)},
180 [DCB_ATTR_IEEE_APP_TABLE] = {.type = NLA_NESTED}, 180 [DCB_ATTR_IEEE_APP_TABLE] = {.type = NLA_NESTED},
181 [DCB_ATTR_IEEE_MAXRATE] = {.len = sizeof(struct ieee_maxrate)},
181}; 182};
182 183
183static const struct nla_policy dcbnl_ieee_app[DCB_ATTR_IEEE_APP_MAX + 1] = { 184static const struct nla_policy dcbnl_ieee_app[DCB_ATTR_IEEE_APP_MAX + 1] = {
@@ -1205,13 +1206,15 @@ static int dcbnl_build_peer_app(struct net_device *netdev, struct sk_buff* skb,
1205 if (!app) 1206 if (!app)
1206 goto nla_put_failure; 1207 goto nla_put_failure;
1207 1208
1208 if (app_info_type) 1209 if (app_info_type &&
1209 NLA_PUT(skb, app_info_type, sizeof(info), &info); 1210 nla_put(skb, app_info_type, sizeof(info), &info))
1210 1211 goto nla_put_failure;
1211 for (i = 0; i < app_count; i++)
1212 NLA_PUT(skb, app_entry_type, sizeof(struct dcb_app),
1213 &table[i]);
1214 1212
1213 for (i = 0; i < app_count; i++) {
1214 if (nla_put(skb, app_entry_type, sizeof(struct dcb_app),
1215 &table[i]))
1216 goto nla_put_failure;
1217 }
1215 nla_nest_end(skb, app); 1218 nla_nest_end(skb, app);
1216 } 1219 }
1217 err = 0; 1220 err = 0;
@@ -1230,8 +1233,8 @@ static int dcbnl_ieee_fill(struct sk_buff *skb, struct net_device *netdev)
1230 int dcbx; 1233 int dcbx;
1231 int err = -EMSGSIZE; 1234 int err = -EMSGSIZE;
1232 1235
1233 NLA_PUT_STRING(skb, DCB_ATTR_IFNAME, netdev->name); 1236 if (nla_put_string(skb, DCB_ATTR_IFNAME, netdev->name))
1234 1237 goto nla_put_failure;
1235 ieee = nla_nest_start(skb, DCB_ATTR_IEEE); 1238 ieee = nla_nest_start(skb, DCB_ATTR_IEEE);
1236 if (!ieee) 1239 if (!ieee)
1237 goto nla_put_failure; 1240 goto nla_put_failure;
@@ -1239,15 +1242,28 @@ static int dcbnl_ieee_fill(struct sk_buff *skb, struct net_device *netdev)
1239 if (ops->ieee_getets) { 1242 if (ops->ieee_getets) {
1240 struct ieee_ets ets; 1243 struct ieee_ets ets;
1241 err = ops->ieee_getets(netdev, &ets); 1244 err = ops->ieee_getets(netdev, &ets);
1242 if (!err) 1245 if (!err &&
1243 NLA_PUT(skb, DCB_ATTR_IEEE_ETS, sizeof(ets), &ets); 1246 nla_put(skb, DCB_ATTR_IEEE_ETS, sizeof(ets), &ets))
1247 goto nla_put_failure;
1248 }
1249
1250 if (ops->ieee_getmaxrate) {
1251 struct ieee_maxrate maxrate;
1252 err = ops->ieee_getmaxrate(netdev, &maxrate);
1253 if (!err) {
1254 err = nla_put(skb, DCB_ATTR_IEEE_MAXRATE,
1255 sizeof(maxrate), &maxrate);
1256 if (err)
1257 goto nla_put_failure;
1258 }
1244 } 1259 }
1245 1260
1246 if (ops->ieee_getpfc) { 1261 if (ops->ieee_getpfc) {
1247 struct ieee_pfc pfc; 1262 struct ieee_pfc pfc;
1248 err = ops->ieee_getpfc(netdev, &pfc); 1263 err = ops->ieee_getpfc(netdev, &pfc);
1249 if (!err) 1264 if (!err &&
1250 NLA_PUT(skb, DCB_ATTR_IEEE_PFC, sizeof(pfc), &pfc); 1265 nla_put(skb, DCB_ATTR_IEEE_PFC, sizeof(pfc), &pfc))
1266 goto nla_put_failure;
1251 } 1267 }
1252 1268
1253 app = nla_nest_start(skb, DCB_ATTR_IEEE_APP_TABLE); 1269 app = nla_nest_start(skb, DCB_ATTR_IEEE_APP_TABLE);
@@ -1278,15 +1294,17 @@ static int dcbnl_ieee_fill(struct sk_buff *skb, struct net_device *netdev)
1278 if (ops->ieee_peer_getets) { 1294 if (ops->ieee_peer_getets) {
1279 struct ieee_ets ets; 1295 struct ieee_ets ets;
1280 err = ops->ieee_peer_getets(netdev, &ets); 1296 err = ops->ieee_peer_getets(netdev, &ets);
1281 if (!err) 1297 if (!err &&
1282 NLA_PUT(skb, DCB_ATTR_IEEE_PEER_ETS, sizeof(ets), &ets); 1298 nla_put(skb, DCB_ATTR_IEEE_PEER_ETS, sizeof(ets), &ets))
1299 goto nla_put_failure;
1283 } 1300 }
1284 1301
1285 if (ops->ieee_peer_getpfc) { 1302 if (ops->ieee_peer_getpfc) {
1286 struct ieee_pfc pfc; 1303 struct ieee_pfc pfc;
1287 err = ops->ieee_peer_getpfc(netdev, &pfc); 1304 err = ops->ieee_peer_getpfc(netdev, &pfc);
1288 if (!err) 1305 if (!err &&
1289 NLA_PUT(skb, DCB_ATTR_IEEE_PEER_PFC, sizeof(pfc), &pfc); 1306 nla_put(skb, DCB_ATTR_IEEE_PEER_PFC, sizeof(pfc), &pfc))
1307 goto nla_put_failure;
1290 } 1308 }
1291 1309
1292 if (ops->peer_getappinfo && ops->peer_getapptable) { 1310 if (ops->peer_getappinfo && ops->peer_getapptable) {
@@ -1340,10 +1358,11 @@ static int dcbnl_cee_pg_fill(struct sk_buff *skb, struct net_device *dev,
1340 ops->getpgtccfgtx(dev, i - DCB_PG_ATTR_TC_0, 1358 ops->getpgtccfgtx(dev, i - DCB_PG_ATTR_TC_0,
1341 &prio, &pgid, &tc_pct, &up_map); 1359 &prio, &pgid, &tc_pct, &up_map);
1342 1360
1343 NLA_PUT_U8(skb, DCB_TC_ATTR_PARAM_PGID, pgid); 1361 if (nla_put_u8(skb, DCB_TC_ATTR_PARAM_PGID, pgid) ||
1344 NLA_PUT_U8(skb, DCB_TC_ATTR_PARAM_UP_MAPPING, up_map); 1362 nla_put_u8(skb, DCB_TC_ATTR_PARAM_UP_MAPPING, up_map) ||
1345 NLA_PUT_U8(skb, DCB_TC_ATTR_PARAM_STRICT_PRIO, prio); 1363 nla_put_u8(skb, DCB_TC_ATTR_PARAM_STRICT_PRIO, prio) ||
1346 NLA_PUT_U8(skb, DCB_TC_ATTR_PARAM_BW_PCT, tc_pct); 1364 nla_put_u8(skb, DCB_TC_ATTR_PARAM_BW_PCT, tc_pct))
1365 goto nla_put_failure;
1347 nla_nest_end(skb, tc_nest); 1366 nla_nest_end(skb, tc_nest);
1348 } 1367 }
1349 1368
@@ -1356,7 +1375,8 @@ static int dcbnl_cee_pg_fill(struct sk_buff *skb, struct net_device *dev,
1356 else 1375 else
1357 ops->getpgbwgcfgtx(dev, i - DCB_PG_ATTR_BW_ID_0, 1376 ops->getpgbwgcfgtx(dev, i - DCB_PG_ATTR_BW_ID_0,
1358 &tc_pct); 1377 &tc_pct);
1359 NLA_PUT_U8(skb, i, tc_pct); 1378 if (nla_put_u8(skb, i, tc_pct))
1379 goto nla_put_failure;
1360 } 1380 }
1361 nla_nest_end(skb, pg); 1381 nla_nest_end(skb, pg);
1362 return 0; 1382 return 0;
@@ -1373,8 +1393,8 @@ static int dcbnl_cee_fill(struct sk_buff *skb, struct net_device *netdev)
1373 int dcbx, i, err = -EMSGSIZE; 1393 int dcbx, i, err = -EMSGSIZE;
1374 u8 value; 1394 u8 value;
1375 1395
1376 NLA_PUT_STRING(skb, DCB_ATTR_IFNAME, netdev->name); 1396 if (nla_put_string(skb, DCB_ATTR_IFNAME, netdev->name))
1377 1397 goto nla_put_failure;
1378 cee = nla_nest_start(skb, DCB_ATTR_CEE); 1398 cee = nla_nest_start(skb, DCB_ATTR_CEE);
1379 if (!cee) 1399 if (!cee)
1380 goto nla_put_failure; 1400 goto nla_put_failure;
@@ -1401,7 +1421,8 @@ static int dcbnl_cee_fill(struct sk_buff *skb, struct net_device *netdev)
1401 1421
1402 for (i = DCB_PFC_UP_ATTR_0; i <= DCB_PFC_UP_ATTR_7; i++) { 1422 for (i = DCB_PFC_UP_ATTR_0; i <= DCB_PFC_UP_ATTR_7; i++) {
1403 ops->getpfccfg(netdev, i - DCB_PFC_UP_ATTR_0, &value); 1423 ops->getpfccfg(netdev, i - DCB_PFC_UP_ATTR_0, &value);
1404 NLA_PUT_U8(skb, i, value); 1424 if (nla_put_u8(skb, i, value))
1425 goto nla_put_failure;
1405 } 1426 }
1406 nla_nest_end(skb, pfc_nest); 1427 nla_nest_end(skb, pfc_nest);
1407 } 1428 }
@@ -1454,8 +1475,9 @@ static int dcbnl_cee_fill(struct sk_buff *skb, struct net_device *netdev)
1454 1475
1455 for (i = DCB_FEATCFG_ATTR_ALL + 1; i <= DCB_FEATCFG_ATTR_MAX; 1476 for (i = DCB_FEATCFG_ATTR_ALL + 1; i <= DCB_FEATCFG_ATTR_MAX;
1456 i++) 1477 i++)
1457 if (!ops->getfeatcfg(netdev, i, &value)) 1478 if (!ops->getfeatcfg(netdev, i, &value) &&
1458 NLA_PUT_U8(skb, i, value); 1479 nla_put_u8(skb, i, value))
1480 goto nla_put_failure;
1459 1481
1460 nla_nest_end(skb, feat); 1482 nla_nest_end(skb, feat);
1461 } 1483 }
@@ -1464,15 +1486,17 @@ static int dcbnl_cee_fill(struct sk_buff *skb, struct net_device *netdev)
1464 if (ops->cee_peer_getpg) { 1486 if (ops->cee_peer_getpg) {
1465 struct cee_pg pg; 1487 struct cee_pg pg;
1466 err = ops->cee_peer_getpg(netdev, &pg); 1488 err = ops->cee_peer_getpg(netdev, &pg);
1467 if (!err) 1489 if (!err &&
1468 NLA_PUT(skb, DCB_ATTR_CEE_PEER_PG, sizeof(pg), &pg); 1490 nla_put(skb, DCB_ATTR_CEE_PEER_PG, sizeof(pg), &pg))
1491 goto nla_put_failure;
1469 } 1492 }
1470 1493
1471 if (ops->cee_peer_getpfc) { 1494 if (ops->cee_peer_getpfc) {
1472 struct cee_pfc pfc; 1495 struct cee_pfc pfc;
1473 err = ops->cee_peer_getpfc(netdev, &pfc); 1496 err = ops->cee_peer_getpfc(netdev, &pfc);
1474 if (!err) 1497 if (!err &&
1475 NLA_PUT(skb, DCB_ATTR_CEE_PEER_PFC, sizeof(pfc), &pfc); 1498 nla_put(skb, DCB_ATTR_CEE_PEER_PFC, sizeof(pfc), &pfc))
1499 goto nla_put_failure;
1476 } 1500 }
1477 1501
1478 if (ops->peer_getappinfo && ops->peer_getapptable) { 1502 if (ops->peer_getappinfo && ops->peer_getapptable) {
@@ -1589,6 +1613,14 @@ static int dcbnl_ieee_set(struct net_device *netdev, struct nlattr **tb,
1589 goto err; 1613 goto err;
1590 } 1614 }
1591 1615
1616 if (ieee[DCB_ATTR_IEEE_MAXRATE] && ops->ieee_setmaxrate) {
1617 struct ieee_maxrate *maxrate =
1618 nla_data(ieee[DCB_ATTR_IEEE_MAXRATE]);
1619 err = ops->ieee_setmaxrate(netdev, maxrate);
1620 if (err)
1621 goto err;
1622 }
1623
1592 if (ieee[DCB_ATTR_IEEE_PFC] && ops->ieee_setpfc) { 1624 if (ieee[DCB_ATTR_IEEE_PFC] && ops->ieee_setpfc) {
1593 struct ieee_pfc *pfc = nla_data(ieee[DCB_ATTR_IEEE_PFC]); 1625 struct ieee_pfc *pfc = nla_data(ieee[DCB_ATTR_IEEE_PFC]);
1594 err = ops->ieee_setpfc(netdev, pfc); 1626 err = ops->ieee_setpfc(netdev, pfc);
diff --git a/net/decnet/dn_dev.c b/net/decnet/dn_dev.c
index c00e3077988c..a4aecb09d12a 100644
--- a/net/decnet/dn_dev.c
+++ b/net/decnet/dn_dev.c
@@ -694,13 +694,13 @@ static int dn_nl_fill_ifaddr(struct sk_buff *skb, struct dn_ifaddr *ifa,
694 ifm->ifa_scope = ifa->ifa_scope; 694 ifm->ifa_scope = ifa->ifa_scope;
695 ifm->ifa_index = ifa->ifa_dev->dev->ifindex; 695 ifm->ifa_index = ifa->ifa_dev->dev->ifindex;
696 696
697 if (ifa->ifa_address) 697 if ((ifa->ifa_address &&
698 NLA_PUT_LE16(skb, IFA_ADDRESS, ifa->ifa_address); 698 nla_put_le16(skb, IFA_ADDRESS, ifa->ifa_address)) ||
699 if (ifa->ifa_local) 699 (ifa->ifa_local &&
700 NLA_PUT_LE16(skb, IFA_LOCAL, ifa->ifa_local); 700 nla_put_le16(skb, IFA_LOCAL, ifa->ifa_local)) ||
701 if (ifa->ifa_label[0]) 701 (ifa->ifa_label[0] &&
702 NLA_PUT_STRING(skb, IFA_LABEL, ifa->ifa_label); 702 nla_put_string(skb, IFA_LABEL, ifa->ifa_label)))
703 703 goto nla_put_failure;
704 return nlmsg_end(skb, nlh); 704 return nlmsg_end(skb, nlh);
705 705
706nla_put_failure: 706nla_put_failure:
diff --git a/net/decnet/dn_rules.c b/net/decnet/dn_rules.c
index f65c9ddaee41..7399e3d51922 100644
--- a/net/decnet/dn_rules.c
+++ b/net/decnet/dn_rules.c
@@ -204,11 +204,11 @@ static int dn_fib_rule_fill(struct fib_rule *rule, struct sk_buff *skb,
204 frh->src_len = r->src_len; 204 frh->src_len = r->src_len;
205 frh->tos = 0; 205 frh->tos = 0;
206 206
207 if (r->dst_len) 207 if ((r->dst_len &&
208 NLA_PUT_LE16(skb, FRA_DST, r->dst); 208 nla_put_le16(skb, FRA_DST, r->dst)) ||
209 if (r->src_len) 209 (r->src_len &&
210 NLA_PUT_LE16(skb, FRA_SRC, r->src); 210 nla_put_le16(skb, FRA_SRC, r->src)))
211 211 goto nla_put_failure;
212 return 0; 212 return 0;
213 213
214nla_put_failure: 214nla_put_failure:
diff --git a/net/ieee802154/nl-mac.c b/net/ieee802154/nl-mac.c
index adaf46214905..ca92587720f4 100644
--- a/net/ieee802154/nl-mac.c
+++ b/net/ieee802154/nl-mac.c
@@ -63,15 +63,14 @@ int ieee802154_nl_assoc_indic(struct net_device *dev,
63 if (!msg) 63 if (!msg)
64 return -ENOBUFS; 64 return -ENOBUFS;
65 65
66 NLA_PUT_STRING(msg, IEEE802154_ATTR_DEV_NAME, dev->name); 66 if (nla_put_string(msg, IEEE802154_ATTR_DEV_NAME, dev->name) ||
67 NLA_PUT_U32(msg, IEEE802154_ATTR_DEV_INDEX, dev->ifindex); 67 nla_put_u32(msg, IEEE802154_ATTR_DEV_INDEX, dev->ifindex) ||
68 NLA_PUT(msg, IEEE802154_ATTR_HW_ADDR, IEEE802154_ADDR_LEN, 68 nla_put(msg, IEEE802154_ATTR_HW_ADDR, IEEE802154_ADDR_LEN,
69 dev->dev_addr); 69 dev->dev_addr) ||
70 70 nla_put(msg, IEEE802154_ATTR_SRC_HW_ADDR, IEEE802154_ADDR_LEN,
71 NLA_PUT(msg, IEEE802154_ATTR_SRC_HW_ADDR, IEEE802154_ADDR_LEN, 71 addr->hwaddr) ||
72 addr->hwaddr); 72 nla_put_u8(msg, IEEE802154_ATTR_CAPABILITY, cap))
73 73 goto nla_put_failure;
74 NLA_PUT_U8(msg, IEEE802154_ATTR_CAPABILITY, cap);
75 74
76 return ieee802154_nl_mcast(msg, ieee802154_coord_mcgrp.id); 75 return ieee802154_nl_mcast(msg, ieee802154_coord_mcgrp.id);
77 76
@@ -92,14 +91,13 @@ int ieee802154_nl_assoc_confirm(struct net_device *dev, u16 short_addr,
92 if (!msg) 91 if (!msg)
93 return -ENOBUFS; 92 return -ENOBUFS;
94 93
95 NLA_PUT_STRING(msg, IEEE802154_ATTR_DEV_NAME, dev->name); 94 if (nla_put_string(msg, IEEE802154_ATTR_DEV_NAME, dev->name) ||
96 NLA_PUT_U32(msg, IEEE802154_ATTR_DEV_INDEX, dev->ifindex); 95 nla_put_u32(msg, IEEE802154_ATTR_DEV_INDEX, dev->ifindex) ||
97 NLA_PUT(msg, IEEE802154_ATTR_HW_ADDR, IEEE802154_ADDR_LEN, 96 nla_put(msg, IEEE802154_ATTR_HW_ADDR, IEEE802154_ADDR_LEN,
98 dev->dev_addr); 97 dev->dev_addr) ||
99 98 nla_put_u16(msg, IEEE802154_ATTR_SHORT_ADDR, short_addr) ||
100 NLA_PUT_U16(msg, IEEE802154_ATTR_SHORT_ADDR, short_addr); 99 nla_put_u8(msg, IEEE802154_ATTR_STATUS, status))
101 NLA_PUT_U8(msg, IEEE802154_ATTR_STATUS, status); 100 goto nla_put_failure;
102
103 return ieee802154_nl_mcast(msg, ieee802154_coord_mcgrp.id); 101 return ieee802154_nl_mcast(msg, ieee802154_coord_mcgrp.id);
104 102
105nla_put_failure: 103nla_put_failure:
@@ -119,20 +117,22 @@ int ieee802154_nl_disassoc_indic(struct net_device *dev,
119 if (!msg) 117 if (!msg)
120 return -ENOBUFS; 118 return -ENOBUFS;
121 119
122 NLA_PUT_STRING(msg, IEEE802154_ATTR_DEV_NAME, dev->name); 120 if (nla_put_string(msg, IEEE802154_ATTR_DEV_NAME, dev->name) ||
123 NLA_PUT_U32(msg, IEEE802154_ATTR_DEV_INDEX, dev->ifindex); 121 nla_put_u32(msg, IEEE802154_ATTR_DEV_INDEX, dev->ifindex) ||
124 NLA_PUT(msg, IEEE802154_ATTR_HW_ADDR, IEEE802154_ADDR_LEN, 122 nla_put(msg, IEEE802154_ATTR_HW_ADDR, IEEE802154_ADDR_LEN,
125 dev->dev_addr); 123 dev->dev_addr))
126 124 goto nla_put_failure;
127 if (addr->addr_type == IEEE802154_ADDR_LONG) 125 if (addr->addr_type == IEEE802154_ADDR_LONG) {
128 NLA_PUT(msg, IEEE802154_ATTR_SRC_HW_ADDR, IEEE802154_ADDR_LEN, 126 if (nla_put(msg, IEEE802154_ATTR_SRC_HW_ADDR, IEEE802154_ADDR_LEN,
129 addr->hwaddr); 127 addr->hwaddr))
130 else 128 goto nla_put_failure;
131 NLA_PUT_U16(msg, IEEE802154_ATTR_SRC_SHORT_ADDR, 129 } else {
132 addr->short_addr); 130 if (nla_put_u16(msg, IEEE802154_ATTR_SRC_SHORT_ADDR,
133 131 addr->short_addr))
134 NLA_PUT_U8(msg, IEEE802154_ATTR_REASON, reason); 132 goto nla_put_failure;
135 133 }
134 if (nla_put_u8(msg, IEEE802154_ATTR_REASON, reason))
135 goto nla_put_failure;
136 return ieee802154_nl_mcast(msg, ieee802154_coord_mcgrp.id); 136 return ieee802154_nl_mcast(msg, ieee802154_coord_mcgrp.id);
137 137
138nla_put_failure: 138nla_put_failure:
@@ -151,13 +151,12 @@ int ieee802154_nl_disassoc_confirm(struct net_device *dev, u8 status)
151 if (!msg) 151 if (!msg)
152 return -ENOBUFS; 152 return -ENOBUFS;
153 153
154 NLA_PUT_STRING(msg, IEEE802154_ATTR_DEV_NAME, dev->name); 154 if (nla_put_string(msg, IEEE802154_ATTR_DEV_NAME, dev->name) ||
155 NLA_PUT_U32(msg, IEEE802154_ATTR_DEV_INDEX, dev->ifindex); 155 nla_put_u32(msg, IEEE802154_ATTR_DEV_INDEX, dev->ifindex) ||
156 NLA_PUT(msg, IEEE802154_ATTR_HW_ADDR, IEEE802154_ADDR_LEN, 156 nla_put(msg, IEEE802154_ATTR_HW_ADDR, IEEE802154_ADDR_LEN,
157 dev->dev_addr); 157 dev->dev_addr) ||
158 158 nla_put_u8(msg, IEEE802154_ATTR_STATUS, status))
159 NLA_PUT_U8(msg, IEEE802154_ATTR_STATUS, status); 159 goto nla_put_failure;
160
161 return ieee802154_nl_mcast(msg, ieee802154_coord_mcgrp.id); 160 return ieee802154_nl_mcast(msg, ieee802154_coord_mcgrp.id);
162 161
163nla_put_failure: 162nla_put_failure:
@@ -177,13 +176,13 @@ int ieee802154_nl_beacon_indic(struct net_device *dev,
177 if (!msg) 176 if (!msg)
178 return -ENOBUFS; 177 return -ENOBUFS;
179 178
180 NLA_PUT_STRING(msg, IEEE802154_ATTR_DEV_NAME, dev->name); 179 if (nla_put_string(msg, IEEE802154_ATTR_DEV_NAME, dev->name) ||
181 NLA_PUT_U32(msg, IEEE802154_ATTR_DEV_INDEX, dev->ifindex); 180 nla_put_u32(msg, IEEE802154_ATTR_DEV_INDEX, dev->ifindex) ||
182 NLA_PUT(msg, IEEE802154_ATTR_HW_ADDR, IEEE802154_ADDR_LEN, 181 nla_put(msg, IEEE802154_ATTR_HW_ADDR, IEEE802154_ADDR_LEN,
183 dev->dev_addr); 182 dev->dev_addr) ||
184 NLA_PUT_U16(msg, IEEE802154_ATTR_COORD_SHORT_ADDR, coord_addr); 183 nla_put_u16(msg, IEEE802154_ATTR_COORD_SHORT_ADDR, coord_addr) ||
185 NLA_PUT_U16(msg, IEEE802154_ATTR_COORD_PAN_ID, panid); 184 nla_put_u16(msg, IEEE802154_ATTR_COORD_PAN_ID, panid))
186 185 goto nla_put_failure;
187 return ieee802154_nl_mcast(msg, ieee802154_coord_mcgrp.id); 186 return ieee802154_nl_mcast(msg, ieee802154_coord_mcgrp.id);
188 187
189nla_put_failure: 188nla_put_failure:
@@ -204,19 +203,17 @@ int ieee802154_nl_scan_confirm(struct net_device *dev,
204 if (!msg) 203 if (!msg)
205 return -ENOBUFS; 204 return -ENOBUFS;
206 205
207 NLA_PUT_STRING(msg, IEEE802154_ATTR_DEV_NAME, dev->name); 206 if (nla_put_string(msg, IEEE802154_ATTR_DEV_NAME, dev->name) ||
208 NLA_PUT_U32(msg, IEEE802154_ATTR_DEV_INDEX, dev->ifindex); 207 nla_put_u32(msg, IEEE802154_ATTR_DEV_INDEX, dev->ifindex) ||
209 NLA_PUT(msg, IEEE802154_ATTR_HW_ADDR, IEEE802154_ADDR_LEN, 208 nla_put(msg, IEEE802154_ATTR_HW_ADDR, IEEE802154_ADDR_LEN,
210 dev->dev_addr); 209 dev->dev_addr) ||
211 210 nla_put_u8(msg, IEEE802154_ATTR_STATUS, status) ||
212 NLA_PUT_U8(msg, IEEE802154_ATTR_STATUS, status); 211 nla_put_u8(msg, IEEE802154_ATTR_SCAN_TYPE, scan_type) ||
213 NLA_PUT_U8(msg, IEEE802154_ATTR_SCAN_TYPE, scan_type); 212 nla_put_u32(msg, IEEE802154_ATTR_CHANNELS, unscanned) ||
214 NLA_PUT_U32(msg, IEEE802154_ATTR_CHANNELS, unscanned); 213 nla_put_u8(msg, IEEE802154_ATTR_PAGE, page) ||
215 NLA_PUT_U8(msg, IEEE802154_ATTR_PAGE, page); 214 (edl &&
216 215 nla_put(msg, IEEE802154_ATTR_ED_LIST, 27, edl)))
217 if (edl) 216 goto nla_put_failure;
218 NLA_PUT(msg, IEEE802154_ATTR_ED_LIST, 27, edl);
219
220 return ieee802154_nl_mcast(msg, ieee802154_coord_mcgrp.id); 217 return ieee802154_nl_mcast(msg, ieee802154_coord_mcgrp.id);
221 218
222nla_put_failure: 219nla_put_failure:
@@ -235,13 +232,12 @@ int ieee802154_nl_start_confirm(struct net_device *dev, u8 status)
235 if (!msg) 232 if (!msg)
236 return -ENOBUFS; 233 return -ENOBUFS;
237 234
238 NLA_PUT_STRING(msg, IEEE802154_ATTR_DEV_NAME, dev->name); 235 if (nla_put_string(msg, IEEE802154_ATTR_DEV_NAME, dev->name) ||
239 NLA_PUT_U32(msg, IEEE802154_ATTR_DEV_INDEX, dev->ifindex); 236 nla_put_u32(msg, IEEE802154_ATTR_DEV_INDEX, dev->ifindex) ||
240 NLA_PUT(msg, IEEE802154_ATTR_HW_ADDR, IEEE802154_ADDR_LEN, 237 nla_put(msg, IEEE802154_ATTR_HW_ADDR, IEEE802154_ADDR_LEN,
241 dev->dev_addr); 238 dev->dev_addr) ||
242 239 nla_put_u8(msg, IEEE802154_ATTR_STATUS, status))
243 NLA_PUT_U8(msg, IEEE802154_ATTR_STATUS, status); 240 goto nla_put_failure;
244
245 return ieee802154_nl_mcast(msg, ieee802154_coord_mcgrp.id); 241 return ieee802154_nl_mcast(msg, ieee802154_coord_mcgrp.id);
246 242
247nla_put_failure: 243nla_put_failure:
@@ -266,16 +262,16 @@ static int ieee802154_nl_fill_iface(struct sk_buff *msg, u32 pid,
266 phy = ieee802154_mlme_ops(dev)->get_phy(dev); 262 phy = ieee802154_mlme_ops(dev)->get_phy(dev);
267 BUG_ON(!phy); 263 BUG_ON(!phy);
268 264
269 NLA_PUT_STRING(msg, IEEE802154_ATTR_DEV_NAME, dev->name); 265 if (nla_put_string(msg, IEEE802154_ATTR_DEV_NAME, dev->name) ||
270 NLA_PUT_STRING(msg, IEEE802154_ATTR_PHY_NAME, wpan_phy_name(phy)); 266 nla_put_string(msg, IEEE802154_ATTR_PHY_NAME, wpan_phy_name(phy)) ||
271 NLA_PUT_U32(msg, IEEE802154_ATTR_DEV_INDEX, dev->ifindex); 267 nla_put_u32(msg, IEEE802154_ATTR_DEV_INDEX, dev->ifindex) ||
272 268 nla_put(msg, IEEE802154_ATTR_HW_ADDR, IEEE802154_ADDR_LEN,
273 NLA_PUT(msg, IEEE802154_ATTR_HW_ADDR, IEEE802154_ADDR_LEN, 269 dev->dev_addr) ||
274 dev->dev_addr); 270 nla_put_u16(msg, IEEE802154_ATTR_SHORT_ADDR,
275 NLA_PUT_U16(msg, IEEE802154_ATTR_SHORT_ADDR, 271 ieee802154_mlme_ops(dev)->get_short_addr(dev)) ||
276 ieee802154_mlme_ops(dev)->get_short_addr(dev)); 272 nla_put_u16(msg, IEEE802154_ATTR_PAN_ID,
277 NLA_PUT_U16(msg, IEEE802154_ATTR_PAN_ID, 273 ieee802154_mlme_ops(dev)->get_pan_id(dev)))
278 ieee802154_mlme_ops(dev)->get_pan_id(dev)); 274 goto nla_put_failure;
279 wpan_phy_put(phy); 275 wpan_phy_put(phy);
280 return genlmsg_end(msg, hdr); 276 return genlmsg_end(msg, hdr);
281 277
diff --git a/net/ieee802154/nl-phy.c b/net/ieee802154/nl-phy.c
index c64a38d57aa3..3bdc4303c339 100644
--- a/net/ieee802154/nl-phy.c
+++ b/net/ieee802154/nl-phy.c
@@ -53,18 +53,18 @@ static int ieee802154_nl_fill_phy(struct sk_buff *msg, u32 pid,
53 goto out; 53 goto out;
54 54
55 mutex_lock(&phy->pib_lock); 55 mutex_lock(&phy->pib_lock);
56 NLA_PUT_STRING(msg, IEEE802154_ATTR_PHY_NAME, wpan_phy_name(phy)); 56 if (nla_put_string(msg, IEEE802154_ATTR_PHY_NAME, wpan_phy_name(phy)) ||
57 57 nla_put_u8(msg, IEEE802154_ATTR_PAGE, phy->current_page) ||
58 NLA_PUT_U8(msg, IEEE802154_ATTR_PAGE, phy->current_page); 58 nla_put_u8(msg, IEEE802154_ATTR_CHANNEL, phy->current_channel))
59 NLA_PUT_U8(msg, IEEE802154_ATTR_CHANNEL, phy->current_channel); 59 goto nla_put_failure;
60 for (i = 0; i < 32; i++) { 60 for (i = 0; i < 32; i++) {
61 if (phy->channels_supported[i]) 61 if (phy->channels_supported[i])
62 buf[pages++] = phy->channels_supported[i] | (i << 27); 62 buf[pages++] = phy->channels_supported[i] | (i << 27);
63 } 63 }
64 if (pages) 64 if (pages &&
65 NLA_PUT(msg, IEEE802154_ATTR_CHANNEL_PAGE_LIST, 65 nla_put(msg, IEEE802154_ATTR_CHANNEL_PAGE_LIST,
66 pages * sizeof(uint32_t), buf); 66 pages * sizeof(uint32_t), buf))
67 67 goto nla_put_failure;
68 mutex_unlock(&phy->pib_lock); 68 mutex_unlock(&phy->pib_lock);
69 kfree(buf); 69 kfree(buf);
70 return genlmsg_end(msg, hdr); 70 return genlmsg_end(msg, hdr);
@@ -245,9 +245,9 @@ static int ieee802154_add_iface(struct sk_buff *skb,
245 goto dev_unregister; 245 goto dev_unregister;
246 } 246 }
247 247
248 NLA_PUT_STRING(msg, IEEE802154_ATTR_PHY_NAME, wpan_phy_name(phy)); 248 if (nla_put_string(msg, IEEE802154_ATTR_PHY_NAME, wpan_phy_name(phy)) ||
249 NLA_PUT_STRING(msg, IEEE802154_ATTR_DEV_NAME, dev->name); 249 nla_put_string(msg, IEEE802154_ATTR_DEV_NAME, dev->name))
250 250 goto nla_put_failure;
251 dev_put(dev); 251 dev_put(dev);
252 252
253 wpan_phy_put(phy); 253 wpan_phy_put(phy);
@@ -333,10 +333,9 @@ static int ieee802154_del_iface(struct sk_buff *skb,
333 333
334 rtnl_unlock(); 334 rtnl_unlock();
335 335
336 336 if (nla_put_string(msg, IEEE802154_ATTR_PHY_NAME, wpan_phy_name(phy)) ||
337 NLA_PUT_STRING(msg, IEEE802154_ATTR_PHY_NAME, wpan_phy_name(phy)); 337 nla_put_string(msg, IEEE802154_ATTR_DEV_NAME, name))
338 NLA_PUT_STRING(msg, IEEE802154_ATTR_DEV_NAME, name); 338 goto nla_put_failure;
339
340 wpan_phy_put(phy); 339 wpan_phy_put(phy);
341 340
342 return ieee802154_nl_reply(msg, info); 341 return ieee802154_nl_reply(msg, info);
diff --git a/net/ipv4/devinet.c b/net/ipv4/devinet.c
index 6e447ff94dfa..7ba2196e4377 100644
--- a/net/ipv4/devinet.c
+++ b/net/ipv4/devinet.c
@@ -1266,17 +1266,15 @@ static int inet_fill_ifaddr(struct sk_buff *skb, struct in_ifaddr *ifa,
1266 ifm->ifa_scope = ifa->ifa_scope; 1266 ifm->ifa_scope = ifa->ifa_scope;
1267 ifm->ifa_index = ifa->ifa_dev->dev->ifindex; 1267 ifm->ifa_index = ifa->ifa_dev->dev->ifindex;
1268 1268
1269 if (ifa->ifa_address) 1269 if ((ifa->ifa_address &&
1270 NLA_PUT_BE32(skb, IFA_ADDRESS, ifa->ifa_address); 1270 nla_put_be32(skb, IFA_ADDRESS, ifa->ifa_address)) ||
1271 1271 (ifa->ifa_local &&
1272 if (ifa->ifa_local) 1272 nla_put_be32(skb, IFA_LOCAL, ifa->ifa_local)) ||
1273 NLA_PUT_BE32(skb, IFA_LOCAL, ifa->ifa_local); 1273 (ifa->ifa_broadcast &&
1274 1274 nla_put_be32(skb, IFA_BROADCAST, ifa->ifa_broadcast)) ||
1275 if (ifa->ifa_broadcast) 1275 (ifa->ifa_label[0] &&
1276 NLA_PUT_BE32(skb, IFA_BROADCAST, ifa->ifa_broadcast); 1276 nla_put_string(skb, IFA_LABEL, ifa->ifa_label)))
1277 1277 goto nla_put_failure;
1278 if (ifa->ifa_label[0])
1279 NLA_PUT_STRING(skb, IFA_LABEL, ifa->ifa_label);
1280 1278
1281 return nlmsg_end(skb, nlh); 1279 return nlmsg_end(skb, nlh);
1282 1280
diff --git a/net/ipv4/fib_rules.c b/net/ipv4/fib_rules.c
index 799fc790b3cf..2d043f71ef70 100644
--- a/net/ipv4/fib_rules.c
+++ b/net/ipv4/fib_rules.c
@@ -221,15 +221,15 @@ static int fib4_rule_fill(struct fib_rule *rule, struct sk_buff *skb,
221 frh->src_len = rule4->src_len; 221 frh->src_len = rule4->src_len;
222 frh->tos = rule4->tos; 222 frh->tos = rule4->tos;
223 223
224 if (rule4->dst_len) 224 if ((rule4->dst_len &&
225 NLA_PUT_BE32(skb, FRA_DST, rule4->dst); 225 nla_put_be32(skb, FRA_DST, rule4->dst)) ||
226 226 (rule4->src_len &&
227 if (rule4->src_len) 227 nla_put_be32(skb, FRA_SRC, rule4->src)))
228 NLA_PUT_BE32(skb, FRA_SRC, rule4->src); 228 goto nla_put_failure;
229
230#ifdef CONFIG_IP_ROUTE_CLASSID 229#ifdef CONFIG_IP_ROUTE_CLASSID
231 if (rule4->tclassid) 230 if (rule4->tclassid &&
232 NLA_PUT_U32(skb, FRA_FLOW, rule4->tclassid); 231 nla_put_u32(skb, FRA_FLOW, rule4->tclassid))
232 goto nla_put_failure;
233#endif 233#endif
234 return 0; 234 return 0;
235 235
diff --git a/net/ipv4/fib_semantics.c b/net/ipv4/fib_semantics.c
index 5063fa38ac7b..a8bdf7405433 100644
--- a/net/ipv4/fib_semantics.c
+++ b/net/ipv4/fib_semantics.c
@@ -931,33 +931,36 @@ int fib_dump_info(struct sk_buff *skb, u32 pid, u32 seq, int event,
931 rtm->rtm_table = tb_id; 931 rtm->rtm_table = tb_id;
932 else 932 else
933 rtm->rtm_table = RT_TABLE_COMPAT; 933 rtm->rtm_table = RT_TABLE_COMPAT;
934 NLA_PUT_U32(skb, RTA_TABLE, tb_id); 934 if (nla_put_u32(skb, RTA_TABLE, tb_id))
935 goto nla_put_failure;
935 rtm->rtm_type = type; 936 rtm->rtm_type = type;
936 rtm->rtm_flags = fi->fib_flags; 937 rtm->rtm_flags = fi->fib_flags;
937 rtm->rtm_scope = fi->fib_scope; 938 rtm->rtm_scope = fi->fib_scope;
938 rtm->rtm_protocol = fi->fib_protocol; 939 rtm->rtm_protocol = fi->fib_protocol;
939 940
940 if (rtm->rtm_dst_len) 941 if (rtm->rtm_dst_len &&
941 NLA_PUT_BE32(skb, RTA_DST, dst); 942 nla_put_be32(skb, RTA_DST, dst))
942 943 goto nla_put_failure;
943 if (fi->fib_priority) 944 if (fi->fib_priority &&
944 NLA_PUT_U32(skb, RTA_PRIORITY, fi->fib_priority); 945 nla_put_u32(skb, RTA_PRIORITY, fi->fib_priority))
945 946 goto nla_put_failure;
946 if (rtnetlink_put_metrics(skb, fi->fib_metrics) < 0) 947 if (rtnetlink_put_metrics(skb, fi->fib_metrics) < 0)
947 goto nla_put_failure; 948 goto nla_put_failure;
948 949
949 if (fi->fib_prefsrc) 950 if (fi->fib_prefsrc &&
950 NLA_PUT_BE32(skb, RTA_PREFSRC, fi->fib_prefsrc); 951 nla_put_be32(skb, RTA_PREFSRC, fi->fib_prefsrc))
951 952 goto nla_put_failure;
952 if (fi->fib_nhs == 1) { 953 if (fi->fib_nhs == 1) {
953 if (fi->fib_nh->nh_gw) 954 if (fi->fib_nh->nh_gw &&
954 NLA_PUT_BE32(skb, RTA_GATEWAY, fi->fib_nh->nh_gw); 955 nla_put_be32(skb, RTA_GATEWAY, fi->fib_nh->nh_gw))
955 956 goto nla_put_failure;
956 if (fi->fib_nh->nh_oif) 957 if (fi->fib_nh->nh_oif &&
957 NLA_PUT_U32(skb, RTA_OIF, fi->fib_nh->nh_oif); 958 nla_put_u32(skb, RTA_OIF, fi->fib_nh->nh_oif))
959 goto nla_put_failure;
958#ifdef CONFIG_IP_ROUTE_CLASSID 960#ifdef CONFIG_IP_ROUTE_CLASSID
959 if (fi->fib_nh[0].nh_tclassid) 961 if (fi->fib_nh[0].nh_tclassid &&
960 NLA_PUT_U32(skb, RTA_FLOW, fi->fib_nh[0].nh_tclassid); 962 nla_put_u32(skb, RTA_FLOW, fi->fib_nh[0].nh_tclassid))
963 goto nla_put_failure;
961#endif 964#endif
962 } 965 }
963#ifdef CONFIG_IP_ROUTE_MULTIPATH 966#ifdef CONFIG_IP_ROUTE_MULTIPATH
@@ -978,11 +981,13 @@ int fib_dump_info(struct sk_buff *skb, u32 pid, u32 seq, int event,
978 rtnh->rtnh_hops = nh->nh_weight - 1; 981 rtnh->rtnh_hops = nh->nh_weight - 1;
979 rtnh->rtnh_ifindex = nh->nh_oif; 982 rtnh->rtnh_ifindex = nh->nh_oif;
980 983
981 if (nh->nh_gw) 984 if (nh->nh_gw &&
982 NLA_PUT_BE32(skb, RTA_GATEWAY, nh->nh_gw); 985 nla_put_be32(skb, RTA_GATEWAY, nh->nh_gw))
986 goto nla_put_failure;
983#ifdef CONFIG_IP_ROUTE_CLASSID 987#ifdef CONFIG_IP_ROUTE_CLASSID
984 if (nh->nh_tclassid) 988 if (nh->nh_tclassid &&
985 NLA_PUT_U32(skb, RTA_FLOW, nh->nh_tclassid); 989 nla_put_u32(skb, RTA_FLOW, nh->nh_tclassid))
990 goto nla_put_failure;
986#endif 991#endif
987 /* length of rtnetlink header + attributes */ 992 /* length of rtnetlink header + attributes */
988 rtnh->rtnh_len = nlmsg_get_pos(skb) - (void *) rtnh; 993 rtnh->rtnh_len = nlmsg_get_pos(skb) - (void *) rtnh;
diff --git a/net/ipv4/igmp.c b/net/ipv4/igmp.c
index 5dfecfd7d5e9..ceaac24ecdca 100644
--- a/net/ipv4/igmp.c
+++ b/net/ipv4/igmp.c
@@ -774,7 +774,7 @@ static int igmp_xmarksources(struct ip_mc_list *pmc, int nsrcs, __be32 *srcs)
774 if (psf->sf_count[MCAST_INCLUDE] || 774 if (psf->sf_count[MCAST_INCLUDE] ||
775 pmc->sfcount[MCAST_EXCLUDE] != 775 pmc->sfcount[MCAST_EXCLUDE] !=
776 psf->sf_count[MCAST_EXCLUDE]) 776 psf->sf_count[MCAST_EXCLUDE])
777 continue; 777 break;
778 if (srcs[i] == psf->sf_inaddr) { 778 if (srcs[i] == psf->sf_inaddr) {
779 scount++; 779 scount++;
780 break; 780 break;
diff --git a/net/ipv4/ip_gre.c b/net/ipv4/ip_gre.c
index b57532d4742c..02d07c6f630f 100644
--- a/net/ipv4/ip_gre.c
+++ b/net/ipv4/ip_gre.c
@@ -1654,17 +1654,18 @@ static int ipgre_fill_info(struct sk_buff *skb, const struct net_device *dev)
1654 struct ip_tunnel *t = netdev_priv(dev); 1654 struct ip_tunnel *t = netdev_priv(dev);
1655 struct ip_tunnel_parm *p = &t->parms; 1655 struct ip_tunnel_parm *p = &t->parms;
1656 1656
1657 NLA_PUT_U32(skb, IFLA_GRE_LINK, p->link); 1657 if (nla_put_u32(skb, IFLA_GRE_LINK, p->link) ||
1658 NLA_PUT_BE16(skb, IFLA_GRE_IFLAGS, p->i_flags); 1658 nla_put_be16(skb, IFLA_GRE_IFLAGS, p->i_flags) ||
1659 NLA_PUT_BE16(skb, IFLA_GRE_OFLAGS, p->o_flags); 1659 nla_put_be16(skb, IFLA_GRE_OFLAGS, p->o_flags) ||
1660 NLA_PUT_BE32(skb, IFLA_GRE_IKEY, p->i_key); 1660 nla_put_be32(skb, IFLA_GRE_IKEY, p->i_key) ||
1661 NLA_PUT_BE32(skb, IFLA_GRE_OKEY, p->o_key); 1661 nla_put_be32(skb, IFLA_GRE_OKEY, p->o_key) ||
1662 NLA_PUT_BE32(skb, IFLA_GRE_LOCAL, p->iph.saddr); 1662 nla_put_be32(skb, IFLA_GRE_LOCAL, p->iph.saddr) ||
1663 NLA_PUT_BE32(skb, IFLA_GRE_REMOTE, p->iph.daddr); 1663 nla_put_be32(skb, IFLA_GRE_REMOTE, p->iph.daddr) ||
1664 NLA_PUT_U8(skb, IFLA_GRE_TTL, p->iph.ttl); 1664 nla_put_u8(skb, IFLA_GRE_TTL, p->iph.ttl) ||
1665 NLA_PUT_U8(skb, IFLA_GRE_TOS, p->iph.tos); 1665 nla_put_u8(skb, IFLA_GRE_TOS, p->iph.tos) ||
1666 NLA_PUT_U8(skb, IFLA_GRE_PMTUDISC, !!(p->iph.frag_off & htons(IP_DF))); 1666 nla_put_u8(skb, IFLA_GRE_PMTUDISC,
1667 1667 !!(p->iph.frag_off & htons(IP_DF))))
1668 goto nla_put_failure;
1668 return 0; 1669 return 0;
1669 1670
1670nla_put_failure: 1671nla_put_failure:
diff --git a/net/ipv4/ipmr.c b/net/ipv4/ipmr.c
index 960fbfc3e976..5bef604ac0fa 100644
--- a/net/ipv4/ipmr.c
+++ b/net/ipv4/ipmr.c
@@ -2119,15 +2119,16 @@ static int ipmr_fill_mroute(struct mr_table *mrt, struct sk_buff *skb,
2119 rtm->rtm_src_len = 32; 2119 rtm->rtm_src_len = 32;
2120 rtm->rtm_tos = 0; 2120 rtm->rtm_tos = 0;
2121 rtm->rtm_table = mrt->id; 2121 rtm->rtm_table = mrt->id;
2122 NLA_PUT_U32(skb, RTA_TABLE, mrt->id); 2122 if (nla_put_u32(skb, RTA_TABLE, mrt->id))
2123 goto nla_put_failure;
2123 rtm->rtm_type = RTN_MULTICAST; 2124 rtm->rtm_type = RTN_MULTICAST;
2124 rtm->rtm_scope = RT_SCOPE_UNIVERSE; 2125 rtm->rtm_scope = RT_SCOPE_UNIVERSE;
2125 rtm->rtm_protocol = RTPROT_UNSPEC; 2126 rtm->rtm_protocol = RTPROT_UNSPEC;
2126 rtm->rtm_flags = 0; 2127 rtm->rtm_flags = 0;
2127 2128
2128 NLA_PUT_BE32(skb, RTA_SRC, c->mfc_origin); 2129 if (nla_put_be32(skb, RTA_SRC, c->mfc_origin) ||
2129 NLA_PUT_BE32(skb, RTA_DST, c->mfc_mcastgrp); 2130 nla_put_be32(skb, RTA_DST, c->mfc_mcastgrp))
2130 2131 goto nla_put_failure;
2131 if (__ipmr_fill_mroute(mrt, skb, c, rtm) < 0) 2132 if (__ipmr_fill_mroute(mrt, skb, c, rtm) < 0)
2132 goto nla_put_failure; 2133 goto nla_put_failure;
2133 2134
diff --git a/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c b/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c
index de9da21113a1..5c45e30cf788 100644
--- a/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c
+++ b/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c
@@ -303,8 +303,9 @@ getorigdst(struct sock *sk, int optval, void __user *user, int *len)
303static int ipv4_tuple_to_nlattr(struct sk_buff *skb, 303static int ipv4_tuple_to_nlattr(struct sk_buff *skb,
304 const struct nf_conntrack_tuple *tuple) 304 const struct nf_conntrack_tuple *tuple)
305{ 305{
306 NLA_PUT_BE32(skb, CTA_IP_V4_SRC, tuple->src.u3.ip); 306 if (nla_put_be32(skb, CTA_IP_V4_SRC, tuple->src.u3.ip) ||
307 NLA_PUT_BE32(skb, CTA_IP_V4_DST, tuple->dst.u3.ip); 307 nla_put_be32(skb, CTA_IP_V4_DST, tuple->dst.u3.ip))
308 goto nla_put_failure;
308 return 0; 309 return 0;
309 310
310nla_put_failure: 311nla_put_failure:
diff --git a/net/ipv4/netfilter/nf_conntrack_proto_icmp.c b/net/ipv4/netfilter/nf_conntrack_proto_icmp.c
index 7cbe9cb261c2..0847e373d33c 100644
--- a/net/ipv4/netfilter/nf_conntrack_proto_icmp.c
+++ b/net/ipv4/netfilter/nf_conntrack_proto_icmp.c
@@ -228,10 +228,10 @@ icmp_error(struct net *net, struct nf_conn *tmpl,
228static int icmp_tuple_to_nlattr(struct sk_buff *skb, 228static int icmp_tuple_to_nlattr(struct sk_buff *skb,
229 const struct nf_conntrack_tuple *t) 229 const struct nf_conntrack_tuple *t)
230{ 230{
231 NLA_PUT_BE16(skb, CTA_PROTO_ICMP_ID, t->src.u.icmp.id); 231 if (nla_put_be16(skb, CTA_PROTO_ICMP_ID, t->src.u.icmp.id) ||
232 NLA_PUT_U8(skb, CTA_PROTO_ICMP_TYPE, t->dst.u.icmp.type); 232 nla_put_u8(skb, CTA_PROTO_ICMP_TYPE, t->dst.u.icmp.type) ||
233 NLA_PUT_U8(skb, CTA_PROTO_ICMP_CODE, t->dst.u.icmp.code); 233 nla_put_u8(skb, CTA_PROTO_ICMP_CODE, t->dst.u.icmp.code))
234 234 goto nla_put_failure;
235 return 0; 235 return 0;
236 236
237nla_put_failure: 237nla_put_failure:
@@ -293,8 +293,8 @@ icmp_timeout_obj_to_nlattr(struct sk_buff *skb, const void *data)
293{ 293{
294 const unsigned int *timeout = data; 294 const unsigned int *timeout = data;
295 295
296 NLA_PUT_BE32(skb, CTA_TIMEOUT_ICMP_TIMEOUT, htonl(*timeout / HZ)); 296 if (nla_put_be32(skb, CTA_TIMEOUT_ICMP_TIMEOUT, htonl(*timeout / HZ)))
297 297 goto nla_put_failure;
298 return 0; 298 return 0;
299 299
300nla_put_failure: 300nla_put_failure:
diff --git a/net/ipv4/route.c b/net/ipv4/route.c
index 167ea10b521a..e4d18f2a305d 100644
--- a/net/ipv4/route.c
+++ b/net/ipv4/route.c
@@ -229,7 +229,7 @@ const __u8 ip_tos2prio[16] = {
229 TC_PRIO_INTERACTIVE_BULK, 229 TC_PRIO_INTERACTIVE_BULK,
230 ECN_OR_COST(INTERACTIVE_BULK) 230 ECN_OR_COST(INTERACTIVE_BULK)
231}; 231};
232 232EXPORT_SYMBOL(ip_tos2prio);
233 233
234/* 234/*
235 * Route cache. 235 * Route cache.
@@ -2972,7 +2972,8 @@ static int rt_fill_info(struct net *net,
2972 r->rtm_src_len = 0; 2972 r->rtm_src_len = 0;
2973 r->rtm_tos = rt->rt_key_tos; 2973 r->rtm_tos = rt->rt_key_tos;
2974 r->rtm_table = RT_TABLE_MAIN; 2974 r->rtm_table = RT_TABLE_MAIN;
2975 NLA_PUT_U32(skb, RTA_TABLE, RT_TABLE_MAIN); 2975 if (nla_put_u32(skb, RTA_TABLE, RT_TABLE_MAIN))
2976 goto nla_put_failure;
2976 r->rtm_type = rt->rt_type; 2977 r->rtm_type = rt->rt_type;
2977 r->rtm_scope = RT_SCOPE_UNIVERSE; 2978 r->rtm_scope = RT_SCOPE_UNIVERSE;
2978 r->rtm_protocol = RTPROT_UNSPEC; 2979 r->rtm_protocol = RTPROT_UNSPEC;
@@ -2980,31 +2981,38 @@ static int rt_fill_info(struct net *net,
2980 if (rt->rt_flags & RTCF_NOTIFY) 2981 if (rt->rt_flags & RTCF_NOTIFY)
2981 r->rtm_flags |= RTM_F_NOTIFY; 2982 r->rtm_flags |= RTM_F_NOTIFY;
2982 2983
2983 NLA_PUT_BE32(skb, RTA_DST, rt->rt_dst); 2984 if (nla_put_be32(skb, RTA_DST, rt->rt_dst))
2984 2985 goto nla_put_failure;
2985 if (rt->rt_key_src) { 2986 if (rt->rt_key_src) {
2986 r->rtm_src_len = 32; 2987 r->rtm_src_len = 32;
2987 NLA_PUT_BE32(skb, RTA_SRC, rt->rt_key_src); 2988 if (nla_put_be32(skb, RTA_SRC, rt->rt_key_src))
2989 goto nla_put_failure;
2988 } 2990 }
2989 if (rt->dst.dev) 2991 if (rt->dst.dev &&
2990 NLA_PUT_U32(skb, RTA_OIF, rt->dst.dev->ifindex); 2992 nla_put_u32(skb, RTA_OIF, rt->dst.dev->ifindex))
2993 goto nla_put_failure;
2991#ifdef CONFIG_IP_ROUTE_CLASSID 2994#ifdef CONFIG_IP_ROUTE_CLASSID
2992 if (rt->dst.tclassid) 2995 if (rt->dst.tclassid &&
2993 NLA_PUT_U32(skb, RTA_FLOW, rt->dst.tclassid); 2996 nla_put_u32(skb, RTA_FLOW, rt->dst.tclassid))
2997 goto nla_put_failure;
2994#endif 2998#endif
2995 if (rt_is_input_route(rt)) 2999 if (rt_is_input_route(rt)) {
2996 NLA_PUT_BE32(skb, RTA_PREFSRC, rt->rt_spec_dst); 3000 if (nla_put_be32(skb, RTA_PREFSRC, rt->rt_spec_dst))
2997 else if (rt->rt_src != rt->rt_key_src) 3001 goto nla_put_failure;
2998 NLA_PUT_BE32(skb, RTA_PREFSRC, rt->rt_src); 3002 } else if (rt->rt_src != rt->rt_key_src) {
2999 3003 if (nla_put_be32(skb, RTA_PREFSRC, rt->rt_src))
3000 if (rt->rt_dst != rt->rt_gateway) 3004 goto nla_put_failure;
3001 NLA_PUT_BE32(skb, RTA_GATEWAY, rt->rt_gateway); 3005 }
3006 if (rt->rt_dst != rt->rt_gateway &&
3007 nla_put_be32(skb, RTA_GATEWAY, rt->rt_gateway))
3008 goto nla_put_failure;
3002 3009
3003 if (rtnetlink_put_metrics(skb, dst_metrics_ptr(&rt->dst)) < 0) 3010 if (rtnetlink_put_metrics(skb, dst_metrics_ptr(&rt->dst)) < 0)
3004 goto nla_put_failure; 3011 goto nla_put_failure;
3005 3012
3006 if (rt->rt_mark) 3013 if (rt->rt_mark &&
3007 NLA_PUT_BE32(skb, RTA_MARK, rt->rt_mark); 3014 nla_put_be32(skb, RTA_MARK, rt->rt_mark))
3015 goto nla_put_failure;
3008 3016
3009 error = rt->dst.error; 3017 error = rt->dst.error;
3010 if (peer) { 3018 if (peer) {
@@ -3045,7 +3053,8 @@ static int rt_fill_info(struct net *net,
3045 } 3053 }
3046 } else 3054 } else
3047#endif 3055#endif
3048 NLA_PUT_U32(skb, RTA_IIF, rt->rt_iif); 3056 if (nla_put_u32(skb, RTA_IIF, rt->rt_iif))
3057 goto nla_put_failure;
3049 } 3058 }
3050 3059
3051 if (rtnl_put_cacheinfo(skb, &rt->dst, id, ts, tsage, 3060 if (rtnl_put_cacheinfo(skb, &rt->dst, id, ts, tsage,
diff --git a/net/ipv6/addrconf.c b/net/ipv6/addrconf.c
index 6a3bb6077e19..fcd230a6235a 100644
--- a/net/ipv6/addrconf.c
+++ b/net/ipv6/addrconf.c
@@ -336,10 +336,9 @@ void in6_dev_finish_destroy(struct inet6_dev *idev)
336 snmp6_free_dev(idev); 336 snmp6_free_dev(idev);
337 kfree_rcu(idev, rcu); 337 kfree_rcu(idev, rcu);
338} 338}
339
340EXPORT_SYMBOL(in6_dev_finish_destroy); 339EXPORT_SYMBOL(in6_dev_finish_destroy);
341 340
342static struct inet6_dev * ipv6_add_dev(struct net_device *dev) 341static struct inet6_dev *ipv6_add_dev(struct net_device *dev)
343{ 342{
344 struct inet6_dev *ndev; 343 struct inet6_dev *ndev;
345 344
@@ -441,7 +440,7 @@ static struct inet6_dev * ipv6_add_dev(struct net_device *dev)
441 return ndev; 440 return ndev;
442} 441}
443 442
444static struct inet6_dev * ipv6_find_idev(struct net_device *dev) 443static struct inet6_dev *ipv6_find_idev(struct net_device *dev)
445{ 444{
446 struct inet6_dev *idev; 445 struct inet6_dev *idev;
447 446
@@ -1333,7 +1332,6 @@ int ipv6_chk_prefix(const struct in6_addr *addr, struct net_device *dev)
1333 rcu_read_unlock(); 1332 rcu_read_unlock();
1334 return onlink; 1333 return onlink;
1335} 1334}
1336
1337EXPORT_SYMBOL(ipv6_chk_prefix); 1335EXPORT_SYMBOL(ipv6_chk_prefix);
1338 1336
1339struct inet6_ifaddr *ipv6_get_ifaddr(struct net *net, const struct in6_addr *addr, 1337struct inet6_ifaddr *ipv6_get_ifaddr(struct net *net, const struct in6_addr *addr,
@@ -1523,7 +1521,7 @@ static int addrconf_ifid_arcnet(u8 *eui, struct net_device *dev)
1523 if (dev->addr_len != ARCNET_ALEN) 1521 if (dev->addr_len != ARCNET_ALEN)
1524 return -1; 1522 return -1;
1525 memset(eui, 0, 7); 1523 memset(eui, 0, 7);
1526 eui[7] = *(u8*)dev->dev_addr; 1524 eui[7] = *(u8 *)dev->dev_addr;
1527 return 0; 1525 return 0;
1528} 1526}
1529 1527
@@ -1668,7 +1666,8 @@ out:
1668 in6_dev_put(idev); 1666 in6_dev_put(idev);
1669} 1667}
1670 1668
1671static int __ipv6_try_regen_rndid(struct inet6_dev *idev, struct in6_addr *tmpaddr) { 1669static int __ipv6_try_regen_rndid(struct inet6_dev *idev, struct in6_addr *tmpaddr)
1670{
1672 int ret = 0; 1671 int ret = 0;
1673 1672
1674 if (tmpaddr && memcmp(idev->rndid, &tmpaddr->s6_addr[8], 8) == 0) 1673 if (tmpaddr && memcmp(idev->rndid, &tmpaddr->s6_addr[8], 8) == 0)
@@ -1911,7 +1910,7 @@ void addrconf_prefix_rcv(struct net_device *dev, u8 *opt, int len, bool sllao)
1911 /* Try to figure out our local address for this prefix */ 1910 /* Try to figure out our local address for this prefix */
1912 1911
1913 if (pinfo->autoconf && in6_dev->cnf.autoconf) { 1912 if (pinfo->autoconf && in6_dev->cnf.autoconf) {
1914 struct inet6_ifaddr * ifp; 1913 struct inet6_ifaddr *ifp;
1915 struct in6_addr addr; 1914 struct in6_addr addr;
1916 int create = 0, update_lft = 0; 1915 int create = 0, update_lft = 0;
1917 1916
@@ -2365,9 +2364,9 @@ static void sit_add_v4_addrs(struct inet6_dev *idev)
2365 } 2364 }
2366 2365
2367 for_each_netdev(net, dev) { 2366 for_each_netdev(net, dev) {
2368 struct in_device * in_dev = __in_dev_get_rtnl(dev); 2367 struct in_device *in_dev = __in_dev_get_rtnl(dev);
2369 if (in_dev && (dev->flags & IFF_UP)) { 2368 if (in_dev && (dev->flags & IFF_UP)) {
2370 struct in_ifaddr * ifa; 2369 struct in_ifaddr *ifa;
2371 2370
2372 int flag = scope; 2371 int flag = scope;
2373 2372
@@ -2413,7 +2412,7 @@ static void init_loopback(struct net_device *dev)
2413 2412
2414static void addrconf_add_linklocal(struct inet6_dev *idev, const struct in6_addr *addr) 2413static void addrconf_add_linklocal(struct inet6_dev *idev, const struct in6_addr *addr)
2415{ 2414{
2416 struct inet6_ifaddr * ifp; 2415 struct inet6_ifaddr *ifp;
2417 u32 addr_flags = IFA_F_PERMANENT; 2416 u32 addr_flags = IFA_F_PERMANENT;
2418 2417
2419#ifdef CONFIG_IPV6_OPTIMISTIC_DAD 2418#ifdef CONFIG_IPV6_OPTIMISTIC_DAD
@@ -2434,7 +2433,7 @@ static void addrconf_add_linklocal(struct inet6_dev *idev, const struct in6_addr
2434static void addrconf_dev_config(struct net_device *dev) 2433static void addrconf_dev_config(struct net_device *dev)
2435{ 2434{
2436 struct in6_addr addr; 2435 struct in6_addr addr;
2437 struct inet6_dev * idev; 2436 struct inet6_dev *idev;
2438 2437
2439 ASSERT_RTNL(); 2438 ASSERT_RTNL();
2440 2439
@@ -2570,7 +2569,7 @@ static void addrconf_ip6_tnl_config(struct net_device *dev)
2570} 2569}
2571 2570
2572static int addrconf_notify(struct notifier_block *this, unsigned long event, 2571static int addrconf_notify(struct notifier_block *this, unsigned long event,
2573 void * data) 2572 void *data)
2574{ 2573{
2575 struct net_device *dev = (struct net_device *) data; 2574 struct net_device *dev = (struct net_device *) data;
2576 struct inet6_dev *idev = __in6_dev_get(dev); 2575 struct inet6_dev *idev = __in6_dev_get(dev);
@@ -3794,7 +3793,7 @@ static int inet6_dump_ifacaddr(struct sk_buff *skb, struct netlink_callback *cb)
3794 return inet6_dump_addr(skb, cb, type); 3793 return inet6_dump_addr(skb, cb, type);
3795} 3794}
3796 3795
3797static int inet6_rtm_getaddr(struct sk_buff *in_skb, struct nlmsghdr* nlh, 3796static int inet6_rtm_getaddr(struct sk_buff *in_skb, struct nlmsghdr *nlh,
3798 void *arg) 3797 void *arg)
3799{ 3798{
3800 struct net *net = sock_net(in_skb->sk); 3799 struct net *net = sock_net(in_skb->sk);
@@ -3989,14 +3988,14 @@ static int inet6_fill_ifla6_attrs(struct sk_buff *skb, struct inet6_dev *idev)
3989 struct nlattr *nla; 3988 struct nlattr *nla;
3990 struct ifla_cacheinfo ci; 3989 struct ifla_cacheinfo ci;
3991 3990
3992 NLA_PUT_U32(skb, IFLA_INET6_FLAGS, idev->if_flags); 3991 if (nla_put_u32(skb, IFLA_INET6_FLAGS, idev->if_flags))
3993 3992 goto nla_put_failure;
3994 ci.max_reasm_len = IPV6_MAXPLEN; 3993 ci.max_reasm_len = IPV6_MAXPLEN;
3995 ci.tstamp = cstamp_delta(idev->tstamp); 3994 ci.tstamp = cstamp_delta(idev->tstamp);
3996 ci.reachable_time = jiffies_to_msecs(idev->nd_parms->reachable_time); 3995 ci.reachable_time = jiffies_to_msecs(idev->nd_parms->reachable_time);
3997 ci.retrans_time = jiffies_to_msecs(idev->nd_parms->retrans_time); 3996 ci.retrans_time = jiffies_to_msecs(idev->nd_parms->retrans_time);
3998 NLA_PUT(skb, IFLA_INET6_CACHEINFO, sizeof(ci), &ci); 3997 if (nla_put(skb, IFLA_INET6_CACHEINFO, sizeof(ci), &ci))
3999 3998 goto nla_put_failure;
4000 nla = nla_reserve(skb, IFLA_INET6_CONF, DEVCONF_MAX * sizeof(s32)); 3999 nla = nla_reserve(skb, IFLA_INET6_CONF, DEVCONF_MAX * sizeof(s32));
4001 if (nla == NULL) 4000 if (nla == NULL)
4002 goto nla_put_failure; 4001 goto nla_put_failure;
@@ -4061,15 +4060,13 @@ static int inet6_fill_ifinfo(struct sk_buff *skb, struct inet6_dev *idev,
4061 hdr->ifi_flags = dev_get_flags(dev); 4060 hdr->ifi_flags = dev_get_flags(dev);
4062 hdr->ifi_change = 0; 4061 hdr->ifi_change = 0;
4063 4062
4064 NLA_PUT_STRING(skb, IFLA_IFNAME, dev->name); 4063 if (nla_put_string(skb, IFLA_IFNAME, dev->name) ||
4065 4064 (dev->addr_len &&
4066 if (dev->addr_len) 4065 nla_put(skb, IFLA_ADDRESS, dev->addr_len, dev->dev_addr)) ||
4067 NLA_PUT(skb, IFLA_ADDRESS, dev->addr_len, dev->dev_addr); 4066 nla_put_u32(skb, IFLA_MTU, dev->mtu) ||
4068 4067 (dev->ifindex != dev->iflink &&
4069 NLA_PUT_U32(skb, IFLA_MTU, dev->mtu); 4068 nla_put_u32(skb, IFLA_LINK, dev->iflink)))
4070 if (dev->ifindex != dev->iflink) 4069 goto nla_put_failure;
4071 NLA_PUT_U32(skb, IFLA_LINK, dev->iflink);
4072
4073 protoinfo = nla_nest_start(skb, IFLA_PROTINFO); 4070 protoinfo = nla_nest_start(skb, IFLA_PROTINFO);
4074 if (protoinfo == NULL) 4071 if (protoinfo == NULL)
4075 goto nla_put_failure; 4072 goto nla_put_failure;
@@ -4182,12 +4179,12 @@ static int inet6_fill_prefix(struct sk_buff *skb, struct inet6_dev *idev,
4182 if (pinfo->autoconf) 4179 if (pinfo->autoconf)
4183 pmsg->prefix_flags |= IF_PREFIX_AUTOCONF; 4180 pmsg->prefix_flags |= IF_PREFIX_AUTOCONF;
4184 4181
4185 NLA_PUT(skb, PREFIX_ADDRESS, sizeof(pinfo->prefix), &pinfo->prefix); 4182 if (nla_put(skb, PREFIX_ADDRESS, sizeof(pinfo->prefix), &pinfo->prefix))
4186 4183 goto nla_put_failure;
4187 ci.preferred_time = ntohl(pinfo->prefered); 4184 ci.preferred_time = ntohl(pinfo->prefered);
4188 ci.valid_time = ntohl(pinfo->valid); 4185 ci.valid_time = ntohl(pinfo->valid);
4189 NLA_PUT(skb, PREFIX_CACHEINFO, sizeof(ci), &ci); 4186 if (nla_put(skb, PREFIX_CACHEINFO, sizeof(ci), &ci))
4190 4187 goto nla_put_failure;
4191 return nlmsg_end(skb, nlh); 4188 return nlmsg_end(skb, nlh);
4192 4189
4193nla_put_failure: 4190nla_put_failure:
diff --git a/net/ipv6/addrconf_core.c b/net/ipv6/addrconf_core.c
index 399287e595d7..7981bde57575 100644
--- a/net/ipv6/addrconf_core.c
+++ b/net/ipv6/addrconf_core.c
@@ -10,7 +10,7 @@
10 10
11static inline unsigned ipv6_addr_scope2type(unsigned scope) 11static inline unsigned ipv6_addr_scope2type(unsigned scope)
12{ 12{
13 switch(scope) { 13 switch (scope) {
14 case IPV6_ADDR_SCOPE_NODELOCAL: 14 case IPV6_ADDR_SCOPE_NODELOCAL:
15 return (IPV6_ADDR_SCOPE_TYPE(IPV6_ADDR_SCOPE_NODELOCAL) | 15 return (IPV6_ADDR_SCOPE_TYPE(IPV6_ADDR_SCOPE_NODELOCAL) |
16 IPV6_ADDR_LOOPBACK); 16 IPV6_ADDR_LOOPBACK);
diff --git a/net/ipv6/datagram.c b/net/ipv6/datagram.c
index 76832c8dc89d..f6210d6fd7d8 100644
--- a/net/ipv6/datagram.c
+++ b/net/ipv6/datagram.c
@@ -98,7 +98,7 @@ int ip6_datagram_connect(struct sock *sk, struct sockaddr *uaddr, int addr_len)
98 sin.sin_port = usin->sin6_port; 98 sin.sin_port = usin->sin6_port;
99 99
100 err = ip4_datagram_connect(sk, 100 err = ip4_datagram_connect(sk,
101 (struct sockaddr*) &sin, 101 (struct sockaddr *) &sin,
102 sizeof(sin)); 102 sizeof(sin));
103 103
104ipv4_connected: 104ipv4_connected:
@@ -518,7 +518,7 @@ int datagram_recv_ctl(struct sock *sk, struct msghdr *msg, struct sk_buff *skb)
518 unsigned len; 518 unsigned len;
519 u8 *ptr = nh + off; 519 u8 *ptr = nh + off;
520 520
521 switch(nexthdr) { 521 switch (nexthdr) {
522 case IPPROTO_DSTOPTS: 522 case IPPROTO_DSTOPTS:
523 nexthdr = ptr[0]; 523 nexthdr = ptr[0];
524 len = (ptr[1] + 1) << 3; 524 len = (ptr[1] + 1) << 3;
@@ -827,9 +827,8 @@ int datagram_send_ctl(struct net *net, struct sock *sk,
827 int tc; 827 int tc;
828 828
829 err = -EINVAL; 829 err = -EINVAL;
830 if (cmsg->cmsg_len != CMSG_LEN(sizeof(int))) { 830 if (cmsg->cmsg_len != CMSG_LEN(sizeof(int)))
831 goto exit_f; 831 goto exit_f;
832 }
833 832
834 tc = *(int *)CMSG_DATA(cmsg); 833 tc = *(int *)CMSG_DATA(cmsg);
835 if (tc < -1 || tc > 0xff) 834 if (tc < -1 || tc > 0xff)
@@ -846,9 +845,8 @@ int datagram_send_ctl(struct net *net, struct sock *sk,
846 int df; 845 int df;
847 846
848 err = -EINVAL; 847 err = -EINVAL;
849 if (cmsg->cmsg_len != CMSG_LEN(sizeof(int))) { 848 if (cmsg->cmsg_len != CMSG_LEN(sizeof(int)))
850 goto exit_f; 849 goto exit_f;
851 }
852 850
853 df = *(int *)CMSG_DATA(cmsg); 851 df = *(int *)CMSG_DATA(cmsg);
854 if (df < 0 || df > 1) 852 if (df < 0 || df > 1)
diff --git a/net/ipv6/exthdrs.c b/net/ipv6/exthdrs.c
index 3d641b6e9b09..c486b8e1817f 100644
--- a/net/ipv6/exthdrs.c
+++ b/net/ipv6/exthdrs.c
@@ -722,7 +722,6 @@ void ipv6_push_nfrag_opts(struct sk_buff *skb, struct ipv6_txoptions *opt,
722 if (opt->hopopt) 722 if (opt->hopopt)
723 ipv6_push_exthdr(skb, proto, NEXTHDR_HOP, opt->hopopt); 723 ipv6_push_exthdr(skb, proto, NEXTHDR_HOP, opt->hopopt);
724} 724}
725
726EXPORT_SYMBOL(ipv6_push_nfrag_opts); 725EXPORT_SYMBOL(ipv6_push_nfrag_opts);
727 726
728void ipv6_push_frag_opts(struct sk_buff *skb, struct ipv6_txoptions *opt, u8 *proto) 727void ipv6_push_frag_opts(struct sk_buff *skb, struct ipv6_txoptions *opt, u8 *proto)
@@ -738,20 +737,19 @@ ipv6_dup_options(struct sock *sk, struct ipv6_txoptions *opt)
738 737
739 opt2 = sock_kmalloc(sk, opt->tot_len, GFP_ATOMIC); 738 opt2 = sock_kmalloc(sk, opt->tot_len, GFP_ATOMIC);
740 if (opt2) { 739 if (opt2) {
741 long dif = (char*)opt2 - (char*)opt; 740 long dif = (char *)opt2 - (char *)opt;
742 memcpy(opt2, opt, opt->tot_len); 741 memcpy(opt2, opt, opt->tot_len);
743 if (opt2->hopopt) 742 if (opt2->hopopt)
744 *((char**)&opt2->hopopt) += dif; 743 *((char **)&opt2->hopopt) += dif;
745 if (opt2->dst0opt) 744 if (opt2->dst0opt)
746 *((char**)&opt2->dst0opt) += dif; 745 *((char **)&opt2->dst0opt) += dif;
747 if (opt2->dst1opt) 746 if (opt2->dst1opt)
748 *((char**)&opt2->dst1opt) += dif; 747 *((char **)&opt2->dst1opt) += dif;
749 if (opt2->srcrt) 748 if (opt2->srcrt)
750 *((char**)&opt2->srcrt) += dif; 749 *((char **)&opt2->srcrt) += dif;
751 } 750 }
752 return opt2; 751 return opt2;
753} 752}
754
755EXPORT_SYMBOL_GPL(ipv6_dup_options); 753EXPORT_SYMBOL_GPL(ipv6_dup_options);
756 754
757static int ipv6_renew_option(void *ohdr, 755static int ipv6_renew_option(void *ohdr,
@@ -892,5 +890,4 @@ struct in6_addr *fl6_update_dst(struct flowi6 *fl6,
892 fl6->daddr = *((struct rt0_hdr *)opt->srcrt)->addr; 890 fl6->daddr = *((struct rt0_hdr *)opt->srcrt)->addr;
893 return orig; 891 return orig;
894} 892}
895
896EXPORT_SYMBOL_GPL(fl6_update_dst); 893EXPORT_SYMBOL_GPL(fl6_update_dst);
diff --git a/net/ipv6/exthdrs_core.c b/net/ipv6/exthdrs_core.c
index 72957f4a7c6c..7b1a884634d5 100644
--- a/net/ipv6/exthdrs_core.c
+++ b/net/ipv6/exthdrs_core.c
@@ -21,6 +21,7 @@ int ipv6_ext_hdr(u8 nexthdr)
21 (nexthdr == NEXTHDR_NONE) || 21 (nexthdr == NEXTHDR_NONE) ||
22 (nexthdr == NEXTHDR_DEST); 22 (nexthdr == NEXTHDR_DEST);
23} 23}
24EXPORT_SYMBOL(ipv6_ext_hdr);
24 25
25/* 26/*
26 * Skip any extension headers. This is used by the ICMP module. 27 * Skip any extension headers. This is used by the ICMP module.
@@ -109,6 +110,4 @@ int ipv6_skip_exthdr(const struct sk_buff *skb, int start, u8 *nexthdrp,
109 *nexthdrp = nexthdr; 110 *nexthdrp = nexthdr;
110 return start; 111 return start;
111} 112}
112
113EXPORT_SYMBOL(ipv6_ext_hdr);
114EXPORT_SYMBOL(ipv6_skip_exthdr); 113EXPORT_SYMBOL(ipv6_skip_exthdr);
diff --git a/net/ipv6/fib6_rules.c b/net/ipv6/fib6_rules.c
index b6c573152067..0ff1cfd55bc4 100644
--- a/net/ipv6/fib6_rules.c
+++ b/net/ipv6/fib6_rules.c
@@ -22,8 +22,7 @@
22#include <net/ip6_route.h> 22#include <net/ip6_route.h>
23#include <net/netlink.h> 23#include <net/netlink.h>
24 24
25struct fib6_rule 25struct fib6_rule {
26{
27 struct fib_rule common; 26 struct fib_rule common;
28 struct rt6key src; 27 struct rt6key src;
29 struct rt6key dst; 28 struct rt6key dst;
@@ -215,14 +214,13 @@ static int fib6_rule_fill(struct fib_rule *rule, struct sk_buff *skb,
215 frh->src_len = rule6->src.plen; 214 frh->src_len = rule6->src.plen;
216 frh->tos = rule6->tclass; 215 frh->tos = rule6->tclass;
217 216
218 if (rule6->dst.plen) 217 if ((rule6->dst.plen &&
219 NLA_PUT(skb, FRA_DST, sizeof(struct in6_addr), 218 nla_put(skb, FRA_DST, sizeof(struct in6_addr),
220 &rule6->dst.addr); 219 &rule6->dst.addr)) ||
221 220 (rule6->src.plen &&
222 if (rule6->src.plen) 221 nla_put(skb, FRA_SRC, sizeof(struct in6_addr),
223 NLA_PUT(skb, FRA_SRC, sizeof(struct in6_addr), 222 &rule6->src.addr)))
224 &rule6->src.addr); 223 goto nla_put_failure;
225
226 return 0; 224 return 0;
227 225
228nla_put_failure: 226nla_put_failure:
diff --git a/net/ipv6/icmp.c b/net/ipv6/icmp.c
index 27ac95a63429..cc079d8d4681 100644
--- a/net/ipv6/icmp.c
+++ b/net/ipv6/icmp.c
@@ -498,7 +498,7 @@ void icmpv6_send(struct sk_buff *skb, u8 type, u8 code, __u32 info)
498 err = ip6_append_data(sk, icmpv6_getfrag, &msg, 498 err = ip6_append_data(sk, icmpv6_getfrag, &msg,
499 len + sizeof(struct icmp6hdr), 499 len + sizeof(struct icmp6hdr),
500 sizeof(struct icmp6hdr), hlimit, 500 sizeof(struct icmp6hdr), hlimit,
501 np->tclass, NULL, &fl6, (struct rt6_info*)dst, 501 np->tclass, NULL, &fl6, (struct rt6_info *)dst,
502 MSG_DONTWAIT, np->dontfrag); 502 MSG_DONTWAIT, np->dontfrag);
503 if (err) { 503 if (err) {
504 ICMP6_INC_STATS_BH(net, idev, ICMP6_MIB_OUTERRORS); 504 ICMP6_INC_STATS_BH(net, idev, ICMP6_MIB_OUTERRORS);
@@ -579,7 +579,7 @@ static void icmpv6_echo_reply(struct sk_buff *skb)
579 579
580 err = ip6_append_data(sk, icmpv6_getfrag, &msg, skb->len + sizeof(struct icmp6hdr), 580 err = ip6_append_data(sk, icmpv6_getfrag, &msg, skb->len + sizeof(struct icmp6hdr),
581 sizeof(struct icmp6hdr), hlimit, np->tclass, NULL, &fl6, 581 sizeof(struct icmp6hdr), hlimit, np->tclass, NULL, &fl6,
582 (struct rt6_info*)dst, MSG_DONTWAIT, 582 (struct rt6_info *)dst, MSG_DONTWAIT,
583 np->dontfrag); 583 np->dontfrag);
584 584
585 if (err) { 585 if (err) {
@@ -950,7 +950,6 @@ int icmpv6_err_convert(u8 type, u8 code, int *err)
950 950
951 return fatal; 951 return fatal;
952} 952}
953
954EXPORT_SYMBOL(icmpv6_err_convert); 953EXPORT_SYMBOL(icmpv6_err_convert);
955 954
956#ifdef CONFIG_SYSCTL 955#ifdef CONFIG_SYSCTL
diff --git a/net/ipv6/ip6mr.c b/net/ipv6/ip6mr.c
index 8110362e0af5..efc0098b59dd 100644
--- a/net/ipv6/ip6mr.c
+++ b/net/ipv6/ip6mr.c
@@ -2215,14 +2215,15 @@ static int ip6mr_fill_mroute(struct mr6_table *mrt, struct sk_buff *skb,
2215 rtm->rtm_src_len = 128; 2215 rtm->rtm_src_len = 128;
2216 rtm->rtm_tos = 0; 2216 rtm->rtm_tos = 0;
2217 rtm->rtm_table = mrt->id; 2217 rtm->rtm_table = mrt->id;
2218 NLA_PUT_U32(skb, RTA_TABLE, mrt->id); 2218 if (nla_put_u32(skb, RTA_TABLE, mrt->id))
2219 goto nla_put_failure;
2219 rtm->rtm_scope = RT_SCOPE_UNIVERSE; 2220 rtm->rtm_scope = RT_SCOPE_UNIVERSE;
2220 rtm->rtm_protocol = RTPROT_UNSPEC; 2221 rtm->rtm_protocol = RTPROT_UNSPEC;
2221 rtm->rtm_flags = 0; 2222 rtm->rtm_flags = 0;
2222 2223
2223 NLA_PUT(skb, RTA_SRC, 16, &c->mf6c_origin); 2224 if (nla_put(skb, RTA_SRC, 16, &c->mf6c_origin) ||
2224 NLA_PUT(skb, RTA_DST, 16, &c->mf6c_mcastgrp); 2225 nla_put(skb, RTA_DST, 16, &c->mf6c_mcastgrp))
2225 2226 goto nla_put_failure;
2226 if (__ip6mr_fill_mroute(mrt, skb, c, rtm) < 0) 2227 if (__ip6mr_fill_mroute(mrt, skb, c, rtm) < 0)
2227 goto nla_put_failure; 2228 goto nla_put_failure;
2228 2229
diff --git a/net/ipv6/mcast.c b/net/ipv6/mcast.c
index b2869cab2092..7dfb89f2bae5 100644
--- a/net/ipv6/mcast.c
+++ b/net/ipv6/mcast.c
@@ -1061,7 +1061,7 @@ static int mld_xmarksources(struct ifmcaddr6 *pmc, int nsrcs,
1061 if (psf->sf_count[MCAST_INCLUDE] || 1061 if (psf->sf_count[MCAST_INCLUDE] ||
1062 pmc->mca_sfcount[MCAST_EXCLUDE] != 1062 pmc->mca_sfcount[MCAST_EXCLUDE] !=
1063 psf->sf_count[MCAST_EXCLUDE]) 1063 psf->sf_count[MCAST_EXCLUDE])
1064 continue; 1064 break;
1065 if (ipv6_addr_equal(&srcs[i], &psf->sf_addr)) { 1065 if (ipv6_addr_equal(&srcs[i], &psf->sf_addr)) {
1066 scount++; 1066 scount++;
1067 break; 1067 break;
diff --git a/net/ipv6/ndisc.c b/net/ipv6/ndisc.c
index 3dcdb81ec3e8..1d6fb0c94da1 100644
--- a/net/ipv6/ndisc.c
+++ b/net/ipv6/ndisc.c
@@ -1099,8 +1099,9 @@ static void ndisc_ra_useropt(struct sk_buff *ra, struct nd_opt_hdr *opt)
1099 1099
1100 memcpy(ndmsg + 1, opt, opt->nd_opt_len << 3); 1100 memcpy(ndmsg + 1, opt, opt->nd_opt_len << 3);
1101 1101
1102 NLA_PUT(skb, NDUSEROPT_SRCADDR, sizeof(struct in6_addr), 1102 if (nla_put(skb, NDUSEROPT_SRCADDR, sizeof(struct in6_addr),
1103 &ipv6_hdr(ra)->saddr); 1103 &ipv6_hdr(ra)->saddr))
1104 goto nla_put_failure;
1104 nlmsg_end(skb, nlh); 1105 nlmsg_end(skb, nlh);
1105 1106
1106 rtnl_notify(skb, net, 0, RTNLGRP_ND_USEROPT, NULL, GFP_ATOMIC); 1107 rtnl_notify(skb, net, 0, RTNLGRP_ND_USEROPT, NULL, GFP_ATOMIC);
diff --git a/net/ipv6/netfilter/nf_conntrack_l3proto_ipv6.c b/net/ipv6/netfilter/nf_conntrack_l3proto_ipv6.c
index 4111050a9fc5..fe925e492520 100644
--- a/net/ipv6/netfilter/nf_conntrack_l3proto_ipv6.c
+++ b/net/ipv6/netfilter/nf_conntrack_l3proto_ipv6.c
@@ -278,10 +278,11 @@ static struct nf_hook_ops ipv6_conntrack_ops[] __read_mostly = {
278static int ipv6_tuple_to_nlattr(struct sk_buff *skb, 278static int ipv6_tuple_to_nlattr(struct sk_buff *skb,
279 const struct nf_conntrack_tuple *tuple) 279 const struct nf_conntrack_tuple *tuple)
280{ 280{
281 NLA_PUT(skb, CTA_IP_V6_SRC, sizeof(u_int32_t) * 4, 281 if (nla_put(skb, CTA_IP_V6_SRC, sizeof(u_int32_t) * 4,
282 &tuple->src.u3.ip6); 282 &tuple->src.u3.ip6) ||
283 NLA_PUT(skb, CTA_IP_V6_DST, sizeof(u_int32_t) * 4, 283 nla_put(skb, CTA_IP_V6_DST, sizeof(u_int32_t) * 4,
284 &tuple->dst.u3.ip6); 284 &tuple->dst.u3.ip6))
285 goto nla_put_failure;
285 return 0; 286 return 0;
286 287
287nla_put_failure: 288nla_put_failure:
diff --git a/net/ipv6/netfilter/nf_conntrack_proto_icmpv6.c b/net/ipv6/netfilter/nf_conntrack_proto_icmpv6.c
index 92cc9f2931ae..3e81904fbbcd 100644
--- a/net/ipv6/netfilter/nf_conntrack_proto_icmpv6.c
+++ b/net/ipv6/netfilter/nf_conntrack_proto_icmpv6.c
@@ -234,10 +234,10 @@ icmpv6_error(struct net *net, struct nf_conn *tmpl,
234static int icmpv6_tuple_to_nlattr(struct sk_buff *skb, 234static int icmpv6_tuple_to_nlattr(struct sk_buff *skb,
235 const struct nf_conntrack_tuple *t) 235 const struct nf_conntrack_tuple *t)
236{ 236{
237 NLA_PUT_BE16(skb, CTA_PROTO_ICMPV6_ID, t->src.u.icmp.id); 237 if (nla_put_be16(skb, CTA_PROTO_ICMPV6_ID, t->src.u.icmp.id) ||
238 NLA_PUT_U8(skb, CTA_PROTO_ICMPV6_TYPE, t->dst.u.icmp.type); 238 nla_put_u8(skb, CTA_PROTO_ICMPV6_TYPE, t->dst.u.icmp.type) ||
239 NLA_PUT_U8(skb, CTA_PROTO_ICMPV6_CODE, t->dst.u.icmp.code); 239 nla_put_u8(skb, CTA_PROTO_ICMPV6_CODE, t->dst.u.icmp.code))
240 240 goto nla_put_failure;
241 return 0; 241 return 0;
242 242
243nla_put_failure: 243nla_put_failure:
@@ -300,8 +300,8 @@ icmpv6_timeout_obj_to_nlattr(struct sk_buff *skb, const void *data)
300{ 300{
301 const unsigned int *timeout = data; 301 const unsigned int *timeout = data;
302 302
303 NLA_PUT_BE32(skb, CTA_TIMEOUT_ICMPV6_TIMEOUT, htonl(*timeout / HZ)); 303 if (nla_put_be32(skb, CTA_TIMEOUT_ICMPV6_TIMEOUT, htonl(*timeout / HZ)))
304 304 goto nla_put_failure;
305 return 0; 305 return 0;
306 306
307nla_put_failure: 307nla_put_failure:
diff --git a/net/ipv6/route.c b/net/ipv6/route.c
index 3992e26a6039..8c5df6f3a2de 100644
--- a/net/ipv6/route.c
+++ b/net/ipv6/route.c
@@ -2413,7 +2413,8 @@ static int rt6_fill_node(struct net *net,
2413 else 2413 else
2414 table = RT6_TABLE_UNSPEC; 2414 table = RT6_TABLE_UNSPEC;
2415 rtm->rtm_table = table; 2415 rtm->rtm_table = table;
2416 NLA_PUT_U32(skb, RTA_TABLE, table); 2416 if (nla_put_u32(skb, RTA_TABLE, table))
2417 goto nla_put_failure;
2417 if (rt->rt6i_flags & RTF_REJECT) 2418 if (rt->rt6i_flags & RTF_REJECT)
2418 rtm->rtm_type = RTN_UNREACHABLE; 2419 rtm->rtm_type = RTN_UNREACHABLE;
2419 else if (rt->rt6i_flags & RTF_LOCAL) 2420 else if (rt->rt6i_flags & RTF_LOCAL)
@@ -2436,16 +2437,20 @@ static int rt6_fill_node(struct net *net,
2436 rtm->rtm_flags |= RTM_F_CLONED; 2437 rtm->rtm_flags |= RTM_F_CLONED;
2437 2438
2438 if (dst) { 2439 if (dst) {
2439 NLA_PUT(skb, RTA_DST, 16, dst); 2440 if (nla_put(skb, RTA_DST, 16, dst))
2441 goto nla_put_failure;
2440 rtm->rtm_dst_len = 128; 2442 rtm->rtm_dst_len = 128;
2441 } else if (rtm->rtm_dst_len) 2443 } else if (rtm->rtm_dst_len)
2442 NLA_PUT(skb, RTA_DST, 16, &rt->rt6i_dst.addr); 2444 if (nla_put(skb, RTA_DST, 16, &rt->rt6i_dst.addr))
2445 goto nla_put_failure;
2443#ifdef CONFIG_IPV6_SUBTREES 2446#ifdef CONFIG_IPV6_SUBTREES
2444 if (src) { 2447 if (src) {
2445 NLA_PUT(skb, RTA_SRC, 16, src); 2448 if (nla_put(skb, RTA_SRC, 16, src))
2449 goto nla_put_failure;
2446 rtm->rtm_src_len = 128; 2450 rtm->rtm_src_len = 128;
2447 } else if (rtm->rtm_src_len) 2451 } else if (rtm->rtm_src_len &&
2448 NLA_PUT(skb, RTA_SRC, 16, &rt->rt6i_src.addr); 2452 nla_put(skb, RTA_SRC, 16, &rt->rt6i_src.addr))
2453 goto nla_put_failure;
2449#endif 2454#endif
2450 if (iif) { 2455 if (iif) {
2451#ifdef CONFIG_IPV6_MROUTE 2456#ifdef CONFIG_IPV6_MROUTE
@@ -2463,17 +2468,20 @@ static int rt6_fill_node(struct net *net,
2463 } 2468 }
2464 } else 2469 } else
2465#endif 2470#endif
2466 NLA_PUT_U32(skb, RTA_IIF, iif); 2471 if (nla_put_u32(skb, RTA_IIF, iif))
2472 goto nla_put_failure;
2467 } else if (dst) { 2473 } else if (dst) {
2468 struct in6_addr saddr_buf; 2474 struct in6_addr saddr_buf;
2469 if (ip6_route_get_saddr(net, rt, dst, 0, &saddr_buf) == 0) 2475 if (ip6_route_get_saddr(net, rt, dst, 0, &saddr_buf) == 0 &&
2470 NLA_PUT(skb, RTA_PREFSRC, 16, &saddr_buf); 2476 nla_put(skb, RTA_PREFSRC, 16, &saddr_buf))
2477 goto nla_put_failure;
2471 } 2478 }
2472 2479
2473 if (rt->rt6i_prefsrc.plen) { 2480 if (rt->rt6i_prefsrc.plen) {
2474 struct in6_addr saddr_buf; 2481 struct in6_addr saddr_buf;
2475 saddr_buf = rt->rt6i_prefsrc.addr; 2482 saddr_buf = rt->rt6i_prefsrc.addr;
2476 NLA_PUT(skb, RTA_PREFSRC, 16, &saddr_buf); 2483 if (nla_put(skb, RTA_PREFSRC, 16, &saddr_buf))
2484 goto nla_put_failure;
2477 } 2485 }
2478 2486
2479 if (rtnetlink_put_metrics(skb, dst_metrics_ptr(&rt->dst)) < 0) 2487 if (rtnetlink_put_metrics(skb, dst_metrics_ptr(&rt->dst)) < 0)
@@ -2489,11 +2497,11 @@ static int rt6_fill_node(struct net *net,
2489 } 2497 }
2490 rcu_read_unlock(); 2498 rcu_read_unlock();
2491 2499
2492 if (rt->dst.dev) 2500 if (rt->dst.dev &&
2493 NLA_PUT_U32(skb, RTA_OIF, rt->dst.dev->ifindex); 2501 nla_put_u32(skb, RTA_OIF, rt->dst.dev->ifindex))
2494 2502 goto nla_put_failure;
2495 NLA_PUT_U32(skb, RTA_PRIORITY, rt->rt6i_metric); 2503 if (nla_put_u32(skb, RTA_PRIORITY, rt->rt6i_metric))
2496 2504 goto nla_put_failure;
2497 if (!(rt->rt6i_flags & RTF_EXPIRES)) 2505 if (!(rt->rt6i_flags & RTF_EXPIRES))
2498 expires = 0; 2506 expires = 0;
2499 else if (rt->dst.expires - jiffies < INT_MAX) 2507 else if (rt->dst.expires - jiffies < INT_MAX)
@@ -2598,6 +2606,7 @@ static int inet6_rtm_getroute(struct sk_buff *in_skb, struct nlmsghdr* nlh, void
2598 2606
2599 skb = alloc_skb(NLMSG_GOODSIZE, GFP_KERNEL); 2607 skb = alloc_skb(NLMSG_GOODSIZE, GFP_KERNEL);
2600 if (!skb) { 2608 if (!skb) {
2609 dst_release(&rt->dst);
2601 err = -ENOBUFS; 2610 err = -ENOBUFS;
2602 goto errout; 2611 goto errout;
2603 } 2612 }
diff --git a/net/ipv6/sit.c b/net/ipv6/sit.c
index c4ffd1743528..f9608db9dcfb 100644
--- a/net/ipv6/sit.c
+++ b/net/ipv6/sit.c
@@ -115,7 +115,7 @@ static struct net_device_stats *ipip6_get_stats(struct net_device *dev)
115/* 115/*
116 * Must be invoked with rcu_read_lock 116 * Must be invoked with rcu_read_lock
117 */ 117 */
118static struct ip_tunnel * ipip6_tunnel_lookup(struct net *net, 118static struct ip_tunnel *ipip6_tunnel_lookup(struct net *net,
119 struct net_device *dev, __be32 remote, __be32 local) 119 struct net_device *dev, __be32 remote, __be32 local)
120{ 120{
121 unsigned int h0 = HASH(remote); 121 unsigned int h0 = HASH(remote);
@@ -691,7 +691,7 @@ static netdev_tx_t ipip6_tunnel_xmit(struct sk_buff *skb,
691 goto tx_error; 691 goto tx_error;
692 } 692 }
693 693
694 addr6 = (const struct in6_addr*)&neigh->primary_key; 694 addr6 = (const struct in6_addr *)&neigh->primary_key;
695 addr_type = ipv6_addr_type(addr6); 695 addr_type = ipv6_addr_type(addr6);
696 696
697 if ((addr_type & IPV6_ADDR_UNICAST) && 697 if ((addr_type & IPV6_ADDR_UNICAST) &&
@@ -721,7 +721,7 @@ static netdev_tx_t ipip6_tunnel_xmit(struct sk_buff *skb,
721 goto tx_error; 721 goto tx_error;
722 } 722 }
723 723
724 addr6 = (const struct in6_addr*)&neigh->primary_key; 724 addr6 = (const struct in6_addr *)&neigh->primary_key;
725 addr_type = ipv6_addr_type(addr6); 725 addr_type = ipv6_addr_type(addr6);
726 726
727 if (addr_type == IPV6_ADDR_ANY) { 727 if (addr_type == IPV6_ADDR_ANY) {
diff --git a/net/l2tp/l2tp_netlink.c b/net/l2tp/l2tp_netlink.c
index 93a41a09458b..bc8c3348f835 100644
--- a/net/l2tp/l2tp_netlink.c
+++ b/net/l2tp/l2tp_netlink.c
@@ -231,24 +231,28 @@ static int l2tp_nl_tunnel_send(struct sk_buff *skb, u32 pid, u32 seq, int flags,
231 if (IS_ERR(hdr)) 231 if (IS_ERR(hdr))
232 return PTR_ERR(hdr); 232 return PTR_ERR(hdr);
233 233
234 NLA_PUT_U8(skb, L2TP_ATTR_PROTO_VERSION, tunnel->version); 234 if (nla_put_u8(skb, L2TP_ATTR_PROTO_VERSION, tunnel->version) ||
235 NLA_PUT_U32(skb, L2TP_ATTR_CONN_ID, tunnel->tunnel_id); 235 nla_put_u32(skb, L2TP_ATTR_CONN_ID, tunnel->tunnel_id) ||
236 NLA_PUT_U32(skb, L2TP_ATTR_PEER_CONN_ID, tunnel->peer_tunnel_id); 236 nla_put_u32(skb, L2TP_ATTR_PEER_CONN_ID, tunnel->peer_tunnel_id) ||
237 NLA_PUT_U32(skb, L2TP_ATTR_DEBUG, tunnel->debug); 237 nla_put_u32(skb, L2TP_ATTR_DEBUG, tunnel->debug) ||
238 NLA_PUT_U16(skb, L2TP_ATTR_ENCAP_TYPE, tunnel->encap); 238 nla_put_u16(skb, L2TP_ATTR_ENCAP_TYPE, tunnel->encap))
239 goto nla_put_failure;
239 240
240 nest = nla_nest_start(skb, L2TP_ATTR_STATS); 241 nest = nla_nest_start(skb, L2TP_ATTR_STATS);
241 if (nest == NULL) 242 if (nest == NULL)
242 goto nla_put_failure; 243 goto nla_put_failure;
243 244
244 NLA_PUT_U64(skb, L2TP_ATTR_TX_PACKETS, tunnel->stats.tx_packets); 245 if (nla_put_u64(skb, L2TP_ATTR_TX_PACKETS, tunnel->stats.tx_packets) ||
245 NLA_PUT_U64(skb, L2TP_ATTR_TX_BYTES, tunnel->stats.tx_bytes); 246 nla_put_u64(skb, L2TP_ATTR_TX_BYTES, tunnel->stats.tx_bytes) ||
246 NLA_PUT_U64(skb, L2TP_ATTR_TX_ERRORS, tunnel->stats.tx_errors); 247 nla_put_u64(skb, L2TP_ATTR_TX_ERRORS, tunnel->stats.tx_errors) ||
247 NLA_PUT_U64(skb, L2TP_ATTR_RX_PACKETS, tunnel->stats.rx_packets); 248 nla_put_u64(skb, L2TP_ATTR_RX_PACKETS, tunnel->stats.rx_packets) ||
248 NLA_PUT_U64(skb, L2TP_ATTR_RX_BYTES, tunnel->stats.rx_bytes); 249 nla_put_u64(skb, L2TP_ATTR_RX_BYTES, tunnel->stats.rx_bytes) ||
249 NLA_PUT_U64(skb, L2TP_ATTR_RX_SEQ_DISCARDS, tunnel->stats.rx_seq_discards); 250 nla_put_u64(skb, L2TP_ATTR_RX_SEQ_DISCARDS,
250 NLA_PUT_U64(skb, L2TP_ATTR_RX_OOS_PACKETS, tunnel->stats.rx_oos_packets); 251 tunnel->stats.rx_seq_discards) ||
251 NLA_PUT_U64(skb, L2TP_ATTR_RX_ERRORS, tunnel->stats.rx_errors); 252 nla_put_u64(skb, L2TP_ATTR_RX_OOS_PACKETS,
253 tunnel->stats.rx_oos_packets) ||
254 nla_put_u64(skb, L2TP_ATTR_RX_ERRORS, tunnel->stats.rx_errors))
255 goto nla_put_failure;
252 nla_nest_end(skb, nest); 256 nla_nest_end(skb, nest);
253 257
254 sk = tunnel->sock; 258 sk = tunnel->sock;
@@ -259,13 +263,16 @@ static int l2tp_nl_tunnel_send(struct sk_buff *skb, u32 pid, u32 seq, int flags,
259 263
260 switch (tunnel->encap) { 264 switch (tunnel->encap) {
261 case L2TP_ENCAPTYPE_UDP: 265 case L2TP_ENCAPTYPE_UDP:
262 NLA_PUT_U16(skb, L2TP_ATTR_UDP_SPORT, ntohs(inet->inet_sport)); 266 if (nla_put_u16(skb, L2TP_ATTR_UDP_SPORT, ntohs(inet->inet_sport)) ||
263 NLA_PUT_U16(skb, L2TP_ATTR_UDP_DPORT, ntohs(inet->inet_dport)); 267 nla_put_u16(skb, L2TP_ATTR_UDP_DPORT, ntohs(inet->inet_dport)) ||
264 NLA_PUT_U8(skb, L2TP_ATTR_UDP_CSUM, (sk->sk_no_check != UDP_CSUM_NOXMIT)); 268 nla_put_u8(skb, L2TP_ATTR_UDP_CSUM,
269 (sk->sk_no_check != UDP_CSUM_NOXMIT)))
270 goto nla_put_failure;
265 /* NOBREAK */ 271 /* NOBREAK */
266 case L2TP_ENCAPTYPE_IP: 272 case L2TP_ENCAPTYPE_IP:
267 NLA_PUT_BE32(skb, L2TP_ATTR_IP_SADDR, inet->inet_saddr); 273 if (nla_put_be32(skb, L2TP_ATTR_IP_SADDR, inet->inet_saddr) ||
268 NLA_PUT_BE32(skb, L2TP_ATTR_IP_DADDR, inet->inet_daddr); 274 nla_put_be32(skb, L2TP_ATTR_IP_DADDR, inet->inet_daddr))
275 goto nla_put_failure;
269 break; 276 break;
270 } 277 }
271 278
@@ -563,43 +570,50 @@ static int l2tp_nl_session_send(struct sk_buff *skb, u32 pid, u32 seq, int flags
563 if (IS_ERR(hdr)) 570 if (IS_ERR(hdr))
564 return PTR_ERR(hdr); 571 return PTR_ERR(hdr);
565 572
566 NLA_PUT_U32(skb, L2TP_ATTR_CONN_ID, tunnel->tunnel_id); 573 if (nla_put_u32(skb, L2TP_ATTR_CONN_ID, tunnel->tunnel_id) ||
567 NLA_PUT_U32(skb, L2TP_ATTR_SESSION_ID, session->session_id); 574 nla_put_u32(skb, L2TP_ATTR_SESSION_ID, session->session_id) ||
568 NLA_PUT_U32(skb, L2TP_ATTR_PEER_CONN_ID, tunnel->peer_tunnel_id); 575 nla_put_u32(skb, L2TP_ATTR_PEER_CONN_ID, tunnel->peer_tunnel_id) ||
569 NLA_PUT_U32(skb, L2TP_ATTR_PEER_SESSION_ID, session->peer_session_id); 576 nla_put_u32(skb, L2TP_ATTR_PEER_SESSION_ID,
570 NLA_PUT_U32(skb, L2TP_ATTR_DEBUG, session->debug); 577 session->peer_session_id) ||
571 NLA_PUT_U16(skb, L2TP_ATTR_PW_TYPE, session->pwtype); 578 nla_put_u32(skb, L2TP_ATTR_DEBUG, session->debug) ||
572 NLA_PUT_U16(skb, L2TP_ATTR_MTU, session->mtu); 579 nla_put_u16(skb, L2TP_ATTR_PW_TYPE, session->pwtype) ||
573 if (session->mru) 580 nla_put_u16(skb, L2TP_ATTR_MTU, session->mtu) ||
574 NLA_PUT_U16(skb, L2TP_ATTR_MRU, session->mru); 581 (session->mru &&
575 582 nla_put_u16(skb, L2TP_ATTR_MRU, session->mru)))
576 if (session->ifname && session->ifname[0]) 583 goto nla_put_failure;
577 NLA_PUT_STRING(skb, L2TP_ATTR_IFNAME, session->ifname); 584
578 if (session->cookie_len) 585 if ((session->ifname && session->ifname[0] &&
579 NLA_PUT(skb, L2TP_ATTR_COOKIE, session->cookie_len, &session->cookie[0]); 586 nla_put_string(skb, L2TP_ATTR_IFNAME, session->ifname)) ||
580 if (session->peer_cookie_len) 587 (session->cookie_len &&
581 NLA_PUT(skb, L2TP_ATTR_PEER_COOKIE, session->peer_cookie_len, &session->peer_cookie[0]); 588 nla_put(skb, L2TP_ATTR_COOKIE, session->cookie_len,
582 NLA_PUT_U8(skb, L2TP_ATTR_RECV_SEQ, session->recv_seq); 589 &session->cookie[0])) ||
583 NLA_PUT_U8(skb, L2TP_ATTR_SEND_SEQ, session->send_seq); 590 (session->peer_cookie_len &&
584 NLA_PUT_U8(skb, L2TP_ATTR_LNS_MODE, session->lns_mode); 591 nla_put(skb, L2TP_ATTR_PEER_COOKIE, session->peer_cookie_len,
592 &session->peer_cookie[0])) ||
593 nla_put_u8(skb, L2TP_ATTR_RECV_SEQ, session->recv_seq) ||
594 nla_put_u8(skb, L2TP_ATTR_SEND_SEQ, session->send_seq) ||
595 nla_put_u8(skb, L2TP_ATTR_LNS_MODE, session->lns_mode) ||
585#ifdef CONFIG_XFRM 596#ifdef CONFIG_XFRM
586 if ((sk) && (sk->sk_policy[0] || sk->sk_policy[1])) 597 (((sk) && (sk->sk_policy[0] || sk->sk_policy[1])) &&
587 NLA_PUT_U8(skb, L2TP_ATTR_USING_IPSEC, 1); 598 nla_put_u8(skb, L2TP_ATTR_USING_IPSEC, 1)) ||
588#endif 599#endif
589 if (session->reorder_timeout) 600 (session->reorder_timeout &&
590 NLA_PUT_MSECS(skb, L2TP_ATTR_RECV_TIMEOUT, session->reorder_timeout); 601 nla_put_msecs(skb, L2TP_ATTR_RECV_TIMEOUT, session->reorder_timeout)))
591 602 goto nla_put_failure;
592 nest = nla_nest_start(skb, L2TP_ATTR_STATS); 603 nest = nla_nest_start(skb, L2TP_ATTR_STATS);
593 if (nest == NULL) 604 if (nest == NULL)
594 goto nla_put_failure; 605 goto nla_put_failure;
595 NLA_PUT_U64(skb, L2TP_ATTR_TX_PACKETS, session->stats.tx_packets); 606 if (nla_put_u64(skb, L2TP_ATTR_TX_PACKETS, session->stats.tx_packets) ||
596 NLA_PUT_U64(skb, L2TP_ATTR_TX_BYTES, session->stats.tx_bytes); 607 nla_put_u64(skb, L2TP_ATTR_TX_BYTES, session->stats.tx_bytes) ||
597 NLA_PUT_U64(skb, L2TP_ATTR_TX_ERRORS, session->stats.tx_errors); 608 nla_put_u64(skb, L2TP_ATTR_TX_ERRORS, session->stats.tx_errors) ||
598 NLA_PUT_U64(skb, L2TP_ATTR_RX_PACKETS, session->stats.rx_packets); 609 nla_put_u64(skb, L2TP_ATTR_RX_PACKETS, session->stats.rx_packets) ||
599 NLA_PUT_U64(skb, L2TP_ATTR_RX_BYTES, session->stats.rx_bytes); 610 nla_put_u64(skb, L2TP_ATTR_RX_BYTES, session->stats.rx_bytes) ||
600 NLA_PUT_U64(skb, L2TP_ATTR_RX_SEQ_DISCARDS, session->stats.rx_seq_discards); 611 nla_put_u64(skb, L2TP_ATTR_RX_SEQ_DISCARDS,
601 NLA_PUT_U64(skb, L2TP_ATTR_RX_OOS_PACKETS, session->stats.rx_oos_packets); 612 session->stats.rx_seq_discards) ||
602 NLA_PUT_U64(skb, L2TP_ATTR_RX_ERRORS, session->stats.rx_errors); 613 nla_put_u64(skb, L2TP_ATTR_RX_OOS_PACKETS,
614 session->stats.rx_oos_packets) ||
615 nla_put_u64(skb, L2TP_ATTR_RX_ERRORS, session->stats.rx_errors))
616 goto nla_put_failure;
603 nla_nest_end(skb, nest); 617 nla_nest_end(skb, nest);
604 618
605 return genlmsg_end(skb, hdr); 619 return genlmsg_end(skb, hdr);
diff --git a/net/netfilter/ipset/ip_set_bitmap_ip.c b/net/netfilter/ipset/ip_set_bitmap_ip.c
index a72a4dff0031..7e1b061aeeba 100644
--- a/net/netfilter/ipset/ip_set_bitmap_ip.c
+++ b/net/netfilter/ipset/ip_set_bitmap_ip.c
@@ -109,8 +109,9 @@ bitmap_ip_list(const struct ip_set *set,
109 } else 109 } else
110 goto nla_put_failure; 110 goto nla_put_failure;
111 } 111 }
112 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP, 112 if (nla_put_ipaddr4(skb, IPSET_ATTR_IP,
113 htonl(map->first_ip + id * map->hosts)); 113 htonl(map->first_ip + id * map->hosts)))
114 goto nla_put_failure;
114 ipset_nest_end(skb, nested); 115 ipset_nest_end(skb, nested);
115 } 116 }
116 ipset_nest_end(skb, atd); 117 ipset_nest_end(skb, atd);
@@ -194,10 +195,11 @@ bitmap_ip_tlist(const struct ip_set *set,
194 } else 195 } else
195 goto nla_put_failure; 196 goto nla_put_failure;
196 } 197 }
197 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP, 198 if (nla_put_ipaddr4(skb, IPSET_ATTR_IP,
198 htonl(map->first_ip + id * map->hosts)); 199 htonl(map->first_ip + id * map->hosts)) ||
199 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, 200 nla_put_net32(skb, IPSET_ATTR_TIMEOUT,
200 htonl(ip_set_timeout_get(members[id]))); 201 htonl(ip_set_timeout_get(members[id]))))
202 goto nla_put_failure;
201 ipset_nest_end(skb, nested); 203 ipset_nest_end(skb, nested);
202 } 204 }
203 ipset_nest_end(skb, adt); 205 ipset_nest_end(skb, adt);
@@ -334,15 +336,16 @@ bitmap_ip_head(struct ip_set *set, struct sk_buff *skb)
334 nested = ipset_nest_start(skb, IPSET_ATTR_DATA); 336 nested = ipset_nest_start(skb, IPSET_ATTR_DATA);
335 if (!nested) 337 if (!nested)
336 goto nla_put_failure; 338 goto nla_put_failure;
337 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP, htonl(map->first_ip)); 339 if (nla_put_ipaddr4(skb, IPSET_ATTR_IP, htonl(map->first_ip)) ||
338 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP_TO, htonl(map->last_ip)); 340 nla_put_ipaddr4(skb, IPSET_ATTR_IP_TO, htonl(map->last_ip)) ||
339 if (map->netmask != 32) 341 (map->netmask != 32 &&
340 NLA_PUT_U8(skb, IPSET_ATTR_NETMASK, map->netmask); 342 nla_put_u8(skb, IPSET_ATTR_NETMASK, map->netmask)) ||
341 NLA_PUT_NET32(skb, IPSET_ATTR_REFERENCES, htonl(set->ref - 1)); 343 nla_put_net32(skb, IPSET_ATTR_REFERENCES, htonl(set->ref - 1)) ||
342 NLA_PUT_NET32(skb, IPSET_ATTR_MEMSIZE, 344 nla_put_net32(skb, IPSET_ATTR_MEMSIZE,
343 htonl(sizeof(*map) + map->memsize)); 345 htonl(sizeof(*map) + map->memsize)) ||
344 if (with_timeout(map->timeout)) 346 (with_timeout(map->timeout) &&
345 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, htonl(map->timeout)); 347 nla_put_net32(skb, IPSET_ATTR_TIMEOUT, htonl(map->timeout))))
348 goto nla_put_failure;
346 ipset_nest_end(skb, nested); 349 ipset_nest_end(skb, nested);
347 350
348 return 0; 351 return 0;
diff --git a/net/netfilter/ipset/ip_set_bitmap_ipmac.c b/net/netfilter/ipset/ip_set_bitmap_ipmac.c
index 81324c12c5be..0bb16c469a89 100644
--- a/net/netfilter/ipset/ip_set_bitmap_ipmac.c
+++ b/net/netfilter/ipset/ip_set_bitmap_ipmac.c
@@ -186,11 +186,12 @@ bitmap_ipmac_list(const struct ip_set *set,
186 } else 186 } else
187 goto nla_put_failure; 187 goto nla_put_failure;
188 } 188 }
189 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP, 189 if (nla_put_ipaddr4(skb, IPSET_ATTR_IP,
190 htonl(map->first_ip + id)); 190 htonl(map->first_ip + id)) ||
191 if (elem->match == MAC_FILLED) 191 (elem->match == MAC_FILLED &&
192 NLA_PUT(skb, IPSET_ATTR_ETHER, ETH_ALEN, 192 nla_put(skb, IPSET_ATTR_ETHER, ETH_ALEN,
193 elem->ether); 193 elem->ether)))
194 goto nla_put_failure;
194 ipset_nest_end(skb, nested); 195 ipset_nest_end(skb, nested);
195 } 196 }
196 ipset_nest_end(skb, atd); 197 ipset_nest_end(skb, atd);
@@ -314,14 +315,16 @@ bitmap_ipmac_tlist(const struct ip_set *set,
314 } else 315 } else
315 goto nla_put_failure; 316 goto nla_put_failure;
316 } 317 }
317 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP, 318 if (nla_put_ipaddr4(skb, IPSET_ATTR_IP,
318 htonl(map->first_ip + id)); 319 htonl(map->first_ip + id)) ||
319 if (elem->match == MAC_FILLED) 320 (elem->match == MAC_FILLED &&
320 NLA_PUT(skb, IPSET_ATTR_ETHER, ETH_ALEN, 321 nla_put(skb, IPSET_ATTR_ETHER, ETH_ALEN,
321 elem->ether); 322 elem->ether)))
323 goto nla_put_failure;
322 timeout = elem->match == MAC_UNSET ? elem->timeout 324 timeout = elem->match == MAC_UNSET ? elem->timeout
323 : ip_set_timeout_get(elem->timeout); 325 : ip_set_timeout_get(elem->timeout);
324 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, htonl(timeout)); 326 if (nla_put_net32(skb, IPSET_ATTR_TIMEOUT, htonl(timeout)))
327 goto nla_put_failure;
325 ipset_nest_end(skb, nested); 328 ipset_nest_end(skb, nested);
326 } 329 }
327 ipset_nest_end(skb, atd); 330 ipset_nest_end(skb, atd);
@@ -438,14 +441,16 @@ bitmap_ipmac_head(struct ip_set *set, struct sk_buff *skb)
438 nested = ipset_nest_start(skb, IPSET_ATTR_DATA); 441 nested = ipset_nest_start(skb, IPSET_ATTR_DATA);
439 if (!nested) 442 if (!nested)
440 goto nla_put_failure; 443 goto nla_put_failure;
441 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP, htonl(map->first_ip)); 444 if (nla_put_ipaddr4(skb, IPSET_ATTR_IP, htonl(map->first_ip)) ||
442 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP_TO, htonl(map->last_ip)); 445 nla_put_ipaddr4(skb, IPSET_ATTR_IP_TO, htonl(map->last_ip)) ||
443 NLA_PUT_NET32(skb, IPSET_ATTR_REFERENCES, htonl(set->ref - 1)); 446 nla_put_net32(skb, IPSET_ATTR_REFERENCES, htonl(set->ref - 1)) ||
444 NLA_PUT_NET32(skb, IPSET_ATTR_MEMSIZE, 447 nla_put_net32(skb, IPSET_ATTR_MEMSIZE,
445 htonl(sizeof(*map) 448 htonl(sizeof(*map) +
446 + (map->last_ip - map->first_ip + 1) * map->dsize)); 449 ((map->last_ip - map->first_ip + 1) *
447 if (with_timeout(map->timeout)) 450 map->dsize))) ||
448 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, htonl(map->timeout)); 451 (with_timeout(map->timeout) &&
452 nla_put_net32(skb, IPSET_ATTR_TIMEOUT, htonl(map->timeout))))
453 goto nla_put_failure;
449 ipset_nest_end(skb, nested); 454 ipset_nest_end(skb, nested);
450 455
451 return 0; 456 return 0;
diff --git a/net/netfilter/ipset/ip_set_bitmap_port.c b/net/netfilter/ipset/ip_set_bitmap_port.c
index 382ec28ba72e..b9f1fce7053b 100644
--- a/net/netfilter/ipset/ip_set_bitmap_port.c
+++ b/net/netfilter/ipset/ip_set_bitmap_port.c
@@ -96,8 +96,9 @@ bitmap_port_list(const struct ip_set *set,
96 } else 96 } else
97 goto nla_put_failure; 97 goto nla_put_failure;
98 } 98 }
99 NLA_PUT_NET16(skb, IPSET_ATTR_PORT, 99 if (nla_put_net16(skb, IPSET_ATTR_PORT,
100 htons(map->first_port + id)); 100 htons(map->first_port + id)))
101 goto nla_put_failure;
101 ipset_nest_end(skb, nested); 102 ipset_nest_end(skb, nested);
102 } 103 }
103 ipset_nest_end(skb, atd); 104 ipset_nest_end(skb, atd);
@@ -183,10 +184,11 @@ bitmap_port_tlist(const struct ip_set *set,
183 } else 184 } else
184 goto nla_put_failure; 185 goto nla_put_failure;
185 } 186 }
186 NLA_PUT_NET16(skb, IPSET_ATTR_PORT, 187 if (nla_put_net16(skb, IPSET_ATTR_PORT,
187 htons(map->first_port + id)); 188 htons(map->first_port + id)) ||
188 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, 189 nla_put_net32(skb, IPSET_ATTR_TIMEOUT,
189 htonl(ip_set_timeout_get(members[id]))); 190 htonl(ip_set_timeout_get(members[id]))))
191 goto nla_put_failure;
190 ipset_nest_end(skb, nested); 192 ipset_nest_end(skb, nested);
191 } 193 }
192 ipset_nest_end(skb, adt); 194 ipset_nest_end(skb, adt);
@@ -320,13 +322,14 @@ bitmap_port_head(struct ip_set *set, struct sk_buff *skb)
320 nested = ipset_nest_start(skb, IPSET_ATTR_DATA); 322 nested = ipset_nest_start(skb, IPSET_ATTR_DATA);
321 if (!nested) 323 if (!nested)
322 goto nla_put_failure; 324 goto nla_put_failure;
323 NLA_PUT_NET16(skb, IPSET_ATTR_PORT, htons(map->first_port)); 325 if (nla_put_net16(skb, IPSET_ATTR_PORT, htons(map->first_port)) ||
324 NLA_PUT_NET16(skb, IPSET_ATTR_PORT_TO, htons(map->last_port)); 326 nla_put_net16(skb, IPSET_ATTR_PORT_TO, htons(map->last_port)) ||
325 NLA_PUT_NET32(skb, IPSET_ATTR_REFERENCES, htonl(set->ref - 1)); 327 nla_put_net32(skb, IPSET_ATTR_REFERENCES, htonl(set->ref - 1)) ||
326 NLA_PUT_NET32(skb, IPSET_ATTR_MEMSIZE, 328 nla_put_net32(skb, IPSET_ATTR_MEMSIZE,
327 htonl(sizeof(*map) + map->memsize)); 329 htonl(sizeof(*map) + map->memsize)) ||
328 if (with_timeout(map->timeout)) 330 (with_timeout(map->timeout) &&
329 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, htonl(map->timeout)); 331 nla_put_net32(skb, IPSET_ATTR_TIMEOUT, htonl(map->timeout))))
332 goto nla_put_failure;
330 ipset_nest_end(skb, nested); 333 ipset_nest_end(skb, nested);
331 334
332 return 0; 335 return 0;
diff --git a/net/netfilter/ipset/ip_set_core.c b/net/netfilter/ipset/ip_set_core.c
index e6c1c9605a58..eb66b9790a6f 100644
--- a/net/netfilter/ipset/ip_set_core.c
+++ b/net/netfilter/ipset/ip_set_core.c
@@ -1092,19 +1092,21 @@ dump_last:
1092 ret = -EMSGSIZE; 1092 ret = -EMSGSIZE;
1093 goto release_refcount; 1093 goto release_refcount;
1094 } 1094 }
1095 NLA_PUT_U8(skb, IPSET_ATTR_PROTOCOL, IPSET_PROTOCOL); 1095 if (nla_put_u8(skb, IPSET_ATTR_PROTOCOL, IPSET_PROTOCOL) ||
1096 NLA_PUT_STRING(skb, IPSET_ATTR_SETNAME, set->name); 1096 nla_put_string(skb, IPSET_ATTR_SETNAME, set->name))
1097 goto nla_put_failure;
1097 if (dump_flags & IPSET_FLAG_LIST_SETNAME) 1098 if (dump_flags & IPSET_FLAG_LIST_SETNAME)
1098 goto next_set; 1099 goto next_set;
1099 switch (cb->args[2]) { 1100 switch (cb->args[2]) {
1100 case 0: 1101 case 0:
1101 /* Core header data */ 1102 /* Core header data */
1102 NLA_PUT_STRING(skb, IPSET_ATTR_TYPENAME, 1103 if (nla_put_string(skb, IPSET_ATTR_TYPENAME,
1103 set->type->name); 1104 set->type->name) ||
1104 NLA_PUT_U8(skb, IPSET_ATTR_FAMILY, 1105 nla_put_u8(skb, IPSET_ATTR_FAMILY,
1105 set->family); 1106 set->family) ||
1106 NLA_PUT_U8(skb, IPSET_ATTR_REVISION, 1107 nla_put_u8(skb, IPSET_ATTR_REVISION,
1107 set->revision); 1108 set->revision))
1109 goto nla_put_failure;
1108 ret = set->variant->head(set, skb); 1110 ret = set->variant->head(set, skb);
1109 if (ret < 0) 1111 if (ret < 0)
1110 goto release_refcount; 1112 goto release_refcount;
@@ -1410,11 +1412,12 @@ ip_set_header(struct sock *ctnl, struct sk_buff *skb,
1410 IPSET_CMD_HEADER); 1412 IPSET_CMD_HEADER);
1411 if (!nlh2) 1413 if (!nlh2)
1412 goto nlmsg_failure; 1414 goto nlmsg_failure;
1413 NLA_PUT_U8(skb2, IPSET_ATTR_PROTOCOL, IPSET_PROTOCOL); 1415 if (nla_put_u8(skb2, IPSET_ATTR_PROTOCOL, IPSET_PROTOCOL) ||
1414 NLA_PUT_STRING(skb2, IPSET_ATTR_SETNAME, set->name); 1416 nla_put_string(skb2, IPSET_ATTR_SETNAME, set->name) ||
1415 NLA_PUT_STRING(skb2, IPSET_ATTR_TYPENAME, set->type->name); 1417 nla_put_string(skb2, IPSET_ATTR_TYPENAME, set->type->name) ||
1416 NLA_PUT_U8(skb2, IPSET_ATTR_FAMILY, set->family); 1418 nla_put_u8(skb2, IPSET_ATTR_FAMILY, set->family) ||
1417 NLA_PUT_U8(skb2, IPSET_ATTR_REVISION, set->revision); 1419 nla_put_u8(skb2, IPSET_ATTR_REVISION, set->revision))
1420 goto nla_put_failure;
1418 nlmsg_end(skb2, nlh2); 1421 nlmsg_end(skb2, nlh2);
1419 1422
1420 ret = netlink_unicast(ctnl, skb2, NETLINK_CB(skb).pid, MSG_DONTWAIT); 1423 ret = netlink_unicast(ctnl, skb2, NETLINK_CB(skb).pid, MSG_DONTWAIT);
@@ -1469,11 +1472,12 @@ ip_set_type(struct sock *ctnl, struct sk_buff *skb,
1469 IPSET_CMD_TYPE); 1472 IPSET_CMD_TYPE);
1470 if (!nlh2) 1473 if (!nlh2)
1471 goto nlmsg_failure; 1474 goto nlmsg_failure;
1472 NLA_PUT_U8(skb2, IPSET_ATTR_PROTOCOL, IPSET_PROTOCOL); 1475 if (nla_put_u8(skb2, IPSET_ATTR_PROTOCOL, IPSET_PROTOCOL) ||
1473 NLA_PUT_STRING(skb2, IPSET_ATTR_TYPENAME, typename); 1476 nla_put_string(skb2, IPSET_ATTR_TYPENAME, typename) ||
1474 NLA_PUT_U8(skb2, IPSET_ATTR_FAMILY, family); 1477 nla_put_u8(skb2, IPSET_ATTR_FAMILY, family) ||
1475 NLA_PUT_U8(skb2, IPSET_ATTR_REVISION, max); 1478 nla_put_u8(skb2, IPSET_ATTR_REVISION, max) ||
1476 NLA_PUT_U8(skb2, IPSET_ATTR_REVISION_MIN, min); 1479 nla_put_u8(skb2, IPSET_ATTR_REVISION_MIN, min))
1480 goto nla_put_failure;
1477 nlmsg_end(skb2, nlh2); 1481 nlmsg_end(skb2, nlh2);
1478 1482
1479 pr_debug("Send TYPE, nlmsg_len: %u\n", nlh2->nlmsg_len); 1483 pr_debug("Send TYPE, nlmsg_len: %u\n", nlh2->nlmsg_len);
@@ -1517,7 +1521,8 @@ ip_set_protocol(struct sock *ctnl, struct sk_buff *skb,
1517 IPSET_CMD_PROTOCOL); 1521 IPSET_CMD_PROTOCOL);
1518 if (!nlh2) 1522 if (!nlh2)
1519 goto nlmsg_failure; 1523 goto nlmsg_failure;
1520 NLA_PUT_U8(skb2, IPSET_ATTR_PROTOCOL, IPSET_PROTOCOL); 1524 if (nla_put_u8(skb2, IPSET_ATTR_PROTOCOL, IPSET_PROTOCOL))
1525 goto nla_put_failure;
1521 nlmsg_end(skb2, nlh2); 1526 nlmsg_end(skb2, nlh2);
1522 1527
1523 ret = netlink_unicast(ctnl, skb2, NETLINK_CB(skb).pid, MSG_DONTWAIT); 1528 ret = netlink_unicast(ctnl, skb2, NETLINK_CB(skb).pid, MSG_DONTWAIT);
diff --git a/net/netfilter/ipset/ip_set_hash_ip.c b/net/netfilter/ipset/ip_set_hash_ip.c
index 5139dea6019e..507fe93794aa 100644
--- a/net/netfilter/ipset/ip_set_hash_ip.c
+++ b/net/netfilter/ipset/ip_set_hash_ip.c
@@ -81,7 +81,8 @@ hash_ip4_data_zero_out(struct hash_ip4_elem *elem)
81static inline bool 81static inline bool
82hash_ip4_data_list(struct sk_buff *skb, const struct hash_ip4_elem *data) 82hash_ip4_data_list(struct sk_buff *skb, const struct hash_ip4_elem *data)
83{ 83{
84 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP, data->ip); 84 if (nla_put_ipaddr4(skb, IPSET_ATTR_IP, data->ip))
85 goto nla_put_failure;
85 return 0; 86 return 0;
86 87
87nla_put_failure: 88nla_put_failure:
@@ -94,9 +95,10 @@ hash_ip4_data_tlist(struct sk_buff *skb, const struct hash_ip4_elem *data)
94 const struct hash_ip4_telem *tdata = 95 const struct hash_ip4_telem *tdata =
95 (const struct hash_ip4_telem *)data; 96 (const struct hash_ip4_telem *)data;
96 97
97 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP, tdata->ip); 98 if (nla_put_ipaddr4(skb, IPSET_ATTR_IP, tdata->ip) ||
98 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, 99 nla_put_net32(skb, IPSET_ATTR_TIMEOUT,
99 htonl(ip_set_timeout_get(tdata->timeout))); 100 htonl(ip_set_timeout_get(tdata->timeout))))
101 goto nla_put_failure;
100 102
101 return 0; 103 return 0;
102 104
@@ -262,7 +264,8 @@ ip6_netmask(union nf_inet_addr *ip, u8 prefix)
262static bool 264static bool
263hash_ip6_data_list(struct sk_buff *skb, const struct hash_ip6_elem *data) 265hash_ip6_data_list(struct sk_buff *skb, const struct hash_ip6_elem *data)
264{ 266{
265 NLA_PUT_IPADDR6(skb, IPSET_ATTR_IP, &data->ip); 267 if (nla_put_ipaddr6(skb, IPSET_ATTR_IP, &data->ip.in6))
268 goto nla_put_failure;
266 return 0; 269 return 0;
267 270
268nla_put_failure: 271nla_put_failure:
@@ -275,9 +278,10 @@ hash_ip6_data_tlist(struct sk_buff *skb, const struct hash_ip6_elem *data)
275 const struct hash_ip6_telem *e = 278 const struct hash_ip6_telem *e =
276 (const struct hash_ip6_telem *)data; 279 (const struct hash_ip6_telem *)data;
277 280
278 NLA_PUT_IPADDR6(skb, IPSET_ATTR_IP, &e->ip); 281 if (nla_put_ipaddr6(skb, IPSET_ATTR_IP, &e->ip.in6) ||
279 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, 282 nla_put_net32(skb, IPSET_ATTR_TIMEOUT,
280 htonl(ip_set_timeout_get(e->timeout))); 283 htonl(ip_set_timeout_get(e->timeout))))
284 goto nla_put_failure;
281 return 0; 285 return 0;
282 286
283nla_put_failure: 287nla_put_failure:
diff --git a/net/netfilter/ipset/ip_set_hash_ipport.c b/net/netfilter/ipset/ip_set_hash_ipport.c
index 9c27e249c171..68f284c97490 100644
--- a/net/netfilter/ipset/ip_set_hash_ipport.c
+++ b/net/netfilter/ipset/ip_set_hash_ipport.c
@@ -93,9 +93,10 @@ static bool
93hash_ipport4_data_list(struct sk_buff *skb, 93hash_ipport4_data_list(struct sk_buff *skb,
94 const struct hash_ipport4_elem *data) 94 const struct hash_ipport4_elem *data)
95{ 95{
96 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP, data->ip); 96 if (nla_put_ipaddr4(skb, IPSET_ATTR_IP, data->ip) ||
97 NLA_PUT_NET16(skb, IPSET_ATTR_PORT, data->port); 97 nla_put_net16(skb, IPSET_ATTR_PORT, data->port) ||
98 NLA_PUT_U8(skb, IPSET_ATTR_PROTO, data->proto); 98 nla_put_u8(skb, IPSET_ATTR_PROTO, data->proto))
99 goto nla_put_failure;
99 return 0; 100 return 0;
100 101
101nla_put_failure: 102nla_put_failure:
@@ -109,12 +110,12 @@ hash_ipport4_data_tlist(struct sk_buff *skb,
109 const struct hash_ipport4_telem *tdata = 110 const struct hash_ipport4_telem *tdata =
110 (const struct hash_ipport4_telem *)data; 111 (const struct hash_ipport4_telem *)data;
111 112
112 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP, tdata->ip); 113 if (nla_put_ipaddr4(skb, IPSET_ATTR_IP, tdata->ip) ||
113 NLA_PUT_NET16(skb, IPSET_ATTR_PORT, tdata->port); 114 nla_put_net16(skb, IPSET_ATTR_PORT, tdata->port) ||
114 NLA_PUT_U8(skb, IPSET_ATTR_PROTO, data->proto); 115 nla_put_u8(skb, IPSET_ATTR_PROTO, data->proto) ||
115 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, 116 nla_put_net32(skb, IPSET_ATTR_TIMEOUT,
116 htonl(ip_set_timeout_get(tdata->timeout))); 117 htonl(ip_set_timeout_get(tdata->timeout))))
117 118 goto nla_put_failure;
118 return 0; 119 return 0;
119 120
120nla_put_failure: 121nla_put_failure:
@@ -308,9 +309,10 @@ static bool
308hash_ipport6_data_list(struct sk_buff *skb, 309hash_ipport6_data_list(struct sk_buff *skb,
309 const struct hash_ipport6_elem *data) 310 const struct hash_ipport6_elem *data)
310{ 311{
311 NLA_PUT_IPADDR6(skb, IPSET_ATTR_IP, &data->ip); 312 if (nla_put_ipaddr6(skb, IPSET_ATTR_IP, &data->ip.in6) ||
312 NLA_PUT_NET16(skb, IPSET_ATTR_PORT, data->port); 313 nla_put_net16(skb, IPSET_ATTR_PORT, data->port) ||
313 NLA_PUT_U8(skb, IPSET_ATTR_PROTO, data->proto); 314 nla_put_u8(skb, IPSET_ATTR_PROTO, data->proto))
315 goto nla_put_failure;
314 return 0; 316 return 0;
315 317
316nla_put_failure: 318nla_put_failure:
@@ -324,11 +326,12 @@ hash_ipport6_data_tlist(struct sk_buff *skb,
324 const struct hash_ipport6_telem *e = 326 const struct hash_ipport6_telem *e =
325 (const struct hash_ipport6_telem *)data; 327 (const struct hash_ipport6_telem *)data;
326 328
327 NLA_PUT_IPADDR6(skb, IPSET_ATTR_IP, &e->ip); 329 if (nla_put_ipaddr6(skb, IPSET_ATTR_IP, &e->ip.in6) ||
328 NLA_PUT_NET16(skb, IPSET_ATTR_PORT, data->port); 330 nla_put_net16(skb, IPSET_ATTR_PORT, data->port) ||
329 NLA_PUT_U8(skb, IPSET_ATTR_PROTO, data->proto); 331 nla_put_u8(skb, IPSET_ATTR_PROTO, data->proto) ||
330 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, 332 nla_put_net32(skb, IPSET_ATTR_TIMEOUT,
331 htonl(ip_set_timeout_get(e->timeout))); 333 htonl(ip_set_timeout_get(e->timeout))))
334 goto nla_put_failure;
332 return 0; 335 return 0;
333 336
334nla_put_failure: 337nla_put_failure:
diff --git a/net/netfilter/ipset/ip_set_hash_ipportip.c b/net/netfilter/ipset/ip_set_hash_ipportip.c
index 9134057c0728..1eec4b9e0dca 100644
--- a/net/netfilter/ipset/ip_set_hash_ipportip.c
+++ b/net/netfilter/ipset/ip_set_hash_ipportip.c
@@ -94,10 +94,11 @@ static bool
94hash_ipportip4_data_list(struct sk_buff *skb, 94hash_ipportip4_data_list(struct sk_buff *skb,
95 const struct hash_ipportip4_elem *data) 95 const struct hash_ipportip4_elem *data)
96{ 96{
97 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP, data->ip); 97 if (nla_put_ipaddr4(skb, IPSET_ATTR_IP, data->ip) ||
98 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP2, data->ip2); 98 nla_put_ipaddr4(skb, IPSET_ATTR_IP2, data->ip2) ||
99 NLA_PUT_NET16(skb, IPSET_ATTR_PORT, data->port); 99 nla_put_net16(skb, IPSET_ATTR_PORT, data->port) ||
100 NLA_PUT_U8(skb, IPSET_ATTR_PROTO, data->proto); 100 nla_put_u8(skb, IPSET_ATTR_PROTO, data->proto))
101 goto nla_put_failure;
101 return 0; 102 return 0;
102 103
103nla_put_failure: 104nla_put_failure:
@@ -111,13 +112,13 @@ hash_ipportip4_data_tlist(struct sk_buff *skb,
111 const struct hash_ipportip4_telem *tdata = 112 const struct hash_ipportip4_telem *tdata =
112 (const struct hash_ipportip4_telem *)data; 113 (const struct hash_ipportip4_telem *)data;
113 114
114 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP, tdata->ip); 115 if (nla_put_ipaddr4(skb, IPSET_ATTR_IP, tdata->ip) ||
115 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP2, tdata->ip2); 116 nla_put_ipaddr4(skb, IPSET_ATTR_IP2, tdata->ip2) ||
116 NLA_PUT_NET16(skb, IPSET_ATTR_PORT, tdata->port); 117 nla_put_net16(skb, IPSET_ATTR_PORT, tdata->port) ||
117 NLA_PUT_U8(skb, IPSET_ATTR_PROTO, data->proto); 118 nla_put_u8(skb, IPSET_ATTR_PROTO, data->proto) ||
118 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, 119 nla_put_net32(skb, IPSET_ATTR_TIMEOUT,
119 htonl(ip_set_timeout_get(tdata->timeout))); 120 htonl(ip_set_timeout_get(tdata->timeout))))
120 121 goto nla_put_failure;
121 return 0; 122 return 0;
122 123
123nla_put_failure: 124nla_put_failure:
@@ -319,10 +320,11 @@ static bool
319hash_ipportip6_data_list(struct sk_buff *skb, 320hash_ipportip6_data_list(struct sk_buff *skb,
320 const struct hash_ipportip6_elem *data) 321 const struct hash_ipportip6_elem *data)
321{ 322{
322 NLA_PUT_IPADDR6(skb, IPSET_ATTR_IP, &data->ip); 323 if (nla_put_ipaddr6(skb, IPSET_ATTR_IP, &data->ip.in6) ||
323 NLA_PUT_IPADDR6(skb, IPSET_ATTR_IP2, &data->ip2); 324 nla_put_ipaddr6(skb, IPSET_ATTR_IP2, &data->ip2.in6) ||
324 NLA_PUT_NET16(skb, IPSET_ATTR_PORT, data->port); 325 nla_put_net16(skb, IPSET_ATTR_PORT, data->port) ||
325 NLA_PUT_U8(skb, IPSET_ATTR_PROTO, data->proto); 326 nla_put_u8(skb, IPSET_ATTR_PROTO, data->proto))
327 goto nla_put_failure;
326 return 0; 328 return 0;
327 329
328nla_put_failure: 330nla_put_failure:
@@ -336,12 +338,13 @@ hash_ipportip6_data_tlist(struct sk_buff *skb,
336 const struct hash_ipportip6_telem *e = 338 const struct hash_ipportip6_telem *e =
337 (const struct hash_ipportip6_telem *)data; 339 (const struct hash_ipportip6_telem *)data;
338 340
339 NLA_PUT_IPADDR6(skb, IPSET_ATTR_IP, &e->ip); 341 if (nla_put_ipaddr6(skb, IPSET_ATTR_IP, &e->ip.in6) ||
340 NLA_PUT_IPADDR6(skb, IPSET_ATTR_IP2, &data->ip2); 342 nla_put_ipaddr6(skb, IPSET_ATTR_IP2, &data->ip2.in6) ||
341 NLA_PUT_NET16(skb, IPSET_ATTR_PORT, data->port); 343 nla_put_net16(skb, IPSET_ATTR_PORT, data->port) ||
342 NLA_PUT_U8(skb, IPSET_ATTR_PROTO, data->proto); 344 nla_put_u8(skb, IPSET_ATTR_PROTO, data->proto) ||
343 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, 345 nla_put_net32(skb, IPSET_ATTR_TIMEOUT,
344 htonl(ip_set_timeout_get(e->timeout))); 346 htonl(ip_set_timeout_get(e->timeout))))
347 goto nla_put_failure;
345 return 0; 348 return 0;
346 349
347nla_put_failure: 350nla_put_failure:
diff --git a/net/netfilter/ipset/ip_set_hash_ipportnet.c b/net/netfilter/ipset/ip_set_hash_ipportnet.c
index 5d05e6969862..62d66ecef369 100644
--- a/net/netfilter/ipset/ip_set_hash_ipportnet.c
+++ b/net/netfilter/ipset/ip_set_hash_ipportnet.c
@@ -124,13 +124,14 @@ hash_ipportnet4_data_list(struct sk_buff *skb,
124{ 124{
125 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0; 125 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0;
126 126
127 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP, data->ip); 127 if (nla_put_ipaddr4(skb, IPSET_ATTR_IP, data->ip) ||
128 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP2, data->ip2); 128 nla_put_ipaddr4(skb, IPSET_ATTR_IP2, data->ip2) ||
129 NLA_PUT_NET16(skb, IPSET_ATTR_PORT, data->port); 129 nla_put_net16(skb, IPSET_ATTR_PORT, data->port) ||
130 NLA_PUT_U8(skb, IPSET_ATTR_CIDR2, data->cidr + 1); 130 nla_put_u8(skb, IPSET_ATTR_CIDR2, data->cidr + 1) ||
131 NLA_PUT_U8(skb, IPSET_ATTR_PROTO, data->proto); 131 nla_put_u8(skb, IPSET_ATTR_PROTO, data->proto) ||
132 if (flags) 132 (flags &&
133 NLA_PUT_NET32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags)); 133 nla_put_net32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags))))
134 goto nla_put_failure;
134 return 0; 135 return 0;
135 136
136nla_put_failure: 137nla_put_failure:
@@ -145,16 +146,16 @@ hash_ipportnet4_data_tlist(struct sk_buff *skb,
145 (const struct hash_ipportnet4_telem *)data; 146 (const struct hash_ipportnet4_telem *)data;
146 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0; 147 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0;
147 148
148 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP, tdata->ip); 149 if (nla_put_ipaddr4(skb, IPSET_ATTR_IP, tdata->ip) ||
149 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP2, tdata->ip2); 150 nla_put_ipaddr4(skb, IPSET_ATTR_IP2, tdata->ip2) ||
150 NLA_PUT_NET16(skb, IPSET_ATTR_PORT, tdata->port); 151 nla_put_net16(skb, IPSET_ATTR_PORT, tdata->port) ||
151 NLA_PUT_U8(skb, IPSET_ATTR_CIDR2, data->cidr + 1); 152 nla_put_u8(skb, IPSET_ATTR_CIDR2, data->cidr + 1) ||
152 NLA_PUT_U8(skb, IPSET_ATTR_PROTO, data->proto); 153 nla_put_u8(skb, IPSET_ATTR_PROTO, data->proto) ||
153 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, 154 nla_put_net32(skb, IPSET_ATTR_TIMEOUT,
154 htonl(ip_set_timeout_get(tdata->timeout))); 155 htonl(ip_set_timeout_get(tdata->timeout))) ||
155 if (flags) 156 (flags &&
156 NLA_PUT_NET32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags)); 157 nla_put_net32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags))))
157 158 goto nla_put_failure;
158 return 0; 159 return 0;
159 160
160nla_put_failure: 161nla_put_failure:
@@ -436,13 +437,14 @@ hash_ipportnet6_data_list(struct sk_buff *skb,
436{ 437{
437 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0; 438 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0;
438 439
439 NLA_PUT_IPADDR6(skb, IPSET_ATTR_IP, &data->ip); 440 if (nla_put_ipaddr6(skb, IPSET_ATTR_IP, &data->ip.in6) ||
440 NLA_PUT_IPADDR6(skb, IPSET_ATTR_IP2, &data->ip2); 441 nla_put_ipaddr6(skb, IPSET_ATTR_IP2, &data->ip2.in6) ||
441 NLA_PUT_NET16(skb, IPSET_ATTR_PORT, data->port); 442 nla_put_net16(skb, IPSET_ATTR_PORT, data->port) ||
442 NLA_PUT_U8(skb, IPSET_ATTR_CIDR2, data->cidr + 1); 443 nla_put_u8(skb, IPSET_ATTR_CIDR2, data->cidr + 1) ||
443 NLA_PUT_U8(skb, IPSET_ATTR_PROTO, data->proto); 444 nla_put_u8(skb, IPSET_ATTR_PROTO, data->proto) ||
444 if (flags) 445 (flags &&
445 NLA_PUT_NET32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags)); 446 nla_put_net32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags))))
447 goto nla_put_failure;
446 return 0; 448 return 0;
447 449
448nla_put_failure: 450nla_put_failure:
@@ -457,15 +459,16 @@ hash_ipportnet6_data_tlist(struct sk_buff *skb,
457 (const struct hash_ipportnet6_telem *)data; 459 (const struct hash_ipportnet6_telem *)data;
458 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0; 460 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0;
459 461
460 NLA_PUT_IPADDR6(skb, IPSET_ATTR_IP, &e->ip); 462 if (nla_put_ipaddr6(skb, IPSET_ATTR_IP, &e->ip.in6) ||
461 NLA_PUT_IPADDR6(skb, IPSET_ATTR_IP2, &data->ip2); 463 nla_put_ipaddr6(skb, IPSET_ATTR_IP2, &data->ip2.in6) ||
462 NLA_PUT_NET16(skb, IPSET_ATTR_PORT, data->port); 464 nla_put_net16(skb, IPSET_ATTR_PORT, data->port) ||
463 NLA_PUT_U8(skb, IPSET_ATTR_CIDR2, data->cidr + 1); 465 nla_put_u8(skb, IPSET_ATTR_CIDR2, data->cidr + 1) ||
464 NLA_PUT_U8(skb, IPSET_ATTR_PROTO, data->proto); 466 nla_put_u8(skb, IPSET_ATTR_PROTO, data->proto) ||
465 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, 467 nla_put_net32(skb, IPSET_ATTR_TIMEOUT,
466 htonl(ip_set_timeout_get(e->timeout))); 468 htonl(ip_set_timeout_get(e->timeout))) ||
467 if (flags) 469 (flags &&
468 NLA_PUT_NET32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags)); 470 nla_put_net32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags))))
471 goto nla_put_failure;
469 return 0; 472 return 0;
470 473
471nla_put_failure: 474nla_put_failure:
diff --git a/net/netfilter/ipset/ip_set_hash_net.c b/net/netfilter/ipset/ip_set_hash_net.c
index 7c3d945517cf..6607a814be57 100644
--- a/net/netfilter/ipset/ip_set_hash_net.c
+++ b/net/netfilter/ipset/ip_set_hash_net.c
@@ -111,10 +111,11 @@ hash_net4_data_list(struct sk_buff *skb, const struct hash_net4_elem *data)
111{ 111{
112 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0; 112 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0;
113 113
114 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP, data->ip); 114 if (nla_put_ipaddr4(skb, IPSET_ATTR_IP, data->ip) ||
115 NLA_PUT_U8(skb, IPSET_ATTR_CIDR, data->cidr); 115 nla_put_u8(skb, IPSET_ATTR_CIDR, data->cidr) ||
116 if (flags) 116 (flags &&
117 NLA_PUT_NET32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags)); 117 nla_put_net32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags))))
118 goto nla_put_failure;
118 return 0; 119 return 0;
119 120
120nla_put_failure: 121nla_put_failure:
@@ -128,13 +129,13 @@ hash_net4_data_tlist(struct sk_buff *skb, const struct hash_net4_elem *data)
128 (const struct hash_net4_telem *)data; 129 (const struct hash_net4_telem *)data;
129 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0; 130 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0;
130 131
131 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP, tdata->ip); 132 if (nla_put_ipaddr4(skb, IPSET_ATTR_IP, tdata->ip) ||
132 NLA_PUT_U8(skb, IPSET_ATTR_CIDR, tdata->cidr); 133 nla_put_u8(skb, IPSET_ATTR_CIDR, tdata->cidr) ||
133 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, 134 nla_put_net32(skb, IPSET_ATTR_TIMEOUT,
134 htonl(ip_set_timeout_get(tdata->timeout))); 135 htonl(ip_set_timeout_get(tdata->timeout))) ||
135 if (flags) 136 (flags &&
136 NLA_PUT_NET32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags)); 137 nla_put_net32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags))))
137 138 goto nla_put_failure;
138 return 0; 139 return 0;
139 140
140nla_put_failure: 141nla_put_failure:
@@ -339,10 +340,11 @@ hash_net6_data_list(struct sk_buff *skb, const struct hash_net6_elem *data)
339{ 340{
340 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0; 341 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0;
341 342
342 NLA_PUT_IPADDR6(skb, IPSET_ATTR_IP, &data->ip); 343 if (nla_put_ipaddr6(skb, IPSET_ATTR_IP, &data->ip.in6) ||
343 NLA_PUT_U8(skb, IPSET_ATTR_CIDR, data->cidr); 344 nla_put_u8(skb, IPSET_ATTR_CIDR, data->cidr) ||
344 if (flags) 345 (flags &&
345 NLA_PUT_NET32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags)); 346 nla_put_net32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags))))
347 goto nla_put_failure;
346 return 0; 348 return 0;
347 349
348nla_put_failure: 350nla_put_failure:
@@ -356,12 +358,13 @@ hash_net6_data_tlist(struct sk_buff *skb, const struct hash_net6_elem *data)
356 (const struct hash_net6_telem *)data; 358 (const struct hash_net6_telem *)data;
357 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0; 359 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0;
358 360
359 NLA_PUT_IPADDR6(skb, IPSET_ATTR_IP, &e->ip); 361 if (nla_put_ipaddr6(skb, IPSET_ATTR_IP, &e->ip.in6) ||
360 NLA_PUT_U8(skb, IPSET_ATTR_CIDR, e->cidr); 362 nla_put_u8(skb, IPSET_ATTR_CIDR, e->cidr) ||
361 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, 363 nla_put_net32(skb, IPSET_ATTR_TIMEOUT,
362 htonl(ip_set_timeout_get(e->timeout))); 364 htonl(ip_set_timeout_get(e->timeout))) ||
363 if (flags) 365 (flags &&
364 NLA_PUT_NET32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags)); 366 nla_put_net32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags))))
367 goto nla_put_failure;
365 return 0; 368 return 0;
366 369
367nla_put_failure: 370nla_put_failure:
diff --git a/net/netfilter/ipset/ip_set_hash_netiface.c b/net/netfilter/ipset/ip_set_hash_netiface.c
index f24037ff4322..6093f3daa911 100644
--- a/net/netfilter/ipset/ip_set_hash_netiface.c
+++ b/net/netfilter/ipset/ip_set_hash_netiface.c
@@ -252,11 +252,12 @@ hash_netiface4_data_list(struct sk_buff *skb,
252 252
253 if (data->nomatch) 253 if (data->nomatch)
254 flags |= IPSET_FLAG_NOMATCH; 254 flags |= IPSET_FLAG_NOMATCH;
255 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP, data->ip); 255 if (nla_put_ipaddr4(skb, IPSET_ATTR_IP, data->ip) ||
256 NLA_PUT_U8(skb, IPSET_ATTR_CIDR, data->cidr); 256 nla_put_u8(skb, IPSET_ATTR_CIDR, data->cidr) ||
257 NLA_PUT_STRING(skb, IPSET_ATTR_IFACE, data->iface); 257 nla_put_string(skb, IPSET_ATTR_IFACE, data->iface) ||
258 if (flags) 258 (flags &&
259 NLA_PUT_NET32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags)); 259 nla_put_net32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags))))
260 goto nla_put_failure;
260 return 0; 261 return 0;
261 262
262nla_put_failure: 263nla_put_failure:
@@ -273,13 +274,14 @@ hash_netiface4_data_tlist(struct sk_buff *skb,
273 274
274 if (data->nomatch) 275 if (data->nomatch)
275 flags |= IPSET_FLAG_NOMATCH; 276 flags |= IPSET_FLAG_NOMATCH;
276 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP, data->ip); 277 if (nla_put_ipaddr4(skb, IPSET_ATTR_IP, data->ip) ||
277 NLA_PUT_U8(skb, IPSET_ATTR_CIDR, data->cidr); 278 nla_put_u8(skb, IPSET_ATTR_CIDR, data->cidr) ||
278 NLA_PUT_STRING(skb, IPSET_ATTR_IFACE, data->iface); 279 nla_put_string(skb, IPSET_ATTR_IFACE, data->iface) ||
279 if (flags) 280 (flags &&
280 NLA_PUT_NET32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags)); 281 nla_put_net32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags))) ||
281 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, 282 nla_put_net32(skb, IPSET_ATTR_TIMEOUT,
282 htonl(ip_set_timeout_get(tdata->timeout))); 283 htonl(ip_set_timeout_get(tdata->timeout))))
284 goto nla_put_failure;
283 285
284 return 0; 286 return 0;
285 287
@@ -555,11 +557,12 @@ hash_netiface6_data_list(struct sk_buff *skb,
555 557
556 if (data->nomatch) 558 if (data->nomatch)
557 flags |= IPSET_FLAG_NOMATCH; 559 flags |= IPSET_FLAG_NOMATCH;
558 NLA_PUT_IPADDR6(skb, IPSET_ATTR_IP, &data->ip); 560 if (nla_put_ipaddr6(skb, IPSET_ATTR_IP, &data->ip.in6) ||
559 NLA_PUT_U8(skb, IPSET_ATTR_CIDR, data->cidr); 561 nla_put_u8(skb, IPSET_ATTR_CIDR, data->cidr) ||
560 NLA_PUT_STRING(skb, IPSET_ATTR_IFACE, data->iface); 562 nla_put_string(skb, IPSET_ATTR_IFACE, data->iface) ||
561 if (flags) 563 (flags &&
562 NLA_PUT_NET32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags)); 564 nla_put_net32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags))))
565 goto nla_put_failure;
563 return 0; 566 return 0;
564 567
565nla_put_failure: 568nla_put_failure:
@@ -576,13 +579,14 @@ hash_netiface6_data_tlist(struct sk_buff *skb,
576 579
577 if (data->nomatch) 580 if (data->nomatch)
578 flags |= IPSET_FLAG_NOMATCH; 581 flags |= IPSET_FLAG_NOMATCH;
579 NLA_PUT_IPADDR6(skb, IPSET_ATTR_IP, &e->ip); 582 if (nla_put_ipaddr6(skb, IPSET_ATTR_IP, &e->ip.in6) ||
580 NLA_PUT_U8(skb, IPSET_ATTR_CIDR, data->cidr); 583 nla_put_u8(skb, IPSET_ATTR_CIDR, data->cidr) ||
581 NLA_PUT_STRING(skb, IPSET_ATTR_IFACE, data->iface); 584 nla_put_string(skb, IPSET_ATTR_IFACE, data->iface) ||
582 if (flags) 585 (flags &&
583 NLA_PUT_NET32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags)); 586 nla_put_net32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags))) ||
584 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, 587 nla_put_net32(skb, IPSET_ATTR_TIMEOUT,
585 htonl(ip_set_timeout_get(e->timeout))); 588 htonl(ip_set_timeout_get(e->timeout))))
589 goto nla_put_failure;
586 return 0; 590 return 0;
587 591
588nla_put_failure: 592nla_put_failure:
diff --git a/net/netfilter/ipset/ip_set_hash_netport.c b/net/netfilter/ipset/ip_set_hash_netport.c
index ce2e77100b64..ae3c644adc14 100644
--- a/net/netfilter/ipset/ip_set_hash_netport.c
+++ b/net/netfilter/ipset/ip_set_hash_netport.c
@@ -124,12 +124,13 @@ hash_netport4_data_list(struct sk_buff *skb,
124{ 124{
125 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0; 125 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0;
126 126
127 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP, data->ip); 127 if (nla_put_ipaddr4(skb, IPSET_ATTR_IP, data->ip) ||
128 NLA_PUT_NET16(skb, IPSET_ATTR_PORT, data->port); 128 nla_put_net16(skb, IPSET_ATTR_PORT, data->port) ||
129 NLA_PUT_U8(skb, IPSET_ATTR_CIDR, data->cidr + 1); 129 nla_put_u8(skb, IPSET_ATTR_CIDR, data->cidr + 1) ||
130 NLA_PUT_U8(skb, IPSET_ATTR_PROTO, data->proto); 130 nla_put_u8(skb, IPSET_ATTR_PROTO, data->proto) ||
131 if (flags) 131 (flags &&
132 NLA_PUT_NET32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags)); 132 nla_put_net32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags))))
133 goto nla_put_failure;
133 return 0; 134 return 0;
134 135
135nla_put_failure: 136nla_put_failure:
@@ -144,15 +145,15 @@ hash_netport4_data_tlist(struct sk_buff *skb,
144 (const struct hash_netport4_telem *)data; 145 (const struct hash_netport4_telem *)data;
145 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0; 146 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0;
146 147
147 NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP, tdata->ip); 148 if (nla_put_ipaddr4(skb, IPSET_ATTR_IP, tdata->ip) ||
148 NLA_PUT_NET16(skb, IPSET_ATTR_PORT, tdata->port); 149 nla_put_net16(skb, IPSET_ATTR_PORT, tdata->port) ||
149 NLA_PUT_U8(skb, IPSET_ATTR_CIDR, data->cidr + 1); 150 nla_put_u8(skb, IPSET_ATTR_CIDR, data->cidr + 1) ||
150 NLA_PUT_U8(skb, IPSET_ATTR_PROTO, data->proto); 151 nla_put_u8(skb, IPSET_ATTR_PROTO, data->proto) ||
151 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, 152 nla_put_net32(skb, IPSET_ATTR_TIMEOUT,
152 htonl(ip_set_timeout_get(tdata->timeout))); 153 htonl(ip_set_timeout_get(tdata->timeout))) ||
153 if (flags) 154 (flags &&
154 NLA_PUT_NET32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags)); 155 nla_put_net32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags))))
155 156 goto nla_put_failure;
156 return 0; 157 return 0;
157 158
158nla_put_failure: 159nla_put_failure:
@@ -402,12 +403,13 @@ hash_netport6_data_list(struct sk_buff *skb,
402{ 403{
403 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0; 404 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0;
404 405
405 NLA_PUT_IPADDR6(skb, IPSET_ATTR_IP, &data->ip); 406 if (nla_put_ipaddr6(skb, IPSET_ATTR_IP, &data->ip.in6) ||
406 NLA_PUT_NET16(skb, IPSET_ATTR_PORT, data->port); 407 nla_put_net16(skb, IPSET_ATTR_PORT, data->port) ||
407 NLA_PUT_U8(skb, IPSET_ATTR_CIDR, data->cidr + 1); 408 nla_put_u8(skb, IPSET_ATTR_CIDR, data->cidr + 1) ||
408 NLA_PUT_U8(skb, IPSET_ATTR_PROTO, data->proto); 409 nla_put_u8(skb, IPSET_ATTR_PROTO, data->proto) ||
409 if (flags) 410 (flags &&
410 NLA_PUT_NET32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags)); 411 nla_put_net32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags))))
412 goto nla_put_failure;
411 return 0; 413 return 0;
412 414
413nla_put_failure: 415nla_put_failure:
@@ -422,14 +424,15 @@ hash_netport6_data_tlist(struct sk_buff *skb,
422 (const struct hash_netport6_telem *)data; 424 (const struct hash_netport6_telem *)data;
423 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0; 425 u32 flags = data->nomatch ? IPSET_FLAG_NOMATCH : 0;
424 426
425 NLA_PUT_IPADDR6(skb, IPSET_ATTR_IP, &e->ip); 427 if (nla_put_ipaddr6(skb, IPSET_ATTR_IP, &e->ip.in6) ||
426 NLA_PUT_NET16(skb, IPSET_ATTR_PORT, data->port); 428 nla_put_net16(skb, IPSET_ATTR_PORT, data->port) ||
427 NLA_PUT_U8(skb, IPSET_ATTR_CIDR, data->cidr + 1); 429 nla_put_u8(skb, IPSET_ATTR_CIDR, data->cidr + 1) ||
428 NLA_PUT_U8(skb, IPSET_ATTR_PROTO, data->proto); 430 nla_put_u8(skb, IPSET_ATTR_PROTO, data->proto) ||
429 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, 431 nla_put_net32(skb, IPSET_ATTR_TIMEOUT,
430 htonl(ip_set_timeout_get(e->timeout))); 432 htonl(ip_set_timeout_get(e->timeout))) ||
431 if (flags) 433 (flags &&
432 NLA_PUT_NET32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags)); 434 nla_put_net32(skb, IPSET_ATTR_CADT_FLAGS, htonl(flags))))
435 goto nla_put_failure;
433 return 0; 436 return 0;
434 437
435nla_put_failure: 438nla_put_failure:
diff --git a/net/netfilter/ipset/ip_set_list_set.c b/net/netfilter/ipset/ip_set_list_set.c
index 7e095f9005f0..6cb1225765f9 100644
--- a/net/netfilter/ipset/ip_set_list_set.c
+++ b/net/netfilter/ipset/ip_set_list_set.c
@@ -402,12 +402,13 @@ list_set_head(struct ip_set *set, struct sk_buff *skb)
402 nested = ipset_nest_start(skb, IPSET_ATTR_DATA); 402 nested = ipset_nest_start(skb, IPSET_ATTR_DATA);
403 if (!nested) 403 if (!nested)
404 goto nla_put_failure; 404 goto nla_put_failure;
405 NLA_PUT_NET32(skb, IPSET_ATTR_SIZE, htonl(map->size)); 405 if (nla_put_net32(skb, IPSET_ATTR_SIZE, htonl(map->size)) ||
406 if (with_timeout(map->timeout)) 406 (with_timeout(map->timeout) &&
407 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, htonl(map->timeout)); 407 nla_put_net32(skb, IPSET_ATTR_TIMEOUT, htonl(map->timeout))) ||
408 NLA_PUT_NET32(skb, IPSET_ATTR_REFERENCES, htonl(set->ref - 1)); 408 nla_put_net32(skb, IPSET_ATTR_REFERENCES, htonl(set->ref - 1)) ||
409 NLA_PUT_NET32(skb, IPSET_ATTR_MEMSIZE, 409 nla_put_net32(skb, IPSET_ATTR_MEMSIZE,
410 htonl(sizeof(*map) + map->size * map->dsize)); 410 htonl(sizeof(*map) + map->size * map->dsize)))
411 goto nla_put_failure;
411 ipset_nest_end(skb, nested); 412 ipset_nest_end(skb, nested);
412 413
413 return 0; 414 return 0;
@@ -442,13 +443,15 @@ list_set_list(const struct ip_set *set,
442 } else 443 } else
443 goto nla_put_failure; 444 goto nla_put_failure;
444 } 445 }
445 NLA_PUT_STRING(skb, IPSET_ATTR_NAME, 446 if (nla_put_string(skb, IPSET_ATTR_NAME,
446 ip_set_name_byindex(e->id)); 447 ip_set_name_byindex(e->id)))
448 goto nla_put_failure;
447 if (with_timeout(map->timeout)) { 449 if (with_timeout(map->timeout)) {
448 const struct set_telem *te = 450 const struct set_telem *te =
449 (const struct set_telem *) e; 451 (const struct set_telem *) e;
450 NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, 452 __be32 to = htonl(ip_set_timeout_get(te->timeout));
451 htonl(ip_set_timeout_get(te->timeout))); 453 if (nla_put_net32(skb, IPSET_ATTR_TIMEOUT, to))
454 goto nla_put_failure;
452 } 455 }
453 ipset_nest_end(skb, nested); 456 ipset_nest_end(skb, nested);
454 } 457 }
diff --git a/net/netfilter/ipvs/ip_vs_ctl.c b/net/netfilter/ipvs/ip_vs_ctl.c
index b3afe189af61..964d426d237f 100644
--- a/net/netfilter/ipvs/ip_vs_ctl.c
+++ b/net/netfilter/ipvs/ip_vs_ctl.c
@@ -2816,17 +2816,17 @@ static int ip_vs_genl_fill_stats(struct sk_buff *skb, int container_type,
2816 2816
2817 ip_vs_copy_stats(&ustats, stats); 2817 ip_vs_copy_stats(&ustats, stats);
2818 2818
2819 NLA_PUT_U32(skb, IPVS_STATS_ATTR_CONNS, ustats.conns); 2819 if (nla_put_u32(skb, IPVS_STATS_ATTR_CONNS, ustats.conns) ||
2820 NLA_PUT_U32(skb, IPVS_STATS_ATTR_INPKTS, ustats.inpkts); 2820 nla_put_u32(skb, IPVS_STATS_ATTR_INPKTS, ustats.inpkts) ||
2821 NLA_PUT_U32(skb, IPVS_STATS_ATTR_OUTPKTS, ustats.outpkts); 2821 nla_put_u32(skb, IPVS_STATS_ATTR_OUTPKTS, ustats.outpkts) ||
2822 NLA_PUT_U64(skb, IPVS_STATS_ATTR_INBYTES, ustats.inbytes); 2822 nla_put_u64(skb, IPVS_STATS_ATTR_INBYTES, ustats.inbytes) ||
2823 NLA_PUT_U64(skb, IPVS_STATS_ATTR_OUTBYTES, ustats.outbytes); 2823 nla_put_u64(skb, IPVS_STATS_ATTR_OUTBYTES, ustats.outbytes) ||
2824 NLA_PUT_U32(skb, IPVS_STATS_ATTR_CPS, ustats.cps); 2824 nla_put_u32(skb, IPVS_STATS_ATTR_CPS, ustats.cps) ||
2825 NLA_PUT_U32(skb, IPVS_STATS_ATTR_INPPS, ustats.inpps); 2825 nla_put_u32(skb, IPVS_STATS_ATTR_INPPS, ustats.inpps) ||
2826 NLA_PUT_U32(skb, IPVS_STATS_ATTR_OUTPPS, ustats.outpps); 2826 nla_put_u32(skb, IPVS_STATS_ATTR_OUTPPS, ustats.outpps) ||
2827 NLA_PUT_U32(skb, IPVS_STATS_ATTR_INBPS, ustats.inbps); 2827 nla_put_u32(skb, IPVS_STATS_ATTR_INBPS, ustats.inbps) ||
2828 NLA_PUT_U32(skb, IPVS_STATS_ATTR_OUTBPS, ustats.outbps); 2828 nla_put_u32(skb, IPVS_STATS_ATTR_OUTBPS, ustats.outbps))
2829 2829 goto nla_put_failure;
2830 nla_nest_end(skb, nl_stats); 2830 nla_nest_end(skb, nl_stats);
2831 2831
2832 return 0; 2832 return 0;
@@ -2847,23 +2847,25 @@ static int ip_vs_genl_fill_service(struct sk_buff *skb,
2847 if (!nl_service) 2847 if (!nl_service)
2848 return -EMSGSIZE; 2848 return -EMSGSIZE;
2849 2849
2850 NLA_PUT_U16(skb, IPVS_SVC_ATTR_AF, svc->af); 2850 if (nla_put_u16(skb, IPVS_SVC_ATTR_AF, svc->af))
2851 2851 goto nla_put_failure;
2852 if (svc->fwmark) { 2852 if (svc->fwmark) {
2853 NLA_PUT_U32(skb, IPVS_SVC_ATTR_FWMARK, svc->fwmark); 2853 if (nla_put_u32(skb, IPVS_SVC_ATTR_FWMARK, svc->fwmark))
2854 goto nla_put_failure;
2854 } else { 2855 } else {
2855 NLA_PUT_U16(skb, IPVS_SVC_ATTR_PROTOCOL, svc->protocol); 2856 if (nla_put_u16(skb, IPVS_SVC_ATTR_PROTOCOL, svc->protocol) ||
2856 NLA_PUT(skb, IPVS_SVC_ATTR_ADDR, sizeof(svc->addr), &svc->addr); 2857 nla_put(skb, IPVS_SVC_ATTR_ADDR, sizeof(svc->addr), &svc->addr) ||
2857 NLA_PUT_U16(skb, IPVS_SVC_ATTR_PORT, svc->port); 2858 nla_put_u16(skb, IPVS_SVC_ATTR_PORT, svc->port))
2859 goto nla_put_failure;
2858 } 2860 }
2859 2861
2860 NLA_PUT_STRING(skb, IPVS_SVC_ATTR_SCHED_NAME, svc->scheduler->name); 2862 if (nla_put_string(skb, IPVS_SVC_ATTR_SCHED_NAME, svc->scheduler->name) ||
2861 if (svc->pe) 2863 (svc->pe &&
2862 NLA_PUT_STRING(skb, IPVS_SVC_ATTR_PE_NAME, svc->pe->name); 2864 nla_put_string(skb, IPVS_SVC_ATTR_PE_NAME, svc->pe->name)) ||
2863 NLA_PUT(skb, IPVS_SVC_ATTR_FLAGS, sizeof(flags), &flags); 2865 nla_put(skb, IPVS_SVC_ATTR_FLAGS, sizeof(flags), &flags) ||
2864 NLA_PUT_U32(skb, IPVS_SVC_ATTR_TIMEOUT, svc->timeout / HZ); 2866 nla_put_u32(skb, IPVS_SVC_ATTR_TIMEOUT, svc->timeout / HZ) ||
2865 NLA_PUT_U32(skb, IPVS_SVC_ATTR_NETMASK, svc->netmask); 2867 nla_put_u32(skb, IPVS_SVC_ATTR_NETMASK, svc->netmask))
2866 2868 goto nla_put_failure;
2867 if (ip_vs_genl_fill_stats(skb, IPVS_SVC_ATTR_STATS, &svc->stats)) 2869 if (ip_vs_genl_fill_stats(skb, IPVS_SVC_ATTR_STATS, &svc->stats))
2868 goto nla_put_failure; 2870 goto nla_put_failure;
2869 2871
@@ -3038,21 +3040,22 @@ static int ip_vs_genl_fill_dest(struct sk_buff *skb, struct ip_vs_dest *dest)
3038 if (!nl_dest) 3040 if (!nl_dest)
3039 return -EMSGSIZE; 3041 return -EMSGSIZE;
3040 3042
3041 NLA_PUT(skb, IPVS_DEST_ATTR_ADDR, sizeof(dest->addr), &dest->addr); 3043 if (nla_put(skb, IPVS_DEST_ATTR_ADDR, sizeof(dest->addr), &dest->addr) ||
3042 NLA_PUT_U16(skb, IPVS_DEST_ATTR_PORT, dest->port); 3044 nla_put_u16(skb, IPVS_DEST_ATTR_PORT, dest->port) ||
3043 3045 nla_put_u32(skb, IPVS_DEST_ATTR_FWD_METHOD,
3044 NLA_PUT_U32(skb, IPVS_DEST_ATTR_FWD_METHOD, 3046 (atomic_read(&dest->conn_flags) &
3045 atomic_read(&dest->conn_flags) & IP_VS_CONN_F_FWD_MASK); 3047 IP_VS_CONN_F_FWD_MASK)) ||
3046 NLA_PUT_U32(skb, IPVS_DEST_ATTR_WEIGHT, atomic_read(&dest->weight)); 3048 nla_put_u32(skb, IPVS_DEST_ATTR_WEIGHT,
3047 NLA_PUT_U32(skb, IPVS_DEST_ATTR_U_THRESH, dest->u_threshold); 3049 atomic_read(&dest->weight)) ||
3048 NLA_PUT_U32(skb, IPVS_DEST_ATTR_L_THRESH, dest->l_threshold); 3050 nla_put_u32(skb, IPVS_DEST_ATTR_U_THRESH, dest->u_threshold) ||
3049 NLA_PUT_U32(skb, IPVS_DEST_ATTR_ACTIVE_CONNS, 3051 nla_put_u32(skb, IPVS_DEST_ATTR_L_THRESH, dest->l_threshold) ||
3050 atomic_read(&dest->activeconns)); 3052 nla_put_u32(skb, IPVS_DEST_ATTR_ACTIVE_CONNS,
3051 NLA_PUT_U32(skb, IPVS_DEST_ATTR_INACT_CONNS, 3053 atomic_read(&dest->activeconns)) ||
3052 atomic_read(&dest->inactconns)); 3054 nla_put_u32(skb, IPVS_DEST_ATTR_INACT_CONNS,
3053 NLA_PUT_U32(skb, IPVS_DEST_ATTR_PERSIST_CONNS, 3055 atomic_read(&dest->inactconns)) ||
3054 atomic_read(&dest->persistconns)); 3056 nla_put_u32(skb, IPVS_DEST_ATTR_PERSIST_CONNS,
3055 3057 atomic_read(&dest->persistconns)))
3058 goto nla_put_failure;
3056 if (ip_vs_genl_fill_stats(skb, IPVS_DEST_ATTR_STATS, &dest->stats)) 3059 if (ip_vs_genl_fill_stats(skb, IPVS_DEST_ATTR_STATS, &dest->stats))
3057 goto nla_put_failure; 3060 goto nla_put_failure;
3058 3061
@@ -3181,10 +3184,10 @@ static int ip_vs_genl_fill_daemon(struct sk_buff *skb, __be32 state,
3181 if (!nl_daemon) 3184 if (!nl_daemon)
3182 return -EMSGSIZE; 3185 return -EMSGSIZE;
3183 3186
3184 NLA_PUT_U32(skb, IPVS_DAEMON_ATTR_STATE, state); 3187 if (nla_put_u32(skb, IPVS_DAEMON_ATTR_STATE, state) ||
3185 NLA_PUT_STRING(skb, IPVS_DAEMON_ATTR_MCAST_IFN, mcast_ifn); 3188 nla_put_string(skb, IPVS_DAEMON_ATTR_MCAST_IFN, mcast_ifn) ||
3186 NLA_PUT_U32(skb, IPVS_DAEMON_ATTR_SYNC_ID, syncid); 3189 nla_put_u32(skb, IPVS_DAEMON_ATTR_SYNC_ID, syncid))
3187 3190 goto nla_put_failure;
3188 nla_nest_end(skb, nl_daemon); 3191 nla_nest_end(skb, nl_daemon);
3189 3192
3190 return 0; 3193 return 0;
@@ -3473,21 +3476,26 @@ static int ip_vs_genl_get_cmd(struct sk_buff *skb, struct genl_info *info)
3473 3476
3474 __ip_vs_get_timeouts(net, &t); 3477 __ip_vs_get_timeouts(net, &t);
3475#ifdef CONFIG_IP_VS_PROTO_TCP 3478#ifdef CONFIG_IP_VS_PROTO_TCP
3476 NLA_PUT_U32(msg, IPVS_CMD_ATTR_TIMEOUT_TCP, t.tcp_timeout); 3479 if (nla_put_u32(msg, IPVS_CMD_ATTR_TIMEOUT_TCP,
3477 NLA_PUT_U32(msg, IPVS_CMD_ATTR_TIMEOUT_TCP_FIN, 3480 t.tcp_timeout) ||
3478 t.tcp_fin_timeout); 3481 nla_put_u32(msg, IPVS_CMD_ATTR_TIMEOUT_TCP_FIN,
3482 t.tcp_fin_timeout))
3483 goto nla_put_failure;
3479#endif 3484#endif
3480#ifdef CONFIG_IP_VS_PROTO_UDP 3485#ifdef CONFIG_IP_VS_PROTO_UDP
3481 NLA_PUT_U32(msg, IPVS_CMD_ATTR_TIMEOUT_UDP, t.udp_timeout); 3486 if (nla_put_u32(msg, IPVS_CMD_ATTR_TIMEOUT_UDP, t.udp_timeout))
3487 goto nla_put_failure;
3482#endif 3488#endif
3483 3489
3484 break; 3490 break;
3485 } 3491 }
3486 3492
3487 case IPVS_CMD_GET_INFO: 3493 case IPVS_CMD_GET_INFO:
3488 NLA_PUT_U32(msg, IPVS_INFO_ATTR_VERSION, IP_VS_VERSION_CODE); 3494 if (nla_put_u32(msg, IPVS_INFO_ATTR_VERSION,
3489 NLA_PUT_U32(msg, IPVS_INFO_ATTR_CONN_TAB_SIZE, 3495 IP_VS_VERSION_CODE) ||
3490 ip_vs_conn_tab_size); 3496 nla_put_u32(msg, IPVS_INFO_ATTR_CONN_TAB_SIZE,
3497 ip_vs_conn_tab_size))
3498 goto nla_put_failure;
3491 break; 3499 break;
3492 } 3500 }
3493 3501
diff --git a/net/netfilter/nf_conntrack_core.c b/net/netfilter/nf_conntrack_core.c
index 3cc4487ac349..6cd8e32e281c 100644
--- a/net/netfilter/nf_conntrack_core.c
+++ b/net/netfilter/nf_conntrack_core.c
@@ -1152,8 +1152,9 @@ static struct nf_ct_ext_type nf_ct_zone_extend __read_mostly = {
1152int nf_ct_port_tuple_to_nlattr(struct sk_buff *skb, 1152int nf_ct_port_tuple_to_nlattr(struct sk_buff *skb,
1153 const struct nf_conntrack_tuple *tuple) 1153 const struct nf_conntrack_tuple *tuple)
1154{ 1154{
1155 NLA_PUT_BE16(skb, CTA_PROTO_SRC_PORT, tuple->src.u.tcp.port); 1155 if (nla_put_be16(skb, CTA_PROTO_SRC_PORT, tuple->src.u.tcp.port) ||
1156 NLA_PUT_BE16(skb, CTA_PROTO_DST_PORT, tuple->dst.u.tcp.port); 1156 nla_put_be16(skb, CTA_PROTO_DST_PORT, tuple->dst.u.tcp.port))
1157 goto nla_put_failure;
1157 return 0; 1158 return 0;
1158 1159
1159nla_put_failure: 1160nla_put_failure:
diff --git a/net/netfilter/nf_conntrack_netlink.c b/net/netfilter/nf_conntrack_netlink.c
index ca7e8354e4f8..462ec2dbe561 100644
--- a/net/netfilter/nf_conntrack_netlink.c
+++ b/net/netfilter/nf_conntrack_netlink.c
@@ -66,7 +66,8 @@ ctnetlink_dump_tuples_proto(struct sk_buff *skb,
66 nest_parms = nla_nest_start(skb, CTA_TUPLE_PROTO | NLA_F_NESTED); 66 nest_parms = nla_nest_start(skb, CTA_TUPLE_PROTO | NLA_F_NESTED);
67 if (!nest_parms) 67 if (!nest_parms)
68 goto nla_put_failure; 68 goto nla_put_failure;
69 NLA_PUT_U8(skb, CTA_PROTO_NUM, tuple->dst.protonum); 69 if (nla_put_u8(skb, CTA_PROTO_NUM, tuple->dst.protonum))
70 goto nla_put_failure;
70 71
71 if (likely(l4proto->tuple_to_nlattr)) 72 if (likely(l4proto->tuple_to_nlattr))
72 ret = l4proto->tuple_to_nlattr(skb, tuple); 73 ret = l4proto->tuple_to_nlattr(skb, tuple);
@@ -126,7 +127,8 @@ ctnetlink_dump_tuples(struct sk_buff *skb,
126static inline int 127static inline int
127ctnetlink_dump_status(struct sk_buff *skb, const struct nf_conn *ct) 128ctnetlink_dump_status(struct sk_buff *skb, const struct nf_conn *ct)
128{ 129{
129 NLA_PUT_BE32(skb, CTA_STATUS, htonl(ct->status)); 130 if (nla_put_be32(skb, CTA_STATUS, htonl(ct->status)))
131 goto nla_put_failure;
130 return 0; 132 return 0;
131 133
132nla_put_failure: 134nla_put_failure:
@@ -141,7 +143,8 @@ ctnetlink_dump_timeout(struct sk_buff *skb, const struct nf_conn *ct)
141 if (timeout < 0) 143 if (timeout < 0)
142 timeout = 0; 144 timeout = 0;
143 145
144 NLA_PUT_BE32(skb, CTA_TIMEOUT, htonl(timeout)); 146 if (nla_put_be32(skb, CTA_TIMEOUT, htonl(timeout)))
147 goto nla_put_failure;
145 return 0; 148 return 0;
146 149
147nla_put_failure: 150nla_put_failure:
@@ -190,7 +193,8 @@ ctnetlink_dump_helpinfo(struct sk_buff *skb, const struct nf_conn *ct)
190 nest_helper = nla_nest_start(skb, CTA_HELP | NLA_F_NESTED); 193 nest_helper = nla_nest_start(skb, CTA_HELP | NLA_F_NESTED);
191 if (!nest_helper) 194 if (!nest_helper)
192 goto nla_put_failure; 195 goto nla_put_failure;
193 NLA_PUT_STRING(skb, CTA_HELP_NAME, helper->name); 196 if (nla_put_string(skb, CTA_HELP_NAME, helper->name))
197 goto nla_put_failure;
194 198
195 if (helper->to_nlattr) 199 if (helper->to_nlattr)
196 helper->to_nlattr(skb, ct); 200 helper->to_nlattr(skb, ct);
@@ -214,8 +218,9 @@ dump_counters(struct sk_buff *skb, u64 pkts, u64 bytes,
214 if (!nest_count) 218 if (!nest_count)
215 goto nla_put_failure; 219 goto nla_put_failure;
216 220
217 NLA_PUT_BE64(skb, CTA_COUNTERS_PACKETS, cpu_to_be64(pkts)); 221 if (nla_put_be64(skb, CTA_COUNTERS_PACKETS, cpu_to_be64(pkts)) ||
218 NLA_PUT_BE64(skb, CTA_COUNTERS_BYTES, cpu_to_be64(bytes)); 222 nla_put_be64(skb, CTA_COUNTERS_BYTES, cpu_to_be64(bytes)))
223 goto nla_put_failure;
219 224
220 nla_nest_end(skb, nest_count); 225 nla_nest_end(skb, nest_count);
221 226
@@ -260,11 +265,10 @@ ctnetlink_dump_timestamp(struct sk_buff *skb, const struct nf_conn *ct)
260 if (!nest_count) 265 if (!nest_count)
261 goto nla_put_failure; 266 goto nla_put_failure;
262 267
263 NLA_PUT_BE64(skb, CTA_TIMESTAMP_START, cpu_to_be64(tstamp->start)); 268 if (nla_put_be64(skb, CTA_TIMESTAMP_START, cpu_to_be64(tstamp->start)) ||
264 if (tstamp->stop != 0) { 269 (tstamp->stop != 0 && nla_put_be64(skb, CTA_TIMESTAMP_STOP,
265 NLA_PUT_BE64(skb, CTA_TIMESTAMP_STOP, 270 cpu_to_be64(tstamp->stop))))
266 cpu_to_be64(tstamp->stop)); 271 goto nla_put_failure;
267 }
268 nla_nest_end(skb, nest_count); 272 nla_nest_end(skb, nest_count);
269 273
270 return 0; 274 return 0;
@@ -277,7 +281,8 @@ nla_put_failure:
277static inline int 281static inline int
278ctnetlink_dump_mark(struct sk_buff *skb, const struct nf_conn *ct) 282ctnetlink_dump_mark(struct sk_buff *skb, const struct nf_conn *ct)
279{ 283{
280 NLA_PUT_BE32(skb, CTA_MARK, htonl(ct->mark)); 284 if (nla_put_be32(skb, CTA_MARK, htonl(ct->mark)))
285 goto nla_put_failure;
281 return 0; 286 return 0;
282 287
283nla_put_failure: 288nla_put_failure:
@@ -304,7 +309,8 @@ ctnetlink_dump_secctx(struct sk_buff *skb, const struct nf_conn *ct)
304 if (!nest_secctx) 309 if (!nest_secctx)
305 goto nla_put_failure; 310 goto nla_put_failure;
306 311
307 NLA_PUT_STRING(skb, CTA_SECCTX_NAME, secctx); 312 if (nla_put_string(skb, CTA_SECCTX_NAME, secctx))
313 goto nla_put_failure;
308 nla_nest_end(skb, nest_secctx); 314 nla_nest_end(skb, nest_secctx);
309 315
310 ret = 0; 316 ret = 0;
@@ -349,12 +355,13 @@ dump_nat_seq_adj(struct sk_buff *skb, const struct nf_nat_seq *natseq, int type)
349 if (!nest_parms) 355 if (!nest_parms)
350 goto nla_put_failure; 356 goto nla_put_failure;
351 357
352 NLA_PUT_BE32(skb, CTA_NAT_SEQ_CORRECTION_POS, 358 if (nla_put_be32(skb, CTA_NAT_SEQ_CORRECTION_POS,
353 htonl(natseq->correction_pos)); 359 htonl(natseq->correction_pos)) ||
354 NLA_PUT_BE32(skb, CTA_NAT_SEQ_OFFSET_BEFORE, 360 nla_put_be32(skb, CTA_NAT_SEQ_OFFSET_BEFORE,
355 htonl(natseq->offset_before)); 361 htonl(natseq->offset_before)) ||
356 NLA_PUT_BE32(skb, CTA_NAT_SEQ_OFFSET_AFTER, 362 nla_put_be32(skb, CTA_NAT_SEQ_OFFSET_AFTER,
357 htonl(natseq->offset_after)); 363 htonl(natseq->offset_after)))
364 goto nla_put_failure;
358 365
359 nla_nest_end(skb, nest_parms); 366 nla_nest_end(skb, nest_parms);
360 367
@@ -390,7 +397,8 @@ ctnetlink_dump_nat_seq_adj(struct sk_buff *skb, const struct nf_conn *ct)
390static inline int 397static inline int
391ctnetlink_dump_id(struct sk_buff *skb, const struct nf_conn *ct) 398ctnetlink_dump_id(struct sk_buff *skb, const struct nf_conn *ct)
392{ 399{
393 NLA_PUT_BE32(skb, CTA_ID, htonl((unsigned long)ct)); 400 if (nla_put_be32(skb, CTA_ID, htonl((unsigned long)ct)))
401 goto nla_put_failure;
394 return 0; 402 return 0;
395 403
396nla_put_failure: 404nla_put_failure:
@@ -400,7 +408,8 @@ nla_put_failure:
400static inline int 408static inline int
401ctnetlink_dump_use(struct sk_buff *skb, const struct nf_conn *ct) 409ctnetlink_dump_use(struct sk_buff *skb, const struct nf_conn *ct)
402{ 410{
403 NLA_PUT_BE32(skb, CTA_USE, htonl(atomic_read(&ct->ct_general.use))); 411 if (nla_put_be32(skb, CTA_USE, htonl(atomic_read(&ct->ct_general.use))))
412 goto nla_put_failure;
404 return 0; 413 return 0;
405 414
406nla_put_failure: 415nla_put_failure:
@@ -440,8 +449,9 @@ ctnetlink_fill_info(struct sk_buff *skb, u32 pid, u32 seq, u32 type,
440 goto nla_put_failure; 449 goto nla_put_failure;
441 nla_nest_end(skb, nest_parms); 450 nla_nest_end(skb, nest_parms);
442 451
443 if (nf_ct_zone(ct)) 452 if (nf_ct_zone(ct) &&
444 NLA_PUT_BE16(skb, CTA_ZONE, htons(nf_ct_zone(ct))); 453 nla_put_be16(skb, CTA_ZONE, htons(nf_ct_zone(ct))))
454 goto nla_put_failure;
445 455
446 if (ctnetlink_dump_status(skb, ct) < 0 || 456 if (ctnetlink_dump_status(skb, ct) < 0 ||
447 ctnetlink_dump_timeout(skb, ct) < 0 || 457 ctnetlink_dump_timeout(skb, ct) < 0 ||
@@ -617,8 +627,9 @@ ctnetlink_conntrack_event(unsigned int events, struct nf_ct_event *item)
617 goto nla_put_failure; 627 goto nla_put_failure;
618 nla_nest_end(skb, nest_parms); 628 nla_nest_end(skb, nest_parms);
619 629
620 if (nf_ct_zone(ct)) 630 if (nf_ct_zone(ct) &&
621 NLA_PUT_BE16(skb, CTA_ZONE, htons(nf_ct_zone(ct))); 631 nla_put_be16(skb, CTA_ZONE, htons(nf_ct_zone(ct))))
632 goto nla_put_failure;
622 633
623 if (ctnetlink_dump_id(skb, ct) < 0) 634 if (ctnetlink_dump_id(skb, ct) < 0)
624 goto nla_put_failure; 635 goto nla_put_failure;
@@ -1705,7 +1716,8 @@ ctnetlink_exp_dump_expect(struct sk_buff *skb,
1705 if (!nest_parms) 1716 if (!nest_parms)
1706 goto nla_put_failure; 1717 goto nla_put_failure;
1707 1718
1708 NLA_PUT_BE32(skb, CTA_EXPECT_NAT_DIR, htonl(exp->dir)); 1719 if (nla_put_be32(skb, CTA_EXPECT_NAT_DIR, htonl(exp->dir)))
1720 goto nla_put_failure;
1709 1721
1710 nat_tuple.src.l3num = nf_ct_l3num(master); 1722 nat_tuple.src.l3num = nf_ct_l3num(master);
1711 nat_tuple.src.u3.ip = exp->saved_ip; 1723 nat_tuple.src.u3.ip = exp->saved_ip;
@@ -1718,21 +1730,24 @@ ctnetlink_exp_dump_expect(struct sk_buff *skb,
1718 nla_nest_end(skb, nest_parms); 1730 nla_nest_end(skb, nest_parms);
1719 } 1731 }
1720#endif 1732#endif
1721 NLA_PUT_BE32(skb, CTA_EXPECT_TIMEOUT, htonl(timeout)); 1733 if (nla_put_be32(skb, CTA_EXPECT_TIMEOUT, htonl(timeout)) ||
1722 NLA_PUT_BE32(skb, CTA_EXPECT_ID, htonl((unsigned long)exp)); 1734 nla_put_be32(skb, CTA_EXPECT_ID, htonl((unsigned long)exp)) ||
1723 NLA_PUT_BE32(skb, CTA_EXPECT_FLAGS, htonl(exp->flags)); 1735 nla_put_be32(skb, CTA_EXPECT_FLAGS, htonl(exp->flags)) ||
1724 NLA_PUT_BE32(skb, CTA_EXPECT_CLASS, htonl(exp->class)); 1736 nla_put_be32(skb, CTA_EXPECT_CLASS, htonl(exp->class)))
1737 goto nla_put_failure;
1725 help = nfct_help(master); 1738 help = nfct_help(master);
1726 if (help) { 1739 if (help) {
1727 struct nf_conntrack_helper *helper; 1740 struct nf_conntrack_helper *helper;
1728 1741
1729 helper = rcu_dereference(help->helper); 1742 helper = rcu_dereference(help->helper);
1730 if (helper) 1743 if (helper &&
1731 NLA_PUT_STRING(skb, CTA_EXPECT_HELP_NAME, helper->name); 1744 nla_put_string(skb, CTA_EXPECT_HELP_NAME, helper->name))
1745 goto nla_put_failure;
1732 } 1746 }
1733 expfn = nf_ct_helper_expectfn_find_by_symbol(exp->expectfn); 1747 expfn = nf_ct_helper_expectfn_find_by_symbol(exp->expectfn);
1734 if (expfn != NULL) 1748 if (expfn != NULL &&
1735 NLA_PUT_STRING(skb, CTA_EXPECT_FN, expfn->name); 1749 nla_put_string(skb, CTA_EXPECT_FN, expfn->name))
1750 goto nla_put_failure;
1736 1751
1737 return 0; 1752 return 0;
1738 1753
diff --git a/net/netfilter/nf_conntrack_proto_dccp.c b/net/netfilter/nf_conntrack_proto_dccp.c
index 24fdce256cb0..a58998d0912f 100644
--- a/net/netfilter/nf_conntrack_proto_dccp.c
+++ b/net/netfilter/nf_conntrack_proto_dccp.c
@@ -643,11 +643,12 @@ static int dccp_to_nlattr(struct sk_buff *skb, struct nlattr *nla,
643 nest_parms = nla_nest_start(skb, CTA_PROTOINFO_DCCP | NLA_F_NESTED); 643 nest_parms = nla_nest_start(skb, CTA_PROTOINFO_DCCP | NLA_F_NESTED);
644 if (!nest_parms) 644 if (!nest_parms)
645 goto nla_put_failure; 645 goto nla_put_failure;
646 NLA_PUT_U8(skb, CTA_PROTOINFO_DCCP_STATE, ct->proto.dccp.state); 646 if (nla_put_u8(skb, CTA_PROTOINFO_DCCP_STATE, ct->proto.dccp.state) ||
647 NLA_PUT_U8(skb, CTA_PROTOINFO_DCCP_ROLE, 647 nla_put_u8(skb, CTA_PROTOINFO_DCCP_ROLE,
648 ct->proto.dccp.role[IP_CT_DIR_ORIGINAL]); 648 ct->proto.dccp.role[IP_CT_DIR_ORIGINAL]) ||
649 NLA_PUT_BE64(skb, CTA_PROTOINFO_DCCP_HANDSHAKE_SEQ, 649 nla_put_be64(skb, CTA_PROTOINFO_DCCP_HANDSHAKE_SEQ,
650 cpu_to_be64(ct->proto.dccp.handshake_seq)); 650 cpu_to_be64(ct->proto.dccp.handshake_seq)))
651 goto nla_put_failure;
651 nla_nest_end(skb, nest_parms); 652 nla_nest_end(skb, nest_parms);
652 spin_unlock_bh(&ct->lock); 653 spin_unlock_bh(&ct->lock);
653 return 0; 654 return 0;
@@ -739,9 +740,10 @@ dccp_timeout_obj_to_nlattr(struct sk_buff *skb, const void *data)
739 const unsigned int *timeouts = data; 740 const unsigned int *timeouts = data;
740 int i; 741 int i;
741 742
742 for (i=CTA_TIMEOUT_DCCP_UNSPEC+1; i<CTA_TIMEOUT_DCCP_MAX+1; i++) 743 for (i=CTA_TIMEOUT_DCCP_UNSPEC+1; i<CTA_TIMEOUT_DCCP_MAX+1; i++) {
743 NLA_PUT_BE32(skb, i, htonl(timeouts[i] / HZ)); 744 if (nla_put_be32(skb, i, htonl(timeouts[i] / HZ)))
744 745 goto nla_put_failure;
746 }
745 return 0; 747 return 0;
746 748
747nla_put_failure: 749nla_put_failure:
diff --git a/net/netfilter/nf_conntrack_proto_generic.c b/net/netfilter/nf_conntrack_proto_generic.c
index 835e24c58f0d..d8923d54b358 100644
--- a/net/netfilter/nf_conntrack_proto_generic.c
+++ b/net/netfilter/nf_conntrack_proto_generic.c
@@ -90,7 +90,8 @@ generic_timeout_obj_to_nlattr(struct sk_buff *skb, const void *data)
90{ 90{
91 const unsigned int *timeout = data; 91 const unsigned int *timeout = data;
92 92
93 NLA_PUT_BE32(skb, CTA_TIMEOUT_GENERIC_TIMEOUT, htonl(*timeout / HZ)); 93 if (nla_put_be32(skb, CTA_TIMEOUT_GENERIC_TIMEOUT, htonl(*timeout / HZ)))
94 goto nla_put_failure;
94 95
95 return 0; 96 return 0;
96 97
diff --git a/net/netfilter/nf_conntrack_proto_gre.c b/net/netfilter/nf_conntrack_proto_gre.c
index 659648c4b14a..4bf6b4e4b776 100644
--- a/net/netfilter/nf_conntrack_proto_gre.c
+++ b/net/netfilter/nf_conntrack_proto_gre.c
@@ -321,10 +321,11 @@ gre_timeout_obj_to_nlattr(struct sk_buff *skb, const void *data)
321{ 321{
322 const unsigned int *timeouts = data; 322 const unsigned int *timeouts = data;
323 323
324 NLA_PUT_BE32(skb, CTA_TIMEOUT_GRE_UNREPLIED, 324 if (nla_put_be32(skb, CTA_TIMEOUT_GRE_UNREPLIED,
325 htonl(timeouts[GRE_CT_UNREPLIED] / HZ)); 325 htonl(timeouts[GRE_CT_UNREPLIED] / HZ)) ||
326 NLA_PUT_BE32(skb, CTA_TIMEOUT_GRE_REPLIED, 326 nla_put_be32(skb, CTA_TIMEOUT_GRE_REPLIED,
327 htonl(timeouts[GRE_CT_REPLIED] / HZ)); 327 htonl(timeouts[GRE_CT_REPLIED] / HZ)))
328 goto nla_put_failure;
328 return 0; 329 return 0;
329 330
330nla_put_failure: 331nla_put_failure:
diff --git a/net/netfilter/nf_conntrack_proto_sctp.c b/net/netfilter/nf_conntrack_proto_sctp.c
index 72b5088592dc..996db2fa21f7 100644
--- a/net/netfilter/nf_conntrack_proto_sctp.c
+++ b/net/netfilter/nf_conntrack_proto_sctp.c
@@ -482,15 +482,12 @@ static int sctp_to_nlattr(struct sk_buff *skb, struct nlattr *nla,
482 if (!nest_parms) 482 if (!nest_parms)
483 goto nla_put_failure; 483 goto nla_put_failure;
484 484
485 NLA_PUT_U8(skb, CTA_PROTOINFO_SCTP_STATE, ct->proto.sctp.state); 485 if (nla_put_u8(skb, CTA_PROTOINFO_SCTP_STATE, ct->proto.sctp.state) ||
486 486 nla_put_be32(skb, CTA_PROTOINFO_SCTP_VTAG_ORIGINAL,
487 NLA_PUT_BE32(skb, 487 ct->proto.sctp.vtag[IP_CT_DIR_ORIGINAL]) ||
488 CTA_PROTOINFO_SCTP_VTAG_ORIGINAL, 488 nla_put_be32(skb, CTA_PROTOINFO_SCTP_VTAG_REPLY,
489 ct->proto.sctp.vtag[IP_CT_DIR_ORIGINAL]); 489 ct->proto.sctp.vtag[IP_CT_DIR_REPLY]))
490 490 goto nla_put_failure;
491 NLA_PUT_BE32(skb,
492 CTA_PROTOINFO_SCTP_VTAG_REPLY,
493 ct->proto.sctp.vtag[IP_CT_DIR_REPLY]);
494 491
495 spin_unlock_bh(&ct->lock); 492 spin_unlock_bh(&ct->lock);
496 493
@@ -578,9 +575,10 @@ sctp_timeout_obj_to_nlattr(struct sk_buff *skb, const void *data)
578 const unsigned int *timeouts = data; 575 const unsigned int *timeouts = data;
579 int i; 576 int i;
580 577
581 for (i=CTA_TIMEOUT_SCTP_UNSPEC+1; i<CTA_TIMEOUT_SCTP_MAX+1; i++) 578 for (i=CTA_TIMEOUT_SCTP_UNSPEC+1; i<CTA_TIMEOUT_SCTP_MAX+1; i++) {
582 NLA_PUT_BE32(skb, i, htonl(timeouts[i] / HZ)); 579 if (nla_put_be32(skb, i, htonl(timeouts[i] / HZ)))
583 580 goto nla_put_failure;
581 }
584 return 0; 582 return 0;
585 583
586nla_put_failure: 584nla_put_failure:
diff --git a/net/netfilter/nf_conntrack_proto_tcp.c b/net/netfilter/nf_conntrack_proto_tcp.c
index 361eade62a09..cc558162493b 100644
--- a/net/netfilter/nf_conntrack_proto_tcp.c
+++ b/net/netfilter/nf_conntrack_proto_tcp.c
@@ -1147,21 +1147,22 @@ static int tcp_to_nlattr(struct sk_buff *skb, struct nlattr *nla,
1147 if (!nest_parms) 1147 if (!nest_parms)
1148 goto nla_put_failure; 1148 goto nla_put_failure;
1149 1149
1150 NLA_PUT_U8(skb, CTA_PROTOINFO_TCP_STATE, ct->proto.tcp.state); 1150 if (nla_put_u8(skb, CTA_PROTOINFO_TCP_STATE, ct->proto.tcp.state) ||
1151 1151 nla_put_u8(skb, CTA_PROTOINFO_TCP_WSCALE_ORIGINAL,
1152 NLA_PUT_U8(skb, CTA_PROTOINFO_TCP_WSCALE_ORIGINAL, 1152 ct->proto.tcp.seen[0].td_scale) ||
1153 ct->proto.tcp.seen[0].td_scale); 1153 nla_put_u8(skb, CTA_PROTOINFO_TCP_WSCALE_REPLY,
1154 1154 ct->proto.tcp.seen[1].td_scale))
1155 NLA_PUT_U8(skb, CTA_PROTOINFO_TCP_WSCALE_REPLY, 1155 goto nla_put_failure;
1156 ct->proto.tcp.seen[1].td_scale);
1157 1156
1158 tmp.flags = ct->proto.tcp.seen[0].flags; 1157 tmp.flags = ct->proto.tcp.seen[0].flags;
1159 NLA_PUT(skb, CTA_PROTOINFO_TCP_FLAGS_ORIGINAL, 1158 if (nla_put(skb, CTA_PROTOINFO_TCP_FLAGS_ORIGINAL,
1160 sizeof(struct nf_ct_tcp_flags), &tmp); 1159 sizeof(struct nf_ct_tcp_flags), &tmp))
1160 goto nla_put_failure;
1161 1161
1162 tmp.flags = ct->proto.tcp.seen[1].flags; 1162 tmp.flags = ct->proto.tcp.seen[1].flags;
1163 NLA_PUT(skb, CTA_PROTOINFO_TCP_FLAGS_REPLY, 1163 if (nla_put(skb, CTA_PROTOINFO_TCP_FLAGS_REPLY,
1164 sizeof(struct nf_ct_tcp_flags), &tmp); 1164 sizeof(struct nf_ct_tcp_flags), &tmp))
1165 goto nla_put_failure;
1165 spin_unlock_bh(&ct->lock); 1166 spin_unlock_bh(&ct->lock);
1166 1167
1167 nla_nest_end(skb, nest_parms); 1168 nla_nest_end(skb, nest_parms);
@@ -1310,28 +1311,29 @@ tcp_timeout_obj_to_nlattr(struct sk_buff *skb, const void *data)
1310{ 1311{
1311 const unsigned int *timeouts = data; 1312 const unsigned int *timeouts = data;
1312 1313
1313 NLA_PUT_BE32(skb, CTA_TIMEOUT_TCP_SYN_SENT, 1314 if (nla_put_be32(skb, CTA_TIMEOUT_TCP_SYN_SENT,
1314 htonl(timeouts[TCP_CONNTRACK_SYN_SENT] / HZ)); 1315 htonl(timeouts[TCP_CONNTRACK_SYN_SENT] / HZ)) ||
1315 NLA_PUT_BE32(skb, CTA_TIMEOUT_TCP_SYN_RECV, 1316 nla_put_be32(skb, CTA_TIMEOUT_TCP_SYN_RECV,
1316 htonl(timeouts[TCP_CONNTRACK_SYN_RECV] / HZ)); 1317 htonl(timeouts[TCP_CONNTRACK_SYN_RECV] / HZ)) ||
1317 NLA_PUT_BE32(skb, CTA_TIMEOUT_TCP_ESTABLISHED, 1318 nla_put_be32(skb, CTA_TIMEOUT_TCP_ESTABLISHED,
1318 htonl(timeouts[TCP_CONNTRACK_ESTABLISHED] / HZ)); 1319 htonl(timeouts[TCP_CONNTRACK_ESTABLISHED] / HZ)) ||
1319 NLA_PUT_BE32(skb, CTA_TIMEOUT_TCP_FIN_WAIT, 1320 nla_put_be32(skb, CTA_TIMEOUT_TCP_FIN_WAIT,
1320 htonl(timeouts[TCP_CONNTRACK_FIN_WAIT] / HZ)); 1321 htonl(timeouts[TCP_CONNTRACK_FIN_WAIT] / HZ)) ||
1321 NLA_PUT_BE32(skb, CTA_TIMEOUT_TCP_CLOSE_WAIT, 1322 nla_put_be32(skb, CTA_TIMEOUT_TCP_CLOSE_WAIT,
1322 htonl(timeouts[TCP_CONNTRACK_CLOSE_WAIT] / HZ)); 1323 htonl(timeouts[TCP_CONNTRACK_CLOSE_WAIT] / HZ)) ||
1323 NLA_PUT_BE32(skb, CTA_TIMEOUT_TCP_LAST_ACK, 1324 nla_put_be32(skb, CTA_TIMEOUT_TCP_LAST_ACK,
1324 htonl(timeouts[TCP_CONNTRACK_LAST_ACK] / HZ)); 1325 htonl(timeouts[TCP_CONNTRACK_LAST_ACK] / HZ)) ||
1325 NLA_PUT_BE32(skb, CTA_TIMEOUT_TCP_TIME_WAIT, 1326 nla_put_be32(skb, CTA_TIMEOUT_TCP_TIME_WAIT,
1326 htonl(timeouts[TCP_CONNTRACK_TIME_WAIT] / HZ)); 1327 htonl(timeouts[TCP_CONNTRACK_TIME_WAIT] / HZ)) ||
1327 NLA_PUT_BE32(skb, CTA_TIMEOUT_TCP_CLOSE, 1328 nla_put_be32(skb, CTA_TIMEOUT_TCP_CLOSE,
1328 htonl(timeouts[TCP_CONNTRACK_CLOSE] / HZ)); 1329 htonl(timeouts[TCP_CONNTRACK_CLOSE] / HZ)) ||
1329 NLA_PUT_BE32(skb, CTA_TIMEOUT_TCP_SYN_SENT2, 1330 nla_put_be32(skb, CTA_TIMEOUT_TCP_SYN_SENT2,
1330 htonl(timeouts[TCP_CONNTRACK_SYN_SENT2] / HZ)); 1331 htonl(timeouts[TCP_CONNTRACK_SYN_SENT2] / HZ)) ||
1331 NLA_PUT_BE32(skb, CTA_TIMEOUT_TCP_RETRANS, 1332 nla_put_be32(skb, CTA_TIMEOUT_TCP_RETRANS,
1332 htonl(timeouts[TCP_CONNTRACK_RETRANS] / HZ)); 1333 htonl(timeouts[TCP_CONNTRACK_RETRANS] / HZ)) ||
1333 NLA_PUT_BE32(skb, CTA_TIMEOUT_TCP_UNACK, 1334 nla_put_be32(skb, CTA_TIMEOUT_TCP_UNACK,
1334 htonl(timeouts[TCP_CONNTRACK_UNACK] / HZ)); 1335 htonl(timeouts[TCP_CONNTRACK_UNACK] / HZ)))
1336 goto nla_put_failure;
1335 return 0; 1337 return 0;
1336 1338
1337nla_put_failure: 1339nla_put_failure:
diff --git a/net/netfilter/nf_conntrack_proto_udp.c b/net/netfilter/nf_conntrack_proto_udp.c
index a9073dc1548d..7259a6bdeb49 100644
--- a/net/netfilter/nf_conntrack_proto_udp.c
+++ b/net/netfilter/nf_conntrack_proto_udp.c
@@ -181,10 +181,11 @@ udp_timeout_obj_to_nlattr(struct sk_buff *skb, const void *data)
181{ 181{
182 const unsigned int *timeouts = data; 182 const unsigned int *timeouts = data;
183 183
184 NLA_PUT_BE32(skb, CTA_TIMEOUT_UDP_UNREPLIED, 184 if (nla_put_be32(skb, CTA_TIMEOUT_UDP_UNREPLIED,
185 htonl(timeouts[UDP_CT_UNREPLIED] / HZ)); 185 htonl(timeouts[UDP_CT_UNREPLIED] / HZ)) ||
186 NLA_PUT_BE32(skb, CTA_TIMEOUT_UDP_REPLIED, 186 nla_put_be32(skb, CTA_TIMEOUT_UDP_REPLIED,
187 htonl(timeouts[UDP_CT_REPLIED] / HZ)); 187 htonl(timeouts[UDP_CT_REPLIED] / HZ)))
188 goto nla_put_failure;
188 return 0; 189 return 0;
189 190
190nla_put_failure: 191nla_put_failure:
diff --git a/net/netfilter/nf_conntrack_proto_udplite.c b/net/netfilter/nf_conntrack_proto_udplite.c
index e0606392cda0..4d60a5376aa6 100644
--- a/net/netfilter/nf_conntrack_proto_udplite.c
+++ b/net/netfilter/nf_conntrack_proto_udplite.c
@@ -185,10 +185,11 @@ udplite_timeout_obj_to_nlattr(struct sk_buff *skb, const void *data)
185{ 185{
186 const unsigned int *timeouts = data; 186 const unsigned int *timeouts = data;
187 187
188 NLA_PUT_BE32(skb, CTA_TIMEOUT_UDPLITE_UNREPLIED, 188 if (nla_put_be32(skb, CTA_TIMEOUT_UDPLITE_UNREPLIED,
189 htonl(timeouts[UDPLITE_CT_UNREPLIED] / HZ)); 189 htonl(timeouts[UDPLITE_CT_UNREPLIED] / HZ)) ||
190 NLA_PUT_BE32(skb, CTA_TIMEOUT_UDPLITE_REPLIED, 190 nla_put_be32(skb, CTA_TIMEOUT_UDPLITE_REPLIED,
191 htonl(timeouts[UDPLITE_CT_REPLIED] / HZ)); 191 htonl(timeouts[UDPLITE_CT_REPLIED] / HZ)))
192 goto nla_put_failure;
192 return 0; 193 return 0;
193 194
194nla_put_failure: 195nla_put_failure:
diff --git a/net/netfilter/nfnetlink_acct.c b/net/netfilter/nfnetlink_acct.c
index d98c868c148b..b2e7310ca0b8 100644
--- a/net/netfilter/nfnetlink_acct.c
+++ b/net/netfilter/nfnetlink_acct.c
@@ -109,7 +109,8 @@ nfnl_acct_fill_info(struct sk_buff *skb, u32 pid, u32 seq, u32 type,
109 nfmsg->version = NFNETLINK_V0; 109 nfmsg->version = NFNETLINK_V0;
110 nfmsg->res_id = 0; 110 nfmsg->res_id = 0;
111 111
112 NLA_PUT_STRING(skb, NFACCT_NAME, acct->name); 112 if (nla_put_string(skb, NFACCT_NAME, acct->name))
113 goto nla_put_failure;
113 114
114 if (type == NFNL_MSG_ACCT_GET_CTRZERO) { 115 if (type == NFNL_MSG_ACCT_GET_CTRZERO) {
115 pkts = atomic64_xchg(&acct->pkts, 0); 116 pkts = atomic64_xchg(&acct->pkts, 0);
@@ -118,9 +119,10 @@ nfnl_acct_fill_info(struct sk_buff *skb, u32 pid, u32 seq, u32 type,
118 pkts = atomic64_read(&acct->pkts); 119 pkts = atomic64_read(&acct->pkts);
119 bytes = atomic64_read(&acct->bytes); 120 bytes = atomic64_read(&acct->bytes);
120 } 121 }
121 NLA_PUT_BE64(skb, NFACCT_PKTS, cpu_to_be64(pkts)); 122 if (nla_put_be64(skb, NFACCT_PKTS, cpu_to_be64(pkts)) ||
122 NLA_PUT_BE64(skb, NFACCT_BYTES, cpu_to_be64(bytes)); 123 nla_put_be64(skb, NFACCT_BYTES, cpu_to_be64(bytes)) ||
123 NLA_PUT_BE32(skb, NFACCT_USE, htonl(atomic_read(&acct->refcnt))); 124 nla_put_be32(skb, NFACCT_USE, htonl(atomic_read(&acct->refcnt))))
125 goto nla_put_failure;
124 126
125 nlmsg_end(skb, nlh); 127 nlmsg_end(skb, nlh);
126 return skb->len; 128 return skb->len;
diff --git a/net/netfilter/nfnetlink_cttimeout.c b/net/netfilter/nfnetlink_cttimeout.c
index 2b9e79f5ef05..3e655288d1d6 100644
--- a/net/netfilter/nfnetlink_cttimeout.c
+++ b/net/netfilter/nfnetlink_cttimeout.c
@@ -170,11 +170,12 @@ ctnl_timeout_fill_info(struct sk_buff *skb, u32 pid, u32 seq, u32 type,
170 nfmsg->version = NFNETLINK_V0; 170 nfmsg->version = NFNETLINK_V0;
171 nfmsg->res_id = 0; 171 nfmsg->res_id = 0;
172 172
173 NLA_PUT_STRING(skb, CTA_TIMEOUT_NAME, timeout->name); 173 if (nla_put_string(skb, CTA_TIMEOUT_NAME, timeout->name) ||
174 NLA_PUT_BE16(skb, CTA_TIMEOUT_L3PROTO, htons(timeout->l3num)); 174 nla_put_be16(skb, CTA_TIMEOUT_L3PROTO, htons(timeout->l3num)) ||
175 NLA_PUT_U8(skb, CTA_TIMEOUT_L4PROTO, timeout->l4proto->l4proto); 175 nla_put_u8(skb, CTA_TIMEOUT_L4PROTO, timeout->l4proto->l4proto) ||
176 NLA_PUT_BE32(skb, CTA_TIMEOUT_USE, 176 nla_put_be32(skb, CTA_TIMEOUT_USE,
177 htonl(atomic_read(&timeout->refcnt))); 177 htonl(atomic_read(&timeout->refcnt))))
178 goto nla_put_failure;
178 179
179 if (likely(l4proto->ctnl_timeout.obj_to_nlattr)) { 180 if (likely(l4proto->ctnl_timeout.obj_to_nlattr)) {
180 struct nlattr *nest_parms; 181 struct nlattr *nest_parms;
diff --git a/net/netfilter/nfnetlink_log.c b/net/netfilter/nfnetlink_log.c
index 66b2c54c544f..3c3cfc0cc9b5 100644
--- a/net/netfilter/nfnetlink_log.c
+++ b/net/netfilter/nfnetlink_log.c
@@ -391,67 +391,78 @@ __build_packet_message(struct nfulnl_instance *inst,
391 pmsg.hw_protocol = skb->protocol; 391 pmsg.hw_protocol = skb->protocol;
392 pmsg.hook = hooknum; 392 pmsg.hook = hooknum;
393 393
394 NLA_PUT(inst->skb, NFULA_PACKET_HDR, sizeof(pmsg), &pmsg); 394 if (nla_put(inst->skb, NFULA_PACKET_HDR, sizeof(pmsg), &pmsg))
395 goto nla_put_failure;
395 396
396 if (prefix) 397 if (prefix &&
397 NLA_PUT(inst->skb, NFULA_PREFIX, plen, prefix); 398 nla_put(inst->skb, NFULA_PREFIX, plen, prefix))
399 goto nla_put_failure;
398 400
399 if (indev) { 401 if (indev) {
400#ifndef CONFIG_BRIDGE_NETFILTER 402#ifndef CONFIG_BRIDGE_NETFILTER
401 NLA_PUT_BE32(inst->skb, NFULA_IFINDEX_INDEV, 403 if (nla_put_be32(inst->skb, NFULA_IFINDEX_INDEV,
402 htonl(indev->ifindex)); 404 htonl(indev->ifindex)))
405 goto nla_put_failure;
403#else 406#else
404 if (pf == PF_BRIDGE) { 407 if (pf == PF_BRIDGE) {
405 /* Case 1: outdev is physical input device, we need to 408 /* Case 1: outdev is physical input device, we need to
406 * look for bridge group (when called from 409 * look for bridge group (when called from
407 * netfilter_bridge) */ 410 * netfilter_bridge) */
408 NLA_PUT_BE32(inst->skb, NFULA_IFINDEX_PHYSINDEV, 411 if (nla_put_be32(inst->skb, NFULA_IFINDEX_PHYSINDEV,
409 htonl(indev->ifindex)); 412 htonl(indev->ifindex)) ||
410 /* this is the bridge group "brX" */ 413 /* this is the bridge group "brX" */
411 /* rcu_read_lock()ed by nf_hook_slow or nf_log_packet */ 414 /* rcu_read_lock()ed by nf_hook_slow or nf_log_packet */
412 NLA_PUT_BE32(inst->skb, NFULA_IFINDEX_INDEV, 415 nla_put_be32(inst->skb, NFULA_IFINDEX_INDEV,
413 htonl(br_port_get_rcu(indev)->br->dev->ifindex)); 416 htonl(br_port_get_rcu(indev)->br->dev->ifindex)))
417 goto nla_put_failure;
414 } else { 418 } else {
415 /* Case 2: indev is bridge group, we need to look for 419 /* Case 2: indev is bridge group, we need to look for
416 * physical device (when called from ipv4) */ 420 * physical device (when called from ipv4) */
417 NLA_PUT_BE32(inst->skb, NFULA_IFINDEX_INDEV, 421 if (nla_put_be32(inst->skb, NFULA_IFINDEX_INDEV,
418 htonl(indev->ifindex)); 422 htonl(indev->ifindex)))
419 if (skb->nf_bridge && skb->nf_bridge->physindev) 423 goto nla_put_failure;
420 NLA_PUT_BE32(inst->skb, NFULA_IFINDEX_PHYSINDEV, 424 if (skb->nf_bridge && skb->nf_bridge->physindev &&
421 htonl(skb->nf_bridge->physindev->ifindex)); 425 nla_put_be32(inst->skb, NFULA_IFINDEX_PHYSINDEV,
426 htonl(skb->nf_bridge->physindev->ifindex)))
427 goto nla_put_failure;
422 } 428 }
423#endif 429#endif
424 } 430 }
425 431
426 if (outdev) { 432 if (outdev) {
427#ifndef CONFIG_BRIDGE_NETFILTER 433#ifndef CONFIG_BRIDGE_NETFILTER
428 NLA_PUT_BE32(inst->skb, NFULA_IFINDEX_OUTDEV, 434 if (nla_put_be32(inst->skb, NFULA_IFINDEX_OUTDEV,
429 htonl(outdev->ifindex)); 435 htonl(outdev->ifindex)))
436 goto nla_put_failure;
430#else 437#else
431 if (pf == PF_BRIDGE) { 438 if (pf == PF_BRIDGE) {
432 /* Case 1: outdev is physical output device, we need to 439 /* Case 1: outdev is physical output device, we need to
433 * look for bridge group (when called from 440 * look for bridge group (when called from
434 * netfilter_bridge) */ 441 * netfilter_bridge) */
435 NLA_PUT_BE32(inst->skb, NFULA_IFINDEX_PHYSOUTDEV, 442 if (nla_put_be32(inst->skb, NFULA_IFINDEX_PHYSOUTDEV,
436 htonl(outdev->ifindex)); 443 htonl(outdev->ifindex)) ||
437 /* this is the bridge group "brX" */ 444 /* this is the bridge group "brX" */
438 /* rcu_read_lock()ed by nf_hook_slow or nf_log_packet */ 445 /* rcu_read_lock()ed by nf_hook_slow or nf_log_packet */
439 NLA_PUT_BE32(inst->skb, NFULA_IFINDEX_OUTDEV, 446 nla_put_be32(inst->skb, NFULA_IFINDEX_OUTDEV,
440 htonl(br_port_get_rcu(outdev)->br->dev->ifindex)); 447 htonl(br_port_get_rcu(outdev)->br->dev->ifindex)))
448 goto nla_put_failure;
441 } else { 449 } else {
442 /* Case 2: indev is a bridge group, we need to look 450 /* Case 2: indev is a bridge group, we need to look
443 * for physical device (when called from ipv4) */ 451 * for physical device (when called from ipv4) */
444 NLA_PUT_BE32(inst->skb, NFULA_IFINDEX_OUTDEV, 452 if (nla_put_be32(inst->skb, NFULA_IFINDEX_OUTDEV,
445 htonl(outdev->ifindex)); 453 htonl(outdev->ifindex)))
446 if (skb->nf_bridge && skb->nf_bridge->physoutdev) 454 goto nla_put_failure;
447 NLA_PUT_BE32(inst->skb, NFULA_IFINDEX_PHYSOUTDEV, 455 if (skb->nf_bridge && skb->nf_bridge->physoutdev &&
448 htonl(skb->nf_bridge->physoutdev->ifindex)); 456 nla_put_be32(inst->skb, NFULA_IFINDEX_PHYSOUTDEV,
457 htonl(skb->nf_bridge->physoutdev->ifindex)))
458 goto nla_put_failure;
449 } 459 }
450#endif 460#endif
451 } 461 }
452 462
453 if (skb->mark) 463 if (skb->mark &&
454 NLA_PUT_BE32(inst->skb, NFULA_MARK, htonl(skb->mark)); 464 nla_put_be32(inst->skb, NFULA_MARK, htonl(skb->mark)))
465 goto nla_put_failure;
455 466
456 if (indev && skb->dev && 467 if (indev && skb->dev &&
457 skb->mac_header != skb->network_header) { 468 skb->mac_header != skb->network_header) {
@@ -459,16 +470,18 @@ __build_packet_message(struct nfulnl_instance *inst,
459 int len = dev_parse_header(skb, phw.hw_addr); 470 int len = dev_parse_header(skb, phw.hw_addr);
460 if (len > 0) { 471 if (len > 0) {
461 phw.hw_addrlen = htons(len); 472 phw.hw_addrlen = htons(len);
462 NLA_PUT(inst->skb, NFULA_HWADDR, sizeof(phw), &phw); 473 if (nla_put(inst->skb, NFULA_HWADDR, sizeof(phw), &phw))
474 goto nla_put_failure;
463 } 475 }
464 } 476 }
465 477
466 if (indev && skb_mac_header_was_set(skb)) { 478 if (indev && skb_mac_header_was_set(skb)) {
467 NLA_PUT_BE16(inst->skb, NFULA_HWTYPE, htons(skb->dev->type)); 479 if (nla_put_be32(inst->skb, NFULA_HWTYPE, htons(skb->dev->type)) ||
468 NLA_PUT_BE16(inst->skb, NFULA_HWLEN, 480 nla_put_be16(inst->skb, NFULA_HWLEN,
469 htons(skb->dev->hard_header_len)); 481 htons(skb->dev->hard_header_len)) ||
470 NLA_PUT(inst->skb, NFULA_HWHEADER, skb->dev->hard_header_len, 482 nla_put(inst->skb, NFULA_HWHEADER, skb->dev->hard_header_len,
471 skb_mac_header(skb)); 483 skb_mac_header(skb)))
484 goto nla_put_failure;
472 } 485 }
473 486
474 if (skb->tstamp.tv64) { 487 if (skb->tstamp.tv64) {
@@ -477,7 +490,8 @@ __build_packet_message(struct nfulnl_instance *inst,
477 ts.sec = cpu_to_be64(tv.tv_sec); 490 ts.sec = cpu_to_be64(tv.tv_sec);
478 ts.usec = cpu_to_be64(tv.tv_usec); 491 ts.usec = cpu_to_be64(tv.tv_usec);
479 492
480 NLA_PUT(inst->skb, NFULA_TIMESTAMP, sizeof(ts), &ts); 493 if (nla_put(inst->skb, NFULA_TIMESTAMP, sizeof(ts), &ts))
494 goto nla_put_failure;
481 } 495 }
482 496
483 /* UID */ 497 /* UID */
@@ -487,22 +501,24 @@ __build_packet_message(struct nfulnl_instance *inst,
487 struct file *file = skb->sk->sk_socket->file; 501 struct file *file = skb->sk->sk_socket->file;
488 __be32 uid = htonl(file->f_cred->fsuid); 502 __be32 uid = htonl(file->f_cred->fsuid);
489 __be32 gid = htonl(file->f_cred->fsgid); 503 __be32 gid = htonl(file->f_cred->fsgid);
490 /* need to unlock here since NLA_PUT may goto */
491 read_unlock_bh(&skb->sk->sk_callback_lock); 504 read_unlock_bh(&skb->sk->sk_callback_lock);
492 NLA_PUT_BE32(inst->skb, NFULA_UID, uid); 505 if (nla_put_be32(inst->skb, NFULA_UID, uid) ||
493 NLA_PUT_BE32(inst->skb, NFULA_GID, gid); 506 nla_put_be32(inst->skb, NFULA_GID, gid))
507 goto nla_put_failure;
494 } else 508 } else
495 read_unlock_bh(&skb->sk->sk_callback_lock); 509 read_unlock_bh(&skb->sk->sk_callback_lock);
496 } 510 }
497 511
498 /* local sequence number */ 512 /* local sequence number */
499 if (inst->flags & NFULNL_CFG_F_SEQ) 513 if ((inst->flags & NFULNL_CFG_F_SEQ) &&
500 NLA_PUT_BE32(inst->skb, NFULA_SEQ, htonl(inst->seq++)); 514 nla_put_be32(inst->skb, NFULA_SEQ, htonl(inst->seq++)))
515 goto nla_put_failure;
501 516
502 /* global sequence number */ 517 /* global sequence number */
503 if (inst->flags & NFULNL_CFG_F_SEQ_GLOBAL) 518 if ((inst->flags & NFULNL_CFG_F_SEQ_GLOBAL) &&
504 NLA_PUT_BE32(inst->skb, NFULA_SEQ_GLOBAL, 519 nla_put_be32(inst->skb, NFULA_SEQ_GLOBAL,
505 htonl(atomic_inc_return(&global_seq))); 520 htonl(atomic_inc_return(&global_seq))))
521 goto nla_put_failure;
506 522
507 if (data_len) { 523 if (data_len) {
508 struct nlattr *nla; 524 struct nlattr *nla;
diff --git a/net/netfilter/nfnetlink_queue.c b/net/netfilter/nfnetlink_queue.c
index a80b0cb03f17..8d6bcf32c0ed 100644
--- a/net/netfilter/nfnetlink_queue.c
+++ b/net/netfilter/nfnetlink_queue.c
@@ -288,58 +288,67 @@ nfqnl_build_packet_message(struct nfqnl_instance *queue,
288 indev = entry->indev; 288 indev = entry->indev;
289 if (indev) { 289 if (indev) {
290#ifndef CONFIG_BRIDGE_NETFILTER 290#ifndef CONFIG_BRIDGE_NETFILTER
291 NLA_PUT_BE32(skb, NFQA_IFINDEX_INDEV, htonl(indev->ifindex)); 291 if (nla_put_be32(skb, NFQA_IFINDEX_INDEV, htonl(indev->ifindex)))
292 goto nla_put_failure;
292#else 293#else
293 if (entry->pf == PF_BRIDGE) { 294 if (entry->pf == PF_BRIDGE) {
294 /* Case 1: indev is physical input device, we need to 295 /* Case 1: indev is physical input device, we need to
295 * look for bridge group (when called from 296 * look for bridge group (when called from
296 * netfilter_bridge) */ 297 * netfilter_bridge) */
297 NLA_PUT_BE32(skb, NFQA_IFINDEX_PHYSINDEV, 298 if (nla_put_be32(skb, NFQA_IFINDEX_PHYSINDEV,
298 htonl(indev->ifindex)); 299 htonl(indev->ifindex)) ||
299 /* this is the bridge group "brX" */ 300 /* this is the bridge group "brX" */
300 /* rcu_read_lock()ed by __nf_queue */ 301 /* rcu_read_lock()ed by __nf_queue */
301 NLA_PUT_BE32(skb, NFQA_IFINDEX_INDEV, 302 nla_put_be32(skb, NFQA_IFINDEX_INDEV,
302 htonl(br_port_get_rcu(indev)->br->dev->ifindex)); 303 htonl(br_port_get_rcu(indev)->br->dev->ifindex)))
304 goto nla_put_failure;
303 } else { 305 } else {
304 /* Case 2: indev is bridge group, we need to look for 306 /* Case 2: indev is bridge group, we need to look for
305 * physical device (when called from ipv4) */ 307 * physical device (when called from ipv4) */
306 NLA_PUT_BE32(skb, NFQA_IFINDEX_INDEV, 308 if (nla_put_be32(skb, NFQA_IFINDEX_INDEV,
307 htonl(indev->ifindex)); 309 htonl(indev->ifindex)))
308 if (entskb->nf_bridge && entskb->nf_bridge->physindev) 310 goto nla_put_failure;
309 NLA_PUT_BE32(skb, NFQA_IFINDEX_PHYSINDEV, 311 if (entskb->nf_bridge && entskb->nf_bridge->physindev &&
310 htonl(entskb->nf_bridge->physindev->ifindex)); 312 nla_put_be32(skb, NFQA_IFINDEX_PHYSINDEV,
313 htonl(entskb->nf_bridge->physindev->ifindex)))
314 goto nla_put_failure;
311 } 315 }
312#endif 316#endif
313 } 317 }
314 318
315 if (outdev) { 319 if (outdev) {
316#ifndef CONFIG_BRIDGE_NETFILTER 320#ifndef CONFIG_BRIDGE_NETFILTER
317 NLA_PUT_BE32(skb, NFQA_IFINDEX_OUTDEV, htonl(outdev->ifindex)); 321 if (nla_put_be32(skb, NFQA_IFINDEX_OUTDEV, htonl(outdev->ifindex)))
322 goto nla_put_failure;
318#else 323#else
319 if (entry->pf == PF_BRIDGE) { 324 if (entry->pf == PF_BRIDGE) {
320 /* Case 1: outdev is physical output device, we need to 325 /* Case 1: outdev is physical output device, we need to
321 * look for bridge group (when called from 326 * look for bridge group (when called from
322 * netfilter_bridge) */ 327 * netfilter_bridge) */
323 NLA_PUT_BE32(skb, NFQA_IFINDEX_PHYSOUTDEV, 328 if (nla_put_be32(skb, NFQA_IFINDEX_PHYSOUTDEV,
324 htonl(outdev->ifindex)); 329 htonl(outdev->ifindex)) ||
325 /* this is the bridge group "brX" */ 330 /* this is the bridge group "brX" */
326 /* rcu_read_lock()ed by __nf_queue */ 331 /* rcu_read_lock()ed by __nf_queue */
327 NLA_PUT_BE32(skb, NFQA_IFINDEX_OUTDEV, 332 nla_put_be32(skb, NFQA_IFINDEX_OUTDEV,
328 htonl(br_port_get_rcu(outdev)->br->dev->ifindex)); 333 htonl(br_port_get_rcu(outdev)->br->dev->ifindex)))
334 goto nla_put_failure;
329 } else { 335 } else {
330 /* Case 2: outdev is bridge group, we need to look for 336 /* Case 2: outdev is bridge group, we need to look for
331 * physical output device (when called from ipv4) */ 337 * physical output device (when called from ipv4) */
332 NLA_PUT_BE32(skb, NFQA_IFINDEX_OUTDEV, 338 if (nla_put_be32(skb, NFQA_IFINDEX_OUTDEV,
333 htonl(outdev->ifindex)); 339 htonl(outdev->ifindex)))
334 if (entskb->nf_bridge && entskb->nf_bridge->physoutdev) 340 goto nla_put_failure;
335 NLA_PUT_BE32(skb, NFQA_IFINDEX_PHYSOUTDEV, 341 if (entskb->nf_bridge && entskb->nf_bridge->physoutdev &&
336 htonl(entskb->nf_bridge->physoutdev->ifindex)); 342 nla_put_be32(skb, NFQA_IFINDEX_PHYSOUTDEV,
343 htonl(entskb->nf_bridge->physoutdev->ifindex)))
344 goto nla_put_failure;
337 } 345 }
338#endif 346#endif
339 } 347 }
340 348
341 if (entskb->mark) 349 if (entskb->mark &&
342 NLA_PUT_BE32(skb, NFQA_MARK, htonl(entskb->mark)); 350 nla_put_be32(skb, NFQA_MARK, htonl(entskb->mark)))
351 goto nla_put_failure;
343 352
344 if (indev && entskb->dev && 353 if (indev && entskb->dev &&
345 entskb->mac_header != entskb->network_header) { 354 entskb->mac_header != entskb->network_header) {
@@ -347,7 +356,8 @@ nfqnl_build_packet_message(struct nfqnl_instance *queue,
347 int len = dev_parse_header(entskb, phw.hw_addr); 356 int len = dev_parse_header(entskb, phw.hw_addr);
348 if (len) { 357 if (len) {
349 phw.hw_addrlen = htons(len); 358 phw.hw_addrlen = htons(len);
350 NLA_PUT(skb, NFQA_HWADDR, sizeof(phw), &phw); 359 if (nla_put(skb, NFQA_HWADDR, sizeof(phw), &phw))
360 goto nla_put_failure;
351 } 361 }
352 } 362 }
353 363
@@ -357,7 +367,8 @@ nfqnl_build_packet_message(struct nfqnl_instance *queue,
357 ts.sec = cpu_to_be64(tv.tv_sec); 367 ts.sec = cpu_to_be64(tv.tv_sec);
358 ts.usec = cpu_to_be64(tv.tv_usec); 368 ts.usec = cpu_to_be64(tv.tv_usec);
359 369
360 NLA_PUT(skb, NFQA_TIMESTAMP, sizeof(ts), &ts); 370 if (nla_put(skb, NFQA_TIMESTAMP, sizeof(ts), &ts))
371 goto nla_put_failure;
361 } 372 }
362 373
363 if (data_len) { 374 if (data_len) {
diff --git a/net/netlink/genetlink.c b/net/netlink/genetlink.c
index 9f40441d7a7d..8340ace837f2 100644
--- a/net/netlink/genetlink.c
+++ b/net/netlink/genetlink.c
@@ -635,11 +635,12 @@ static int ctrl_fill_info(struct genl_family *family, u32 pid, u32 seq,
635 if (hdr == NULL) 635 if (hdr == NULL)
636 return -1; 636 return -1;
637 637
638 NLA_PUT_STRING(skb, CTRL_ATTR_FAMILY_NAME, family->name); 638 if (nla_put_string(skb, CTRL_ATTR_FAMILY_NAME, family->name) ||
639 NLA_PUT_U16(skb, CTRL_ATTR_FAMILY_ID, family->id); 639 nla_put_u16(skb, CTRL_ATTR_FAMILY_ID, family->id) ||
640 NLA_PUT_U32(skb, CTRL_ATTR_VERSION, family->version); 640 nla_put_u32(skb, CTRL_ATTR_VERSION, family->version) ||
641 NLA_PUT_U32(skb, CTRL_ATTR_HDRSIZE, family->hdrsize); 641 nla_put_u32(skb, CTRL_ATTR_HDRSIZE, family->hdrsize) ||
642 NLA_PUT_U32(skb, CTRL_ATTR_MAXATTR, family->maxattr); 642 nla_put_u32(skb, CTRL_ATTR_MAXATTR, family->maxattr))
643 goto nla_put_failure;
643 644
644 if (!list_empty(&family->ops_list)) { 645 if (!list_empty(&family->ops_list)) {
645 struct nlattr *nla_ops; 646 struct nlattr *nla_ops;
@@ -657,8 +658,9 @@ static int ctrl_fill_info(struct genl_family *family, u32 pid, u32 seq,
657 if (nest == NULL) 658 if (nest == NULL)
658 goto nla_put_failure; 659 goto nla_put_failure;
659 660
660 NLA_PUT_U32(skb, CTRL_ATTR_OP_ID, ops->cmd); 661 if (nla_put_u32(skb, CTRL_ATTR_OP_ID, ops->cmd) ||
661 NLA_PUT_U32(skb, CTRL_ATTR_OP_FLAGS, ops->flags); 662 nla_put_u32(skb, CTRL_ATTR_OP_FLAGS, ops->flags))
663 goto nla_put_failure;
662 664
663 nla_nest_end(skb, nest); 665 nla_nest_end(skb, nest);
664 } 666 }
@@ -682,9 +684,10 @@ static int ctrl_fill_info(struct genl_family *family, u32 pid, u32 seq,
682 if (nest == NULL) 684 if (nest == NULL)
683 goto nla_put_failure; 685 goto nla_put_failure;
684 686
685 NLA_PUT_U32(skb, CTRL_ATTR_MCAST_GRP_ID, grp->id); 687 if (nla_put_u32(skb, CTRL_ATTR_MCAST_GRP_ID, grp->id) ||
686 NLA_PUT_STRING(skb, CTRL_ATTR_MCAST_GRP_NAME, 688 nla_put_string(skb, CTRL_ATTR_MCAST_GRP_NAME,
687 grp->name); 689 grp->name))
690 goto nla_put_failure;
688 691
689 nla_nest_end(skb, nest); 692 nla_nest_end(skb, nest);
690 } 693 }
@@ -710,8 +713,9 @@ static int ctrl_fill_mcgrp_info(struct genl_multicast_group *grp, u32 pid,
710 if (hdr == NULL) 713 if (hdr == NULL)
711 return -1; 714 return -1;
712 715
713 NLA_PUT_STRING(skb, CTRL_ATTR_FAMILY_NAME, grp->family->name); 716 if (nla_put_string(skb, CTRL_ATTR_FAMILY_NAME, grp->family->name) ||
714 NLA_PUT_U16(skb, CTRL_ATTR_FAMILY_ID, grp->family->id); 717 nla_put_u16(skb, CTRL_ATTR_FAMILY_ID, grp->family->id))
718 goto nla_put_failure;
715 719
716 nla_grps = nla_nest_start(skb, CTRL_ATTR_MCAST_GROUPS); 720 nla_grps = nla_nest_start(skb, CTRL_ATTR_MCAST_GROUPS);
717 if (nla_grps == NULL) 721 if (nla_grps == NULL)
@@ -721,9 +725,10 @@ static int ctrl_fill_mcgrp_info(struct genl_multicast_group *grp, u32 pid,
721 if (nest == NULL) 725 if (nest == NULL)
722 goto nla_put_failure; 726 goto nla_put_failure;
723 727
724 NLA_PUT_U32(skb, CTRL_ATTR_MCAST_GRP_ID, grp->id); 728 if (nla_put_u32(skb, CTRL_ATTR_MCAST_GRP_ID, grp->id) ||
725 NLA_PUT_STRING(skb, CTRL_ATTR_MCAST_GRP_NAME, 729 nla_put_string(skb, CTRL_ATTR_MCAST_GRP_NAME,
726 grp->name); 730 grp->name))
731 goto nla_put_failure;
727 732
728 nla_nest_end(skb, nest); 733 nla_nest_end(skb, nest);
729 nla_nest_end(skb, nla_grps); 734 nla_nest_end(skb, nla_grps);
diff --git a/net/nfc/netlink.c b/net/nfc/netlink.c
index 6404052d6c07..8937664674fa 100644
--- a/net/nfc/netlink.c
+++ b/net/nfc/netlink.c
@@ -63,19 +63,23 @@ static int nfc_genl_send_target(struct sk_buff *msg, struct nfc_target *target,
63 63
64 genl_dump_check_consistent(cb, hdr, &nfc_genl_family); 64 genl_dump_check_consistent(cb, hdr, &nfc_genl_family);
65 65
66 NLA_PUT_U32(msg, NFC_ATTR_TARGET_INDEX, target->idx); 66 if (nla_put_u32(msg, NFC_ATTR_TARGET_INDEX, target->idx) ||
67 NLA_PUT_U32(msg, NFC_ATTR_PROTOCOLS, target->supported_protocols); 67 nla_put_u32(msg, NFC_ATTR_PROTOCOLS, target->supported_protocols) ||
68 NLA_PUT_U16(msg, NFC_ATTR_TARGET_SENS_RES, target->sens_res); 68 nla_put_u16(msg, NFC_ATTR_TARGET_SENS_RES, target->sens_res) ||
69 NLA_PUT_U8(msg, NFC_ATTR_TARGET_SEL_RES, target->sel_res); 69 nla_put_u8(msg, NFC_ATTR_TARGET_SEL_RES, target->sel_res))
70 if (target->nfcid1_len > 0) 70 goto nla_put_failure;
71 NLA_PUT(msg, NFC_ATTR_TARGET_NFCID1, target->nfcid1_len, 71 if (target->nfcid1_len > 0 &&
72 target->nfcid1); 72 nla_put(msg, NFC_ATTR_TARGET_NFCID1, target->nfcid1_len,
73 if (target->sensb_res_len > 0) 73 target->nfcid1))
74 NLA_PUT(msg, NFC_ATTR_TARGET_SENSB_RES, target->sensb_res_len, 74 goto nla_put_failure;
75 target->sensb_res); 75 if (target->sensb_res_len > 0 &&
76 if (target->sensf_res_len > 0) 76 nla_put(msg, NFC_ATTR_TARGET_SENSB_RES, target->sensb_res_len,
77 NLA_PUT(msg, NFC_ATTR_TARGET_SENSF_RES, target->sensf_res_len, 77 target->sensb_res))
78 target->sensf_res); 78 goto nla_put_failure;
79 if (target->sensf_res_len > 0 &&
80 nla_put(msg, NFC_ATTR_TARGET_SENSF_RES, target->sensf_res_len,
81 target->sensf_res))
82 goto nla_put_failure;
79 83
80 return genlmsg_end(msg, hdr); 84 return genlmsg_end(msg, hdr);
81 85
@@ -170,7 +174,8 @@ int nfc_genl_targets_found(struct nfc_dev *dev)
170 if (!hdr) 174 if (!hdr)
171 goto free_msg; 175 goto free_msg;
172 176
173 NLA_PUT_U32(msg, NFC_ATTR_DEVICE_INDEX, dev->idx); 177 if (nla_put_u32(msg, NFC_ATTR_DEVICE_INDEX, dev->idx))
178 goto nla_put_failure;
174 179
175 genlmsg_end(msg, hdr); 180 genlmsg_end(msg, hdr);
176 181
@@ -197,10 +202,11 @@ int nfc_genl_device_added(struct nfc_dev *dev)
197 if (!hdr) 202 if (!hdr)
198 goto free_msg; 203 goto free_msg;
199 204
200 NLA_PUT_STRING(msg, NFC_ATTR_DEVICE_NAME, nfc_device_name(dev)); 205 if (nla_put_string(msg, NFC_ATTR_DEVICE_NAME, nfc_device_name(dev)) ||
201 NLA_PUT_U32(msg, NFC_ATTR_DEVICE_INDEX, dev->idx); 206 nla_put_u32(msg, NFC_ATTR_DEVICE_INDEX, dev->idx) ||
202 NLA_PUT_U32(msg, NFC_ATTR_PROTOCOLS, dev->supported_protocols); 207 nla_put_u32(msg, NFC_ATTR_PROTOCOLS, dev->supported_protocols) ||
203 NLA_PUT_U8(msg, NFC_ATTR_DEVICE_POWERED, dev->dev_up); 208 nla_put_u8(msg, NFC_ATTR_DEVICE_POWERED, dev->dev_up))
209 goto nla_put_failure;
204 210
205 genlmsg_end(msg, hdr); 211 genlmsg_end(msg, hdr);
206 212
@@ -229,7 +235,8 @@ int nfc_genl_device_removed(struct nfc_dev *dev)
229 if (!hdr) 235 if (!hdr)
230 goto free_msg; 236 goto free_msg;
231 237
232 NLA_PUT_U32(msg, NFC_ATTR_DEVICE_INDEX, dev->idx); 238 if (nla_put_u32(msg, NFC_ATTR_DEVICE_INDEX, dev->idx))
239 goto nla_put_failure;
233 240
234 genlmsg_end(msg, hdr); 241 genlmsg_end(msg, hdr);
235 242
@@ -259,10 +266,11 @@ static int nfc_genl_send_device(struct sk_buff *msg, struct nfc_dev *dev,
259 if (cb) 266 if (cb)
260 genl_dump_check_consistent(cb, hdr, &nfc_genl_family); 267 genl_dump_check_consistent(cb, hdr, &nfc_genl_family);
261 268
262 NLA_PUT_STRING(msg, NFC_ATTR_DEVICE_NAME, nfc_device_name(dev)); 269 if (nla_put_string(msg, NFC_ATTR_DEVICE_NAME, nfc_device_name(dev)) ||
263 NLA_PUT_U32(msg, NFC_ATTR_DEVICE_INDEX, dev->idx); 270 nla_put_u32(msg, NFC_ATTR_DEVICE_INDEX, dev->idx) ||
264 NLA_PUT_U32(msg, NFC_ATTR_PROTOCOLS, dev->supported_protocols); 271 nla_put_u32(msg, NFC_ATTR_PROTOCOLS, dev->supported_protocols) ||
265 NLA_PUT_U8(msg, NFC_ATTR_DEVICE_POWERED, dev->dev_up); 272 nla_put_u8(msg, NFC_ATTR_DEVICE_POWERED, dev->dev_up))
273 goto nla_put_failure;
266 274
267 return genlmsg_end(msg, hdr); 275 return genlmsg_end(msg, hdr);
268 276
@@ -339,11 +347,14 @@ int nfc_genl_dep_link_up_event(struct nfc_dev *dev, u32 target_idx,
339 if (!hdr) 347 if (!hdr)
340 goto free_msg; 348 goto free_msg;
341 349
342 NLA_PUT_U32(msg, NFC_ATTR_DEVICE_INDEX, dev->idx); 350 if (nla_put_u32(msg, NFC_ATTR_DEVICE_INDEX, dev->idx))
343 if (rf_mode == NFC_RF_INITIATOR) 351 goto nla_put_failure;
344 NLA_PUT_U32(msg, NFC_ATTR_TARGET_INDEX, target_idx); 352 if (rf_mode == NFC_RF_INITIATOR &&
345 NLA_PUT_U8(msg, NFC_ATTR_COMM_MODE, comm_mode); 353 nla_put_u32(msg, NFC_ATTR_TARGET_INDEX, target_idx))
346 NLA_PUT_U8(msg, NFC_ATTR_RF_MODE, rf_mode); 354 goto nla_put_failure;
355 if (nla_put_u8(msg, NFC_ATTR_COMM_MODE, comm_mode) ||
356 nla_put_u8(msg, NFC_ATTR_RF_MODE, rf_mode))
357 goto nla_put_failure;
347 358
348 genlmsg_end(msg, hdr); 359 genlmsg_end(msg, hdr);
349 360
@@ -376,7 +387,8 @@ int nfc_genl_dep_link_down_event(struct nfc_dev *dev)
376 if (!hdr) 387 if (!hdr)
377 goto free_msg; 388 goto free_msg;
378 389
379 NLA_PUT_U32(msg, NFC_ATTR_DEVICE_INDEX, dev->idx); 390 if (nla_put_u32(msg, NFC_ATTR_DEVICE_INDEX, dev->idx))
391 goto nla_put_failure;
380 392
381 genlmsg_end(msg, hdr); 393 genlmsg_end(msg, hdr);
382 394
diff --git a/net/openvswitch/datapath.c b/net/openvswitch/datapath.c
index e44e631ea952..f86de29979ef 100644
--- a/net/openvswitch/datapath.c
+++ b/net/openvswitch/datapath.c
@@ -778,15 +778,18 @@ static int ovs_flow_cmd_fill_info(struct sw_flow *flow, struct datapath *dp,
778 tcp_flags = flow->tcp_flags; 778 tcp_flags = flow->tcp_flags;
779 spin_unlock_bh(&flow->lock); 779 spin_unlock_bh(&flow->lock);
780 780
781 if (used) 781 if (used &&
782 NLA_PUT_U64(skb, OVS_FLOW_ATTR_USED, ovs_flow_used_time(used)); 782 nla_put_u64(skb, OVS_FLOW_ATTR_USED, ovs_flow_used_time(used)))
783 goto nla_put_failure;
783 784
784 if (stats.n_packets) 785 if (stats.n_packets &&
785 NLA_PUT(skb, OVS_FLOW_ATTR_STATS, 786 nla_put(skb, OVS_FLOW_ATTR_STATS,
786 sizeof(struct ovs_flow_stats), &stats); 787 sizeof(struct ovs_flow_stats), &stats))
788 goto nla_put_failure;
787 789
788 if (tcp_flags) 790 if (tcp_flags &&
789 NLA_PUT_U8(skb, OVS_FLOW_ATTR_TCP_FLAGS, tcp_flags); 791 nla_put_u8(skb, OVS_FLOW_ATTR_TCP_FLAGS, tcp_flags))
792 goto nla_put_failure;
790 793
791 /* If OVS_FLOW_ATTR_ACTIONS doesn't fit, skip dumping the actions if 794 /* If OVS_FLOW_ATTR_ACTIONS doesn't fit, skip dumping the actions if
792 * this is the first flow to be dumped into 'skb'. This is unusual for 795 * this is the first flow to be dumped into 'skb'. This is unusual for
@@ -1168,7 +1171,8 @@ static int ovs_dp_cmd_fill_info(struct datapath *dp, struct sk_buff *skb,
1168 goto nla_put_failure; 1171 goto nla_put_failure;
1169 1172
1170 get_dp_stats(dp, &dp_stats); 1173 get_dp_stats(dp, &dp_stats);
1171 NLA_PUT(skb, OVS_DP_ATTR_STATS, sizeof(struct ovs_dp_stats), &dp_stats); 1174 if (nla_put(skb, OVS_DP_ATTR_STATS, sizeof(struct ovs_dp_stats), &dp_stats))
1175 goto nla_put_failure;
1172 1176
1173 return genlmsg_end(skb, ovs_header); 1177 return genlmsg_end(skb, ovs_header);
1174 1178
@@ -1468,14 +1472,16 @@ static int ovs_vport_cmd_fill_info(struct vport *vport, struct sk_buff *skb,
1468 1472
1469 ovs_header->dp_ifindex = get_dpifindex(vport->dp); 1473 ovs_header->dp_ifindex = get_dpifindex(vport->dp);
1470 1474
1471 NLA_PUT_U32(skb, OVS_VPORT_ATTR_PORT_NO, vport->port_no); 1475 if (nla_put_u32(skb, OVS_VPORT_ATTR_PORT_NO, vport->port_no) ||
1472 NLA_PUT_U32(skb, OVS_VPORT_ATTR_TYPE, vport->ops->type); 1476 nla_put_u32(skb, OVS_VPORT_ATTR_TYPE, vport->ops->type) ||
1473 NLA_PUT_STRING(skb, OVS_VPORT_ATTR_NAME, vport->ops->get_name(vport)); 1477 nla_put_string(skb, OVS_VPORT_ATTR_NAME, vport->ops->get_name(vport)) ||
1474 NLA_PUT_U32(skb, OVS_VPORT_ATTR_UPCALL_PID, vport->upcall_pid); 1478 nla_put_u32(skb, OVS_VPORT_ATTR_UPCALL_PID, vport->upcall_pid))
1479 goto nla_put_failure;
1475 1480
1476 ovs_vport_get_stats(vport, &vport_stats); 1481 ovs_vport_get_stats(vport, &vport_stats);
1477 NLA_PUT(skb, OVS_VPORT_ATTR_STATS, sizeof(struct ovs_vport_stats), 1482 if (nla_put(skb, OVS_VPORT_ATTR_STATS, sizeof(struct ovs_vport_stats),
1478 &vport_stats); 1483 &vport_stats))
1484 goto nla_put_failure;
1479 1485
1480 err = ovs_vport_get_options(vport, skb); 1486 err = ovs_vport_get_options(vport, skb);
1481 if (err == -EMSGSIZE) 1487 if (err == -EMSGSIZE)
diff --git a/net/openvswitch/flow.c b/net/openvswitch/flow.c
index 1252c3081ef1..7cb416381e87 100644
--- a/net/openvswitch/flow.c
+++ b/net/openvswitch/flow.c
@@ -1174,11 +1174,13 @@ int ovs_flow_to_nlattrs(const struct sw_flow_key *swkey, struct sk_buff *skb)
1174 struct ovs_key_ethernet *eth_key; 1174 struct ovs_key_ethernet *eth_key;
1175 struct nlattr *nla, *encap; 1175 struct nlattr *nla, *encap;
1176 1176
1177 if (swkey->phy.priority) 1177 if (swkey->phy.priority &&
1178 NLA_PUT_U32(skb, OVS_KEY_ATTR_PRIORITY, swkey->phy.priority); 1178 nla_put_u32(skb, OVS_KEY_ATTR_PRIORITY, swkey->phy.priority))
1179 goto nla_put_failure;
1179 1180
1180 if (swkey->phy.in_port != USHRT_MAX) 1181 if (swkey->phy.in_port != USHRT_MAX &&
1181 NLA_PUT_U32(skb, OVS_KEY_ATTR_IN_PORT, swkey->phy.in_port); 1182 nla_put_u32(skb, OVS_KEY_ATTR_IN_PORT, swkey->phy.in_port))
1183 goto nla_put_failure;
1182 1184
1183 nla = nla_reserve(skb, OVS_KEY_ATTR_ETHERNET, sizeof(*eth_key)); 1185 nla = nla_reserve(skb, OVS_KEY_ATTR_ETHERNET, sizeof(*eth_key));
1184 if (!nla) 1186 if (!nla)
@@ -1188,8 +1190,9 @@ int ovs_flow_to_nlattrs(const struct sw_flow_key *swkey, struct sk_buff *skb)
1188 memcpy(eth_key->eth_dst, swkey->eth.dst, ETH_ALEN); 1190 memcpy(eth_key->eth_dst, swkey->eth.dst, ETH_ALEN);
1189 1191
1190 if (swkey->eth.tci || swkey->eth.type == htons(ETH_P_8021Q)) { 1192 if (swkey->eth.tci || swkey->eth.type == htons(ETH_P_8021Q)) {
1191 NLA_PUT_BE16(skb, OVS_KEY_ATTR_ETHERTYPE, htons(ETH_P_8021Q)); 1193 if (nla_put_be16(skb, OVS_KEY_ATTR_ETHERTYPE, htons(ETH_P_8021Q)) ||
1192 NLA_PUT_BE16(skb, OVS_KEY_ATTR_VLAN, swkey->eth.tci); 1194 nla_put_be16(skb, OVS_KEY_ATTR_VLAN, swkey->eth.tci))
1195 goto nla_put_failure;
1193 encap = nla_nest_start(skb, OVS_KEY_ATTR_ENCAP); 1196 encap = nla_nest_start(skb, OVS_KEY_ATTR_ENCAP);
1194 if (!swkey->eth.tci) 1197 if (!swkey->eth.tci)
1195 goto unencap; 1198 goto unencap;
@@ -1200,7 +1203,8 @@ int ovs_flow_to_nlattrs(const struct sw_flow_key *swkey, struct sk_buff *skb)
1200 if (swkey->eth.type == htons(ETH_P_802_2)) 1203 if (swkey->eth.type == htons(ETH_P_802_2))
1201 goto unencap; 1204 goto unencap;
1202 1205
1203 NLA_PUT_BE16(skb, OVS_KEY_ATTR_ETHERTYPE, swkey->eth.type); 1206 if (nla_put_be16(skb, OVS_KEY_ATTR_ETHERTYPE, swkey->eth.type))
1207 goto nla_put_failure;
1204 1208
1205 if (swkey->eth.type == htons(ETH_P_IP)) { 1209 if (swkey->eth.type == htons(ETH_P_IP)) {
1206 struct ovs_key_ipv4 *ipv4_key; 1210 struct ovs_key_ipv4 *ipv4_key;
diff --git a/net/phonet/pn_netlink.c b/net/phonet/pn_netlink.c
index d61f6761777d..cfdf135fcd69 100644
--- a/net/phonet/pn_netlink.c
+++ b/net/phonet/pn_netlink.c
@@ -116,7 +116,8 @@ static int fill_addr(struct sk_buff *skb, struct net_device *dev, u8 addr,
116 ifm->ifa_flags = IFA_F_PERMANENT; 116 ifm->ifa_flags = IFA_F_PERMANENT;
117 ifm->ifa_scope = RT_SCOPE_LINK; 117 ifm->ifa_scope = RT_SCOPE_LINK;
118 ifm->ifa_index = dev->ifindex; 118 ifm->ifa_index = dev->ifindex;
119 NLA_PUT_U8(skb, IFA_LOCAL, addr); 119 if (nla_put_u8(skb, IFA_LOCAL, addr))
120 goto nla_put_failure;
120 return nlmsg_end(skb, nlh); 121 return nlmsg_end(skb, nlh);
121 122
122nla_put_failure: 123nla_put_failure:
@@ -183,8 +184,9 @@ static int fill_route(struct sk_buff *skb, struct net_device *dev, u8 dst,
183 rtm->rtm_scope = RT_SCOPE_UNIVERSE; 184 rtm->rtm_scope = RT_SCOPE_UNIVERSE;
184 rtm->rtm_type = RTN_UNICAST; 185 rtm->rtm_type = RTN_UNICAST;
185 rtm->rtm_flags = 0; 186 rtm->rtm_flags = 0;
186 NLA_PUT_U8(skb, RTA_DST, dst); 187 if (nla_put_u8(skb, RTA_DST, dst) ||
187 NLA_PUT_U32(skb, RTA_OIF, dev->ifindex); 188 nla_put_u32(skb, RTA_OIF, dev->ifindex))
189 goto nla_put_failure;
188 return nlmsg_end(skb, nlh); 190 return nlmsg_end(skb, nlh);
189 191
190nla_put_failure: 192nla_put_failure:
diff --git a/net/sched/act_api.c b/net/sched/act_api.c
index 93fdf131bd75..5cfb160df063 100644
--- a/net/sched/act_api.c
+++ b/net/sched/act_api.c
@@ -127,7 +127,8 @@ static int tcf_del_walker(struct sk_buff *skb, struct tc_action *a,
127 nest = nla_nest_start(skb, a->order); 127 nest = nla_nest_start(skb, a->order);
128 if (nest == NULL) 128 if (nest == NULL)
129 goto nla_put_failure; 129 goto nla_put_failure;
130 NLA_PUT_STRING(skb, TCA_KIND, a->ops->kind); 130 if (nla_put_string(skb, TCA_KIND, a->ops->kind))
131 goto nla_put_failure;
131 for (i = 0; i < (hinfo->hmask + 1); i++) { 132 for (i = 0; i < (hinfo->hmask + 1); i++) {
132 p = hinfo->htab[tcf_hash(i, hinfo->hmask)]; 133 p = hinfo->htab[tcf_hash(i, hinfo->hmask)];
133 134
@@ -139,7 +140,8 @@ static int tcf_del_walker(struct sk_buff *skb, struct tc_action *a,
139 p = s_p; 140 p = s_p;
140 } 141 }
141 } 142 }
142 NLA_PUT_U32(skb, TCA_FCNT, n_i); 143 if (nla_put_u32(skb, TCA_FCNT, n_i))
144 goto nla_put_failure;
143 nla_nest_end(skb, nest); 145 nla_nest_end(skb, nest);
144 146
145 return n_i; 147 return n_i;
@@ -437,7 +439,8 @@ tcf_action_dump_1(struct sk_buff *skb, struct tc_action *a, int bind, int ref)
437 if (a->ops == NULL || a->ops->dump == NULL) 439 if (a->ops == NULL || a->ops->dump == NULL)
438 return err; 440 return err;
439 441
440 NLA_PUT_STRING(skb, TCA_KIND, a->ops->kind); 442 if (nla_put_string(skb, TCA_KIND, a->ops->kind))
443 goto nla_put_failure;
441 if (tcf_action_copy_stats(skb, a, 0)) 444 if (tcf_action_copy_stats(skb, a, 0))
442 goto nla_put_failure; 445 goto nla_put_failure;
443 nest = nla_nest_start(skb, TCA_OPTIONS); 446 nest = nla_nest_start(skb, TCA_OPTIONS);
diff --git a/net/sched/act_csum.c b/net/sched/act_csum.c
index 453a73431ac4..882124ceb70c 100644
--- a/net/sched/act_csum.c
+++ b/net/sched/act_csum.c
@@ -550,11 +550,13 @@ static int tcf_csum_dump(struct sk_buff *skb,
550 }; 550 };
551 struct tcf_t t; 551 struct tcf_t t;
552 552
553 NLA_PUT(skb, TCA_CSUM_PARMS, sizeof(opt), &opt); 553 if (nla_put(skb, TCA_CSUM_PARMS, sizeof(opt), &opt))
554 goto nla_put_failure;
554 t.install = jiffies_to_clock_t(jiffies - p->tcf_tm.install); 555 t.install = jiffies_to_clock_t(jiffies - p->tcf_tm.install);
555 t.lastuse = jiffies_to_clock_t(jiffies - p->tcf_tm.lastuse); 556 t.lastuse = jiffies_to_clock_t(jiffies - p->tcf_tm.lastuse);
556 t.expires = jiffies_to_clock_t(p->tcf_tm.expires); 557 t.expires = jiffies_to_clock_t(p->tcf_tm.expires);
557 NLA_PUT(skb, TCA_CSUM_TM, sizeof(t), &t); 558 if (nla_put(skb, TCA_CSUM_TM, sizeof(t), &t))
559 goto nla_put_failure;
558 560
559 return skb->len; 561 return skb->len;
560 562
diff --git a/net/sched/act_gact.c b/net/sched/act_gact.c
index b77f5a06a658..f10fb8256442 100644
--- a/net/sched/act_gact.c
+++ b/net/sched/act_gact.c
@@ -162,7 +162,8 @@ static int tcf_gact_dump(struct sk_buff *skb, struct tc_action *a, int bind, int
162 }; 162 };
163 struct tcf_t t; 163 struct tcf_t t;
164 164
165 NLA_PUT(skb, TCA_GACT_PARMS, sizeof(opt), &opt); 165 if (nla_put(skb, TCA_GACT_PARMS, sizeof(opt), &opt))
166 goto nla_put_failure;
166#ifdef CONFIG_GACT_PROB 167#ifdef CONFIG_GACT_PROB
167 if (gact->tcfg_ptype) { 168 if (gact->tcfg_ptype) {
168 struct tc_gact_p p_opt = { 169 struct tc_gact_p p_opt = {
@@ -171,13 +172,15 @@ static int tcf_gact_dump(struct sk_buff *skb, struct tc_action *a, int bind, int
171 .ptype = gact->tcfg_ptype, 172 .ptype = gact->tcfg_ptype,
172 }; 173 };
173 174
174 NLA_PUT(skb, TCA_GACT_PROB, sizeof(p_opt), &p_opt); 175 if (nla_put(skb, TCA_GACT_PROB, sizeof(p_opt), &p_opt))
176 goto nla_put_failure;
175 } 177 }
176#endif 178#endif
177 t.install = jiffies_to_clock_t(jiffies - gact->tcf_tm.install); 179 t.install = jiffies_to_clock_t(jiffies - gact->tcf_tm.install);
178 t.lastuse = jiffies_to_clock_t(jiffies - gact->tcf_tm.lastuse); 180 t.lastuse = jiffies_to_clock_t(jiffies - gact->tcf_tm.lastuse);
179 t.expires = jiffies_to_clock_t(gact->tcf_tm.expires); 181 t.expires = jiffies_to_clock_t(gact->tcf_tm.expires);
180 NLA_PUT(skb, TCA_GACT_TM, sizeof(t), &t); 182 if (nla_put(skb, TCA_GACT_TM, sizeof(t), &t))
183 goto nla_put_failure;
181 return skb->len; 184 return skb->len;
182 185
183nla_put_failure: 186nla_put_failure:
diff --git a/net/sched/act_ipt.c b/net/sched/act_ipt.c
index 60f8f616e8fa..0beba0e5312e 100644
--- a/net/sched/act_ipt.c
+++ b/net/sched/act_ipt.c
@@ -267,15 +267,17 @@ static int tcf_ipt_dump(struct sk_buff *skb, struct tc_action *a, int bind, int
267 c.refcnt = ipt->tcf_refcnt - ref; 267 c.refcnt = ipt->tcf_refcnt - ref;
268 strcpy(t->u.user.name, ipt->tcfi_t->u.kernel.target->name); 268 strcpy(t->u.user.name, ipt->tcfi_t->u.kernel.target->name);
269 269
270 NLA_PUT(skb, TCA_IPT_TARG, ipt->tcfi_t->u.user.target_size, t); 270 if (nla_put(skb, TCA_IPT_TARG, ipt->tcfi_t->u.user.target_size, t) ||
271 NLA_PUT_U32(skb, TCA_IPT_INDEX, ipt->tcf_index); 271 nla_put_u32(skb, TCA_IPT_INDEX, ipt->tcf_index) ||
272 NLA_PUT_U32(skb, TCA_IPT_HOOK, ipt->tcfi_hook); 272 nla_put_u32(skb, TCA_IPT_HOOK, ipt->tcfi_hook) ||
273 NLA_PUT(skb, TCA_IPT_CNT, sizeof(struct tc_cnt), &c); 273 nla_put(skb, TCA_IPT_CNT, sizeof(struct tc_cnt), &c) ||
274 NLA_PUT_STRING(skb, TCA_IPT_TABLE, ipt->tcfi_tname); 274 nla_put_string(skb, TCA_IPT_TABLE, ipt->tcfi_tname))
275 goto nla_put_failure;
275 tm.install = jiffies_to_clock_t(jiffies - ipt->tcf_tm.install); 276 tm.install = jiffies_to_clock_t(jiffies - ipt->tcf_tm.install);
276 tm.lastuse = jiffies_to_clock_t(jiffies - ipt->tcf_tm.lastuse); 277 tm.lastuse = jiffies_to_clock_t(jiffies - ipt->tcf_tm.lastuse);
277 tm.expires = jiffies_to_clock_t(ipt->tcf_tm.expires); 278 tm.expires = jiffies_to_clock_t(ipt->tcf_tm.expires);
278 NLA_PUT(skb, TCA_IPT_TM, sizeof (tm), &tm); 279 if (nla_put(skb, TCA_IPT_TM, sizeof (tm), &tm))
280 goto nla_put_failure;
279 kfree(t); 281 kfree(t);
280 return skb->len; 282 return skb->len;
281 283
diff --git a/net/sched/act_mirred.c b/net/sched/act_mirred.c
index e051398fdf6b..d583aea3b3df 100644
--- a/net/sched/act_mirred.c
+++ b/net/sched/act_mirred.c
@@ -227,11 +227,13 @@ static int tcf_mirred_dump(struct sk_buff *skb, struct tc_action *a, int bind, i
227 }; 227 };
228 struct tcf_t t; 228 struct tcf_t t;
229 229
230 NLA_PUT(skb, TCA_MIRRED_PARMS, sizeof(opt), &opt); 230 if (nla_put(skb, TCA_MIRRED_PARMS, sizeof(opt), &opt))
231 goto nla_put_failure;
231 t.install = jiffies_to_clock_t(jiffies - m->tcf_tm.install); 232 t.install = jiffies_to_clock_t(jiffies - m->tcf_tm.install);
232 t.lastuse = jiffies_to_clock_t(jiffies - m->tcf_tm.lastuse); 233 t.lastuse = jiffies_to_clock_t(jiffies - m->tcf_tm.lastuse);
233 t.expires = jiffies_to_clock_t(m->tcf_tm.expires); 234 t.expires = jiffies_to_clock_t(m->tcf_tm.expires);
234 NLA_PUT(skb, TCA_MIRRED_TM, sizeof(t), &t); 235 if (nla_put(skb, TCA_MIRRED_TM, sizeof(t), &t))
236 goto nla_put_failure;
235 return skb->len; 237 return skb->len;
236 238
237nla_put_failure: 239nla_put_failure:
diff --git a/net/sched/act_nat.c b/net/sched/act_nat.c
index 001d1b354869..b5d029eb44f2 100644
--- a/net/sched/act_nat.c
+++ b/net/sched/act_nat.c
@@ -284,11 +284,13 @@ static int tcf_nat_dump(struct sk_buff *skb, struct tc_action *a,
284 }; 284 };
285 struct tcf_t t; 285 struct tcf_t t;
286 286
287 NLA_PUT(skb, TCA_NAT_PARMS, sizeof(opt), &opt); 287 if (nla_put(skb, TCA_NAT_PARMS, sizeof(opt), &opt))
288 goto nla_put_failure;
288 t.install = jiffies_to_clock_t(jiffies - p->tcf_tm.install); 289 t.install = jiffies_to_clock_t(jiffies - p->tcf_tm.install);
289 t.lastuse = jiffies_to_clock_t(jiffies - p->tcf_tm.lastuse); 290 t.lastuse = jiffies_to_clock_t(jiffies - p->tcf_tm.lastuse);
290 t.expires = jiffies_to_clock_t(p->tcf_tm.expires); 291 t.expires = jiffies_to_clock_t(p->tcf_tm.expires);
291 NLA_PUT(skb, TCA_NAT_TM, sizeof(t), &t); 292 if (nla_put(skb, TCA_NAT_TM, sizeof(t), &t))
293 goto nla_put_failure;
292 294
293 return skb->len; 295 return skb->len;
294 296
diff --git a/net/sched/act_pedit.c b/net/sched/act_pedit.c
index 10d3aed86560..26aa2f6ce257 100644
--- a/net/sched/act_pedit.c
+++ b/net/sched/act_pedit.c
@@ -215,11 +215,13 @@ static int tcf_pedit_dump(struct sk_buff *skb, struct tc_action *a,
215 opt->refcnt = p->tcf_refcnt - ref; 215 opt->refcnt = p->tcf_refcnt - ref;
216 opt->bindcnt = p->tcf_bindcnt - bind; 216 opt->bindcnt = p->tcf_bindcnt - bind;
217 217
218 NLA_PUT(skb, TCA_PEDIT_PARMS, s, opt); 218 if (nla_put(skb, TCA_PEDIT_PARMS, s, opt))
219 goto nla_put_failure;
219 t.install = jiffies_to_clock_t(jiffies - p->tcf_tm.install); 220 t.install = jiffies_to_clock_t(jiffies - p->tcf_tm.install);
220 t.lastuse = jiffies_to_clock_t(jiffies - p->tcf_tm.lastuse); 221 t.lastuse = jiffies_to_clock_t(jiffies - p->tcf_tm.lastuse);
221 t.expires = jiffies_to_clock_t(p->tcf_tm.expires); 222 t.expires = jiffies_to_clock_t(p->tcf_tm.expires);
222 NLA_PUT(skb, TCA_PEDIT_TM, sizeof(t), &t); 223 if (nla_put(skb, TCA_PEDIT_TM, sizeof(t), &t))
224 goto nla_put_failure;
223 kfree(opt); 225 kfree(opt);
224 return skb->len; 226 return skb->len;
225 227
diff --git a/net/sched/act_police.c b/net/sched/act_police.c
index 6fb3f5af0f85..a9de23297d47 100644
--- a/net/sched/act_police.c
+++ b/net/sched/act_police.c
@@ -356,11 +356,14 @@ tcf_act_police_dump(struct sk_buff *skb, struct tc_action *a, int bind, int ref)
356 opt.rate = police->tcfp_R_tab->rate; 356 opt.rate = police->tcfp_R_tab->rate;
357 if (police->tcfp_P_tab) 357 if (police->tcfp_P_tab)
358 opt.peakrate = police->tcfp_P_tab->rate; 358 opt.peakrate = police->tcfp_P_tab->rate;
359 NLA_PUT(skb, TCA_POLICE_TBF, sizeof(opt), &opt); 359 if (nla_put(skb, TCA_POLICE_TBF, sizeof(opt), &opt))
360 if (police->tcfp_result) 360 goto nla_put_failure;
361 NLA_PUT_U32(skb, TCA_POLICE_RESULT, police->tcfp_result); 361 if (police->tcfp_result &&
362 if (police->tcfp_ewma_rate) 362 nla_put_u32(skb, TCA_POLICE_RESULT, police->tcfp_result))
363 NLA_PUT_U32(skb, TCA_POLICE_AVRATE, police->tcfp_ewma_rate); 363 goto nla_put_failure;
364 if (police->tcfp_ewma_rate &&
365 nla_put_u32(skb, TCA_POLICE_AVRATE, police->tcfp_ewma_rate))
366 goto nla_put_failure;
364 return skb->len; 367 return skb->len;
365 368
366nla_put_failure: 369nla_put_failure:
diff --git a/net/sched/act_simple.c b/net/sched/act_simple.c
index 73e0a3ab4d55..3922f2a2821b 100644
--- a/net/sched/act_simple.c
+++ b/net/sched/act_simple.c
@@ -172,12 +172,14 @@ static int tcf_simp_dump(struct sk_buff *skb, struct tc_action *a,
172 }; 172 };
173 struct tcf_t t; 173 struct tcf_t t;
174 174
175 NLA_PUT(skb, TCA_DEF_PARMS, sizeof(opt), &opt); 175 if (nla_put(skb, TCA_DEF_PARMS, sizeof(opt), &opt) ||
176 NLA_PUT_STRING(skb, TCA_DEF_DATA, d->tcfd_defdata); 176 nla_put_string(skb, TCA_DEF_DATA, d->tcfd_defdata))
177 goto nla_put_failure;
177 t.install = jiffies_to_clock_t(jiffies - d->tcf_tm.install); 178 t.install = jiffies_to_clock_t(jiffies - d->tcf_tm.install);
178 t.lastuse = jiffies_to_clock_t(jiffies - d->tcf_tm.lastuse); 179 t.lastuse = jiffies_to_clock_t(jiffies - d->tcf_tm.lastuse);
179 t.expires = jiffies_to_clock_t(d->tcf_tm.expires); 180 t.expires = jiffies_to_clock_t(d->tcf_tm.expires);
180 NLA_PUT(skb, TCA_DEF_TM, sizeof(t), &t); 181 if (nla_put(skb, TCA_DEF_TM, sizeof(t), &t))
182 goto nla_put_failure;
181 return skb->len; 183 return skb->len;
182 184
183nla_put_failure: 185nla_put_failure:
diff --git a/net/sched/act_skbedit.c b/net/sched/act_skbedit.c
index 35dbbe91027e..476e0fac6712 100644
--- a/net/sched/act_skbedit.c
+++ b/net/sched/act_skbedit.c
@@ -166,20 +166,25 @@ static int tcf_skbedit_dump(struct sk_buff *skb, struct tc_action *a,
166 }; 166 };
167 struct tcf_t t; 167 struct tcf_t t;
168 168
169 NLA_PUT(skb, TCA_SKBEDIT_PARMS, sizeof(opt), &opt); 169 if (nla_put(skb, TCA_SKBEDIT_PARMS, sizeof(opt), &opt))
170 if (d->flags & SKBEDIT_F_PRIORITY) 170 goto nla_put_failure;
171 NLA_PUT(skb, TCA_SKBEDIT_PRIORITY, sizeof(d->priority), 171 if ((d->flags & SKBEDIT_F_PRIORITY) &&
172 &d->priority); 172 nla_put(skb, TCA_SKBEDIT_PRIORITY, sizeof(d->priority),
173 if (d->flags & SKBEDIT_F_QUEUE_MAPPING) 173 &d->priority))
174 NLA_PUT(skb, TCA_SKBEDIT_QUEUE_MAPPING, 174 goto nla_put_failure;
175 sizeof(d->queue_mapping), &d->queue_mapping); 175 if ((d->flags & SKBEDIT_F_QUEUE_MAPPING) &&
176 if (d->flags & SKBEDIT_F_MARK) 176 nla_put(skb, TCA_SKBEDIT_QUEUE_MAPPING,
177 NLA_PUT(skb, TCA_SKBEDIT_MARK, sizeof(d->mark), 177 sizeof(d->queue_mapping), &d->queue_mapping))
178 &d->mark); 178 goto nla_put_failure;
179 if ((d->flags & SKBEDIT_F_MARK) &&
180 nla_put(skb, TCA_SKBEDIT_MARK, sizeof(d->mark),
181 &d->mark))
182 goto nla_put_failure;
179 t.install = jiffies_to_clock_t(jiffies - d->tcf_tm.install); 183 t.install = jiffies_to_clock_t(jiffies - d->tcf_tm.install);
180 t.lastuse = jiffies_to_clock_t(jiffies - d->tcf_tm.lastuse); 184 t.lastuse = jiffies_to_clock_t(jiffies - d->tcf_tm.lastuse);
181 t.expires = jiffies_to_clock_t(d->tcf_tm.expires); 185 t.expires = jiffies_to_clock_t(d->tcf_tm.expires);
182 NLA_PUT(skb, TCA_SKBEDIT_TM, sizeof(t), &t); 186 if (nla_put(skb, TCA_SKBEDIT_TM, sizeof(t), &t))
187 goto nla_put_failure;
183 return skb->len; 188 return skb->len;
184 189
185nla_put_failure: 190nla_put_failure:
diff --git a/net/sched/cls_api.c b/net/sched/cls_api.c
index a69d44f1dac5..f452f696b4b3 100644
--- a/net/sched/cls_api.c
+++ b/net/sched/cls_api.c
@@ -357,7 +357,8 @@ static int tcf_fill_node(struct sk_buff *skb, struct tcf_proto *tp,
357 tcm->tcm_ifindex = qdisc_dev(tp->q)->ifindex; 357 tcm->tcm_ifindex = qdisc_dev(tp->q)->ifindex;
358 tcm->tcm_parent = tp->classid; 358 tcm->tcm_parent = tp->classid;
359 tcm->tcm_info = TC_H_MAKE(tp->prio, tp->protocol); 359 tcm->tcm_info = TC_H_MAKE(tp->prio, tp->protocol);
360 NLA_PUT_STRING(skb, TCA_KIND, tp->ops->kind); 360 if (nla_put_string(skb, TCA_KIND, tp->ops->kind))
361 goto nla_put_failure;
361 tcm->tcm_handle = fh; 362 tcm->tcm_handle = fh;
362 if (RTM_DELTFILTER != event) { 363 if (RTM_DELTFILTER != event) {
363 tcm->tcm_handle = 0; 364 tcm->tcm_handle = 0;
diff --git a/net/sched/cls_basic.c b/net/sched/cls_basic.c
index ea1f70b5a5f4..590960a22a77 100644
--- a/net/sched/cls_basic.c
+++ b/net/sched/cls_basic.c
@@ -257,8 +257,9 @@ static int basic_dump(struct tcf_proto *tp, unsigned long fh,
257 if (nest == NULL) 257 if (nest == NULL)
258 goto nla_put_failure; 258 goto nla_put_failure;
259 259
260 if (f->res.classid) 260 if (f->res.classid &&
261 NLA_PUT_U32(skb, TCA_BASIC_CLASSID, f->res.classid); 261 nla_put_u32(skb, TCA_BASIC_CLASSID, f->res.classid))
262 goto nla_put_failure;
262 263
263 if (tcf_exts_dump(skb, &f->exts, &basic_ext_map) < 0 || 264 if (tcf_exts_dump(skb, &f->exts, &basic_ext_map) < 0 ||
264 tcf_em_tree_dump(skb, &f->ematches, TCA_BASIC_EMATCHES) < 0) 265 tcf_em_tree_dump(skb, &f->ematches, TCA_BASIC_EMATCHES) < 0)
diff --git a/net/sched/cls_flow.c b/net/sched/cls_flow.c
index 1d8bd0dbcd1f..ccd08c8dc6a7 100644
--- a/net/sched/cls_flow.c
+++ b/net/sched/cls_flow.c
@@ -572,25 +572,32 @@ static int flow_dump(struct tcf_proto *tp, unsigned long fh,
572 if (nest == NULL) 572 if (nest == NULL)
573 goto nla_put_failure; 573 goto nla_put_failure;
574 574
575 NLA_PUT_U32(skb, TCA_FLOW_KEYS, f->keymask); 575 if (nla_put_u32(skb, TCA_FLOW_KEYS, f->keymask) ||
576 NLA_PUT_U32(skb, TCA_FLOW_MODE, f->mode); 576 nla_put_u32(skb, TCA_FLOW_MODE, f->mode))
577 goto nla_put_failure;
577 578
578 if (f->mask != ~0 || f->xor != 0) { 579 if (f->mask != ~0 || f->xor != 0) {
579 NLA_PUT_U32(skb, TCA_FLOW_MASK, f->mask); 580 if (nla_put_u32(skb, TCA_FLOW_MASK, f->mask) ||
580 NLA_PUT_U32(skb, TCA_FLOW_XOR, f->xor); 581 nla_put_u32(skb, TCA_FLOW_XOR, f->xor))
582 goto nla_put_failure;
581 } 583 }
582 if (f->rshift) 584 if (f->rshift &&
583 NLA_PUT_U32(skb, TCA_FLOW_RSHIFT, f->rshift); 585 nla_put_u32(skb, TCA_FLOW_RSHIFT, f->rshift))
584 if (f->addend) 586 goto nla_put_failure;
585 NLA_PUT_U32(skb, TCA_FLOW_ADDEND, f->addend); 587 if (f->addend &&
588 nla_put_u32(skb, TCA_FLOW_ADDEND, f->addend))
589 goto nla_put_failure;
586 590
587 if (f->divisor) 591 if (f->divisor &&
588 NLA_PUT_U32(skb, TCA_FLOW_DIVISOR, f->divisor); 592 nla_put_u32(skb, TCA_FLOW_DIVISOR, f->divisor))
589 if (f->baseclass) 593 goto nla_put_failure;
590 NLA_PUT_U32(skb, TCA_FLOW_BASECLASS, f->baseclass); 594 if (f->baseclass &&
595 nla_put_u32(skb, TCA_FLOW_BASECLASS, f->baseclass))
596 goto nla_put_failure;
591 597
592 if (f->perturb_period) 598 if (f->perturb_period &&
593 NLA_PUT_U32(skb, TCA_FLOW_PERTURB, f->perturb_period / HZ); 599 nla_put_u32(skb, TCA_FLOW_PERTURB, f->perturb_period / HZ))
600 goto nla_put_failure;
594 601
595 if (tcf_exts_dump(skb, &f->exts, &flow_ext_map) < 0) 602 if (tcf_exts_dump(skb, &f->exts, &flow_ext_map) < 0)
596 goto nla_put_failure; 603 goto nla_put_failure;
diff --git a/net/sched/cls_fw.c b/net/sched/cls_fw.c
index 389af152ec45..8384a4797240 100644
--- a/net/sched/cls_fw.c
+++ b/net/sched/cls_fw.c
@@ -346,14 +346,17 @@ static int fw_dump(struct tcf_proto *tp, unsigned long fh,
346 if (nest == NULL) 346 if (nest == NULL)
347 goto nla_put_failure; 347 goto nla_put_failure;
348 348
349 if (f->res.classid) 349 if (f->res.classid &&
350 NLA_PUT_U32(skb, TCA_FW_CLASSID, f->res.classid); 350 nla_put_u32(skb, TCA_FW_CLASSID, f->res.classid))
351 goto nla_put_failure;
351#ifdef CONFIG_NET_CLS_IND 352#ifdef CONFIG_NET_CLS_IND
352 if (strlen(f->indev)) 353 if (strlen(f->indev) &&
353 NLA_PUT_STRING(skb, TCA_FW_INDEV, f->indev); 354 nla_put_string(skb, TCA_FW_INDEV, f->indev))
355 goto nla_put_failure;
354#endif /* CONFIG_NET_CLS_IND */ 356#endif /* CONFIG_NET_CLS_IND */
355 if (head->mask != 0xFFFFFFFF) 357 if (head->mask != 0xFFFFFFFF &&
356 NLA_PUT_U32(skb, TCA_FW_MASK, head->mask); 358 nla_put_u32(skb, TCA_FW_MASK, head->mask))
359 goto nla_put_failure;
357 360
358 if (tcf_exts_dump(skb, &f->exts, &fw_ext_map) < 0) 361 if (tcf_exts_dump(skb, &f->exts, &fw_ext_map) < 0)
359 goto nla_put_failure; 362 goto nla_put_failure;
diff --git a/net/sched/cls_route.c b/net/sched/cls_route.c
index 13ab66e9df58..36fec4227401 100644
--- a/net/sched/cls_route.c
+++ b/net/sched/cls_route.c
@@ -571,17 +571,21 @@ static int route4_dump(struct tcf_proto *tp, unsigned long fh,
571 571
572 if (!(f->handle & 0x8000)) { 572 if (!(f->handle & 0x8000)) {
573 id = f->id & 0xFF; 573 id = f->id & 0xFF;
574 NLA_PUT_U32(skb, TCA_ROUTE4_TO, id); 574 if (nla_put_u32(skb, TCA_ROUTE4_TO, id))
575 goto nla_put_failure;
575 } 576 }
576 if (f->handle & 0x80000000) { 577 if (f->handle & 0x80000000) {
577 if ((f->handle >> 16) != 0xFFFF) 578 if ((f->handle >> 16) != 0xFFFF &&
578 NLA_PUT_U32(skb, TCA_ROUTE4_IIF, f->iif); 579 nla_put_u32(skb, TCA_ROUTE4_IIF, f->iif))
580 goto nla_put_failure;
579 } else { 581 } else {
580 id = f->id >> 16; 582 id = f->id >> 16;
581 NLA_PUT_U32(skb, TCA_ROUTE4_FROM, id); 583 if (nla_put_u32(skb, TCA_ROUTE4_FROM, id))
584 goto nla_put_failure;
582 } 585 }
583 if (f->res.classid) 586 if (f->res.classid &&
584 NLA_PUT_U32(skb, TCA_ROUTE4_CLASSID, f->res.classid); 587 nla_put_u32(skb, TCA_ROUTE4_CLASSID, f->res.classid))
588 goto nla_put_failure;
585 589
586 if (tcf_exts_dump(skb, &f->exts, &route_ext_map) < 0) 590 if (tcf_exts_dump(skb, &f->exts, &route_ext_map) < 0)
587 goto nla_put_failure; 591 goto nla_put_failure;
diff --git a/net/sched/cls_rsvp.h b/net/sched/cls_rsvp.h
index b01427924f81..18ab93ec8d7e 100644
--- a/net/sched/cls_rsvp.h
+++ b/net/sched/cls_rsvp.h
@@ -615,18 +615,22 @@ static int rsvp_dump(struct tcf_proto *tp, unsigned long fh,
615 if (nest == NULL) 615 if (nest == NULL)
616 goto nla_put_failure; 616 goto nla_put_failure;
617 617
618 NLA_PUT(skb, TCA_RSVP_DST, sizeof(s->dst), &s->dst); 618 if (nla_put(skb, TCA_RSVP_DST, sizeof(s->dst), &s->dst))
619 goto nla_put_failure;
619 pinfo.dpi = s->dpi; 620 pinfo.dpi = s->dpi;
620 pinfo.spi = f->spi; 621 pinfo.spi = f->spi;
621 pinfo.protocol = s->protocol; 622 pinfo.protocol = s->protocol;
622 pinfo.tunnelid = s->tunnelid; 623 pinfo.tunnelid = s->tunnelid;
623 pinfo.tunnelhdr = f->tunnelhdr; 624 pinfo.tunnelhdr = f->tunnelhdr;
624 pinfo.pad = 0; 625 pinfo.pad = 0;
625 NLA_PUT(skb, TCA_RSVP_PINFO, sizeof(pinfo), &pinfo); 626 if (nla_put(skb, TCA_RSVP_PINFO, sizeof(pinfo), &pinfo))
626 if (f->res.classid) 627 goto nla_put_failure;
627 NLA_PUT_U32(skb, TCA_RSVP_CLASSID, f->res.classid); 628 if (f->res.classid &&
628 if (((f->handle >> 8) & 0xFF) != 16) 629 nla_put_u32(skb, TCA_RSVP_CLASSID, f->res.classid))
629 NLA_PUT(skb, TCA_RSVP_SRC, sizeof(f->src), f->src); 630 goto nla_put_failure;
631 if (((f->handle >> 8) & 0xFF) != 16 &&
632 nla_put(skb, TCA_RSVP_SRC, sizeof(f->src), f->src))
633 goto nla_put_failure;
630 634
631 if (tcf_exts_dump(skb, &f->exts, &rsvp_ext_map) < 0) 635 if (tcf_exts_dump(skb, &f->exts, &rsvp_ext_map) < 0)
632 goto nla_put_failure; 636 goto nla_put_failure;
diff --git a/net/sched/cls_tcindex.c b/net/sched/cls_tcindex.c
index dbe199234c63..fe29420d0b0e 100644
--- a/net/sched/cls_tcindex.c
+++ b/net/sched/cls_tcindex.c
@@ -438,10 +438,11 @@ static int tcindex_dump(struct tcf_proto *tp, unsigned long fh,
438 438
439 if (!fh) { 439 if (!fh) {
440 t->tcm_handle = ~0; /* whatever ... */ 440 t->tcm_handle = ~0; /* whatever ... */
441 NLA_PUT_U32(skb, TCA_TCINDEX_HASH, p->hash); 441 if (nla_put_u32(skb, TCA_TCINDEX_HASH, p->hash) ||
442 NLA_PUT_U16(skb, TCA_TCINDEX_MASK, p->mask); 442 nla_put_u16(skb, TCA_TCINDEX_MASK, p->mask) ||
443 NLA_PUT_U32(skb, TCA_TCINDEX_SHIFT, p->shift); 443 nla_put_u32(skb, TCA_TCINDEX_SHIFT, p->shift) ||
444 NLA_PUT_U32(skb, TCA_TCINDEX_FALL_THROUGH, p->fall_through); 444 nla_put_u32(skb, TCA_TCINDEX_FALL_THROUGH, p->fall_through))
445 goto nla_put_failure;
445 nla_nest_end(skb, nest); 446 nla_nest_end(skb, nest);
446 } else { 447 } else {
447 if (p->perfect) { 448 if (p->perfect) {
@@ -460,8 +461,9 @@ static int tcindex_dump(struct tcf_proto *tp, unsigned long fh,
460 } 461 }
461 } 462 }
462 pr_debug("handle = %d\n", t->tcm_handle); 463 pr_debug("handle = %d\n", t->tcm_handle);
463 if (r->res.class) 464 if (r->res.class &&
464 NLA_PUT_U32(skb, TCA_TCINDEX_CLASSID, r->res.classid); 465 nla_put_u32(skb, TCA_TCINDEX_CLASSID, r->res.classid))
466 goto nla_put_failure;
465 467
466 if (tcf_exts_dump(skb, &r->exts, &tcindex_ext_map) < 0) 468 if (tcf_exts_dump(skb, &r->exts, &tcindex_ext_map) < 0)
467 goto nla_put_failure; 469 goto nla_put_failure;
diff --git a/net/sched/cls_u32.c b/net/sched/cls_u32.c
index 939b627b4795..591b006a8c5a 100644
--- a/net/sched/cls_u32.c
+++ b/net/sched/cls_u32.c
@@ -733,36 +733,44 @@ static int u32_dump(struct tcf_proto *tp, unsigned long fh,
733 struct tc_u_hnode *ht = (struct tc_u_hnode *)fh; 733 struct tc_u_hnode *ht = (struct tc_u_hnode *)fh;
734 u32 divisor = ht->divisor + 1; 734 u32 divisor = ht->divisor + 1;
735 735
736 NLA_PUT_U32(skb, TCA_U32_DIVISOR, divisor); 736 if (nla_put_u32(skb, TCA_U32_DIVISOR, divisor))
737 goto nla_put_failure;
737 } else { 738 } else {
738 NLA_PUT(skb, TCA_U32_SEL, 739 if (nla_put(skb, TCA_U32_SEL,
739 sizeof(n->sel) + n->sel.nkeys*sizeof(struct tc_u32_key), 740 sizeof(n->sel) + n->sel.nkeys*sizeof(struct tc_u32_key),
740 &n->sel); 741 &n->sel))
742 goto nla_put_failure;
741 if (n->ht_up) { 743 if (n->ht_up) {
742 u32 htid = n->handle & 0xFFFFF000; 744 u32 htid = n->handle & 0xFFFFF000;
743 NLA_PUT_U32(skb, TCA_U32_HASH, htid); 745 if (nla_put_u32(skb, TCA_U32_HASH, htid))
746 goto nla_put_failure;
744 } 747 }
745 if (n->res.classid) 748 if (n->res.classid &&
746 NLA_PUT_U32(skb, TCA_U32_CLASSID, n->res.classid); 749 nla_put_u32(skb, TCA_U32_CLASSID, n->res.classid))
747 if (n->ht_down) 750 goto nla_put_failure;
748 NLA_PUT_U32(skb, TCA_U32_LINK, n->ht_down->handle); 751 if (n->ht_down &&
752 nla_put_u32(skb, TCA_U32_LINK, n->ht_down->handle))
753 goto nla_put_failure;
749 754
750#ifdef CONFIG_CLS_U32_MARK 755#ifdef CONFIG_CLS_U32_MARK
751 if (n->mark.val || n->mark.mask) 756 if ((n->mark.val || n->mark.mask) &&
752 NLA_PUT(skb, TCA_U32_MARK, sizeof(n->mark), &n->mark); 757 nla_put(skb, TCA_U32_MARK, sizeof(n->mark), &n->mark))
758 goto nla_put_failure;
753#endif 759#endif
754 760
755 if (tcf_exts_dump(skb, &n->exts, &u32_ext_map) < 0) 761 if (tcf_exts_dump(skb, &n->exts, &u32_ext_map) < 0)
756 goto nla_put_failure; 762 goto nla_put_failure;
757 763
758#ifdef CONFIG_NET_CLS_IND 764#ifdef CONFIG_NET_CLS_IND
759 if (strlen(n->indev)) 765 if (strlen(n->indev) &&
760 NLA_PUT_STRING(skb, TCA_U32_INDEV, n->indev); 766 nla_put_string(skb, TCA_U32_INDEV, n->indev))
767 goto nla_put_failure;
761#endif 768#endif
762#ifdef CONFIG_CLS_U32_PERF 769#ifdef CONFIG_CLS_U32_PERF
763 NLA_PUT(skb, TCA_U32_PCNT, 770 if (nla_put(skb, TCA_U32_PCNT,
764 sizeof(struct tc_u32_pcnt) + n->sel.nkeys*sizeof(u64), 771 sizeof(struct tc_u32_pcnt) + n->sel.nkeys*sizeof(u64),
765 n->pf); 772 n->pf))
773 goto nla_put_failure;
766#endif 774#endif
767 } 775 }
768 776
diff --git a/net/sched/em_meta.c b/net/sched/em_meta.c
index 1363bf14e61b..4790c696cbce 100644
--- a/net/sched/em_meta.c
+++ b/net/sched/em_meta.c
@@ -585,8 +585,9 @@ static void meta_var_apply_extras(struct meta_value *v,
585 585
586static int meta_var_dump(struct sk_buff *skb, struct meta_value *v, int tlv) 586static int meta_var_dump(struct sk_buff *skb, struct meta_value *v, int tlv)
587{ 587{
588 if (v->val && v->len) 588 if (v->val && v->len &&
589 NLA_PUT(skb, tlv, v->len, (void *) v->val); 589 nla_put(skb, tlv, v->len, (void *) v->val))
590 goto nla_put_failure;
590 return 0; 591 return 0;
591 592
592nla_put_failure: 593nla_put_failure:
@@ -636,10 +637,13 @@ static void meta_int_apply_extras(struct meta_value *v,
636 637
637static int meta_int_dump(struct sk_buff *skb, struct meta_value *v, int tlv) 638static int meta_int_dump(struct sk_buff *skb, struct meta_value *v, int tlv)
638{ 639{
639 if (v->len == sizeof(unsigned long)) 640 if (v->len == sizeof(unsigned long)) {
640 NLA_PUT(skb, tlv, sizeof(unsigned long), &v->val); 641 if (nla_put(skb, tlv, sizeof(unsigned long), &v->val))
641 else if (v->len == sizeof(u32)) 642 goto nla_put_failure;
642 NLA_PUT_U32(skb, tlv, v->val); 643 } else if (v->len == sizeof(u32)) {
644 if (nla_put_u32(skb, tlv, v->val))
645 goto nla_put_failure;
646 }
643 647
644 return 0; 648 return 0;
645 649
@@ -831,7 +835,8 @@ static int em_meta_dump(struct sk_buff *skb, struct tcf_ematch *em)
831 memcpy(&hdr.left, &meta->lvalue.hdr, sizeof(hdr.left)); 835 memcpy(&hdr.left, &meta->lvalue.hdr, sizeof(hdr.left));
832 memcpy(&hdr.right, &meta->rvalue.hdr, sizeof(hdr.right)); 836 memcpy(&hdr.right, &meta->rvalue.hdr, sizeof(hdr.right));
833 837
834 NLA_PUT(skb, TCA_EM_META_HDR, sizeof(hdr), &hdr); 838 if (nla_put(skb, TCA_EM_META_HDR, sizeof(hdr), &hdr))
839 goto nla_put_failure;
835 840
836 ops = meta_type_ops(&meta->lvalue); 841 ops = meta_type_ops(&meta->lvalue);
837 if (ops->dump(skb, &meta->lvalue, TCA_EM_META_LVALUE) < 0 || 842 if (ops->dump(skb, &meta->lvalue, TCA_EM_META_LVALUE) < 0 ||
diff --git a/net/sched/ematch.c b/net/sched/ematch.c
index 88d93eb92507..aca233c2b848 100644
--- a/net/sched/ematch.c
+++ b/net/sched/ematch.c
@@ -441,7 +441,8 @@ int tcf_em_tree_dump(struct sk_buff *skb, struct tcf_ematch_tree *tree, int tlv)
441 if (top_start == NULL) 441 if (top_start == NULL)
442 goto nla_put_failure; 442 goto nla_put_failure;
443 443
444 NLA_PUT(skb, TCA_EMATCH_TREE_HDR, sizeof(tree->hdr), &tree->hdr); 444 if (nla_put(skb, TCA_EMATCH_TREE_HDR, sizeof(tree->hdr), &tree->hdr))
445 goto nla_put_failure;
445 446
446 list_start = nla_nest_start(skb, TCA_EMATCH_TREE_LIST); 447 list_start = nla_nest_start(skb, TCA_EMATCH_TREE_LIST);
447 if (list_start == NULL) 448 if (list_start == NULL)
@@ -457,7 +458,8 @@ int tcf_em_tree_dump(struct sk_buff *skb, struct tcf_ematch_tree *tree, int tlv)
457 .flags = em->flags 458 .flags = em->flags
458 }; 459 };
459 460
460 NLA_PUT(skb, i + 1, sizeof(em_hdr), &em_hdr); 461 if (nla_put(skb, i + 1, sizeof(em_hdr), &em_hdr))
462 goto nla_put_failure;
461 463
462 if (em->ops && em->ops->dump) { 464 if (em->ops && em->ops->dump) {
463 if (em->ops->dump(skb, em) < 0) 465 if (em->ops->dump(skb, em) < 0)
diff --git a/net/sched/sch_api.c b/net/sched/sch_api.c
index 3d8981fde301..d2daefcc205f 100644
--- a/net/sched/sch_api.c
+++ b/net/sched/sch_api.c
@@ -426,7 +426,8 @@ static int qdisc_dump_stab(struct sk_buff *skb, struct qdisc_size_table *stab)
426 nest = nla_nest_start(skb, TCA_STAB); 426 nest = nla_nest_start(skb, TCA_STAB);
427 if (nest == NULL) 427 if (nest == NULL)
428 goto nla_put_failure; 428 goto nla_put_failure;
429 NLA_PUT(skb, TCA_STAB_BASE, sizeof(stab->szopts), &stab->szopts); 429 if (nla_put(skb, TCA_STAB_BASE, sizeof(stab->szopts), &stab->szopts))
430 goto nla_put_failure;
430 nla_nest_end(skb, nest); 431 nla_nest_end(skb, nest);
431 432
432 return skb->len; 433 return skb->len;
@@ -1201,7 +1202,8 @@ static int tc_fill_qdisc(struct sk_buff *skb, struct Qdisc *q, u32 clid,
1201 tcm->tcm_parent = clid; 1202 tcm->tcm_parent = clid;
1202 tcm->tcm_handle = q->handle; 1203 tcm->tcm_handle = q->handle;
1203 tcm->tcm_info = atomic_read(&q->refcnt); 1204 tcm->tcm_info = atomic_read(&q->refcnt);
1204 NLA_PUT_STRING(skb, TCA_KIND, q->ops->id); 1205 if (nla_put_string(skb, TCA_KIND, q->ops->id))
1206 goto nla_put_failure;
1205 if (q->ops->dump && q->ops->dump(q, skb) < 0) 1207 if (q->ops->dump && q->ops->dump(q, skb) < 0)
1206 goto nla_put_failure; 1208 goto nla_put_failure;
1207 q->qstats.qlen = q->q.qlen; 1209 q->qstats.qlen = q->q.qlen;
@@ -1505,7 +1507,8 @@ static int tc_fill_tclass(struct sk_buff *skb, struct Qdisc *q,
1505 tcm->tcm_parent = q->handle; 1507 tcm->tcm_parent = q->handle;
1506 tcm->tcm_handle = q->handle; 1508 tcm->tcm_handle = q->handle;
1507 tcm->tcm_info = 0; 1509 tcm->tcm_info = 0;
1508 NLA_PUT_STRING(skb, TCA_KIND, q->ops->id); 1510 if (nla_put_string(skb, TCA_KIND, q->ops->id))
1511 goto nla_put_failure;
1509 if (cl_ops->dump && cl_ops->dump(q, cl, skb, tcm) < 0) 1512 if (cl_ops->dump && cl_ops->dump(q, cl, skb, tcm) < 0)
1510 goto nla_put_failure; 1513 goto nla_put_failure;
1511 1514
diff --git a/net/sched/sch_atm.c b/net/sched/sch_atm.c
index e25e49061a0d..a77a4fbc069a 100644
--- a/net/sched/sch_atm.c
+++ b/net/sched/sch_atm.c
@@ -601,7 +601,8 @@ static int atm_tc_dump_class(struct Qdisc *sch, unsigned long cl,
601 if (nest == NULL) 601 if (nest == NULL)
602 goto nla_put_failure; 602 goto nla_put_failure;
603 603
604 NLA_PUT(skb, TCA_ATM_HDR, flow->hdr_len, flow->hdr); 604 if (nla_put(skb, TCA_ATM_HDR, flow->hdr_len, flow->hdr))
605 goto nla_put_failure;
605 if (flow->vcc) { 606 if (flow->vcc) {
606 struct sockaddr_atmpvc pvc; 607 struct sockaddr_atmpvc pvc;
607 int state; 608 int state;
@@ -610,15 +611,19 @@ static int atm_tc_dump_class(struct Qdisc *sch, unsigned long cl,
610 pvc.sap_addr.itf = flow->vcc->dev ? flow->vcc->dev->number : -1; 611 pvc.sap_addr.itf = flow->vcc->dev ? flow->vcc->dev->number : -1;
611 pvc.sap_addr.vpi = flow->vcc->vpi; 612 pvc.sap_addr.vpi = flow->vcc->vpi;
612 pvc.sap_addr.vci = flow->vcc->vci; 613 pvc.sap_addr.vci = flow->vcc->vci;
613 NLA_PUT(skb, TCA_ATM_ADDR, sizeof(pvc), &pvc); 614 if (nla_put(skb, TCA_ATM_ADDR, sizeof(pvc), &pvc))
615 goto nla_put_failure;
614 state = ATM_VF2VS(flow->vcc->flags); 616 state = ATM_VF2VS(flow->vcc->flags);
615 NLA_PUT_U32(skb, TCA_ATM_STATE, state); 617 if (nla_put_u32(skb, TCA_ATM_STATE, state))
618 goto nla_put_failure;
619 }
620 if (flow->excess) {
621 if (nla_put_u32(skb, TCA_ATM_EXCESS, flow->classid))
622 goto nla_put_failure;
623 } else {
624 if (nla_put_u32(skb, TCA_ATM_EXCESS, 0))
625 goto nla_put_failure;
616 } 626 }
617 if (flow->excess)
618 NLA_PUT_U32(skb, TCA_ATM_EXCESS, flow->classid);
619 else
620 NLA_PUT_U32(skb, TCA_ATM_EXCESS, 0);
621
622 nla_nest_end(skb, nest); 627 nla_nest_end(skb, nest);
623 return skb->len; 628 return skb->len;
624 629
diff --git a/net/sched/sch_cbq.c b/net/sched/sch_cbq.c
index 24d94c097b35..6aabd77d1cfd 100644
--- a/net/sched/sch_cbq.c
+++ b/net/sched/sch_cbq.c
@@ -1425,7 +1425,8 @@ static int cbq_dump_rate(struct sk_buff *skb, struct cbq_class *cl)
1425{ 1425{
1426 unsigned char *b = skb_tail_pointer(skb); 1426 unsigned char *b = skb_tail_pointer(skb);
1427 1427
1428 NLA_PUT(skb, TCA_CBQ_RATE, sizeof(cl->R_tab->rate), &cl->R_tab->rate); 1428 if (nla_put(skb, TCA_CBQ_RATE, sizeof(cl->R_tab->rate), &cl->R_tab->rate))
1429 goto nla_put_failure;
1429 return skb->len; 1430 return skb->len;
1430 1431
1431nla_put_failure: 1432nla_put_failure:
@@ -1450,7 +1451,8 @@ static int cbq_dump_lss(struct sk_buff *skb, struct cbq_class *cl)
1450 opt.minidle = (u32)(-cl->minidle); 1451 opt.minidle = (u32)(-cl->minidle);
1451 opt.offtime = cl->offtime; 1452 opt.offtime = cl->offtime;
1452 opt.change = ~0; 1453 opt.change = ~0;
1453 NLA_PUT(skb, TCA_CBQ_LSSOPT, sizeof(opt), &opt); 1454 if (nla_put(skb, TCA_CBQ_LSSOPT, sizeof(opt), &opt))
1455 goto nla_put_failure;
1454 return skb->len; 1456 return skb->len;
1455 1457
1456nla_put_failure: 1458nla_put_failure:
@@ -1468,7 +1470,8 @@ static int cbq_dump_wrr(struct sk_buff *skb, struct cbq_class *cl)
1468 opt.priority = cl->priority + 1; 1470 opt.priority = cl->priority + 1;
1469 opt.cpriority = cl->cpriority + 1; 1471 opt.cpriority = cl->cpriority + 1;
1470 opt.weight = cl->weight; 1472 opt.weight = cl->weight;
1471 NLA_PUT(skb, TCA_CBQ_WRROPT, sizeof(opt), &opt); 1473 if (nla_put(skb, TCA_CBQ_WRROPT, sizeof(opt), &opt))
1474 goto nla_put_failure;
1472 return skb->len; 1475 return skb->len;
1473 1476
1474nla_put_failure: 1477nla_put_failure:
@@ -1485,7 +1488,8 @@ static int cbq_dump_ovl(struct sk_buff *skb, struct cbq_class *cl)
1485 opt.priority2 = cl->priority2 + 1; 1488 opt.priority2 = cl->priority2 + 1;
1486 opt.pad = 0; 1489 opt.pad = 0;
1487 opt.penalty = cl->penalty; 1490 opt.penalty = cl->penalty;
1488 NLA_PUT(skb, TCA_CBQ_OVL_STRATEGY, sizeof(opt), &opt); 1491 if (nla_put(skb, TCA_CBQ_OVL_STRATEGY, sizeof(opt), &opt))
1492 goto nla_put_failure;
1489 return skb->len; 1493 return skb->len;
1490 1494
1491nla_put_failure: 1495nla_put_failure:
@@ -1502,7 +1506,8 @@ static int cbq_dump_fopt(struct sk_buff *skb, struct cbq_class *cl)
1502 opt.split = cl->split ? cl->split->common.classid : 0; 1506 opt.split = cl->split ? cl->split->common.classid : 0;
1503 opt.defmap = cl->defmap; 1507 opt.defmap = cl->defmap;
1504 opt.defchange = ~0; 1508 opt.defchange = ~0;
1505 NLA_PUT(skb, TCA_CBQ_FOPT, sizeof(opt), &opt); 1509 if (nla_put(skb, TCA_CBQ_FOPT, sizeof(opt), &opt))
1510 goto nla_put_failure;
1506 } 1511 }
1507 return skb->len; 1512 return skb->len;
1508 1513
@@ -1521,7 +1526,8 @@ static int cbq_dump_police(struct sk_buff *skb, struct cbq_class *cl)
1521 opt.police = cl->police; 1526 opt.police = cl->police;
1522 opt.__res1 = 0; 1527 opt.__res1 = 0;
1523 opt.__res2 = 0; 1528 opt.__res2 = 0;
1524 NLA_PUT(skb, TCA_CBQ_POLICE, sizeof(opt), &opt); 1529 if (nla_put(skb, TCA_CBQ_POLICE, sizeof(opt), &opt))
1530 goto nla_put_failure;
1525 } 1531 }
1526 return skb->len; 1532 return skb->len;
1527 1533
diff --git a/net/sched/sch_choke.c b/net/sched/sch_choke.c
index 7e267d7b9c75..81445cc8196f 100644
--- a/net/sched/sch_choke.c
+++ b/net/sched/sch_choke.c
@@ -515,8 +515,9 @@ static int choke_dump(struct Qdisc *sch, struct sk_buff *skb)
515 if (opts == NULL) 515 if (opts == NULL)
516 goto nla_put_failure; 516 goto nla_put_failure;
517 517
518 NLA_PUT(skb, TCA_CHOKE_PARMS, sizeof(opt), &opt); 518 if (nla_put(skb, TCA_CHOKE_PARMS, sizeof(opt), &opt) ||
519 NLA_PUT_U32(skb, TCA_CHOKE_MAX_P, q->parms.max_P); 519 nla_put_u32(skb, TCA_CHOKE_MAX_P, q->parms.max_P))
520 goto nla_put_failure;
520 return nla_nest_end(skb, opts); 521 return nla_nest_end(skb, opts);
521 522
522nla_put_failure: 523nla_put_failure:
diff --git a/net/sched/sch_drr.c b/net/sched/sch_drr.c
index 6b7fe4a84f13..c2189879359b 100644
--- a/net/sched/sch_drr.c
+++ b/net/sched/sch_drr.c
@@ -260,7 +260,8 @@ static int drr_dump_class(struct Qdisc *sch, unsigned long arg,
260 nest = nla_nest_start(skb, TCA_OPTIONS); 260 nest = nla_nest_start(skb, TCA_OPTIONS);
261 if (nest == NULL) 261 if (nest == NULL)
262 goto nla_put_failure; 262 goto nla_put_failure;
263 NLA_PUT_U32(skb, TCA_DRR_QUANTUM, cl->quantum); 263 if (nla_put_u32(skb, TCA_DRR_QUANTUM, cl->quantum))
264 goto nla_put_failure;
264 return nla_nest_end(skb, nest); 265 return nla_nest_end(skb, nest);
265 266
266nla_put_failure: 267nla_put_failure:
diff --git a/net/sched/sch_dsmark.c b/net/sched/sch_dsmark.c
index 2c790204d042..389b856c6653 100644
--- a/net/sched/sch_dsmark.c
+++ b/net/sched/sch_dsmark.c
@@ -429,8 +429,9 @@ static int dsmark_dump_class(struct Qdisc *sch, unsigned long cl,
429 opts = nla_nest_start(skb, TCA_OPTIONS); 429 opts = nla_nest_start(skb, TCA_OPTIONS);
430 if (opts == NULL) 430 if (opts == NULL)
431 goto nla_put_failure; 431 goto nla_put_failure;
432 NLA_PUT_U8(skb, TCA_DSMARK_MASK, p->mask[cl - 1]); 432 if (nla_put_u8(skb, TCA_DSMARK_MASK, p->mask[cl - 1]) ||
433 NLA_PUT_U8(skb, TCA_DSMARK_VALUE, p->value[cl - 1]); 433 nla_put_u8(skb, TCA_DSMARK_VALUE, p->value[cl - 1]))
434 goto nla_put_failure;
434 435
435 return nla_nest_end(skb, opts); 436 return nla_nest_end(skb, opts);
436 437
@@ -447,13 +448,16 @@ static int dsmark_dump(struct Qdisc *sch, struct sk_buff *skb)
447 opts = nla_nest_start(skb, TCA_OPTIONS); 448 opts = nla_nest_start(skb, TCA_OPTIONS);
448 if (opts == NULL) 449 if (opts == NULL)
449 goto nla_put_failure; 450 goto nla_put_failure;
450 NLA_PUT_U16(skb, TCA_DSMARK_INDICES, p->indices); 451 if (nla_put_u16(skb, TCA_DSMARK_INDICES, p->indices))
452 goto nla_put_failure;
451 453
452 if (p->default_index != NO_DEFAULT_INDEX) 454 if (p->default_index != NO_DEFAULT_INDEX &&
453 NLA_PUT_U16(skb, TCA_DSMARK_DEFAULT_INDEX, p->default_index); 455 nla_put_u16(skb, TCA_DSMARK_DEFAULT_INDEX, p->default_index))
456 goto nla_put_failure;
454 457
455 if (p->set_tc_index) 458 if (p->set_tc_index &&
456 NLA_PUT_FLAG(skb, TCA_DSMARK_SET_TC_INDEX); 459 nla_put_flag(skb, TCA_DSMARK_SET_TC_INDEX))
460 goto nla_put_failure;
457 461
458 return nla_nest_end(skb, opts); 462 return nla_nest_end(skb, opts);
459 463
diff --git a/net/sched/sch_fifo.c b/net/sched/sch_fifo.c
index 66effe2da8e0..e15a9eb29087 100644
--- a/net/sched/sch_fifo.c
+++ b/net/sched/sch_fifo.c
@@ -85,7 +85,8 @@ static int fifo_dump(struct Qdisc *sch, struct sk_buff *skb)
85{ 85{
86 struct tc_fifo_qopt opt = { .limit = sch->limit }; 86 struct tc_fifo_qopt opt = { .limit = sch->limit };
87 87
88 NLA_PUT(skb, TCA_OPTIONS, sizeof(opt), &opt); 88 if (nla_put(skb, TCA_OPTIONS, sizeof(opt), &opt))
89 goto nla_put_failure;
89 return skb->len; 90 return skb->len;
90 91
91nla_put_failure: 92nla_put_failure:
diff --git a/net/sched/sch_generic.c b/net/sched/sch_generic.c
index 67fc573e013a..0eb1202c22a6 100644
--- a/net/sched/sch_generic.c
+++ b/net/sched/sch_generic.c
@@ -512,7 +512,8 @@ static int pfifo_fast_dump(struct Qdisc *qdisc, struct sk_buff *skb)
512 struct tc_prio_qopt opt = { .bands = PFIFO_FAST_BANDS }; 512 struct tc_prio_qopt opt = { .bands = PFIFO_FAST_BANDS };
513 513
514 memcpy(&opt.priomap, prio2band, TC_PRIO_MAX + 1); 514 memcpy(&opt.priomap, prio2band, TC_PRIO_MAX + 1);
515 NLA_PUT(skb, TCA_OPTIONS, sizeof(opt), &opt); 515 if (nla_put(skb, TCA_OPTIONS, sizeof(opt), &opt))
516 goto nla_put_failure;
516 return skb->len; 517 return skb->len;
517 518
518nla_put_failure: 519nla_put_failure:
diff --git a/net/sched/sch_gred.c b/net/sched/sch_gred.c
index 0b15236be7b6..55e3310edc94 100644
--- a/net/sched/sch_gred.c
+++ b/net/sched/sch_gred.c
@@ -521,14 +521,16 @@ static int gred_dump(struct Qdisc *sch, struct sk_buff *skb)
521 opts = nla_nest_start(skb, TCA_OPTIONS); 521 opts = nla_nest_start(skb, TCA_OPTIONS);
522 if (opts == NULL) 522 if (opts == NULL)
523 goto nla_put_failure; 523 goto nla_put_failure;
524 NLA_PUT(skb, TCA_GRED_DPS, sizeof(sopt), &sopt); 524 if (nla_put(skb, TCA_GRED_DPS, sizeof(sopt), &sopt))
525 goto nla_put_failure;
525 526
526 for (i = 0; i < MAX_DPs; i++) { 527 for (i = 0; i < MAX_DPs; i++) {
527 struct gred_sched_data *q = table->tab[i]; 528 struct gred_sched_data *q = table->tab[i];
528 529
529 max_p[i] = q ? q->parms.max_P : 0; 530 max_p[i] = q ? q->parms.max_P : 0;
530 } 531 }
531 NLA_PUT(skb, TCA_GRED_MAX_P, sizeof(max_p), max_p); 532 if (nla_put(skb, TCA_GRED_MAX_P, sizeof(max_p), max_p))
533 goto nla_put_failure;
532 534
533 parms = nla_nest_start(skb, TCA_GRED_PARMS); 535 parms = nla_nest_start(skb, TCA_GRED_PARMS);
534 if (parms == NULL) 536 if (parms == NULL)
diff --git a/net/sched/sch_hfsc.c b/net/sched/sch_hfsc.c
index 9bdca2e011e9..8db3e2c72827 100644
--- a/net/sched/sch_hfsc.c
+++ b/net/sched/sch_hfsc.c
@@ -1305,7 +1305,8 @@ hfsc_dump_sc(struct sk_buff *skb, int attr, struct internal_sc *sc)
1305 tsc.m1 = sm2m(sc->sm1); 1305 tsc.m1 = sm2m(sc->sm1);
1306 tsc.d = dx2d(sc->dx); 1306 tsc.d = dx2d(sc->dx);
1307 tsc.m2 = sm2m(sc->sm2); 1307 tsc.m2 = sm2m(sc->sm2);
1308 NLA_PUT(skb, attr, sizeof(tsc), &tsc); 1308 if (nla_put(skb, attr, sizeof(tsc), &tsc))
1309 goto nla_put_failure;
1309 1310
1310 return skb->len; 1311 return skb->len;
1311 1312
@@ -1573,7 +1574,8 @@ hfsc_dump_qdisc(struct Qdisc *sch, struct sk_buff *skb)
1573 } 1574 }
1574 1575
1575 qopt.defcls = q->defcls; 1576 qopt.defcls = q->defcls;
1576 NLA_PUT(skb, TCA_OPTIONS, sizeof(qopt), &qopt); 1577 if (nla_put(skb, TCA_OPTIONS, sizeof(qopt), &qopt))
1578 goto nla_put_failure;
1577 return skb->len; 1579 return skb->len;
1578 1580
1579 nla_put_failure: 1581 nla_put_failure:
diff --git a/net/sched/sch_htb.c b/net/sched/sch_htb.c
index 29b942ce9e82..2ea6f196e3c8 100644
--- a/net/sched/sch_htb.c
+++ b/net/sched/sch_htb.c
@@ -1051,7 +1051,8 @@ static int htb_dump(struct Qdisc *sch, struct sk_buff *skb)
1051 nest = nla_nest_start(skb, TCA_OPTIONS); 1051 nest = nla_nest_start(skb, TCA_OPTIONS);
1052 if (nest == NULL) 1052 if (nest == NULL)
1053 goto nla_put_failure; 1053 goto nla_put_failure;
1054 NLA_PUT(skb, TCA_HTB_INIT, sizeof(gopt), &gopt); 1054 if (nla_put(skb, TCA_HTB_INIT, sizeof(gopt), &gopt))
1055 goto nla_put_failure;
1055 nla_nest_end(skb, nest); 1056 nla_nest_end(skb, nest);
1056 1057
1057 spin_unlock_bh(root_lock); 1058 spin_unlock_bh(root_lock);
@@ -1090,7 +1091,8 @@ static int htb_dump_class(struct Qdisc *sch, unsigned long arg,
1090 opt.quantum = cl->quantum; 1091 opt.quantum = cl->quantum;
1091 opt.prio = cl->prio; 1092 opt.prio = cl->prio;
1092 opt.level = cl->level; 1093 opt.level = cl->level;
1093 NLA_PUT(skb, TCA_HTB_PARMS, sizeof(opt), &opt); 1094 if (nla_put(skb, TCA_HTB_PARMS, sizeof(opt), &opt))
1095 goto nla_put_failure;
1094 1096
1095 nla_nest_end(skb, nest); 1097 nla_nest_end(skb, nest);
1096 spin_unlock_bh(root_lock); 1098 spin_unlock_bh(root_lock);
diff --git a/net/sched/sch_mqprio.c b/net/sched/sch_mqprio.c
index 28de43092330..d1831ca966d4 100644
--- a/net/sched/sch_mqprio.c
+++ b/net/sched/sch_mqprio.c
@@ -247,7 +247,8 @@ static int mqprio_dump(struct Qdisc *sch, struct sk_buff *skb)
247 opt.offset[i] = dev->tc_to_txq[i].offset; 247 opt.offset[i] = dev->tc_to_txq[i].offset;
248 } 248 }
249 249
250 NLA_PUT(skb, TCA_OPTIONS, sizeof(opt), &opt); 250 if (nla_put(skb, TCA_OPTIONS, sizeof(opt), &opt))
251 goto nla_put_failure;
251 252
252 return skb->len; 253 return skb->len;
253nla_put_failure: 254nla_put_failure:
diff --git a/net/sched/sch_multiq.c b/net/sched/sch_multiq.c
index 49131d7a7446..2a2b096d9a66 100644
--- a/net/sched/sch_multiq.c
+++ b/net/sched/sch_multiq.c
@@ -284,7 +284,8 @@ static int multiq_dump(struct Qdisc *sch, struct sk_buff *skb)
284 opt.bands = q->bands; 284 opt.bands = q->bands;
285 opt.max_bands = q->max_bands; 285 opt.max_bands = q->max_bands;
286 286
287 NLA_PUT(skb, TCA_OPTIONS, sizeof(opt), &opt); 287 if (nla_put(skb, TCA_OPTIONS, sizeof(opt), &opt))
288 goto nla_put_failure;
288 289
289 return skb->len; 290 return skb->len;
290 291
diff --git a/net/sched/sch_netem.c b/net/sched/sch_netem.c
index 5da548fa7ae9..110973145a4b 100644
--- a/net/sched/sch_netem.c
+++ b/net/sched/sch_netem.c
@@ -834,7 +834,8 @@ static int dump_loss_model(const struct netem_sched_data *q,
834 .p23 = q->clg.a5, 834 .p23 = q->clg.a5,
835 }; 835 };
836 836
837 NLA_PUT(skb, NETEM_LOSS_GI, sizeof(gi), &gi); 837 if (nla_put(skb, NETEM_LOSS_GI, sizeof(gi), &gi))
838 goto nla_put_failure;
838 break; 839 break;
839 } 840 }
840 case CLG_GILB_ELL: { 841 case CLG_GILB_ELL: {
@@ -845,7 +846,8 @@ static int dump_loss_model(const struct netem_sched_data *q,
845 .k1 = q->clg.a4, 846 .k1 = q->clg.a4,
846 }; 847 };
847 848
848 NLA_PUT(skb, NETEM_LOSS_GE, sizeof(ge), &ge); 849 if (nla_put(skb, NETEM_LOSS_GE, sizeof(ge), &ge))
850 goto nla_put_failure;
849 break; 851 break;
850 } 852 }
851 } 853 }
@@ -874,26 +876,31 @@ static int netem_dump(struct Qdisc *sch, struct sk_buff *skb)
874 qopt.loss = q->loss; 876 qopt.loss = q->loss;
875 qopt.gap = q->gap; 877 qopt.gap = q->gap;
876 qopt.duplicate = q->duplicate; 878 qopt.duplicate = q->duplicate;
877 NLA_PUT(skb, TCA_OPTIONS, sizeof(qopt), &qopt); 879 if (nla_put(skb, TCA_OPTIONS, sizeof(qopt), &qopt))
880 goto nla_put_failure;
878 881
879 cor.delay_corr = q->delay_cor.rho; 882 cor.delay_corr = q->delay_cor.rho;
880 cor.loss_corr = q->loss_cor.rho; 883 cor.loss_corr = q->loss_cor.rho;
881 cor.dup_corr = q->dup_cor.rho; 884 cor.dup_corr = q->dup_cor.rho;
882 NLA_PUT(skb, TCA_NETEM_CORR, sizeof(cor), &cor); 885 if (nla_put(skb, TCA_NETEM_CORR, sizeof(cor), &cor))
886 goto nla_put_failure;
883 887
884 reorder.probability = q->reorder; 888 reorder.probability = q->reorder;
885 reorder.correlation = q->reorder_cor.rho; 889 reorder.correlation = q->reorder_cor.rho;
886 NLA_PUT(skb, TCA_NETEM_REORDER, sizeof(reorder), &reorder); 890 if (nla_put(skb, TCA_NETEM_REORDER, sizeof(reorder), &reorder))
891 goto nla_put_failure;
887 892
888 corrupt.probability = q->corrupt; 893 corrupt.probability = q->corrupt;
889 corrupt.correlation = q->corrupt_cor.rho; 894 corrupt.correlation = q->corrupt_cor.rho;
890 NLA_PUT(skb, TCA_NETEM_CORRUPT, sizeof(corrupt), &corrupt); 895 if (nla_put(skb, TCA_NETEM_CORRUPT, sizeof(corrupt), &corrupt))
896 goto nla_put_failure;
891 897
892 rate.rate = q->rate; 898 rate.rate = q->rate;
893 rate.packet_overhead = q->packet_overhead; 899 rate.packet_overhead = q->packet_overhead;
894 rate.cell_size = q->cell_size; 900 rate.cell_size = q->cell_size;
895 rate.cell_overhead = q->cell_overhead; 901 rate.cell_overhead = q->cell_overhead;
896 NLA_PUT(skb, TCA_NETEM_RATE, sizeof(rate), &rate); 902 if (nla_put(skb, TCA_NETEM_RATE, sizeof(rate), &rate))
903 goto nla_put_failure;
897 904
898 if (dump_loss_model(q, skb) != 0) 905 if (dump_loss_model(q, skb) != 0)
899 goto nla_put_failure; 906 goto nla_put_failure;
diff --git a/net/sched/sch_prio.c b/net/sched/sch_prio.c
index b5d56a22b1d2..79359b69ad8d 100644
--- a/net/sched/sch_prio.c
+++ b/net/sched/sch_prio.c
@@ -247,7 +247,8 @@ static int prio_dump(struct Qdisc *sch, struct sk_buff *skb)
247 opt.bands = q->bands; 247 opt.bands = q->bands;
248 memcpy(&opt.priomap, q->prio2band, TC_PRIO_MAX + 1); 248 memcpy(&opt.priomap, q->prio2band, TC_PRIO_MAX + 1);
249 249
250 NLA_PUT(skb, TCA_OPTIONS, sizeof(opt), &opt); 250 if (nla_put(skb, TCA_OPTIONS, sizeof(opt), &opt))
251 goto nla_put_failure;
251 252
252 return skb->len; 253 return skb->len;
253 254
diff --git a/net/sched/sch_qfq.c b/net/sched/sch_qfq.c
index e68cb440756a..9af01f3df18c 100644
--- a/net/sched/sch_qfq.c
+++ b/net/sched/sch_qfq.c
@@ -429,8 +429,9 @@ static int qfq_dump_class(struct Qdisc *sch, unsigned long arg,
429 nest = nla_nest_start(skb, TCA_OPTIONS); 429 nest = nla_nest_start(skb, TCA_OPTIONS);
430 if (nest == NULL) 430 if (nest == NULL)
431 goto nla_put_failure; 431 goto nla_put_failure;
432 NLA_PUT_U32(skb, TCA_QFQ_WEIGHT, ONE_FP/cl->inv_w); 432 if (nla_put_u32(skb, TCA_QFQ_WEIGHT, ONE_FP/cl->inv_w) ||
433 NLA_PUT_U32(skb, TCA_QFQ_LMAX, cl->lmax); 433 nla_put_u32(skb, TCA_QFQ_LMAX, cl->lmax))
434 goto nla_put_failure;
434 return nla_nest_end(skb, nest); 435 return nla_nest_end(skb, nest);
435 436
436nla_put_failure: 437nla_put_failure:
diff --git a/net/sched/sch_red.c b/net/sched/sch_red.c
index a5cc3012cf42..633e32defdcc 100644
--- a/net/sched/sch_red.c
+++ b/net/sched/sch_red.c
@@ -272,8 +272,9 @@ static int red_dump(struct Qdisc *sch, struct sk_buff *skb)
272 opts = nla_nest_start(skb, TCA_OPTIONS); 272 opts = nla_nest_start(skb, TCA_OPTIONS);
273 if (opts == NULL) 273 if (opts == NULL)
274 goto nla_put_failure; 274 goto nla_put_failure;
275 NLA_PUT(skb, TCA_RED_PARMS, sizeof(opt), &opt); 275 if (nla_put(skb, TCA_RED_PARMS, sizeof(opt), &opt) ||
276 NLA_PUT_U32(skb, TCA_RED_MAX_P, q->parms.max_P); 276 nla_put_u32(skb, TCA_RED_MAX_P, q->parms.max_P))
277 goto nla_put_failure;
277 return nla_nest_end(skb, opts); 278 return nla_nest_end(skb, opts);
278 279
279nla_put_failure: 280nla_put_failure:
diff --git a/net/sched/sch_sfb.c b/net/sched/sch_sfb.c
index d7eea99333e9..74305c883bd3 100644
--- a/net/sched/sch_sfb.c
+++ b/net/sched/sch_sfb.c
@@ -570,7 +570,8 @@ static int sfb_dump(struct Qdisc *sch, struct sk_buff *skb)
570 570
571 sch->qstats.backlog = q->qdisc->qstats.backlog; 571 sch->qstats.backlog = q->qdisc->qstats.backlog;
572 opts = nla_nest_start(skb, TCA_OPTIONS); 572 opts = nla_nest_start(skb, TCA_OPTIONS);
573 NLA_PUT(skb, TCA_SFB_PARMS, sizeof(opt), &opt); 573 if (nla_put(skb, TCA_SFB_PARMS, sizeof(opt), &opt))
574 goto nla_put_failure;
574 return nla_nest_end(skb, opts); 575 return nla_nest_end(skb, opts);
575 576
576nla_put_failure: 577nla_put_failure:
diff --git a/net/sched/sch_sfq.c b/net/sched/sch_sfq.c
index 02a21abea65e..d3a1bc26dbfc 100644
--- a/net/sched/sch_sfq.c
+++ b/net/sched/sch_sfq.c
@@ -812,7 +812,8 @@ static int sfq_dump(struct Qdisc *sch, struct sk_buff *skb)
812 memcpy(&opt.stats, &q->stats, sizeof(opt.stats)); 812 memcpy(&opt.stats, &q->stats, sizeof(opt.stats));
813 opt.flags = q->flags; 813 opt.flags = q->flags;
814 814
815 NLA_PUT(skb, TCA_OPTIONS, sizeof(opt), &opt); 815 if (nla_put(skb, TCA_OPTIONS, sizeof(opt), &opt))
816 goto nla_put_failure;
816 817
817 return skb->len; 818 return skb->len;
818 819
diff --git a/net/sched/sch_tbf.c b/net/sched/sch_tbf.c
index b8e156319d7b..4b056c15e90c 100644
--- a/net/sched/sch_tbf.c
+++ b/net/sched/sch_tbf.c
@@ -359,7 +359,8 @@ static int tbf_dump(struct Qdisc *sch, struct sk_buff *skb)
359 memset(&opt.peakrate, 0, sizeof(opt.peakrate)); 359 memset(&opt.peakrate, 0, sizeof(opt.peakrate));
360 opt.mtu = q->mtu; 360 opt.mtu = q->mtu;
361 opt.buffer = q->buffer; 361 opt.buffer = q->buffer;
362 NLA_PUT(skb, TCA_TBF_PARMS, sizeof(opt), &opt); 362 if (nla_put(skb, TCA_TBF_PARMS, sizeof(opt), &opt))
363 goto nla_put_failure;
363 364
364 nla_nest_end(skb, nest); 365 nla_nest_end(skb, nest);
365 return skb->len; 366 return skb->len;
diff --git a/net/unix/af_unix.c b/net/unix/af_unix.c
index d510353ef431..eadb9020cd64 100644
--- a/net/unix/af_unix.c
+++ b/net/unix/af_unix.c
@@ -1442,6 +1442,7 @@ static int unix_dgram_sendmsg(struct kiocb *kiocb, struct socket *sock,
1442 long timeo; 1442 long timeo;
1443 struct scm_cookie tmp_scm; 1443 struct scm_cookie tmp_scm;
1444 int max_level; 1444 int max_level;
1445 int data_len = 0;
1445 1446
1446 if (NULL == siocb->scm) 1447 if (NULL == siocb->scm)
1447 siocb->scm = &tmp_scm; 1448 siocb->scm = &tmp_scm;
@@ -1475,7 +1476,13 @@ static int unix_dgram_sendmsg(struct kiocb *kiocb, struct socket *sock,
1475 if (len > sk->sk_sndbuf - 32) 1476 if (len > sk->sk_sndbuf - 32)
1476 goto out; 1477 goto out;
1477 1478
1478 skb = sock_alloc_send_skb(sk, len, msg->msg_flags&MSG_DONTWAIT, &err); 1479 if (len > SKB_MAX_ALLOC)
1480 data_len = min_t(size_t,
1481 len - SKB_MAX_ALLOC,
1482 MAX_SKB_FRAGS * PAGE_SIZE);
1483
1484 skb = sock_alloc_send_pskb(sk, len - data_len, data_len,
1485 msg->msg_flags & MSG_DONTWAIT, &err);
1479 if (skb == NULL) 1486 if (skb == NULL)
1480 goto out; 1487 goto out;
1481 1488
@@ -1485,8 +1492,10 @@ static int unix_dgram_sendmsg(struct kiocb *kiocb, struct socket *sock,
1485 max_level = err + 1; 1492 max_level = err + 1;
1486 unix_get_secdata(siocb->scm, skb); 1493 unix_get_secdata(siocb->scm, skb);
1487 1494
1488 skb_reset_transport_header(skb); 1495 skb_put(skb, len - data_len);
1489 err = memcpy_fromiovec(skb_put(skb, len), msg->msg_iov, len); 1496 skb->data_len = data_len;
1497 skb->len = len;
1498 err = skb_copy_datagram_from_iovec(skb, 0, msg->msg_iov, 0, len);
1490 if (err) 1499 if (err)
1491 goto out_free; 1500 goto out_free;
1492 1501
diff --git a/net/wireless/nl80211.c b/net/wireless/nl80211.c
index e49da2797022..a4aab1d36285 100644
--- a/net/wireless/nl80211.c
+++ b/net/wireless/nl80211.c
@@ -356,20 +356,26 @@ static inline void *nl80211hdr_put(struct sk_buff *skb, u32 pid, u32 seq,
356static int nl80211_msg_put_channel(struct sk_buff *msg, 356static int nl80211_msg_put_channel(struct sk_buff *msg,
357 struct ieee80211_channel *chan) 357 struct ieee80211_channel *chan)
358{ 358{
359 NLA_PUT_U32(msg, NL80211_FREQUENCY_ATTR_FREQ, 359 if (nla_put_u32(msg, NL80211_FREQUENCY_ATTR_FREQ,
360 chan->center_freq); 360 chan->center_freq))
361 goto nla_put_failure;
361 362
362 if (chan->flags & IEEE80211_CHAN_DISABLED) 363 if ((chan->flags & IEEE80211_CHAN_DISABLED) &&
363 NLA_PUT_FLAG(msg, NL80211_FREQUENCY_ATTR_DISABLED); 364 nla_put_flag(msg, NL80211_FREQUENCY_ATTR_DISABLED))
364 if (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN) 365 goto nla_put_failure;
365 NLA_PUT_FLAG(msg, NL80211_FREQUENCY_ATTR_PASSIVE_SCAN); 366 if ((chan->flags & IEEE80211_CHAN_PASSIVE_SCAN) &&
366 if (chan->flags & IEEE80211_CHAN_NO_IBSS) 367 nla_put_flag(msg, NL80211_FREQUENCY_ATTR_PASSIVE_SCAN))
367 NLA_PUT_FLAG(msg, NL80211_FREQUENCY_ATTR_NO_IBSS); 368 goto nla_put_failure;
368 if (chan->flags & IEEE80211_CHAN_RADAR) 369 if ((chan->flags & IEEE80211_CHAN_NO_IBSS) &&
369 NLA_PUT_FLAG(msg, NL80211_FREQUENCY_ATTR_RADAR); 370 nla_put_flag(msg, NL80211_FREQUENCY_ATTR_NO_IBSS))
371 goto nla_put_failure;
372 if ((chan->flags & IEEE80211_CHAN_RADAR) &&
373 nla_put_flag(msg, NL80211_FREQUENCY_ATTR_RADAR))
374 goto nla_put_failure;
370 375
371 NLA_PUT_U32(msg, NL80211_FREQUENCY_ATTR_MAX_TX_POWER, 376 if (nla_put_u32(msg, NL80211_FREQUENCY_ATTR_MAX_TX_POWER,
372 DBM_TO_MBM(chan->max_power)); 377 DBM_TO_MBM(chan->max_power)))
378 goto nla_put_failure;
373 379
374 return 0; 380 return 0;
375 381
@@ -621,8 +627,8 @@ static int nl80211_put_iftypes(struct sk_buff *msg, u32 attr, u16 ifmodes)
621 627
622 i = 0; 628 i = 0;
623 while (ifmodes) { 629 while (ifmodes) {
624 if (ifmodes & 1) 630 if ((ifmodes & 1) && nla_put_flag(msg, i))
625 NLA_PUT_FLAG(msg, i); 631 goto nla_put_failure;
626 ifmodes >>= 1; 632 ifmodes >>= 1;
627 i++; 633 i++;
628 } 634 }
@@ -665,8 +671,9 @@ static int nl80211_put_iface_combinations(struct wiphy *wiphy,
665 nl_limit = nla_nest_start(msg, j + 1); 671 nl_limit = nla_nest_start(msg, j + 1);
666 if (!nl_limit) 672 if (!nl_limit)
667 goto nla_put_failure; 673 goto nla_put_failure;
668 NLA_PUT_U32(msg, NL80211_IFACE_LIMIT_MAX, 674 if (nla_put_u32(msg, NL80211_IFACE_LIMIT_MAX,
669 c->limits[j].max); 675 c->limits[j].max))
676 goto nla_put_failure;
670 if (nl80211_put_iftypes(msg, NL80211_IFACE_LIMIT_TYPES, 677 if (nl80211_put_iftypes(msg, NL80211_IFACE_LIMIT_TYPES,
671 c->limits[j].types)) 678 c->limits[j].types))
672 goto nla_put_failure; 679 goto nla_put_failure;
@@ -675,13 +682,14 @@ static int nl80211_put_iface_combinations(struct wiphy *wiphy,
675 682
676 nla_nest_end(msg, nl_limits); 683 nla_nest_end(msg, nl_limits);
677 684
678 if (c->beacon_int_infra_match) 685 if (c->beacon_int_infra_match &&
679 NLA_PUT_FLAG(msg, 686 nla_put_flag(msg, NL80211_IFACE_COMB_STA_AP_BI_MATCH))
680 NL80211_IFACE_COMB_STA_AP_BI_MATCH); 687 goto nla_put_failure;
681 NLA_PUT_U32(msg, NL80211_IFACE_COMB_NUM_CHANNELS, 688 if (nla_put_u32(msg, NL80211_IFACE_COMB_NUM_CHANNELS,
682 c->num_different_channels); 689 c->num_different_channels) ||
683 NLA_PUT_U32(msg, NL80211_IFACE_COMB_MAXNUM, 690 nla_put_u32(msg, NL80211_IFACE_COMB_MAXNUM,
684 c->max_interfaces); 691 c->max_interfaces))
692 goto nla_put_failure;
685 693
686 nla_nest_end(msg, nl_combi); 694 nla_nest_end(msg, nl_combi);
687 } 695 }
@@ -712,64 +720,74 @@ static int nl80211_send_wiphy(struct sk_buff *msg, u32 pid, u32 seq, int flags,
712 if (!hdr) 720 if (!hdr)
713 return -1; 721 return -1;
714 722
715 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, dev->wiphy_idx); 723 if (nla_put_u32(msg, NL80211_ATTR_WIPHY, dev->wiphy_idx) ||
716 NLA_PUT_STRING(msg, NL80211_ATTR_WIPHY_NAME, wiphy_name(&dev->wiphy)); 724 nla_put_string(msg, NL80211_ATTR_WIPHY_NAME, wiphy_name(&dev->wiphy)) ||
717 725 nla_put_u32(msg, NL80211_ATTR_GENERATION,
718 NLA_PUT_U32(msg, NL80211_ATTR_GENERATION, 726 cfg80211_rdev_list_generation) ||
719 cfg80211_rdev_list_generation); 727 nla_put_u8(msg, NL80211_ATTR_WIPHY_RETRY_SHORT,
720 728 dev->wiphy.retry_short) ||
721 NLA_PUT_U8(msg, NL80211_ATTR_WIPHY_RETRY_SHORT, 729 nla_put_u8(msg, NL80211_ATTR_WIPHY_RETRY_LONG,
722 dev->wiphy.retry_short); 730 dev->wiphy.retry_long) ||
723 NLA_PUT_U8(msg, NL80211_ATTR_WIPHY_RETRY_LONG, 731 nla_put_u32(msg, NL80211_ATTR_WIPHY_FRAG_THRESHOLD,
724 dev->wiphy.retry_long); 732 dev->wiphy.frag_threshold) ||
725 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY_FRAG_THRESHOLD, 733 nla_put_u32(msg, NL80211_ATTR_WIPHY_RTS_THRESHOLD,
726 dev->wiphy.frag_threshold); 734 dev->wiphy.rts_threshold) ||
727 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY_RTS_THRESHOLD, 735 nla_put_u8(msg, NL80211_ATTR_WIPHY_COVERAGE_CLASS,
728 dev->wiphy.rts_threshold); 736 dev->wiphy.coverage_class) ||
729 NLA_PUT_U8(msg, NL80211_ATTR_WIPHY_COVERAGE_CLASS, 737 nla_put_u8(msg, NL80211_ATTR_MAX_NUM_SCAN_SSIDS,
730 dev->wiphy.coverage_class); 738 dev->wiphy.max_scan_ssids) ||
731 NLA_PUT_U8(msg, NL80211_ATTR_MAX_NUM_SCAN_SSIDS, 739 nla_put_u8(msg, NL80211_ATTR_MAX_NUM_SCHED_SCAN_SSIDS,
732 dev->wiphy.max_scan_ssids); 740 dev->wiphy.max_sched_scan_ssids) ||
733 NLA_PUT_U8(msg, NL80211_ATTR_MAX_NUM_SCHED_SCAN_SSIDS, 741 nla_put_u16(msg, NL80211_ATTR_MAX_SCAN_IE_LEN,
734 dev->wiphy.max_sched_scan_ssids); 742 dev->wiphy.max_scan_ie_len) ||
735 NLA_PUT_U16(msg, NL80211_ATTR_MAX_SCAN_IE_LEN, 743 nla_put_u16(msg, NL80211_ATTR_MAX_SCHED_SCAN_IE_LEN,
736 dev->wiphy.max_scan_ie_len); 744 dev->wiphy.max_sched_scan_ie_len) ||
737 NLA_PUT_U16(msg, NL80211_ATTR_MAX_SCHED_SCAN_IE_LEN, 745 nla_put_u8(msg, NL80211_ATTR_MAX_MATCH_SETS,
738 dev->wiphy.max_sched_scan_ie_len); 746 dev->wiphy.max_match_sets))
739 NLA_PUT_U8(msg, NL80211_ATTR_MAX_MATCH_SETS, 747 goto nla_put_failure;
740 dev->wiphy.max_match_sets); 748
741 749 if ((dev->wiphy.flags & WIPHY_FLAG_IBSS_RSN) &&
742 if (dev->wiphy.flags & WIPHY_FLAG_IBSS_RSN) 750 nla_put_flag(msg, NL80211_ATTR_SUPPORT_IBSS_RSN))
743 NLA_PUT_FLAG(msg, NL80211_ATTR_SUPPORT_IBSS_RSN); 751 goto nla_put_failure;
744 if (dev->wiphy.flags & WIPHY_FLAG_MESH_AUTH) 752 if ((dev->wiphy.flags & WIPHY_FLAG_MESH_AUTH) &&
745 NLA_PUT_FLAG(msg, NL80211_ATTR_SUPPORT_MESH_AUTH); 753 nla_put_flag(msg, NL80211_ATTR_SUPPORT_MESH_AUTH))
746 if (dev->wiphy.flags & WIPHY_FLAG_AP_UAPSD) 754 goto nla_put_failure;
747 NLA_PUT_FLAG(msg, NL80211_ATTR_SUPPORT_AP_UAPSD); 755 if ((dev->wiphy.flags & WIPHY_FLAG_AP_UAPSD) &&
748 if (dev->wiphy.flags & WIPHY_FLAG_SUPPORTS_FW_ROAM) 756 nla_put_flag(msg, NL80211_ATTR_SUPPORT_AP_UAPSD))
749 NLA_PUT_FLAG(msg, NL80211_ATTR_ROAM_SUPPORT); 757 goto nla_put_failure;
750 if (dev->wiphy.flags & WIPHY_FLAG_SUPPORTS_TDLS) 758 if ((dev->wiphy.flags & WIPHY_FLAG_SUPPORTS_FW_ROAM) &&
751 NLA_PUT_FLAG(msg, NL80211_ATTR_TDLS_SUPPORT); 759 nla_put_flag(msg, NL80211_ATTR_ROAM_SUPPORT))
752 if (dev->wiphy.flags & WIPHY_FLAG_TDLS_EXTERNAL_SETUP) 760 goto nla_put_failure;
753 NLA_PUT_FLAG(msg, NL80211_ATTR_TDLS_EXTERNAL_SETUP); 761 if ((dev->wiphy.flags & WIPHY_FLAG_SUPPORTS_TDLS) &&
754 762 nla_put_flag(msg, NL80211_ATTR_TDLS_SUPPORT))
755 NLA_PUT(msg, NL80211_ATTR_CIPHER_SUITES, 763 goto nla_put_failure;
756 sizeof(u32) * dev->wiphy.n_cipher_suites, 764 if ((dev->wiphy.flags & WIPHY_FLAG_TDLS_EXTERNAL_SETUP) &&
757 dev->wiphy.cipher_suites); 765 nla_put_flag(msg, NL80211_ATTR_TDLS_EXTERNAL_SETUP))
758 766 goto nla_put_failure;
759 NLA_PUT_U8(msg, NL80211_ATTR_MAX_NUM_PMKIDS, 767
760 dev->wiphy.max_num_pmkids); 768 if (nla_put(msg, NL80211_ATTR_CIPHER_SUITES,
761 769 sizeof(u32) * dev->wiphy.n_cipher_suites,
762 if (dev->wiphy.flags & WIPHY_FLAG_CONTROL_PORT_PROTOCOL) 770 dev->wiphy.cipher_suites))
763 NLA_PUT_FLAG(msg, NL80211_ATTR_CONTROL_PORT_ETHERTYPE); 771 goto nla_put_failure;
764 772
765 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY_ANTENNA_AVAIL_TX, 773 if (nla_put_u8(msg, NL80211_ATTR_MAX_NUM_PMKIDS,
766 dev->wiphy.available_antennas_tx); 774 dev->wiphy.max_num_pmkids))
767 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY_ANTENNA_AVAIL_RX, 775 goto nla_put_failure;
768 dev->wiphy.available_antennas_rx); 776
769 777 if ((dev->wiphy.flags & WIPHY_FLAG_CONTROL_PORT_PROTOCOL) &&
770 if (dev->wiphy.flags & WIPHY_FLAG_AP_PROBE_RESP_OFFLOAD) 778 nla_put_flag(msg, NL80211_ATTR_CONTROL_PORT_ETHERTYPE))
771 NLA_PUT_U32(msg, NL80211_ATTR_PROBE_RESP_OFFLOAD, 779 goto nla_put_failure;
772 dev->wiphy.probe_resp_offload); 780
781 if (nla_put_u32(msg, NL80211_ATTR_WIPHY_ANTENNA_AVAIL_TX,
782 dev->wiphy.available_antennas_tx) ||
783 nla_put_u32(msg, NL80211_ATTR_WIPHY_ANTENNA_AVAIL_RX,
784 dev->wiphy.available_antennas_rx))
785 goto nla_put_failure;
786
787 if ((dev->wiphy.flags & WIPHY_FLAG_AP_PROBE_RESP_OFFLOAD) &&
788 nla_put_u32(msg, NL80211_ATTR_PROBE_RESP_OFFLOAD,
789 dev->wiphy.probe_resp_offload))
790 goto nla_put_failure;
773 791
774 if ((dev->wiphy.available_antennas_tx || 792 if ((dev->wiphy.available_antennas_tx ||
775 dev->wiphy.available_antennas_rx) && dev->ops->get_antenna) { 793 dev->wiphy.available_antennas_rx) && dev->ops->get_antenna) {
@@ -777,8 +795,11 @@ static int nl80211_send_wiphy(struct sk_buff *msg, u32 pid, u32 seq, int flags,
777 int res; 795 int res;
778 res = dev->ops->get_antenna(&dev->wiphy, &tx_ant, &rx_ant); 796 res = dev->ops->get_antenna(&dev->wiphy, &tx_ant, &rx_ant);
779 if (!res) { 797 if (!res) {
780 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY_ANTENNA_TX, tx_ant); 798 if (nla_put_u32(msg, NL80211_ATTR_WIPHY_ANTENNA_TX,
781 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY_ANTENNA_RX, rx_ant); 799 tx_ant) ||
800 nla_put_u32(msg, NL80211_ATTR_WIPHY_ANTENNA_RX,
801 rx_ant))
802 goto nla_put_failure;
782 } 803 }
783 } 804 }
784 805
@@ -799,17 +820,17 @@ static int nl80211_send_wiphy(struct sk_buff *msg, u32 pid, u32 seq, int flags,
799 goto nla_put_failure; 820 goto nla_put_failure;
800 821
801 /* add HT info */ 822 /* add HT info */
802 if (dev->wiphy.bands[band]->ht_cap.ht_supported) { 823 if (dev->wiphy.bands[band]->ht_cap.ht_supported &&
803 NLA_PUT(msg, NL80211_BAND_ATTR_HT_MCS_SET, 824 (nla_put(msg, NL80211_BAND_ATTR_HT_MCS_SET,
804 sizeof(dev->wiphy.bands[band]->ht_cap.mcs), 825 sizeof(dev->wiphy.bands[band]->ht_cap.mcs),
805 &dev->wiphy.bands[band]->ht_cap.mcs); 826 &dev->wiphy.bands[band]->ht_cap.mcs) ||
806 NLA_PUT_U16(msg, NL80211_BAND_ATTR_HT_CAPA, 827 nla_put_u16(msg, NL80211_BAND_ATTR_HT_CAPA,
807 dev->wiphy.bands[band]->ht_cap.cap); 828 dev->wiphy.bands[band]->ht_cap.cap) ||
808 NLA_PUT_U8(msg, NL80211_BAND_ATTR_HT_AMPDU_FACTOR, 829 nla_put_u8(msg, NL80211_BAND_ATTR_HT_AMPDU_FACTOR,
809 dev->wiphy.bands[band]->ht_cap.ampdu_factor); 830 dev->wiphy.bands[band]->ht_cap.ampdu_factor) ||
810 NLA_PUT_U8(msg, NL80211_BAND_ATTR_HT_AMPDU_DENSITY, 831 nla_put_u8(msg, NL80211_BAND_ATTR_HT_AMPDU_DENSITY,
811 dev->wiphy.bands[band]->ht_cap.ampdu_density); 832 dev->wiphy.bands[band]->ht_cap.ampdu_density)))
812 } 833 goto nla_put_failure;
813 834
814 /* add frequencies */ 835 /* add frequencies */
815 nl_freqs = nla_nest_start(msg, NL80211_BAND_ATTR_FREQS); 836 nl_freqs = nla_nest_start(msg, NL80211_BAND_ATTR_FREQS);
@@ -842,11 +863,13 @@ static int nl80211_send_wiphy(struct sk_buff *msg, u32 pid, u32 seq, int flags,
842 goto nla_put_failure; 863 goto nla_put_failure;
843 864
844 rate = &dev->wiphy.bands[band]->bitrates[i]; 865 rate = &dev->wiphy.bands[band]->bitrates[i];
845 NLA_PUT_U32(msg, NL80211_BITRATE_ATTR_RATE, 866 if (nla_put_u32(msg, NL80211_BITRATE_ATTR_RATE,
846 rate->bitrate); 867 rate->bitrate))
847 if (rate->flags & IEEE80211_RATE_SHORT_PREAMBLE) 868 goto nla_put_failure;
848 NLA_PUT_FLAG(msg, 869 if ((rate->flags & IEEE80211_RATE_SHORT_PREAMBLE) &&
849 NL80211_BITRATE_ATTR_2GHZ_SHORTPREAMBLE); 870 nla_put_flag(msg,
871 NL80211_BITRATE_ATTR_2GHZ_SHORTPREAMBLE))
872 goto nla_put_failure;
850 873
851 nla_nest_end(msg, nl_rate); 874 nla_nest_end(msg, nl_rate);
852 } 875 }
@@ -866,7 +889,8 @@ static int nl80211_send_wiphy(struct sk_buff *msg, u32 pid, u32 seq, int flags,
866 do { \ 889 do { \
867 if (dev->ops->op) { \ 890 if (dev->ops->op) { \
868 i++; \ 891 i++; \
869 NLA_PUT_U32(msg, i, NL80211_CMD_ ## n); \ 892 if (nla_put_u32(msg, i, NL80211_CMD_ ## n)) \
893 goto nla_put_failure; \
870 } \ 894 } \
871 } while (0) 895 } while (0)
872 896
@@ -894,7 +918,8 @@ static int nl80211_send_wiphy(struct sk_buff *msg, u32 pid, u32 seq, int flags,
894 CMD(mgmt_tx_cancel_wait, FRAME_WAIT_CANCEL); 918 CMD(mgmt_tx_cancel_wait, FRAME_WAIT_CANCEL);
895 if (dev->wiphy.flags & WIPHY_FLAG_NETNS_OK) { 919 if (dev->wiphy.flags & WIPHY_FLAG_NETNS_OK) {
896 i++; 920 i++;
897 NLA_PUT_U32(msg, i, NL80211_CMD_SET_WIPHY_NETNS); 921 if (nla_put_u32(msg, i, NL80211_CMD_SET_WIPHY_NETNS))
922 goto nla_put_failure;
898 } 923 }
899 CMD(set_channel, SET_CHANNEL); 924 CMD(set_channel, SET_CHANNEL);
900 CMD(set_wds_peer, SET_WDS_PEER); 925 CMD(set_wds_peer, SET_WDS_PEER);
@@ -908,7 +933,8 @@ static int nl80211_send_wiphy(struct sk_buff *msg, u32 pid, u32 seq, int flags,
908 CMD(set_noack_map, SET_NOACK_MAP); 933 CMD(set_noack_map, SET_NOACK_MAP);
909 if (dev->wiphy.flags & WIPHY_FLAG_REPORTS_OBSS) { 934 if (dev->wiphy.flags & WIPHY_FLAG_REPORTS_OBSS) {
910 i++; 935 i++;
911 NLA_PUT_U32(msg, i, NL80211_CMD_REGISTER_BEACONS); 936 if (nla_put_u32(msg, i, NL80211_CMD_REGISTER_BEACONS))
937 goto nla_put_failure;
912 } 938 }
913 939
914#ifdef CONFIG_NL80211_TESTMODE 940#ifdef CONFIG_NL80211_TESTMODE
@@ -919,23 +945,27 @@ static int nl80211_send_wiphy(struct sk_buff *msg, u32 pid, u32 seq, int flags,
919 945
920 if (dev->ops->connect || dev->ops->auth) { 946 if (dev->ops->connect || dev->ops->auth) {
921 i++; 947 i++;
922 NLA_PUT_U32(msg, i, NL80211_CMD_CONNECT); 948 if (nla_put_u32(msg, i, NL80211_CMD_CONNECT))
949 goto nla_put_failure;
923 } 950 }
924 951
925 if (dev->ops->disconnect || dev->ops->deauth) { 952 if (dev->ops->disconnect || dev->ops->deauth) {
926 i++; 953 i++;
927 NLA_PUT_U32(msg, i, NL80211_CMD_DISCONNECT); 954 if (nla_put_u32(msg, i, NL80211_CMD_DISCONNECT))
955 goto nla_put_failure;
928 } 956 }
929 957
930 nla_nest_end(msg, nl_cmds); 958 nla_nest_end(msg, nl_cmds);
931 959
932 if (dev->ops->remain_on_channel && 960 if (dev->ops->remain_on_channel &&
933 dev->wiphy.flags & WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL) 961 (dev->wiphy.flags & WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL) &&
934 NLA_PUT_U32(msg, NL80211_ATTR_MAX_REMAIN_ON_CHANNEL_DURATION, 962 nla_put_u32(msg, NL80211_ATTR_MAX_REMAIN_ON_CHANNEL_DURATION,
935 dev->wiphy.max_remain_on_channel_duration); 963 dev->wiphy.max_remain_on_channel_duration))
964 goto nla_put_failure;
936 965
937 if (dev->wiphy.flags & WIPHY_FLAG_OFFCHAN_TX) 966 if ((dev->wiphy.flags & WIPHY_FLAG_OFFCHAN_TX) &&
938 NLA_PUT_FLAG(msg, NL80211_ATTR_OFFCHANNEL_TX_OK); 967 nla_put_flag(msg, NL80211_ATTR_OFFCHANNEL_TX_OK))
968 goto nla_put_failure;
939 969
940 if (mgmt_stypes) { 970 if (mgmt_stypes) {
941 u16 stypes; 971 u16 stypes;
@@ -953,9 +983,10 @@ static int nl80211_send_wiphy(struct sk_buff *msg, u32 pid, u32 seq, int flags,
953 i = 0; 983 i = 0;
954 stypes = mgmt_stypes[ift].tx; 984 stypes = mgmt_stypes[ift].tx;
955 while (stypes) { 985 while (stypes) {
956 if (stypes & 1) 986 if ((stypes & 1) &&
957 NLA_PUT_U16(msg, NL80211_ATTR_FRAME_TYPE, 987 nla_put_u16(msg, NL80211_ATTR_FRAME_TYPE,
958 (i << 4) | IEEE80211_FTYPE_MGMT); 988 (i << 4) | IEEE80211_FTYPE_MGMT))
989 goto nla_put_failure;
959 stypes >>= 1; 990 stypes >>= 1;
960 i++; 991 i++;
961 } 992 }
@@ -975,9 +1006,10 @@ static int nl80211_send_wiphy(struct sk_buff *msg, u32 pid, u32 seq, int flags,
975 i = 0; 1006 i = 0;
976 stypes = mgmt_stypes[ift].rx; 1007 stypes = mgmt_stypes[ift].rx;
977 while (stypes) { 1008 while (stypes) {
978 if (stypes & 1) 1009 if ((stypes & 1) &&
979 NLA_PUT_U16(msg, NL80211_ATTR_FRAME_TYPE, 1010 nla_put_u16(msg, NL80211_ATTR_FRAME_TYPE,
980 (i << 4) | IEEE80211_FTYPE_MGMT); 1011 (i << 4) | IEEE80211_FTYPE_MGMT))
1012 goto nla_put_failure;
981 stypes >>= 1; 1013 stypes >>= 1;
982 i++; 1014 i++;
983 } 1015 }
@@ -994,22 +1026,23 @@ static int nl80211_send_wiphy(struct sk_buff *msg, u32 pid, u32 seq, int flags,
994 if (!nl_wowlan) 1026 if (!nl_wowlan)
995 goto nla_put_failure; 1027 goto nla_put_failure;
996 1028
997 if (dev->wiphy.wowlan.flags & WIPHY_WOWLAN_ANY) 1029 if (((dev->wiphy.wowlan.flags & WIPHY_WOWLAN_ANY) &&
998 NLA_PUT_FLAG(msg, NL80211_WOWLAN_TRIG_ANY); 1030 nla_put_flag(msg, NL80211_WOWLAN_TRIG_ANY)) ||
999 if (dev->wiphy.wowlan.flags & WIPHY_WOWLAN_DISCONNECT) 1031 ((dev->wiphy.wowlan.flags & WIPHY_WOWLAN_DISCONNECT) &&
1000 NLA_PUT_FLAG(msg, NL80211_WOWLAN_TRIG_DISCONNECT); 1032 nla_put_flag(msg, NL80211_WOWLAN_TRIG_DISCONNECT)) ||
1001 if (dev->wiphy.wowlan.flags & WIPHY_WOWLAN_MAGIC_PKT) 1033 ((dev->wiphy.wowlan.flags & WIPHY_WOWLAN_MAGIC_PKT) &&
1002 NLA_PUT_FLAG(msg, NL80211_WOWLAN_TRIG_MAGIC_PKT); 1034 nla_put_flag(msg, NL80211_WOWLAN_TRIG_MAGIC_PKT)) ||
1003 if (dev->wiphy.wowlan.flags & WIPHY_WOWLAN_SUPPORTS_GTK_REKEY) 1035 ((dev->wiphy.wowlan.flags & WIPHY_WOWLAN_SUPPORTS_GTK_REKEY) &&
1004 NLA_PUT_FLAG(msg, NL80211_WOWLAN_TRIG_GTK_REKEY_SUPPORTED); 1036 nla_put_flag(msg, NL80211_WOWLAN_TRIG_GTK_REKEY_SUPPORTED)) ||
1005 if (dev->wiphy.wowlan.flags & WIPHY_WOWLAN_GTK_REKEY_FAILURE) 1037 ((dev->wiphy.wowlan.flags & WIPHY_WOWLAN_GTK_REKEY_FAILURE) &&
1006 NLA_PUT_FLAG(msg, NL80211_WOWLAN_TRIG_GTK_REKEY_FAILURE); 1038 nla_put_flag(msg, NL80211_WOWLAN_TRIG_GTK_REKEY_FAILURE)) ||
1007 if (dev->wiphy.wowlan.flags & WIPHY_WOWLAN_EAP_IDENTITY_REQ) 1039 ((dev->wiphy.wowlan.flags & WIPHY_WOWLAN_EAP_IDENTITY_REQ) &&
1008 NLA_PUT_FLAG(msg, NL80211_WOWLAN_TRIG_EAP_IDENT_REQUEST); 1040 nla_put_flag(msg, NL80211_WOWLAN_TRIG_EAP_IDENT_REQUEST)) ||
1009 if (dev->wiphy.wowlan.flags & WIPHY_WOWLAN_4WAY_HANDSHAKE) 1041 ((dev->wiphy.wowlan.flags & WIPHY_WOWLAN_4WAY_HANDSHAKE) &&
1010 NLA_PUT_FLAG(msg, NL80211_WOWLAN_TRIG_4WAY_HANDSHAKE); 1042 nla_put_flag(msg, NL80211_WOWLAN_TRIG_4WAY_HANDSHAKE)) ||
1011 if (dev->wiphy.wowlan.flags & WIPHY_WOWLAN_RFKILL_RELEASE) 1043 ((dev->wiphy.wowlan.flags & WIPHY_WOWLAN_RFKILL_RELEASE) &&
1012 NLA_PUT_FLAG(msg, NL80211_WOWLAN_TRIG_RFKILL_RELEASE); 1044 nla_put_flag(msg, NL80211_WOWLAN_TRIG_RFKILL_RELEASE)))
1045 goto nla_put_failure;
1013 if (dev->wiphy.wowlan.n_patterns) { 1046 if (dev->wiphy.wowlan.n_patterns) {
1014 struct nl80211_wowlan_pattern_support pat = { 1047 struct nl80211_wowlan_pattern_support pat = {
1015 .max_patterns = dev->wiphy.wowlan.n_patterns, 1048 .max_patterns = dev->wiphy.wowlan.n_patterns,
@@ -1018,8 +1051,9 @@ static int nl80211_send_wiphy(struct sk_buff *msg, u32 pid, u32 seq, int flags,
1018 .max_pattern_len = 1051 .max_pattern_len =
1019 dev->wiphy.wowlan.pattern_max_len, 1052 dev->wiphy.wowlan.pattern_max_len,
1020 }; 1053 };
1021 NLA_PUT(msg, NL80211_WOWLAN_TRIG_PKT_PATTERN, 1054 if (nla_put(msg, NL80211_WOWLAN_TRIG_PKT_PATTERN,
1022 sizeof(pat), &pat); 1055 sizeof(pat), &pat))
1056 goto nla_put_failure;
1023 } 1057 }
1024 1058
1025 nla_nest_end(msg, nl_wowlan); 1059 nla_nest_end(msg, nl_wowlan);
@@ -1032,16 +1066,20 @@ static int nl80211_send_wiphy(struct sk_buff *msg, u32 pid, u32 seq, int flags,
1032 if (nl80211_put_iface_combinations(&dev->wiphy, msg)) 1066 if (nl80211_put_iface_combinations(&dev->wiphy, msg))
1033 goto nla_put_failure; 1067 goto nla_put_failure;
1034 1068
1035 if (dev->wiphy.flags & WIPHY_FLAG_HAVE_AP_SME) 1069 if ((dev->wiphy.flags & WIPHY_FLAG_HAVE_AP_SME) &&
1036 NLA_PUT_U32(msg, NL80211_ATTR_DEVICE_AP_SME, 1070 nla_put_u32(msg, NL80211_ATTR_DEVICE_AP_SME,
1037 dev->wiphy.ap_sme_capa); 1071 dev->wiphy.ap_sme_capa))
1072 goto nla_put_failure;
1038 1073
1039 NLA_PUT_U32(msg, NL80211_ATTR_FEATURE_FLAGS, dev->wiphy.features); 1074 if (nla_put_u32(msg, NL80211_ATTR_FEATURE_FLAGS,
1075 dev->wiphy.features))
1076 goto nla_put_failure;
1040 1077
1041 if (dev->wiphy.ht_capa_mod_mask) 1078 if (dev->wiphy.ht_capa_mod_mask &&
1042 NLA_PUT(msg, NL80211_ATTR_HT_CAPABILITY_MASK, 1079 nla_put(msg, NL80211_ATTR_HT_CAPABILITY_MASK,
1043 sizeof(*dev->wiphy.ht_capa_mod_mask), 1080 sizeof(*dev->wiphy.ht_capa_mod_mask),
1044 dev->wiphy.ht_capa_mod_mask); 1081 dev->wiphy.ht_capa_mod_mask))
1082 goto nla_put_failure;
1045 1083
1046 return genlmsg_end(msg, hdr); 1084 return genlmsg_end(msg, hdr);
1047 1085
@@ -1484,14 +1522,15 @@ static int nl80211_send_iface(struct sk_buff *msg, u32 pid, u32 seq, int flags,
1484 if (!hdr) 1522 if (!hdr)
1485 return -1; 1523 return -1;
1486 1524
1487 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, dev->ifindex); 1525 if (nla_put_u32(msg, NL80211_ATTR_IFINDEX, dev->ifindex) ||
1488 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); 1526 nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) ||
1489 NLA_PUT_STRING(msg, NL80211_ATTR_IFNAME, dev->name); 1527 nla_put_string(msg, NL80211_ATTR_IFNAME, dev->name) ||
1490 NLA_PUT_U32(msg, NL80211_ATTR_IFTYPE, dev->ieee80211_ptr->iftype); 1528 nla_put_u32(msg, NL80211_ATTR_IFTYPE,
1491 1529 dev->ieee80211_ptr->iftype) ||
1492 NLA_PUT_U32(msg, NL80211_ATTR_GENERATION, 1530 nla_put_u32(msg, NL80211_ATTR_GENERATION,
1493 rdev->devlist_generation ^ 1531 rdev->devlist_generation ^
1494 (cfg80211_rdev_list_generation << 2)); 1532 (cfg80211_rdev_list_generation << 2)))
1533 goto nla_put_failure;
1495 1534
1496 return genlmsg_end(msg, hdr); 1535 return genlmsg_end(msg, hdr);
1497 1536
@@ -1789,35 +1828,34 @@ static void get_key_callback(void *c, struct key_params *params)
1789 struct nlattr *key; 1828 struct nlattr *key;
1790 struct get_key_cookie *cookie = c; 1829 struct get_key_cookie *cookie = c;
1791 1830
1792 if (params->key) 1831 if ((params->key &&
1793 NLA_PUT(cookie->msg, NL80211_ATTR_KEY_DATA, 1832 nla_put(cookie->msg, NL80211_ATTR_KEY_DATA,
1794 params->key_len, params->key); 1833 params->key_len, params->key)) ||
1795 1834 (params->seq &&
1796 if (params->seq) 1835 nla_put(cookie->msg, NL80211_ATTR_KEY_SEQ,
1797 NLA_PUT(cookie->msg, NL80211_ATTR_KEY_SEQ, 1836 params->seq_len, params->seq)) ||
1798 params->seq_len, params->seq); 1837 (params->cipher &&
1799 1838 nla_put_u32(cookie->msg, NL80211_ATTR_KEY_CIPHER,
1800 if (params->cipher) 1839 params->cipher)))
1801 NLA_PUT_U32(cookie->msg, NL80211_ATTR_KEY_CIPHER, 1840 goto nla_put_failure;
1802 params->cipher);
1803 1841
1804 key = nla_nest_start(cookie->msg, NL80211_ATTR_KEY); 1842 key = nla_nest_start(cookie->msg, NL80211_ATTR_KEY);
1805 if (!key) 1843 if (!key)
1806 goto nla_put_failure; 1844 goto nla_put_failure;
1807 1845
1808 if (params->key) 1846 if ((params->key &&
1809 NLA_PUT(cookie->msg, NL80211_KEY_DATA, 1847 nla_put(cookie->msg, NL80211_KEY_DATA,
1810 params->key_len, params->key); 1848 params->key_len, params->key)) ||
1811 1849 (params->seq &&
1812 if (params->seq) 1850 nla_put(cookie->msg, NL80211_KEY_SEQ,
1813 NLA_PUT(cookie->msg, NL80211_KEY_SEQ, 1851 params->seq_len, params->seq)) ||
1814 params->seq_len, params->seq); 1852 (params->cipher &&
1815 1853 nla_put_u32(cookie->msg, NL80211_KEY_CIPHER,
1816 if (params->cipher) 1854 params->cipher)))
1817 NLA_PUT_U32(cookie->msg, NL80211_KEY_CIPHER, 1855 goto nla_put_failure;
1818 params->cipher);
1819 1856
1820 NLA_PUT_U8(cookie->msg, NL80211_ATTR_KEY_IDX, cookie->idx); 1857 if (nla_put_u8(cookie->msg, NL80211_ATTR_KEY_IDX, cookie->idx))
1858 goto nla_put_failure;
1821 1859
1822 nla_nest_end(cookie->msg, key); 1860 nla_nest_end(cookie->msg, key);
1823 1861
@@ -1875,10 +1913,12 @@ static int nl80211_get_key(struct sk_buff *skb, struct genl_info *info)
1875 cookie.msg = msg; 1913 cookie.msg = msg;
1876 cookie.idx = key_idx; 1914 cookie.idx = key_idx;
1877 1915
1878 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, dev->ifindex); 1916 if (nla_put_u32(msg, NL80211_ATTR_IFINDEX, dev->ifindex) ||
1879 NLA_PUT_U8(msg, NL80211_ATTR_KEY_IDX, key_idx); 1917 nla_put_u8(msg, NL80211_ATTR_KEY_IDX, key_idx))
1880 if (mac_addr) 1918 goto nla_put_failure;
1881 NLA_PUT(msg, NL80211_ATTR_MAC, ETH_ALEN, mac_addr); 1919 if (mac_addr &&
1920 nla_put(msg, NL80211_ATTR_MAC, ETH_ALEN, mac_addr))
1921 goto nla_put_failure;
1882 1922
1883 if (pairwise && mac_addr && 1923 if (pairwise && mac_addr &&
1884 !(rdev->wiphy.flags & WIPHY_FLAG_IBSS_RSN)) 1924 !(rdev->wiphy.flags & WIPHY_FLAG_IBSS_RSN))
@@ -2368,15 +2408,15 @@ static bool nl80211_put_sta_rate(struct sk_buff *msg, struct rate_info *info,
2368 2408
2369 /* cfg80211_calculate_bitrate will return 0 for mcs >= 32 */ 2409 /* cfg80211_calculate_bitrate will return 0 for mcs >= 32 */
2370 bitrate = cfg80211_calculate_bitrate(info); 2410 bitrate = cfg80211_calculate_bitrate(info);
2371 if (bitrate > 0) 2411 if ((bitrate > 0 &&
2372 NLA_PUT_U16(msg, NL80211_RATE_INFO_BITRATE, bitrate); 2412 nla_put_u16(msg, NL80211_RATE_INFO_BITRATE, bitrate)) ||
2373 2413 ((info->flags & RATE_INFO_FLAGS_MCS) &&
2374 if (info->flags & RATE_INFO_FLAGS_MCS) 2414 nla_put_u8(msg, NL80211_RATE_INFO_MCS, info->mcs)) ||
2375 NLA_PUT_U8(msg, NL80211_RATE_INFO_MCS, info->mcs); 2415 ((info->flags & RATE_INFO_FLAGS_40_MHZ_WIDTH) &&
2376 if (info->flags & RATE_INFO_FLAGS_40_MHZ_WIDTH) 2416 nla_put_flag(msg, NL80211_RATE_INFO_40_MHZ_WIDTH)) ||
2377 NLA_PUT_FLAG(msg, NL80211_RATE_INFO_40_MHZ_WIDTH); 2417 ((info->flags & RATE_INFO_FLAGS_SHORT_GI) &&
2378 if (info->flags & RATE_INFO_FLAGS_SHORT_GI) 2418 nla_put_flag(msg, NL80211_RATE_INFO_SHORT_GI)))
2379 NLA_PUT_FLAG(msg, NL80211_RATE_INFO_SHORT_GI); 2419 goto nla_put_failure;
2380 2420
2381 nla_nest_end(msg, rate); 2421 nla_nest_end(msg, rate);
2382 return true; 2422 return true;
@@ -2398,43 +2438,50 @@ static int nl80211_send_station(struct sk_buff *msg, u32 pid, u32 seq,
2398 if (!hdr) 2438 if (!hdr)
2399 return -1; 2439 return -1;
2400 2440
2401 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, dev->ifindex); 2441 if (nla_put_u32(msg, NL80211_ATTR_IFINDEX, dev->ifindex) ||
2402 NLA_PUT(msg, NL80211_ATTR_MAC, ETH_ALEN, mac_addr); 2442 nla_put(msg, NL80211_ATTR_MAC, ETH_ALEN, mac_addr) ||
2403 2443 nla_put_u32(msg, NL80211_ATTR_GENERATION, sinfo->generation))
2404 NLA_PUT_U32(msg, NL80211_ATTR_GENERATION, sinfo->generation); 2444 goto nla_put_failure;
2405 2445
2406 sinfoattr = nla_nest_start(msg, NL80211_ATTR_STA_INFO); 2446 sinfoattr = nla_nest_start(msg, NL80211_ATTR_STA_INFO);
2407 if (!sinfoattr) 2447 if (!sinfoattr)
2408 goto nla_put_failure; 2448 goto nla_put_failure;
2409 if (sinfo->filled & STATION_INFO_CONNECTED_TIME) 2449 if ((sinfo->filled & STATION_INFO_CONNECTED_TIME) &&
2410 NLA_PUT_U32(msg, NL80211_STA_INFO_CONNECTED_TIME, 2450 nla_put_u32(msg, NL80211_STA_INFO_CONNECTED_TIME,
2411 sinfo->connected_time); 2451 sinfo->connected_time))
2412 if (sinfo->filled & STATION_INFO_INACTIVE_TIME) 2452 goto nla_put_failure;
2413 NLA_PUT_U32(msg, NL80211_STA_INFO_INACTIVE_TIME, 2453 if ((sinfo->filled & STATION_INFO_INACTIVE_TIME) &&
2414 sinfo->inactive_time); 2454 nla_put_u32(msg, NL80211_STA_INFO_INACTIVE_TIME,
2415 if (sinfo->filled & STATION_INFO_RX_BYTES) 2455 sinfo->inactive_time))
2416 NLA_PUT_U32(msg, NL80211_STA_INFO_RX_BYTES, 2456 goto nla_put_failure;
2417 sinfo->rx_bytes); 2457 if ((sinfo->filled & STATION_INFO_RX_BYTES) &&
2418 if (sinfo->filled & STATION_INFO_TX_BYTES) 2458 nla_put_u32(msg, NL80211_STA_INFO_RX_BYTES,
2419 NLA_PUT_U32(msg, NL80211_STA_INFO_TX_BYTES, 2459 sinfo->rx_bytes))
2420 sinfo->tx_bytes); 2460 goto nla_put_failure;
2421 if (sinfo->filled & STATION_INFO_LLID) 2461 if ((sinfo->filled & STATION_INFO_TX_BYTES) &&
2422 NLA_PUT_U16(msg, NL80211_STA_INFO_LLID, 2462 nla_put_u32(msg, NL80211_STA_INFO_TX_BYTES,
2423 sinfo->llid); 2463 sinfo->tx_bytes))
2424 if (sinfo->filled & STATION_INFO_PLID) 2464 goto nla_put_failure;
2425 NLA_PUT_U16(msg, NL80211_STA_INFO_PLID, 2465 if ((sinfo->filled & STATION_INFO_LLID) &&
2426 sinfo->plid); 2466 nla_put_u16(msg, NL80211_STA_INFO_LLID, sinfo->llid))
2427 if (sinfo->filled & STATION_INFO_PLINK_STATE) 2467 goto nla_put_failure;
2428 NLA_PUT_U8(msg, NL80211_STA_INFO_PLINK_STATE, 2468 if ((sinfo->filled & STATION_INFO_PLID) &&
2429 sinfo->plink_state); 2469 nla_put_u16(msg, NL80211_STA_INFO_PLID, sinfo->plid))
2470 goto nla_put_failure;
2471 if ((sinfo->filled & STATION_INFO_PLINK_STATE) &&
2472 nla_put_u8(msg, NL80211_STA_INFO_PLINK_STATE,
2473 sinfo->plink_state))
2474 goto nla_put_failure;
2430 switch (rdev->wiphy.signal_type) { 2475 switch (rdev->wiphy.signal_type) {
2431 case CFG80211_SIGNAL_TYPE_MBM: 2476 case CFG80211_SIGNAL_TYPE_MBM:
2432 if (sinfo->filled & STATION_INFO_SIGNAL) 2477 if ((sinfo->filled & STATION_INFO_SIGNAL) &&
2433 NLA_PUT_U8(msg, NL80211_STA_INFO_SIGNAL, 2478 nla_put_u8(msg, NL80211_STA_INFO_SIGNAL,
2434 sinfo->signal); 2479 sinfo->signal))
2435 if (sinfo->filled & STATION_INFO_SIGNAL_AVG) 2480 goto nla_put_failure;
2436 NLA_PUT_U8(msg, NL80211_STA_INFO_SIGNAL_AVG, 2481 if ((sinfo->filled & STATION_INFO_SIGNAL_AVG) &&
2437 sinfo->signal_avg); 2482 nla_put_u8(msg, NL80211_STA_INFO_SIGNAL_AVG,
2483 sinfo->signal_avg))
2484 goto nla_put_failure;
2438 break; 2485 break;
2439 default: 2486 default:
2440 break; 2487 break;
@@ -2449,49 +2496,56 @@ static int nl80211_send_station(struct sk_buff *msg, u32 pid, u32 seq,
2449 NL80211_STA_INFO_RX_BITRATE)) 2496 NL80211_STA_INFO_RX_BITRATE))
2450 goto nla_put_failure; 2497 goto nla_put_failure;
2451 } 2498 }
2452 if (sinfo->filled & STATION_INFO_RX_PACKETS) 2499 if ((sinfo->filled & STATION_INFO_RX_PACKETS) &&
2453 NLA_PUT_U32(msg, NL80211_STA_INFO_RX_PACKETS, 2500 nla_put_u32(msg, NL80211_STA_INFO_RX_PACKETS,
2454 sinfo->rx_packets); 2501 sinfo->rx_packets))
2455 if (sinfo->filled & STATION_INFO_TX_PACKETS) 2502 goto nla_put_failure;
2456 NLA_PUT_U32(msg, NL80211_STA_INFO_TX_PACKETS, 2503 if ((sinfo->filled & STATION_INFO_TX_PACKETS) &&
2457 sinfo->tx_packets); 2504 nla_put_u32(msg, NL80211_STA_INFO_TX_PACKETS,
2458 if (sinfo->filled & STATION_INFO_TX_RETRIES) 2505 sinfo->tx_packets))
2459 NLA_PUT_U32(msg, NL80211_STA_INFO_TX_RETRIES, 2506 goto nla_put_failure;
2460 sinfo->tx_retries); 2507 if ((sinfo->filled & STATION_INFO_TX_RETRIES) &&
2461 if (sinfo->filled & STATION_INFO_TX_FAILED) 2508 nla_put_u32(msg, NL80211_STA_INFO_TX_RETRIES,
2462 NLA_PUT_U32(msg, NL80211_STA_INFO_TX_FAILED, 2509 sinfo->tx_retries))
2463 sinfo->tx_failed); 2510 goto nla_put_failure;
2464 if (sinfo->filled & STATION_INFO_BEACON_LOSS_COUNT) 2511 if ((sinfo->filled & STATION_INFO_TX_FAILED) &&
2465 NLA_PUT_U32(msg, NL80211_STA_INFO_BEACON_LOSS, 2512 nla_put_u32(msg, NL80211_STA_INFO_TX_FAILED,
2466 sinfo->beacon_loss_count); 2513 sinfo->tx_failed))
2514 goto nla_put_failure;
2515 if ((sinfo->filled & STATION_INFO_BEACON_LOSS_COUNT) &&
2516 nla_put_u32(msg, NL80211_STA_INFO_BEACON_LOSS,
2517 sinfo->beacon_loss_count))
2518 goto nla_put_failure;
2467 if (sinfo->filled & STATION_INFO_BSS_PARAM) { 2519 if (sinfo->filled & STATION_INFO_BSS_PARAM) {
2468 bss_param = nla_nest_start(msg, NL80211_STA_INFO_BSS_PARAM); 2520 bss_param = nla_nest_start(msg, NL80211_STA_INFO_BSS_PARAM);
2469 if (!bss_param) 2521 if (!bss_param)
2470 goto nla_put_failure; 2522 goto nla_put_failure;
2471 2523
2472 if (sinfo->bss_param.flags & BSS_PARAM_FLAGS_CTS_PROT) 2524 if (((sinfo->bss_param.flags & BSS_PARAM_FLAGS_CTS_PROT) &&
2473 NLA_PUT_FLAG(msg, NL80211_STA_BSS_PARAM_CTS_PROT); 2525 nla_put_flag(msg, NL80211_STA_BSS_PARAM_CTS_PROT)) ||
2474 if (sinfo->bss_param.flags & BSS_PARAM_FLAGS_SHORT_PREAMBLE) 2526 ((sinfo->bss_param.flags & BSS_PARAM_FLAGS_SHORT_PREAMBLE) &&
2475 NLA_PUT_FLAG(msg, NL80211_STA_BSS_PARAM_SHORT_PREAMBLE); 2527 nla_put_flag(msg, NL80211_STA_BSS_PARAM_SHORT_PREAMBLE)) ||
2476 if (sinfo->bss_param.flags & BSS_PARAM_FLAGS_SHORT_SLOT_TIME) 2528 ((sinfo->bss_param.flags & BSS_PARAM_FLAGS_SHORT_SLOT_TIME) &&
2477 NLA_PUT_FLAG(msg, 2529 nla_put_flag(msg, NL80211_STA_BSS_PARAM_SHORT_SLOT_TIME)) ||
2478 NL80211_STA_BSS_PARAM_SHORT_SLOT_TIME); 2530 nla_put_u8(msg, NL80211_STA_BSS_PARAM_DTIM_PERIOD,
2479 NLA_PUT_U8(msg, NL80211_STA_BSS_PARAM_DTIM_PERIOD, 2531 sinfo->bss_param.dtim_period) ||
2480 sinfo->bss_param.dtim_period); 2532 nla_put_u16(msg, NL80211_STA_BSS_PARAM_BEACON_INTERVAL,
2481 NLA_PUT_U16(msg, NL80211_STA_BSS_PARAM_BEACON_INTERVAL, 2533 sinfo->bss_param.beacon_interval))
2482 sinfo->bss_param.beacon_interval); 2534 goto nla_put_failure;
2483 2535
2484 nla_nest_end(msg, bss_param); 2536 nla_nest_end(msg, bss_param);
2485 } 2537 }
2486 if (sinfo->filled & STATION_INFO_STA_FLAGS) 2538 if ((sinfo->filled & STATION_INFO_STA_FLAGS) &&
2487 NLA_PUT(msg, NL80211_STA_INFO_STA_FLAGS, 2539 nla_put(msg, NL80211_STA_INFO_STA_FLAGS,
2488 sizeof(struct nl80211_sta_flag_update), 2540 sizeof(struct nl80211_sta_flag_update),
2489 &sinfo->sta_flags); 2541 &sinfo->sta_flags))
2542 goto nla_put_failure;
2490 nla_nest_end(msg, sinfoattr); 2543 nla_nest_end(msg, sinfoattr);
2491 2544
2492 if (sinfo->filled & STATION_INFO_ASSOC_REQ_IES) 2545 if ((sinfo->filled & STATION_INFO_ASSOC_REQ_IES) &&
2493 NLA_PUT(msg, NL80211_ATTR_IE, sinfo->assoc_req_ies_len, 2546 nla_put(msg, NL80211_ATTR_IE, sinfo->assoc_req_ies_len,
2494 sinfo->assoc_req_ies); 2547 sinfo->assoc_req_ies))
2548 goto nla_put_failure;
2495 2549
2496 return genlmsg_end(msg, hdr); 2550 return genlmsg_end(msg, hdr);
2497 2551
@@ -2913,36 +2967,37 @@ static int nl80211_send_mpath(struct sk_buff *msg, u32 pid, u32 seq,
2913 if (!hdr) 2967 if (!hdr)
2914 return -1; 2968 return -1;
2915 2969
2916 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, dev->ifindex); 2970 if (nla_put_u32(msg, NL80211_ATTR_IFINDEX, dev->ifindex) ||
2917 NLA_PUT(msg, NL80211_ATTR_MAC, ETH_ALEN, dst); 2971 nla_put(msg, NL80211_ATTR_MAC, ETH_ALEN, dst) ||
2918 NLA_PUT(msg, NL80211_ATTR_MPATH_NEXT_HOP, ETH_ALEN, next_hop); 2972 nla_put(msg, NL80211_ATTR_MPATH_NEXT_HOP, ETH_ALEN, next_hop) ||
2919 2973 nla_put_u32(msg, NL80211_ATTR_GENERATION, pinfo->generation))
2920 NLA_PUT_U32(msg, NL80211_ATTR_GENERATION, pinfo->generation); 2974 goto nla_put_failure;
2921 2975
2922 pinfoattr = nla_nest_start(msg, NL80211_ATTR_MPATH_INFO); 2976 pinfoattr = nla_nest_start(msg, NL80211_ATTR_MPATH_INFO);
2923 if (!pinfoattr) 2977 if (!pinfoattr)
2924 goto nla_put_failure; 2978 goto nla_put_failure;
2925 if (pinfo->filled & MPATH_INFO_FRAME_QLEN) 2979 if ((pinfo->filled & MPATH_INFO_FRAME_QLEN) &&
2926 NLA_PUT_U32(msg, NL80211_MPATH_INFO_FRAME_QLEN, 2980 nla_put_u32(msg, NL80211_MPATH_INFO_FRAME_QLEN,
2927 pinfo->frame_qlen); 2981 pinfo->frame_qlen))
2928 if (pinfo->filled & MPATH_INFO_SN) 2982 goto nla_put_failure;
2929 NLA_PUT_U32(msg, NL80211_MPATH_INFO_SN, 2983 if (((pinfo->filled & MPATH_INFO_SN) &&
2930 pinfo->sn); 2984 nla_put_u32(msg, NL80211_MPATH_INFO_SN, pinfo->sn)) ||
2931 if (pinfo->filled & MPATH_INFO_METRIC) 2985 ((pinfo->filled & MPATH_INFO_METRIC) &&
2932 NLA_PUT_U32(msg, NL80211_MPATH_INFO_METRIC, 2986 nla_put_u32(msg, NL80211_MPATH_INFO_METRIC,
2933 pinfo->metric); 2987 pinfo->metric)) ||
2934 if (pinfo->filled & MPATH_INFO_EXPTIME) 2988 ((pinfo->filled & MPATH_INFO_EXPTIME) &&
2935 NLA_PUT_U32(msg, NL80211_MPATH_INFO_EXPTIME, 2989 nla_put_u32(msg, NL80211_MPATH_INFO_EXPTIME,
2936 pinfo->exptime); 2990 pinfo->exptime)) ||
2937 if (pinfo->filled & MPATH_INFO_FLAGS) 2991 ((pinfo->filled & MPATH_INFO_FLAGS) &&
2938 NLA_PUT_U8(msg, NL80211_MPATH_INFO_FLAGS, 2992 nla_put_u8(msg, NL80211_MPATH_INFO_FLAGS,
2939 pinfo->flags); 2993 pinfo->flags)) ||
2940 if (pinfo->filled & MPATH_INFO_DISCOVERY_TIMEOUT) 2994 ((pinfo->filled & MPATH_INFO_DISCOVERY_TIMEOUT) &&
2941 NLA_PUT_U32(msg, NL80211_MPATH_INFO_DISCOVERY_TIMEOUT, 2995 nla_put_u32(msg, NL80211_MPATH_INFO_DISCOVERY_TIMEOUT,
2942 pinfo->discovery_timeout); 2996 pinfo->discovery_timeout)) ||
2943 if (pinfo->filled & MPATH_INFO_DISCOVERY_RETRIES) 2997 ((pinfo->filled & MPATH_INFO_DISCOVERY_RETRIES) &&
2944 NLA_PUT_U8(msg, NL80211_MPATH_INFO_DISCOVERY_RETRIES, 2998 nla_put_u8(msg, NL80211_MPATH_INFO_DISCOVERY_RETRIES,
2945 pinfo->discovery_retries); 2999 pinfo->discovery_retries)))
3000 goto nla_put_failure;
2946 3001
2947 nla_nest_end(msg, pinfoattr); 3002 nla_nest_end(msg, pinfoattr);
2948 3003
@@ -3268,47 +3323,48 @@ static int nl80211_get_mesh_config(struct sk_buff *skb,
3268 pinfoattr = nla_nest_start(msg, NL80211_ATTR_MESH_CONFIG); 3323 pinfoattr = nla_nest_start(msg, NL80211_ATTR_MESH_CONFIG);
3269 if (!pinfoattr) 3324 if (!pinfoattr)
3270 goto nla_put_failure; 3325 goto nla_put_failure;
3271 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, dev->ifindex); 3326 if (nla_put_u32(msg, NL80211_ATTR_IFINDEX, dev->ifindex) ||
3272 NLA_PUT_U16(msg, NL80211_MESHCONF_RETRY_TIMEOUT, 3327 nla_put_u16(msg, NL80211_MESHCONF_RETRY_TIMEOUT,
3273 cur_params.dot11MeshRetryTimeout); 3328 cur_params.dot11MeshRetryTimeout) ||
3274 NLA_PUT_U16(msg, NL80211_MESHCONF_CONFIRM_TIMEOUT, 3329 nla_put_u16(msg, NL80211_MESHCONF_CONFIRM_TIMEOUT,
3275 cur_params.dot11MeshConfirmTimeout); 3330 cur_params.dot11MeshConfirmTimeout) ||
3276 NLA_PUT_U16(msg, NL80211_MESHCONF_HOLDING_TIMEOUT, 3331 nla_put_u16(msg, NL80211_MESHCONF_HOLDING_TIMEOUT,
3277 cur_params.dot11MeshHoldingTimeout); 3332 cur_params.dot11MeshHoldingTimeout) ||
3278 NLA_PUT_U16(msg, NL80211_MESHCONF_MAX_PEER_LINKS, 3333 nla_put_u16(msg, NL80211_MESHCONF_MAX_PEER_LINKS,
3279 cur_params.dot11MeshMaxPeerLinks); 3334 cur_params.dot11MeshMaxPeerLinks) ||
3280 NLA_PUT_U8(msg, NL80211_MESHCONF_MAX_RETRIES, 3335 nla_put_u8(msg, NL80211_MESHCONF_MAX_RETRIES,
3281 cur_params.dot11MeshMaxRetries); 3336 cur_params.dot11MeshMaxRetries) ||
3282 NLA_PUT_U8(msg, NL80211_MESHCONF_TTL, 3337 nla_put_u8(msg, NL80211_MESHCONF_TTL,
3283 cur_params.dot11MeshTTL); 3338 cur_params.dot11MeshTTL) ||
3284 NLA_PUT_U8(msg, NL80211_MESHCONF_ELEMENT_TTL, 3339 nla_put_u8(msg, NL80211_MESHCONF_ELEMENT_TTL,
3285 cur_params.element_ttl); 3340 cur_params.element_ttl) ||
3286 NLA_PUT_U8(msg, NL80211_MESHCONF_AUTO_OPEN_PLINKS, 3341 nla_put_u8(msg, NL80211_MESHCONF_AUTO_OPEN_PLINKS,
3287 cur_params.auto_open_plinks); 3342 cur_params.auto_open_plinks) ||
3288 NLA_PUT_U8(msg, NL80211_MESHCONF_HWMP_MAX_PREQ_RETRIES, 3343 nla_put_u8(msg, NL80211_MESHCONF_HWMP_MAX_PREQ_RETRIES,
3289 cur_params.dot11MeshHWMPmaxPREQretries); 3344 cur_params.dot11MeshHWMPmaxPREQretries) ||
3290 NLA_PUT_U32(msg, NL80211_MESHCONF_PATH_REFRESH_TIME, 3345 nla_put_u32(msg, NL80211_MESHCONF_PATH_REFRESH_TIME,
3291 cur_params.path_refresh_time); 3346 cur_params.path_refresh_time) ||
3292 NLA_PUT_U16(msg, NL80211_MESHCONF_MIN_DISCOVERY_TIMEOUT, 3347 nla_put_u16(msg, NL80211_MESHCONF_MIN_DISCOVERY_TIMEOUT,
3293 cur_params.min_discovery_timeout); 3348 cur_params.min_discovery_timeout) ||
3294 NLA_PUT_U32(msg, NL80211_MESHCONF_HWMP_ACTIVE_PATH_TIMEOUT, 3349 nla_put_u32(msg, NL80211_MESHCONF_HWMP_ACTIVE_PATH_TIMEOUT,
3295 cur_params.dot11MeshHWMPactivePathTimeout); 3350 cur_params.dot11MeshHWMPactivePathTimeout) ||
3296 NLA_PUT_U16(msg, NL80211_MESHCONF_HWMP_PREQ_MIN_INTERVAL, 3351 nla_put_u16(msg, NL80211_MESHCONF_HWMP_PREQ_MIN_INTERVAL,
3297 cur_params.dot11MeshHWMPpreqMinInterval); 3352 cur_params.dot11MeshHWMPpreqMinInterval) ||
3298 NLA_PUT_U16(msg, NL80211_MESHCONF_HWMP_PERR_MIN_INTERVAL, 3353 nla_put_u16(msg, NL80211_MESHCONF_HWMP_PERR_MIN_INTERVAL,
3299 cur_params.dot11MeshHWMPperrMinInterval); 3354 cur_params.dot11MeshHWMPperrMinInterval) ||
3300 NLA_PUT_U16(msg, NL80211_MESHCONF_HWMP_NET_DIAM_TRVS_TIME, 3355 nla_put_u16(msg, NL80211_MESHCONF_HWMP_NET_DIAM_TRVS_TIME,
3301 cur_params.dot11MeshHWMPnetDiameterTraversalTime); 3356 cur_params.dot11MeshHWMPnetDiameterTraversalTime) ||
3302 NLA_PUT_U8(msg, NL80211_MESHCONF_HWMP_ROOTMODE, 3357 nla_put_u8(msg, NL80211_MESHCONF_HWMP_ROOTMODE,
3303 cur_params.dot11MeshHWMPRootMode); 3358 cur_params.dot11MeshHWMPRootMode) ||
3304 NLA_PUT_U16(msg, NL80211_MESHCONF_HWMP_RANN_INTERVAL, 3359 nla_put_u16(msg, NL80211_MESHCONF_HWMP_RANN_INTERVAL,
3305 cur_params.dot11MeshHWMPRannInterval); 3360 cur_params.dot11MeshHWMPRannInterval) ||
3306 NLA_PUT_U8(msg, NL80211_MESHCONF_GATE_ANNOUNCEMENTS, 3361 nla_put_u8(msg, NL80211_MESHCONF_GATE_ANNOUNCEMENTS,
3307 cur_params.dot11MeshGateAnnouncementProtocol); 3362 cur_params.dot11MeshGateAnnouncementProtocol) ||
3308 NLA_PUT_U8(msg, NL80211_MESHCONF_FORWARDING, 3363 nla_put_u8(msg, NL80211_MESHCONF_FORWARDING,
3309 cur_params.dot11MeshForwarding); 3364 cur_params.dot11MeshForwarding) ||
3310 NLA_PUT_U32(msg, NL80211_MESHCONF_RSSI_THRESHOLD, 3365 nla_put_u32(msg, NL80211_MESHCONF_RSSI_THRESHOLD,
3311 cur_params.rssi_threshold); 3366 cur_params.rssi_threshold))
3367 goto nla_put_failure;
3312 nla_nest_end(msg, pinfoattr); 3368 nla_nest_end(msg, pinfoattr);
3313 genlmsg_end(msg, hdr); 3369 genlmsg_end(msg, hdr);
3314 return genlmsg_reply(msg, info); 3370 return genlmsg_reply(msg, info);
@@ -3539,11 +3595,12 @@ static int nl80211_get_reg(struct sk_buff *skb, struct genl_info *info)
3539 if (!hdr) 3595 if (!hdr)
3540 goto put_failure; 3596 goto put_failure;
3541 3597
3542 NLA_PUT_STRING(msg, NL80211_ATTR_REG_ALPHA2, 3598 if (nla_put_string(msg, NL80211_ATTR_REG_ALPHA2,
3543 cfg80211_regdomain->alpha2); 3599 cfg80211_regdomain->alpha2) ||
3544 if (cfg80211_regdomain->dfs_region) 3600 (cfg80211_regdomain->dfs_region &&
3545 NLA_PUT_U8(msg, NL80211_ATTR_DFS_REGION, 3601 nla_put_u8(msg, NL80211_ATTR_DFS_REGION,
3546 cfg80211_regdomain->dfs_region); 3602 cfg80211_regdomain->dfs_region)))
3603 goto nla_put_failure;
3547 3604
3548 nl_reg_rules = nla_nest_start(msg, NL80211_ATTR_REG_RULES); 3605 nl_reg_rules = nla_nest_start(msg, NL80211_ATTR_REG_RULES);
3549 if (!nl_reg_rules) 3606 if (!nl_reg_rules)
@@ -3563,18 +3620,19 @@ static int nl80211_get_reg(struct sk_buff *skb, struct genl_info *info)
3563 if (!nl_reg_rule) 3620 if (!nl_reg_rule)
3564 goto nla_put_failure; 3621 goto nla_put_failure;
3565 3622
3566 NLA_PUT_U32(msg, NL80211_ATTR_REG_RULE_FLAGS, 3623 if (nla_put_u32(msg, NL80211_ATTR_REG_RULE_FLAGS,
3567 reg_rule->flags); 3624 reg_rule->flags) ||
3568 NLA_PUT_U32(msg, NL80211_ATTR_FREQ_RANGE_START, 3625 nla_put_u32(msg, NL80211_ATTR_FREQ_RANGE_START,
3569 freq_range->start_freq_khz); 3626 freq_range->start_freq_khz) ||
3570 NLA_PUT_U32(msg, NL80211_ATTR_FREQ_RANGE_END, 3627 nla_put_u32(msg, NL80211_ATTR_FREQ_RANGE_END,
3571 freq_range->end_freq_khz); 3628 freq_range->end_freq_khz) ||
3572 NLA_PUT_U32(msg, NL80211_ATTR_FREQ_RANGE_MAX_BW, 3629 nla_put_u32(msg, NL80211_ATTR_FREQ_RANGE_MAX_BW,
3573 freq_range->max_bandwidth_khz); 3630 freq_range->max_bandwidth_khz) ||
3574 NLA_PUT_U32(msg, NL80211_ATTR_POWER_RULE_MAX_ANT_GAIN, 3631 nla_put_u32(msg, NL80211_ATTR_POWER_RULE_MAX_ANT_GAIN,
3575 power_rule->max_antenna_gain); 3632 power_rule->max_antenna_gain) ||
3576 NLA_PUT_U32(msg, NL80211_ATTR_POWER_RULE_MAX_EIRP, 3633 nla_put_u32(msg, NL80211_ATTR_POWER_RULE_MAX_EIRP,
3577 power_rule->max_eirp); 3634 power_rule->max_eirp))
3635 goto nla_put_failure;
3578 3636
3579 nla_nest_end(msg, nl_reg_rule); 3637 nla_nest_end(msg, nl_reg_rule);
3580 } 3638 }
@@ -4145,37 +4203,44 @@ static int nl80211_send_bss(struct sk_buff *msg, struct netlink_callback *cb,
4145 4203
4146 genl_dump_check_consistent(cb, hdr, &nl80211_fam); 4204 genl_dump_check_consistent(cb, hdr, &nl80211_fam);
4147 4205
4148 NLA_PUT_U32(msg, NL80211_ATTR_GENERATION, rdev->bss_generation); 4206 if (nla_put_u32(msg, NL80211_ATTR_GENERATION, rdev->bss_generation) ||
4149 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, wdev->netdev->ifindex); 4207 nla_put_u32(msg, NL80211_ATTR_IFINDEX, wdev->netdev->ifindex))
4208 goto nla_put_failure;
4150 4209
4151 bss = nla_nest_start(msg, NL80211_ATTR_BSS); 4210 bss = nla_nest_start(msg, NL80211_ATTR_BSS);
4152 if (!bss) 4211 if (!bss)
4153 goto nla_put_failure; 4212 goto nla_put_failure;
4154 if (!is_zero_ether_addr(res->bssid)) 4213 if ((!is_zero_ether_addr(res->bssid) &&
4155 NLA_PUT(msg, NL80211_BSS_BSSID, ETH_ALEN, res->bssid); 4214 nla_put(msg, NL80211_BSS_BSSID, ETH_ALEN, res->bssid)) ||
4156 if (res->information_elements && res->len_information_elements) 4215 (res->information_elements && res->len_information_elements &&
4157 NLA_PUT(msg, NL80211_BSS_INFORMATION_ELEMENTS, 4216 nla_put(msg, NL80211_BSS_INFORMATION_ELEMENTS,
4158 res->len_information_elements, 4217 res->len_information_elements,
4159 res->information_elements); 4218 res->information_elements)) ||
4160 if (res->beacon_ies && res->len_beacon_ies && 4219 (res->beacon_ies && res->len_beacon_ies &&
4161 res->beacon_ies != res->information_elements) 4220 res->beacon_ies != res->information_elements &&
4162 NLA_PUT(msg, NL80211_BSS_BEACON_IES, 4221 nla_put(msg, NL80211_BSS_BEACON_IES,
4163 res->len_beacon_ies, res->beacon_ies); 4222 res->len_beacon_ies, res->beacon_ies)))
4164 if (res->tsf) 4223 goto nla_put_failure;
4165 NLA_PUT_U64(msg, NL80211_BSS_TSF, res->tsf); 4224 if (res->tsf &&
4166 if (res->beacon_interval) 4225 nla_put_u64(msg, NL80211_BSS_TSF, res->tsf))
4167 NLA_PUT_U16(msg, NL80211_BSS_BEACON_INTERVAL, res->beacon_interval); 4226 goto nla_put_failure;
4168 NLA_PUT_U16(msg, NL80211_BSS_CAPABILITY, res->capability); 4227 if (res->beacon_interval &&
4169 NLA_PUT_U32(msg, NL80211_BSS_FREQUENCY, res->channel->center_freq); 4228 nla_put_u16(msg, NL80211_BSS_BEACON_INTERVAL, res->beacon_interval))
4170 NLA_PUT_U32(msg, NL80211_BSS_SEEN_MS_AGO, 4229 goto nla_put_failure;
4171 jiffies_to_msecs(jiffies - intbss->ts)); 4230 if (nla_put_u16(msg, NL80211_BSS_CAPABILITY, res->capability) ||
4231 nla_put_u32(msg, NL80211_BSS_FREQUENCY, res->channel->center_freq) ||
4232 nla_put_u32(msg, NL80211_BSS_SEEN_MS_AGO,
4233 jiffies_to_msecs(jiffies - intbss->ts)))
4234 goto nla_put_failure;
4172 4235
4173 switch (rdev->wiphy.signal_type) { 4236 switch (rdev->wiphy.signal_type) {
4174 case CFG80211_SIGNAL_TYPE_MBM: 4237 case CFG80211_SIGNAL_TYPE_MBM:
4175 NLA_PUT_U32(msg, NL80211_BSS_SIGNAL_MBM, res->signal); 4238 if (nla_put_u32(msg, NL80211_BSS_SIGNAL_MBM, res->signal))
4239 goto nla_put_failure;
4176 break; 4240 break;
4177 case CFG80211_SIGNAL_TYPE_UNSPEC: 4241 case CFG80211_SIGNAL_TYPE_UNSPEC:
4178 NLA_PUT_U8(msg, NL80211_BSS_SIGNAL_UNSPEC, res->signal); 4242 if (nla_put_u8(msg, NL80211_BSS_SIGNAL_UNSPEC, res->signal))
4243 goto nla_put_failure;
4179 break; 4244 break;
4180 default: 4245 default:
4181 break; 4246 break;
@@ -4184,14 +4249,16 @@ static int nl80211_send_bss(struct sk_buff *msg, struct netlink_callback *cb,
4184 switch (wdev->iftype) { 4249 switch (wdev->iftype) {
4185 case NL80211_IFTYPE_P2P_CLIENT: 4250 case NL80211_IFTYPE_P2P_CLIENT:
4186 case NL80211_IFTYPE_STATION: 4251 case NL80211_IFTYPE_STATION:
4187 if (intbss == wdev->current_bss) 4252 if (intbss == wdev->current_bss &&
4188 NLA_PUT_U32(msg, NL80211_BSS_STATUS, 4253 nla_put_u32(msg, NL80211_BSS_STATUS,
4189 NL80211_BSS_STATUS_ASSOCIATED); 4254 NL80211_BSS_STATUS_ASSOCIATED))
4255 goto nla_put_failure;
4190 break; 4256 break;
4191 case NL80211_IFTYPE_ADHOC: 4257 case NL80211_IFTYPE_ADHOC:
4192 if (intbss == wdev->current_bss) 4258 if (intbss == wdev->current_bss &&
4193 NLA_PUT_U32(msg, NL80211_BSS_STATUS, 4259 nla_put_u32(msg, NL80211_BSS_STATUS,
4194 NL80211_BSS_STATUS_IBSS_JOINED); 4260 NL80211_BSS_STATUS_IBSS_JOINED))
4261 goto nla_put_failure;
4195 break; 4262 break;
4196 default: 4263 default:
4197 break; 4264 break;
@@ -4260,34 +4327,43 @@ static int nl80211_send_survey(struct sk_buff *msg, u32 pid, u32 seq,
4260 if (!hdr) 4327 if (!hdr)
4261 return -ENOMEM; 4328 return -ENOMEM;
4262 4329
4263 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, dev->ifindex); 4330 if (nla_put_u32(msg, NL80211_ATTR_IFINDEX, dev->ifindex))
4331 goto nla_put_failure;
4264 4332
4265 infoattr = nla_nest_start(msg, NL80211_ATTR_SURVEY_INFO); 4333 infoattr = nla_nest_start(msg, NL80211_ATTR_SURVEY_INFO);
4266 if (!infoattr) 4334 if (!infoattr)
4267 goto nla_put_failure; 4335 goto nla_put_failure;
4268 4336
4269 NLA_PUT_U32(msg, NL80211_SURVEY_INFO_FREQUENCY, 4337 if (nla_put_u32(msg, NL80211_SURVEY_INFO_FREQUENCY,
4270 survey->channel->center_freq); 4338 survey->channel->center_freq))
4271 if (survey->filled & SURVEY_INFO_NOISE_DBM) 4339 goto nla_put_failure;
4272 NLA_PUT_U8(msg, NL80211_SURVEY_INFO_NOISE, 4340
4273 survey->noise); 4341 if ((survey->filled & SURVEY_INFO_NOISE_DBM) &&
4274 if (survey->filled & SURVEY_INFO_IN_USE) 4342 nla_put_u8(msg, NL80211_SURVEY_INFO_NOISE, survey->noise))
4275 NLA_PUT_FLAG(msg, NL80211_SURVEY_INFO_IN_USE); 4343 goto nla_put_failure;
4276 if (survey->filled & SURVEY_INFO_CHANNEL_TIME) 4344 if ((survey->filled & SURVEY_INFO_IN_USE) &&
4277 NLA_PUT_U64(msg, NL80211_SURVEY_INFO_CHANNEL_TIME, 4345 nla_put_flag(msg, NL80211_SURVEY_INFO_IN_USE))
4278 survey->channel_time); 4346 goto nla_put_failure;
4279 if (survey->filled & SURVEY_INFO_CHANNEL_TIME_BUSY) 4347 if ((survey->filled & SURVEY_INFO_CHANNEL_TIME) &&
4280 NLA_PUT_U64(msg, NL80211_SURVEY_INFO_CHANNEL_TIME_BUSY, 4348 nla_put_u64(msg, NL80211_SURVEY_INFO_CHANNEL_TIME,
4281 survey->channel_time_busy); 4349 survey->channel_time))
4282 if (survey->filled & SURVEY_INFO_CHANNEL_TIME_EXT_BUSY) 4350 goto nla_put_failure;
4283 NLA_PUT_U64(msg, NL80211_SURVEY_INFO_CHANNEL_TIME_EXT_BUSY, 4351 if ((survey->filled & SURVEY_INFO_CHANNEL_TIME_BUSY) &&
4284 survey->channel_time_ext_busy); 4352 nla_put_u64(msg, NL80211_SURVEY_INFO_CHANNEL_TIME_BUSY,
4285 if (survey->filled & SURVEY_INFO_CHANNEL_TIME_RX) 4353 survey->channel_time_busy))
4286 NLA_PUT_U64(msg, NL80211_SURVEY_INFO_CHANNEL_TIME_RX, 4354 goto nla_put_failure;
4287 survey->channel_time_rx); 4355 if ((survey->filled & SURVEY_INFO_CHANNEL_TIME_EXT_BUSY) &&
4288 if (survey->filled & SURVEY_INFO_CHANNEL_TIME_TX) 4356 nla_put_u64(msg, NL80211_SURVEY_INFO_CHANNEL_TIME_EXT_BUSY,
4289 NLA_PUT_U64(msg, NL80211_SURVEY_INFO_CHANNEL_TIME_TX, 4357 survey->channel_time_ext_busy))
4290 survey->channel_time_tx); 4358 goto nla_put_failure;
4359 if ((survey->filled & SURVEY_INFO_CHANNEL_TIME_RX) &&
4360 nla_put_u64(msg, NL80211_SURVEY_INFO_CHANNEL_TIME_RX,
4361 survey->channel_time_rx))
4362 goto nla_put_failure;
4363 if ((survey->filled & SURVEY_INFO_CHANNEL_TIME_TX) &&
4364 nla_put_u64(msg, NL80211_SURVEY_INFO_CHANNEL_TIME_TX,
4365 survey->channel_time_tx))
4366 goto nla_put_failure;
4291 4367
4292 nla_nest_end(msg, infoattr); 4368 nla_nest_end(msg, infoattr);
4293 4369
@@ -4968,7 +5044,7 @@ static int nl80211_testmode_dump(struct sk_buff *skb,
4968 NL80211_CMD_TESTMODE); 5044 NL80211_CMD_TESTMODE);
4969 struct nlattr *tmdata; 5045 struct nlattr *tmdata;
4970 5046
4971 if (nla_put_u32(skb, NL80211_ATTR_WIPHY, phy_idx) < 0) { 5047 if (nla_put_u32(skb, NL80211_ATTR_WIPHY, phy_idx)) {
4972 genlmsg_cancel(skb, hdr); 5048 genlmsg_cancel(skb, hdr);
4973 break; 5049 break;
4974 } 5050 }
@@ -5019,7 +5095,8 @@ __cfg80211_testmode_alloc_skb(struct cfg80211_registered_device *rdev,
5019 return NULL; 5095 return NULL;
5020 } 5096 }
5021 5097
5022 NLA_PUT_U32(skb, NL80211_ATTR_WIPHY, rdev->wiphy_idx); 5098 if (nla_put_u32(skb, NL80211_ATTR_WIPHY, rdev->wiphy_idx))
5099 goto nla_put_failure;
5023 data = nla_nest_start(skb, NL80211_ATTR_TESTDATA); 5100 data = nla_nest_start(skb, NL80211_ATTR_TESTDATA);
5024 5101
5025 ((void **)skb->cb)[0] = rdev; 5102 ((void **)skb->cb)[0] = rdev;
@@ -5398,7 +5475,8 @@ static int nl80211_remain_on_channel(struct sk_buff *skb,
5398 if (err) 5475 if (err)
5399 goto free_msg; 5476 goto free_msg;
5400 5477
5401 NLA_PUT_U64(msg, NL80211_ATTR_COOKIE, cookie); 5478 if (nla_put_u64(msg, NL80211_ATTR_COOKIE, cookie))
5479 goto nla_put_failure;
5402 5480
5403 genlmsg_end(msg, hdr); 5481 genlmsg_end(msg, hdr);
5404 5482
@@ -5685,7 +5763,8 @@ static int nl80211_tx_mgmt(struct sk_buff *skb, struct genl_info *info)
5685 goto free_msg; 5763 goto free_msg;
5686 5764
5687 if (msg) { 5765 if (msg) {
5688 NLA_PUT_U64(msg, NL80211_ATTR_COOKIE, cookie); 5766 if (nla_put_u64(msg, NL80211_ATTR_COOKIE, cookie))
5767 goto nla_put_failure;
5689 5768
5690 genlmsg_end(msg, hdr); 5769 genlmsg_end(msg, hdr);
5691 return genlmsg_reply(msg, info); 5770 return genlmsg_reply(msg, info);
@@ -5790,7 +5869,8 @@ static int nl80211_get_power_save(struct sk_buff *skb, struct genl_info *info)
5790 else 5869 else
5791 ps_state = NL80211_PS_DISABLED; 5870 ps_state = NL80211_PS_DISABLED;
5792 5871
5793 NLA_PUT_U32(msg, NL80211_ATTR_PS_STATE, ps_state); 5872 if (nla_put_u32(msg, NL80211_ATTR_PS_STATE, ps_state))
5873 goto nla_put_failure;
5794 5874
5795 genlmsg_end(msg, hdr); 5875 genlmsg_end(msg, hdr);
5796 return genlmsg_reply(msg, info); 5876 return genlmsg_reply(msg, info);
@@ -5937,20 +6017,21 @@ static int nl80211_get_wowlan(struct sk_buff *skb, struct genl_info *info)
5937 if (!nl_wowlan) 6017 if (!nl_wowlan)
5938 goto nla_put_failure; 6018 goto nla_put_failure;
5939 6019
5940 if (rdev->wowlan->any) 6020 if ((rdev->wowlan->any &&
5941 NLA_PUT_FLAG(msg, NL80211_WOWLAN_TRIG_ANY); 6021 nla_put_flag(msg, NL80211_WOWLAN_TRIG_ANY)) ||
5942 if (rdev->wowlan->disconnect) 6022 (rdev->wowlan->disconnect &&
5943 NLA_PUT_FLAG(msg, NL80211_WOWLAN_TRIG_DISCONNECT); 6023 nla_put_flag(msg, NL80211_WOWLAN_TRIG_DISCONNECT)) ||
5944 if (rdev->wowlan->magic_pkt) 6024 (rdev->wowlan->magic_pkt &&
5945 NLA_PUT_FLAG(msg, NL80211_WOWLAN_TRIG_MAGIC_PKT); 6025 nla_put_flag(msg, NL80211_WOWLAN_TRIG_MAGIC_PKT)) ||
5946 if (rdev->wowlan->gtk_rekey_failure) 6026 (rdev->wowlan->gtk_rekey_failure &&
5947 NLA_PUT_FLAG(msg, NL80211_WOWLAN_TRIG_GTK_REKEY_FAILURE); 6027 nla_put_flag(msg, NL80211_WOWLAN_TRIG_GTK_REKEY_FAILURE)) ||
5948 if (rdev->wowlan->eap_identity_req) 6028 (rdev->wowlan->eap_identity_req &&
5949 NLA_PUT_FLAG(msg, NL80211_WOWLAN_TRIG_EAP_IDENT_REQUEST); 6029 nla_put_flag(msg, NL80211_WOWLAN_TRIG_EAP_IDENT_REQUEST)) ||
5950 if (rdev->wowlan->four_way_handshake) 6030 (rdev->wowlan->four_way_handshake &&
5951 NLA_PUT_FLAG(msg, NL80211_WOWLAN_TRIG_4WAY_HANDSHAKE); 6031 nla_put_flag(msg, NL80211_WOWLAN_TRIG_4WAY_HANDSHAKE)) ||
5952 if (rdev->wowlan->rfkill_release) 6032 (rdev->wowlan->rfkill_release &&
5953 NLA_PUT_FLAG(msg, NL80211_WOWLAN_TRIG_RFKILL_RELEASE); 6033 nla_put_flag(msg, NL80211_WOWLAN_TRIG_RFKILL_RELEASE)))
6034 goto nla_put_failure;
5954 if (rdev->wowlan->n_patterns) { 6035 if (rdev->wowlan->n_patterns) {
5955 struct nlattr *nl_pats, *nl_pat; 6036 struct nlattr *nl_pats, *nl_pat;
5956 int i, pat_len; 6037 int i, pat_len;
@@ -5965,12 +6046,13 @@ static int nl80211_get_wowlan(struct sk_buff *skb, struct genl_info *info)
5965 if (!nl_pat) 6046 if (!nl_pat)
5966 goto nla_put_failure; 6047 goto nla_put_failure;
5967 pat_len = rdev->wowlan->patterns[i].pattern_len; 6048 pat_len = rdev->wowlan->patterns[i].pattern_len;
5968 NLA_PUT(msg, NL80211_WOWLAN_PKTPAT_MASK, 6049 if (nla_put(msg, NL80211_WOWLAN_PKTPAT_MASK,
5969 DIV_ROUND_UP(pat_len, 8), 6050 DIV_ROUND_UP(pat_len, 8),
5970 rdev->wowlan->patterns[i].mask); 6051 rdev->wowlan->patterns[i].mask) ||
5971 NLA_PUT(msg, NL80211_WOWLAN_PKTPAT_PATTERN, 6052 nla_put(msg, NL80211_WOWLAN_PKTPAT_PATTERN,
5972 pat_len, 6053 pat_len,
5973 rdev->wowlan->patterns[i].pattern); 6054 rdev->wowlan->patterns[i].pattern))
6055 goto nla_put_failure;
5974 nla_nest_end(msg, nl_pat); 6056 nla_nest_end(msg, nl_pat);
5975 } 6057 }
5976 nla_nest_end(msg, nl_pats); 6058 nla_nest_end(msg, nl_pats);
@@ -6243,7 +6325,8 @@ static int nl80211_probe_client(struct sk_buff *skb,
6243 if (err) 6325 if (err)
6244 goto free_msg; 6326 goto free_msg;
6245 6327
6246 NLA_PUT_U64(msg, NL80211_ATTR_COOKIE, cookie); 6328 if (nla_put_u64(msg, NL80211_ATTR_COOKIE, cookie))
6329 goto nla_put_failure;
6247 6330
6248 genlmsg_end(msg, hdr); 6331 genlmsg_end(msg, hdr);
6249 6332
@@ -6911,19 +6994,24 @@ static int nl80211_add_scan_req(struct sk_buff *msg,
6911 nest = nla_nest_start(msg, NL80211_ATTR_SCAN_SSIDS); 6994 nest = nla_nest_start(msg, NL80211_ATTR_SCAN_SSIDS);
6912 if (!nest) 6995 if (!nest)
6913 goto nla_put_failure; 6996 goto nla_put_failure;
6914 for (i = 0; i < req->n_ssids; i++) 6997 for (i = 0; i < req->n_ssids; i++) {
6915 NLA_PUT(msg, i, req->ssids[i].ssid_len, req->ssids[i].ssid); 6998 if (nla_put(msg, i, req->ssids[i].ssid_len, req->ssids[i].ssid))
6999 goto nla_put_failure;
7000 }
6916 nla_nest_end(msg, nest); 7001 nla_nest_end(msg, nest);
6917 7002
6918 nest = nla_nest_start(msg, NL80211_ATTR_SCAN_FREQUENCIES); 7003 nest = nla_nest_start(msg, NL80211_ATTR_SCAN_FREQUENCIES);
6919 if (!nest) 7004 if (!nest)
6920 goto nla_put_failure; 7005 goto nla_put_failure;
6921 for (i = 0; i < req->n_channels; i++) 7006 for (i = 0; i < req->n_channels; i++) {
6922 NLA_PUT_U32(msg, i, req->channels[i]->center_freq); 7007 if (nla_put_u32(msg, i, req->channels[i]->center_freq))
7008 goto nla_put_failure;
7009 }
6923 nla_nest_end(msg, nest); 7010 nla_nest_end(msg, nest);
6924 7011
6925 if (req->ie) 7012 if (req->ie &&
6926 NLA_PUT(msg, NL80211_ATTR_IE, req->ie_len, req->ie); 7013 nla_put(msg, NL80211_ATTR_IE, req->ie_len, req->ie))
7014 goto nla_put_failure;
6927 7015
6928 return 0; 7016 return 0;
6929 nla_put_failure: 7017 nla_put_failure:
@@ -6942,8 +7030,9 @@ static int nl80211_send_scan_msg(struct sk_buff *msg,
6942 if (!hdr) 7030 if (!hdr)
6943 return -1; 7031 return -1;
6944 7032
6945 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); 7033 if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) ||
6946 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex); 7034 nla_put_u32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex))
7035 goto nla_put_failure;
6947 7036
6948 /* ignore errors and send incomplete event anyway */ 7037 /* ignore errors and send incomplete event anyway */
6949 nl80211_add_scan_req(msg, rdev); 7038 nl80211_add_scan_req(msg, rdev);
@@ -6967,8 +7056,9 @@ nl80211_send_sched_scan_msg(struct sk_buff *msg,
6967 if (!hdr) 7056 if (!hdr)
6968 return -1; 7057 return -1;
6969 7058
6970 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); 7059 if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) ||
6971 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex); 7060 nla_put_u32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex))
7061 goto nla_put_failure;
6972 7062
6973 return genlmsg_end(msg, hdr); 7063 return genlmsg_end(msg, hdr);
6974 7064
@@ -7091,26 +7181,33 @@ void nl80211_send_reg_change_event(struct regulatory_request *request)
7091 } 7181 }
7092 7182
7093 /* Userspace can always count this one always being set */ 7183 /* Userspace can always count this one always being set */
7094 NLA_PUT_U8(msg, NL80211_ATTR_REG_INITIATOR, request->initiator); 7184 if (nla_put_u8(msg, NL80211_ATTR_REG_INITIATOR, request->initiator))
7095 7185 goto nla_put_failure;
7096 if (request->alpha2[0] == '0' && request->alpha2[1] == '0') 7186
7097 NLA_PUT_U8(msg, NL80211_ATTR_REG_TYPE, 7187 if (request->alpha2[0] == '0' && request->alpha2[1] == '0') {
7098 NL80211_REGDOM_TYPE_WORLD); 7188 if (nla_put_u8(msg, NL80211_ATTR_REG_TYPE,
7099 else if (request->alpha2[0] == '9' && request->alpha2[1] == '9') 7189 NL80211_REGDOM_TYPE_WORLD))
7100 NLA_PUT_U8(msg, NL80211_ATTR_REG_TYPE, 7190 goto nla_put_failure;
7101 NL80211_REGDOM_TYPE_CUSTOM_WORLD); 7191 } else if (request->alpha2[0] == '9' && request->alpha2[1] == '9') {
7102 else if ((request->alpha2[0] == '9' && request->alpha2[1] == '8') || 7192 if (nla_put_u8(msg, NL80211_ATTR_REG_TYPE,
7103 request->intersect) 7193 NL80211_REGDOM_TYPE_CUSTOM_WORLD))
7104 NLA_PUT_U8(msg, NL80211_ATTR_REG_TYPE, 7194 goto nla_put_failure;
7105 NL80211_REGDOM_TYPE_INTERSECTION); 7195 } else if ((request->alpha2[0] == '9' && request->alpha2[1] == '8') ||
7106 else { 7196 request->intersect) {
7107 NLA_PUT_U8(msg, NL80211_ATTR_REG_TYPE, 7197 if (nla_put_u8(msg, NL80211_ATTR_REG_TYPE,
7108 NL80211_REGDOM_TYPE_COUNTRY); 7198 NL80211_REGDOM_TYPE_INTERSECTION))
7109 NLA_PUT_STRING(msg, NL80211_ATTR_REG_ALPHA2, request->alpha2); 7199 goto nla_put_failure;
7110 } 7200 } else {
7111 7201 if (nla_put_u8(msg, NL80211_ATTR_REG_TYPE,
7112 if (wiphy_idx_valid(request->wiphy_idx)) 7202 NL80211_REGDOM_TYPE_COUNTRY) ||
7113 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, request->wiphy_idx); 7203 nla_put_string(msg, NL80211_ATTR_REG_ALPHA2,
7204 request->alpha2))
7205 goto nla_put_failure;
7206 }
7207
7208 if (wiphy_idx_valid(request->wiphy_idx) &&
7209 nla_put_u32(msg, NL80211_ATTR_WIPHY, request->wiphy_idx))
7210 goto nla_put_failure;
7114 7211
7115 genlmsg_end(msg, hdr); 7212 genlmsg_end(msg, hdr);
7116 7213
@@ -7144,9 +7241,10 @@ static void nl80211_send_mlme_event(struct cfg80211_registered_device *rdev,
7144 return; 7241 return;
7145 } 7242 }
7146 7243
7147 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); 7244 if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) ||
7148 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex); 7245 nla_put_u32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex) ||
7149 NLA_PUT(msg, NL80211_ATTR_FRAME, len, buf); 7246 nla_put(msg, NL80211_ATTR_FRAME, len, buf))
7247 goto nla_put_failure;
7150 7248
7151 genlmsg_end(msg, hdr); 7249 genlmsg_end(msg, hdr);
7152 7250
@@ -7224,10 +7322,11 @@ static void nl80211_send_mlme_timeout(struct cfg80211_registered_device *rdev,
7224 return; 7322 return;
7225 } 7323 }
7226 7324
7227 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); 7325 if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) ||
7228 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex); 7326 nla_put_u32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex) ||
7229 NLA_PUT_FLAG(msg, NL80211_ATTR_TIMED_OUT); 7327 nla_put_flag(msg, NL80211_ATTR_TIMED_OUT) ||
7230 NLA_PUT(msg, NL80211_ATTR_MAC, ETH_ALEN, addr); 7328 nla_put(msg, NL80211_ATTR_MAC, ETH_ALEN, addr))
7329 goto nla_put_failure;
7231 7330
7232 genlmsg_end(msg, hdr); 7331 genlmsg_end(msg, hdr);
7233 7332
@@ -7275,15 +7374,15 @@ void nl80211_send_connect_result(struct cfg80211_registered_device *rdev,
7275 return; 7374 return;
7276 } 7375 }
7277 7376
7278 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); 7377 if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) ||
7279 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex); 7378 nla_put_u32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex) ||
7280 if (bssid) 7379 (bssid && nla_put(msg, NL80211_ATTR_MAC, ETH_ALEN, bssid)) ||
7281 NLA_PUT(msg, NL80211_ATTR_MAC, ETH_ALEN, bssid); 7380 nla_put_u16(msg, NL80211_ATTR_STATUS_CODE, status) ||
7282 NLA_PUT_U16(msg, NL80211_ATTR_STATUS_CODE, status); 7381 (req_ie &&
7283 if (req_ie) 7382 nla_put(msg, NL80211_ATTR_REQ_IE, req_ie_len, req_ie)) ||
7284 NLA_PUT(msg, NL80211_ATTR_REQ_IE, req_ie_len, req_ie); 7383 (resp_ie &&
7285 if (resp_ie) 7384 nla_put(msg, NL80211_ATTR_RESP_IE, resp_ie_len, resp_ie)))
7286 NLA_PUT(msg, NL80211_ATTR_RESP_IE, resp_ie_len, resp_ie); 7385 goto nla_put_failure;
7287 7386
7288 genlmsg_end(msg, hdr); 7387 genlmsg_end(msg, hdr);
7289 7388
@@ -7315,13 +7414,14 @@ void nl80211_send_roamed(struct cfg80211_registered_device *rdev,
7315 return; 7414 return;
7316 } 7415 }
7317 7416
7318 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); 7417 if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) ||
7319 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex); 7418 nla_put_u32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex) ||
7320 NLA_PUT(msg, NL80211_ATTR_MAC, ETH_ALEN, bssid); 7419 nla_put(msg, NL80211_ATTR_MAC, ETH_ALEN, bssid) ||
7321 if (req_ie) 7420 (req_ie &&
7322 NLA_PUT(msg, NL80211_ATTR_REQ_IE, req_ie_len, req_ie); 7421 nla_put(msg, NL80211_ATTR_REQ_IE, req_ie_len, req_ie)) ||
7323 if (resp_ie) 7422 (resp_ie &&
7324 NLA_PUT(msg, NL80211_ATTR_RESP_IE, resp_ie_len, resp_ie); 7423 nla_put(msg, NL80211_ATTR_RESP_IE, resp_ie_len, resp_ie)))
7424 goto nla_put_failure;
7325 7425
7326 genlmsg_end(msg, hdr); 7426 genlmsg_end(msg, hdr);
7327 7427
@@ -7352,14 +7452,14 @@ void nl80211_send_disconnected(struct cfg80211_registered_device *rdev,
7352 return; 7452 return;
7353 } 7453 }
7354 7454
7355 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); 7455 if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) ||
7356 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex); 7456 nla_put_u32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex) ||
7357 if (from_ap && reason) 7457 (from_ap && reason &&
7358 NLA_PUT_U16(msg, NL80211_ATTR_REASON_CODE, reason); 7458 nla_put_u16(msg, NL80211_ATTR_REASON_CODE, reason)) ||
7359 if (from_ap) 7459 (from_ap &&
7360 NLA_PUT_FLAG(msg, NL80211_ATTR_DISCONNECTED_BY_AP); 7460 nla_put_flag(msg, NL80211_ATTR_DISCONNECTED_BY_AP)) ||
7361 if (ie) 7461 (ie && nla_put(msg, NL80211_ATTR_IE, ie_len, ie)))
7362 NLA_PUT(msg, NL80211_ATTR_IE, ie_len, ie); 7462 goto nla_put_failure;
7363 7463
7364 genlmsg_end(msg, hdr); 7464 genlmsg_end(msg, hdr);
7365 7465
@@ -7390,9 +7490,10 @@ void nl80211_send_ibss_bssid(struct cfg80211_registered_device *rdev,
7390 return; 7490 return;
7391 } 7491 }
7392 7492
7393 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); 7493 if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) ||
7394 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex); 7494 nla_put_u32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex) ||
7395 NLA_PUT(msg, NL80211_ATTR_MAC, ETH_ALEN, bssid); 7495 nla_put(msg, NL80211_ATTR_MAC, ETH_ALEN, bssid))
7496 goto nla_put_failure;
7396 7497
7397 genlmsg_end(msg, hdr); 7498 genlmsg_end(msg, hdr);
7398 7499
@@ -7423,11 +7524,12 @@ void nl80211_send_new_peer_candidate(struct cfg80211_registered_device *rdev,
7423 return; 7524 return;
7424 } 7525 }
7425 7526
7426 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); 7527 if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) ||
7427 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex); 7528 nla_put_u32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex) ||
7428 NLA_PUT(msg, NL80211_ATTR_MAC, ETH_ALEN, macaddr); 7529 nla_put(msg, NL80211_ATTR_MAC, ETH_ALEN, macaddr) ||
7429 if (ie_len && ie) 7530 (ie_len && ie &&
7430 NLA_PUT(msg, NL80211_ATTR_IE, ie_len , ie); 7531 nla_put(msg, NL80211_ATTR_IE, ie_len , ie)))
7532 goto nla_put_failure;
7431 7533
7432 genlmsg_end(msg, hdr); 7534 genlmsg_end(msg, hdr);
7433 7535
@@ -7458,15 +7560,14 @@ void nl80211_michael_mic_failure(struct cfg80211_registered_device *rdev,
7458 return; 7560 return;
7459 } 7561 }
7460 7562
7461 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); 7563 if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) ||
7462 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex); 7564 nla_put_u32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex) ||
7463 if (addr) 7565 (addr && nla_put(msg, NL80211_ATTR_MAC, ETH_ALEN, addr)) ||
7464 NLA_PUT(msg, NL80211_ATTR_MAC, ETH_ALEN, addr); 7566 nla_put_u32(msg, NL80211_ATTR_KEY_TYPE, key_type) ||
7465 NLA_PUT_U32(msg, NL80211_ATTR_KEY_TYPE, key_type); 7567 (key_id != -1 &&
7466 if (key_id != -1) 7568 nla_put_u8(msg, NL80211_ATTR_KEY_IDX, key_id)) ||
7467 NLA_PUT_U8(msg, NL80211_ATTR_KEY_IDX, key_id); 7569 (tsc && nla_put(msg, NL80211_ATTR_KEY_SEQ, 6, tsc)))
7468 if (tsc) 7570 goto nla_put_failure;
7469 NLA_PUT(msg, NL80211_ATTR_KEY_SEQ, 6, tsc);
7470 7571
7471 genlmsg_end(msg, hdr); 7572 genlmsg_end(msg, hdr);
7472 7573
@@ -7501,7 +7602,8 @@ void nl80211_send_beacon_hint_event(struct wiphy *wiphy,
7501 * Since we are applying the beacon hint to a wiphy we know its 7602 * Since we are applying the beacon hint to a wiphy we know its
7502 * wiphy_idx is valid 7603 * wiphy_idx is valid
7503 */ 7604 */
7504 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, get_wiphy_idx(wiphy)); 7605 if (nla_put_u32(msg, NL80211_ATTR_WIPHY, get_wiphy_idx(wiphy)))
7606 goto nla_put_failure;
7505 7607
7506 /* Before */ 7608 /* Before */
7507 nl_freq = nla_nest_start(msg, NL80211_ATTR_FREQ_BEFORE); 7609 nl_freq = nla_nest_start(msg, NL80211_ATTR_FREQ_BEFORE);
@@ -7553,14 +7655,16 @@ static void nl80211_send_remain_on_chan_event(
7553 return; 7655 return;
7554 } 7656 }
7555 7657
7556 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); 7658 if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) ||
7557 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex); 7659 nla_put_u32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex) ||
7558 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY_FREQ, chan->center_freq); 7660 nla_put_u32(msg, NL80211_ATTR_WIPHY_FREQ, chan->center_freq) ||
7559 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY_CHANNEL_TYPE, channel_type); 7661 nla_put_u32(msg, NL80211_ATTR_WIPHY_CHANNEL_TYPE, channel_type) ||
7560 NLA_PUT_U64(msg, NL80211_ATTR_COOKIE, cookie); 7662 nla_put_u64(msg, NL80211_ATTR_COOKIE, cookie))
7663 goto nla_put_failure;
7561 7664
7562 if (cmd == NL80211_CMD_REMAIN_ON_CHANNEL) 7665 if (cmd == NL80211_CMD_REMAIN_ON_CHANNEL &&
7563 NLA_PUT_U32(msg, NL80211_ATTR_DURATION, duration); 7666 nla_put_u32(msg, NL80211_ATTR_DURATION, duration))
7667 goto nla_put_failure;
7564 7668
7565 genlmsg_end(msg, hdr); 7669 genlmsg_end(msg, hdr);
7566 7670
@@ -7631,8 +7735,9 @@ void nl80211_send_sta_del_event(struct cfg80211_registered_device *rdev,
7631 return; 7735 return;
7632 } 7736 }
7633 7737
7634 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, dev->ifindex); 7738 if (nla_put_u32(msg, NL80211_ATTR_IFINDEX, dev->ifindex) ||
7635 NLA_PUT(msg, NL80211_ATTR_MAC, ETH_ALEN, mac_addr); 7739 nla_put(msg, NL80211_ATTR_MAC, ETH_ALEN, mac_addr))
7740 goto nla_put_failure;
7636 7741
7637 genlmsg_end(msg, hdr); 7742 genlmsg_end(msg, hdr);
7638 7743
@@ -7668,9 +7773,10 @@ static bool __nl80211_unexpected_frame(struct net_device *dev, u8 cmd,
7668 return true; 7773 return true;
7669 } 7774 }
7670 7775
7671 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); 7776 if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) ||
7672 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, dev->ifindex); 7777 nla_put_u32(msg, NL80211_ATTR_IFINDEX, dev->ifindex) ||
7673 NLA_PUT(msg, NL80211_ATTR_MAC, ETH_ALEN, addr); 7778 nla_put(msg, NL80211_ATTR_MAC, ETH_ALEN, addr))
7779 goto nla_put_failure;
7674 7780
7675 err = genlmsg_end(msg, hdr); 7781 err = genlmsg_end(msg, hdr);
7676 if (err < 0) { 7782 if (err < 0) {
@@ -7719,12 +7825,13 @@ int nl80211_send_mgmt(struct cfg80211_registered_device *rdev,
7719 return -ENOMEM; 7825 return -ENOMEM;
7720 } 7826 }
7721 7827
7722 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); 7828 if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) ||
7723 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex); 7829 nla_put_u32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex) ||
7724 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY_FREQ, freq); 7830 nla_put_u32(msg, NL80211_ATTR_WIPHY_FREQ, freq) ||
7725 if (sig_dbm) 7831 (sig_dbm &&
7726 NLA_PUT_U32(msg, NL80211_ATTR_RX_SIGNAL_DBM, sig_dbm); 7832 nla_put_u32(msg, NL80211_ATTR_RX_SIGNAL_DBM, sig_dbm)) ||
7727 NLA_PUT(msg, NL80211_ATTR_FRAME, len, buf); 7833 nla_put(msg, NL80211_ATTR_FRAME, len, buf))
7834 goto nla_put_failure;
7728 7835
7729 genlmsg_end(msg, hdr); 7836 genlmsg_end(msg, hdr);
7730 7837
@@ -7754,12 +7861,12 @@ void nl80211_send_mgmt_tx_status(struct cfg80211_registered_device *rdev,
7754 return; 7861 return;
7755 } 7862 }
7756 7863
7757 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); 7864 if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) ||
7758 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex); 7865 nla_put_u32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex) ||
7759 NLA_PUT(msg, NL80211_ATTR_FRAME, len, buf); 7866 nla_put(msg, NL80211_ATTR_FRAME, len, buf) ||
7760 NLA_PUT_U64(msg, NL80211_ATTR_COOKIE, cookie); 7867 nla_put_u64(msg, NL80211_ATTR_COOKIE, cookie) ||
7761 if (ack) 7868 (ack && nla_put_flag(msg, NL80211_ATTR_ACK)))
7762 NLA_PUT_FLAG(msg, NL80211_ATTR_ACK); 7869 goto nla_put_failure;
7763 7870
7764 genlmsg_end(msg, hdr); 7871 genlmsg_end(msg, hdr);
7765 7872
@@ -7791,15 +7898,17 @@ nl80211_send_cqm_rssi_notify(struct cfg80211_registered_device *rdev,
7791 return; 7898 return;
7792 } 7899 }
7793 7900
7794 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); 7901 if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) ||
7795 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex); 7902 nla_put_u32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex))
7903 goto nla_put_failure;
7796 7904
7797 pinfoattr = nla_nest_start(msg, NL80211_ATTR_CQM); 7905 pinfoattr = nla_nest_start(msg, NL80211_ATTR_CQM);
7798 if (!pinfoattr) 7906 if (!pinfoattr)
7799 goto nla_put_failure; 7907 goto nla_put_failure;
7800 7908
7801 NLA_PUT_U32(msg, NL80211_ATTR_CQM_RSSI_THRESHOLD_EVENT, 7909 if (nla_put_u32(msg, NL80211_ATTR_CQM_RSSI_THRESHOLD_EVENT,
7802 rssi_event); 7910 rssi_event))
7911 goto nla_put_failure;
7803 7912
7804 nla_nest_end(msg, pinfoattr); 7913 nla_nest_end(msg, pinfoattr);
7805 7914
@@ -7832,16 +7941,18 @@ void nl80211_gtk_rekey_notify(struct cfg80211_registered_device *rdev,
7832 return; 7941 return;
7833 } 7942 }
7834 7943
7835 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); 7944 if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) ||
7836 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex); 7945 nla_put_u32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex) ||
7837 NLA_PUT(msg, NL80211_ATTR_MAC, ETH_ALEN, bssid); 7946 nla_put(msg, NL80211_ATTR_MAC, ETH_ALEN, bssid))
7947 goto nla_put_failure;
7838 7948
7839 rekey_attr = nla_nest_start(msg, NL80211_ATTR_REKEY_DATA); 7949 rekey_attr = nla_nest_start(msg, NL80211_ATTR_REKEY_DATA);
7840 if (!rekey_attr) 7950 if (!rekey_attr)
7841 goto nla_put_failure; 7951 goto nla_put_failure;
7842 7952
7843 NLA_PUT(msg, NL80211_REKEY_DATA_REPLAY_CTR, 7953 if (nla_put(msg, NL80211_REKEY_DATA_REPLAY_CTR,
7844 NL80211_REPLAY_CTR_LEN, replay_ctr); 7954 NL80211_REPLAY_CTR_LEN, replay_ctr))
7955 goto nla_put_failure;
7845 7956
7846 nla_nest_end(msg, rekey_attr); 7957 nla_nest_end(msg, rekey_attr);
7847 7958
@@ -7874,17 +7985,19 @@ void nl80211_pmksa_candidate_notify(struct cfg80211_registered_device *rdev,
7874 return; 7985 return;
7875 } 7986 }
7876 7987
7877 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); 7988 if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) ||
7878 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex); 7989 nla_put_u32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex))
7990 goto nla_put_failure;
7879 7991
7880 attr = nla_nest_start(msg, NL80211_ATTR_PMKSA_CANDIDATE); 7992 attr = nla_nest_start(msg, NL80211_ATTR_PMKSA_CANDIDATE);
7881 if (!attr) 7993 if (!attr)
7882 goto nla_put_failure; 7994 goto nla_put_failure;
7883 7995
7884 NLA_PUT_U32(msg, NL80211_PMKSA_CANDIDATE_INDEX, index); 7996 if (nla_put_u32(msg, NL80211_PMKSA_CANDIDATE_INDEX, index) ||
7885 NLA_PUT(msg, NL80211_PMKSA_CANDIDATE_BSSID, ETH_ALEN, bssid); 7997 nla_put(msg, NL80211_PMKSA_CANDIDATE_BSSID, ETH_ALEN, bssid) ||
7886 if (preauth) 7998 (preauth &&
7887 NLA_PUT_FLAG(msg, NL80211_PMKSA_CANDIDATE_PREAUTH); 7999 nla_put_flag(msg, NL80211_PMKSA_CANDIDATE_PREAUTH)))
8000 goto nla_put_failure;
7888 8001
7889 nla_nest_end(msg, attr); 8002 nla_nest_end(msg, attr);
7890 8003
@@ -7918,15 +8031,17 @@ nl80211_send_cqm_pktloss_notify(struct cfg80211_registered_device *rdev,
7918 return; 8031 return;
7919 } 8032 }
7920 8033
7921 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); 8034 if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) ||
7922 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex); 8035 nla_put_u32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex) ||
7923 NLA_PUT(msg, NL80211_ATTR_MAC, ETH_ALEN, peer); 8036 nla_put(msg, NL80211_ATTR_MAC, ETH_ALEN, peer))
8037 goto nla_put_failure;
7924 8038
7925 pinfoattr = nla_nest_start(msg, NL80211_ATTR_CQM); 8039 pinfoattr = nla_nest_start(msg, NL80211_ATTR_CQM);
7926 if (!pinfoattr) 8040 if (!pinfoattr)
7927 goto nla_put_failure; 8041 goto nla_put_failure;
7928 8042
7929 NLA_PUT_U32(msg, NL80211_ATTR_CQM_PKT_LOSS_EVENT, num_packets); 8043 if (nla_put_u32(msg, NL80211_ATTR_CQM_PKT_LOSS_EVENT, num_packets))
8044 goto nla_put_failure;
7930 8045
7931 nla_nest_end(msg, pinfoattr); 8046 nla_nest_end(msg, pinfoattr);
7932 8047
@@ -7960,12 +8075,12 @@ void cfg80211_probe_status(struct net_device *dev, const u8 *addr,
7960 return; 8075 return;
7961 } 8076 }
7962 8077
7963 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); 8078 if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) ||
7964 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, dev->ifindex); 8079 nla_put_u32(msg, NL80211_ATTR_IFINDEX, dev->ifindex) ||
7965 NLA_PUT(msg, NL80211_ATTR_MAC, ETH_ALEN, addr); 8080 nla_put(msg, NL80211_ATTR_MAC, ETH_ALEN, addr) ||
7966 NLA_PUT_U64(msg, NL80211_ATTR_COOKIE, cookie); 8081 nla_put_u64(msg, NL80211_ATTR_COOKIE, cookie) ||
7967 if (acked) 8082 (acked && nla_put_flag(msg, NL80211_ATTR_ACK)))
7968 NLA_PUT_FLAG(msg, NL80211_ATTR_ACK); 8083 goto nla_put_failure;
7969 8084
7970 err = genlmsg_end(msg, hdr); 8085 err = genlmsg_end(msg, hdr);
7971 if (err < 0) { 8086 if (err < 0) {
@@ -8005,12 +8120,13 @@ void cfg80211_report_obss_beacon(struct wiphy *wiphy,
8005 return; 8120 return;
8006 } 8121 }
8007 8122
8008 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); 8123 if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) ||
8009 if (freq) 8124 (freq &&
8010 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY_FREQ, freq); 8125 nla_put_u32(msg, NL80211_ATTR_WIPHY_FREQ, freq)) ||
8011 if (sig_dbm) 8126 (sig_dbm &&
8012 NLA_PUT_U32(msg, NL80211_ATTR_RX_SIGNAL_DBM, sig_dbm); 8127 nla_put_u32(msg, NL80211_ATTR_RX_SIGNAL_DBM, sig_dbm)) ||
8013 NLA_PUT(msg, NL80211_ATTR_FRAME, len, frame); 8128 nla_put(msg, NL80211_ATTR_FRAME, len, frame))
8129 goto nla_put_failure;
8014 8130
8015 genlmsg_end(msg, hdr); 8131 genlmsg_end(msg, hdr);
8016 8132
diff --git a/net/wireless/wext-core.c b/net/wireless/wext-core.c
index 0af7f54e4f61..9f544c95171c 100644
--- a/net/wireless/wext-core.c
+++ b/net/wireless/wext-core.c
@@ -402,7 +402,8 @@ static struct nlmsghdr *rtnetlink_ifinfo_prep(struct net_device *dev,
402 r->ifi_flags = dev_get_flags(dev); 402 r->ifi_flags = dev_get_flags(dev);
403 r->ifi_change = 0; /* Wireless changes don't affect those flags */ 403 r->ifi_change = 0; /* Wireless changes don't affect those flags */
404 404
405 NLA_PUT_STRING(skb, IFLA_IFNAME, dev->name); 405 if (nla_put_string(skb, IFLA_IFNAME, dev->name))
406 goto nla_put_failure;
406 407
407 return nlh; 408 return nlh;
408 nla_put_failure: 409 nla_put_failure:
diff --git a/net/xfrm/xfrm_user.c b/net/xfrm/xfrm_user.c
index 7128dde0fe1a..44293b3fd6a1 100644
--- a/net/xfrm/xfrm_user.c
+++ b/net/xfrm/xfrm_user.c
@@ -756,40 +756,50 @@ static int copy_to_user_state_extra(struct xfrm_state *x,
756{ 756{
757 copy_to_user_state(x, p); 757 copy_to_user_state(x, p);
758 758
759 if (x->coaddr) 759 if (x->coaddr &&
760 NLA_PUT(skb, XFRMA_COADDR, sizeof(*x->coaddr), x->coaddr); 760 nla_put(skb, XFRMA_COADDR, sizeof(*x->coaddr), x->coaddr))
761 goto nla_put_failure;
761 762
762 if (x->lastused) 763 if (x->lastused &&
763 NLA_PUT_U64(skb, XFRMA_LASTUSED, x->lastused); 764 nla_put_u64(skb, XFRMA_LASTUSED, x->lastused))
765 goto nla_put_failure;
764 766
765 if (x->aead) 767 if (x->aead &&
766 NLA_PUT(skb, XFRMA_ALG_AEAD, aead_len(x->aead), x->aead); 768 nla_put(skb, XFRMA_ALG_AEAD, aead_len(x->aead), x->aead))
767 if (x->aalg) { 769 goto nla_put_failure;
768 if (copy_to_user_auth(x->aalg, skb))
769 goto nla_put_failure;
770 770
771 NLA_PUT(skb, XFRMA_ALG_AUTH_TRUNC, 771 if (x->aalg &&
772 xfrm_alg_auth_len(x->aalg), x->aalg); 772 (copy_to_user_auth(x->aalg, skb) ||
773 } 773 nla_put(skb, XFRMA_ALG_AUTH_TRUNC,
774 if (x->ealg) 774 xfrm_alg_auth_len(x->aalg), x->aalg)))
775 NLA_PUT(skb, XFRMA_ALG_CRYPT, xfrm_alg_len(x->ealg), x->ealg); 775 goto nla_put_failure;
776 if (x->calg)
777 NLA_PUT(skb, XFRMA_ALG_COMP, sizeof(*(x->calg)), x->calg);
778 776
779 if (x->encap) 777 if (x->ealg &&
780 NLA_PUT(skb, XFRMA_ENCAP, sizeof(*x->encap), x->encap); 778 nla_put(skb, XFRMA_ALG_CRYPT, xfrm_alg_len(x->ealg), x->ealg))
779 goto nla_put_failure;
781 780
782 if (x->tfcpad) 781 if (x->calg &&
783 NLA_PUT_U32(skb, XFRMA_TFCPAD, x->tfcpad); 782 nla_put(skb, XFRMA_ALG_COMP, sizeof(*(x->calg)), x->calg))
783 goto nla_put_failure;
784
785 if (x->encap &&
786 nla_put(skb, XFRMA_ENCAP, sizeof(*x->encap), x->encap))
787 goto nla_put_failure;
788
789 if (x->tfcpad &&
790 nla_put_u32(skb, XFRMA_TFCPAD, x->tfcpad))
791 goto nla_put_failure;
784 792
785 if (xfrm_mark_put(skb, &x->mark)) 793 if (xfrm_mark_put(skb, &x->mark))
786 goto nla_put_failure; 794 goto nla_put_failure;
787 795
788 if (x->replay_esn) 796 if (x->replay_esn &&
789 NLA_PUT(skb, XFRMA_REPLAY_ESN_VAL, 797 nla_put(skb, XFRMA_REPLAY_ESN_VAL,
790 xfrm_replay_state_esn_len(x->replay_esn), x->replay_esn); 798 xfrm_replay_state_esn_len(x->replay_esn),
799 x->replay_esn))
800 goto nla_put_failure;
791 801
792 if (x->security && copy_sec_ctx(x->security, skb) < 0) 802 if (x->security && copy_sec_ctx(x->security, skb))
793 goto nla_put_failure; 803 goto nla_put_failure;
794 804
795 return 0; 805 return 0;
@@ -912,8 +922,9 @@ static int build_spdinfo(struct sk_buff *skb, struct net *net,
912 sph.spdhcnt = si.spdhcnt; 922 sph.spdhcnt = si.spdhcnt;
913 sph.spdhmcnt = si.spdhmcnt; 923 sph.spdhmcnt = si.spdhmcnt;
914 924
915 NLA_PUT(skb, XFRMA_SPD_INFO, sizeof(spc), &spc); 925 if (nla_put(skb, XFRMA_SPD_INFO, sizeof(spc), &spc) ||
916 NLA_PUT(skb, XFRMA_SPD_HINFO, sizeof(sph), &sph); 926 nla_put(skb, XFRMA_SPD_HINFO, sizeof(sph), &sph))
927 goto nla_put_failure;
917 928
918 return nlmsg_end(skb, nlh); 929 return nlmsg_end(skb, nlh);
919 930
@@ -967,8 +978,9 @@ static int build_sadinfo(struct sk_buff *skb, struct net *net,
967 sh.sadhmcnt = si.sadhmcnt; 978 sh.sadhmcnt = si.sadhmcnt;
968 sh.sadhcnt = si.sadhcnt; 979 sh.sadhcnt = si.sadhcnt;
969 980
970 NLA_PUT_U32(skb, XFRMA_SAD_CNT, si.sadcnt); 981 if (nla_put_u32(skb, XFRMA_SAD_CNT, si.sadcnt) ||
971 NLA_PUT(skb, XFRMA_SAD_HINFO, sizeof(sh), &sh); 982 nla_put(skb, XFRMA_SAD_HINFO, sizeof(sh), &sh))
983 goto nla_put_failure;
972 984
973 return nlmsg_end(skb, nlh); 985 return nlmsg_end(skb, nlh);
974 986
@@ -1690,21 +1702,27 @@ static int build_aevent(struct sk_buff *skb, struct xfrm_state *x, const struct
1690 id->reqid = x->props.reqid; 1702 id->reqid = x->props.reqid;
1691 id->flags = c->data.aevent; 1703 id->flags = c->data.aevent;
1692 1704
1693 if (x->replay_esn) 1705 if (x->replay_esn) {
1694 NLA_PUT(skb, XFRMA_REPLAY_ESN_VAL, 1706 if (nla_put(skb, XFRMA_REPLAY_ESN_VAL,
1695 xfrm_replay_state_esn_len(x->replay_esn), 1707 xfrm_replay_state_esn_len(x->replay_esn),
1696 x->replay_esn); 1708 x->replay_esn))
1697 else 1709 goto nla_put_failure;
1698 NLA_PUT(skb, XFRMA_REPLAY_VAL, sizeof(x->replay), &x->replay); 1710 } else {
1699 1711 if (nla_put(skb, XFRMA_REPLAY_VAL, sizeof(x->replay),
1700 NLA_PUT(skb, XFRMA_LTIME_VAL, sizeof(x->curlft), &x->curlft); 1712 &x->replay))
1713 goto nla_put_failure;
1714 }
1715 if (nla_put(skb, XFRMA_LTIME_VAL, sizeof(x->curlft), &x->curlft))
1716 goto nla_put_failure;
1701 1717
1702 if (id->flags & XFRM_AE_RTHR) 1718 if ((id->flags & XFRM_AE_RTHR) &&
1703 NLA_PUT_U32(skb, XFRMA_REPLAY_THRESH, x->replay_maxdiff); 1719 nla_put_u32(skb, XFRMA_REPLAY_THRESH, x->replay_maxdiff))
1720 goto nla_put_failure;
1704 1721
1705 if (id->flags & XFRM_AE_ETHR) 1722 if ((id->flags & XFRM_AE_ETHR) &&
1706 NLA_PUT_U32(skb, XFRMA_ETIMER_THRESH, 1723 nla_put_u32(skb, XFRMA_ETIMER_THRESH,
1707 x->replay_maxage * 10 / HZ); 1724 x->replay_maxage * 10 / HZ))
1725 goto nla_put_failure;
1708 1726
1709 if (xfrm_mark_put(skb, &x->mark)) 1727 if (xfrm_mark_put(skb, &x->mark))
1710 goto nla_put_failure; 1728 goto nla_put_failure;
@@ -2835,8 +2853,9 @@ static int build_report(struct sk_buff *skb, u8 proto,
2835 ur->proto = proto; 2853 ur->proto = proto;
2836 memcpy(&ur->sel, sel, sizeof(ur->sel)); 2854 memcpy(&ur->sel, sel, sizeof(ur->sel));
2837 2855
2838 if (addr) 2856 if (addr &&
2839 NLA_PUT(skb, XFRMA_COADDR, sizeof(*addr), addr); 2857 nla_put(skb, XFRMA_COADDR, sizeof(*addr), addr))
2858 goto nla_put_failure;
2840 2859
2841 return nlmsg_end(skb, nlh); 2860 return nlmsg_end(skb, nlh);
2842 2861