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-rw-r--r--arch/arm/mach-u300/core.c2
-rw-r--r--arch/arm/mach-u300/include/mach/u300-regs.h5
-rw-r--r--include/linux/mtd/fsmc.h13
3 files changed, 7 insertions, 13 deletions
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index b4c6926a700c..9c3bafd48cda 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -1574,6 +1574,8 @@ static struct fsmc_nand_platform_data nand_platform_data = {
1574 .nr_partitions = ARRAY_SIZE(u300_partitions), 1574 .nr_partitions = ARRAY_SIZE(u300_partitions),
1575 .options = NAND_SKIP_BBTSCAN, 1575 .options = NAND_SKIP_BBTSCAN,
1576 .width = FSMC_NAND_BW8, 1576 .width = FSMC_NAND_BW8,
1577 .ale_off = PLAT_NAND_ALE,
1578 .cle_off = PLAT_NAND_CLE,
1577}; 1579};
1578 1580
1579static struct platform_device nand_device = { 1581static struct platform_device nand_device = {
diff --git a/arch/arm/mach-u300/include/mach/u300-regs.h b/arch/arm/mach-u300/include/mach/u300-regs.h
index 035fdc9dbdb0..b9701fb86db6 100644
--- a/arch/arm/mach-u300/include/mach/u300-regs.h
+++ b/arch/arm/mach-u300/include/mach/u300-regs.h
@@ -30,6 +30,11 @@
30/* NFIF */ 30/* NFIF */
31#define U300_NAND_IF_PHYS_BASE 0x9f800000 31#define U300_NAND_IF_PHYS_BASE 0x9f800000
32 32
33/* ALE, CLE offset for FSMC NAND */
34#define PLAT_NAND_CLE (1 << 16)
35#define PLAT_NAND_ALE (1 << 17)
36
37
33/* AHB Peripherals */ 38/* AHB Peripherals */
34#define U300_AHB_PER_PHYS_BASE 0xa0000000 39#define U300_AHB_PER_PHYS_BASE 0xa0000000
35#define U300_AHB_PER_VIRT_BASE 0xff010000 40#define U300_AHB_PER_VIRT_BASE 0xff010000
diff --git a/include/linux/mtd/fsmc.h b/include/linux/mtd/fsmc.h
index 2cd655f06e05..e877325d9c51 100644
--- a/include/linux/mtd/fsmc.h
+++ b/include/linux/mtd/fsmc.h
@@ -26,19 +26,6 @@
26#define FSMC_NAND_BW8 1 26#define FSMC_NAND_BW8 1
27#define FSMC_NAND_BW16 2 27#define FSMC_NAND_BW16 2
28 28
29/*
30 * The placement of the Command Latch Enable (CLE) and
31 * Address Latch Enable (ALE) is twisted around in the
32 * SPEAR310 implementation.
33 */
34#if defined(CONFIG_MACH_SPEAR310)
35#define PLAT_NAND_CLE (1 << 17)
36#define PLAT_NAND_ALE (1 << 16)
37#else
38#define PLAT_NAND_CLE (1 << 16)
39#define PLAT_NAND_ALE (1 << 17)
40#endif
41
42#define FSMC_MAX_NOR_BANKS 4 29#define FSMC_MAX_NOR_BANKS 4
43#define FSMC_MAX_NAND_BANKS 4 30#define FSMC_MAX_NAND_BANKS 4
44 31