2 files changed, 16 insertions, 0 deletions

diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
index 094fb30817ab..ce2bfb335384 100644
--- a/arch/x86/include/asm/perf_event.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -29,6 +29,9 @@
 #define ARCH_PERFMON_EVENTSEL_INV                       (1ULL << 23)
 #define ARCH_PERFMON_EVENTSEL_CMASK                     0xFF000000ULL
 
+#define AMD_PERFMON_EVENTSEL_GUESTONLY                  (1ULL << 40)
+#define AMD_PERFMON_EVENTSEL_HOSTONLY                   (1ULL << 41)
+
 #define AMD64_EVENTSEL_EVENT    \
         (ARCH_PERFMON_EVENTSEL_EVENT | (0x0FULL << 32))
 #define INTEL_ARCH_EVENT_MASK   \
diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c
index 384450d67128..db8e603ff0c6 100644
--- a/arch/x86/kernel/cpu/perf_event_amd.c
+++ b/arch/x86/kernel/cpu/perf_event_amd.c
@@ -138,6 +138,19 @@ static int amd_pmu_hw_config(struct perf_event *event)
         if (ret)
                 return ret;
 
+        if (event->attr.exclude_host && event->attr.exclude_guest)
+                /*
+                 * When HO == GO == 1 the hardware treats that as GO == HO == 0
+                 * and will count in both modes. We don't want to count in that
+                 * case so we emulate no-counting by setting US = OS = 0.
+                 */
+                event->hw.config &= ~(ARCH_PERFMON_EVENTSEL_USR |
+                                      ARCH_PERFMON_EVENTSEL_OS);
+        else if (event->attr.exclude_host)
+                event->hw.config |= AMD_PERFMON_EVENTSEL_GUESTONLY;
+        else if (event->attr.exclude_guest)
+                event->hw.config |= AMD_PERFMON_EVENTSEL_HOSTONLY;
+
         if (event->attr.type != PERF_TYPE_RAW)
                 return 0;