diff options
-rw-r--r-- | arch/arm/mach-mx5/mm.c | 19 | ||||
-rw-r--r-- | arch/arm/mach-mx5/system.c | 3 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mxc.h | 2 | ||||
-rw-r--r-- | arch/arm/plat-mxc/tzic.c | 40 |
4 files changed, 48 insertions, 16 deletions
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c index df4a508f240a..bc17dfea3817 100644 --- a/arch/arm/mach-mx5/mm.c +++ b/arch/arm/mach-mx5/mm.c | |||
@@ -13,6 +13,7 @@ | |||
13 | 13 | ||
14 | #include <linux/mm.h> | 14 | #include <linux/mm.h> |
15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
16 | #include <linux/clk.h> | ||
16 | 17 | ||
17 | #include <asm/mach/map.h> | 18 | #include <asm/mach/map.h> |
18 | 19 | ||
@@ -21,10 +22,26 @@ | |||
21 | #include <mach/devices-common.h> | 22 | #include <mach/devices-common.h> |
22 | #include <mach/iomux-v3.h> | 23 | #include <mach/iomux-v3.h> |
23 | 24 | ||
25 | static struct clk *gpc_dvfs_clk; | ||
26 | |||
24 | static void imx5_idle(void) | 27 | static void imx5_idle(void) |
25 | { | 28 | { |
26 | if (!need_resched()) | 29 | if (!need_resched()) { |
30 | /* gpc clock is needed for SRPG */ | ||
31 | if (gpc_dvfs_clk == NULL) { | ||
32 | gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); | ||
33 | if (IS_ERR(gpc_dvfs_clk)) | ||
34 | goto err0; | ||
35 | } | ||
36 | clk_enable(gpc_dvfs_clk); | ||
27 | mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); | 37 | mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); |
38 | if (tzic_enable_wake()) | ||
39 | goto err1; | ||
40 | cpu_do_idle(); | ||
41 | err1: | ||
42 | clk_disable(gpc_dvfs_clk); | ||
43 | } | ||
44 | err0: | ||
28 | local_irq_enable(); | 45 | local_irq_enable(); |
29 | } | 46 | } |
30 | 47 | ||
diff --git a/arch/arm/mach-mx5/system.c b/arch/arm/mach-mx5/system.c index 144ebebc4a61..5eebfaad1226 100644 --- a/arch/arm/mach-mx5/system.c +++ b/arch/arm/mach-mx5/system.c | |||
@@ -55,9 +55,6 @@ void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode) | |||
55 | stop_mode = 1; | 55 | stop_mode = 1; |
56 | } | 56 | } |
57 | arm_srpgcr |= MXC_SRPGCR_PCR; | 57 | arm_srpgcr |= MXC_SRPGCR_PCR; |
58 | |||
59 | if (tzic_enable_wake(1) != 0) | ||
60 | return; | ||
61 | break; | 58 | break; |
62 | case STOP_POWER_ON: | 59 | case STOP_POWER_ON: |
63 | ccm_clpcr |= 0x2 << MXC_CCM_CLPCR_LPM_OFFSET; | 60 | ccm_clpcr |= 0x2 << MXC_CCM_CLPCR_LPM_OFFSET; |
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h index a4d36d601d55..d78298366a91 100644 --- a/arch/arm/plat-mxc/include/mach/mxc.h +++ b/arch/arm/plat-mxc/include/mach/mxc.h | |||
@@ -168,7 +168,7 @@ struct cpu_op { | |||
168 | u32 cpu_rate; | 168 | u32 cpu_rate; |
169 | }; | 169 | }; |
170 | 170 | ||
171 | int tzic_enable_wake(int is_idle); | 171 | int tzic_enable_wake(void); |
172 | 172 | ||
173 | extern struct cpu_op *(*get_cpu_op)(int *op); | 173 | extern struct cpu_op *(*get_cpu_op)(int *op); |
174 | #endif | 174 | #endif |
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c index a3c164c7ba82..98308ec1f321 100644 --- a/arch/arm/plat-mxc/tzic.c +++ b/arch/arm/plat-mxc/tzic.c | |||
@@ -73,7 +73,28 @@ static int tzic_set_irq_fiq(unsigned int irq, unsigned int type) | |||
73 | #define tzic_set_irq_fiq NULL | 73 | #define tzic_set_irq_fiq NULL |
74 | #endif | 74 | #endif |
75 | 75 | ||
76 | static unsigned int *wakeup_intr[4]; | 76 | #ifdef CONFIG_PM |
77 | static void tzic_irq_suspend(struct irq_data *d) | ||
78 | { | ||
79 | struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); | ||
80 | int idx = gc->irq_base >> 5; | ||
81 | |||
82 | __raw_writel(gc->wake_active, tzic_base + TZIC_WAKEUP0(idx)); | ||
83 | } | ||
84 | |||
85 | static void tzic_irq_resume(struct irq_data *d) | ||
86 | { | ||
87 | struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); | ||
88 | int idx = gc->irq_base >> 5; | ||
89 | |||
90 | __raw_writel(__raw_readl(tzic_base + TZIC_ENSET0(idx)), | ||
91 | tzic_base + TZIC_WAKEUP0(idx)); | ||
92 | } | ||
93 | |||
94 | #else | ||
95 | #define tzic_irq_suspend NULL | ||
96 | #define tzic_irq_resume NULL | ||
97 | #endif | ||
77 | 98 | ||
78 | static struct mxc_extra_irq tzic_extra_irq = { | 99 | static struct mxc_extra_irq tzic_extra_irq = { |
79 | #ifdef CONFIG_FIQ | 100 | #ifdef CONFIG_FIQ |
@@ -91,12 +112,13 @@ static __init void tzic_init_gc(unsigned int irq_start) | |||
91 | handle_level_irq); | 112 | handle_level_irq); |
92 | gc->private = &tzic_extra_irq; | 113 | gc->private = &tzic_extra_irq; |
93 | gc->wake_enabled = IRQ_MSK(32); | 114 | gc->wake_enabled = IRQ_MSK(32); |
94 | wakeup_intr[idx] = &gc->wake_active; | ||
95 | 115 | ||
96 | ct = gc->chip_types; | 116 | ct = gc->chip_types; |
97 | ct->chip.irq_mask = irq_gc_mask_disable_reg; | 117 | ct->chip.irq_mask = irq_gc_mask_disable_reg; |
98 | ct->chip.irq_unmask = irq_gc_unmask_enable_reg; | 118 | ct->chip.irq_unmask = irq_gc_unmask_enable_reg; |
99 | ct->chip.irq_set_wake = irq_gc_set_wake; | 119 | ct->chip.irq_set_wake = irq_gc_set_wake; |
120 | ct->chip.irq_suspend = tzic_irq_suspend; | ||
121 | ct->chip.irq_resume = tzic_irq_resume; | ||
100 | ct->regs.disable = TZIC_ENCLEAR0(idx); | 122 | ct->regs.disable = TZIC_ENCLEAR0(idx); |
101 | ct->regs.enable = TZIC_ENSET0(idx); | 123 | ct->regs.enable = TZIC_ENSET0(idx); |
102 | 124 | ||
@@ -167,23 +189,19 @@ void __init tzic_init_irq(void __iomem *irqbase) | |||
167 | /** | 189 | /** |
168 | * tzic_enable_wake() - enable wakeup interrupt | 190 | * tzic_enable_wake() - enable wakeup interrupt |
169 | * | 191 | * |
170 | * @param is_idle 1 if called in idle loop (ENSET0 register); | ||
171 | * 0 to be used when called from low power entry | ||
172 | * @return 0 if successful; non-zero otherwise | 192 | * @return 0 if successful; non-zero otherwise |
173 | */ | 193 | */ |
174 | int tzic_enable_wake(int is_idle) | 194 | int tzic_enable_wake(void) |
175 | { | 195 | { |
176 | unsigned int i, v; | 196 | unsigned int i; |
177 | 197 | ||
178 | __raw_writel(1, tzic_base + TZIC_DSMINT); | 198 | __raw_writel(1, tzic_base + TZIC_DSMINT); |
179 | if (unlikely(__raw_readl(tzic_base + TZIC_DSMINT) == 0)) | 199 | if (unlikely(__raw_readl(tzic_base + TZIC_DSMINT) == 0)) |
180 | return -EAGAIN; | 200 | return -EAGAIN; |
181 | 201 | ||
182 | for (i = 0; i < 4; i++) { | 202 | for (i = 0; i < 4; i++) |
183 | v = is_idle ? __raw_readl(tzic_base + TZIC_ENSET0(i)) : | 203 | __raw_writel(__raw_readl(tzic_base + TZIC_ENSET0(i)), |
184 | *wakeup_intr[i]; | 204 | tzic_base + TZIC_WAKEUP0(i)); |
185 | __raw_writel(v, tzic_base + TZIC_WAKEUP0(i)); | ||
186 | } | ||
187 | 205 | ||
188 | return 0; | 206 | return 0; |
189 | } | 207 | } |