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-rw-r--r--drivers/net/wireless/rt2x00/rt2400pci.c167
-rw-r--r--drivers/net/wireless/rt2x00/rt2500pci.c206
-rw-r--r--drivers/net/wireless/rt2x00/rt2500usb.c110
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00.h35
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00config.c164
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00lib.h3
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00mac.c11
-rw-r--r--drivers/net/wireless/rt2x00/rt61pci.c231
-rw-r--r--drivers/net/wireless/rt2x00/rt73usb.c216
9 files changed, 488 insertions, 655 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2400pci.c b/drivers/net/wireless/rt2x00/rt2400pci.c
index 1adca7a1b9dc..e1891ebe5e5c 100644
--- a/drivers/net/wireless/rt2x00/rt2400pci.c
+++ b/drivers/net/wireless/rt2x00/rt2400pci.c
@@ -396,12 +396,74 @@ static void rt2400pci_config_erp(struct rt2x00_dev *rt2x00dev,
396 rt2x00_set_field32(&reg, ARCSR5_SERVICE, 0x84); 396 rt2x00_set_field32(&reg, ARCSR5_SERVICE, 0x84);
397 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 110)); 397 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 110));
398 rt2x00pci_register_write(rt2x00dev, ARCSR5, reg); 398 rt2x00pci_register_write(rt2x00dev, ARCSR5, reg);
399
400 rt2x00pci_register_write(rt2x00dev, ARCSR1, erp->basic_rates);
401
402 rt2x00pci_register_read(rt2x00dev, CSR11, &reg);
403 rt2x00_set_field32(&reg, CSR11_SLOT_TIME, erp->slot_time);
404 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
405
406 rt2x00pci_register_read(rt2x00dev, CSR18, &reg);
407 rt2x00_set_field32(&reg, CSR18_SIFS, erp->sifs);
408 rt2x00_set_field32(&reg, CSR18_PIFS, erp->pifs);
409 rt2x00pci_register_write(rt2x00dev, CSR18, reg);
410
411 rt2x00pci_register_read(rt2x00dev, CSR19, &reg);
412 rt2x00_set_field32(&reg, CSR19_DIFS, erp->difs);
413 rt2x00_set_field32(&reg, CSR19_EIFS, erp->eifs);
414 rt2x00pci_register_write(rt2x00dev, CSR19, reg);
399} 415}
400 416
401static void rt2400pci_config_phymode(struct rt2x00_dev *rt2x00dev, 417static void rt2400pci_config_ant(struct rt2x00_dev *rt2x00dev,
402 const int basic_rate_mask) 418 struct antenna_setup *ant)
403{ 419{
404 rt2x00pci_register_write(rt2x00dev, ARCSR1, basic_rate_mask); 420 u8 r1;
421 u8 r4;
422
423 /*
424 * We should never come here because rt2x00lib is supposed
425 * to catch this and send us the correct antenna explicitely.
426 */
427 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
428 ant->tx == ANTENNA_SW_DIVERSITY);
429
430 rt2400pci_bbp_read(rt2x00dev, 4, &r4);
431 rt2400pci_bbp_read(rt2x00dev, 1, &r1);
432
433 /*
434 * Configure the TX antenna.
435 */
436 switch (ant->tx) {
437 case ANTENNA_HW_DIVERSITY:
438 rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 1);
439 break;
440 case ANTENNA_A:
441 rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 0);
442 break;
443 case ANTENNA_B:
444 default:
445 rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 2);
446 break;
447 }
448
449 /*
450 * Configure the RX antenna.
451 */
452 switch (ant->rx) {
453 case ANTENNA_HW_DIVERSITY:
454 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
455 break;
456 case ANTENNA_A:
457 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 0);
458 break;
459 case ANTENNA_B:
460 default:
461 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 2);
462 break;
463 }
464
465 rt2400pci_bbp_write(rt2x00dev, 4, r4);
466 rt2400pci_bbp_write(rt2x00dev, 1, r1);
405} 467}
406 468
407static void rt2400pci_config_channel(struct rt2x00_dev *rt2x00dev, 469static void rt2400pci_config_channel(struct rt2x00_dev *rt2x00dev,
@@ -460,56 +522,17 @@ static void rt2400pci_config_txpower(struct rt2x00_dev *rt2x00dev, int txpower)
460 rt2400pci_bbp_write(rt2x00dev, 3, TXPOWER_TO_DEV(txpower)); 522 rt2400pci_bbp_write(rt2x00dev, 3, TXPOWER_TO_DEV(txpower));
461} 523}
462 524
463static void rt2400pci_config_antenna(struct rt2x00_dev *rt2x00dev, 525static void rt2400pci_config_retry_limit(struct rt2x00_dev *rt2x00dev,
464 struct antenna_setup *ant) 526 struct rt2x00lib_conf *libconf)
465{ 527{
466 u8 r1; 528 u32 reg;
467 u8 r4;
468
469 /*
470 * We should never come here because rt2x00lib is supposed
471 * to catch this and send us the correct antenna explicitely.
472 */
473 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
474 ant->tx == ANTENNA_SW_DIVERSITY);
475
476 rt2400pci_bbp_read(rt2x00dev, 4, &r4);
477 rt2400pci_bbp_read(rt2x00dev, 1, &r1);
478
479 /*
480 * Configure the TX antenna.
481 */
482 switch (ant->tx) {
483 case ANTENNA_HW_DIVERSITY:
484 rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 1);
485 break;
486 case ANTENNA_A:
487 rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 0);
488 break;
489 case ANTENNA_B:
490 default:
491 rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 2);
492 break;
493 }
494
495 /*
496 * Configure the RX antenna.
497 */
498 switch (ant->rx) {
499 case ANTENNA_HW_DIVERSITY:
500 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
501 break;
502 case ANTENNA_A:
503 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 0);
504 break;
505 case ANTENNA_B:
506 default:
507 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 2);
508 break;
509 }
510 529
511 rt2400pci_bbp_write(rt2x00dev, 4, r4); 530 rt2x00pci_register_read(rt2x00dev, CSR11, &reg);
512 rt2400pci_bbp_write(rt2x00dev, 1, r1); 531 rt2x00_set_field32(&reg, CSR11_LONG_RETRY,
532 libconf->conf->long_frame_max_tx_count);
533 rt2x00_set_field32(&reg, CSR11_SHORT_RETRY,
534 libconf->conf->short_frame_max_tx_count);
535 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
513} 536}
514 537
515static void rt2400pci_config_duration(struct rt2x00_dev *rt2x00dev, 538static void rt2400pci_config_duration(struct rt2x00_dev *rt2x00dev,
@@ -517,20 +540,6 @@ static void rt2400pci_config_duration(struct rt2x00_dev *rt2x00dev,
517{ 540{
518 u32 reg; 541 u32 reg;
519 542
520 rt2x00pci_register_read(rt2x00dev, CSR11, &reg);
521 rt2x00_set_field32(&reg, CSR11_SLOT_TIME, libconf->slot_time);
522 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
523
524 rt2x00pci_register_read(rt2x00dev, CSR18, &reg);
525 rt2x00_set_field32(&reg, CSR18_SIFS, libconf->sifs);
526 rt2x00_set_field32(&reg, CSR18_PIFS, libconf->pifs);
527 rt2x00pci_register_write(rt2x00dev, CSR18, reg);
528
529 rt2x00pci_register_read(rt2x00dev, CSR19, &reg);
530 rt2x00_set_field32(&reg, CSR19_DIFS, libconf->difs);
531 rt2x00_set_field32(&reg, CSR19_EIFS, libconf->eifs);
532 rt2x00pci_register_write(rt2x00dev, CSR19, reg);
533
534 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg); 543 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg);
535 rt2x00_set_field32(&reg, TXCSR1_TSF_OFFSET, IEEE80211_HEADER); 544 rt2x00_set_field32(&reg, TXCSR1_TSF_OFFSET, IEEE80211_HEADER);
536 rt2x00_set_field32(&reg, TXCSR1_AUTORESPONDER, 1); 545 rt2x00_set_field32(&reg, TXCSR1_AUTORESPONDER, 1);
@@ -548,16 +557,14 @@ static void rt2400pci_config(struct rt2x00_dev *rt2x00dev,
548 struct rt2x00lib_conf *libconf, 557 struct rt2x00lib_conf *libconf,
549 const unsigned int flags) 558 const unsigned int flags)
550{ 559{
551 if (flags & CONFIG_UPDATE_PHYMODE) 560 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
552 rt2400pci_config_phymode(rt2x00dev, libconf->basic_rates);
553 if (flags & CONFIG_UPDATE_CHANNEL)
554 rt2400pci_config_channel(rt2x00dev, &libconf->rf); 561 rt2400pci_config_channel(rt2x00dev, &libconf->rf);
555 if (flags & CONFIG_UPDATE_TXPOWER) 562 if (flags & IEEE80211_CONF_CHANGE_POWER)
556 rt2400pci_config_txpower(rt2x00dev, 563 rt2400pci_config_txpower(rt2x00dev,
557 libconf->conf->power_level); 564 libconf->conf->power_level);
558 if (flags & CONFIG_UPDATE_ANTENNA) 565 if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
559 rt2400pci_config_antenna(rt2x00dev, &libconf->ant); 566 rt2400pci_config_retry_limit(rt2x00dev, libconf);
560 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT)) 567 if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)
561 rt2400pci_config_duration(rt2x00dev, libconf); 568 rt2400pci_config_duration(rt2x00dev, libconf);
562} 569}
563 570
@@ -1502,20 +1509,6 @@ static int rt2400pci_probe_hw(struct rt2x00_dev *rt2x00dev)
1502/* 1509/*
1503 * IEEE80211 stack callback functions. 1510 * IEEE80211 stack callback functions.
1504 */ 1511 */
1505static int rt2400pci_set_retry_limit(struct ieee80211_hw *hw,
1506 u32 short_retry, u32 long_retry)
1507{
1508 struct rt2x00_dev *rt2x00dev = hw->priv;
1509 u32 reg;
1510
1511 rt2x00pci_register_read(rt2x00dev, CSR11, &reg);
1512 rt2x00_set_field32(&reg, CSR11_LONG_RETRY, long_retry);
1513 rt2x00_set_field32(&reg, CSR11_SHORT_RETRY, short_retry);
1514 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
1515
1516 return 0;
1517}
1518
1519static int rt2400pci_conf_tx(struct ieee80211_hw *hw, u16 queue, 1512static int rt2400pci_conf_tx(struct ieee80211_hw *hw, u16 queue,
1520 const struct ieee80211_tx_queue_params *params) 1513 const struct ieee80211_tx_queue_params *params)
1521{ 1514{
@@ -1601,8 +1594,8 @@ static const struct rt2x00lib_ops rt2400pci_rt2x00_ops = {
1601 .config_filter = rt2400pci_config_filter, 1594 .config_filter = rt2400pci_config_filter,
1602 .config_intf = rt2400pci_config_intf, 1595 .config_intf = rt2400pci_config_intf,
1603 .config_erp = rt2400pci_config_erp, 1596 .config_erp = rt2400pci_config_erp,
1597 .config_ant = rt2400pci_config_ant,
1604 .config = rt2400pci_config, 1598 .config = rt2400pci_config,
1605 .set_retry_limit = rt2400pci_set_retry_limit,
1606}; 1599};
1607 1600
1608static const struct data_queue_desc rt2400pci_queue_rx = { 1601static const struct data_queue_desc rt2400pci_queue_rx = {
diff --git a/drivers/net/wireless/rt2x00/rt2500pci.c b/drivers/net/wireless/rt2x00/rt2500pci.c
index 85b0387f46eb..66a94c2f1b3c 100644
--- a/drivers/net/wireless/rt2x00/rt2500pci.c
+++ b/drivers/net/wireless/rt2x00/rt2500pci.c
@@ -402,12 +402,94 @@ static void rt2500pci_config_erp(struct rt2x00_dev *rt2x00dev,
402 rt2x00_set_field32(&reg, ARCSR5_SERVICE, 0x84); 402 rt2x00_set_field32(&reg, ARCSR5_SERVICE, 0x84);
403 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 110)); 403 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 110));
404 rt2x00pci_register_write(rt2x00dev, ARCSR5, reg); 404 rt2x00pci_register_write(rt2x00dev, ARCSR5, reg);
405
406 rt2x00pci_register_write(rt2x00dev, ARCSR1, erp->basic_rates);
407
408 rt2x00pci_register_read(rt2x00dev, CSR11, &reg);
409 rt2x00_set_field32(&reg, CSR11_SLOT_TIME, erp->slot_time);
410 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
411
412 rt2x00pci_register_read(rt2x00dev, CSR18, &reg);
413 rt2x00_set_field32(&reg, CSR18_SIFS, erp->sifs);
414 rt2x00_set_field32(&reg, CSR18_PIFS, erp->pifs);
415 rt2x00pci_register_write(rt2x00dev, CSR18, reg);
416
417 rt2x00pci_register_read(rt2x00dev, CSR19, &reg);
418 rt2x00_set_field32(&reg, CSR19_DIFS, erp->difs);
419 rt2x00_set_field32(&reg, CSR19_EIFS, erp->eifs);
420 rt2x00pci_register_write(rt2x00dev, CSR19, reg);
405} 421}
406 422
407static void rt2500pci_config_phymode(struct rt2x00_dev *rt2x00dev, 423static void rt2500pci_config_ant(struct rt2x00_dev *rt2x00dev,
408 const int basic_rate_mask) 424 struct antenna_setup *ant)
409{ 425{
410 rt2x00pci_register_write(rt2x00dev, ARCSR1, basic_rate_mask); 426 u32 reg;
427 u8 r14;
428 u8 r2;
429
430 /*
431 * We should never come here because rt2x00lib is supposed
432 * to catch this and send us the correct antenna explicitely.
433 */
434 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
435 ant->tx == ANTENNA_SW_DIVERSITY);
436
437 rt2x00pci_register_read(rt2x00dev, BBPCSR1, &reg);
438 rt2500pci_bbp_read(rt2x00dev, 14, &r14);
439 rt2500pci_bbp_read(rt2x00dev, 2, &r2);
440
441 /*
442 * Configure the TX antenna.
443 */
444 switch (ant->tx) {
445 case ANTENNA_A:
446 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
447 rt2x00_set_field32(&reg, BBPCSR1_CCK, 0);
448 rt2x00_set_field32(&reg, BBPCSR1_OFDM, 0);
449 break;
450 case ANTENNA_B:
451 default:
452 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
453 rt2x00_set_field32(&reg, BBPCSR1_CCK, 2);
454 rt2x00_set_field32(&reg, BBPCSR1_OFDM, 2);
455 break;
456 }
457
458 /*
459 * Configure the RX antenna.
460 */
461 switch (ant->rx) {
462 case ANTENNA_A:
463 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
464 break;
465 case ANTENNA_B:
466 default:
467 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
468 break;
469 }
470
471 /*
472 * RT2525E and RT5222 need to flip TX I/Q
473 */
474 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
475 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
476 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
477 rt2x00_set_field32(&reg, BBPCSR1_CCK_FLIP, 1);
478 rt2x00_set_field32(&reg, BBPCSR1_OFDM_FLIP, 1);
479
480 /*
481 * RT2525E does not need RX I/Q Flip.
482 */
483 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
484 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
485 } else {
486 rt2x00_set_field32(&reg, BBPCSR1_CCK_FLIP, 0);
487 rt2x00_set_field32(&reg, BBPCSR1_OFDM_FLIP, 0);
488 }
489
490 rt2x00pci_register_write(rt2x00dev, BBPCSR1, reg);
491 rt2500pci_bbp_write(rt2x00dev, 14, r14);
492 rt2500pci_bbp_write(rt2x00dev, 2, r2);
411} 493}
412 494
413static void rt2500pci_config_channel(struct rt2x00_dev *rt2x00dev, 495static void rt2500pci_config_channel(struct rt2x00_dev *rt2x00dev,
@@ -489,76 +571,17 @@ static void rt2500pci_config_txpower(struct rt2x00_dev *rt2x00dev,
489 rt2500pci_rf_write(rt2x00dev, 3, rf3); 571 rt2500pci_rf_write(rt2x00dev, 3, rf3);
490} 572}
491 573
492static void rt2500pci_config_antenna(struct rt2x00_dev *rt2x00dev, 574static void rt2500pci_config_retry_limit(struct rt2x00_dev *rt2x00dev,
493 struct antenna_setup *ant) 575 struct rt2x00lib_conf *libconf)
494{ 576{
495 u32 reg; 577 u32 reg;
496 u8 r14;
497 u8 r2;
498 578
499 /* 579 rt2x00pci_register_read(rt2x00dev, CSR11, &reg);
500 * We should never come here because rt2x00lib is supposed 580 rt2x00_set_field32(&reg, CSR11_LONG_RETRY,
501 * to catch this and send us the correct antenna explicitely. 581 libconf->conf->long_frame_max_tx_count);
502 */ 582 rt2x00_set_field32(&reg, CSR11_SHORT_RETRY,
503 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY || 583 libconf->conf->short_frame_max_tx_count);
504 ant->tx == ANTENNA_SW_DIVERSITY); 584 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
505
506 rt2x00pci_register_read(rt2x00dev, BBPCSR1, &reg);
507 rt2500pci_bbp_read(rt2x00dev, 14, &r14);
508 rt2500pci_bbp_read(rt2x00dev, 2, &r2);
509
510 /*
511 * Configure the TX antenna.
512 */
513 switch (ant->tx) {
514 case ANTENNA_A:
515 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
516 rt2x00_set_field32(&reg, BBPCSR1_CCK, 0);
517 rt2x00_set_field32(&reg, BBPCSR1_OFDM, 0);
518 break;
519 case ANTENNA_B:
520 default:
521 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
522 rt2x00_set_field32(&reg, BBPCSR1_CCK, 2);
523 rt2x00_set_field32(&reg, BBPCSR1_OFDM, 2);
524 break;
525 }
526
527 /*
528 * Configure the RX antenna.
529 */
530 switch (ant->rx) {
531 case ANTENNA_A:
532 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
533 break;
534 case ANTENNA_B:
535 default:
536 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
537 break;
538 }
539
540 /*
541 * RT2525E and RT5222 need to flip TX I/Q
542 */
543 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
544 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
545 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
546 rt2x00_set_field32(&reg, BBPCSR1_CCK_FLIP, 1);
547 rt2x00_set_field32(&reg, BBPCSR1_OFDM_FLIP, 1);
548
549 /*
550 * RT2525E does not need RX I/Q Flip.
551 */
552 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
553 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
554 } else {
555 rt2x00_set_field32(&reg, BBPCSR1_CCK_FLIP, 0);
556 rt2x00_set_field32(&reg, BBPCSR1_OFDM_FLIP, 0);
557 }
558
559 rt2x00pci_register_write(rt2x00dev, BBPCSR1, reg);
560 rt2500pci_bbp_write(rt2x00dev, 14, r14);
561 rt2500pci_bbp_write(rt2x00dev, 2, r2);
562} 585}
563 586
564static void rt2500pci_config_duration(struct rt2x00_dev *rt2x00dev, 587static void rt2500pci_config_duration(struct rt2x00_dev *rt2x00dev,
@@ -566,20 +589,6 @@ static void rt2500pci_config_duration(struct rt2x00_dev *rt2x00dev,
566{ 589{
567 u32 reg; 590 u32 reg;
568 591
569 rt2x00pci_register_read(rt2x00dev, CSR11, &reg);
570 rt2x00_set_field32(&reg, CSR11_SLOT_TIME, libconf->slot_time);
571 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
572
573 rt2x00pci_register_read(rt2x00dev, CSR18, &reg);
574 rt2x00_set_field32(&reg, CSR18_SIFS, libconf->sifs);
575 rt2x00_set_field32(&reg, CSR18_PIFS, libconf->pifs);
576 rt2x00pci_register_write(rt2x00dev, CSR18, reg);
577
578 rt2x00pci_register_read(rt2x00dev, CSR19, &reg);
579 rt2x00_set_field32(&reg, CSR19_DIFS, libconf->difs);
580 rt2x00_set_field32(&reg, CSR19_EIFS, libconf->eifs);
581 rt2x00pci_register_write(rt2x00dev, CSR19, reg);
582
583 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg); 592 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg);
584 rt2x00_set_field32(&reg, TXCSR1_TSF_OFFSET, IEEE80211_HEADER); 593 rt2x00_set_field32(&reg, TXCSR1_TSF_OFFSET, IEEE80211_HEADER);
585 rt2x00_set_field32(&reg, TXCSR1_AUTORESPONDER, 1); 594 rt2x00_set_field32(&reg, TXCSR1_AUTORESPONDER, 1);
@@ -597,17 +606,16 @@ static void rt2500pci_config(struct rt2x00_dev *rt2x00dev,
597 struct rt2x00lib_conf *libconf, 606 struct rt2x00lib_conf *libconf,
598 const unsigned int flags) 607 const unsigned int flags)
599{ 608{
600 if (flags & CONFIG_UPDATE_PHYMODE) 609 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
601 rt2500pci_config_phymode(rt2x00dev, libconf->basic_rates);
602 if (flags & CONFIG_UPDATE_CHANNEL)
603 rt2500pci_config_channel(rt2x00dev, &libconf->rf, 610 rt2500pci_config_channel(rt2x00dev, &libconf->rf,
604 libconf->conf->power_level); 611 libconf->conf->power_level);
605 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL)) 612 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
613 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
606 rt2500pci_config_txpower(rt2x00dev, 614 rt2500pci_config_txpower(rt2x00dev,
607 libconf->conf->power_level); 615 libconf->conf->power_level);
608 if (flags & CONFIG_UPDATE_ANTENNA) 616 if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
609 rt2500pci_config_antenna(rt2x00dev, &libconf->ant); 617 rt2500pci_config_retry_limit(rt2x00dev, libconf);
610 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT)) 618 if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)
611 rt2500pci_config_duration(rt2x00dev, libconf); 619 rt2500pci_config_duration(rt2x00dev, libconf);
612} 620}
613 621
@@ -1827,20 +1835,6 @@ static int rt2500pci_probe_hw(struct rt2x00_dev *rt2x00dev)
1827/* 1835/*
1828 * IEEE80211 stack callback functions. 1836 * IEEE80211 stack callback functions.
1829 */ 1837 */
1830static int rt2500pci_set_retry_limit(struct ieee80211_hw *hw,
1831 u32 short_retry, u32 long_retry)
1832{
1833 struct rt2x00_dev *rt2x00dev = hw->priv;
1834 u32 reg;
1835
1836 rt2x00pci_register_read(rt2x00dev, CSR11, &reg);
1837 rt2x00_set_field32(&reg, CSR11_LONG_RETRY, long_retry);
1838 rt2x00_set_field32(&reg, CSR11_SHORT_RETRY, short_retry);
1839 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
1840
1841 return 0;
1842}
1843
1844static u64 rt2500pci_get_tsf(struct ieee80211_hw *hw) 1838static u64 rt2500pci_get_tsf(struct ieee80211_hw *hw)
1845{ 1839{
1846 struct rt2x00_dev *rt2x00dev = hw->priv; 1840 struct rt2x00_dev *rt2x00dev = hw->priv;
@@ -1901,8 +1895,8 @@ static const struct rt2x00lib_ops rt2500pci_rt2x00_ops = {
1901 .config_filter = rt2500pci_config_filter, 1895 .config_filter = rt2500pci_config_filter,
1902 .config_intf = rt2500pci_config_intf, 1896 .config_intf = rt2500pci_config_intf,
1903 .config_erp = rt2500pci_config_erp, 1897 .config_erp = rt2500pci_config_erp,
1898 .config_ant = rt2500pci_config_ant,
1904 .config = rt2500pci_config, 1899 .config = rt2500pci_config,
1905 .set_retry_limit = rt2500pci_set_retry_limit,
1906}; 1900};
1907 1901
1908static const struct data_queue_desc rt2500pci_queue_rx = { 1902static const struct data_queue_desc rt2500pci_queue_rx = {
diff --git a/drivers/net/wireless/rt2x00/rt2500usb.c b/drivers/net/wireless/rt2x00/rt2500usb.c
index d19bee43861d..19970de94639 100644
--- a/drivers/net/wireless/rt2x00/rt2500usb.c
+++ b/drivers/net/wireless/rt2x00/rt2500usb.c
@@ -423,57 +423,16 @@ static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
423 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE, 423 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
424 !!erp->short_preamble); 424 !!erp->short_preamble);
425 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg); 425 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
426}
427
428static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev,
429 const int basic_rate_mask)
430{
431 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, basic_rate_mask);
432}
433
434static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
435 struct rf_channel *rf, const int txpower)
436{
437 /*
438 * Set TXpower.
439 */
440 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
441
442 /*
443 * For RT2525E we should first set the channel to half band higher.
444 */
445 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
446 static const u32 vals[] = {
447 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
448 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
449 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
450 0x00000902, 0x00000906
451 };
452 426
453 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]); 427 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, erp->basic_rates);
454 if (rf->rf4)
455 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
456 }
457 428
458 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1); 429 rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
459 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2); 430 rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
460 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3); 431 rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
461 if (rf->rf4)
462 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
463}
464
465static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
466 const int txpower)
467{
468 u32 rf3;
469
470 rt2x00_rf_read(rt2x00dev, 3, &rf3);
471 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
472 rt2500usb_rf_write(rt2x00dev, 3, rf3);
473} 432}
474 433
475static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev, 434static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
476 struct antenna_setup *ant) 435 struct antenna_setup *ant)
477{ 436{
478 u8 r2; 437 u8 r2;
479 u8 r14; 438 u8 r14;
@@ -555,15 +514,52 @@ static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev,
555 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6); 514 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
556} 515}
557 516
517static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
518 struct rf_channel *rf, const int txpower)
519{
520 /*
521 * Set TXpower.
522 */
523 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
524
525 /*
526 * For RT2525E we should first set the channel to half band higher.
527 */
528 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
529 static const u32 vals[] = {
530 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
531 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
532 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
533 0x00000902, 0x00000906
534 };
535
536 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
537 if (rf->rf4)
538 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
539 }
540
541 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
542 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
543 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
544 if (rf->rf4)
545 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
546}
547
548static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
549 const int txpower)
550{
551 u32 rf3;
552
553 rt2x00_rf_read(rt2x00dev, 3, &rf3);
554 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
555 rt2500usb_rf_write(rt2x00dev, 3, rf3);
556}
557
558static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev, 558static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
559 struct rt2x00lib_conf *libconf) 559 struct rt2x00lib_conf *libconf)
560{ 560{
561 u16 reg; 561 u16 reg;
562 562
563 rt2500usb_register_write(rt2x00dev, MAC_CSR10, libconf->slot_time);
564 rt2500usb_register_write(rt2x00dev, MAC_CSR11, libconf->sifs);
565 rt2500usb_register_write(rt2x00dev, MAC_CSR12, libconf->eifs);
566
567 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg); 563 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
568 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL, 564 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
569 libconf->conf->beacon_int * 4); 565 libconf->conf->beacon_int * 4);
@@ -574,17 +570,14 @@ static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
574 struct rt2x00lib_conf *libconf, 570 struct rt2x00lib_conf *libconf,
575 const unsigned int flags) 571 const unsigned int flags)
576{ 572{
577 if (flags & CONFIG_UPDATE_PHYMODE) 573 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
578 rt2500usb_config_phymode(rt2x00dev, libconf->basic_rates);
579 if (flags & CONFIG_UPDATE_CHANNEL)
580 rt2500usb_config_channel(rt2x00dev, &libconf->rf, 574 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
581 libconf->conf->power_level); 575 libconf->conf->power_level);
582 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL)) 576 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
577 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
583 rt2500usb_config_txpower(rt2x00dev, 578 rt2500usb_config_txpower(rt2x00dev,
584 libconf->conf->power_level); 579 libconf->conf->power_level);
585 if (flags & CONFIG_UPDATE_ANTENNA) 580 if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)
586 rt2500usb_config_antenna(rt2x00dev, &libconf->ant);
587 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
588 rt2500usb_config_duration(rt2x00dev, libconf); 581 rt2500usb_config_duration(rt2x00dev, libconf);
589} 582}
590 583
@@ -1794,6 +1787,7 @@ static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1794 .config_filter = rt2500usb_config_filter, 1787 .config_filter = rt2500usb_config_filter,
1795 .config_intf = rt2500usb_config_intf, 1788 .config_intf = rt2500usb_config_intf,
1796 .config_erp = rt2500usb_config_erp, 1789 .config_erp = rt2500usb_config_erp,
1790 .config_ant = rt2500usb_config_ant,
1797 .config = rt2500usb_config, 1791 .config = rt2500usb_config,
1798}; 1792};
1799 1793
diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h
index 0887e895d5c1..4d983e6eefc4 100644
--- a/drivers/net/wireless/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/rt2x00/rt2x00.h
@@ -433,18 +433,6 @@ struct rt2x00lib_conf {
433 433
434 struct rf_channel rf; 434 struct rf_channel rf;
435 struct channel_info channel; 435 struct channel_info channel;
436
437 struct antenna_setup ant;
438
439 enum ieee80211_band band;
440
441 u32 basic_rates;
442 u32 slot_time;
443
444 short sifs;
445 short pifs;
446 short difs;
447 short eifs;
448}; 436};
449 437
450/* 438/*
@@ -456,6 +444,15 @@ struct rt2x00lib_erp {
456 444
457 int ack_timeout; 445 int ack_timeout;
458 int ack_consume_time; 446 int ack_consume_time;
447
448 u64 basic_rates;
449
450 int slot_time;
451
452 short sifs;
453 short pifs;
454 short difs;
455 short eifs;
459}; 456};
460 457
461/* 458/*
@@ -589,19 +586,11 @@ struct rt2x00lib_ops {
589 586
590 void (*config_erp) (struct rt2x00_dev *rt2x00dev, 587 void (*config_erp) (struct rt2x00_dev *rt2x00dev,
591 struct rt2x00lib_erp *erp); 588 struct rt2x00lib_erp *erp);
589 void (*config_ant) (struct rt2x00_dev *rt2x00dev,
590 struct antenna_setup *ant);
592 void (*config) (struct rt2x00_dev *rt2x00dev, 591 void (*config) (struct rt2x00_dev *rt2x00dev,
593 struct rt2x00lib_conf *libconf, 592 struct rt2x00lib_conf *libconf,
594 const unsigned int flags); 593 const unsigned int changed_flags);
595#define CONFIG_UPDATE_PHYMODE ( 1 << 1 )
596#define CONFIG_UPDATE_CHANNEL ( 1 << 2 )
597#define CONFIG_UPDATE_TXPOWER ( 1 << 3 )
598#define CONFIG_UPDATE_ANTENNA ( 1 << 4 )
599#define CONFIG_UPDATE_SLOT_TIME ( 1 << 5 )
600#define CONFIG_UPDATE_BEACON_INT ( 1 << 6 )
601#define CONFIG_UPDATE_ALL 0xffff
602
603 int (*set_retry_limit) (struct ieee80211_hw *hw,
604 u32 short_limit, u32 long_limit);
605}; 594};
606 595
607/* 596/*
diff --git a/drivers/net/wireless/rt2x00/rt2x00config.c b/drivers/net/wireless/rt2x00/rt2x00config.c
index 7910147157b5..3e4eee3ab7d2 100644
--- a/drivers/net/wireless/rt2x00/rt2x00config.c
+++ b/drivers/net/wireless/rt2x00/rt2x00config.c
@@ -86,13 +86,14 @@ void rt2x00lib_config_erp(struct rt2x00_dev *rt2x00dev,
86 erp.short_preamble = bss_conf->use_short_preamble; 86 erp.short_preamble = bss_conf->use_short_preamble;
87 erp.cts_protection = bss_conf->use_cts_prot; 87 erp.cts_protection = bss_conf->use_cts_prot;
88 88
89 erp.ack_timeout = PLCP + get_duration(ACK_SIZE, 10); 89 erp.slot_time = bss_conf->use_short_slot ? SHORT_SLOT_TIME : SLOT_TIME;
90 erp.ack_consume_time = SIFS + PLCP + get_duration(ACK_SIZE, 10); 90 erp.sifs = SIFS;
91 erp.pifs = bss_conf->use_short_slot ? SHORT_PIFS : PIFS;
92 erp.difs = bss_conf->use_short_slot ? SHORT_DIFS : DIFS;
93 erp.eifs = bss_conf->use_short_slot ? SHORT_EIFS : EIFS;
91 94
92 if (rt2x00dev->hw->conf.flags & IEEE80211_CONF_SHORT_SLOT_TIME) 95 erp.ack_timeout = PLCP + erp.difs + get_duration(ACK_SIZE, 10);
93 erp.ack_timeout += SHORT_DIFS; 96 erp.ack_consume_time = SIFS + PLCP + get_duration(ACK_SIZE, 10);
94 else
95 erp.ack_timeout += DIFS;
96 97
97 if (bss_conf->use_short_preamble) { 98 if (bss_conf->use_short_preamble) {
98 erp.ack_timeout += SHORT_PREAMBLE; 99 erp.ack_timeout += SHORT_PREAMBLE;
@@ -102,16 +103,18 @@ void rt2x00lib_config_erp(struct rt2x00_dev *rt2x00dev,
102 erp.ack_consume_time += PREAMBLE; 103 erp.ack_consume_time += PREAMBLE;
103 } 104 }
104 105
106 erp.basic_rates = bss_conf->basic_rates;
107
105 rt2x00dev->ops->lib->config_erp(rt2x00dev, &erp); 108 rt2x00dev->ops->lib->config_erp(rt2x00dev, &erp);
106} 109}
107 110
108void rt2x00lib_config_antenna(struct rt2x00_dev *rt2x00dev, 111void rt2x00lib_config_antenna(struct rt2x00_dev *rt2x00dev,
109 enum antenna rx, enum antenna tx) 112 enum antenna rx, enum antenna tx)
110{ 113{
111 struct rt2x00lib_conf libconf; 114 struct antenna_setup ant;
112 115
113 libconf.ant.rx = rx; 116 ant.rx = rx;
114 libconf.ant.tx = tx; 117 ant.tx = tx;
115 118
116 if (rx == rt2x00dev->link.ant.active.rx && 119 if (rx == rt2x00dev->link.ant.active.rx &&
117 tx == rt2x00dev->link.ant.active.tx) 120 tx == rt2x00dev->link.ant.active.tx)
@@ -129,111 +132,28 @@ void rt2x00lib_config_antenna(struct rt2x00_dev *rt2x00dev,
129 * The latter is required since we need to recalibrate the 132 * The latter is required since we need to recalibrate the
130 * noise-sensitivity ratio for the new setup. 133 * noise-sensitivity ratio for the new setup.
131 */ 134 */
132 rt2x00dev->ops->lib->config(rt2x00dev, &libconf, CONFIG_UPDATE_ANTENNA); 135 rt2x00dev->ops->lib->config_ant(rt2x00dev, &ant);
136
133 rt2x00lib_reset_link_tuner(rt2x00dev); 137 rt2x00lib_reset_link_tuner(rt2x00dev);
134 rt2x00_reset_link_ant_rssi(&rt2x00dev->link); 138 rt2x00_reset_link_ant_rssi(&rt2x00dev->link);
135 139
136 rt2x00dev->link.ant.active.rx = libconf.ant.rx; 140 memcpy(&rt2x00dev->link.ant.active, &ant, sizeof(ant));
137 rt2x00dev->link.ant.active.tx = libconf.ant.tx;
138 141
139 if (test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags)) 142 if (test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))
140 rt2x00lib_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON_LINK); 143 rt2x00lib_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON_LINK);
141} 144}
142 145
143static u32 rt2x00lib_get_basic_rates(struct ieee80211_supported_band *band)
144{
145 const struct rt2x00_rate *rate;
146 unsigned int i;
147 u32 mask = 0;
148
149 for (i = 0; i < band->n_bitrates; i++) {
150 rate = rt2x00_get_rate(band->bitrates[i].hw_value);
151 if (rate->flags & DEV_RATE_BASIC)
152 mask |= rate->ratemask;
153 }
154
155 return mask;
156}
157
158void rt2x00lib_config(struct rt2x00_dev *rt2x00dev, 146void rt2x00lib_config(struct rt2x00_dev *rt2x00dev,
159 struct ieee80211_conf *conf, const int force_config) 147 struct ieee80211_conf *conf,
148 unsigned int ieee80211_flags)
160{ 149{
161 struct rt2x00lib_conf libconf; 150 struct rt2x00lib_conf libconf;
162 struct ieee80211_supported_band *band;
163 struct antenna_setup *default_ant = &rt2x00dev->default_ant;
164 struct antenna_setup *active_ant = &rt2x00dev->link.ant.active;
165 int flags = 0;
166 int short_slot_time;
167
168 /*
169 * In some situations we want to force all configurations
170 * to be reloaded (When resuming for instance).
171 */
172 if (force_config) {
173 flags = CONFIG_UPDATE_ALL;
174 goto config;
175 }
176
177 /*
178 * Check which configuration options have been
179 * updated and should be send to the device.
180 */
181 if (rt2x00dev->rx_status.band != conf->channel->band)
182 flags |= CONFIG_UPDATE_PHYMODE;
183 if (rt2x00dev->rx_status.freq != conf->channel->center_freq)
184 flags |= CONFIG_UPDATE_CHANNEL;
185 if (rt2x00dev->tx_power != conf->power_level)
186 flags |= CONFIG_UPDATE_TXPOWER;
187
188 /*
189 * Determining changes in the antenna setups request several checks:
190 * antenna_sel_{r,t}x = 0
191 * -> Does active_{r,t}x match default_{r,t}x
192 * -> Is default_{r,t}x SW_DIVERSITY
193 * antenna_sel_{r,t}x = 1/2
194 * -> Does active_{r,t}x match antenna_sel_{r,t}x
195 * The reason for not updating the antenna while SW diversity
196 * should be used is simple: Software diversity means that
197 * we should switch between the antenna's based on the
198 * quality. This means that the current antenna is good enough
199 * to work with untill the link tuner decides that an antenna
200 * switch should be performed.
201 */
202 if (default_ant->rx != ANTENNA_SW_DIVERSITY &&
203 default_ant->rx != active_ant->rx)
204 flags |= CONFIG_UPDATE_ANTENNA;
205 else if (active_ant->rx == ANTENNA_SW_DIVERSITY)
206 flags |= CONFIG_UPDATE_ANTENNA;
207
208 if (default_ant->tx != ANTENNA_SW_DIVERSITY &&
209 default_ant->tx != active_ant->tx)
210 flags |= CONFIG_UPDATE_ANTENNA;
211 else if (active_ant->tx == ANTENNA_SW_DIVERSITY)
212 flags |= CONFIG_UPDATE_ANTENNA;
213 151
214 /*
215 * The following configuration options are never
216 * stored anywhere and will always be updated.
217 */
218 flags |= CONFIG_UPDATE_SLOT_TIME;
219 flags |= CONFIG_UPDATE_BEACON_INT;
220
221 /*
222 * We have determined what options should be updated,
223 * now precalculate device configuration values depending
224 * on what configuration options need to be updated.
225 */
226config:
227 memset(&libconf, 0, sizeof(libconf)); 152 memset(&libconf, 0, sizeof(libconf));
228 153
229 if (flags & CONFIG_UPDATE_PHYMODE) { 154 libconf.conf = conf;
230 band = &rt2x00dev->bands[conf->channel->band];
231
232 libconf.band = conf->channel->band;
233 libconf.basic_rates = rt2x00lib_get_basic_rates(band);
234 }
235 155
236 if (flags & CONFIG_UPDATE_CHANNEL) { 156 if (ieee80211_flags & IEEE80211_CONF_CHANGE_CHANNEL) {
237 memcpy(&libconf.rf, 157 memcpy(&libconf.rf,
238 &rt2x00dev->spec.channels[conf->channel->hw_value], 158 &rt2x00dev->spec.channels[conf->channel->hw_value],
239 sizeof(libconf.rf)); 159 sizeof(libconf.rf));
@@ -243,57 +163,21 @@ config:
243 sizeof(libconf.channel)); 163 sizeof(libconf.channel));
244 } 164 }
245 165
246 if (flags & CONFIG_UPDATE_ANTENNA) {
247 if (default_ant->rx != ANTENNA_SW_DIVERSITY)
248 libconf.ant.rx = default_ant->rx;
249 else if (active_ant->rx == ANTENNA_SW_DIVERSITY)
250 libconf.ant.rx = ANTENNA_B;
251 else
252 libconf.ant.rx = active_ant->rx;
253
254 if (default_ant->tx != ANTENNA_SW_DIVERSITY)
255 libconf.ant.tx = default_ant->tx;
256 else if (active_ant->tx == ANTENNA_SW_DIVERSITY)
257 libconf.ant.tx = ANTENNA_B;
258 else
259 libconf.ant.tx = active_ant->tx;
260 }
261
262 if (flags & CONFIG_UPDATE_SLOT_TIME) {
263 short_slot_time = conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME;
264
265 libconf.slot_time =
266 short_slot_time ? SHORT_SLOT_TIME : SLOT_TIME;
267 libconf.sifs = SIFS;
268 libconf.pifs = short_slot_time ? SHORT_PIFS : PIFS;
269 libconf.difs = short_slot_time ? SHORT_DIFS : DIFS;
270 libconf.eifs = short_slot_time ? SHORT_EIFS : EIFS;
271 }
272
273 libconf.conf = conf;
274
275 /* 166 /*
276 * Start configuration. 167 * Start configuration.
277 */ 168 */
278 rt2x00dev->ops->lib->config(rt2x00dev, &libconf, flags); 169 rt2x00dev->ops->lib->config(rt2x00dev, &libconf, ieee80211_flags);
279 170
280 /* 171 /*
281 * Some configuration changes affect the link quality 172 * Some configuration changes affect the link quality
282 * which means we need to reset the link tuner. 173 * which means we need to reset the link tuner.
283 */ 174 */
284 if (flags & (CONFIG_UPDATE_CHANNEL | CONFIG_UPDATE_ANTENNA)) 175 if (ieee80211_flags & IEEE80211_CONF_CHANGE_CHANNEL)
285 rt2x00lib_reset_link_tuner(rt2x00dev); 176 rt2x00lib_reset_link_tuner(rt2x00dev);
286 177
287 if (flags & CONFIG_UPDATE_PHYMODE) { 178 rt2x00dev->curr_band = conf->channel->band;
288 rt2x00dev->curr_band = conf->channel->band;
289 rt2x00dev->rx_status.band = conf->channel->band;
290 }
291
292 rt2x00dev->rx_status.freq = conf->channel->center_freq;
293 rt2x00dev->tx_power = conf->power_level; 179 rt2x00dev->tx_power = conf->power_level;
294 180
295 if (flags & CONFIG_UPDATE_ANTENNA) { 181 rt2x00dev->rx_status.band = conf->channel->band;
296 rt2x00dev->link.ant.active.rx = libconf.ant.rx; 182 rt2x00dev->rx_status.freq = conf->channel->center_freq;
297 rt2x00dev->link.ant.active.tx = libconf.ant.tx;
298 }
299} 183}
diff --git a/drivers/net/wireless/rt2x00/rt2x00lib.h b/drivers/net/wireless/rt2x00/rt2x00lib.h
index 797eb619aa0a..9f214f89ba6d 100644
--- a/drivers/net/wireless/rt2x00/rt2x00lib.h
+++ b/drivers/net/wireless/rt2x00/rt2x00lib.h
@@ -96,7 +96,8 @@ void rt2x00lib_config_erp(struct rt2x00_dev *rt2x00dev,
96void rt2x00lib_config_antenna(struct rt2x00_dev *rt2x00dev, 96void rt2x00lib_config_antenna(struct rt2x00_dev *rt2x00dev,
97 enum antenna rx, enum antenna tx); 97 enum antenna rx, enum antenna tx);
98void rt2x00lib_config(struct rt2x00_dev *rt2x00dev, 98void rt2x00lib_config(struct rt2x00_dev *rt2x00dev,
99 struct ieee80211_conf *conf, const int force_config); 99 struct ieee80211_conf *conf,
100 const unsigned int changed_flags);
100 101
101/** 102/**
102 * DOC: Queue handlers 103 * DOC: Queue handlers
diff --git a/drivers/net/wireless/rt2x00/rt2x00mac.c b/drivers/net/wireless/rt2x00/rt2x00mac.c
index b32d59eafaa3..3a3b5ad38023 100644
--- a/drivers/net/wireless/rt2x00/rt2x00mac.c
+++ b/drivers/net/wireless/rt2x00/rt2x00mac.c
@@ -349,15 +349,6 @@ int rt2x00mac_config(struct ieee80211_hw *hw, u32 changed)
349 if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags)) 349 if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
350 return 0; 350 return 0;
351 351
352 if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS) {
353 rt2x00dev->ops->lib->set_retry_limit(hw,
354 conf->short_frame_max_tx_count,
355 conf->long_frame_max_tx_count);
356 }
357 changed &= ~IEEE80211_CONF_CHANGE_RETRY_LIMITS;
358 if (!changed)
359 return 0;
360
361 /* 352 /*
362 * Only change device state when the radio is enabled. It does not 353 * Only change device state when the radio is enabled. It does not
363 * matter what parameters we have configured when the radio is disabled 354 * matter what parameters we have configured when the radio is disabled
@@ -379,7 +370,7 @@ int rt2x00mac_config(struct ieee80211_hw *hw, u32 changed)
379 * When we've just turned on the radio, we want to reprogram 370 * When we've just turned on the radio, we want to reprogram
380 * everything to ensure a consistent state 371 * everything to ensure a consistent state
381 */ 372 */
382 rt2x00lib_config(rt2x00dev, conf, !radio_on); 373 rt2x00lib_config(rt2x00dev, conf, changed);
383 374
384 /* Turn RX back on */ 375 /* Turn RX back on */
385 rt2x00lib_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON); 376 rt2x00lib_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON);
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c
index 921dcd5064de..bd4a6e1ec9dd 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.c
+++ b/drivers/net/wireless/rt2x00/rt61pci.c
@@ -643,95 +643,18 @@ static void rt61pci_config_erp(struct rt2x00_dev *rt2x00dev,
643 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE, 643 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
644 !!erp->short_preamble); 644 !!erp->short_preamble);
645 rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg); 645 rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg);
646}
647
648
649static void rt61pci_config_lna_gain(struct rt2x00_dev *rt2x00dev,
650 struct rt2x00lib_conf *libconf)
651{
652 u16 eeprom;
653 short lna_gain = 0;
654
655 if (libconf->band == IEEE80211_BAND_2GHZ) {
656 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
657 lna_gain += 14;
658
659 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
660 lna_gain -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
661 } else {
662 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags))
663 lna_gain += 14;
664
665 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
666 lna_gain -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
667 }
668
669 rt2x00dev->lna_gain = lna_gain;
670}
671
672static void rt61pci_config_phymode(struct rt2x00_dev *rt2x00dev,
673 const int basic_rate_mask)
674{
675 rt2x00pci_register_write(rt2x00dev, TXRX_CSR5, basic_rate_mask);
676}
677
678static void rt61pci_config_channel(struct rt2x00_dev *rt2x00dev,
679 struct rf_channel *rf, const int txpower)
680{
681 u8 r3;
682 u8 r94;
683 u8 smart;
684
685 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
686 rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
687
688 smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
689 rt2x00_rf(&rt2x00dev->chip, RF2527));
690
691 rt61pci_bbp_read(rt2x00dev, 3, &r3);
692 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
693 rt61pci_bbp_write(rt2x00dev, 3, r3);
694
695 r94 = 6;
696 if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94))
697 r94 += txpower - MAX_TXPOWER;
698 else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
699 r94 += txpower;
700 rt61pci_bbp_write(rt2x00dev, 94, r94);
701
702 rt61pci_rf_write(rt2x00dev, 1, rf->rf1);
703 rt61pci_rf_write(rt2x00dev, 2, rf->rf2);
704 rt61pci_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
705 rt61pci_rf_write(rt2x00dev, 4, rf->rf4);
706
707 udelay(200);
708
709 rt61pci_rf_write(rt2x00dev, 1, rf->rf1);
710 rt61pci_rf_write(rt2x00dev, 2, rf->rf2);
711 rt61pci_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
712 rt61pci_rf_write(rt2x00dev, 4, rf->rf4);
713
714 udelay(200);
715
716 rt61pci_rf_write(rt2x00dev, 1, rf->rf1);
717 rt61pci_rf_write(rt2x00dev, 2, rf->rf2);
718 rt61pci_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
719 rt61pci_rf_write(rt2x00dev, 4, rf->rf4);
720
721 msleep(1);
722}
723 646
724static void rt61pci_config_txpower(struct rt2x00_dev *rt2x00dev, 647 rt2x00pci_register_write(rt2x00dev, TXRX_CSR5, erp->basic_rates);
725 const int txpower)
726{
727 struct rf_channel rf;
728 648
729 rt2x00_rf_read(rt2x00dev, 1, &rf.rf1); 649 rt2x00pci_register_read(rt2x00dev, MAC_CSR9, &reg);
730 rt2x00_rf_read(rt2x00dev, 2, &rf.rf2); 650 rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, erp->slot_time);
731 rt2x00_rf_read(rt2x00dev, 3, &rf.rf3); 651 rt2x00pci_register_write(rt2x00dev, MAC_CSR9, reg);
732 rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
733 652
734 rt61pci_config_channel(rt2x00dev, &rf, txpower); 653 rt2x00pci_register_read(rt2x00dev, MAC_CSR8, &reg);
654 rt2x00_set_field32(&reg, MAC_CSR8_SIFS, erp->sifs);
655 rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
656 rt2x00_set_field32(&reg, MAC_CSR8_EIFS, erp->eifs);
657 rt2x00pci_register_write(rt2x00dev, MAC_CSR8, reg);
735} 658}
736 659
737static void rt61pci_config_antenna_5x(struct rt2x00_dev *rt2x00dev, 660static void rt61pci_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
@@ -906,8 +829,8 @@ static const struct antenna_sel antenna_sel_bg[] = {
906 { 98, { 0x48, 0x48 } }, 829 { 98, { 0x48, 0x48 } },
907}; 830};
908 831
909static void rt61pci_config_antenna(struct rt2x00_dev *rt2x00dev, 832static void rt61pci_config_ant(struct rt2x00_dev *rt2x00dev,
910 struct antenna_setup *ant) 833 struct antenna_setup *ant)
911{ 834{
912 const struct antenna_sel *sel; 835 const struct antenna_sel *sel;
913 unsigned int lna; 836 unsigned int lna;
@@ -954,20 +877,105 @@ static void rt61pci_config_antenna(struct rt2x00_dev *rt2x00dev,
954 } 877 }
955} 878}
956 879
957static void rt61pci_config_duration(struct rt2x00_dev *rt2x00dev, 880static void rt61pci_config_lna_gain(struct rt2x00_dev *rt2x00dev,
881 struct rt2x00lib_conf *libconf)
882{
883 u16 eeprom;
884 short lna_gain = 0;
885
886 if (libconf->conf->channel->band == IEEE80211_BAND_2GHZ) {
887 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
888 lna_gain += 14;
889
890 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
891 lna_gain -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
892 } else {
893 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags))
894 lna_gain += 14;
895
896 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
897 lna_gain -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
898 }
899
900 rt2x00dev->lna_gain = lna_gain;
901}
902
903static void rt61pci_config_channel(struct rt2x00_dev *rt2x00dev,
904 struct rf_channel *rf, const int txpower)
905{
906 u8 r3;
907 u8 r94;
908 u8 smart;
909
910 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
911 rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
912
913 smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
914 rt2x00_rf(&rt2x00dev->chip, RF2527));
915
916 rt61pci_bbp_read(rt2x00dev, 3, &r3);
917 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
918 rt61pci_bbp_write(rt2x00dev, 3, r3);
919
920 r94 = 6;
921 if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94))
922 r94 += txpower - MAX_TXPOWER;
923 else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
924 r94 += txpower;
925 rt61pci_bbp_write(rt2x00dev, 94, r94);
926
927 rt61pci_rf_write(rt2x00dev, 1, rf->rf1);
928 rt61pci_rf_write(rt2x00dev, 2, rf->rf2);
929 rt61pci_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
930 rt61pci_rf_write(rt2x00dev, 4, rf->rf4);
931
932 udelay(200);
933
934 rt61pci_rf_write(rt2x00dev, 1, rf->rf1);
935 rt61pci_rf_write(rt2x00dev, 2, rf->rf2);
936 rt61pci_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
937 rt61pci_rf_write(rt2x00dev, 4, rf->rf4);
938
939 udelay(200);
940
941 rt61pci_rf_write(rt2x00dev, 1, rf->rf1);
942 rt61pci_rf_write(rt2x00dev, 2, rf->rf2);
943 rt61pci_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
944 rt61pci_rf_write(rt2x00dev, 4, rf->rf4);
945
946 msleep(1);
947}
948
949static void rt61pci_config_txpower(struct rt2x00_dev *rt2x00dev,
950 const int txpower)
951{
952 struct rf_channel rf;
953
954 rt2x00_rf_read(rt2x00dev, 1, &rf.rf1);
955 rt2x00_rf_read(rt2x00dev, 2, &rf.rf2);
956 rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
957 rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
958
959 rt61pci_config_channel(rt2x00dev, &rf, txpower);
960}
961
962static void rt61pci_config_retry_limit(struct rt2x00_dev *rt2x00dev,
958 struct rt2x00lib_conf *libconf) 963 struct rt2x00lib_conf *libconf)
959{ 964{
960 u32 reg; 965 u32 reg;
961 966
962 rt2x00pci_register_read(rt2x00dev, MAC_CSR9, &reg); 967 rt2x00pci_register_read(rt2x00dev, TXRX_CSR4, &reg);
963 rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, libconf->slot_time); 968 rt2x00_set_field32(&reg, TXRX_CSR4_LONG_RETRY_LIMIT,
964 rt2x00pci_register_write(rt2x00dev, MAC_CSR9, reg); 969 libconf->conf->long_frame_max_tx_count);
970 rt2x00_set_field32(&reg, TXRX_CSR4_SHORT_RETRY_LIMIT,
971 libconf->conf->short_frame_max_tx_count);
972 rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg);
973}
965 974
966 rt2x00pci_register_read(rt2x00dev, MAC_CSR8, &reg); 975static void rt61pci_config_duration(struct rt2x00_dev *rt2x00dev,
967 rt2x00_set_field32(&reg, MAC_CSR8_SIFS, libconf->sifs); 976 struct rt2x00lib_conf *libconf)
968 rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3); 977{
969 rt2x00_set_field32(&reg, MAC_CSR8_EIFS, libconf->eifs); 978 u32 reg;
970 rt2x00pci_register_write(rt2x00dev, MAC_CSR8, reg);
971 979
972 rt2x00pci_register_read(rt2x00dev, TXRX_CSR0, &reg); 980 rt2x00pci_register_read(rt2x00dev, TXRX_CSR0, &reg);
973 rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER); 981 rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
@@ -990,16 +998,15 @@ static void rt61pci_config(struct rt2x00_dev *rt2x00dev,
990 /* Always recalculate LNA gain before changing configuration */ 998 /* Always recalculate LNA gain before changing configuration */
991 rt61pci_config_lna_gain(rt2x00dev, libconf); 999 rt61pci_config_lna_gain(rt2x00dev, libconf);
992 1000
993 if (flags & CONFIG_UPDATE_PHYMODE) 1001 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
994 rt61pci_config_phymode(rt2x00dev, libconf->basic_rates);
995 if (flags & CONFIG_UPDATE_CHANNEL)
996 rt61pci_config_channel(rt2x00dev, &libconf->rf, 1002 rt61pci_config_channel(rt2x00dev, &libconf->rf,
997 libconf->conf->power_level); 1003 libconf->conf->power_level);
998 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL)) 1004 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
1005 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
999 rt61pci_config_txpower(rt2x00dev, libconf->conf->power_level); 1006 rt61pci_config_txpower(rt2x00dev, libconf->conf->power_level);
1000 if (flags & CONFIG_UPDATE_ANTENNA) 1007 if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
1001 rt61pci_config_antenna(rt2x00dev, &libconf->ant); 1008 rt61pci_config_retry_limit(rt2x00dev, libconf);
1002 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT)) 1009 if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)
1003 rt61pci_config_duration(rt2x00dev, libconf); 1010 rt61pci_config_duration(rt2x00dev, libconf);
1004} 1011}
1005 1012
@@ -2628,20 +2635,6 @@ static int rt61pci_probe_hw(struct rt2x00_dev *rt2x00dev)
2628/* 2635/*
2629 * IEEE80211 stack callback functions. 2636 * IEEE80211 stack callback functions.
2630 */ 2637 */
2631static int rt61pci_set_retry_limit(struct ieee80211_hw *hw,
2632 u32 short_retry, u32 long_retry)
2633{
2634 struct rt2x00_dev *rt2x00dev = hw->priv;
2635 u32 reg;
2636
2637 rt2x00pci_register_read(rt2x00dev, TXRX_CSR4, &reg);
2638 rt2x00_set_field32(&reg, TXRX_CSR4_LONG_RETRY_LIMIT, long_retry);
2639 rt2x00_set_field32(&reg, TXRX_CSR4_SHORT_RETRY_LIMIT, short_retry);
2640 rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg);
2641
2642 return 0;
2643}
2644
2645static int rt61pci_conf_tx(struct ieee80211_hw *hw, u16 queue_idx, 2638static int rt61pci_conf_tx(struct ieee80211_hw *hw, u16 queue_idx,
2646 const struct ieee80211_tx_queue_params *params) 2639 const struct ieee80211_tx_queue_params *params)
2647{ 2640{
@@ -2755,8 +2748,8 @@ static const struct rt2x00lib_ops rt61pci_rt2x00_ops = {
2755 .config_filter = rt61pci_config_filter, 2748 .config_filter = rt61pci_config_filter,
2756 .config_intf = rt61pci_config_intf, 2749 .config_intf = rt61pci_config_intf,
2757 .config_erp = rt61pci_config_erp, 2750 .config_erp = rt61pci_config_erp,
2751 .config_ant = rt61pci_config_ant,
2758 .config = rt61pci_config, 2752 .config = rt61pci_config,
2759 .set_retry_limit = rt61pci_set_retry_limit,
2760}; 2753};
2761 2754
2762static const struct data_queue_desc rt61pci_queue_rx = { 2755static const struct data_queue_desc rt61pci_queue_rx = {
diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c
index 69a4931a2fd3..5be49ed4ecf9 100644
--- a/drivers/net/wireless/rt2x00/rt73usb.c
+++ b/drivers/net/wireless/rt2x00/rt73usb.c
@@ -669,87 +669,18 @@ static void rt73usb_config_erp(struct rt2x00_dev *rt2x00dev,
669 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE, 669 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
670 !!erp->short_preamble); 670 !!erp->short_preamble);
671 rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg); 671 rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
672}
673
674static void rt73usb_config_lna_gain(struct rt2x00_dev *rt2x00dev,
675 struct rt2x00lib_conf *libconf)
676{
677 u16 eeprom;
678 short lna_gain = 0;
679
680 if (libconf->band == IEEE80211_BAND_2GHZ) {
681 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
682 lna_gain += 14;
683
684 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
685 lna_gain -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
686 } else {
687 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
688 lna_gain -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
689 }
690
691 rt2x00dev->lna_gain = lna_gain;
692}
693
694static void rt73usb_config_phymode(struct rt2x00_dev *rt2x00dev,
695 const int basic_rate_mask)
696{
697 rt73usb_register_write(rt2x00dev, TXRX_CSR5, basic_rate_mask);
698}
699
700static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
701 struct rf_channel *rf, const int txpower)
702{
703 u8 r3;
704 u8 r94;
705 u8 smart;
706
707 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
708 rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
709
710 smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
711 rt2x00_rf(&rt2x00dev->chip, RF2527));
712
713 rt73usb_bbp_read(rt2x00dev, 3, &r3);
714 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
715 rt73usb_bbp_write(rt2x00dev, 3, r3);
716
717 r94 = 6;
718 if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94))
719 r94 += txpower - MAX_TXPOWER;
720 else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
721 r94 += txpower;
722 rt73usb_bbp_write(rt2x00dev, 94, r94);
723
724 rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
725 rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
726 rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
727 rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
728
729 rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
730 rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
731 rt73usb_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
732 rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
733 672
734 rt73usb_rf_write(rt2x00dev, 1, rf->rf1); 673 rt73usb_register_write(rt2x00dev, TXRX_CSR5, erp->basic_rates);
735 rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
736 rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
737 rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
738
739 udelay(10);
740}
741
742static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev,
743 const int txpower)
744{
745 struct rf_channel rf;
746 674
747 rt2x00_rf_read(rt2x00dev, 1, &rf.rf1); 675 rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
748 rt2x00_rf_read(rt2x00dev, 2, &rf.rf2); 676 rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, erp->slot_time);
749 rt2x00_rf_read(rt2x00dev, 3, &rf.rf3); 677 rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
750 rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
751 678
752 rt73usb_config_channel(rt2x00dev, &rf, txpower); 679 rt73usb_register_read(rt2x00dev, MAC_CSR8, &reg);
680 rt2x00_set_field32(&reg, MAC_CSR8_SIFS, erp->sifs);
681 rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
682 rt2x00_set_field32(&reg, MAC_CSR8_EIFS, erp->eifs);
683 rt73usb_register_write(rt2x00dev, MAC_CSR8, reg);
753} 684}
754 685
755static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev, 686static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
@@ -869,8 +800,8 @@ static const struct antenna_sel antenna_sel_bg[] = {
869 { 98, { 0x48, 0x48 } }, 800 { 98, { 0x48, 0x48 } },
870}; 801};
871 802
872static void rt73usb_config_antenna(struct rt2x00_dev *rt2x00dev, 803static void rt73usb_config_ant(struct rt2x00_dev *rt2x00dev,
873 struct antenna_setup *ant) 804 struct antenna_setup *ant)
874{ 805{
875 const struct antenna_sel *sel; 806 const struct antenna_sel *sel;
876 unsigned int lna; 807 unsigned int lna;
@@ -912,20 +843,98 @@ static void rt73usb_config_antenna(struct rt2x00_dev *rt2x00dev,
912 rt73usb_config_antenna_2x(rt2x00dev, ant); 843 rt73usb_config_antenna_2x(rt2x00dev, ant);
913} 844}
914 845
915static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev, 846static void rt73usb_config_lna_gain(struct rt2x00_dev *rt2x00dev,
916 struct rt2x00lib_conf *libconf) 847 struct rt2x00lib_conf *libconf)
917{ 848{
849 u16 eeprom;
850 short lna_gain = 0;
851
852 if (libconf->conf->channel->band == IEEE80211_BAND_2GHZ) {
853 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
854 lna_gain += 14;
855
856 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
857 lna_gain -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
858 } else {
859 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
860 lna_gain -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
861 }
862
863 rt2x00dev->lna_gain = lna_gain;
864}
865
866static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
867 struct rf_channel *rf, const int txpower)
868{
869 u8 r3;
870 u8 r94;
871 u8 smart;
872
873 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
874 rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
875
876 smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
877 rt2x00_rf(&rt2x00dev->chip, RF2527));
878
879 rt73usb_bbp_read(rt2x00dev, 3, &r3);
880 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
881 rt73usb_bbp_write(rt2x00dev, 3, r3);
882
883 r94 = 6;
884 if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94))
885 r94 += txpower - MAX_TXPOWER;
886 else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
887 r94 += txpower;
888 rt73usb_bbp_write(rt2x00dev, 94, r94);
889
890 rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
891 rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
892 rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
893 rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
894
895 rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
896 rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
897 rt73usb_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
898 rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
899
900 rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
901 rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
902 rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
903 rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
904
905 udelay(10);
906}
907
908static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev,
909 const int txpower)
910{
911 struct rf_channel rf;
912
913 rt2x00_rf_read(rt2x00dev, 1, &rf.rf1);
914 rt2x00_rf_read(rt2x00dev, 2, &rf.rf2);
915 rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
916 rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
917
918 rt73usb_config_channel(rt2x00dev, &rf, txpower);
919}
920
921static void rt73usb_config_retry_limit(struct rt2x00_dev *rt2x00dev,
922 struct rt2x00lib_conf *libconf)
923{
918 u32 reg; 924 u32 reg;
919 925
920 rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg); 926 rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
921 rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, libconf->slot_time); 927 rt2x00_set_field32(&reg, TXRX_CSR4_LONG_RETRY_LIMIT,
922 rt73usb_register_write(rt2x00dev, MAC_CSR9, reg); 928 libconf->conf->long_frame_max_tx_count);
929 rt2x00_set_field32(&reg, TXRX_CSR4_SHORT_RETRY_LIMIT,
930 libconf->conf->short_frame_max_tx_count);
931 rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
932}
923 933
924 rt73usb_register_read(rt2x00dev, MAC_CSR8, &reg); 934static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev,
925 rt2x00_set_field32(&reg, MAC_CSR8_SIFS, libconf->sifs); 935 struct rt2x00lib_conf *libconf)
926 rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3); 936{
927 rt2x00_set_field32(&reg, MAC_CSR8_EIFS, libconf->eifs); 937 u32 reg;
928 rt73usb_register_write(rt2x00dev, MAC_CSR8, reg);
929 938
930 rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg); 939 rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
931 rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER); 940 rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
@@ -948,16 +957,15 @@ static void rt73usb_config(struct rt2x00_dev *rt2x00dev,
948 /* Always recalculate LNA gain before changing configuration */ 957 /* Always recalculate LNA gain before changing configuration */
949 rt73usb_config_lna_gain(rt2x00dev, libconf); 958 rt73usb_config_lna_gain(rt2x00dev, libconf);
950 959
951 if (flags & CONFIG_UPDATE_PHYMODE) 960 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
952 rt73usb_config_phymode(rt2x00dev, libconf->basic_rates);
953 if (flags & CONFIG_UPDATE_CHANNEL)
954 rt73usb_config_channel(rt2x00dev, &libconf->rf, 961 rt73usb_config_channel(rt2x00dev, &libconf->rf,
955 libconf->conf->power_level); 962 libconf->conf->power_level);
956 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL)) 963 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
964 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
957 rt73usb_config_txpower(rt2x00dev, libconf->conf->power_level); 965 rt73usb_config_txpower(rt2x00dev, libconf->conf->power_level);
958 if (flags & CONFIG_UPDATE_ANTENNA) 966 if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
959 rt73usb_config_antenna(rt2x00dev, &libconf->ant); 967 rt73usb_config_retry_limit(rt2x00dev, libconf);
960 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT)) 968 if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)
961 rt73usb_config_duration(rt2x00dev, libconf); 969 rt73usb_config_duration(rt2x00dev, libconf);
962} 970}
963 971
@@ -2209,20 +2217,6 @@ static int rt73usb_probe_hw(struct rt2x00_dev *rt2x00dev)
2209/* 2217/*
2210 * IEEE80211 stack callback functions. 2218 * IEEE80211 stack callback functions.
2211 */ 2219 */
2212static int rt73usb_set_retry_limit(struct ieee80211_hw *hw,
2213 u32 short_retry, u32 long_retry)
2214{
2215 struct rt2x00_dev *rt2x00dev = hw->priv;
2216 u32 reg;
2217
2218 rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
2219 rt2x00_set_field32(&reg, TXRX_CSR4_LONG_RETRY_LIMIT, long_retry);
2220 rt2x00_set_field32(&reg, TXRX_CSR4_SHORT_RETRY_LIMIT, short_retry);
2221 rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
2222
2223 return 0;
2224}
2225
2226static int rt73usb_conf_tx(struct ieee80211_hw *hw, u16 queue_idx, 2220static int rt73usb_conf_tx(struct ieee80211_hw *hw, u16 queue_idx,
2227 const struct ieee80211_tx_queue_params *params) 2221 const struct ieee80211_tx_queue_params *params)
2228{ 2222{
@@ -2345,8 +2339,8 @@ static const struct rt2x00lib_ops rt73usb_rt2x00_ops = {
2345 .config_filter = rt73usb_config_filter, 2339 .config_filter = rt73usb_config_filter,
2346 .config_intf = rt73usb_config_intf, 2340 .config_intf = rt73usb_config_intf,
2347 .config_erp = rt73usb_config_erp, 2341 .config_erp = rt73usb_config_erp,
2342 .config_ant = rt73usb_config_ant,
2348 .config = rt73usb_config, 2343 .config = rt73usb_config,
2349 .set_retry_limit = rt73usb_set_retry_limit,
2350}; 2344};
2351 2345
2352static const struct data_queue_desc rt73usb_queue_rx = { 2346static const struct data_queue_desc rt73usb_queue_rx = {
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 14:31:05 -0500