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-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_mds.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 21f61b8c445b..04ed2156db1c 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -237,6 +237,8 @@ static void __init mpc85xx_mds_setup_arch(void)
237 } else if (machine_is(mpc8569_mds)) { 237 } else if (machine_is(mpc8569_mds)) {
238#define BCSR7_UCC12_GETHnRST (0x1 << 2) 238#define BCSR7_UCC12_GETHnRST (0x1 << 2)
239#define BCSR8_UEM_MARVELL_RST (0x1 << 1) 239#define BCSR8_UEM_MARVELL_RST (0x1 << 1)
240#define BCSR_UCC_RGMII (0x1 << 6)
241#define BCSR_UCC_RTBI (0x1 << 5)
240 /* 242 /*
241 * U-Boot mangles interrupt polarity for Marvell PHYs, 243 * U-Boot mangles interrupt polarity for Marvell PHYs,
242 * so reset built-in and UEM Marvell PHYs, this puts 244 * so reset built-in and UEM Marvell PHYs, this puts
@@ -247,6 +249,28 @@ static void __init mpc85xx_mds_setup_arch(void)
247 249
248 setbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST); 250 setbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST);
249 clrbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST); 251 clrbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST);
252
253 for (np = NULL; (np = of_find_compatible_node(np,
254 "network",
255 "ucc_geth")) != NULL;) {
256 const unsigned int *prop;
257 int ucc_num;
258
259 prop = of_get_property(np, "cell-index", NULL);
260 if (prop == NULL)
261 continue;
262
263 ucc_num = *prop - 1;
264
265 prop = of_get_property(np, "phy-connection-type", NULL);
266 if (prop == NULL)
267 continue;
268
269 if (strcmp("rtbi", (const char *)prop) == 0)
270 clrsetbits_8(&bcsr_regs[7 + ucc_num],
271 BCSR_UCC_RGMII, BCSR_UCC_RTBI);
272 }
273
250 } 274 }
251 iounmap(bcsr_regs); 275 iounmap(bcsr_regs);
252 } 276 }