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-rw-r--r--arch/sh/include/asm/hw_irq.h92
-rw-r--r--arch/sh/kernel/cpu/irq/Makefile2
-rw-r--r--drivers/sh/Makefile2
-rw-r--r--drivers/sh/intc.c (renamed from arch/sh/kernel/cpu/irq/intc.c)1
-rw-r--r--include/linux/sh_intc.h91
5 files changed, 95 insertions, 93 deletions
diff --git a/arch/sh/include/asm/hw_irq.h b/arch/sh/include/asm/hw_irq.h
index d557b00111bf..603cdde813d1 100644
--- a/arch/sh/include/asm/hw_irq.h
+++ b/arch/sh/include/asm/hw_irq.h
@@ -2,6 +2,7 @@
2#define __ASM_SH_HW_IRQ_H 2#define __ASM_SH_HW_IRQ_H
3 3
4#include <linux/init.h> 4#include <linux/init.h>
5#include <linux/sh_intc.h>
5#include <asm/atomic.h> 6#include <asm/atomic.h>
6 7
7extern atomic_t irq_err_count; 8extern atomic_t irq_err_count;
@@ -23,101 +24,12 @@ struct ipr_desc {
23 24
24void register_ipr_controller(struct ipr_desc *); 25void register_ipr_controller(struct ipr_desc *);
25 26
26typedef unsigned char intc_enum;
27
28struct intc_vect {
29 intc_enum enum_id;
30 unsigned short vect;
31};
32
33#define INTC_VECT(enum_id, vect) { enum_id, vect }
34#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
35
36struct intc_group {
37 intc_enum enum_id;
38 intc_enum enum_ids[32];
39};
40
41#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
42
43struct intc_mask_reg {
44 unsigned long set_reg, clr_reg, reg_width;
45 intc_enum enum_ids[32];
46#ifdef CONFIG_SMP
47 unsigned long smp;
48#endif
49};
50
51struct intc_prio_reg {
52 unsigned long set_reg, clr_reg, reg_width, field_width;
53 intc_enum enum_ids[16];
54#ifdef CONFIG_SMP
55 unsigned long smp;
56#endif
57};
58
59struct intc_sense_reg {
60 unsigned long reg, reg_width, field_width;
61 intc_enum enum_ids[16];
62};
63
64#ifdef CONFIG_SMP
65#define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)
66#else
67#define INTC_SMP(stride, nr)
68#endif
69
70struct intc_desc {
71 struct intc_vect *vectors;
72 unsigned int nr_vectors;
73 struct intc_group *groups;
74 unsigned int nr_groups;
75 struct intc_mask_reg *mask_regs;
76 unsigned int nr_mask_regs;
77 struct intc_prio_reg *prio_regs;
78 unsigned int nr_prio_regs;
79 struct intc_sense_reg *sense_regs;
80 unsigned int nr_sense_regs;
81 char *name;
82#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
83 struct intc_mask_reg *ack_regs;
84 unsigned int nr_ack_regs;
85#endif
86};
87
88#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
89#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
90 mask_regs, prio_regs, sense_regs) \
91struct intc_desc symbol __initdata = { \
92 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
93 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
94 _INTC_ARRAY(sense_regs), \
95 chipname, \
96}
97
98#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
99#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
100 mask_regs, prio_regs, sense_regs, ack_regs) \
101struct intc_desc symbol __initdata = { \
102 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
103 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
104 _INTC_ARRAY(sense_regs), \
105 chipname, \
106 _INTC_ARRAY(ack_regs), \
107}
108#endif
109
110void __init register_intc_controller(struct intc_desc *desc);
111int intc_set_priority(unsigned int irq, unsigned int prio);
112
113void __init plat_irq_setup(void); 27void __init plat_irq_setup(void);
114#ifdef CONFIG_CPU_SH3
115void __init plat_irq_setup_sh3(void); 28void __init plat_irq_setup_sh3(void);
116#endif 29void __init plat_irq_setup_pins(int mode);
117 30
118enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210, 31enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210,
119 IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK, 32 IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK,
120 IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 }; 33 IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 };
121void __init plat_irq_setup_pins(int mode);
122 34
123#endif /* __ASM_SH_HW_IRQ_H */ 35#endif /* __ASM_SH_HW_IRQ_H */
diff --git a/arch/sh/kernel/cpu/irq/Makefile b/arch/sh/kernel/cpu/irq/Makefile
index 462a8f6dfee2..f0c7025a67d1 100644
--- a/arch/sh/kernel/cpu/irq/Makefile
+++ b/arch/sh/kernel/cpu/irq/Makefile
@@ -1,8 +1,6 @@
1# 1#
2# Makefile for the Linux/SuperH CPU-specifc IRQ handlers. 2# Makefile for the Linux/SuperH CPU-specifc IRQ handlers.
3# 3#
4obj-y += intc.o
5
6obj-$(CONFIG_SUPERH32) += imask.o 4obj-$(CONFIG_SUPERH32) += imask.o
7obj-$(CONFIG_CPU_SH5) += intc-sh5.o 5obj-$(CONFIG_CPU_SH5) += intc-sh5.o
8obj-$(CONFIG_CPU_HAS_IPR_IRQ) += ipr.o 6obj-$(CONFIG_CPU_HAS_IPR_IRQ) += ipr.o
diff --git a/drivers/sh/Makefile b/drivers/sh/Makefile
index a96f4a8cfeb8..6a025cefe6dc 100644
--- a/drivers/sh/Makefile
+++ b/drivers/sh/Makefile
@@ -1,6 +1,6 @@
1# 1#
2# Makefile for the SuperH specific drivers. 2# Makefile for the SuperH specific drivers.
3# 3#
4
5obj-$(CONFIG_SUPERHYWAY) += superhyway/ 4obj-$(CONFIG_SUPERHYWAY) += superhyway/
6obj-$(CONFIG_MAPLE) += maple/ 5obj-$(CONFIG_MAPLE) += maple/
6obj-y += intc.o
diff --git a/arch/sh/kernel/cpu/irq/intc.c b/drivers/sh/intc.c
index 138efa4e95db..58d24c5a76ce 100644
--- a/arch/sh/kernel/cpu/irq/intc.c
+++ b/drivers/sh/intc.c
@@ -21,6 +21,7 @@
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/interrupt.h> 22#include <linux/interrupt.h>
23#include <linux/bootmem.h> 23#include <linux/bootmem.h>
24#include <linux/sh_intc.h>
24 25
25#define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \ 26#define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \
26 ((shift) | ((width) << 5) | ((fn) << 9) | ((mode) << 13) | \ 27 ((shift) | ((width) << 5) | ((fn) << 9) | ((mode) << 13) | \
diff --git a/include/linux/sh_intc.h b/include/linux/sh_intc.h
new file mode 100644
index 000000000000..68e212ff9dde
--- /dev/null
+++ b/include/linux/sh_intc.h
@@ -0,0 +1,91 @@
1#ifndef __SH_INTC_H
2#define __SH_INTC_H
3
4typedef unsigned char intc_enum;
5
6struct intc_vect {
7 intc_enum enum_id;
8 unsigned short vect;
9};
10
11#define INTC_VECT(enum_id, vect) { enum_id, vect }
12#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
13
14struct intc_group {
15 intc_enum enum_id;
16 intc_enum enum_ids[32];
17};
18
19#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
20
21struct intc_mask_reg {
22 unsigned long set_reg, clr_reg, reg_width;
23 intc_enum enum_ids[32];
24#ifdef CONFIG_SMP
25 unsigned long smp;
26#endif
27};
28
29struct intc_prio_reg {
30 unsigned long set_reg, clr_reg, reg_width, field_width;
31 intc_enum enum_ids[16];
32#ifdef CONFIG_SMP
33 unsigned long smp;
34#endif
35};
36
37struct intc_sense_reg {
38 unsigned long reg, reg_width, field_width;
39 intc_enum enum_ids[16];
40};
41
42#ifdef CONFIG_SMP
43#define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)
44#else
45#define INTC_SMP(stride, nr)
46#endif
47
48struct intc_desc {
49 struct intc_vect *vectors;
50 unsigned int nr_vectors;
51 struct intc_group *groups;
52 unsigned int nr_groups;
53 struct intc_mask_reg *mask_regs;
54 unsigned int nr_mask_regs;
55 struct intc_prio_reg *prio_regs;
56 unsigned int nr_prio_regs;
57 struct intc_sense_reg *sense_regs;
58 unsigned int nr_sense_regs;
59 char *name;
60#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
61 struct intc_mask_reg *ack_regs;
62 unsigned int nr_ack_regs;
63#endif
64};
65
66#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
67#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
68 mask_regs, prio_regs, sense_regs) \
69struct intc_desc symbol __initdata = { \
70 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
71 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
72 _INTC_ARRAY(sense_regs), \
73 chipname, \
74}
75
76#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
77#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
78 mask_regs, prio_regs, sense_regs, ack_regs) \
79struct intc_desc symbol __initdata = { \
80 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
81 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
82 _INTC_ARRAY(sense_regs), \
83 chipname, \
84 _INTC_ARRAY(ack_regs), \
85}
86#endif
87
88void __init register_intc_controller(struct intc_desc *desc);
89int intc_set_priority(unsigned int irq, unsigned int prio);
90
91#endif /* __SH_INTC_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-19 07:34:18 -0500