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-rw-r--r--drivers/edac/edac_core.h4
-rw-r--r--drivers/edac/edac_mc_sysfs.c4
-rw-r--r--drivers/edac/mpc85xx_edac.c6
-rw-r--r--drivers/edac/mpc85xx_edac.h1
4 files changed, 14 insertions, 1 deletions
diff --git a/drivers/edac/edac_core.h b/drivers/edac/edac_core.h
index 3493c6bdb820..871c13b4c148 100644
--- a/drivers/edac/edac_core.h
+++ b/drivers/edac/edac_core.h
@@ -150,6 +150,8 @@ enum mem_type {
150 MEM_FB_DDR2, /* fully buffered DDR2 */ 150 MEM_FB_DDR2, /* fully buffered DDR2 */
151 MEM_RDDR2, /* Registered DDR2 RAM */ 151 MEM_RDDR2, /* Registered DDR2 RAM */
152 MEM_XDR, /* Rambus XDR */ 152 MEM_XDR, /* Rambus XDR */
153 MEM_DDR3, /* DDR3 RAM */
154 MEM_RDDR3, /* Registered DDR3 RAM */
153}; 155};
154 156
155#define MEM_FLAG_EMPTY BIT(MEM_EMPTY) 157#define MEM_FLAG_EMPTY BIT(MEM_EMPTY)
@@ -167,6 +169,8 @@ enum mem_type {
167#define MEM_FLAG_FB_DDR2 BIT(MEM_FB_DDR2) 169#define MEM_FLAG_FB_DDR2 BIT(MEM_FB_DDR2)
168#define MEM_FLAG_RDDR2 BIT(MEM_RDDR2) 170#define MEM_FLAG_RDDR2 BIT(MEM_RDDR2)
169#define MEM_FLAG_XDR BIT(MEM_XDR) 171#define MEM_FLAG_XDR BIT(MEM_XDR)
172#define MEM_FLAG_DDR3 BIT(MEM_DDR3)
173#define MEM_FLAG_RDDR3 BIT(MEM_RDDR3)
170 174
171/* chipset Error Detection and Correction capabilities and mode */ 175/* chipset Error Detection and Correction capabilities and mode */
172enum edac_type { 176enum edac_type {
diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c
index ad218fe4942d..e1d4ce083481 100644
--- a/drivers/edac/edac_mc_sysfs.c
+++ b/drivers/edac/edac_mc_sysfs.c
@@ -94,7 +94,9 @@ static const char *mem_types[] = {
94 [MEM_DDR2] = "Unbuffered-DDR2", 94 [MEM_DDR2] = "Unbuffered-DDR2",
95 [MEM_FB_DDR2] = "FullyBuffered-DDR2", 95 [MEM_FB_DDR2] = "FullyBuffered-DDR2",
96 [MEM_RDDR2] = "Registered-DDR2", 96 [MEM_RDDR2] = "Registered-DDR2",
97 [MEM_XDR] = "XDR" 97 [MEM_XDR] = "XDR",
98 [MEM_DDR3] = "Unbuffered-DDR3",
99 [MEM_RDDR3] = "Registered-DDR3"
98}; 100};
99 101
100static const char *dev_types[] = { 102static const char *dev_types[] = {
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index 7c8c2d72916f..3f2ccfc6407c 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -757,6 +757,9 @@ static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci)
757 case DSC_SDTYPE_DDR2: 757 case DSC_SDTYPE_DDR2:
758 mtype = MEM_RDDR2; 758 mtype = MEM_RDDR2;
759 break; 759 break;
760 case DSC_SDTYPE_DDR3:
761 mtype = MEM_RDDR3;
762 break;
760 default: 763 default:
761 mtype = MEM_UNKNOWN; 764 mtype = MEM_UNKNOWN;
762 break; 765 break;
@@ -769,6 +772,9 @@ static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci)
769 case DSC_SDTYPE_DDR2: 772 case DSC_SDTYPE_DDR2:
770 mtype = MEM_DDR2; 773 mtype = MEM_DDR2;
771 break; 774 break;
775 case DSC_SDTYPE_DDR3:
776 mtype = MEM_DDR3;
777 break;
772 default: 778 default:
773 mtype = MEM_UNKNOWN; 779 mtype = MEM_UNKNOWN;
774 break; 780 break;
diff --git a/drivers/edac/mpc85xx_edac.h b/drivers/edac/mpc85xx_edac.h
index 135b3539a030..52432ee7c4b9 100644
--- a/drivers/edac/mpc85xx_edac.h
+++ b/drivers/edac/mpc85xx_edac.h
@@ -53,6 +53,7 @@
53 53
54#define DSC_SDTYPE_DDR 0x02000000 54#define DSC_SDTYPE_DDR 0x02000000
55#define DSC_SDTYPE_DDR2 0x03000000 55#define DSC_SDTYPE_DDR2 0x03000000
56#define DSC_SDTYPE_DDR3 0x07000000
56#define DSC_X32_EN 0x00000020 57#define DSC_X32_EN 0x00000020
57 58
58/* Err_Int_En */ 59/* Err_Int_En */