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-rw-r--r--arch/powerpc/Kconfig2
-rw-r--r--arch/powerpc/Kconfig.debug2
-rw-r--r--arch/powerpc/Makefile4
-rw-r--r--arch/powerpc/boot/dts/gef_ppc9a.dts364
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts2
-rw-r--r--arch/powerpc/configs/86xx/gef_ppc9a_defconfig1889
-rw-r--r--arch/powerpc/include/asm/hw_irq.h2
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc32.h355
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc64-4k.h (renamed from arch/powerpc/include/asm/pgtable-4k.h)55
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc64-64k.h42
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc64.h91
-rw-r--r--arch/powerpc/include/asm/pte-40x.h64
-rw-r--r--arch/powerpc/include/asm/pte-44x.h102
-rw-r--r--arch/powerpc/include/asm/pte-8xx.h64
-rw-r--r--arch/powerpc/include/asm/pte-fsl-booke.h48
-rw-r--r--arch/powerpc/include/asm/pte-hash32.h49
-rw-r--r--arch/powerpc/include/asm/pte-hash64-4k.h20
-rw-r--r--arch/powerpc/include/asm/pte-hash64-64k.h (renamed from arch/powerpc/include/asm/pgtable-64k.h)132
-rw-r--r--arch/powerpc/include/asm/pte-hash64.h47
-rw-r--r--arch/powerpc/include/asm/udbg.h1
-rw-r--r--arch/powerpc/kernel/Makefile2
-rw-r--r--arch/powerpc/kernel/cputable.c8
-rw-r--r--arch/powerpc/kernel/head_32.S7
-rw-r--r--arch/powerpc/kernel/head_64.S6
-rw-r--r--arch/powerpc/kernel/irq.c4
-rw-r--r--arch/powerpc/kernel/pci-common.c2
-rw-r--r--arch/powerpc/kernel/prom_init.c2
-rw-r--r--arch/powerpc/kernel/prom_init_check.sh2
-rw-r--r--arch/powerpc/kernel/udbg.c7
-rw-r--r--arch/powerpc/kernel/udbg_16550.c60
-rw-r--r--arch/powerpc/math-emu/Makefile5
-rw-r--r--arch/powerpc/mm/Makefile4
-rw-r--r--arch/powerpc/mm/gup.c16
-rw-r--r--arch/powerpc/platforms/512x/Kconfig4
-rw-r--r--arch/powerpc/platforms/52xx/Kconfig2
-rw-r--r--arch/powerpc/platforms/82xx/Kconfig2
-rw-r--r--arch/powerpc/platforms/83xx/Kconfig2
-rw-r--r--arch/powerpc/platforms/85xx/ksi8560.c2
-rw-r--r--arch/powerpc/platforms/85xx/smp.c43
-rw-r--r--arch/powerpc/platforms/86xx/Kconfig12
-rw-r--r--arch/powerpc/platforms/86xx/Makefile1
-rw-r--r--arch/powerpc/platforms/86xx/gef_ppc9a.c223
-rw-r--r--arch/powerpc/platforms/86xx/gef_sbc310.c4
-rw-r--r--arch/powerpc/platforms/Kconfig27
-rw-r--r--arch/powerpc/platforms/Kconfig.cputype18
-rw-r--r--arch/powerpc/platforms/amigaone/Kconfig2
-rw-r--r--arch/powerpc/platforms/cell/Kconfig11
-rw-r--r--arch/powerpc/platforms/cell/Makefile2
-rw-r--r--arch/powerpc/platforms/cell/spufs/file.c12
-rw-r--r--arch/powerpc/platforms/chrp/Kconfig2
-rw-r--r--arch/powerpc/platforms/embedded6xx/Kconfig2
-rw-r--r--arch/powerpc/platforms/iseries/Kconfig2
-rw-r--r--arch/powerpc/platforms/iseries/irq.c2
-rw-r--r--arch/powerpc/platforms/maple/Kconfig2
-rw-r--r--arch/powerpc/platforms/pasemi/Kconfig2
-rw-r--r--arch/powerpc/platforms/powermac/Kconfig2
-rw-r--r--arch/powerpc/platforms/powermac/pic.h2
-rw-r--r--arch/powerpc/platforms/prep/Kconfig2
-rw-r--r--arch/powerpc/platforms/ps3/Kconfig2
-rw-r--r--arch/powerpc/platforms/pseries/Kconfig7
-rw-r--r--arch/powerpc/platforms/pseries/Makefile2
-rw-r--r--arch/powerpc/platforms/pseries/msi.c24
-rw-r--r--arch/powerpc/sysdev/cpm2.c1
-rw-r--r--drivers/pci/hotplug/Kconfig2
-rw-r--r--drivers/watchdog/Kconfig2
66 files changed, 3319 insertions, 568 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 5c10af66fb51..ad6b1c084fe3 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -313,7 +313,7 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE
313 313
314config KEXEC 314config KEXEC
315 bool "kexec system call (EXPERIMENTAL)" 315 bool "kexec system call (EXPERIMENTAL)"
316 depends on (PPC_PRPMC2800 || PPC_MULTIPLATFORM) && EXPERIMENTAL 316 depends on BOOK3S && EXPERIMENTAL
317 help 317 help
318 kexec is a system call that implements the ability to shutdown your 318 kexec is a system call that implements the ability to shutdown your
319 current kernel, and to start another kernel. It is like a reboot 319 current kernel, and to start another kernel. It is like a reboot
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 08f7cc0a1953..22091bbfdc9b 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -129,7 +129,7 @@ config BDI_SWITCH
129 129
130config BOOTX_TEXT 130config BOOTX_TEXT
131 bool "Support for early boot text console (BootX or OpenFirmware only)" 131 bool "Support for early boot text console (BootX or OpenFirmware only)"
132 depends on PPC_OF && PPC_MULTIPLATFORM 132 depends on PPC_OF && PPC_BOOK3S
133 help 133 help
134 Say Y here to see progress messages from the boot firmware in text 134 Say Y here to see progress messages from the boot firmware in text
135 mode. Requires either BootX or Open Firmware. 135 mode. Requires either BootX or Open Firmware.
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 72d17f50e54f..551fc58c05cf 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -147,8 +147,8 @@ core-y += arch/powerpc/kernel/ \
147 arch/powerpc/mm/ \ 147 arch/powerpc/mm/ \
148 arch/powerpc/lib/ \ 148 arch/powerpc/lib/ \
149 arch/powerpc/sysdev/ \ 149 arch/powerpc/sysdev/ \
150 arch/powerpc/platforms/ 150 arch/powerpc/platforms/ \
151core-$(CONFIG_MATH_EMULATION) += arch/powerpc/math-emu/ 151 arch/powerpc/math-emu/
152core-$(CONFIG_XMON) += arch/powerpc/xmon/ 152core-$(CONFIG_XMON) += arch/powerpc/xmon/
153core-$(CONFIG_KVM) += arch/powerpc/kvm/ 153core-$(CONFIG_KVM) += arch/powerpc/kvm/
154 154
diff --git a/arch/powerpc/boot/dts/gef_ppc9a.dts b/arch/powerpc/boot/dts/gef_ppc9a.dts
new file mode 100644
index 000000000000..0ddfdfc7ab5f
--- /dev/null
+++ b/arch/powerpc/boot/dts/gef_ppc9a.dts
@@ -0,0 +1,364 @@
1/*
2 * GE Fanuc PPC9A Device Tree Source
3 *
4 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * Based on: SBS CM6 Device Tree Source
12 * Copyright 2007 SBS Technologies GmbH & Co. KG
13 * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 */
16
17/*
18 * Compiled with dtc -I dts -O dtb -o gef_ppc9a.dtb gef_ppc9a.dts
19 */
20
21/dts-v1/;
22
23/ {
24 model = "GEF_PPC9A";
25 compatible = "gef,ppc9a";
26 #address-cells = <1>;
27 #size-cells = <1>;
28
29 aliases {
30 ethernet0 = &enet0;
31 ethernet1 = &enet1;
32 serial0 = &serial0;
33 serial1 = &serial1;
34 pci0 = &pci0;
35 };
36
37 cpus {
38 #address-cells = <1>;
39 #size-cells = <0>;
40
41 PowerPC,8641@0 {
42 device_type = "cpu";
43 reg = <0>;
44 d-cache-line-size = <32>; // 32 bytes
45 i-cache-line-size = <32>; // 32 bytes
46 d-cache-size = <32768>; // L1, 32K
47 i-cache-size = <32768>; // L1, 32K
48 timebase-frequency = <0>; // From uboot
49 bus-frequency = <0>; // From uboot
50 clock-frequency = <0>; // From uboot
51 };
52 PowerPC,8641@1 {
53 device_type = "cpu";
54 reg = <1>;
55 d-cache-line-size = <32>; // 32 bytes
56 i-cache-line-size = <32>; // 32 bytes
57 d-cache-size = <32768>; // L1, 32K
58 i-cache-size = <32768>; // L1, 32K
59 timebase-frequency = <0>; // From uboot
60 bus-frequency = <0>; // From uboot
61 clock-frequency = <0>; // From uboot
62 };
63 };
64
65 memory {
66 device_type = "memory";
67 reg = <0x0 0x40000000>; // set by uboot
68 };
69
70 localbus@fef05000 {
71 #address-cells = <2>;
72 #size-cells = <1>;
73 compatible = "fsl,mpc8641-localbus", "simple-bus";
74 reg = <0xfef05000 0x1000>;
75 interrupts = <19 2>;
76 interrupt-parent = <&mpic>;
77
78 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
79 1 0 0xe8000000 0x08000000 // Paged Flash 0
80 2 0 0xe0000000 0x08000000 // Paged Flash 1
81 3 0 0xfc100000 0x00020000 // NVRAM
82 4 0 0xfc000000 0x00008000 // FPGA
83 5 0 0xfc008000 0x00008000 // AFIX FPGA
84 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
85 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
86
87 /* flash@0,0 is a mirror of part of the memory in flash@1,0
88 flash@0,0 {
89 compatible = "gef,ppc9a-firmware-mirror", "cfi-flash";
90 reg = <0x0 0x0 0x1000000>;
91 bank-width = <4>;
92 device-width = <2>;
93 #address-cells = <1>;
94 #size-cells = <1>;
95 partition@0 {
96 label = "firmware";
97 reg = <0x0 0x1000000>;
98 read-only;
99 };
100 };
101 */
102
103 flash@1,0 {
104 compatible = "gef,ppc9a-paged-flash", "cfi-flash";
105 reg = <0x1 0x0 0x8000000>;
106 bank-width = <4>;
107 device-width = <2>;
108 #address-cells = <1>;
109 #size-cells = <1>;
110 partition@0 {
111 label = "user";
112 reg = <0x0 0x7800000>;
113 };
114 partition@7800000 {
115 label = "firmware";
116 reg = <0x7800000 0x800000>;
117 read-only;
118 };
119 };
120
121 fpga@4,0 {
122 compatible = "gef,ppc9a-fpga-regs";
123 reg = <0x4 0x0 0x40>;
124 };
125
126 wdt@4,2000 {
127 compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00",
128 "gef,fpga-wdt";
129 reg = <0x4 0x2000 0x8>;
130 interrupts = <0x1a 0x4>;
131 interrupt-parent = <&gef_pic>;
132 };
133 /* Second watchdog available, driver currently supports one.
134 wdt@4,2010 {
135 compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00",
136 "gef,fpga-wdt";
137 reg = <0x4 0x2010 0x8>;
138 interrupts = <0x1b 0x4>;
139 interrupt-parent = <&gef_pic>;
140 };
141 */
142 gef_pic: pic@4,4000 {
143 #interrupt-cells = <1>;
144 interrupt-controller;
145 compatible = "gef,ppc9a-fpga-pic", "gef,fpga-pic-1.00";
146 reg = <0x4 0x4000 0x20>;
147 interrupts = <0x8
148 0x9>;
149 interrupt-parent = <&mpic>;
150
151 };
152 gef_gpio: gpio@7,14000 {
153 #gpio-cells = <2>;
154 compatible = "gef,ppc9a-gpio", "gef,sbc610-gpio";
155 reg = <0x7 0x14000 0x24>;
156 gpio-controller;
157 };
158 };
159
160 soc@fef00000 {
161 #address-cells = <1>;
162 #size-cells = <1>;
163 #interrupt-cells = <2>;
164 compatible = "fsl,mpc8641-soc", "simple-bus";
165 ranges = <0x0 0xfef00000 0x00100000>;
166 reg = <0xfef00000 0x100000>; // CCSRBAR 1M
167 bus-frequency = <33333333>;
168
169 i2c1: i2c@3000 {
170 #address-cells = <1>;
171 #size-cells = <0>;
172 compatible = "fsl-i2c";
173 reg = <0x3000 0x100>;
174 interrupts = <0x2b 0x2>;
175 interrupt-parent = <&mpic>;
176 dfsrr;
177
178 hwmon@48 {
179 compatible = "national,lm92";
180 reg = <0x48>;
181 };
182
183 hwmon@4c {
184 compatible = "adi,adt7461";
185 reg = <0x4c>;
186 };
187
188 rtc@51 {
189 compatible = "epson,rx8581";
190 reg = <0x00000051>;
191 };
192
193 eti@6b {
194 compatible = "dallas,ds1682";
195 reg = <0x6b>;
196 };
197 };
198
199 i2c2: i2c@3100 {
200 #address-cells = <1>;
201 #size-cells = <0>;
202 compatible = "fsl-i2c";
203 reg = <0x3100 0x100>;
204 interrupts = <0x2b 0x2>;
205 interrupt-parent = <&mpic>;
206 dfsrr;
207 };
208
209 dma@21300 {
210 #address-cells = <1>;
211 #size-cells = <1>;
212 compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
213 reg = <0x21300 0x4>;
214 ranges = <0x0 0x21100 0x200>;
215 cell-index = <0>;
216 dma-channel@0 {
217 compatible = "fsl,mpc8641-dma-channel",
218 "fsl,eloplus-dma-channel";
219 reg = <0x0 0x80>;
220 cell-index = <0>;
221 interrupt-parent = <&mpic>;
222 interrupts = <20 2>;
223 };
224 dma-channel@80 {
225 compatible = "fsl,mpc8641-dma-channel",
226 "fsl,eloplus-dma-channel";
227 reg = <0x80 0x80>;
228 cell-index = <1>;
229 interrupt-parent = <&mpic>;
230 interrupts = <21 2>;
231 };
232 dma-channel@100 {
233 compatible = "fsl,mpc8641-dma-channel",
234 "fsl,eloplus-dma-channel";
235 reg = <0x100 0x80>;
236 cell-index = <2>;
237 interrupt-parent = <&mpic>;
238 interrupts = <22 2>;
239 };
240 dma-channel@180 {
241 compatible = "fsl,mpc8641-dma-channel",
242 "fsl,eloplus-dma-channel";
243 reg = <0x180 0x80>;
244 cell-index = <3>;
245 interrupt-parent = <&mpic>;
246 interrupts = <23 2>;
247 };
248 };
249
250 mdio@24520 {
251 #address-cells = <1>;
252 #size-cells = <0>;
253 compatible = "fsl,gianfar-mdio";
254 reg = <0x24520 0x20>;
255
256 phy0: ethernet-phy@0 {
257 interrupt-parent = <&gef_pic>;
258 interrupts = <0x9 0x4>;
259 reg = <1>;
260 };
261 phy2: ethernet-phy@2 {
262 interrupt-parent = <&gef_pic>;
263 interrupts = <0x8 0x4>;
264 reg = <3>;
265 };
266 };
267
268 enet0: ethernet@24000 {
269 device_type = "network";
270 model = "eTSEC";
271 compatible = "gianfar";
272 reg = <0x24000 0x1000>;
273 local-mac-address = [ 00 00 00 00 00 00 ];
274 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
275 interrupt-parent = <&mpic>;
276 phy-handle = <&phy0>;
277 phy-connection-type = "gmii";
278 };
279
280 enet1: ethernet@26000 {
281 device_type = "network";
282 model = "eTSEC";
283 compatible = "gianfar";
284 reg = <0x26000 0x1000>;
285 local-mac-address = [ 00 00 00 00 00 00 ];
286 interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>;
287 interrupt-parent = <&mpic>;
288 phy-handle = <&phy2>;
289 phy-connection-type = "gmii";
290 };
291
292 serial0: serial@4500 {
293 cell-index = <0>;
294 device_type = "serial";
295 compatible = "ns16550";
296 reg = <0x4500 0x100>;
297 clock-frequency = <0>;
298 interrupts = <0x2a 0x2>;
299 interrupt-parent = <&mpic>;
300 };
301
302 serial1: serial@4600 {
303 cell-index = <1>;
304 device_type = "serial";
305 compatible = "ns16550";
306 reg = <0x4600 0x100>;
307 clock-frequency = <0>;
308 interrupts = <0x1c 0x2>;
309 interrupt-parent = <&mpic>;
310 };
311
312 mpic: pic@40000 {
313 clock-frequency = <0>;
314 interrupt-controller;
315 #address-cells = <0>;
316 #interrupt-cells = <2>;
317 reg = <0x40000 0x40000>;
318 compatible = "chrp,open-pic";
319 device_type = "open-pic";
320 };
321
322 global-utilities@e0000 {
323 compatible = "fsl,mpc8641-guts";
324 reg = <0xe0000 0x1000>;
325 fsl,has-rstcr;
326 };
327 };
328
329 pci0: pcie@fef08000 {
330 compatible = "fsl,mpc8641-pcie";
331 device_type = "pci";
332 #interrupt-cells = <1>;
333 #size-cells = <2>;
334 #address-cells = <3>;
335 reg = <0xfef08000 0x1000>;
336 bus-range = <0x0 0xff>;
337 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
338 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
339 clock-frequency = <33333333>;
340 interrupt-parent = <&mpic>;
341 interrupts = <0x18 0x2>;
342 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
343 interrupt-map = <
344 0x0000 0x0 0x0 0x1 &mpic 0x0 0x1
345 0x0000 0x0 0x0 0x2 &mpic 0x1 0x1
346 0x0000 0x0 0x0 0x3 &mpic 0x2 0x1
347 0x0000 0x0 0x0 0x4 &mpic 0x3 0x1
348 >;
349
350 pcie@0 {
351 reg = <0 0 0 0 0>;
352 #size-cells = <2>;
353 #address-cells = <3>;
354 device_type = "pci";
355 ranges = <0x02000000 0x0 0x80000000
356 0x02000000 0x0 0x80000000
357 0x0 0x40000000
358
359 0x01000000 0x0 0x00000000
360 0x01000000 0x0 0x00000000
361 0x0 0x00400000>;
362 };
363 };
364};
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
index 15d9e35eb58a..32178bfa77d0 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
@@ -227,7 +227,7 @@
227 device_type = "open-pic"; 227 device_type = "open-pic";
228 protected-sources = < 228 protected-sources = <
229 31 32 33 37 38 39 /* enet2 enet3 */ 229 31 32 33 37 38 39 /* enet2 enet3 */
230 76 77 78 79 27 42 /* dma2 pci2 serial*/ 230 76 77 78 79 26 42 /* dma2 pci2 serial*/
231 0xe0 0xe1 0xe2 0xe3 /* msi */ 231 0xe0 0xe1 0xe2 0xe3 /* msi */
232 0xe4 0xe5 0xe6 0xe7 232 0xe4 0xe5 0xe6 0xe7
233 >; 233 >;
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
index eace811d27eb..159cb3a875f0 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
@@ -186,7 +186,7 @@
186 protected-sources = < 186 protected-sources = <
187 18 16 10 42 45 58 /* MEM L2 mdio serial crypto */ 187 18 16 10 42 45 58 /* MEM L2 mdio serial crypto */
188 29 30 34 35 36 40 /* enet0 enet1 */ 188 29 30 34 35 36 40 /* enet0 enet1 */
189 24 26 20 21 22 23 /* pcie0 pcie1 dma1 */ 189 24 25 20 21 22 23 /* pci0 pci1 dma1 */
190 43 /* i2c */ 190 43 /* i2c */
191 0x1 0x2 0x3 0x4 /* pci slot */ 191 0x1 0x2 0x3 0x4 /* pci slot */
192 0x9 0xa 0xb 0xc /* usb */ 192 0x9 0xa 0xb 0xc /* usb */
diff --git a/arch/powerpc/configs/86xx/gef_ppc9a_defconfig b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
new file mode 100644
index 000000000000..df2c16337794
--- /dev/null
+++ b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
@@ -0,0 +1,1889 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.29-rc7
4# Fri Mar 13 15:36:11 2009
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11CONFIG_6xx=y
12# CONFIG_PPC_85xx is not set
13# CONFIG_PPC_8xx is not set
14# CONFIG_40x is not set
15# CONFIG_44x is not set
16# CONFIG_E200 is not set
17CONFIG_PPC_FPU=y
18# CONFIG_PHYS_64BIT is not set
19CONFIG_ALTIVEC=y
20CONFIG_PPC_STD_MMU=y
21CONFIG_PPC_STD_MMU_32=y
22# CONFIG_PPC_MM_SLICES is not set
23CONFIG_SMP=y
24CONFIG_NR_CPUS=2
25CONFIG_PPC32=y
26CONFIG_WORD_SIZE=32
27# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
28CONFIG_MMU=y
29CONFIG_GENERIC_CMOS_UPDATE=y
30CONFIG_GENERIC_TIME=y
31CONFIG_GENERIC_TIME_VSYSCALL=y
32CONFIG_GENERIC_CLOCKEVENTS=y
33CONFIG_GENERIC_HARDIRQS=y
34# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
35CONFIG_IRQ_PER_CPU=y
36CONFIG_STACKTRACE_SUPPORT=y
37CONFIG_HAVE_LATENCYTOP_SUPPORT=y
38CONFIG_LOCKDEP_SUPPORT=y
39CONFIG_RWSEM_XCHGADD_ALGORITHM=y
40CONFIG_GENERIC_LOCKBREAK=y
41CONFIG_ARCH_HAS_ILOG2_U32=y
42CONFIG_GENERIC_HWEIGHT=y
43CONFIG_GENERIC_CALIBRATE_DELAY=y
44CONFIG_GENERIC_FIND_NEXT_BIT=y
45CONFIG_GENERIC_GPIO=y
46# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
47CONFIG_PPC=y
48CONFIG_EARLY_PRINTK=y
49CONFIG_GENERIC_NVRAM=y
50CONFIG_SCHED_OMIT_FRAME_POINTER=y
51CONFIG_ARCH_MAY_HAVE_PC_FDC=y
52CONFIG_PPC_OF=y
53CONFIG_OF=y
54CONFIG_PPC_UDBG_16550=y
55CONFIG_GENERIC_TBSYNC=y
56CONFIG_AUDIT_ARCH=y
57CONFIG_GENERIC_BUG=y
58CONFIG_DEFAULT_UIMAGE=y
59# CONFIG_PPC_DCR_NATIVE is not set
60# CONFIG_PPC_DCR_MMIO is not set
61CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
62
63#
64# General setup
65#
66CONFIG_EXPERIMENTAL=y
67CONFIG_LOCK_KERNEL=y
68CONFIG_INIT_ENV_ARG_LIMIT=32
69CONFIG_LOCALVERSION=""
70CONFIG_LOCALVERSION_AUTO=y
71CONFIG_SWAP=y
72CONFIG_SYSVIPC=y
73CONFIG_SYSVIPC_SYSCTL=y
74CONFIG_POSIX_MQUEUE=y
75CONFIG_BSD_PROCESS_ACCT=y
76CONFIG_BSD_PROCESS_ACCT_V3=y
77# CONFIG_TASKSTATS is not set
78# CONFIG_AUDIT is not set
79
80#
81# RCU Subsystem
82#
83CONFIG_CLASSIC_RCU=y
84# CONFIG_TREE_RCU is not set
85# CONFIG_PREEMPT_RCU is not set
86# CONFIG_TREE_RCU_TRACE is not set
87# CONFIG_PREEMPT_RCU_TRACE is not set
88CONFIG_IKCONFIG=y
89CONFIG_IKCONFIG_PROC=y
90CONFIG_LOG_BUF_SHIFT=14
91CONFIG_GROUP_SCHED=y
92CONFIG_FAIR_GROUP_SCHED=y
93# CONFIG_RT_GROUP_SCHED is not set
94CONFIG_USER_SCHED=y
95# CONFIG_CGROUP_SCHED is not set
96# CONFIG_CGROUPS is not set
97CONFIG_SYSFS_DEPRECATED=y
98CONFIG_SYSFS_DEPRECATED_V2=y
99CONFIG_RELAY=y
100# CONFIG_NAMESPACES is not set
101CONFIG_BLK_DEV_INITRD=y
102CONFIG_INITRAMFS_SOURCE=""
103# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
104CONFIG_SYSCTL=y
105CONFIG_EMBEDDED=y
106CONFIG_SYSCTL_SYSCALL=y
107CONFIG_KALLSYMS=y
108# CONFIG_KALLSYMS_ALL is not set
109# CONFIG_KALLSYMS_EXTRA_PASS is not set
110CONFIG_HOTPLUG=y
111CONFIG_PRINTK=y
112CONFIG_BUG=y
113CONFIG_ELF_CORE=y
114CONFIG_COMPAT_BRK=y
115CONFIG_BASE_FULL=y
116CONFIG_FUTEX=y
117CONFIG_ANON_INODES=y
118CONFIG_EPOLL=y
119CONFIG_SIGNALFD=y
120CONFIG_TIMERFD=y
121CONFIG_EVENTFD=y
122CONFIG_SHMEM=y
123CONFIG_AIO=y
124CONFIG_VM_EVENT_COUNTERS=y
125CONFIG_PCI_QUIRKS=y
126CONFIG_SLAB=y
127# CONFIG_SLUB is not set
128# CONFIG_SLOB is not set
129# CONFIG_PROFILING is not set
130CONFIG_HAVE_OPROFILE=y
131# CONFIG_KPROBES is not set
132CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
133CONFIG_HAVE_IOREMAP_PROT=y
134CONFIG_HAVE_KPROBES=y
135CONFIG_HAVE_KRETPROBES=y
136CONFIG_HAVE_ARCH_TRACEHOOK=y
137CONFIG_USE_GENERIC_SMP_HELPERS=y
138# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
139CONFIG_SLABINFO=y
140CONFIG_RT_MUTEXES=y
141CONFIG_BASE_SMALL=0
142CONFIG_MODULES=y
143# CONFIG_MODULE_FORCE_LOAD is not set
144CONFIG_MODULE_UNLOAD=y
145# CONFIG_MODULE_FORCE_UNLOAD is not set
146# CONFIG_MODVERSIONS is not set
147# CONFIG_MODULE_SRCVERSION_ALL is not set
148CONFIG_STOP_MACHINE=y
149CONFIG_BLOCK=y
150# CONFIG_LBD is not set
151# CONFIG_BLK_DEV_IO_TRACE is not set
152# CONFIG_BLK_DEV_BSG is not set
153# CONFIG_BLK_DEV_INTEGRITY is not set
154
155#
156# IO Schedulers
157#
158CONFIG_IOSCHED_NOOP=y
159CONFIG_IOSCHED_AS=y
160CONFIG_IOSCHED_DEADLINE=y
161CONFIG_IOSCHED_CFQ=y
162# CONFIG_DEFAULT_AS is not set
163# CONFIG_DEFAULT_DEADLINE is not set
164CONFIG_DEFAULT_CFQ=y
165# CONFIG_DEFAULT_NOOP is not set
166CONFIG_DEFAULT_IOSCHED="cfq"
167# CONFIG_FREEZER is not set
168
169#
170# Platform support
171#
172CONFIG_PPC_MULTIPLATFORM=y
173CONFIG_CLASSIC32=y
174# CONFIG_PPC_CHRP is not set
175# CONFIG_MPC5121_ADS is not set
176# CONFIG_MPC5121_GENERIC is not set
177# CONFIG_PPC_MPC52xx is not set
178# CONFIG_PPC_PMAC is not set
179# CONFIG_PPC_CELL is not set
180# CONFIG_PPC_CELL_NATIVE is not set
181# CONFIG_PPC_82xx is not set
182# CONFIG_PQ2ADS is not set
183# CONFIG_PPC_83xx is not set
184CONFIG_PPC_86xx=y
185# CONFIG_MPC8641_HPCN is not set
186# CONFIG_SBC8641D is not set
187# CONFIG_MPC8610_HPCD is not set
188CONFIG_GEF_PPC9A=y
189# CONFIG_GEF_SBC310 is not set
190# CONFIG_GEF_SBC610 is not set
191CONFIG_MPC8641=y
192# CONFIG_IPIC is not set
193CONFIG_MPIC=y
194# CONFIG_MPIC_WEIRD is not set
195# CONFIG_PPC_I8259 is not set
196# CONFIG_PPC_RTAS is not set
197# CONFIG_MMIO_NVRAM is not set
198# CONFIG_PPC_MPC106 is not set
199# CONFIG_PPC_970_NAP is not set
200# CONFIG_PPC_INDIRECT_IO is not set
201# CONFIG_GENERIC_IOMAP is not set
202# CONFIG_CPU_FREQ is not set
203# CONFIG_TAU is not set
204# CONFIG_QUICC_ENGINE is not set
205# CONFIG_FSL_ULI1575 is not set
206# CONFIG_MPC8xxx_GPIO is not set
207# CONFIG_SIMPLE_GPIO is not set
208
209#
210# Kernel options
211#
212# CONFIG_HIGHMEM is not set
213CONFIG_TICK_ONESHOT=y
214# CONFIG_NO_HZ is not set
215CONFIG_HIGH_RES_TIMERS=y
216CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
217# CONFIG_HZ_100 is not set
218# CONFIG_HZ_250 is not set
219# CONFIG_HZ_300 is not set
220CONFIG_HZ_1000=y
221CONFIG_HZ=1000
222CONFIG_SCHED_HRTICK=y
223# CONFIG_PREEMPT_NONE is not set
224# CONFIG_PREEMPT_VOLUNTARY is not set
225CONFIG_PREEMPT=y
226CONFIG_BINFMT_ELF=y
227# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
228# CONFIG_HAVE_AOUT is not set
229CONFIG_BINFMT_MISC=m
230# CONFIG_IOMMU_HELPER is not set
231CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
232CONFIG_ARCH_HAS_WALK_MEMORY=y
233CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
234# CONFIG_KEXEC is not set
235# CONFIG_CRASH_DUMP is not set
236CONFIG_IRQ_ALL_CPUS=y
237CONFIG_ARCH_FLATMEM_ENABLE=y
238CONFIG_ARCH_POPULATES_NODE_MAP=y
239CONFIG_SELECT_MEMORY_MODEL=y
240CONFIG_FLATMEM_MANUAL=y
241# CONFIG_DISCONTIGMEM_MANUAL is not set
242# CONFIG_SPARSEMEM_MANUAL is not set
243CONFIG_FLATMEM=y
244CONFIG_FLAT_NODE_MEM_MAP=y
245CONFIG_PAGEFLAGS_EXTENDED=y
246CONFIG_SPLIT_PTLOCK_CPUS=4
247CONFIG_MIGRATION=y
248# CONFIG_PHYS_ADDR_T_64BIT is not set
249CONFIG_ZONE_DMA_FLAG=1
250CONFIG_BOUNCE=y
251CONFIG_VIRT_TO_BUS=y
252CONFIG_UNEVICTABLE_LRU=y
253CONFIG_PPC_4K_PAGES=y
254# CONFIG_PPC_16K_PAGES is not set
255# CONFIG_PPC_64K_PAGES is not set
256CONFIG_FORCE_MAX_ZONEORDER=11
257# CONFIG_PROC_DEVICETREE is not set
258# CONFIG_CMDLINE_BOOL is not set
259CONFIG_EXTRA_TARGETS=""
260# CONFIG_PM is not set
261CONFIG_SECCOMP=y
262CONFIG_ISA_DMA_API=y
263
264#
265# Bus options
266#
267CONFIG_ZONE_DMA=y
268CONFIG_GENERIC_ISA_DMA=y
269CONFIG_PPC_INDIRECT_PCI=y
270CONFIG_FSL_SOC=y
271CONFIG_FSL_PCI=y
272CONFIG_PPC_PCI_CHOICE=y
273CONFIG_PCI=y
274CONFIG_PCI_DOMAINS=y
275CONFIG_PCI_SYSCALL=y
276CONFIG_PCIEPORTBUS=y
277CONFIG_PCIEAER=y
278# CONFIG_PCIEASPM is not set
279CONFIG_ARCH_SUPPORTS_MSI=y
280# CONFIG_PCI_MSI is not set
281# CONFIG_PCI_LEGACY is not set
282CONFIG_PCI_DEBUG=y
283# CONFIG_PCI_STUB is not set
284# CONFIG_PCCARD is not set
285# CONFIG_HOTPLUG_PCI is not set
286# CONFIG_HAS_RAPIDIO is not set
287
288#
289# Advanced setup
290#
291# CONFIG_ADVANCED_OPTIONS is not set
292
293#
294# Default settings for advanced configuration options are used
295#
296CONFIG_LOWMEM_SIZE=0x30000000
297CONFIG_PAGE_OFFSET=0xc0000000
298CONFIG_KERNEL_START=0xc0000000
299CONFIG_PHYSICAL_START=0x00000000
300CONFIG_TASK_SIZE=0xc0000000
301CONFIG_NET=y
302
303#
304# Networking options
305#
306CONFIG_COMPAT_NET_DEV_OPS=y
307CONFIG_PACKET=y
308CONFIG_PACKET_MMAP=y
309CONFIG_UNIX=y
310CONFIG_XFRM=y
311CONFIG_XFRM_USER=m
312# CONFIG_XFRM_SUB_POLICY is not set
313# CONFIG_XFRM_MIGRATE is not set
314# CONFIG_XFRM_STATISTICS is not set
315CONFIG_XFRM_IPCOMP=m
316CONFIG_NET_KEY=m
317# CONFIG_NET_KEY_MIGRATE is not set
318CONFIG_INET=y
319CONFIG_IP_MULTICAST=y
320CONFIG_IP_ADVANCED_ROUTER=y
321CONFIG_ASK_IP_FIB_HASH=y
322# CONFIG_IP_FIB_TRIE is not set
323CONFIG_IP_FIB_HASH=y
324CONFIG_IP_MULTIPLE_TABLES=y
325CONFIG_IP_ROUTE_MULTIPATH=y
326CONFIG_IP_ROUTE_VERBOSE=y
327CONFIG_IP_PNP=y
328CONFIG_IP_PNP_DHCP=y
329CONFIG_IP_PNP_BOOTP=y
330CONFIG_IP_PNP_RARP=y
331CONFIG_NET_IPIP=m
332CONFIG_NET_IPGRE=m
333CONFIG_NET_IPGRE_BROADCAST=y
334CONFIG_IP_MROUTE=y
335CONFIG_IP_PIMSM_V1=y
336CONFIG_IP_PIMSM_V2=y
337# CONFIG_ARPD is not set
338CONFIG_SYN_COOKIES=y
339CONFIG_INET_AH=m
340CONFIG_INET_ESP=m
341CONFIG_INET_IPCOMP=m
342CONFIG_INET_XFRM_TUNNEL=m
343CONFIG_INET_TUNNEL=m
344CONFIG_INET_XFRM_MODE_TRANSPORT=y
345CONFIG_INET_XFRM_MODE_TUNNEL=y
346CONFIG_INET_XFRM_MODE_BEET=y
347# CONFIG_INET_LRO is not set
348CONFIG_INET_DIAG=y
349CONFIG_INET_TCP_DIAG=y
350# CONFIG_TCP_CONG_ADVANCED is not set
351CONFIG_TCP_CONG_CUBIC=y
352CONFIG_DEFAULT_TCP_CONG="cubic"
353# CONFIG_TCP_MD5SIG is not set
354CONFIG_IPV6=m
355# CONFIG_IPV6_PRIVACY is not set
356# CONFIG_IPV6_ROUTER_PREF is not set
357# CONFIG_IPV6_OPTIMISTIC_DAD is not set
358CONFIG_INET6_AH=m
359CONFIG_INET6_ESP=m
360CONFIG_INET6_IPCOMP=m
361# CONFIG_IPV6_MIP6 is not set
362CONFIG_INET6_XFRM_TUNNEL=m
363CONFIG_INET6_TUNNEL=m
364CONFIG_INET6_XFRM_MODE_TRANSPORT=m
365CONFIG_INET6_XFRM_MODE_TUNNEL=m
366CONFIG_INET6_XFRM_MODE_BEET=m
367# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
368CONFIG_IPV6_SIT=m
369CONFIG_IPV6_NDISC_NODETYPE=y
370CONFIG_IPV6_TUNNEL=m
371# CONFIG_IPV6_MULTIPLE_TABLES is not set
372# CONFIG_IPV6_MROUTE is not set
373# CONFIG_NETLABEL is not set
374# CONFIG_NETWORK_SECMARK is not set
375CONFIG_NETFILTER=y
376# CONFIG_NETFILTER_DEBUG is not set
377CONFIG_NETFILTER_ADVANCED=y
378CONFIG_BRIDGE_NETFILTER=y
379
380#
381# Core Netfilter Configuration
382#
383# CONFIG_NETFILTER_NETLINK_QUEUE is not set
384# CONFIG_NETFILTER_NETLINK_LOG is not set
385# CONFIG_NF_CONNTRACK is not set
386CONFIG_NETFILTER_XTABLES=m
387# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
388# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
389# CONFIG_NETFILTER_XT_TARGET_MARK is not set
390# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
391# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
392# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
393# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
394# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
395# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
396# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
397# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
398# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
399# CONFIG_NETFILTER_XT_MATCH_ESP is not set
400# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
401# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
402# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set
403# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set
404# CONFIG_NETFILTER_XT_MATCH_MAC is not set
405# CONFIG_NETFILTER_XT_MATCH_MARK is not set
406# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
407# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
408# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
409# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
410# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set
411# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
412# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
413# CONFIG_NETFILTER_XT_MATCH_REALM is not set
414# CONFIG_NETFILTER_XT_MATCH_RECENT is not set
415# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
416# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
417# CONFIG_NETFILTER_XT_MATCH_STRING is not set
418# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set
419# CONFIG_NETFILTER_XT_MATCH_TIME is not set
420# CONFIG_NETFILTER_XT_MATCH_U32 is not set
421# CONFIG_IP_VS is not set
422
423#
424# IP: Netfilter Configuration
425#
426# CONFIG_NF_DEFRAG_IPV4 is not set
427CONFIG_IP_NF_QUEUE=m
428CONFIG_IP_NF_IPTABLES=m
429CONFIG_IP_NF_MATCH_ADDRTYPE=m
430# CONFIG_IP_NF_MATCH_AH is not set
431CONFIG_IP_NF_MATCH_ECN=m
432CONFIG_IP_NF_MATCH_TTL=m
433CONFIG_IP_NF_FILTER=m
434CONFIG_IP_NF_TARGET_REJECT=m
435CONFIG_IP_NF_TARGET_LOG=m
436CONFIG_IP_NF_TARGET_ULOG=m
437CONFIG_IP_NF_MANGLE=m
438CONFIG_IP_NF_TARGET_ECN=m
439# CONFIG_IP_NF_TARGET_TTL is not set
440CONFIG_IP_NF_RAW=m
441# CONFIG_IP_NF_SECURITY is not set
442CONFIG_IP_NF_ARPTABLES=m
443CONFIG_IP_NF_ARPFILTER=m
444CONFIG_IP_NF_ARP_MANGLE=m
445
446#
447# IPv6: Netfilter Configuration
448#
449CONFIG_IP6_NF_QUEUE=m
450CONFIG_IP6_NF_IPTABLES=m
451# CONFIG_IP6_NF_MATCH_AH is not set
452CONFIG_IP6_NF_MATCH_EUI64=m
453CONFIG_IP6_NF_MATCH_FRAG=m
454CONFIG_IP6_NF_MATCH_OPTS=m
455CONFIG_IP6_NF_MATCH_HL=m
456CONFIG_IP6_NF_MATCH_IPV6HEADER=m
457# CONFIG_IP6_NF_MATCH_MH is not set
458CONFIG_IP6_NF_MATCH_RT=m
459CONFIG_IP6_NF_TARGET_LOG=m
460CONFIG_IP6_NF_FILTER=m
461# CONFIG_IP6_NF_TARGET_REJECT is not set
462CONFIG_IP6_NF_MANGLE=m
463# CONFIG_IP6_NF_TARGET_HL is not set
464CONFIG_IP6_NF_RAW=m
465# CONFIG_IP6_NF_SECURITY is not set
466# CONFIG_BRIDGE_NF_EBTABLES is not set
467# CONFIG_IP_DCCP is not set
468CONFIG_IP_SCTP=m
469# CONFIG_SCTP_DBG_MSG is not set
470# CONFIG_SCTP_DBG_OBJCNT is not set
471# CONFIG_SCTP_HMAC_NONE is not set
472# CONFIG_SCTP_HMAC_SHA1 is not set
473CONFIG_SCTP_HMAC_MD5=y
474CONFIG_TIPC=m
475# CONFIG_TIPC_ADVANCED is not set
476# CONFIG_TIPC_DEBUG is not set
477CONFIG_ATM=m
478CONFIG_ATM_CLIP=m
479# CONFIG_ATM_CLIP_NO_ICMP is not set
480CONFIG_ATM_LANE=m
481CONFIG_ATM_MPOA=m
482CONFIG_ATM_BR2684=m
483# CONFIG_ATM_BR2684_IPFILTER is not set
484CONFIG_STP=m
485CONFIG_BRIDGE=m
486# CONFIG_NET_DSA is not set
487CONFIG_VLAN_8021Q=m
488# CONFIG_VLAN_8021Q_GVRP is not set
489# CONFIG_DECNET is not set
490CONFIG_LLC=m
491# CONFIG_LLC2 is not set
492# CONFIG_IPX is not set
493# CONFIG_ATALK is not set
494# CONFIG_X25 is not set
495# CONFIG_LAPB is not set
496# CONFIG_ECONET is not set
497CONFIG_WAN_ROUTER=m
498CONFIG_NET_SCHED=y
499
500#
501# Queueing/Scheduling
502#
503CONFIG_NET_SCH_CBQ=m
504CONFIG_NET_SCH_HTB=m
505CONFIG_NET_SCH_HFSC=m
506CONFIG_NET_SCH_ATM=m
507CONFIG_NET_SCH_PRIO=m
508# CONFIG_NET_SCH_MULTIQ is not set
509CONFIG_NET_SCH_RED=m
510CONFIG_NET_SCH_SFQ=m
511CONFIG_NET_SCH_TEQL=m
512CONFIG_NET_SCH_TBF=m
513CONFIG_NET_SCH_GRED=m
514CONFIG_NET_SCH_DSMARK=m
515CONFIG_NET_SCH_NETEM=m
516# CONFIG_NET_SCH_DRR is not set
517
518#
519# Classification
520#
521CONFIG_NET_CLS=y
522# CONFIG_NET_CLS_BASIC is not set
523CONFIG_NET_CLS_TCINDEX=m
524CONFIG_NET_CLS_ROUTE4=m
525CONFIG_NET_CLS_ROUTE=y
526CONFIG_NET_CLS_FW=m
527CONFIG_NET_CLS_U32=m
528# CONFIG_CLS_U32_PERF is not set
529# CONFIG_CLS_U32_MARK is not set
530CONFIG_NET_CLS_RSVP=m
531CONFIG_NET_CLS_RSVP6=m
532# CONFIG_NET_CLS_FLOW is not set
533# CONFIG_NET_EMATCH is not set
534# CONFIG_NET_CLS_ACT is not set
535# CONFIG_NET_CLS_IND is not set
536CONFIG_NET_SCH_FIFO=y
537# CONFIG_DCB is not set
538
539#
540# Network testing
541#
542CONFIG_NET_PKTGEN=m
543# CONFIG_HAMRADIO is not set
544# CONFIG_CAN is not set
545# CONFIG_IRDA is not set
546# CONFIG_BT is not set
547# CONFIG_AF_RXRPC is not set
548# CONFIG_PHONET is not set
549CONFIG_FIB_RULES=y
550CONFIG_WIRELESS=y
551# CONFIG_CFG80211 is not set
552CONFIG_WIRELESS_OLD_REGULATORY=y
553# CONFIG_WIRELESS_EXT is not set
554# CONFIG_LIB80211 is not set
555# CONFIG_MAC80211 is not set
556# CONFIG_WIMAX is not set
557# CONFIG_RFKILL is not set
558# CONFIG_NET_9P is not set
559
560#
561# Device Drivers
562#
563
564#
565# Generic Driver Options
566#
567CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
568CONFIG_STANDALONE=y
569CONFIG_PREVENT_FIRMWARE_BUILD=y
570# CONFIG_FW_LOADER is not set
571# CONFIG_DEBUG_DRIVER is not set
572# CONFIG_DEBUG_DEVRES is not set
573# CONFIG_SYS_HYPERVISOR is not set
574# CONFIG_CONNECTOR is not set
575CONFIG_MTD=y
576# CONFIG_MTD_DEBUG is not set
577CONFIG_MTD_CONCAT=y
578CONFIG_MTD_PARTITIONS=y
579# CONFIG_MTD_TESTS is not set
580# CONFIG_MTD_REDBOOT_PARTS is not set
581# CONFIG_MTD_CMDLINE_PARTS is not set
582CONFIG_MTD_OF_PARTS=y
583# CONFIG_MTD_AR7_PARTS is not set
584
585#
586# User Modules And Translation Layers
587#
588CONFIG_MTD_CHAR=y
589CONFIG_MTD_BLKDEVS=y
590CONFIG_MTD_BLOCK=y
591# CONFIG_FTL is not set
592# CONFIG_NFTL is not set
593# CONFIG_INFTL is not set
594# CONFIG_RFD_FTL is not set
595# CONFIG_SSFDC is not set
596# CONFIG_MTD_OOPS is not set
597
598#
599# RAM/ROM/Flash chip drivers
600#
601CONFIG_MTD_CFI=y
602CONFIG_MTD_JEDECPROBE=y
603CONFIG_MTD_GEN_PROBE=y
604# CONFIG_MTD_CFI_ADV_OPTIONS is not set
605CONFIG_MTD_MAP_BANK_WIDTH_1=y
606CONFIG_MTD_MAP_BANK_WIDTH_2=y
607CONFIG_MTD_MAP_BANK_WIDTH_4=y
608# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
609# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
610# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
611CONFIG_MTD_CFI_I1=y
612CONFIG_MTD_CFI_I2=y
613# CONFIG_MTD_CFI_I4 is not set
614# CONFIG_MTD_CFI_I8 is not set
615CONFIG_MTD_CFI_INTELEXT=y
616CONFIG_MTD_CFI_AMDSTD=y
617# CONFIG_MTD_CFI_STAA is not set
618CONFIG_MTD_CFI_UTIL=y
619# CONFIG_MTD_RAM is not set
620# CONFIG_MTD_ROM is not set
621# CONFIG_MTD_ABSENT is not set
622
623#
624# Mapping drivers for chip access
625#
626# CONFIG_MTD_COMPLEX_MAPPINGS is not set
627# CONFIG_MTD_PHYSMAP is not set
628CONFIG_MTD_PHYSMAP_OF=y
629# CONFIG_MTD_INTEL_VR_NOR is not set
630# CONFIG_MTD_PLATRAM is not set
631
632#
633# Self-contained MTD device drivers
634#
635# CONFIG_MTD_PMC551 is not set
636# CONFIG_MTD_SLRAM is not set
637# CONFIG_MTD_PHRAM is not set
638# CONFIG_MTD_MTDRAM is not set
639# CONFIG_MTD_BLOCK2MTD is not set
640
641#
642# Disk-On-Chip Device Drivers
643#
644# CONFIG_MTD_DOC2000 is not set
645# CONFIG_MTD_DOC2001 is not set
646# CONFIG_MTD_DOC2001PLUS is not set
647# CONFIG_MTD_NAND is not set
648# CONFIG_MTD_ONENAND is not set
649
650#
651# LPDDR flash memory drivers
652#
653# CONFIG_MTD_LPDDR is not set
654
655#
656# UBI - Unsorted block images
657#
658# CONFIG_MTD_UBI is not set
659CONFIG_OF_DEVICE=y
660CONFIG_OF_GPIO=y
661CONFIG_OF_I2C=y
662# CONFIG_PARPORT is not set
663CONFIG_BLK_DEV=y
664# CONFIG_BLK_DEV_FD is not set
665# CONFIG_BLK_CPQ_DA is not set
666# CONFIG_BLK_CPQ_CISS_DA is not set
667# CONFIG_BLK_DEV_DAC960 is not set
668# CONFIG_BLK_DEV_UMEM is not set
669# CONFIG_BLK_DEV_COW_COMMON is not set
670CONFIG_BLK_DEV_LOOP=m
671CONFIG_BLK_DEV_CRYPTOLOOP=m
672CONFIG_BLK_DEV_NBD=m
673# CONFIG_BLK_DEV_SX8 is not set
674# CONFIG_BLK_DEV_UB is not set
675CONFIG_BLK_DEV_RAM=y
676CONFIG_BLK_DEV_RAM_COUNT=16
677CONFIG_BLK_DEV_RAM_SIZE=131072
678# CONFIG_BLK_DEV_XIP is not set
679# CONFIG_CDROM_PKTCDVD is not set
680# CONFIG_ATA_OVER_ETH is not set
681# CONFIG_BLK_DEV_HD is not set
682CONFIG_MISC_DEVICES=y
683# CONFIG_PHANTOM is not set
684# CONFIG_SGI_IOC4 is not set
685# CONFIG_TIFM_CORE is not set
686# CONFIG_ICS932S401 is not set
687# CONFIG_ENCLOSURE_SERVICES is not set
688# CONFIG_HP_ILO is not set
689# CONFIG_C2PORT is not set
690
691#
692# EEPROM support
693#
694# CONFIG_EEPROM_AT24 is not set
695# CONFIG_EEPROM_LEGACY is not set
696# CONFIG_EEPROM_93CX6 is not set
697CONFIG_HAVE_IDE=y
698# CONFIG_IDE is not set
699
700#
701# SCSI device support
702#
703# CONFIG_RAID_ATTRS is not set
704CONFIG_SCSI=y
705CONFIG_SCSI_DMA=y
706# CONFIG_SCSI_TGT is not set
707# CONFIG_SCSI_NETLINK is not set
708CONFIG_SCSI_PROC_FS=y
709
710#
711# SCSI support type (disk, tape, CD-ROM)
712#
713CONFIG_BLK_DEV_SD=y
714CONFIG_CHR_DEV_ST=y
715# CONFIG_CHR_DEV_OSST is not set
716CONFIG_BLK_DEV_SR=y
717# CONFIG_BLK_DEV_SR_VENDOR is not set
718# CONFIG_CHR_DEV_SG is not set
719# CONFIG_CHR_DEV_SCH is not set
720
721#
722# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
723#
724# CONFIG_SCSI_MULTI_LUN is not set
725# CONFIG_SCSI_CONSTANTS is not set
726# CONFIG_SCSI_LOGGING is not set
727# CONFIG_SCSI_SCAN_ASYNC is not set
728CONFIG_SCSI_WAIT_SCAN=m
729
730#
731# SCSI Transports
732#
733# CONFIG_SCSI_SPI_ATTRS is not set
734# CONFIG_SCSI_FC_ATTRS is not set
735# CONFIG_SCSI_ISCSI_ATTRS is not set
736# CONFIG_SCSI_SAS_LIBSAS is not set
737# CONFIG_SCSI_SRP_ATTRS is not set
738CONFIG_SCSI_LOWLEVEL=y
739# CONFIG_ISCSI_TCP is not set
740# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
741# CONFIG_SCSI_3W_9XXX is not set
742# CONFIG_SCSI_ACARD is not set
743# CONFIG_SCSI_AACRAID is not set
744# CONFIG_SCSI_AIC7XXX is not set
745# CONFIG_SCSI_AIC7XXX_OLD is not set
746# CONFIG_SCSI_AIC79XX is not set
747# CONFIG_SCSI_AIC94XX is not set
748# CONFIG_SCSI_DPT_I2O is not set
749# CONFIG_SCSI_ADVANSYS is not set
750# CONFIG_SCSI_ARCMSR is not set
751# CONFIG_MEGARAID_NEWGEN is not set
752# CONFIG_MEGARAID_LEGACY is not set
753# CONFIG_MEGARAID_SAS is not set
754# CONFIG_SCSI_HPTIOP is not set
755# CONFIG_SCSI_BUSLOGIC is not set
756# CONFIG_LIBFC is not set
757# CONFIG_FCOE is not set
758# CONFIG_SCSI_DMX3191D is not set
759# CONFIG_SCSI_EATA is not set
760# CONFIG_SCSI_FUTURE_DOMAIN is not set
761# CONFIG_SCSI_GDTH is not set
762# CONFIG_SCSI_IPS is not set
763# CONFIG_SCSI_INITIO is not set
764# CONFIG_SCSI_INIA100 is not set
765# CONFIG_SCSI_MVSAS is not set
766# CONFIG_SCSI_STEX is not set
767# CONFIG_SCSI_SYM53C8XX_2 is not set
768# CONFIG_SCSI_IPR is not set
769# CONFIG_SCSI_QLOGIC_1280 is not set
770# CONFIG_SCSI_QLA_FC is not set
771# CONFIG_SCSI_QLA_ISCSI is not set
772# CONFIG_SCSI_LPFC is not set
773# CONFIG_SCSI_DC395x is not set
774# CONFIG_SCSI_DC390T is not set
775# CONFIG_SCSI_NSP32 is not set
776# CONFIG_SCSI_DEBUG is not set
777# CONFIG_SCSI_SRP is not set
778# CONFIG_SCSI_DH is not set
779CONFIG_ATA=y
780# CONFIG_ATA_NONSTANDARD is not set
781CONFIG_SATA_PMP=y
782# CONFIG_SATA_AHCI is not set
783# CONFIG_SATA_SIL24 is not set
784# CONFIG_SATA_FSL is not set
785CONFIG_ATA_SFF=y
786# CONFIG_SATA_SVW is not set
787# CONFIG_ATA_PIIX is not set
788# CONFIG_SATA_MV is not set
789# CONFIG_SATA_NV is not set
790# CONFIG_PDC_ADMA is not set
791# CONFIG_SATA_QSTOR is not set
792# CONFIG_SATA_PROMISE is not set
793# CONFIG_SATA_SX4 is not set
794CONFIG_SATA_SIL=y
795# CONFIG_SATA_SIS is not set
796# CONFIG_SATA_ULI is not set
797# CONFIG_SATA_VIA is not set
798# CONFIG_SATA_VITESSE is not set
799# CONFIG_SATA_INIC162X is not set
800# CONFIG_PATA_ALI is not set
801# CONFIG_PATA_AMD is not set
802# CONFIG_PATA_ARTOP is not set
803# CONFIG_PATA_ATIIXP is not set
804# CONFIG_PATA_CMD640_PCI is not set
805# CONFIG_PATA_CMD64X is not set
806# CONFIG_PATA_CS5520 is not set
807# CONFIG_PATA_CS5530 is not set
808# CONFIG_PATA_CYPRESS is not set
809# CONFIG_PATA_EFAR is not set
810# CONFIG_ATA_GENERIC is not set
811# CONFIG_PATA_HPT366 is not set
812# CONFIG_PATA_HPT37X is not set
813# CONFIG_PATA_HPT3X2N is not set
814# CONFIG_PATA_HPT3X3 is not set
815# CONFIG_PATA_IT821X is not set
816# CONFIG_PATA_IT8213 is not set
817# CONFIG_PATA_JMICRON is not set
818# CONFIG_PATA_TRIFLEX is not set
819# CONFIG_PATA_MARVELL is not set
820# CONFIG_PATA_MPIIX is not set
821# CONFIG_PATA_OLDPIIX is not set
822# CONFIG_PATA_NETCELL is not set
823# CONFIG_PATA_NINJA32 is not set
824# CONFIG_PATA_NS87410 is not set
825# CONFIG_PATA_NS87415 is not set
826# CONFIG_PATA_OPTI is not set
827# CONFIG_PATA_OPTIDMA is not set
828# CONFIG_PATA_PDC_OLD is not set
829# CONFIG_PATA_RADISYS is not set
830# CONFIG_PATA_RZ1000 is not set
831# CONFIG_PATA_SC1200 is not set
832# CONFIG_PATA_SERVERWORKS is not set
833# CONFIG_PATA_PDC2027X is not set
834# CONFIG_PATA_SIL680 is not set
835# CONFIG_PATA_SIS is not set
836# CONFIG_PATA_VIA is not set
837# CONFIG_PATA_WINBOND is not set
838# CONFIG_PATA_PLATFORM is not set
839# CONFIG_PATA_SCH is not set
840# CONFIG_MD is not set
841# CONFIG_FUSION is not set
842
843#
844# IEEE 1394 (FireWire) support
845#
846
847#
848# Enable only one of the two stacks, unless you know what you are doing
849#
850# CONFIG_FIREWIRE is not set
851# CONFIG_IEEE1394 is not set
852# CONFIG_I2O is not set
853# CONFIG_MACINTOSH_DRIVERS is not set
854CONFIG_NETDEVICES=y
855CONFIG_DUMMY=m
856CONFIG_BONDING=m
857# CONFIG_MACVLAN is not set
858# CONFIG_EQUALIZER is not set
859CONFIG_TUN=m
860# CONFIG_VETH is not set
861# CONFIG_ARCNET is not set
862CONFIG_PHYLIB=y
863
864#
865# MII PHY device drivers
866#
867# CONFIG_MARVELL_PHY is not set
868# CONFIG_DAVICOM_PHY is not set
869# CONFIG_QSEMI_PHY is not set
870# CONFIG_LXT_PHY is not set
871# CONFIG_CICADA_PHY is not set
872# CONFIG_VITESSE_PHY is not set
873# CONFIG_SMSC_PHY is not set
874# CONFIG_BROADCOM_PHY is not set
875# CONFIG_ICPLUS_PHY is not set
876# CONFIG_REALTEK_PHY is not set
877# CONFIG_NATIONAL_PHY is not set
878# CONFIG_STE10XP is not set
879# CONFIG_LSI_ET1011C_PHY is not set
880# CONFIG_FIXED_PHY is not set
881# CONFIG_MDIO_BITBANG is not set
882CONFIG_NET_ETHERNET=y
883CONFIG_MII=y
884# CONFIG_HAPPYMEAL is not set
885# CONFIG_SUNGEM is not set
886# CONFIG_CASSINI is not set
887# CONFIG_NET_VENDOR_3COM is not set
888# CONFIG_NET_TULIP is not set
889# CONFIG_HP100 is not set
890# CONFIG_IBM_NEW_EMAC_ZMII is not set
891# CONFIG_IBM_NEW_EMAC_RGMII is not set
892# CONFIG_IBM_NEW_EMAC_TAH is not set
893# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
894# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
895# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
896# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
897# CONFIG_NET_PCI is not set
898# CONFIG_B44 is not set
899# CONFIG_ATL2 is not set
900CONFIG_NETDEV_1000=y
901# CONFIG_ACENIC is not set
902# CONFIG_DL2K is not set
903# CONFIG_E1000 is not set
904# CONFIG_E1000E is not set
905# CONFIG_IP1000 is not set
906# CONFIG_IGB is not set
907# CONFIG_NS83820 is not set
908# CONFIG_HAMACHI is not set
909# CONFIG_YELLOWFIN is not set
910# CONFIG_R8169 is not set
911# CONFIG_SIS190 is not set
912# CONFIG_SKGE is not set
913# CONFIG_SKY2 is not set
914# CONFIG_VIA_VELOCITY is not set
915# CONFIG_TIGON3 is not set
916# CONFIG_BNX2 is not set
917CONFIG_GIANFAR=y
918# CONFIG_MV643XX_ETH is not set
919# CONFIG_QLA3XXX is not set
920# CONFIG_ATL1 is not set
921# CONFIG_ATL1E is not set
922# CONFIG_ATL1C is not set
923# CONFIG_JME is not set
924# CONFIG_NETDEV_10000 is not set
925# CONFIG_TR is not set
926
927#
928# Wireless LAN
929#
930# CONFIG_WLAN_PRE80211 is not set
931# CONFIG_WLAN_80211 is not set
932# CONFIG_IWLWIFI_LEDS is not set
933
934#
935# Enable WiMAX (Networking options) to see the WiMAX drivers
936#
937
938#
939# USB Network Adapters
940#
941# CONFIG_USB_CATC is not set
942# CONFIG_USB_KAWETH is not set
943# CONFIG_USB_PEGASUS is not set
944# CONFIG_USB_RTL8150 is not set
945# CONFIG_USB_USBNET is not set
946# CONFIG_WAN is not set
947CONFIG_ATM_DRIVERS=y
948# CONFIG_ATM_DUMMY is not set
949# CONFIG_ATM_TCP is not set
950# CONFIG_ATM_LANAI is not set
951# CONFIG_ATM_ENI is not set
952# CONFIG_ATM_FIRESTREAM is not set
953# CONFIG_ATM_ZATM is not set
954# CONFIG_ATM_NICSTAR is not set
955# CONFIG_ATM_IDT77252 is not set
956# CONFIG_ATM_AMBASSADOR is not set
957# CONFIG_ATM_HORIZON is not set
958# CONFIG_ATM_IA is not set
959# CONFIG_ATM_FORE200E is not set
960# CONFIG_ATM_HE is not set
961# CONFIG_ATM_SOLOS is not set
962# CONFIG_FDDI is not set
963# CONFIG_HIPPI is not set
964CONFIG_PPP=m
965CONFIG_PPP_MULTILINK=y
966CONFIG_PPP_FILTER=y
967CONFIG_PPP_ASYNC=m
968CONFIG_PPP_SYNC_TTY=m
969CONFIG_PPP_DEFLATE=m
970CONFIG_PPP_BSDCOMP=m
971# CONFIG_PPP_MPPE is not set
972CONFIG_PPPOE=m
973CONFIG_PPPOATM=m
974# CONFIG_PPPOL2TP is not set
975CONFIG_SLIP=m
976CONFIG_SLIP_COMPRESSED=y
977CONFIG_SLHC=m
978CONFIG_SLIP_SMART=y
979CONFIG_SLIP_MODE_SLIP6=y
980# CONFIG_NET_FC is not set
981CONFIG_NETCONSOLE=y
982# CONFIG_NETCONSOLE_DYNAMIC is not set
983CONFIG_NETPOLL=y
984CONFIG_NETPOLL_TRAP=y
985CONFIG_NET_POLL_CONTROLLER=y
986# CONFIG_ISDN is not set
987# CONFIG_PHONE is not set
988
989#
990# Input device support
991#
992CONFIG_INPUT=y
993CONFIG_INPUT_FF_MEMLESS=m
994# CONFIG_INPUT_POLLDEV is not set
995
996#
997# Userland interfaces
998#
999CONFIG_INPUT_MOUSEDEV=y
1000CONFIG_INPUT_MOUSEDEV_PSAUX=y
1001CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
1002CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
1003# CONFIG_INPUT_JOYDEV is not set
1004# CONFIG_INPUT_EVDEV is not set
1005# CONFIG_INPUT_EVBUG is not set
1006
1007#
1008# Input Device Drivers
1009#
1010# CONFIG_INPUT_KEYBOARD is not set
1011# CONFIG_INPUT_MOUSE is not set
1012# CONFIG_INPUT_JOYSTICK is not set
1013# CONFIG_INPUT_TABLET is not set
1014# CONFIG_INPUT_TOUCHSCREEN is not set
1015# CONFIG_INPUT_MISC is not set
1016
1017#
1018# Hardware I/O ports
1019#
1020# CONFIG_SERIO is not set
1021# CONFIG_GAMEPORT is not set
1022
1023#
1024# Character devices
1025#
1026CONFIG_VT=y
1027CONFIG_CONSOLE_TRANSLATIONS=y
1028CONFIG_VT_CONSOLE=y
1029CONFIG_HW_CONSOLE=y
1030# CONFIG_VT_HW_CONSOLE_BINDING is not set
1031CONFIG_DEVKMEM=y
1032# CONFIG_SERIAL_NONSTANDARD is not set
1033# CONFIG_NOZOMI is not set
1034
1035#
1036# Serial drivers
1037#
1038CONFIG_SERIAL_8250=y
1039CONFIG_SERIAL_8250_CONSOLE=y
1040# CONFIG_SERIAL_8250_PCI is not set
1041CONFIG_SERIAL_8250_NR_UARTS=2
1042CONFIG_SERIAL_8250_RUNTIME_UARTS=2
1043# CONFIG_SERIAL_8250_EXTENDED is not set
1044
1045#
1046# Non-8250 serial port support
1047#
1048# CONFIG_SERIAL_UARTLITE is not set
1049CONFIG_SERIAL_CORE=y
1050CONFIG_SERIAL_CORE_CONSOLE=y
1051# CONFIG_SERIAL_JSM is not set
1052# CONFIG_SERIAL_OF_PLATFORM is not set
1053CONFIG_UNIX98_PTYS=y
1054# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
1055# CONFIG_LEGACY_PTYS is not set
1056# CONFIG_HVC_UDBG is not set
1057# CONFIG_IPMI_HANDLER is not set
1058CONFIG_HW_RANDOM=y
1059CONFIG_NVRAM=y
1060# CONFIG_R3964 is not set
1061# CONFIG_APPLICOM is not set
1062# CONFIG_RAW_DRIVER is not set
1063# CONFIG_TCG_TPM is not set
1064CONFIG_DEVPORT=y
1065CONFIG_I2C=y
1066CONFIG_I2C_BOARDINFO=y
1067CONFIG_I2C_CHARDEV=y
1068CONFIG_I2C_HELPER_AUTO=y
1069
1070#
1071# I2C Hardware Bus support
1072#
1073
1074#
1075# PC SMBus host controller drivers
1076#
1077# CONFIG_I2C_ALI1535 is not set
1078# CONFIG_I2C_ALI1563 is not set
1079# CONFIG_I2C_ALI15X3 is not set
1080# CONFIG_I2C_AMD756 is not set
1081# CONFIG_I2C_AMD8111 is not set
1082# CONFIG_I2C_I801 is not set
1083# CONFIG_I2C_ISCH is not set
1084# CONFIG_I2C_PIIX4 is not set
1085# CONFIG_I2C_NFORCE2 is not set
1086# CONFIG_I2C_SIS5595 is not set
1087# CONFIG_I2C_SIS630 is not set
1088# CONFIG_I2C_SIS96X is not set
1089# CONFIG_I2C_VIA is not set
1090# CONFIG_I2C_VIAPRO is not set
1091
1092#
1093# I2C system bus drivers (mostly embedded / system-on-chip)
1094#
1095# CONFIG_I2C_GPIO is not set
1096CONFIG_I2C_MPC=y
1097# CONFIG_I2C_OCORES is not set
1098# CONFIG_I2C_SIMTEC is not set
1099
1100#
1101# External I2C/SMBus adapter drivers
1102#
1103# CONFIG_I2C_PARPORT_LIGHT is not set
1104# CONFIG_I2C_TAOS_EVM is not set
1105# CONFIG_I2C_TINY_USB is not set
1106
1107#
1108# Graphics adapter I2C/DDC channel drivers
1109#
1110# CONFIG_I2C_VOODOO3 is not set
1111
1112#
1113# Other I2C/SMBus bus drivers
1114#
1115# CONFIG_I2C_PCA_PLATFORM is not set
1116# CONFIG_I2C_STUB is not set
1117
1118#
1119# Miscellaneous I2C Chip support
1120#
1121CONFIG_DS1682=y
1122# CONFIG_SENSORS_PCF8574 is not set
1123# CONFIG_PCF8575 is not set
1124# CONFIG_SENSORS_PCA9539 is not set
1125# CONFIG_SENSORS_PCF8591 is not set
1126# CONFIG_SENSORS_MAX6875 is not set
1127# CONFIG_SENSORS_TSL2550 is not set
1128# CONFIG_I2C_DEBUG_CORE is not set
1129# CONFIG_I2C_DEBUG_ALGO is not set
1130# CONFIG_I2C_DEBUG_BUS is not set
1131# CONFIG_I2C_DEBUG_CHIP is not set
1132# CONFIG_SPI is not set
1133CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
1134CONFIG_ARCH_REQUIRE_GPIOLIB=y
1135CONFIG_GPIOLIB=y
1136# CONFIG_DEBUG_GPIO is not set
1137# CONFIG_GPIO_SYSFS is not set
1138
1139#
1140# Memory mapped GPIO expanders:
1141#
1142# CONFIG_GPIO_XILINX is not set
1143
1144#
1145# I2C GPIO expanders:
1146#
1147# CONFIG_GPIO_MAX732X is not set
1148# CONFIG_GPIO_PCA953X is not set
1149# CONFIG_GPIO_PCF857X is not set
1150
1151#
1152# PCI GPIO expanders:
1153#
1154# CONFIG_GPIO_BT8XX is not set
1155
1156#
1157# SPI GPIO expanders:
1158#
1159# CONFIG_W1 is not set
1160# CONFIG_POWER_SUPPLY is not set
1161CONFIG_HWMON=y
1162# CONFIG_HWMON_VID is not set
1163# CONFIG_SENSORS_AD7414 is not set
1164# CONFIG_SENSORS_AD7418 is not set
1165# CONFIG_SENSORS_ADM1021 is not set
1166# CONFIG_SENSORS_ADM1025 is not set
1167# CONFIG_SENSORS_ADM1026 is not set
1168# CONFIG_SENSORS_ADM1029 is not set
1169# CONFIG_SENSORS_ADM1031 is not set
1170# CONFIG_SENSORS_ADM9240 is not set
1171# CONFIG_SENSORS_ADT7462 is not set
1172# CONFIG_SENSORS_ADT7470 is not set
1173# CONFIG_SENSORS_ADT7473 is not set
1174# CONFIG_SENSORS_ADT7475 is not set
1175# CONFIG_SENSORS_ATXP1 is not set
1176# CONFIG_SENSORS_DS1621 is not set
1177# CONFIG_SENSORS_I5K_AMB is not set
1178# CONFIG_SENSORS_F71805F is not set
1179# CONFIG_SENSORS_F71882FG is not set
1180# CONFIG_SENSORS_F75375S is not set
1181# CONFIG_SENSORS_GL518SM is not set
1182# CONFIG_SENSORS_GL520SM is not set
1183# CONFIG_SENSORS_IT87 is not set
1184# CONFIG_SENSORS_LM63 is not set
1185# CONFIG_SENSORS_LM75 is not set
1186# CONFIG_SENSORS_LM77 is not set
1187# CONFIG_SENSORS_LM78 is not set
1188# CONFIG_SENSORS_LM80 is not set
1189# CONFIG_SENSORS_LM83 is not set
1190# CONFIG_SENSORS_LM85 is not set
1191# CONFIG_SENSORS_LM87 is not set
1192CONFIG_SENSORS_LM90=y
1193CONFIG_SENSORS_LM92=y
1194# CONFIG_SENSORS_LM93 is not set
1195# CONFIG_SENSORS_LTC4245 is not set
1196# CONFIG_SENSORS_MAX1619 is not set
1197# CONFIG_SENSORS_MAX6650 is not set
1198# CONFIG_SENSORS_PC87360 is not set
1199# CONFIG_SENSORS_PC87427 is not set
1200# CONFIG_SENSORS_SIS5595 is not set
1201# CONFIG_SENSORS_DME1737 is not set
1202# CONFIG_SENSORS_SMSC47M1 is not set
1203# CONFIG_SENSORS_SMSC47M192 is not set
1204# CONFIG_SENSORS_SMSC47B397 is not set
1205# CONFIG_SENSORS_ADS7828 is not set
1206# CONFIG_SENSORS_THMC50 is not set
1207# CONFIG_SENSORS_VIA686A is not set
1208# CONFIG_SENSORS_VT1211 is not set
1209# CONFIG_SENSORS_VT8231 is not set
1210# CONFIG_SENSORS_W83781D is not set
1211# CONFIG_SENSORS_W83791D is not set
1212# CONFIG_SENSORS_W83792D is not set
1213# CONFIG_SENSORS_W83793 is not set
1214# CONFIG_SENSORS_W83L785TS is not set
1215# CONFIG_SENSORS_W83L786NG is not set
1216# CONFIG_SENSORS_W83627HF is not set
1217# CONFIG_SENSORS_W83627EHF is not set
1218# CONFIG_HWMON_DEBUG_CHIP is not set
1219# CONFIG_THERMAL is not set
1220# CONFIG_THERMAL_HWMON is not set
1221CONFIG_WATCHDOG=y
1222# CONFIG_WATCHDOG_NOWAYOUT is not set
1223
1224#
1225# Watchdog Device Drivers
1226#
1227# CONFIG_SOFT_WATCHDOG is not set
1228# CONFIG_ALIM7101_WDT is not set
1229CONFIG_GEF_WDT=y
1230# CONFIG_8xxx_WDT is not set
1231
1232#
1233# PCI-based Watchdog Cards
1234#
1235# CONFIG_PCIPCWATCHDOG is not set
1236# CONFIG_WDTPCI is not set
1237
1238#
1239# USB-based Watchdog Cards
1240#
1241# CONFIG_USBPCWATCHDOG is not set
1242CONFIG_SSB_POSSIBLE=y
1243
1244#
1245# Sonics Silicon Backplane
1246#
1247# CONFIG_SSB is not set
1248
1249#
1250# Multifunction device drivers
1251#
1252# CONFIG_MFD_CORE is not set
1253# CONFIG_MFD_SM501 is not set
1254# CONFIG_HTC_PASIC3 is not set
1255# CONFIG_TPS65010 is not set
1256# CONFIG_TWL4030_CORE is not set
1257# CONFIG_MFD_TMIO is not set
1258# CONFIG_PMIC_DA903X is not set
1259# CONFIG_MFD_WM8400 is not set
1260# CONFIG_MFD_WM8350_I2C is not set
1261# CONFIG_MFD_PCF50633 is not set
1262# CONFIG_REGULATOR is not set
1263
1264#
1265# Multimedia devices
1266#
1267
1268#
1269# Multimedia core support
1270#
1271# CONFIG_VIDEO_DEV is not set
1272# CONFIG_DVB_CORE is not set
1273# CONFIG_VIDEO_MEDIA is not set
1274
1275#
1276# Multimedia drivers
1277#
1278CONFIG_DAB=y
1279# CONFIG_USB_DABUSB is not set
1280
1281#
1282# Graphics support
1283#
1284# CONFIG_AGP is not set
1285# CONFIG_DRM is not set
1286# CONFIG_VGASTATE is not set
1287CONFIG_VIDEO_OUTPUT_CONTROL=m
1288# CONFIG_FB is not set
1289# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
1290
1291#
1292# Display device support
1293#
1294# CONFIG_DISPLAY_SUPPORT is not set
1295
1296#
1297# Console display driver support
1298#
1299CONFIG_VGA_CONSOLE=y
1300# CONFIG_VGACON_SOFT_SCROLLBACK is not set
1301CONFIG_DUMMY_CONSOLE=y
1302# CONFIG_SOUND is not set
1303CONFIG_HID_SUPPORT=y
1304CONFIG_HID=y
1305# CONFIG_HID_DEBUG is not set
1306# CONFIG_HIDRAW is not set
1307
1308#
1309# USB Input Devices
1310#
1311CONFIG_USB_HID=y
1312# CONFIG_HID_PID is not set
1313# CONFIG_USB_HIDDEV is not set
1314
1315#
1316# Special HID drivers
1317#
1318CONFIG_HID_COMPAT=y
1319CONFIG_HID_A4TECH=y
1320CONFIG_HID_APPLE=y
1321CONFIG_HID_BELKIN=y
1322CONFIG_HID_CHERRY=y
1323CONFIG_HID_CHICONY=y
1324CONFIG_HID_CYPRESS=y
1325CONFIG_HID_EZKEY=y
1326CONFIG_HID_GYRATION=y
1327CONFIG_HID_LOGITECH=y
1328# CONFIG_LOGITECH_FF is not set
1329# CONFIG_LOGIRUMBLEPAD2_FF is not set
1330CONFIG_HID_MICROSOFT=y
1331CONFIG_HID_MONTEREY=y
1332# CONFIG_HID_NTRIG is not set
1333CONFIG_HID_PANTHERLORD=y
1334# CONFIG_PANTHERLORD_FF is not set
1335CONFIG_HID_PETALYNX=y
1336CONFIG_HID_SAMSUNG=y
1337CONFIG_HID_SONY=y
1338CONFIG_HID_SUNPLUS=y
1339# CONFIG_GREENASIA_FF is not set
1340# CONFIG_HID_TOPSEED is not set
1341CONFIG_THRUSTMASTER_FF=m
1342CONFIG_ZEROPLUS_FF=m
1343CONFIG_USB_SUPPORT=y
1344CONFIG_USB_ARCH_HAS_HCD=y
1345CONFIG_USB_ARCH_HAS_OHCI=y
1346CONFIG_USB_ARCH_HAS_EHCI=y
1347CONFIG_USB=y
1348# CONFIG_USB_DEBUG is not set
1349# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
1350
1351#
1352# Miscellaneous USB options
1353#
1354# CONFIG_USB_DEVICEFS is not set
1355# CONFIG_USB_DEVICE_CLASS is not set
1356# CONFIG_USB_DYNAMIC_MINORS is not set
1357# CONFIG_USB_OTG is not set
1358# CONFIG_USB_OTG_WHITELIST is not set
1359# CONFIG_USB_OTG_BLACKLIST_HUB is not set
1360# CONFIG_USB_MON is not set
1361# CONFIG_USB_WUSB is not set
1362# CONFIG_USB_WUSB_CBAF is not set
1363
1364#
1365# USB Host Controller Drivers
1366#
1367# CONFIG_USB_C67X00_HCD is not set
1368CONFIG_USB_EHCI_HCD=y
1369# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
1370# CONFIG_USB_EHCI_TT_NEWSCHED is not set
1371# CONFIG_USB_EHCI_FSL is not set
1372# CONFIG_USB_EHCI_HCD_PPC_OF is not set
1373# CONFIG_USB_OXU210HP_HCD is not set
1374# CONFIG_USB_ISP116X_HCD is not set
1375# CONFIG_USB_ISP1760_HCD is not set
1376CONFIG_USB_OHCI_HCD=y
1377# CONFIG_USB_OHCI_HCD_PPC_OF is not set
1378# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
1379# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
1380CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1381# CONFIG_USB_UHCI_HCD is not set
1382# CONFIG_USB_SL811_HCD is not set
1383# CONFIG_USB_R8A66597_HCD is not set
1384# CONFIG_USB_WHCI_HCD is not set
1385# CONFIG_USB_HWA_HCD is not set
1386
1387#
1388# USB Device Class drivers
1389#
1390# CONFIG_USB_ACM is not set
1391# CONFIG_USB_PRINTER is not set
1392# CONFIG_USB_WDM is not set
1393# CONFIG_USB_TMC is not set
1394
1395#
1396# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
1397#
1398
1399#
1400# see USB_STORAGE Help for more information
1401#
1402CONFIG_USB_STORAGE=y
1403# CONFIG_USB_STORAGE_DEBUG is not set
1404# CONFIG_USB_STORAGE_DATAFAB is not set
1405# CONFIG_USB_STORAGE_FREECOM is not set
1406# CONFIG_USB_STORAGE_ISD200 is not set
1407# CONFIG_USB_STORAGE_USBAT is not set
1408# CONFIG_USB_STORAGE_SDDR09 is not set
1409# CONFIG_USB_STORAGE_SDDR55 is not set
1410# CONFIG_USB_STORAGE_JUMPSHOT is not set
1411# CONFIG_USB_STORAGE_ALAUDA is not set
1412# CONFIG_USB_STORAGE_ONETOUCH is not set
1413# CONFIG_USB_STORAGE_KARMA is not set
1414# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1415# CONFIG_USB_LIBUSUAL is not set
1416
1417#
1418# USB Imaging devices
1419#
1420# CONFIG_USB_MDC800 is not set
1421# CONFIG_USB_MICROTEK is not set
1422
1423#
1424# USB port drivers
1425#
1426# CONFIG_USB_SERIAL is not set
1427
1428#
1429# USB Miscellaneous drivers
1430#
1431# CONFIG_USB_EMI62 is not set
1432# CONFIG_USB_EMI26 is not set
1433# CONFIG_USB_ADUTUX is not set
1434# CONFIG_USB_SEVSEG is not set
1435# CONFIG_USB_RIO500 is not set
1436# CONFIG_USB_LEGOTOWER is not set
1437# CONFIG_USB_LCD is not set
1438# CONFIG_USB_BERRY_CHARGE is not set
1439# CONFIG_USB_LED is not set
1440# CONFIG_USB_CYPRESS_CY7C63 is not set
1441# CONFIG_USB_CYTHERM is not set
1442# CONFIG_USB_PHIDGET is not set
1443# CONFIG_USB_IDMOUSE is not set
1444# CONFIG_USB_FTDI_ELAN is not set
1445# CONFIG_USB_APPLEDISPLAY is not set
1446# CONFIG_USB_SISUSBVGA is not set
1447# CONFIG_USB_LD is not set
1448# CONFIG_USB_TRANCEVIBRATOR is not set
1449# CONFIG_USB_IOWARRIOR is not set
1450# CONFIG_USB_ISIGHTFW is not set
1451# CONFIG_USB_VST is not set
1452# CONFIG_USB_ATM is not set
1453# CONFIG_USB_GADGET is not set
1454
1455#
1456# OTG and related infrastructure
1457#
1458# CONFIG_USB_GPIO_VBUS is not set
1459# CONFIG_UWB is not set
1460# CONFIG_MMC is not set
1461# CONFIG_MEMSTICK is not set
1462# CONFIG_NEW_LEDS is not set
1463# CONFIG_ACCESSIBILITY is not set
1464# CONFIG_INFINIBAND is not set
1465# CONFIG_EDAC is not set
1466CONFIG_RTC_LIB=y
1467CONFIG_RTC_CLASS=y
1468CONFIG_RTC_HCTOSYS=y
1469CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1470# CONFIG_RTC_DEBUG is not set
1471
1472#
1473# RTC interfaces
1474#
1475CONFIG_RTC_INTF_SYSFS=y
1476# CONFIG_RTC_INTF_PROC is not set
1477CONFIG_RTC_INTF_DEV=y
1478# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1479# CONFIG_RTC_DRV_TEST is not set
1480
1481#
1482# I2C RTC drivers
1483#
1484# CONFIG_RTC_DRV_DS1307 is not set
1485# CONFIG_RTC_DRV_DS1374 is not set
1486# CONFIG_RTC_DRV_DS1672 is not set
1487# CONFIG_RTC_DRV_MAX6900 is not set
1488# CONFIG_RTC_DRV_RS5C372 is not set
1489# CONFIG_RTC_DRV_ISL1208 is not set
1490# CONFIG_RTC_DRV_X1205 is not set
1491# CONFIG_RTC_DRV_PCF8563 is not set
1492# CONFIG_RTC_DRV_PCF8583 is not set
1493# CONFIG_RTC_DRV_M41T80 is not set
1494# CONFIG_RTC_DRV_S35390A is not set
1495# CONFIG_RTC_DRV_FM3130 is not set
1496CONFIG_RTC_DRV_RX8581=y
1497
1498#
1499# SPI RTC drivers
1500#
1501
1502#
1503# Platform RTC drivers
1504#
1505# CONFIG_RTC_DRV_CMOS is not set
1506# CONFIG_RTC_DRV_DS1286 is not set
1507# CONFIG_RTC_DRV_DS1511 is not set
1508# CONFIG_RTC_DRV_DS1553 is not set
1509# CONFIG_RTC_DRV_DS1742 is not set
1510# CONFIG_RTC_DRV_STK17TA8 is not set
1511# CONFIG_RTC_DRV_M48T86 is not set
1512# CONFIG_RTC_DRV_M48T35 is not set
1513# CONFIG_RTC_DRV_M48T59 is not set
1514# CONFIG_RTC_DRV_BQ4802 is not set
1515# CONFIG_RTC_DRV_V3020 is not set
1516
1517#
1518# on-CPU RTC drivers
1519#
1520# CONFIG_RTC_DRV_PPC is not set
1521# CONFIG_DMADEVICES is not set
1522# CONFIG_UIO is not set
1523# CONFIG_STAGING is not set
1524
1525#
1526# File systems
1527#
1528CONFIG_EXT2_FS=y
1529CONFIG_EXT2_FS_XATTR=y
1530CONFIG_EXT2_FS_POSIX_ACL=y
1531# CONFIG_EXT2_FS_SECURITY is not set
1532# CONFIG_EXT2_FS_XIP is not set
1533CONFIG_EXT3_FS=y
1534CONFIG_EXT3_FS_XATTR=y
1535CONFIG_EXT3_FS_POSIX_ACL=y
1536# CONFIG_EXT3_FS_SECURITY is not set
1537# CONFIG_EXT4_FS is not set
1538CONFIG_JBD=y
1539CONFIG_FS_MBCACHE=y
1540# CONFIG_REISERFS_FS is not set
1541# CONFIG_JFS_FS is not set
1542CONFIG_FS_POSIX_ACL=y
1543CONFIG_FILE_LOCKING=y
1544# CONFIG_XFS_FS is not set
1545# CONFIG_OCFS2_FS is not set
1546# CONFIG_BTRFS_FS is not set
1547CONFIG_DNOTIFY=y
1548CONFIG_INOTIFY=y
1549CONFIG_INOTIFY_USER=y
1550# CONFIG_QUOTA is not set
1551# CONFIG_AUTOFS_FS is not set
1552# CONFIG_AUTOFS4_FS is not set
1553# CONFIG_FUSE_FS is not set
1554
1555#
1556# CD-ROM/DVD Filesystems
1557#
1558# CONFIG_ISO9660_FS is not set
1559# CONFIG_UDF_FS is not set
1560
1561#
1562# DOS/FAT/NT Filesystems
1563#
1564CONFIG_FAT_FS=y
1565CONFIG_MSDOS_FS=y
1566CONFIG_VFAT_FS=y
1567CONFIG_FAT_DEFAULT_CODEPAGE=437
1568CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1569# CONFIG_NTFS_FS is not set
1570
1571#
1572# Pseudo filesystems
1573#
1574CONFIG_PROC_FS=y
1575CONFIG_PROC_KCORE=y
1576CONFIG_PROC_SYSCTL=y
1577CONFIG_PROC_PAGE_MONITOR=y
1578CONFIG_SYSFS=y
1579CONFIG_TMPFS=y
1580# CONFIG_TMPFS_POSIX_ACL is not set
1581# CONFIG_HUGETLB_PAGE is not set
1582# CONFIG_CONFIGFS_FS is not set
1583CONFIG_MISC_FILESYSTEMS=y
1584# CONFIG_ADFS_FS is not set
1585# CONFIG_AFFS_FS is not set
1586# CONFIG_HFS_FS is not set
1587# CONFIG_HFSPLUS_FS is not set
1588# CONFIG_BEFS_FS is not set
1589# CONFIG_BFS_FS is not set
1590# CONFIG_EFS_FS is not set
1591CONFIG_JFFS2_FS=y
1592CONFIG_JFFS2_FS_DEBUG=0
1593CONFIG_JFFS2_FS_WRITEBUFFER=y
1594# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1595# CONFIG_JFFS2_SUMMARY is not set
1596# CONFIG_JFFS2_FS_XATTR is not set
1597# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1598CONFIG_JFFS2_ZLIB=y
1599# CONFIG_JFFS2_LZO is not set
1600CONFIG_JFFS2_RTIME=y
1601# CONFIG_JFFS2_RUBIN is not set
1602# CONFIG_CRAMFS is not set
1603# CONFIG_SQUASHFS is not set
1604# CONFIG_VXFS_FS is not set
1605# CONFIG_MINIX_FS is not set
1606# CONFIG_OMFS_FS is not set
1607# CONFIG_HPFS_FS is not set
1608# CONFIG_QNX4FS_FS is not set
1609# CONFIG_ROMFS_FS is not set
1610# CONFIG_SYSV_FS is not set
1611# CONFIG_UFS_FS is not set
1612CONFIG_NETWORK_FILESYSTEMS=y
1613CONFIG_NFS_FS=y
1614CONFIG_NFS_V3=y
1615# CONFIG_NFS_V3_ACL is not set
1616CONFIG_NFS_V4=y
1617CONFIG_ROOT_NFS=y
1618# CONFIG_NFSD is not set
1619CONFIG_LOCKD=y
1620CONFIG_LOCKD_V4=y
1621CONFIG_NFS_COMMON=y
1622CONFIG_SUNRPC=y
1623CONFIG_SUNRPC_GSS=y
1624# CONFIG_SUNRPC_REGISTER_V4 is not set
1625CONFIG_RPCSEC_GSS_KRB5=y
1626# CONFIG_RPCSEC_GSS_SPKM3 is not set
1627# CONFIG_SMB_FS is not set
1628CONFIG_CIFS=m
1629# CONFIG_CIFS_STATS is not set
1630# CONFIG_CIFS_WEAK_PW_HASH is not set
1631CONFIG_CIFS_XATTR=y
1632CONFIG_CIFS_POSIX=y
1633# CONFIG_CIFS_DEBUG2 is not set
1634# CONFIG_CIFS_EXPERIMENTAL is not set
1635# CONFIG_NCP_FS is not set
1636# CONFIG_CODA_FS is not set
1637# CONFIG_AFS_FS is not set
1638
1639#
1640# Partition Types
1641#
1642# CONFIG_PARTITION_ADVANCED is not set
1643CONFIG_MSDOS_PARTITION=y
1644CONFIG_NLS=y
1645CONFIG_NLS_DEFAULT="iso8859-1"
1646CONFIG_NLS_CODEPAGE_437=m
1647CONFIG_NLS_CODEPAGE_737=m
1648CONFIG_NLS_CODEPAGE_775=m
1649CONFIG_NLS_CODEPAGE_850=m
1650CONFIG_NLS_CODEPAGE_852=m
1651CONFIG_NLS_CODEPAGE_855=m
1652CONFIG_NLS_CODEPAGE_857=m
1653CONFIG_NLS_CODEPAGE_860=m
1654CONFIG_NLS_CODEPAGE_861=m
1655CONFIG_NLS_CODEPAGE_862=m
1656CONFIG_NLS_CODEPAGE_863=m
1657CONFIG_NLS_CODEPAGE_864=m
1658CONFIG_NLS_CODEPAGE_865=m
1659CONFIG_NLS_CODEPAGE_866=m
1660CONFIG_NLS_CODEPAGE_869=m
1661CONFIG_NLS_CODEPAGE_936=m
1662CONFIG_NLS_CODEPAGE_950=m
1663CONFIG_NLS_CODEPAGE_932=m
1664CONFIG_NLS_CODEPAGE_949=m
1665CONFIG_NLS_CODEPAGE_874=m
1666CONFIG_NLS_ISO8859_8=m
1667CONFIG_NLS_CODEPAGE_1250=m
1668CONFIG_NLS_CODEPAGE_1251=m
1669CONFIG_NLS_ASCII=m
1670CONFIG_NLS_ISO8859_1=m
1671CONFIG_NLS_ISO8859_2=m
1672CONFIG_NLS_ISO8859_3=m
1673CONFIG_NLS_ISO8859_4=m
1674CONFIG_NLS_ISO8859_5=m
1675CONFIG_NLS_ISO8859_6=m
1676CONFIG_NLS_ISO8859_7=m
1677CONFIG_NLS_ISO8859_9=m
1678CONFIG_NLS_ISO8859_13=m
1679CONFIG_NLS_ISO8859_14=m
1680CONFIG_NLS_ISO8859_15=m
1681CONFIG_NLS_KOI8_R=m
1682CONFIG_NLS_KOI8_U=m
1683CONFIG_NLS_UTF8=m
1684# CONFIG_DLM is not set
1685
1686#
1687# Library routines
1688#
1689CONFIG_BITREVERSE=y
1690CONFIG_GENERIC_FIND_LAST_BIT=y
1691CONFIG_CRC_CCITT=m
1692# CONFIG_CRC16 is not set
1693# CONFIG_CRC_T10DIF is not set
1694# CONFIG_CRC_ITU_T is not set
1695CONFIG_CRC32=y
1696# CONFIG_CRC7 is not set
1697CONFIG_LIBCRC32C=m
1698CONFIG_ZLIB_INFLATE=y
1699CONFIG_ZLIB_DEFLATE=y
1700CONFIG_PLIST=y
1701CONFIG_HAS_IOMEM=y
1702CONFIG_HAS_IOPORT=y
1703CONFIG_HAS_DMA=y
1704CONFIG_HAVE_LMB=y
1705
1706#
1707# Kernel hacking
1708#
1709# CONFIG_PRINTK_TIME is not set
1710CONFIG_ENABLE_WARN_DEPRECATED=y
1711CONFIG_ENABLE_MUST_CHECK=y
1712CONFIG_FRAME_WARN=1024
1713CONFIG_MAGIC_SYSRQ=y
1714# CONFIG_UNUSED_SYMBOLS is not set
1715# CONFIG_DEBUG_FS is not set
1716# CONFIG_HEADERS_CHECK is not set
1717CONFIG_DEBUG_KERNEL=y
1718# CONFIG_DEBUG_SHIRQ is not set
1719CONFIG_DETECT_SOFTLOCKUP=y
1720# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1721CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1722CONFIG_SCHED_DEBUG=y
1723# CONFIG_SCHEDSTATS is not set
1724# CONFIG_TIMER_STATS is not set
1725# CONFIG_DEBUG_OBJECTS is not set
1726# CONFIG_DEBUG_SLAB is not set
1727# CONFIG_DEBUG_RT_MUTEXES is not set
1728# CONFIG_RT_MUTEX_TESTER is not set
1729# CONFIG_DEBUG_SPINLOCK is not set
1730# CONFIG_DEBUG_MUTEXES is not set
1731# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1732# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1733# CONFIG_DEBUG_KOBJECT is not set
1734# CONFIG_DEBUG_BUGVERBOSE is not set
1735CONFIG_DEBUG_INFO=y
1736# CONFIG_DEBUG_VM is not set
1737# CONFIG_DEBUG_WRITECOUNT is not set
1738# CONFIG_DEBUG_MEMORY_INIT is not set
1739# CONFIG_DEBUG_LIST is not set
1740# CONFIG_DEBUG_SG is not set
1741# CONFIG_DEBUG_NOTIFIERS is not set
1742# CONFIG_BOOT_PRINTK_DELAY is not set
1743# CONFIG_RCU_TORTURE_TEST is not set
1744# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1745# CONFIG_BACKTRACE_SELF_TEST is not set
1746# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1747# CONFIG_FAULT_INJECTION is not set
1748# CONFIG_LATENCYTOP is not set
1749CONFIG_SYSCTL_SYSCALL_CHECK=y
1750CONFIG_HAVE_FUNCTION_TRACER=y
1751CONFIG_HAVE_DYNAMIC_FTRACE=y
1752CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1753
1754#
1755# Tracers
1756#
1757# CONFIG_FUNCTION_TRACER is not set
1758# CONFIG_PREEMPT_TRACER is not set
1759# CONFIG_SCHED_TRACER is not set
1760# CONFIG_CONTEXT_SWITCH_TRACER is not set
1761# CONFIG_BOOT_TRACER is not set
1762# CONFIG_TRACE_BRANCH_PROFILING is not set
1763# CONFIG_STACK_TRACER is not set
1764# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1765# CONFIG_SAMPLES is not set
1766CONFIG_HAVE_ARCH_KGDB=y
1767# CONFIG_KGDB is not set
1768CONFIG_PRINT_STACK_DEPTH=64
1769# CONFIG_DEBUG_STACKOVERFLOW is not set
1770# CONFIG_DEBUG_STACK_USAGE is not set
1771# CONFIG_DEBUG_PAGEALLOC is not set
1772# CONFIG_CODE_PATCHING_SELFTEST is not set
1773# CONFIG_FTR_FIXUP_SELFTEST is not set
1774# CONFIG_MSI_BITMAP_SELFTEST is not set
1775# CONFIG_XMON is not set
1776# CONFIG_IRQSTACKS is not set
1777# CONFIG_BDI_SWITCH is not set
1778# CONFIG_BOOTX_TEXT is not set
1779# CONFIG_PPC_EARLY_DEBUG is not set
1780
1781#
1782# Security options
1783#
1784# CONFIG_KEYS is not set
1785CONFIG_SECURITY=y
1786# CONFIG_SECURITYFS is not set
1787CONFIG_SECURITY_NETWORK=y
1788# CONFIG_SECURITY_NETWORK_XFRM is not set
1789# CONFIG_SECURITY_PATH is not set
1790# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1791# CONFIG_SECURITY_ROOTPLUG is not set
1792CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
1793CONFIG_CRYPTO=y
1794
1795#
1796# Crypto core or helper
1797#
1798# CONFIG_CRYPTO_FIPS is not set
1799CONFIG_CRYPTO_ALGAPI=y
1800CONFIG_CRYPTO_ALGAPI2=y
1801CONFIG_CRYPTO_AEAD=m
1802CONFIG_CRYPTO_AEAD2=y
1803CONFIG_CRYPTO_BLKCIPHER=y
1804CONFIG_CRYPTO_BLKCIPHER2=y
1805CONFIG_CRYPTO_HASH=y
1806CONFIG_CRYPTO_HASH2=y
1807CONFIG_CRYPTO_RNG2=y
1808CONFIG_CRYPTO_MANAGER=y
1809CONFIG_CRYPTO_MANAGER2=y
1810# CONFIG_CRYPTO_GF128MUL is not set
1811CONFIG_CRYPTO_NULL=m
1812# CONFIG_CRYPTO_CRYPTD is not set
1813CONFIG_CRYPTO_AUTHENC=m
1814CONFIG_CRYPTO_TEST=m
1815
1816#
1817# Authenticated Encryption with Associated Data
1818#
1819# CONFIG_CRYPTO_CCM is not set
1820# CONFIG_CRYPTO_GCM is not set
1821# CONFIG_CRYPTO_SEQIV is not set
1822
1823#
1824# Block modes
1825#
1826CONFIG_CRYPTO_CBC=y
1827# CONFIG_CRYPTO_CTR is not set
1828# CONFIG_CRYPTO_CTS is not set
1829CONFIG_CRYPTO_ECB=m
1830# CONFIG_CRYPTO_LRW is not set
1831CONFIG_CRYPTO_PCBC=m
1832# CONFIG_CRYPTO_XTS is not set
1833
1834#
1835# Hash modes
1836#
1837CONFIG_CRYPTO_HMAC=y
1838# CONFIG_CRYPTO_XCBC is not set
1839
1840#
1841# Digest
1842#
1843CONFIG_CRYPTO_CRC32C=m
1844CONFIG_CRYPTO_MD4=m
1845CONFIG_CRYPTO_MD5=y
1846CONFIG_CRYPTO_MICHAEL_MIC=m
1847# CONFIG_CRYPTO_RMD128 is not set
1848# CONFIG_CRYPTO_RMD160 is not set
1849# CONFIG_CRYPTO_RMD256 is not set
1850# CONFIG_CRYPTO_RMD320 is not set
1851CONFIG_CRYPTO_SHA1=m
1852CONFIG_CRYPTO_SHA256=m
1853CONFIG_CRYPTO_SHA512=m
1854# CONFIG_CRYPTO_TGR192 is not set
1855CONFIG_CRYPTO_WP512=m
1856
1857#
1858# Ciphers
1859#
1860CONFIG_CRYPTO_AES=m
1861CONFIG_CRYPTO_ANUBIS=m
1862CONFIG_CRYPTO_ARC4=m
1863CONFIG_CRYPTO_BLOWFISH=m
1864# CONFIG_CRYPTO_CAMELLIA is not set
1865CONFIG_CRYPTO_CAST5=m
1866CONFIG_CRYPTO_CAST6=m
1867CONFIG_CRYPTO_DES=y
1868# CONFIG_CRYPTO_FCRYPT is not set
1869CONFIG_CRYPTO_KHAZAD=m
1870# CONFIG_CRYPTO_SALSA20 is not set
1871# CONFIG_CRYPTO_SEED is not set
1872CONFIG_CRYPTO_SERPENT=m
1873CONFIG_CRYPTO_TEA=m
1874CONFIG_CRYPTO_TWOFISH=m
1875CONFIG_CRYPTO_TWOFISH_COMMON=m
1876
1877#
1878# Compression
1879#
1880CONFIG_CRYPTO_DEFLATE=m
1881# CONFIG_CRYPTO_LZO is not set
1882
1883#
1884# Random Number Generation
1885#
1886# CONFIG_CRYPTO_ANSI_CPRNG is not set
1887# CONFIG_CRYPTO_HW is not set
1888# CONFIG_PPC_CLOCK is not set
1889# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h
index f75a5fc64d2e..b7e034b0a6dd 100644
--- a/arch/powerpc/include/asm/hw_irq.h
+++ b/arch/powerpc/include/asm/hw_irq.h
@@ -129,7 +129,7 @@ static inline int irqs_disabled_flags(unsigned long flags)
129 * interrupt-retrigger: should we handle this via lost interrupts and IPIs 129 * interrupt-retrigger: should we handle this via lost interrupts and IPIs
130 * or should we not care like we do now ? --BenH. 130 * or should we not care like we do now ? --BenH.
131 */ 131 */
132struct hw_interrupt_type; 132struct irq_chip;
133 133
134#endif /* __KERNEL__ */ 134#endif /* __KERNEL__ */
135#endif /* _ASM_POWERPC_HW_IRQ_H */ 135#endif /* _ASM_POWERPC_HW_IRQ_H */
diff --git a/arch/powerpc/include/asm/pgtable-ppc32.h b/arch/powerpc/include/asm/pgtable-ppc32.h
index 98bd7c5fcd0e..67ceffc01b43 100644
--- a/arch/powerpc/include/asm/pgtable-ppc32.h
+++ b/arch/powerpc/include/asm/pgtable-ppc32.h
@@ -19,55 +19,6 @@ extern int icache_44x_need_flush;
19#endif /* __ASSEMBLY__ */ 19#endif /* __ASSEMBLY__ */
20 20
21/* 21/*
22 * The PowerPC MMU uses a hash table containing PTEs, together with
23 * a set of 16 segment registers (on 32-bit implementations), to define
24 * the virtual to physical address mapping.
25 *
26 * We use the hash table as an extended TLB, i.e. a cache of currently
27 * active mappings. We maintain a two-level page table tree, much
28 * like that used by the i386, for the sake of the Linux memory
29 * management code. Low-level assembler code in hashtable.S
30 * (procedure hash_page) is responsible for extracting ptes from the
31 * tree and putting them into the hash table when necessary, and
32 * updating the accessed and modified bits in the page table tree.
33 */
34
35/*
36 * The PowerPC MPC8xx uses a TLB with hardware assisted, software tablewalk.
37 * We also use the two level tables, but we can put the real bits in them
38 * needed for the TLB and tablewalk. These definitions require Mx_CTR.PPM = 0,
39 * Mx_CTR.PPCS = 0, and MD_CTR.TWAM = 1. The level 2 descriptor has
40 * additional page protection (when Mx_CTR.PPCS = 1) that allows TLB hit
41 * based upon user/super access. The TLB does not have accessed nor write
42 * protect. We assume that if the TLB get loaded with an entry it is
43 * accessed, and overload the changed bit for write protect. We use
44 * two bits in the software pte that are supposed to be set to zero in
45 * the TLB entry (24 and 25) for these indicators. Although the level 1
46 * descriptor contains the guarded and writethrough/copyback bits, we can
47 * set these at the page level since they get copied from the Mx_TWC
48 * register when the TLB entry is loaded. We will use bit 27 for guard, since
49 * that is where it exists in the MD_TWC, and bit 26 for writethrough.
50 * These will get masked from the level 2 descriptor at TLB load time, and
51 * copied to the MD_TWC before it gets loaded.
52 * Large page sizes added. We currently support two sizes, 4K and 8M.
53 * This also allows a TLB hander optimization because we can directly
54 * load the PMD into MD_TWC. The 8M pages are only used for kernel
55 * mapping of well known areas. The PMD (PGD) entries contain control
56 * flags in addition to the address, so care must be taken that the
57 * software no longer assumes these are only pointers.
58 */
59
60/*
61 * At present, all PowerPC 400-class processors share a similar TLB
62 * architecture. The instruction and data sides share a unified,
63 * 64-entry, fully-associative TLB which is maintained totally under
64 * software control. In addition, the instruction side has a
65 * hardware-managed, 4-entry, fully-associative TLB which serves as a
66 * first level to the shared TLB. These two TLBs are known as the UTLB
67 * and ITLB, respectively (see "mmu.h" for definitions).
68 */
69
70/*
71 * The normal case is that PTEs are 32-bits and we have a 1-page 22 * The normal case is that PTEs are 32-bits and we have a 1-page
72 * 1024-entry pgdir pointing to 1-page 1024-entry PTE pages. -- paulus 23 * 1024-entry pgdir pointing to 1-page 1024-entry PTE pages. -- paulus
73 * 24 *
@@ -135,261 +86,25 @@ extern int icache_44x_need_flush;
135 */ 86 */
136 87
137#if defined(CONFIG_40x) 88#if defined(CONFIG_40x)
138 89#include <asm/pte-40x.h>
139/* There are several potential gotchas here. The 40x hardware TLBLO
140 field looks like this:
141
142 0 1 2 3 4 ... 18 19 20 21 22 23 24 25 26 27 28 29 30 31
143 RPN..................... 0 0 EX WR ZSEL....... W I M G
144
145 Where possible we make the Linux PTE bits match up with this
146
147 - bits 20 and 21 must be cleared, because we use 4k pages (40x can
148 support down to 1k pages), this is done in the TLBMiss exception
149 handler.
150 - We use only zones 0 (for kernel pages) and 1 (for user pages)
151 of the 16 available. Bit 24-26 of the TLB are cleared in the TLB
152 miss handler. Bit 27 is PAGE_USER, thus selecting the correct
153 zone.
154 - PRESENT *must* be in the bottom two bits because swap cache
155 entries use the top 30 bits. Because 40x doesn't support SMP
156 anyway, M is irrelevant so we borrow it for PAGE_PRESENT. Bit 30
157 is cleared in the TLB miss handler before the TLB entry is loaded.
158 - All other bits of the PTE are loaded into TLBLO without
159 modification, leaving us only the bits 20, 21, 24, 25, 26, 30 for
160 software PTE bits. We actually use use bits 21, 24, 25, and
161 30 respectively for the software bits: ACCESSED, DIRTY, RW, and
162 PRESENT.
163*/
164
165/* Definitions for 40x embedded chips. */
166#define _PAGE_GUARDED 0x001 /* G: page is guarded from prefetch */
167#define _PAGE_FILE 0x001 /* when !present: nonlinear file mapping */
168#define _PAGE_PRESENT 0x002 /* software: PTE contains a translation */
169#define _PAGE_NO_CACHE 0x004 /* I: caching is inhibited */
170#define _PAGE_WRITETHRU 0x008 /* W: caching is write-through */
171#define _PAGE_USER 0x010 /* matches one of the zone permission bits */
172#define _PAGE_RW 0x040 /* software: Writes permitted */
173#define _PAGE_DIRTY 0x080 /* software: dirty page */
174#define _PAGE_HWWRITE 0x100 /* hardware: Dirty & RW, set in exception */
175#define _PAGE_HWEXEC 0x200 /* hardware: EX permission */
176#define _PAGE_ACCESSED 0x400 /* software: R: page referenced */
177
178#define _PMD_PRESENT 0x400 /* PMD points to page of PTEs */
179#define _PMD_BAD 0x802
180#define _PMD_SIZE 0x0e0 /* size field, != 0 for large-page PMD entry */
181#define _PMD_SIZE_4M 0x0c0
182#define _PMD_SIZE_16M 0x0e0
183#define PMD_PAGE_SIZE(pmdval) (1024 << (((pmdval) & _PMD_SIZE) >> 4))
184
185/* Until my rework is finished, 40x still needs atomic PTE updates */
186#define PTE_ATOMIC_UPDATES 1
187
188#elif defined(CONFIG_44x) 90#elif defined(CONFIG_44x)
189/* 91#include <asm/pte-44x.h>
190 * Definitions for PPC440
191 *
192 * Because of the 3 word TLB entries to support 36-bit addressing,
193 * the attribute are difficult to map in such a fashion that they
194 * are easily loaded during exception processing. I decided to
195 * organize the entry so the ERPN is the only portion in the
196 * upper word of the PTE and the attribute bits below are packed
197 * in as sensibly as they can be in the area below a 4KB page size
198 * oriented RPN. This at least makes it easy to load the RPN and
199 * ERPN fields in the TLB. -Matt
200 *
201 * Note that these bits preclude future use of a page size
202 * less than 4KB.
203 *
204 *
205 * PPC 440 core has following TLB attribute fields;
206 *
207 * TLB1:
208 * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
209 * RPN................................. - - - - - - ERPN.......
210 *
211 * TLB2:
212 * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
213 * - - - - - - U0 U1 U2 U3 W I M G E - UX UW UR SX SW SR
214 *
215 * Newer 440 cores (440x6 as used on AMCC 460EX/460GT) have additional
216 * TLB2 storage attibute fields. Those are:
217 *
218 * TLB2:
219 * 0...10 11 12 13 14 15 16...31
220 * no change WL1 IL1I IL1D IL2I IL2D no change
221 *
222 * There are some constrains and options, to decide mapping software bits
223 * into TLB entry.
224 *
225 * - PRESENT *must* be in the bottom three bits because swap cache
226 * entries use the top 29 bits for TLB2.
227 *
228 * - FILE *must* be in the bottom three bits because swap cache
229 * entries use the top 29 bits for TLB2.
230 *
231 * - CACHE COHERENT bit (M) has no effect on original PPC440 cores,
232 * because it doesn't support SMP. However, some later 460 variants
233 * have -some- form of SMP support and so I keep the bit there for
234 * future use
235 *
236 * With the PPC 44x Linux implementation, the 0-11th LSBs of the PTE are used
237 * for memory protection related functions (see PTE structure in
238 * include/asm-ppc/mmu.h). The _PAGE_XXX definitions in this file map to the
239 * above bits. Note that the bit values are CPU specific, not architecture
240 * specific.
241 *
242 * The kernel PTE entry holds an arch-dependent swp_entry structure under
243 * certain situations. In other words, in such situations some portion of
244 * the PTE bits are used as a swp_entry. In the PPC implementation, the
245 * 3-24th LSB are shared with swp_entry, however the 0-2nd three LSB still
246 * hold protection values. That means the three protection bits are
247 * reserved for both PTE and SWAP entry at the most significant three
248 * LSBs.
249 *
250 * There are three protection bits available for SWAP entry:
251 * _PAGE_PRESENT
252 * _PAGE_FILE
253 * _PAGE_HASHPTE (if HW has)
254 *
255 * So those three bits have to be inside of 0-2nd LSB of PTE.
256 *
257 */
258
259#define _PAGE_PRESENT 0x00000001 /* S: PTE valid */
260#define _PAGE_RW 0x00000002 /* S: Write permission */
261#define _PAGE_FILE 0x00000004 /* S: nonlinear file mapping */
262#define _PAGE_HWEXEC 0x00000004 /* H: Execute permission */
263#define _PAGE_ACCESSED 0x00000008 /* S: Page referenced */
264#define _PAGE_DIRTY 0x00000010 /* S: Page dirty */
265#define _PAGE_SPECIAL 0x00000020 /* S: Special page */
266#define _PAGE_USER 0x00000040 /* S: User page */
267#define _PAGE_ENDIAN 0x00000080 /* H: E bit */
268#define _PAGE_GUARDED 0x00000100 /* H: G bit */
269#define _PAGE_COHERENT 0x00000200 /* H: M bit */
270#define _PAGE_NO_CACHE 0x00000400 /* H: I bit */
271#define _PAGE_WRITETHRU 0x00000800 /* H: W bit */
272
273/* TODO: Add large page lowmem mapping support */
274#define _PMD_PRESENT 0
275#define _PMD_PRESENT_MASK (PAGE_MASK)
276#define _PMD_BAD (~PAGE_MASK)
277
278/* ERPN in a PTE never gets cleared, ignore it */
279#define _PTE_NONE_MASK 0xffffffff00000000ULL
280
281#define __HAVE_ARCH_PTE_SPECIAL
282
283#elif defined(CONFIG_FSL_BOOKE) 92#elif defined(CONFIG_FSL_BOOKE)
284/* 93#include <asm/pte-fsl-booke.h>
285 MMU Assist Register 3:
286
287 32 33 34 35 36 ... 50 51 52 53 54 55 56 57 58 59 60 61 62 63
288 RPN...................... 0 0 U0 U1 U2 U3 UX SX UW SW UR SR
289
290 - PRESENT *must* be in the bottom three bits because swap cache
291 entries use the top 29 bits.
292
293 - FILE *must* be in the bottom three bits because swap cache
294 entries use the top 29 bits.
295*/
296
297/* Definitions for FSL Book-E Cores */
298#define _PAGE_PRESENT 0x00001 /* S: PTE contains a translation */
299#define _PAGE_USER 0x00002 /* S: User page (maps to UR) */
300#define _PAGE_FILE 0x00002 /* S: when !present: nonlinear file mapping */
301#define _PAGE_RW 0x00004 /* S: Write permission (SW) */
302#define _PAGE_DIRTY 0x00008 /* S: Page dirty */
303#define _PAGE_HWEXEC 0x00010 /* H: SX permission */
304#define _PAGE_ACCESSED 0x00020 /* S: Page referenced */
305
306#define _PAGE_ENDIAN 0x00040 /* H: E bit */
307#define _PAGE_GUARDED 0x00080 /* H: G bit */
308#define _PAGE_COHERENT 0x00100 /* H: M bit */
309#define _PAGE_NO_CACHE 0x00200 /* H: I bit */
310#define _PAGE_WRITETHRU 0x00400 /* H: W bit */
311#define _PAGE_SPECIAL 0x00800 /* S: Special page */
312
313#ifdef CONFIG_PTE_64BIT
314/* ERPN in a PTE never gets cleared, ignore it */
315#define _PTE_NONE_MASK 0xffffffffffff0000ULL
316#endif
317
318#define _PMD_PRESENT 0
319#define _PMD_PRESENT_MASK (PAGE_MASK)
320#define _PMD_BAD (~PAGE_MASK)
321
322#define __HAVE_ARCH_PTE_SPECIAL
323
324#elif defined(CONFIG_8xx) 94#elif defined(CONFIG_8xx)
325/* Definitions for 8xx embedded chips. */ 95#include <asm/pte-8xx.h>
326#define _PAGE_PRESENT 0x0001 /* Page is valid */
327#define _PAGE_FILE 0x0002 /* when !present: nonlinear file mapping */
328#define _PAGE_NO_CACHE 0x0002 /* I: cache inhibit */
329#define _PAGE_SHARED 0x0004 /* No ASID (context) compare */
330
331/* These five software bits must be masked out when the entry is loaded
332 * into the TLB.
333 */
334#define _PAGE_EXEC 0x0008 /* software: i-cache coherency required */
335#define _PAGE_GUARDED 0x0010 /* software: guarded access */
336#define _PAGE_DIRTY 0x0020 /* software: page changed */
337#define _PAGE_RW 0x0040 /* software: user write access allowed */
338#define _PAGE_ACCESSED 0x0080 /* software: page referenced */
339
340/* Setting any bits in the nibble with the follow two controls will
341 * require a TLB exception handler change. It is assumed unused bits
342 * are always zero.
343 */
344#define _PAGE_HWWRITE 0x0100 /* h/w write enable: never set in Linux PTE */
345#define _PAGE_USER 0x0800 /* One of the PP bits, the other is USER&~RW */
346
347#define _PMD_PRESENT 0x0001
348#define _PMD_BAD 0x0ff0
349#define _PMD_PAGE_MASK 0x000c
350#define _PMD_PAGE_8M 0x000c
351
352#define _PTE_NONE_MASK _PAGE_ACCESSED
353
354/* Until my rework is finished, 8xx still needs atomic PTE updates */
355#define PTE_ATOMIC_UPDATES 1
356
357#else /* CONFIG_6xx */ 96#else /* CONFIG_6xx */
358/* Definitions for 60x, 740/750, etc. */ 97#include <asm/pte-hash32.h>
359#define _PAGE_PRESENT 0x001 /* software: pte contains a translation */
360#define _PAGE_HASHPTE 0x002 /* hash_page has made an HPTE for this pte */
361#define _PAGE_FILE 0x004 /* when !present: nonlinear file mapping */
362#define _PAGE_USER 0x004 /* usermode access allowed */
363#define _PAGE_GUARDED 0x008 /* G: prohibit speculative access */
364#define _PAGE_COHERENT 0x010 /* M: enforce memory coherence (SMP systems) */
365#define _PAGE_NO_CACHE 0x020 /* I: cache inhibit */
366#define _PAGE_WRITETHRU 0x040 /* W: cache write-through */
367#define _PAGE_DIRTY 0x080 /* C: page changed */
368#define _PAGE_ACCESSED 0x100 /* R: page referenced */
369#define _PAGE_EXEC 0x200 /* software: i-cache coherency required */
370#define _PAGE_RW 0x400 /* software: user write access allowed */
371#define _PAGE_SPECIAL 0x800 /* software: Special page */
372
373#ifdef CONFIG_PTE_64BIT
374/* We never clear the high word of the pte */
375#define _PTE_NONE_MASK (0xffffffff00000000ULL | _PAGE_HASHPTE)
376#else
377#define _PTE_NONE_MASK _PAGE_HASHPTE
378#endif 98#endif
379 99
380#define _PMD_PRESENT 0 100/* If _PAGE_SPECIAL is defined, then we advertise our support for it */
381#define _PMD_PRESENT_MASK (PAGE_MASK) 101#ifdef _PAGE_SPECIAL
382#define _PMD_BAD (~PAGE_MASK)
383
384/* Hash table based platforms need atomic updates of the linux PTE */
385#define PTE_ATOMIC_UPDATES 1
386
387#define __HAVE_ARCH_PTE_SPECIAL 102#define __HAVE_ARCH_PTE_SPECIAL
388
389#endif 103#endif
390 104
391/* 105/*
392 * Some bits are only used on some cpu families... 106 * Some bits are only used on some cpu families... Make sure that all
107 * the undefined gets defined as 0
393 */ 108 */
394#ifndef _PAGE_HASHPTE 109#ifndef _PAGE_HASHPTE
395#define _PAGE_HASHPTE 0 110#define _PAGE_HASHPTE 0
@@ -431,9 +146,29 @@ extern int icache_44x_need_flush;
431 146
432#define _PAGE_HPTEFLAGS _PAGE_HASHPTE 147#define _PAGE_HPTEFLAGS _PAGE_HASHPTE
433 148
434#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | \ 149/* Location of the PFN in the PTE. Most platforms use the same as _PAGE_SHIFT
435 _PAGE_SPECIAL) 150 * here (ie, naturally aligned). Platform who don't just pre-define the
151 * value so we don't override it here
152 */
153#ifndef PTE_RPN_SHIFT
154#define PTE_RPN_SHIFT (PAGE_SHIFT)
155#endif
156
157#ifdef CONFIG_PTE_64BIT
158#define PTE_RPN_MAX (1ULL << (64 - PTE_RPN_SHIFT))
159#define PTE_RPN_MASK (~((1ULL<<PTE_RPN_SHIFT)-1))
160#else
161#define PTE_RPN_MAX (1UL << (32 - PTE_RPN_SHIFT))
162#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
163#endif
164
165/* _PAGE_CHG_MASK masks of bits that are to be preserved accross
166 * pgprot changes
167 */
168#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
169 _PAGE_ACCESSED | _PAGE_SPECIAL)
436 170
171/* Mask of bits returned by pte_pgprot() */
437#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \ 172#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
438 _PAGE_WRITETHRU | _PAGE_ENDIAN | \ 173 _PAGE_WRITETHRU | _PAGE_ENDIAN | \
439 _PAGE_USER | _PAGE_ACCESSED | \ 174 _PAGE_USER | _PAGE_ACCESSED | \
@@ -521,18 +256,10 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
521 * Conversions between PTE values and page frame numbers. 256 * Conversions between PTE values and page frame numbers.
522 */ 257 */
523 258
524/* in some case we want to additionaly adjust where the pfn is in the pte to 259#define pte_pfn(x) (pte_val(x) >> PTE_RPN_SHIFT)
525 * allow room for more flags */
526#if defined(CONFIG_FSL_BOOKE) && defined(CONFIG_PTE_64BIT)
527#define PFN_SHIFT_OFFSET (PAGE_SHIFT + 8)
528#else
529#define PFN_SHIFT_OFFSET (PAGE_SHIFT)
530#endif
531
532#define pte_pfn(x) (pte_val(x) >> PFN_SHIFT_OFFSET)
533#define pte_page(x) pfn_to_page(pte_pfn(x)) 260#define pte_page(x) pfn_to_page(pte_pfn(x))
534 261
535#define pfn_pte(pfn, prot) __pte(((pte_basic_t)(pfn) << PFN_SHIFT_OFFSET) |\ 262#define pfn_pte(pfn, prot) __pte(((pte_basic_t)(pfn) << PTE_RPN_SHIFT) |\
536 pgprot_val(prot)) 263 pgprot_val(prot))
537#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot) 264#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)
538#endif /* __ASSEMBLY__ */ 265#endif /* __ASSEMBLY__ */
@@ -600,11 +327,19 @@ extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep,
600 unsigned long address); 327 unsigned long address);
601 328
602/* 329/*
603 * Atomic PTE updates. 330 * PTE updates. This function is called whenever an existing
331 * valid PTE is updated. This does -not- include set_pte_at()
332 * which nowadays only sets a new PTE.
333 *
334 * Depending on the type of MMU, we may need to use atomic updates
335 * and the PTE may be either 32 or 64 bit wide. In the later case,
336 * when using atomic updates, only the low part of the PTE is
337 * accessed atomically.
604 * 338 *
605 * pte_update clears and sets bit atomically, and returns 339 * In addition, on 44x, we also maintain a global flag indicating
606 * the old pte value. In the 64-bit PTE case we lock around the 340 * that an executable user mapping was modified, which is needed
607 * low PTE word since we expect ALL flag bits to be there 341 * to properly flush the virtually tagged instruction cache of
342 * those implementations.
608 */ 343 */
609#ifndef CONFIG_PTE_64BIT 344#ifndef CONFIG_PTE_64BIT
610static inline unsigned long pte_update(pte_t *p, 345static inline unsigned long pte_update(pte_t *p,
diff --git a/arch/powerpc/include/asm/pgtable-4k.h b/arch/powerpc/include/asm/pgtable-ppc64-4k.h
index 1dbca4e7de67..6eefdcffa359 100644
--- a/arch/powerpc/include/asm/pgtable-4k.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64-4k.h
@@ -1,5 +1,5 @@
1#ifndef _ASM_POWERPC_PGTABLE_4K_H 1#ifndef _ASM_POWERPC_PGTABLE_PPC64_4K_H
2#define _ASM_POWERPC_PGTABLE_4K_H 2#define _ASM_POWERPC_PGTABLE_PPC64_4K_H
3/* 3/*
4 * Entries per page directory level. The PTE level must use a 64b record 4 * Entries per page directory level. The PTE level must use a 64b record
5 * for each page table entry. The PMD and PGD level use a 32b record for 5 * for each page table entry. The PMD and PGD level use a 32b record for
@@ -40,28 +40,6 @@
40#define PGDIR_SIZE (1UL << PGDIR_SHIFT) 40#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
41#define PGDIR_MASK (~(PGDIR_SIZE-1)) 41#define PGDIR_MASK (~(PGDIR_SIZE-1))
42 42
43/* PTE bits */
44#define _PAGE_HASHPTE 0x0400 /* software: pte has an associated HPTE */
45#define _PAGE_SECONDARY 0x8000 /* software: HPTE is in secondary group */
46#define _PAGE_GROUP_IX 0x7000 /* software: HPTE index within group */
47#define _PAGE_F_SECOND _PAGE_SECONDARY
48#define _PAGE_F_GIX _PAGE_GROUP_IX
49#define _PAGE_SPECIAL 0x10000 /* software: special page */
50#define __HAVE_ARCH_PTE_SPECIAL
51
52/* PTE flags to conserve for HPTE identification */
53#define _PAGE_HPTEFLAGS (_PAGE_BUSY | _PAGE_HASHPTE | \
54 _PAGE_SECONDARY | _PAGE_GROUP_IX)
55
56/* There is no 4K PFN hack on 4K pages */
57#define _PAGE_4K_PFN 0
58
59/* PAGE_MASK gives the right answer below, but only by accident */
60/* It should be preserving the high 48 bits and then specifically */
61/* preserving _PAGE_SECONDARY | _PAGE_GROUP_IX */
62#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | \
63 _PAGE_HPTEFLAGS | _PAGE_SPECIAL)
64
65/* Bits to mask out from a PMD to get to the PTE page */ 43/* Bits to mask out from a PMD to get to the PTE page */
66#define PMD_MASKED_BITS 0 44#define PMD_MASKED_BITS 0
67/* Bits to mask out from a PUD to get to the PMD page */ 45/* Bits to mask out from a PUD to get to the PMD page */
@@ -69,30 +47,6 @@
69/* Bits to mask out from a PGD to get to the PUD page */ 47/* Bits to mask out from a PGD to get to the PUD page */
70#define PGD_MASKED_BITS 0 48#define PGD_MASKED_BITS 0
71 49
72/* shift to put page number into pte */
73#define PTE_RPN_SHIFT (17)
74
75#ifdef STRICT_MM_TYPECHECKS
76#define __real_pte(e,p) ((real_pte_t){(e)})
77#define __rpte_to_pte(r) ((r).pte)
78#else
79#define __real_pte(e,p) (e)
80#define __rpte_to_pte(r) (__pte(r))
81#endif
82#define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> 12)
83
84#define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \
85 do { \
86 index = 0; \
87 shift = mmu_psize_defs[psize].shift; \
88
89#define pte_iterate_hashed_end() } while(0)
90
91#ifdef CONFIG_PPC_HAS_HASH_64K
92#define pte_pagesize_index(mm, addr, pte) get_slice_psize(mm, addr)
93#else
94#define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K
95#endif
96 50
97/* 51/*
98 * 4-level page tables related bits 52 * 4-level page tables related bits
@@ -112,6 +66,9 @@
112#define pud_ERROR(e) \ 66#define pud_ERROR(e) \
113 printk("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pud_val(e)) 67 printk("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pud_val(e))
114 68
69/*
70 * On all 4K setups, remap_4k_pfn() equates to remap_pfn_range() */
115#define remap_4k_pfn(vma, addr, pfn, prot) \ 71#define remap_4k_pfn(vma, addr, pfn, prot) \
116 remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot)) 72 remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot))
117#endif /* _ASM_POWERPC_PGTABLE_4K_H */ 73
74#endif /* _ASM_POWERPC_PGTABLE_PPC64_4K_H */
diff --git a/arch/powerpc/include/asm/pgtable-ppc64-64k.h b/arch/powerpc/include/asm/pgtable-ppc64-64k.h
new file mode 100644
index 000000000000..6cc085b945a5
--- /dev/null
+++ b/arch/powerpc/include/asm/pgtable-ppc64-64k.h
@@ -0,0 +1,42 @@
1#ifndef _ASM_POWERPC_PGTABLE_PPC64_64K_H
2#define _ASM_POWERPC_PGTABLE_PPC64_64K_H
3
4#include <asm-generic/pgtable-nopud.h>
5
6
7#define PTE_INDEX_SIZE 12
8#define PMD_INDEX_SIZE 12
9#define PUD_INDEX_SIZE 0
10#define PGD_INDEX_SIZE 4
11
12#ifndef __ASSEMBLY__
13
14#define PTE_TABLE_SIZE (sizeof(real_pte_t) << PTE_INDEX_SIZE)
15#define PMD_TABLE_SIZE (sizeof(pmd_t) << PMD_INDEX_SIZE)
16#define PGD_TABLE_SIZE (sizeof(pgd_t) << PGD_INDEX_SIZE)
17
18#define PTRS_PER_PTE (1 << PTE_INDEX_SIZE)
19#define PTRS_PER_PMD (1 << PMD_INDEX_SIZE)
20#define PTRS_PER_PGD (1 << PGD_INDEX_SIZE)
21
22/* With 4k base page size, hugepage PTEs go at the PMD level */
23#define MIN_HUGEPTE_SHIFT PAGE_SHIFT
24
25/* PMD_SHIFT determines what a second-level page table entry can map */
26#define PMD_SHIFT (PAGE_SHIFT + PTE_INDEX_SIZE)
27#define PMD_SIZE (1UL << PMD_SHIFT)
28#define PMD_MASK (~(PMD_SIZE-1))
29
30/* PGDIR_SHIFT determines what a third-level page table entry can map */
31#define PGDIR_SHIFT (PMD_SHIFT + PMD_INDEX_SIZE)
32#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
33#define PGDIR_MASK (~(PGDIR_SIZE-1))
34
35#endif /* __ASSEMBLY__ */
36
37/* Bits to mask out from a PMD to get to the PTE page */
38#define PMD_MASKED_BITS 0x1ff
39/* Bits to mask out from a PGD/PUD to get to the PMD page */
40#define PUD_MASKED_BITS 0x1ff
41
42#endif /* _ASM_POWERPC_PGTABLE_PPC64_64K_H */
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h
index c627877fcf16..542073836b29 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64.h
@@ -11,9 +11,9 @@
11#endif /* __ASSEMBLY__ */ 11#endif /* __ASSEMBLY__ */
12 12
13#ifdef CONFIG_PPC_64K_PAGES 13#ifdef CONFIG_PPC_64K_PAGES
14#include <asm/pgtable-64k.h> 14#include <asm/pgtable-ppc64-64k.h>
15#else 15#else
16#include <asm/pgtable-4k.h> 16#include <asm/pgtable-ppc64-4k.h>
17#endif 17#endif
18 18
19#define FIRST_USER_ADDRESS 0 19#define FIRST_USER_ADDRESS 0
@@ -25,6 +25,8 @@
25 PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT) 25 PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT)
26#define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE) 26#define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE)
27 27
28
29/* Some sanity checking */
28#if TASK_SIZE_USER64 > PGTABLE_RANGE 30#if TASK_SIZE_USER64 > PGTABLE_RANGE
29#error TASK_SIZE_USER64 exceeds pagetable range 31#error TASK_SIZE_USER64 exceeds pagetable range
30#endif 32#endif
@@ -33,7 +35,6 @@
33#error TASK_SIZE_USER64 exceeds user VSID range 35#error TASK_SIZE_USER64 exceeds user VSID range
34#endif 36#endif
35 37
36
37/* 38/*
38 * Define the address range of the vmalloc VM area. 39 * Define the address range of the vmalloc VM area.
39 */ 40 */
@@ -76,29 +77,26 @@
76 77
77 78
78/* 79/*
79 * Common bits in a linux-style PTE. These match the bits in the 80 * Include the PTE bits definitions
80 * (hardware-defined) PowerPC PTE as closely as possible. Additional
81 * bits may be defined in pgtable-*.h
82 */ 81 */
83#define _PAGE_PRESENT 0x0001 /* software: pte contains a translation */ 82#include <asm/pte-hash64.h>
84#define _PAGE_USER 0x0002 /* matches one of the PP bits */ 83
85#define _PAGE_FILE 0x0002 /* (!present only) software: pte holds file offset */ 84/* To make some generic powerpc code happy */
86#define _PAGE_EXEC 0x0004 /* No execute on POWER4 and newer (we invert) */ 85#ifndef _PAGE_HWEXEC
87#define _PAGE_GUARDED 0x0008 86#define _PAGE_HWEXEC 0
88#define _PAGE_COHERENT 0x0010 /* M: enforce memory coherence (SMP systems) */ 87#endif
89#define _PAGE_NO_CACHE 0x0020 /* I: cache inhibit */ 88
90#define _PAGE_WRITETHRU 0x0040 /* W: cache write-through */ 89/* Some other useful definitions */
91#define _PAGE_DIRTY 0x0080 /* C: page changed */ 90#define PTE_RPN_MAX (1UL << (64 - PTE_RPN_SHIFT))
92#define _PAGE_ACCESSED 0x0100 /* R: page referenced */ 91#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
93#define _PAGE_RW 0x0200 /* software: user write access allowed */ 92
94#define _PAGE_BUSY 0x0800 /* software: PTE & hash are busy */ 93/* _PAGE_CHG_MASK masks of bits that are to be preserved accross
95 94 * pgprot changes
96/* Strong Access Ordering */ 95 */
97#define _PAGE_SAO (_PAGE_WRITETHRU | _PAGE_NO_CACHE | _PAGE_COHERENT) 96#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
98 97 _PAGE_ACCESSED | _PAGE_SPECIAL)
99#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT) 98
100 99
101#define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY)
102 100
103/* __pgprot defined in arch/powerpc/include/asm/page.h */ 101/* __pgprot defined in arch/powerpc/include/asm/page.h */
104#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED) 102#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
@@ -117,16 +115,9 @@
117#define PAGE_AGP __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE) 115#define PAGE_AGP __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE)
118#define HAVE_PAGE_AGP 116#define HAVE_PAGE_AGP
119 117
120#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | \ 118/* We always have _PAGE_SPECIAL on 64 bit */
121 _PAGE_NO_CACHE | _PAGE_WRITETHRU | \ 119#define __HAVE_ARCH_PTE_SPECIAL
122 _PAGE_4K_PFN | _PAGE_RW | _PAGE_USER | \
123 _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_EXEC)
124/* PTEIDX nibble */
125#define _PTEIDX_SECONDARY 0x8
126#define _PTEIDX_GROUP_IX 0x7
127 120
128/* To make some generic powerpc code happy */
129#define _PAGE_HWEXEC 0
130 121
131/* 122/*
132 * POWER4 and newer have per page execute protection, older chips can only 123 * POWER4 and newer have per page execute protection, older chips can only
@@ -163,6 +154,38 @@
163#ifndef __ASSEMBLY__ 154#ifndef __ASSEMBLY__
164 155
165/* 156/*
157 * This is the default implementation of various PTE accessors, it's
158 * used in all cases except Book3S with 64K pages where we have a
159 * concept of sub-pages
160 */
161#ifndef __real_pte
162
163#ifdef STRICT_MM_TYPECHECKS
164#define __real_pte(e,p) ((real_pte_t){(e)})
165#define __rpte_to_pte(r) ((r).pte)
166#else
167#define __real_pte(e,p) (e)
168#define __rpte_to_pte(r) (__pte(r))
169#endif
170#define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> 12)
171
172#define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \
173 do { \
174 index = 0; \
175 shift = mmu_psize_defs[psize].shift; \
176
177#define pte_iterate_hashed_end() } while(0)
178
179#ifdef CONFIG_PPC_HAS_HASH_64K
180#define pte_pagesize_index(mm, addr, pte) get_slice_psize(mm, addr)
181#else
182#define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K
183#endif
184
185#endif /* __real_pte */
186
187
188/*
166 * Conversion functions: convert a page and protection to a page entry, 189 * Conversion functions: convert a page and protection to a page entry,
167 * and a page entry and page directory to the page they refer to. 190 * and a page entry and page directory to the page they refer to.
168 * 191 *
diff --git a/arch/powerpc/include/asm/pte-40x.h b/arch/powerpc/include/asm/pte-40x.h
new file mode 100644
index 000000000000..07630faae029
--- /dev/null
+++ b/arch/powerpc/include/asm/pte-40x.h
@@ -0,0 +1,64 @@
1#ifndef _ASM_POWERPC_PTE_40x_H
2#define _ASM_POWERPC_PTE_40x_H
3#ifdef __KERNEL__
4
5/*
6 * At present, all PowerPC 400-class processors share a similar TLB
7 * architecture. The instruction and data sides share a unified,
8 * 64-entry, fully-associative TLB which is maintained totally under
9 * software control. In addition, the instruction side has a
10 * hardware-managed, 4-entry, fully-associative TLB which serves as a
11 * first level to the shared TLB. These two TLBs are known as the UTLB
12 * and ITLB, respectively (see "mmu.h" for definitions).
13 *
14 * There are several potential gotchas here. The 40x hardware TLBLO
15 * field looks like this:
16 *
17 * 0 1 2 3 4 ... 18 19 20 21 22 23 24 25 26 27 28 29 30 31
18 * RPN..................... 0 0 EX WR ZSEL....... W I M G
19 *
20 * Where possible we make the Linux PTE bits match up with this
21 *
22 * - bits 20 and 21 must be cleared, because we use 4k pages (40x can
23 * support down to 1k pages), this is done in the TLBMiss exception
24 * handler.
25 * - We use only zones 0 (for kernel pages) and 1 (for user pages)
26 * of the 16 available. Bit 24-26 of the TLB are cleared in the TLB
27 * miss handler. Bit 27 is PAGE_USER, thus selecting the correct
28 * zone.
29 * - PRESENT *must* be in the bottom two bits because swap cache
30 * entries use the top 30 bits. Because 40x doesn't support SMP
31 * anyway, M is irrelevant so we borrow it for PAGE_PRESENT. Bit 30
32 * is cleared in the TLB miss handler before the TLB entry is loaded.
33 * - All other bits of the PTE are loaded into TLBLO without
34 * modification, leaving us only the bits 20, 21, 24, 25, 26, 30 for
35 * software PTE bits. We actually use use bits 21, 24, 25, and
36 * 30 respectively for the software bits: ACCESSED, DIRTY, RW, and
37 * PRESENT.
38 */
39
40#define _PAGE_GUARDED 0x001 /* G: page is guarded from prefetch */
41#define _PAGE_FILE 0x001 /* when !present: nonlinear file mapping */
42#define _PAGE_PRESENT 0x002 /* software: PTE contains a translation */
43#define _PAGE_NO_CACHE 0x004 /* I: caching is inhibited */
44#define _PAGE_WRITETHRU 0x008 /* W: caching is write-through */
45#define _PAGE_USER 0x010 /* matches one of the zone permission bits */
46#define _PAGE_RW 0x040 /* software: Writes permitted */
47#define _PAGE_DIRTY 0x080 /* software: dirty page */
48#define _PAGE_HWWRITE 0x100 /* hardware: Dirty & RW, set in exception */
49#define _PAGE_HWEXEC 0x200 /* hardware: EX permission */
50#define _PAGE_ACCESSED 0x400 /* software: R: page referenced */
51
52#define _PMD_PRESENT 0x400 /* PMD points to page of PTEs */
53#define _PMD_BAD 0x802
54#define _PMD_SIZE 0x0e0 /* size field, != 0 for large-page PMD entry */
55#define _PMD_SIZE_4M 0x0c0
56#define _PMD_SIZE_16M 0x0e0
57
58#define PMD_PAGE_SIZE(pmdval) (1024 << (((pmdval) & _PMD_SIZE) >> 4))
59
60/* Until my rework is finished, 40x still needs atomic PTE updates */
61#define PTE_ATOMIC_UPDATES 1
62
63#endif /* __KERNEL__ */
64#endif /* _ASM_POWERPC_PTE_40x_H */
diff --git a/arch/powerpc/include/asm/pte-44x.h b/arch/powerpc/include/asm/pte-44x.h
new file mode 100644
index 000000000000..37e98bcf83e0
--- /dev/null
+++ b/arch/powerpc/include/asm/pte-44x.h
@@ -0,0 +1,102 @@
1#ifndef _ASM_POWERPC_PTE_44x_H
2#define _ASM_POWERPC_PTE_44x_H
3#ifdef __KERNEL__
4
5/*
6 * Definitions for PPC440
7 *
8 * Because of the 3 word TLB entries to support 36-bit addressing,
9 * the attribute are difficult to map in such a fashion that they
10 * are easily loaded during exception processing. I decided to
11 * organize the entry so the ERPN is the only portion in the
12 * upper word of the PTE and the attribute bits below are packed
13 * in as sensibly as they can be in the area below a 4KB page size
14 * oriented RPN. This at least makes it easy to load the RPN and
15 * ERPN fields in the TLB. -Matt
16 *
17 * This isn't entirely true anymore, at least some bits are now
18 * easier to move into the TLB from the PTE. -BenH.
19 *
20 * Note that these bits preclude future use of a page size
21 * less than 4KB.
22 *
23 *
24 * PPC 440 core has following TLB attribute fields;
25 *
26 * TLB1:
27 * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
28 * RPN................................. - - - - - - ERPN.......
29 *
30 * TLB2:
31 * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
32 * - - - - - - U0 U1 U2 U3 W I M G E - UX UW UR SX SW SR
33 *
34 * Newer 440 cores (440x6 as used on AMCC 460EX/460GT) have additional
35 * TLB2 storage attibute fields. Those are:
36 *
37 * TLB2:
38 * 0...10 11 12 13 14 15 16...31
39 * no change WL1 IL1I IL1D IL2I IL2D no change
40 *
41 * There are some constrains and options, to decide mapping software bits
42 * into TLB entry.
43 *
44 * - PRESENT *must* be in the bottom three bits because swap cache
45 * entries use the top 29 bits for TLB2.
46 *
47 * - FILE *must* be in the bottom three bits because swap cache
48 * entries use the top 29 bits for TLB2.
49 *
50 * - CACHE COHERENT bit (M) has no effect on original PPC440 cores,
51 * because it doesn't support SMP. However, some later 460 variants
52 * have -some- form of SMP support and so I keep the bit there for
53 * future use
54 *
55 * With the PPC 44x Linux implementation, the 0-11th LSBs of the PTE are used
56 * for memory protection related functions (see PTE structure in
57 * include/asm-ppc/mmu.h). The _PAGE_XXX definitions in this file map to the
58 * above bits. Note that the bit values are CPU specific, not architecture
59 * specific.
60 *
61 * The kernel PTE entry holds an arch-dependent swp_entry structure under
62 * certain situations. In other words, in such situations some portion of
63 * the PTE bits are used as a swp_entry. In the PPC implementation, the
64 * 3-24th LSB are shared with swp_entry, however the 0-2nd three LSB still
65 * hold protection values. That means the three protection bits are
66 * reserved for both PTE and SWAP entry at the most significant three
67 * LSBs.
68 *
69 * There are three protection bits available for SWAP entry:
70 * _PAGE_PRESENT
71 * _PAGE_FILE
72 * _PAGE_HASHPTE (if HW has)
73 *
74 * So those three bits have to be inside of 0-2nd LSB of PTE.
75 *
76 */
77
78#define _PAGE_PRESENT 0x00000001 /* S: PTE valid */
79#define _PAGE_RW 0x00000002 /* S: Write permission */
80#define _PAGE_FILE 0x00000004 /* S: nonlinear file mapping */
81#define _PAGE_HWEXEC 0x00000004 /* H: Execute permission */
82#define _PAGE_ACCESSED 0x00000008 /* S: Page referenced */
83#define _PAGE_DIRTY 0x00000010 /* S: Page dirty */
84#define _PAGE_SPECIAL 0x00000020 /* S: Special page */
85#define _PAGE_USER 0x00000040 /* S: User page */
86#define _PAGE_ENDIAN 0x00000080 /* H: E bit */
87#define _PAGE_GUARDED 0x00000100 /* H: G bit */
88#define _PAGE_COHERENT 0x00000200 /* H: M bit */
89#define _PAGE_NO_CACHE 0x00000400 /* H: I bit */
90#define _PAGE_WRITETHRU 0x00000800 /* H: W bit */
91
92/* TODO: Add large page lowmem mapping support */
93#define _PMD_PRESENT 0
94#define _PMD_PRESENT_MASK (PAGE_MASK)
95#define _PMD_BAD (~PAGE_MASK)
96
97/* ERPN in a PTE never gets cleared, ignore it */
98#define _PTE_NONE_MASK 0xffffffff00000000ULL
99
100
101#endif /* __KERNEL__ */
102#endif /* _ASM_POWERPC_PTE_44x_H */
diff --git a/arch/powerpc/include/asm/pte-8xx.h b/arch/powerpc/include/asm/pte-8xx.h
new file mode 100644
index 000000000000..b07acfd330b0
--- /dev/null
+++ b/arch/powerpc/include/asm/pte-8xx.h
@@ -0,0 +1,64 @@
1#ifndef _ASM_POWERPC_PTE_8xx_H
2#define _ASM_POWERPC_PTE_8xx_H
3#ifdef __KERNEL__
4
5/*
6 * The PowerPC MPC8xx uses a TLB with hardware assisted, software tablewalk.
7 * We also use the two level tables, but we can put the real bits in them
8 * needed for the TLB and tablewalk. These definitions require Mx_CTR.PPM = 0,
9 * Mx_CTR.PPCS = 0, and MD_CTR.TWAM = 1. The level 2 descriptor has
10 * additional page protection (when Mx_CTR.PPCS = 1) that allows TLB hit
11 * based upon user/super access. The TLB does not have accessed nor write
12 * protect. We assume that if the TLB get loaded with an entry it is
13 * accessed, and overload the changed bit for write protect. We use
14 * two bits in the software pte that are supposed to be set to zero in
15 * the TLB entry (24 and 25) for these indicators. Although the level 1
16 * descriptor contains the guarded and writethrough/copyback bits, we can
17 * set these at the page level since they get copied from the Mx_TWC
18 * register when the TLB entry is loaded. We will use bit 27 for guard, since
19 * that is where it exists in the MD_TWC, and bit 26 for writethrough.
20 * These will get masked from the level 2 descriptor at TLB load time, and
21 * copied to the MD_TWC before it gets loaded.
22 * Large page sizes added. We currently support two sizes, 4K and 8M.
23 * This also allows a TLB hander optimization because we can directly
24 * load the PMD into MD_TWC. The 8M pages are only used for kernel
25 * mapping of well known areas. The PMD (PGD) entries contain control
26 * flags in addition to the address, so care must be taken that the
27 * software no longer assumes these are only pointers.
28 */
29
30/* Definitions for 8xx embedded chips. */
31#define _PAGE_PRESENT 0x0001 /* Page is valid */
32#define _PAGE_FILE 0x0002 /* when !present: nonlinear file mapping */
33#define _PAGE_NO_CACHE 0x0002 /* I: cache inhibit */
34#define _PAGE_SHARED 0x0004 /* No ASID (context) compare */
35
36/* These five software bits must be masked out when the entry is loaded
37 * into the TLB.
38 */
39#define _PAGE_EXEC 0x0008 /* software: i-cache coherency required */
40#define _PAGE_GUARDED 0x0010 /* software: guarded access */
41#define _PAGE_DIRTY 0x0020 /* software: page changed */
42#define _PAGE_RW 0x0040 /* software: user write access allowed */
43#define _PAGE_ACCESSED 0x0080 /* software: page referenced */
44
45/* Setting any bits in the nibble with the follow two controls will
46 * require a TLB exception handler change. It is assumed unused bits
47 * are always zero.
48 */
49#define _PAGE_HWWRITE 0x0100 /* h/w write enable: never set in Linux PTE */
50#define _PAGE_USER 0x0800 /* One of the PP bits, the other is USER&~RW */
51
52#define _PMD_PRESENT 0x0001
53#define _PMD_BAD 0x0ff0
54#define _PMD_PAGE_MASK 0x000c
55#define _PMD_PAGE_8M 0x000c
56
57#define _PTE_NONE_MASK _PAGE_ACCESSED
58
59/* Until my rework is finished, 8xx still needs atomic PTE updates */
60#define PTE_ATOMIC_UPDATES 1
61
62
63#endif /* __KERNEL__ */
64#endif /* _ASM_POWERPC_PTE_8xx_H */
diff --git a/arch/powerpc/include/asm/pte-fsl-booke.h b/arch/powerpc/include/asm/pte-fsl-booke.h
new file mode 100644
index 000000000000..10820f58acf5
--- /dev/null
+++ b/arch/powerpc/include/asm/pte-fsl-booke.h
@@ -0,0 +1,48 @@
1#ifndef _ASM_POWERPC_PTE_FSL_BOOKE_H
2#define _ASM_POWERPC_PTE_FSL_BOOKE_H
3#ifdef __KERNEL__
4
5/* PTE bit definitions for Freescale BookE SW loaded TLB MMU based
6 * processors
7 *
8 MMU Assist Register 3:
9
10 32 33 34 35 36 ... 50 51 52 53 54 55 56 57 58 59 60 61 62 63
11 RPN...................... 0 0 U0 U1 U2 U3 UX SX UW SW UR SR
12
13 - PRESENT *must* be in the bottom three bits because swap cache
14 entries use the top 29 bits.
15
16 - FILE *must* be in the bottom three bits because swap cache
17 entries use the top 29 bits.
18*/
19
20/* Definitions for FSL Book-E Cores */
21#define _PAGE_PRESENT 0x00001 /* S: PTE contains a translation */
22#define _PAGE_USER 0x00002 /* S: User page (maps to UR) */
23#define _PAGE_FILE 0x00002 /* S: when !present: nonlinear file mapping */
24#define _PAGE_RW 0x00004 /* S: Write permission (SW) */
25#define _PAGE_DIRTY 0x00008 /* S: Page dirty */
26#define _PAGE_HWEXEC 0x00010 /* H: SX permission */
27#define _PAGE_ACCESSED 0x00020 /* S: Page referenced */
28
29#define _PAGE_ENDIAN 0x00040 /* H: E bit */
30#define _PAGE_GUARDED 0x00080 /* H: G bit */
31#define _PAGE_COHERENT 0x00100 /* H: M bit */
32#define _PAGE_NO_CACHE 0x00200 /* H: I bit */
33#define _PAGE_WRITETHRU 0x00400 /* H: W bit */
34#define _PAGE_SPECIAL 0x00800 /* S: Special page */
35
36#ifdef CONFIG_PTE_64BIT
37/* ERPN in a PTE never gets cleared, ignore it */
38#define _PTE_NONE_MASK 0xffffffffffff0000ULL
39/* We extend the size of the PTE flags area when using 64-bit PTEs */
40#define PTE_RPN_SHIFT (PAGE_SHIFT + 8)
41#endif
42
43#define _PMD_PRESENT 0
44#define _PMD_PRESENT_MASK (PAGE_MASK)
45#define _PMD_BAD (~PAGE_MASK)
46
47#endif /* __KERNEL__ */
48#endif /* _ASM_POWERPC_PTE_FSL_BOOKE_H */
diff --git a/arch/powerpc/include/asm/pte-hash32.h b/arch/powerpc/include/asm/pte-hash32.h
new file mode 100644
index 000000000000..6afe22b02f2f
--- /dev/null
+++ b/arch/powerpc/include/asm/pte-hash32.h
@@ -0,0 +1,49 @@
1#ifndef _ASM_POWERPC_PTE_HASH32_H
2#define _ASM_POWERPC_PTE_HASH32_H
3#ifdef __KERNEL__
4
5/*
6 * The "classic" 32-bit implementation of the PowerPC MMU uses a hash
7 * table containing PTEs, together with a set of 16 segment registers,
8 * to define the virtual to physical address mapping.
9 *
10 * We use the hash table as an extended TLB, i.e. a cache of currently
11 * active mappings. We maintain a two-level page table tree, much
12 * like that used by the i386, for the sake of the Linux memory
13 * management code. Low-level assembler code in hash_low_32.S
14 * (procedure hash_page) is responsible for extracting ptes from the
15 * tree and putting them into the hash table when necessary, and
16 * updating the accessed and modified bits in the page table tree.
17 */
18
19#define _PAGE_PRESENT 0x001 /* software: pte contains a translation */
20#define _PAGE_HASHPTE 0x002 /* hash_page has made an HPTE for this pte */
21#define _PAGE_FILE 0x004 /* when !present: nonlinear file mapping */
22#define _PAGE_USER 0x004 /* usermode access allowed */
23#define _PAGE_GUARDED 0x008 /* G: prohibit speculative access */
24#define _PAGE_COHERENT 0x010 /* M: enforce memory coherence (SMP systems) */
25#define _PAGE_NO_CACHE 0x020 /* I: cache inhibit */
26#define _PAGE_WRITETHRU 0x040 /* W: cache write-through */
27#define _PAGE_DIRTY 0x080 /* C: page changed */
28#define _PAGE_ACCESSED 0x100 /* R: page referenced */
29#define _PAGE_EXEC 0x200 /* software: i-cache coherency required */
30#define _PAGE_RW 0x400 /* software: user write access allowed */
31#define _PAGE_SPECIAL 0x800 /* software: Special page */
32
33#ifdef CONFIG_PTE_64BIT
34/* We never clear the high word of the pte */
35#define _PTE_NONE_MASK (0xffffffff00000000ULL | _PAGE_HASHPTE)
36#else
37#define _PTE_NONE_MASK _PAGE_HASHPTE
38#endif
39
40#define _PMD_PRESENT 0
41#define _PMD_PRESENT_MASK (PAGE_MASK)
42#define _PMD_BAD (~PAGE_MASK)
43
44/* Hash table based platforms need atomic updates of the linux PTE */
45#define PTE_ATOMIC_UPDATES 1
46
47
48#endif /* __KERNEL__ */
49#endif /* _ASM_POWERPC_PTE_HASH32_H */
diff --git a/arch/powerpc/include/asm/pte-hash64-4k.h b/arch/powerpc/include/asm/pte-hash64-4k.h
new file mode 100644
index 000000000000..29fdc158fe3f
--- /dev/null
+++ b/arch/powerpc/include/asm/pte-hash64-4k.h
@@ -0,0 +1,20 @@
1/* To be include by pgtable-hash64.h only */
2
3/* PTE bits */
4#define _PAGE_HASHPTE 0x0400 /* software: pte has an associated HPTE */
5#define _PAGE_SECONDARY 0x8000 /* software: HPTE is in secondary group */
6#define _PAGE_GROUP_IX 0x7000 /* software: HPTE index within group */
7#define _PAGE_F_SECOND _PAGE_SECONDARY
8#define _PAGE_F_GIX _PAGE_GROUP_IX
9#define _PAGE_SPECIAL 0x10000 /* software: special page */
10
11/* There is no 4K PFN hack on 4K pages */
12#define _PAGE_4K_PFN 0
13
14/* PTE flags to conserve for HPTE identification */
15#define _PAGE_HPTEFLAGS (_PAGE_BUSY | _PAGE_HASHPTE | \
16 _PAGE_SECONDARY | _PAGE_GROUP_IX)
17
18/* shift to put page number into pte */
19#define PTE_RPN_SHIFT (17)
20
diff --git a/arch/powerpc/include/asm/pgtable-64k.h b/arch/powerpc/include/asm/pte-hash64-64k.h
index 7389003349a6..e05d26fa372f 100644
--- a/arch/powerpc/include/asm/pgtable-64k.h
+++ b/arch/powerpc/include/asm/pte-hash64-64k.h
@@ -1,76 +1,6 @@
1#ifndef _ASM_POWERPC_PGTABLE_64K_H 1/* To be include by pgtable-hash64.h only */
2#define _ASM_POWERPC_PGTABLE_64K_H
3
4#include <asm-generic/pgtable-nopud.h>
5
6
7#define PTE_INDEX_SIZE 12
8#define PMD_INDEX_SIZE 12
9#define PUD_INDEX_SIZE 0
10#define PGD_INDEX_SIZE 4
11
12#ifndef __ASSEMBLY__
13#define PTE_TABLE_SIZE (sizeof(real_pte_t) << PTE_INDEX_SIZE)
14#define PMD_TABLE_SIZE (sizeof(pmd_t) << PMD_INDEX_SIZE)
15#define PGD_TABLE_SIZE (sizeof(pgd_t) << PGD_INDEX_SIZE)
16
17#define PTRS_PER_PTE (1 << PTE_INDEX_SIZE)
18#define PTRS_PER_PMD (1 << PMD_INDEX_SIZE)
19#define PTRS_PER_PGD (1 << PGD_INDEX_SIZE)
20
21#ifdef CONFIG_PPC_SUBPAGE_PROT
22/*
23 * For the sub-page protection option, we extend the PGD with one of
24 * these. Basically we have a 3-level tree, with the top level being
25 * the protptrs array. To optimize speed and memory consumption when
26 * only addresses < 4GB are being protected, pointers to the first
27 * four pages of sub-page protection words are stored in the low_prot
28 * array.
29 * Each page of sub-page protection words protects 1GB (4 bytes
30 * protects 64k). For the 3-level tree, each page of pointers then
31 * protects 8TB.
32 */
33struct subpage_prot_table {
34 unsigned long maxaddr; /* only addresses < this are protected */
35 unsigned int **protptrs[2];
36 unsigned int *low_prot[4];
37};
38
39#undef PGD_TABLE_SIZE
40#define PGD_TABLE_SIZE ((sizeof(pgd_t) << PGD_INDEX_SIZE) + \
41 sizeof(struct subpage_prot_table))
42
43#define SBP_L1_BITS (PAGE_SHIFT - 2)
44#define SBP_L2_BITS (PAGE_SHIFT - 3)
45#define SBP_L1_COUNT (1 << SBP_L1_BITS)
46#define SBP_L2_COUNT (1 << SBP_L2_BITS)
47#define SBP_L2_SHIFT (PAGE_SHIFT + SBP_L1_BITS)
48#define SBP_L3_SHIFT (SBP_L2_SHIFT + SBP_L2_BITS)
49
50extern void subpage_prot_free(pgd_t *pgd);
51
52static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd)
53{
54 return (struct subpage_prot_table *)(pgd + PTRS_PER_PGD);
55}
56#endif /* CONFIG_PPC_SUBPAGE_PROT */
57#endif /* __ASSEMBLY__ */
58
59/* With 4k base page size, hugepage PTEs go at the PMD level */
60#define MIN_HUGEPTE_SHIFT PAGE_SHIFT
61
62/* PMD_SHIFT determines what a second-level page table entry can map */
63#define PMD_SHIFT (PAGE_SHIFT + PTE_INDEX_SIZE)
64#define PMD_SIZE (1UL << PMD_SHIFT)
65#define PMD_MASK (~(PMD_SIZE-1))
66
67/* PGDIR_SHIFT determines what a third-level page table entry can map */
68#define PGDIR_SHIFT (PMD_SHIFT + PMD_INDEX_SIZE)
69#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
70#define PGDIR_MASK (~(PGDIR_SIZE-1))
71 2
72/* Additional PTE bits (don't change without checking asm in hash_low.S) */ 3/* Additional PTE bits (don't change without checking asm in hash_low.S) */
73#define __HAVE_ARCH_PTE_SPECIAL
74#define _PAGE_SPECIAL 0x00000400 /* software: special page */ 4#define _PAGE_SPECIAL 0x00000400 /* software: special page */
75#define _PAGE_HPTE_SUB 0x0ffff000 /* combo only: sub pages HPTE bits */ 5#define _PAGE_HPTE_SUB 0x0ffff000 /* combo only: sub pages HPTE bits */
76#define _PAGE_HPTE_SUB0 0x08000000 /* combo only: first sub page */ 6#define _PAGE_HPTE_SUB0 0x08000000 /* combo only: first sub page */
@@ -107,21 +37,15 @@ static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd)
107 * of addressable physical space, or 46 bits for the special 4k PFNs. 37 * of addressable physical space, or 46 bits for the special 4k PFNs.
108 */ 38 */
109#define PTE_RPN_SHIFT (30) 39#define PTE_RPN_SHIFT (30)
110#define PTE_RPN_MAX (1UL << (64 - PTE_RPN_SHIFT))
111#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
112
113/* _PAGE_CHG_MASK masks of bits that are to be preserved accross
114 * pgprot changes
115 */
116#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
117 _PAGE_ACCESSED | _PAGE_SPECIAL)
118 40
119/* Bits to mask out from a PMD to get to the PTE page */ 41#ifndef __ASSEMBLY__
120#define PMD_MASKED_BITS 0x1ff
121/* Bits to mask out from a PGD/PUD to get to the PMD page */
122#define PUD_MASKED_BITS 0x1ff
123 42
124/* Manipulate "rpte" values */ 43/*
44 * With 64K pages on hash table, we have a special PTE format that
45 * uses a second "half" of the page table to encode sub-page information
46 * in order to deal with 64K made of 4K HW pages. Thus we override the
47 * generic accessors and iterators here
48 */
125#define __real_pte(e,p) ((real_pte_t) { \ 49#define __real_pte(e,p) ((real_pte_t) { \
126 (e), pte_val(*((p) + PTRS_PER_PTE)) }) 50 (e), pte_val(*((p) + PTRS_PER_PTE)) })
127#define __rpte_to_hidx(r,index) ((pte_val((r).pte) & _PAGE_COMBO) ? \ 51#define __rpte_to_hidx(r,index) ((pte_val((r).pte) & _PAGE_COMBO) ? \
@@ -130,7 +54,6 @@ static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd)
130#define __rpte_sub_valid(rpte, index) \ 54#define __rpte_sub_valid(rpte, index) \
131 (pte_val(rpte.pte) & (_PAGE_HPTE_SUB0 >> (index))) 55 (pte_val(rpte.pte) & (_PAGE_HPTE_SUB0 >> (index)))
132 56
133
134/* Trick: we set __end to va + 64k, which happens works for 57/* Trick: we set __end to va + 64k, which happens works for
135 * a 16M page as well as we want only one iteration 58 * a 16M page as well as we want only one iteration
136 */ 59 */
@@ -152,4 +75,41 @@ static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd)
152 remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, \ 75 remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, \
153 __pgprot(pgprot_val((prot)) | _PAGE_4K_PFN)) 76 __pgprot(pgprot_val((prot)) | _PAGE_4K_PFN))
154 77
155#endif /* _ASM_POWERPC_PGTABLE_64K_H */ 78
79#ifdef CONFIG_PPC_SUBPAGE_PROT
80/*
81 * For the sub-page protection option, we extend the PGD with one of
82 * these. Basically we have a 3-level tree, with the top level being
83 * the protptrs array. To optimize speed and memory consumption when
84 * only addresses < 4GB are being protected, pointers to the first
85 * four pages of sub-page protection words are stored in the low_prot
86 * array.
87 * Each page of sub-page protection words protects 1GB (4 bytes
88 * protects 64k). For the 3-level tree, each page of pointers then
89 * protects 8TB.
90 */
91struct subpage_prot_table {
92 unsigned long maxaddr; /* only addresses < this are protected */
93 unsigned int **protptrs[2];
94 unsigned int *low_prot[4];
95};
96
97#undef PGD_TABLE_SIZE
98#define PGD_TABLE_SIZE ((sizeof(pgd_t) << PGD_INDEX_SIZE) + \
99 sizeof(struct subpage_prot_table))
100
101#define SBP_L1_BITS (PAGE_SHIFT - 2)
102#define SBP_L2_BITS (PAGE_SHIFT - 3)
103#define SBP_L1_COUNT (1 << SBP_L1_BITS)
104#define SBP_L2_COUNT (1 << SBP_L2_BITS)
105#define SBP_L2_SHIFT (PAGE_SHIFT + SBP_L1_BITS)
106#define SBP_L3_SHIFT (SBP_L2_SHIFT + SBP_L2_BITS)
107
108extern void subpage_prot_free(pgd_t *pgd);
109
110static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd)
111{
112 return (struct subpage_prot_table *)(pgd + PTRS_PER_PGD);
113}
114#endif /* CONFIG_PPC_SUBPAGE_PROT */
115#endif /* __ASSEMBLY__ */
diff --git a/arch/powerpc/include/asm/pte-hash64.h b/arch/powerpc/include/asm/pte-hash64.h
new file mode 100644
index 000000000000..62766636cc1e
--- /dev/null
+++ b/arch/powerpc/include/asm/pte-hash64.h
@@ -0,0 +1,47 @@
1#ifndef _ASM_POWERPC_PTE_HASH64_H
2#define _ASM_POWERPC_PTE_HASH64_H
3#ifdef __KERNEL__
4
5/*
6 * Common bits between 4K and 64K pages in a linux-style PTE.
7 * These match the bits in the (hardware-defined) PowerPC PTE as closely
8 * as possible. Additional bits may be defined in pgtable-hash64-*.h
9 */
10#define _PAGE_PRESENT 0x0001 /* software: pte contains a translation */
11#define _PAGE_USER 0x0002 /* matches one of the PP bits */
12#define _PAGE_FILE 0x0002 /* (!present only) software: pte holds file offset */
13#define _PAGE_EXEC 0x0004 /* No execute on POWER4 and newer (we invert) */
14#define _PAGE_GUARDED 0x0008
15#define _PAGE_COHERENT 0x0010 /* M: enforce memory coherence (SMP systems) */
16#define _PAGE_NO_CACHE 0x0020 /* I: cache inhibit */
17#define _PAGE_WRITETHRU 0x0040 /* W: cache write-through */
18#define _PAGE_DIRTY 0x0080 /* C: page changed */
19#define _PAGE_ACCESSED 0x0100 /* R: page referenced */
20#define _PAGE_RW 0x0200 /* software: user write access allowed */
21#define _PAGE_BUSY 0x0800 /* software: PTE & hash are busy */
22
23/* Strong Access Ordering */
24#define _PAGE_SAO (_PAGE_WRITETHRU | _PAGE_NO_CACHE | _PAGE_COHERENT)
25
26#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)
27
28#define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY)
29
30/* PTEIDX nibble */
31#define _PTEIDX_SECONDARY 0x8
32#define _PTEIDX_GROUP_IX 0x7
33
34#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | \
35 _PAGE_NO_CACHE | _PAGE_WRITETHRU | \
36 _PAGE_4K_PFN | _PAGE_RW | _PAGE_USER | \
37 _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_EXEC)
38
39
40#ifdef CONFIG_PPC_64K_PAGES
41#include <asm/pte-hash64-64k.h>
42#else
43#include <asm/pte-hash64-4k.h>
44#endif
45
46#endif /* __KERNEL__ */
47#endif /* _ASM_POWERPC_PTE_HASH64_H */
diff --git a/arch/powerpc/include/asm/udbg.h b/arch/powerpc/include/asm/udbg.h
index 6418ceea44b7..cd21e5e6b04f 100644
--- a/arch/powerpc/include/asm/udbg.h
+++ b/arch/powerpc/include/asm/udbg.h
@@ -15,6 +15,7 @@
15#include <linux/init.h> 15#include <linux/init.h>
16 16
17extern void (*udbg_putc)(char c); 17extern void (*udbg_putc)(char c);
18extern void (*udbg_flush)(void);
18extern int (*udbg_getc)(void); 19extern int (*udbg_getc)(void);
19extern int (*udbg_getc_poll)(void); 20extern int (*udbg_getc_poll)(void);
20 21
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index dfec3d2790b2..71901fbda4a5 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -75,7 +75,7 @@ obj-y += time.o prom.o traps.o setup-common.o \
75obj-$(CONFIG_PPC32) += entry_32.o setup_32.o 75obj-$(CONFIG_PPC32) += entry_32.o setup_32.o
76obj-$(CONFIG_PPC64) += dma-iommu.o iommu.o 76obj-$(CONFIG_PPC64) += dma-iommu.o iommu.o
77obj-$(CONFIG_KGDB) += kgdb.o 77obj-$(CONFIG_KGDB) += kgdb.o
78obj-$(CONFIG_PPC_MULTIPLATFORM) += prom_init.o 78obj-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_init.o
79obj-$(CONFIG_MODULES) += ppc_ksyms.o 79obj-$(CONFIG_MODULES) += ppc_ksyms.o
80obj-$(CONFIG_BOOTX_TEXT) += btext.o 80obj-$(CONFIG_BOOTX_TEXT) += btext.o
81obj-$(CONFIG_SMP) += smp.o 81obj-$(CONFIG_SMP) += smp.o
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 638838691b20..ccea2431ddf8 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -731,6 +731,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
731 .cpu_setup = __setup_cpu_750, 731 .cpu_setup = __setup_cpu_750,
732 .machine_check = machine_check_generic, 732 .machine_check = machine_check_generic,
733 .platform = "ppc750", 733 .platform = "ppc750",
734 .oprofile_cpu_type = "ppc/750",
735 .oprofile_type = PPC_OPROFILE_G4,
734 }, 736 },
735 { /* 750FX rev 2.0 must disable HID0[DPM] */ 737 { /* 750FX rev 2.0 must disable HID0[DPM] */
736 .pvr_mask = 0xffffffff, 738 .pvr_mask = 0xffffffff,
@@ -746,6 +748,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
746 .cpu_setup = __setup_cpu_750, 748 .cpu_setup = __setup_cpu_750,
747 .machine_check = machine_check_generic, 749 .machine_check = machine_check_generic,
748 .platform = "ppc750", 750 .platform = "ppc750",
751 .oprofile_cpu_type = "ppc/750",
752 .oprofile_type = PPC_OPROFILE_G4,
749 }, 753 },
750 { /* 750FX (All revs except 2.0) */ 754 { /* 750FX (All revs except 2.0) */
751 .pvr_mask = 0xffff0000, 755 .pvr_mask = 0xffff0000,
@@ -761,6 +765,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
761 .cpu_setup = __setup_cpu_750fx, 765 .cpu_setup = __setup_cpu_750fx,
762 .machine_check = machine_check_generic, 766 .machine_check = machine_check_generic,
763 .platform = "ppc750", 767 .platform = "ppc750",
768 .oprofile_cpu_type = "ppc/750",
769 .oprofile_type = PPC_OPROFILE_G4,
764 }, 770 },
765 { /* 750GX */ 771 { /* 750GX */
766 .pvr_mask = 0xffff0000, 772 .pvr_mask = 0xffff0000,
@@ -776,6 +782,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
776 .cpu_setup = __setup_cpu_750fx, 782 .cpu_setup = __setup_cpu_750fx,
777 .machine_check = machine_check_generic, 783 .machine_check = machine_check_generic,
778 .platform = "ppc750", 784 .platform = "ppc750",
785 .oprofile_cpu_type = "ppc/750",
786 .oprofile_type = PPC_OPROFILE_G4,
779 }, 787 },
780 { /* 740/750 (L2CR bit need fixup for 740) */ 788 { /* 740/750 (L2CR bit need fixup for 740) */
781 .pvr_mask = 0xffff0000, 789 .pvr_mask = 0xffff0000,
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index a1c4cfd25ded..f8c2e6b6f457 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -108,18 +108,21 @@ __start:
108 * because OF may have I/O devices mapped into that area 108 * because OF may have I/O devices mapped into that area
109 * (particularly on CHRP). 109 * (particularly on CHRP).
110 */ 110 */
111#ifdef CONFIG_PPC_MULTIPLATFORM
112 cmpwi 0,r5,0 111 cmpwi 0,r5,0
113 beq 1f 112 beq 1f
114 113
114#ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
115 /* find out where we are now */ 115 /* find out where we are now */
116 bcl 20,31,$+4 116 bcl 20,31,$+4
1170: mflr r8 /* r8 = runtime addr here */ 1170: mflr r8 /* r8 = runtime addr here */
118 addis r8,r8,(_stext - 0b)@ha 118 addis r8,r8,(_stext - 0b)@ha
119 addi r8,r8,(_stext - 0b)@l /* current runtime base addr */ 119 addi r8,r8,(_stext - 0b)@l /* current runtime base addr */
120 bl prom_init 120 bl prom_init
121#endif /* CONFIG_PPC_OF_BOOT_TRAMPOLINE */
122
123 /* We never return. We also hit that trap if trying to boot
124 * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */
121 trap 125 trap
122#endif
123 126
124/* 127/*
125 * Check for BootX signature when supporting PowerMac and branch to 128 * Check for BootX signature when supporting PowerMac and branch to
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index ebaedafc8e67..50ef505b8fb6 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -1360,6 +1360,7 @@ _GLOBAL(__start_initialization_multiplatform)
1360 b .__after_prom_start 1360 b .__after_prom_start
1361 1361
1362_INIT_STATIC(__boot_from_prom) 1362_INIT_STATIC(__boot_from_prom)
1363#ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
1363 /* Save parameters */ 1364 /* Save parameters */
1364 mr r31,r3 1365 mr r31,r3
1365 mr r30,r4 1366 mr r30,r4
@@ -1390,7 +1391,10 @@ _INIT_STATIC(__boot_from_prom)
1390 /* Do all of the interaction with OF client interface */ 1391 /* Do all of the interaction with OF client interface */
1391 mr r8,r26 1392 mr r8,r26
1392 bl .prom_init 1393 bl .prom_init
1393 /* We never return */ 1394#endif /* #CONFIG_PPC_OF_BOOT_TRAMPOLINE */
1395
1396 /* We never return. We also hit that trap if trying to boot
1397 * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */
1394 trap 1398 trap
1395 1399
1396_STATIC(__after_prom_start) 1400_STATIC(__after_prom_start)
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 23b8b5e36f98..48ea2008b20d 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -171,7 +171,7 @@ int show_interrupts(struct seq_file *p, void *v)
171{ 171{
172 int i = *(loff_t *)v, j; 172 int i = *(loff_t *)v, j;
173 struct irqaction *action; 173 struct irqaction *action;
174 irq_desc_t *desc; 174 struct irq_desc *desc;
175 unsigned long flags; 175 unsigned long flags;
176 176
177 if (i == 0) { 177 if (i == 0) {
@@ -1038,7 +1038,7 @@ arch_initcall(irq_late_init);
1038static int virq_debug_show(struct seq_file *m, void *private) 1038static int virq_debug_show(struct seq_file *m, void *private)
1039{ 1039{
1040 unsigned long flags; 1040 unsigned long flags;
1041 irq_desc_t *desc; 1041 struct irq_desc *desc;
1042 const char *p; 1042 const char *p;
1043 char none[] = "none"; 1043 char none[] = "none";
1044 int i; 1044 int i;
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 2ad17315fc88..2603f20984c4 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1482,7 +1482,7 @@ void __init pcibios_resource_survey(void)
1482 * we proceed to assigning things that were left unassigned 1482 * we proceed to assigning things that were left unassigned
1483 */ 1483 */
1484 if (!(ppc_pci_flags & PPC_PCI_PROBE_ONLY)) { 1484 if (!(ppc_pci_flags & PPC_PCI_PROBE_ONLY)) {
1485 pr_debug("PCI: Assigning unassigned resouces...\n"); 1485 pr_debug("PCI: Assigning unassigned resources...\n");
1486 pci_assign_unassigned_resources(); 1486 pci_assign_unassigned_resources();
1487 } 1487 }
1488 1488
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 7f1b33d5e30d..4d5ebb46b2c4 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -2283,6 +2283,8 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
2283 */ 2283 */
2284 prom_init_stdout(); 2284 prom_init_stdout();
2285 2285
2286 prom_printf("Preparing to boot %s", PTRRELOC((char *)linux_banner));
2287
2286 /* 2288 /*
2287 * Get default machine type. At this point, we do not differentiate 2289 * Get default machine type. At this point, we do not differentiate
2288 * between pSeries SMP and pSeries LPAR 2290 * between pSeries SMP and pSeries LPAR
diff --git a/arch/powerpc/kernel/prom_init_check.sh b/arch/powerpc/kernel/prom_init_check.sh
index ea3a2ec03ffa..1ac136b128f0 100644
--- a/arch/powerpc/kernel/prom_init_check.sh
+++ b/arch/powerpc/kernel/prom_init_check.sh
@@ -20,7 +20,7 @@ WHITELIST="add_reloc_offset __bss_start __bss_stop copy_and_flush
20_end enter_prom memcpy memset reloc_offset __secondary_hold 20_end enter_prom memcpy memset reloc_offset __secondary_hold
21__secondary_hold_acknowledge __secondary_hold_spinloop __start 21__secondary_hold_acknowledge __secondary_hold_spinloop __start
22strcmp strcpy strlcpy strlen strncmp strstr logo_linux_clut224 22strcmp strcpy strlcpy strlen strncmp strstr logo_linux_clut224
23reloc_got2 kernstart_addr memstart_addr" 23reloc_got2 kernstart_addr memstart_addr linux_banner"
24 24
25NM="$1" 25NM="$1"
26OBJ="$2" 26OBJ="$2"
diff --git a/arch/powerpc/kernel/udbg.c b/arch/powerpc/kernel/udbg.c
index 7d6c9bb8c77f..fc9af47e2128 100644
--- a/arch/powerpc/kernel/udbg.c
+++ b/arch/powerpc/kernel/udbg.c
@@ -18,6 +18,7 @@
18#include <asm/udbg.h> 18#include <asm/udbg.h>
19 19
20void (*udbg_putc)(char c); 20void (*udbg_putc)(char c);
21void (*udbg_flush)(void);
21int (*udbg_getc)(void); 22int (*udbg_getc)(void);
22int (*udbg_getc_poll)(void); 23int (*udbg_getc_poll)(void);
23 24
@@ -76,6 +77,9 @@ void udbg_puts(const char *s)
76 while ((c = *s++) != '\0') 77 while ((c = *s++) != '\0')
77 udbg_putc(c); 78 udbg_putc(c);
78 } 79 }
80
81 if (udbg_flush)
82 udbg_flush();
79 } 83 }
80#if 0 84#if 0
81 else { 85 else {
@@ -98,6 +102,9 @@ int udbg_write(const char *s, int n)
98 } 102 }
99 } 103 }
100 104
105 if (udbg_flush)
106 udbg_flush();
107
101 return n - remain; 108 return n - remain;
102} 109}
103 110
diff --git a/arch/powerpc/kernel/udbg_16550.c b/arch/powerpc/kernel/udbg_16550.c
index 7b7da8cfd5e8..0362a891e54e 100644
--- a/arch/powerpc/kernel/udbg_16550.c
+++ b/arch/powerpc/kernel/udbg_16550.c
@@ -48,14 +48,21 @@ struct NS16550 {
48 48
49static struct NS16550 __iomem *udbg_comport; 49static struct NS16550 __iomem *udbg_comport;
50 50
51static void udbg_550_putc(char c) 51static void udbg_550_flush(void)
52{ 52{
53 if (udbg_comport) { 53 if (udbg_comport) {
54 while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0) 54 while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0)
55 /* wait for idle */; 55 /* wait for idle */;
56 out_8(&udbg_comport->thr, c); 56 }
57}
58
59static void udbg_550_putc(char c)
60{
61 if (udbg_comport) {
57 if (c == '\n') 62 if (c == '\n')
58 udbg_550_putc('\r'); 63 udbg_550_putc('\r');
64 udbg_550_flush();
65 out_8(&udbg_comport->thr, c);
59 } 66 }
60} 67}
61 68
@@ -108,6 +115,7 @@ void udbg_init_uart(void __iomem *comport, unsigned int speed,
108 /* Clear & enable FIFOs */ 115 /* Clear & enable FIFOs */
109 out_8(&udbg_comport->fcr ,0x07); 116 out_8(&udbg_comport->fcr ,0x07);
110 udbg_putc = udbg_550_putc; 117 udbg_putc = udbg_550_putc;
118 udbg_flush = udbg_550_flush;
111 udbg_getc = udbg_550_getc; 119 udbg_getc = udbg_550_getc;
112 udbg_getc_poll = udbg_550_getc_poll; 120 udbg_getc_poll = udbg_550_getc_poll;
113 } 121 }
@@ -149,14 +157,21 @@ unsigned int udbg_probe_uart_speed(void __iomem *comport, unsigned int clock)
149} 157}
150 158
151#ifdef CONFIG_PPC_MAPLE 159#ifdef CONFIG_PPC_MAPLE
152void udbg_maple_real_putc(char c) 160void udbg_maple_real_flush(void)
153{ 161{
154 if (udbg_comport) { 162 if (udbg_comport) {
155 while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0) 163 while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
156 /* wait for idle */; 164 /* wait for idle */;
157 real_writeb(c, &udbg_comport->thr); eieio(); 165 }
166}
167
168void udbg_maple_real_putc(char c)
169{
170 if (udbg_comport) {
158 if (c == '\n') 171 if (c == '\n')
159 udbg_maple_real_putc('\r'); 172 udbg_maple_real_putc('\r');
173 udbg_maple_real_flush();
174 real_writeb(c, &udbg_comport->thr); eieio();
160 } 175 }
161} 176}
162 177
@@ -165,20 +180,28 @@ void __init udbg_init_maple_realmode(void)
165 udbg_comport = (struct NS16550 __iomem *)0xf40003f8; 180 udbg_comport = (struct NS16550 __iomem *)0xf40003f8;
166 181
167 udbg_putc = udbg_maple_real_putc; 182 udbg_putc = udbg_maple_real_putc;
183 udbg_flush = udbg_maple_real_flush;
168 udbg_getc = NULL; 184 udbg_getc = NULL;
169 udbg_getc_poll = NULL; 185 udbg_getc_poll = NULL;
170} 186}
171#endif /* CONFIG_PPC_MAPLE */ 187#endif /* CONFIG_PPC_MAPLE */
172 188
173#ifdef CONFIG_PPC_PASEMI 189#ifdef CONFIG_PPC_PASEMI
174void udbg_pas_real_putc(char c) 190void udbg_pas_real_flush(void)
175{ 191{
176 if (udbg_comport) { 192 if (udbg_comport) {
177 while ((real_205_readb(&udbg_comport->lsr) & LSR_THRE) == 0) 193 while ((real_205_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
178 /* wait for idle */; 194 /* wait for idle */;
179 real_205_writeb(c, &udbg_comport->thr); eieio(); 195 }
196}
197
198void udbg_pas_real_putc(char c)
199{
200 if (udbg_comport) {
180 if (c == '\n') 201 if (c == '\n')
181 udbg_pas_real_putc('\r'); 202 udbg_pas_real_putc('\r');
203 udbg_pas_real_flush();
204 real_205_writeb(c, &udbg_comport->thr); eieio();
182 } 205 }
183} 206}
184 207
@@ -187,6 +210,7 @@ void udbg_init_pas_realmode(void)
187 udbg_comport = (struct NS16550 __iomem *)0xfcff03f8UL; 210 udbg_comport = (struct NS16550 __iomem *)0xfcff03f8UL;
188 211
189 udbg_putc = udbg_pas_real_putc; 212 udbg_putc = udbg_pas_real_putc;
213 udbg_flush = udbg_pas_real_flush;
190 udbg_getc = NULL; 214 udbg_getc = NULL;
191 udbg_getc_poll = NULL; 215 udbg_getc_poll = NULL;
192} 216}
@@ -195,14 +219,21 @@ void udbg_init_pas_realmode(void)
195#ifdef CONFIG_PPC_EARLY_DEBUG_44x 219#ifdef CONFIG_PPC_EARLY_DEBUG_44x
196#include <platforms/44x/44x.h> 220#include <platforms/44x/44x.h>
197 221
198static void udbg_44x_as1_putc(char c) 222static int udbg_44x_as1_flush(void)
199{ 223{
200 if (udbg_comport) { 224 if (udbg_comport) {
201 while ((as1_readb(&udbg_comport->lsr) & LSR_THRE) == 0) 225 while ((as1_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
202 /* wait for idle */; 226 /* wait for idle */;
203 as1_writeb(c, &udbg_comport->thr); eieio(); 227 }
228}
229
230static void udbg_44x_as1_putc(char c)
231{
232 if (udbg_comport) {
204 if (c == '\n') 233 if (c == '\n')
205 udbg_44x_as1_putc('\r'); 234 udbg_44x_as1_putc('\r');
235 udbg_44x_as1_flush();
236 as1_writeb(c, &udbg_comport->thr); eieio();
206 } 237 }
207} 238}
208 239
@@ -222,19 +253,27 @@ void __init udbg_init_44x_as1(void)
222 (struct NS16550 __iomem *)PPC44x_EARLY_DEBUG_VIRTADDR; 253 (struct NS16550 __iomem *)PPC44x_EARLY_DEBUG_VIRTADDR;
223 254
224 udbg_putc = udbg_44x_as1_putc; 255 udbg_putc = udbg_44x_as1_putc;
256 udbg_flush = udbg_44x_as1_flush;
225 udbg_getc = udbg_44x_as1_getc; 257 udbg_getc = udbg_44x_as1_getc;
226} 258}
227#endif /* CONFIG_PPC_EARLY_DEBUG_44x */ 259#endif /* CONFIG_PPC_EARLY_DEBUG_44x */
228 260
229#ifdef CONFIG_PPC_EARLY_DEBUG_40x 261#ifdef CONFIG_PPC_EARLY_DEBUG_40x
230static void udbg_40x_real_putc(char c) 262static void udbg_40x_real_flush(void)
231{ 263{
232 if (udbg_comport) { 264 if (udbg_comport) {
233 while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0) 265 while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
234 /* wait for idle */; 266 /* wait for idle */;
235 real_writeb(c, &udbg_comport->thr); eieio(); 267 }
268}
269
270static void udbg_40x_real_putc(char c)
271{
272 if (udbg_comport) {
236 if (c == '\n') 273 if (c == '\n')
237 udbg_40x_real_putc('\r'); 274 udbg_40x_real_putc('\r');
275 udbg_40x_real_flush();
276 real_writeb(c, &udbg_comport->thr); eieio();
238 } 277 }
239} 278}
240 279
@@ -254,6 +293,7 @@ void __init udbg_init_40x_realmode(void)
254 CONFIG_PPC_EARLY_DEBUG_40x_PHYSADDR; 293 CONFIG_PPC_EARLY_DEBUG_40x_PHYSADDR;
255 294
256 udbg_putc = udbg_40x_real_putc; 295 udbg_putc = udbg_40x_real_putc;
296 udbg_flush = udbg_40x_real_flush;
257 udbg_getc = udbg_40x_real_getc; 297 udbg_getc = udbg_40x_real_getc;
258 udbg_getc_poll = NULL; 298 udbg_getc_poll = NULL;
259} 299}
diff --git a/arch/powerpc/math-emu/Makefile b/arch/powerpc/math-emu/Makefile
index f9e506a735ae..0c16ab947f1f 100644
--- a/arch/powerpc/math-emu/Makefile
+++ b/arch/powerpc/math-emu/Makefile
@@ -1,6 +1,4 @@
1 1
2obj-y := math.o fmr.o lfd.o stfd.o
3
4obj-$(CONFIG_MATH_EMULATION) += fabs.o fadd.o fadds.o fcmpo.o fcmpu.o \ 2obj-$(CONFIG_MATH_EMULATION) += fabs.o fadd.o fadds.o fcmpo.o fcmpu.o \
5 fctiw.o fctiwz.o fdiv.o fdivs.o \ 3 fctiw.o fctiwz.o fdiv.o fdivs.o \
6 fmadd.o fmadds.o fmsub.o fmsubs.o \ 4 fmadd.o fmadds.o fmsub.o fmsubs.o \
@@ -9,7 +7,8 @@ obj-$(CONFIG_MATH_EMULATION) += fabs.o fadd.o fadds.o fcmpo.o fcmpu.o \
9 fres.o frsp.o frsqrte.o fsel.o lfs.o \ 7 fres.o frsp.o frsqrte.o fsel.o lfs.o \
10 fsqrt.o fsqrts.o fsub.o fsubs.o \ 8 fsqrt.o fsqrts.o fsub.o fsubs.o \
11 mcrfs.o mffs.o mtfsb0.o mtfsb1.o \ 9 mcrfs.o mffs.o mtfsb0.o mtfsb1.o \
12 mtfsf.o mtfsfi.o stfiwx.o stfs.o 10 mtfsf.o mtfsfi.o stfiwx.o stfs.o \
11 math.o fmr.o lfd.o stfd.o
13 12
14obj-$(CONFIG_SPE) += math_efp.o 13obj-$(CONFIG_SPE) += math_efp.o
15 14
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile
index 953cc4a1cde5..6d2838fc8792 100644
--- a/arch/powerpc/mm/Makefile
+++ b/arch/powerpc/mm/Makefile
@@ -6,7 +6,7 @@ ifeq ($(CONFIG_PPC64),y)
6EXTRA_CFLAGS += -mno-minimal-toc 6EXTRA_CFLAGS += -mno-minimal-toc
7endif 7endif
8 8
9obj-y := fault.o mem.o pgtable.o \ 9obj-y := fault.o mem.o pgtable.o gup.o \
10 init_$(CONFIG_WORD_SIZE).o \ 10 init_$(CONFIG_WORD_SIZE).o \
11 pgtable_$(CONFIG_WORD_SIZE).o 11 pgtable_$(CONFIG_WORD_SIZE).o
12obj-$(CONFIG_PPC_MMU_NOHASH) += mmu_context_nohash.o tlb_nohash.o \ 12obj-$(CONFIG_PPC_MMU_NOHASH) += mmu_context_nohash.o tlb_nohash.o \
@@ -14,7 +14,7 @@ obj-$(CONFIG_PPC_MMU_NOHASH) += mmu_context_nohash.o tlb_nohash.o \
14hash-$(CONFIG_PPC_NATIVE) := hash_native_64.o 14hash-$(CONFIG_PPC_NATIVE) := hash_native_64.o
15obj-$(CONFIG_PPC64) += hash_utils_64.o \ 15obj-$(CONFIG_PPC64) += hash_utils_64.o \
16 slb_low.o slb.o stab.o \ 16 slb_low.o slb.o stab.o \
17 gup.o mmap.o $(hash-y) 17 mmap.o $(hash-y)
18obj-$(CONFIG_PPC_STD_MMU_32) += ppc_mmu_32.o 18obj-$(CONFIG_PPC_STD_MMU_32) += ppc_mmu_32.o
19obj-$(CONFIG_PPC_STD_MMU) += hash_low_$(CONFIG_WORD_SIZE).o \ 19obj-$(CONFIG_PPC_STD_MMU) += hash_low_$(CONFIG_WORD_SIZE).o \
20 tlb_hash$(CONFIG_WORD_SIZE).o \ 20 tlb_hash$(CONFIG_WORD_SIZE).o \
diff --git a/arch/powerpc/mm/gup.c b/arch/powerpc/mm/gup.c
index 28a114db3ba0..bc400c78c97f 100644
--- a/arch/powerpc/mm/gup.c
+++ b/arch/powerpc/mm/gup.c
@@ -14,6 +14,8 @@
14#include <linux/rwsem.h> 14#include <linux/rwsem.h>
15#include <asm/pgtable.h> 15#include <asm/pgtable.h>
16 16
17#ifdef __HAVE_ARCH_PTE_SPECIAL
18
17/* 19/*
18 * The performance critical leaf functions are made noinline otherwise gcc 20 * The performance critical leaf functions are made noinline otherwise gcc
19 * inlines everything into a single function which results in too much 21 * inlines everything into a single function which results in too much
@@ -151,8 +153,11 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write,
151 unsigned long addr, len, end; 153 unsigned long addr, len, end;
152 unsigned long next; 154 unsigned long next;
153 pgd_t *pgdp; 155 pgd_t *pgdp;
154 int psize, nr = 0; 156 int nr = 0;
157#ifdef CONFIG_PPC64
155 unsigned int shift; 158 unsigned int shift;
159 int psize;
160#endif
156 161
157 pr_debug("%s(%lx,%x,%s)\n", __func__, start, nr_pages, write ? "write" : "read"); 162 pr_debug("%s(%lx,%x,%s)\n", __func__, start, nr_pages, write ? "write" : "read");
158 163
@@ -205,8 +210,13 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write,
205 */ 210 */
206 local_irq_disable(); 211 local_irq_disable();
207 212
213#ifdef CONFIG_PPC64
214 /* Those bits are related to hugetlbfs implementation and only exist
215 * on 64-bit for now
216 */
208 psize = get_slice_psize(mm, addr); 217 psize = get_slice_psize(mm, addr);
209 shift = mmu_psize_defs[psize].shift; 218 shift = mmu_psize_defs[psize].shift;
219#endif /* CONFIG_PPC64 */
210 220
211#ifdef CONFIG_HUGETLB_PAGE 221#ifdef CONFIG_HUGETLB_PAGE
212 if (unlikely(mmu_huge_psizes[psize])) { 222 if (unlikely(mmu_huge_psizes[psize])) {
@@ -236,7 +246,9 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write,
236 do { 246 do {
237 pgd_t pgd = *pgdp; 247 pgd_t pgd = *pgdp;
238 248
249#ifdef CONFIG_PPC64
239 VM_BUG_ON(shift != mmu_psize_defs[get_slice_psize(mm, addr)].shift); 250 VM_BUG_ON(shift != mmu_psize_defs[get_slice_psize(mm, addr)].shift);
251#endif
240 pr_debug(" %016lx: normal pgd %p\n", addr, 252 pr_debug(" %016lx: normal pgd %p\n", addr,
241 (void *)pgd_val(pgd)); 253 (void *)pgd_val(pgd));
242 next = pgd_addr_end(addr, end); 254 next = pgd_addr_end(addr, end);
@@ -279,3 +291,5 @@ slow_irqon:
279 return ret; 291 return ret;
280 } 292 }
281} 293}
294
295#endif /* __HAVE_ARCH_PTE_SPECIAL */
diff --git a/arch/powerpc/platforms/512x/Kconfig b/arch/powerpc/platforms/512x/Kconfig
index 326852c78b8f..4dac9b0525a4 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -12,7 +12,7 @@ config PPC_MPC5121
12 12
13config MPC5121_ADS 13config MPC5121_ADS
14 bool "Freescale MPC5121E ADS" 14 bool "Freescale MPC5121E ADS"
15 depends on PPC_MULTIPLATFORM && PPC32 15 depends on 6xx
16 select DEFAULT_UIMAGE 16 select DEFAULT_UIMAGE
17 select PPC_MPC5121 17 select PPC_MPC5121
18 select MPC5121_ADS_CPLD 18 select MPC5121_ADS_CPLD
@@ -21,7 +21,7 @@ config MPC5121_ADS
21 21
22config MPC5121_GENERIC 22config MPC5121_GENERIC
23 bool "Generic support for simple MPC5121 based boards" 23 bool "Generic support for simple MPC5121 based boards"
24 depends on PPC_MULTIPLATFORM && PPC32 24 depends on 6xx
25 select DEFAULT_UIMAGE 25 select DEFAULT_UIMAGE
26 select PPC_MPC5121 26 select PPC_MPC5121
27 help 27 help
diff --git a/arch/powerpc/platforms/52xx/Kconfig b/arch/powerpc/platforms/52xx/Kconfig
index 75f82ab0616e..8b8e9560a315 100644
--- a/arch/powerpc/platforms/52xx/Kconfig
+++ b/arch/powerpc/platforms/52xx/Kconfig
@@ -1,6 +1,6 @@
1config PPC_MPC52xx 1config PPC_MPC52xx
2 bool "52xx-based boards" 2 bool "52xx-based boards"
3 depends on PPC_MULTIPLATFORM && PPC32 3 depends on 6xx
4 select PPC_CLOCK 4 select PPC_CLOCK
5 select PPC_PCI_CHOICE 5 select PPC_PCI_CHOICE
6 6
diff --git a/arch/powerpc/platforms/82xx/Kconfig b/arch/powerpc/platforms/82xx/Kconfig
index 30f008b2f92e..7c7df4003820 100644
--- a/arch/powerpc/platforms/82xx/Kconfig
+++ b/arch/powerpc/platforms/82xx/Kconfig
@@ -1,6 +1,6 @@
1menuconfig PPC_82xx 1menuconfig PPC_82xx
2 bool "82xx-based boards (PQ II)" 2 bool "82xx-based boards (PQ II)"
3 depends on 6xx && PPC_MULTIPLATFORM 3 depends on 6xx
4 4
5if PPC_82xx 5if PPC_82xx
6 6
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index 83c664afc897..437d29a59d72 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -1,6 +1,6 @@
1menuconfig PPC_83xx 1menuconfig PPC_83xx
2 bool "83xx-based boards" 2 bool "83xx-based boards"
3 depends on 6xx && PPC_MULTIPLATFORM 3 depends on 6xx
4 select PPC_UDBG_16550 4 select PPC_UDBG_16550
5 select PPC_PCI_CHOICE 5 select PPC_PCI_CHOICE
6 select FSL_PCI if PCI 6 select FSL_PCI if PCI
diff --git a/arch/powerpc/platforms/85xx/ksi8560.c b/arch/powerpc/platforms/85xx/ksi8560.c
index 81cee7bbf2d2..66f29235ff09 100644
--- a/arch/powerpc/platforms/85xx/ksi8560.c
+++ b/arch/powerpc/platforms/85xx/ksi8560.c
@@ -106,8 +106,6 @@ static void __init ksi8560_pic_init(void)
106 cpm2_pic_init(np); 106 cpm2_pic_init(np);
107 of_node_put(np); 107 of_node_put(np);
108 set_irq_chained_handler(irq, cpm2_cascade); 108 set_irq_chained_handler(irq, cpm2_cascade);
109
110 setup_irq(0, NULL);
111#endif 109#endif
112} 110}
113 111
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index 79a0df17078b..cc0b0db8a6f3 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -21,6 +21,7 @@
21#include <asm/page.h> 21#include <asm/page.h>
22#include <asm/mpic.h> 22#include <asm/mpic.h>
23#include <asm/cacheflush.h> 23#include <asm/cacheflush.h>
24#include <asm/dbell.h>
24 25
25#include <sysdev/fsl_soc.h> 26#include <sysdev/fsl_soc.h>
26 27
@@ -80,10 +81,8 @@ smp_85xx_kick_cpu(int nr)
80} 81}
81 82
82static void __init 83static void __init
83smp_85xx_setup_cpu(int cpu_nr) 84smp_85xx_basic_setup(int cpu_nr)
84{ 85{
85 mpic_setup_this_cpu();
86
87 /* Clear any pending timer interrupts */ 86 /* Clear any pending timer interrupts */
88 mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS); 87 mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS);
89 88
@@ -91,15 +90,43 @@ smp_85xx_setup_cpu(int cpu_nr)
91 mtspr(SPRN_TCR, TCR_DIE); 90 mtspr(SPRN_TCR, TCR_DIE);
92} 91}
93 92
93static void __init
94smp_85xx_setup_cpu(int cpu_nr)
95{
96 mpic_setup_this_cpu();
97
98 smp_85xx_basic_setup(cpu_nr);
99}
100
94struct smp_ops_t smp_85xx_ops = { 101struct smp_ops_t smp_85xx_ops = {
95 .message_pass = smp_mpic_message_pass,
96 .probe = smp_mpic_probe,
97 .kick_cpu = smp_85xx_kick_cpu, 102 .kick_cpu = smp_85xx_kick_cpu,
98 .setup_cpu = smp_85xx_setup_cpu,
99}; 103};
100 104
101void __init 105static int __init smp_dummy_probe(void)
102mpc85xx_smp_init(void)
103{ 106{
107 return NR_CPUS;
108}
109
110void __init mpc85xx_smp_init(void)
111{
112 struct device_node *np;
113
114 smp_85xx_ops.message_pass = NULL;
115
116 np = of_find_node_by_type(NULL, "open-pic");
117 if (np) {
118 smp_85xx_ops.probe = smp_mpic_probe;
119 smp_85xx_ops.setup_cpu = smp_85xx_setup_cpu;
120 smp_85xx_ops.message_pass = smp_mpic_message_pass;
121 } else {
122 smp_85xx_ops.probe = smp_dummy_probe;
123 smp_85xx_ops.setup_cpu = smp_85xx_basic_setup;
124 }
125
126 if (cpu_has_feature(CPU_FTR_DBELL))
127 smp_85xx_ops.message_pass = smp_dbell_message_pass;
128
129 BUG_ON(!smp_85xx_ops.message_pass);
130
104 smp_ops = &smp_85xx_ops; 131 smp_ops = &smp_85xx_ops;
105} 132}
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index fa276c689cf9..fdaf4ddaa955 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -1,7 +1,7 @@
1config PPC_86xx 1config PPC_86xx
2menuconfig PPC_86xx 2menuconfig PPC_86xx
3 bool "86xx-based boards" 3 bool "86xx-based boards"
4 depends on 6xx && PPC_MULTIPLATFORM 4 depends on 6xx
5 select FSL_SOC 5 select FSL_SOC
6 select ALTIVEC 6 select ALTIVEC
7 help 7 help
@@ -31,6 +31,14 @@ config MPC8610_HPCD
31 help 31 help
32 This option enables support for the MPC8610 HPCD board. 32 This option enables support for the MPC8610 HPCD board.
33 33
34config GEF_PPC9A
35 bool "GE Fanuc PPC9A"
36 select DEFAULT_UIMAGE
37 select GENERIC_GPIO
38 select ARCH_REQUIRE_GPIOLIB
39 help
40 This option enables support for GE Fanuc's PPC9A.
41
34config GEF_SBC310 42config GEF_SBC310
35 bool "GE Fanuc SBC310" 43 bool "GE Fanuc SBC310"
36 select DEFAULT_UIMAGE 44 select DEFAULT_UIMAGE
@@ -56,7 +64,7 @@ config MPC8641
56 select FSL_PCI if PCI 64 select FSL_PCI if PCI
57 select PPC_UDBG_16550 65 select PPC_UDBG_16550
58 select MPIC 66 select MPIC
59 default y if MPC8641_HPCN || SBC8641D || GEF_SBC610 || GEF_SBC310 67 default y if MPC8641_HPCN || SBC8641D || GEF_SBC610 || GEF_SBC310 || GEF_PPC9A
60 68
61config MPC8610 69config MPC8610
62 bool 70 bool
diff --git a/arch/powerpc/platforms/86xx/Makefile b/arch/powerpc/platforms/86xx/Makefile
index 7c080da4523a..4b0d7b1aa005 100644
--- a/arch/powerpc/platforms/86xx/Makefile
+++ b/arch/powerpc/platforms/86xx/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_MPC8610_HPCD) += mpc8610_hpcd.o
10gef-gpio-$(CONFIG_GPIOLIB) += gef_gpio.o 10gef-gpio-$(CONFIG_GPIOLIB) += gef_gpio.o
11obj-$(CONFIG_GEF_SBC610) += gef_sbc610.o gef_pic.o $(gef-gpio-y) 11obj-$(CONFIG_GEF_SBC610) += gef_sbc610.o gef_pic.o $(gef-gpio-y)
12obj-$(CONFIG_GEF_SBC310) += gef_sbc310.o gef_pic.o $(gef-gpio-y) 12obj-$(CONFIG_GEF_SBC310) += gef_sbc310.o gef_pic.o $(gef-gpio-y)
13obj-$(CONFIG_GEF_PPC9A) += gef_ppc9a.o gef_pic.o $(gef-gpio-y)
diff --git a/arch/powerpc/platforms/86xx/gef_ppc9a.c b/arch/powerpc/platforms/86xx/gef_ppc9a.c
new file mode 100644
index 000000000000..830fd9a23b5a
--- /dev/null
+++ b/arch/powerpc/platforms/86xx/gef_ppc9a.c
@@ -0,0 +1,223 @@
1/*
2 * GE Fanuc PPC9A board support
3 *
4 * Author: Martyn Welch <martyn.welch@gefanuc.com>
5 *
6 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 *
16 * NEC fixup adapted from arch/mips/pci/fixup-lm2e.c
17 */
18
19#include <linux/stddef.h>
20#include <linux/kernel.h>
21#include <linux/pci.h>
22#include <linux/kdev_t.h>
23#include <linux/delay.h>
24#include <linux/seq_file.h>
25#include <linux/of_platform.h>
26
27#include <asm/system.h>
28#include <asm/time.h>
29#include <asm/machdep.h>
30#include <asm/pci-bridge.h>
31#include <asm/mpc86xx.h>
32#include <asm/prom.h>
33#include <mm/mmu_decl.h>
34#include <asm/udbg.h>
35
36#include <asm/mpic.h>
37
38#include <sysdev/fsl_pci.h>
39#include <sysdev/fsl_soc.h>
40
41#include "mpc86xx.h"
42#include "gef_pic.h"
43
44#undef DEBUG
45
46#ifdef DEBUG
47#define DBG (fmt...) do { printk(KERN_ERR "PPC9A: " fmt); } while (0)
48#else
49#define DBG (fmt...) do { } while (0)
50#endif
51
52void __iomem *ppc9a_regs;
53
54static void __init gef_ppc9a_init_irq(void)
55{
56 struct device_node *cascade_node = NULL;
57
58 mpc86xx_init_irq();
59
60 /*
61 * There is a simple interrupt handler in the main FPGA, this needs
62 * to be cascaded into the MPIC
63 */
64 cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic-1.00");
65 if (!cascade_node) {
66 printk(KERN_WARNING "PPC9A: No FPGA PIC\n");
67 return;
68 }
69
70 gef_pic_init(cascade_node);
71 of_node_put(cascade_node);
72}
73
74static void __init gef_ppc9a_setup_arch(void)
75{
76 struct device_node *regs;
77#ifdef CONFIG_PCI
78 struct device_node *np;
79
80 for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
81 fsl_add_bridge(np, 1);
82 }
83#endif
84
85 printk(KERN_INFO "GE Fanuc Intelligent Platforms PPC9A 6U VME SBC\n");
86
87#ifdef CONFIG_SMP
88 mpc86xx_smp_init();
89#endif
90
91 /* Remap basic board registers */
92 regs = of_find_compatible_node(NULL, NULL, "gef,ppc9a-fpga-regs");
93 if (regs) {
94 ppc9a_regs = of_iomap(regs, 0);
95 if (ppc9a_regs == NULL)
96 printk(KERN_WARNING "Unable to map board registers\n");
97 of_node_put(regs);
98 }
99}
100
101/* Return the PCB revision */
102static unsigned int gef_ppc9a_get_pcb_rev(void)
103{
104 unsigned int reg;
105
106 reg = ioread32(ppc9a_regs);
107 return (reg >> 8) & 0xff;
108}
109
110/* Return the board (software) revision */
111static unsigned int gef_ppc9a_get_board_rev(void)
112{
113 unsigned int reg;
114
115 reg = ioread32(ppc9a_regs);
116 return (reg >> 16) & 0xff;
117}
118
119/* Return the FPGA revision */
120static unsigned int gef_ppc9a_get_fpga_rev(void)
121{
122 unsigned int reg;
123
124 reg = ioread32(ppc9a_regs);
125 return (reg >> 24) & 0xf;
126}
127
128static void gef_ppc9a_show_cpuinfo(struct seq_file *m)
129{
130 uint svid = mfspr(SPRN_SVR);
131
132 seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n");
133
134 seq_printf(m, "Revision\t: %u%c\n", gef_ppc9a_get_pcb_rev(),
135 ('A' + gef_ppc9a_get_board_rev() - 1));
136 seq_printf(m, "FPGA Revision\t: %u\n", gef_ppc9a_get_fpga_rev());
137
138 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
139}
140
141static void __init gef_ppc9a_nec_fixup(struct pci_dev *pdev)
142{
143 unsigned int val;
144
145 /* Do not do the fixup on other platforms! */
146 if (!machine_is(gef_ppc9a))
147 return;
148
149 printk(KERN_INFO "Running NEC uPD720101 Fixup\n");
150
151 /* Ensure ports 1, 2, 3, 4 & 5 are enabled */
152 pci_read_config_dword(pdev, 0xe0, &val);
153 pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x5);
154
155 /* System clock is 48-MHz Oscillator and EHCI Enabled. */
156 pci_write_config_dword(pdev, 0xe4, 1 << 5);
157}
158DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
159 gef_ppc9a_nec_fixup);
160
161/*
162 * Called very early, device-tree isn't unflattened
163 *
164 * This function is called to determine whether the BSP is compatible with the
165 * supplied device-tree, which is assumed to be the correct one for the actual
166 * board. It is expected thati, in the future, a kernel may support multiple
167 * boards.
168 */
169static int __init gef_ppc9a_probe(void)
170{
171 unsigned long root = of_get_flat_dt_root();
172
173 if (of_flat_dt_is_compatible(root, "gef,ppc9a"))
174 return 1;
175
176 return 0;
177}
178
179static long __init mpc86xx_time_init(void)
180{
181 unsigned int temp;
182
183 /* Set the time base to zero */
184 mtspr(SPRN_TBWL, 0);
185 mtspr(SPRN_TBWU, 0);
186
187 temp = mfspr(SPRN_HID0);
188 temp |= HID0_TBEN;
189 mtspr(SPRN_HID0, temp);
190 asm volatile("isync");
191
192 return 0;
193}
194
195static __initdata struct of_device_id of_bus_ids[] = {
196 { .compatible = "simple-bus", },
197 {},
198};
199
200static int __init declare_of_platform_devices(void)
201{
202 printk(KERN_DEBUG "Probe platform devices\n");
203 of_platform_bus_probe(NULL, of_bus_ids, NULL);
204
205 return 0;
206}
207machine_device_initcall(gef_ppc9a, declare_of_platform_devices);
208
209define_machine(gef_ppc9a) {
210 .name = "GE Fanuc PPC9A",
211 .probe = gef_ppc9a_probe,
212 .setup_arch = gef_ppc9a_setup_arch,
213 .init_IRQ = gef_ppc9a_init_irq,
214 .show_cpuinfo = gef_ppc9a_show_cpuinfo,
215 .get_irq = mpic_get_irq,
216 .restart = fsl_rstcr_restart,
217 .time_init = mpc86xx_time_init,
218 .calibrate_decr = generic_calibrate_decr,
219 .progress = udbg_progress,
220#ifdef CONFIG_PCI
221 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
222#endif
223};
diff --git a/arch/powerpc/platforms/86xx/gef_sbc310.c b/arch/powerpc/platforms/86xx/gef_sbc310.c
index 0f20172af84b..ba3ce4381611 100644
--- a/arch/powerpc/platforms/86xx/gef_sbc310.c
+++ b/arch/powerpc/platforms/86xx/gef_sbc310.c
@@ -153,6 +153,10 @@ static void __init gef_sbc310_nec_fixup(struct pci_dev *pdev)
153{ 153{
154 unsigned int val; 154 unsigned int val;
155 155
156 /* Do not do the fixup on other platforms! */
157 if (!machine_is(gef_sbc310))
158 return;
159
156 printk(KERN_INFO "Running NEC uPD720101 Fixup\n"); 160 printk(KERN_INFO "Running NEC uPD720101 Fixup\n");
157 161
158 /* Ensure only ports 1 & 2 are enabled */ 162 /* Ensure only ports 1 & 2 are enabled */
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index b4ab3728653e..68b9b8fd9f85 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -1,14 +1,5 @@
1menu "Platform support" 1menu "Platform support"
2 2
3config PPC_MULTIPLATFORM
4 bool
5 depends on PPC64 || 6xx
6 default y
7
8config CLASSIC32
9 def_bool y
10 depends on 6xx && PPC_MULTIPLATFORM
11
12source "arch/powerpc/platforms/pseries/Kconfig" 3source "arch/powerpc/platforms/pseries/Kconfig"
13source "arch/powerpc/platforms/iseries/Kconfig" 4source "arch/powerpc/platforms/iseries/Kconfig"
14source "arch/powerpc/platforms/chrp/Kconfig" 5source "arch/powerpc/platforms/chrp/Kconfig"
@@ -32,12 +23,24 @@ source "arch/powerpc/platforms/amigaone/Kconfig"
32 23
33config PPC_NATIVE 24config PPC_NATIVE
34 bool 25 bool
35 depends on PPC_MULTIPLATFORM 26 depends on 6xx || PPC64
36 help 27 help
37 Support for running natively on the hardware, i.e. without 28 Support for running natively on the hardware, i.e. without
38 a hypervisor. This option is not user-selectable but should 29 a hypervisor. This option is not user-selectable but should
39 be selected by all platforms that need it. 30 be selected by all platforms that need it.
40 31
32config PPC_OF_BOOT_TRAMPOLINE
33 bool "Support booting from Open Firmware or yaboot"
34 depends on 6xx || PPC64
35 default y
36 help
37 Support from booting from Open Firmware or yaboot using an
38 Open Firmware client interface. This enables the kernel to
39 communicate with open firmware to retrieve system informations
40 such as the device tree.
41
42 In case of doubt, say Y
43
41config UDBG_RTAS_CONSOLE 44config UDBG_RTAS_CONSOLE
42 bool "RTAS based debug console" 45 bool "RTAS based debug console"
43 depends on PPC_RTAS 46 depends on PPC_RTAS
@@ -71,7 +74,7 @@ config PPC_I8259
71 74
72config U3_DART 75config U3_DART
73 bool 76 bool
74 depends on PPC_MULTIPLATFORM && PPC64 77 depends on PPC64
75 default n 78 default n
76 79
77config PPC_RTAS 80config PPC_RTAS
@@ -188,7 +191,7 @@ config PPC601_SYNC_FIX
188 191
189config TAU 192config TAU
190 bool "On-chip CPU temperature sensor support" 193 bool "On-chip CPU temperature sensor support"
191 depends on CLASSIC32 194 depends on 6xx
192 help 195 help
193 G3 and G4 processors have an on-chip temperature sensor called the 196 G3 and G4 processors have an on-chip temperature sensor called the
194 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die 197 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 9428c0e11b20..9da795e49337 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -57,9 +57,17 @@ config E200
57 57
58endchoice 58endchoice
59 59
60# Until we have a choice of exclusive CPU types on 64-bit, we always
61# use PPC_BOOK3S. On 32-bit, this is equivalent to 6xx which is
62# "classic" MMU
63
64config PPC_BOOK3S
65 def_bool y
66 depends on PPC64 || 6xx
67
60config POWER4_ONLY 68config POWER4_ONLY
61 bool "Optimize for POWER4" 69 bool "Optimize for POWER4"
62 depends on PPC64 70 depends on PPC64 && PPC_BOOK3S
63 default n 71 default n
64 ---help--- 72 ---help---
65 Cause the compiler to optimize for POWER4/POWER5/PPC970 processors. 73 Cause the compiler to optimize for POWER4/POWER5/PPC970 processors.
@@ -68,16 +76,16 @@ config POWER4_ONLY
68 76
69config POWER3 77config POWER3
70 bool 78 bool
71 depends on PPC64 79 depends on PPC64 && PPC_BOOK3S
72 default y if !POWER4_ONLY 80 default y if !POWER4_ONLY
73 81
74config POWER4 82config POWER4
75 depends on PPC64 83 depends on PPC64 && PPC_BOOK3S
76 def_bool y 84 def_bool y
77 85
78config TUNE_CELL 86config TUNE_CELL
79 bool "Optimize for Cell Broadband Engine" 87 bool "Optimize for Cell Broadband Engine"
80 depends on PPC64 88 depends on PPC64 && PPC_BOOK3S
81 help 89 help
82 Cause the compiler to optimize for the PPE of the Cell Broadband 90 Cause the compiler to optimize for the PPE of the Cell Broadband
83 Engine. This will make the code run considerably faster on Cell 91 Engine. This will make the code run considerably faster on Cell
@@ -147,7 +155,7 @@ config PHYS_64BIT
147 155
148config ALTIVEC 156config ALTIVEC
149 bool "AltiVec Support" 157 bool "AltiVec Support"
150 depends on CLASSIC32 || POWER4 158 depends on 6xx || POWER4
151 ---help--- 159 ---help---
152 This option enables kernel support for the Altivec extensions to the 160 This option enables kernel support for the Altivec extensions to the
153 PowerPC processor. The kernel currently supports saving and restoring 161 PowerPC processor. The kernel currently supports saving and restoring
diff --git a/arch/powerpc/platforms/amigaone/Kconfig b/arch/powerpc/platforms/amigaone/Kconfig
index 9276a96cedee..022476717718 100644
--- a/arch/powerpc/platforms/amigaone/Kconfig
+++ b/arch/powerpc/platforms/amigaone/Kconfig
@@ -1,6 +1,6 @@
1config AMIGAONE 1config AMIGAONE
2 bool "Eyetech AmigaOne/MAI Teron" 2 bool "Eyetech AmigaOne/MAI Teron"
3 depends on PPC32 && BROKEN_ON_SMP && PPC_MULTIPLATFORM 3 depends on 6xx && BROKEN_ON_SMP
4 select PPC_I8259 4 select PPC_I8259
5 select PPC_INDIRECT_PCI 5 select PPC_INDIRECT_PCI
6 select PPC_UDBG_16550 6 select PPC_UDBG_16550
diff --git a/arch/powerpc/platforms/cell/Kconfig b/arch/powerpc/platforms/cell/Kconfig
index 037f59a4bfe7..40e24c39ad06 100644
--- a/arch/powerpc/platforms/cell/Kconfig
+++ b/arch/powerpc/platforms/cell/Kconfig
@@ -23,7 +23,7 @@ config PPC_CELL_NATIVE
23 23
24config PPC_IBM_CELL_BLADE 24config PPC_IBM_CELL_BLADE
25 bool "IBM Cell Blade" 25 bool "IBM Cell Blade"
26 depends on PPC_MULTIPLATFORM && PPC64 26 depends on PPC64 && PPC_BOOK3S
27 select PPC_CELL_NATIVE 27 select PPC_CELL_NATIVE
28 select MMIO_NVRAM 28 select MMIO_NVRAM
29 select PPC_UDBG_16550 29 select PPC_UDBG_16550
@@ -31,7 +31,7 @@ config PPC_IBM_CELL_BLADE
31 31
32config PPC_CELLEB 32config PPC_CELLEB
33 bool "Toshiba's Cell Reference Set 'Celleb' Architecture" 33 bool "Toshiba's Cell Reference Set 'Celleb' Architecture"
34 depends on PPC_MULTIPLATFORM && PPC64 34 depends on PPC64 && PPC_BOOK3S
35 select PPC_CELL_NATIVE 35 select PPC_CELL_NATIVE
36 select HAS_TXX9_SERIAL 36 select HAS_TXX9_SERIAL
37 select PPC_UDBG_BEAT 37 select PPC_UDBG_BEAT
@@ -40,9 +40,14 @@ config PPC_CELLEB
40 40
41config PPC_CELL_QPACE 41config PPC_CELL_QPACE
42 bool "IBM Cell - QPACE" 42 bool "IBM Cell - QPACE"
43 depends on PPC_MULTIPLATFORM && PPC64 43 depends on PPC64 && PPC_BOOK3S
44 select PPC_CELL_COMMON 44 select PPC_CELL_COMMON
45 45
46config AXON_MSI
47 bool
48 depends on PPC_IBM_CELL_BLADE && PCI_MSI
49 default y
50
46menu "Cell Broadband Engine options" 51menu "Cell Broadband Engine options"
47 depends on PPC_CELL 52 depends on PPC_CELL
48 53
diff --git a/arch/powerpc/platforms/cell/Makefile b/arch/powerpc/platforms/cell/Makefile
index 43eccb270301..83fafe922641 100644
--- a/arch/powerpc/platforms/cell/Makefile
+++ b/arch/powerpc/platforms/cell/Makefile
@@ -28,7 +28,7 @@ obj-$(CONFIG_SPU_BASE) += spu_callbacks.o spu_base.o \
28 $(spu-manage-y) \ 28 $(spu-manage-y) \
29 spufs/ 29 spufs/
30 30
31obj-$(CONFIG_PCI_MSI) += axon_msi.o 31obj-$(CONFIG_AXON_MSI) += axon_msi.o
32 32
33# qpace setup 33# qpace setup
34obj-$(CONFIG_PPC_CELL_QPACE) += qpace_setup.o 34obj-$(CONFIG_PPC_CELL_QPACE) += qpace_setup.o
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c
index 9e4f2739341d..d6a519e6e1c1 100644
--- a/arch/powerpc/platforms/cell/spufs/file.c
+++ b/arch/powerpc/platforms/cell/spufs/file.c
@@ -568,16 +568,17 @@ spufs_regs_write(struct file *file, const char __user *buffer,
568 struct spu_lscsa *lscsa = ctx->csa.lscsa; 568 struct spu_lscsa *lscsa = ctx->csa.lscsa;
569 int ret; 569 int ret;
570 570
571 size = min_t(ssize_t, sizeof lscsa->gprs - *pos, size); 571 if (*pos >= sizeof(lscsa->gprs))
572 if (size <= 0)
573 return -EFBIG; 572 return -EFBIG;
573
574 size = min_t(ssize_t, sizeof(lscsa->gprs) - *pos, size);
574 *pos += size; 575 *pos += size;
575 576
576 ret = spu_acquire_saved(ctx); 577 ret = spu_acquire_saved(ctx);
577 if (ret) 578 if (ret)
578 return ret; 579 return ret;
579 580
580 ret = copy_from_user(lscsa->gprs + *pos - size, 581 ret = copy_from_user((char *)lscsa->gprs + *pos - size,
581 buffer, size) ? -EFAULT : size; 582 buffer, size) ? -EFAULT : size;
582 583
583 spu_release_saved(ctx); 584 spu_release_saved(ctx);
@@ -623,10 +624,11 @@ spufs_fpcr_write(struct file *file, const char __user * buffer,
623 struct spu_lscsa *lscsa = ctx->csa.lscsa; 624 struct spu_lscsa *lscsa = ctx->csa.lscsa;
624 int ret; 625 int ret;
625 626
626 size = min_t(ssize_t, sizeof(lscsa->fpcr) - *pos, size); 627 if (*pos >= sizeof(lscsa->fpcr))
627 if (size <= 0)
628 return -EFBIG; 628 return -EFBIG;
629 629
630 size = min_t(ssize_t, sizeof(lscsa->fpcr) - *pos, size);
631
630 ret = spu_acquire_saved(ctx); 632 ret = spu_acquire_saved(ctx);
631 if (ret) 633 if (ret)
632 return ret; 634 return ret;
diff --git a/arch/powerpc/platforms/chrp/Kconfig b/arch/powerpc/platforms/chrp/Kconfig
index 22b4b4e3b6f0..37d438bd5b7a 100644
--- a/arch/powerpc/platforms/chrp/Kconfig
+++ b/arch/powerpc/platforms/chrp/Kconfig
@@ -1,6 +1,6 @@
1config PPC_CHRP 1config PPC_CHRP
2 bool "Common Hardware Reference Platform (CHRP) based machines" 2 bool "Common Hardware Reference Platform (CHRP) based machines"
3 depends on PPC_MULTIPLATFORM && PPC32 3 depends on 6xx
4 select MPIC 4 select MPIC
5 select PPC_I8259 5 select PPC_I8259
6 select PPC_INDIRECT_PCI 6 select PPC_INDIRECT_PCI
diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig
index 4f9f8184d164..291ac9d8cbee 100644
--- a/arch/powerpc/platforms/embedded6xx/Kconfig
+++ b/arch/powerpc/platforms/embedded6xx/Kconfig
@@ -1,6 +1,6 @@
1config EMBEDDED6xx 1config EMBEDDED6xx
2 bool "Embedded 6xx/7xx/7xxx-based boards" 2 bool "Embedded 6xx/7xx/7xxx-based boards"
3 depends on PPC32 && BROKEN_ON_SMP && PPC_MULTIPLATFORM 3 depends on 6xx && BROKEN_ON_SMP
4 4
5config LINKSTATION 5config LINKSTATION
6 bool "Linkstation / Kurobox(HG) from Buffalo" 6 bool "Linkstation / Kurobox(HG) from Buffalo"
diff --git a/arch/powerpc/platforms/iseries/Kconfig b/arch/powerpc/platforms/iseries/Kconfig
index 7ddd0a2c8027..647e87787437 100644
--- a/arch/powerpc/platforms/iseries/Kconfig
+++ b/arch/powerpc/platforms/iseries/Kconfig
@@ -1,6 +1,6 @@
1config PPC_ISERIES 1config PPC_ISERIES
2 bool "IBM Legacy iSeries" 2 bool "IBM Legacy iSeries"
3 depends on PPC_MULTIPLATFORM && PPC64 3 depends on PPC64 && PPC_BOOK3S
4 select PPC_INDIRECT_IO 4 select PPC_INDIRECT_IO
5 select PPC_PCI_CHOICE if EMBEDDED 5 select PPC_PCI_CHOICE if EMBEDDED
6 6
diff --git a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c
index 701d9297c207..94f444758836 100644
--- a/arch/powerpc/platforms/iseries/irq.c
+++ b/arch/powerpc/platforms/iseries/irq.c
@@ -214,7 +214,7 @@ void __init iSeries_activate_IRQs()
214 unsigned long flags; 214 unsigned long flags;
215 215
216 for_each_irq (irq) { 216 for_each_irq (irq) {
217 irq_desc_t *desc = get_irq_desc(irq); 217 struct irq_desc *desc = get_irq_desc(irq);
218 218
219 if (desc && desc->chip && desc->chip->startup) { 219 if (desc && desc->chip && desc->chip->startup) {
220 spin_lock_irqsave(&desc->lock, flags); 220 spin_lock_irqsave(&desc->lock, flags);
diff --git a/arch/powerpc/platforms/maple/Kconfig b/arch/powerpc/platforms/maple/Kconfig
index a6467a5591fa..1ea621a94c3b 100644
--- a/arch/powerpc/platforms/maple/Kconfig
+++ b/arch/powerpc/platforms/maple/Kconfig
@@ -1,5 +1,5 @@
1config PPC_MAPLE 1config PPC_MAPLE
2 depends on PPC_MULTIPLATFORM && PPC64 2 depends on PPC64 && PPC_BOOK3S
3 bool "Maple 970FX Evaluation Board" 3 bool "Maple 970FX Evaluation Board"
4 select PCI 4 select PCI
5 select MPIC 5 select MPIC
diff --git a/arch/powerpc/platforms/pasemi/Kconfig b/arch/powerpc/platforms/pasemi/Kconfig
index 348e0619e3e5..a2aeb327d185 100644
--- a/arch/powerpc/platforms/pasemi/Kconfig
+++ b/arch/powerpc/platforms/pasemi/Kconfig
@@ -1,5 +1,5 @@
1config PPC_PASEMI 1config PPC_PASEMI
2 depends on PPC_MULTIPLATFORM && PPC64 2 depends on PPC64 && PPC_BOOK3S
3 bool "PA Semi SoC-based platforms" 3 bool "PA Semi SoC-based platforms"
4 default n 4 default n
5 select MPIC 5 select MPIC
diff --git a/arch/powerpc/platforms/powermac/Kconfig b/arch/powerpc/platforms/powermac/Kconfig
index 055990ca8ce6..1e1a0873e1dd 100644
--- a/arch/powerpc/platforms/powermac/Kconfig
+++ b/arch/powerpc/platforms/powermac/Kconfig
@@ -1,6 +1,6 @@
1config PPC_PMAC 1config PPC_PMAC
2 bool "Apple PowerMac based machines" 2 bool "Apple PowerMac based machines"
3 depends on PPC_MULTIPLATFORM 3 depends on PPC_BOOK3S
4 select MPIC 4 select MPIC
5 select PCI 5 select PCI
6 select PPC_INDIRECT_PCI if PPC32 6 select PPC_INDIRECT_PCI if PPC32
diff --git a/arch/powerpc/platforms/powermac/pic.h b/arch/powerpc/platforms/powermac/pic.h
index c44c89f5e532..d622a8345aaa 100644
--- a/arch/powerpc/platforms/powermac/pic.h
+++ b/arch/powerpc/platforms/powermac/pic.h
@@ -3,7 +3,7 @@
3 3
4#include <linux/irq.h> 4#include <linux/irq.h>
5 5
6extern struct hw_interrupt_type pmac_pic; 6extern struct irq_chip pmac_pic;
7 7
8extern void pmac_pic_init(void); 8extern void pmac_pic_init(void);
9extern int pmac_get_irq(void); 9extern int pmac_get_irq(void);
diff --git a/arch/powerpc/platforms/prep/Kconfig b/arch/powerpc/platforms/prep/Kconfig
index 29d411279b0c..bf8330ef2e76 100644
--- a/arch/powerpc/platforms/prep/Kconfig
+++ b/arch/powerpc/platforms/prep/Kconfig
@@ -1,6 +1,6 @@
1config PPC_PREP 1config PPC_PREP
2 bool "PowerPC Reference Platform (PReP) based machines" 2 bool "PowerPC Reference Platform (PReP) based machines"
3 depends on PPC_MULTIPLATFORM && PPC32 && BROKEN 3 depends on 6xx && BROKEN
4 select MPIC 4 select MPIC
5 select PPC_I8259 5 select PPC_I8259
6 select PPC_INDIRECT_PCI 6 select PPC_INDIRECT_PCI
diff --git a/arch/powerpc/platforms/ps3/Kconfig b/arch/powerpc/platforms/ps3/Kconfig
index 920cf7a454b1..204ae5c402fa 100644
--- a/arch/powerpc/platforms/ps3/Kconfig
+++ b/arch/powerpc/platforms/ps3/Kconfig
@@ -1,6 +1,6 @@
1config PPC_PS3 1config PPC_PS3
2 bool "Sony PS3" 2 bool "Sony PS3"
3 depends on PPC_MULTIPLATFORM && PPC64 3 depends on PPC64 && PPC_BOOK3S
4 select PPC_CELL 4 select PPC_CELL
5 select USB_ARCH_HAS_OHCI 5 select USB_ARCH_HAS_OHCI
6 select USB_OHCI_LITTLE_ENDIAN 6 select USB_OHCI_LITTLE_ENDIAN
diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig
index ddc2a307cd50..c0e6ec240f46 100644
--- a/arch/powerpc/platforms/pseries/Kconfig
+++ b/arch/powerpc/platforms/pseries/Kconfig
@@ -1,5 +1,5 @@
1config PPC_PSERIES 1config PPC_PSERIES
2 depends on PPC_MULTIPLATFORM && PPC64 2 depends on PPC64 && PPC_BOOK3S
3 bool "IBM pSeries & new (POWER5-based) iSeries" 3 bool "IBM pSeries & new (POWER5-based) iSeries"
4 select MPIC 4 select MPIC
5 select PPC_I8259 5 select PPC_I8259
@@ -25,6 +25,11 @@ config EEH
25 depends on PPC_PSERIES && PCI 25 depends on PPC_PSERIES && PCI
26 default y if !EMBEDDED 26 default y if !EMBEDDED
27 27
28config PSERIES_MSI
29 bool
30 depends on PCI_MSI && EEH
31 default y
32
28config SCANLOG 33config SCANLOG
29 tristate "Scanlog dump interface" 34 tristate "Scanlog dump interface"
30 depends on RTAS_PROC && PPC_PSERIES 35 depends on RTAS_PROC && PPC_PSERIES
diff --git a/arch/powerpc/platforms/pseries/Makefile b/arch/powerpc/platforms/pseries/Makefile
index dfe574af2dc0..0ce691df595f 100644
--- a/arch/powerpc/platforms/pseries/Makefile
+++ b/arch/powerpc/platforms/pseries/Makefile
@@ -15,7 +15,7 @@ obj-$(CONFIG_SCANLOG) += scanlog.o
15obj-$(CONFIG_EEH) += eeh.o eeh_cache.o eeh_driver.o eeh_event.o eeh_sysfs.o 15obj-$(CONFIG_EEH) += eeh.o eeh_cache.o eeh_driver.o eeh_event.o eeh_sysfs.o
16obj-$(CONFIG_KEXEC) += kexec.o 16obj-$(CONFIG_KEXEC) += kexec.o
17obj-$(CONFIG_PCI) += pci.o pci_dlpar.o 17obj-$(CONFIG_PCI) += pci.o pci_dlpar.o
18obj-$(CONFIG_PCI_MSI) += msi.o 18obj-$(CONFIG_PSERIES_MSI) += msi.o
19 19
20obj-$(CONFIG_HOTPLUG_CPU) += hotplug-cpu.o 20obj-$(CONFIG_HOTPLUG_CPU) += hotplug-cpu.o
21obj-$(CONFIG_MEMORY_HOTPLUG) += hotplug-memory.o 21obj-$(CONFIG_MEMORY_HOTPLUG) += hotplug-memory.o
diff --git a/arch/powerpc/platforms/pseries/msi.c b/arch/powerpc/platforms/pseries/msi.c
index 3e0d6ef3eca9..bf2e1ac41308 100644
--- a/arch/powerpc/platforms/pseries/msi.c
+++ b/arch/powerpc/platforms/pseries/msi.c
@@ -356,6 +356,27 @@ static int rtas_msi_check_device(struct pci_dev *pdev, int nvec, int type)
356 return 0; 356 return 0;
357} 357}
358 358
359static int check_msix_entries(struct pci_dev *pdev)
360{
361 struct msi_desc *entry;
362 int expected;
363
364 /* There's no way for us to express to firmware that we want
365 * a discontiguous, or non-zero based, range of MSI-X entries.
366 * So we must reject such requests. */
367
368 expected = 0;
369 list_for_each_entry(entry, &pdev->msi_list, list) {
370 if (entry->msi_attrib.entry_nr != expected) {
371 pr_debug("rtas_msi: bad MSI-X entries.\n");
372 return -EINVAL;
373 }
374 expected++;
375 }
376
377 return 0;
378}
379
359static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) 380static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
360{ 381{
361 struct pci_dn *pdn; 382 struct pci_dn *pdn;
@@ -367,6 +388,9 @@ static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
367 if (!pdn) 388 if (!pdn)
368 return -ENODEV; 389 return -ENODEV;
369 390
391 if (type == PCI_CAP_ID_MSIX && check_msix_entries(pdev))
392 return -EINVAL;
393
370 /* 394 /*
371 * Try the new more explicit firmware interface, if that fails fall 395 * Try the new more explicit firmware interface, if that fails fall
372 * back to the old interface. The old interface is known to never 396 * back to the old interface. The old interface is known to never
diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/cpm2.c
index 474d176a6ec3..fd969f0e3121 100644
--- a/arch/powerpc/sysdev/cpm2.c
+++ b/arch/powerpc/sysdev/cpm2.c
@@ -52,6 +52,7 @@ cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor space */
52 * the communication processor devices. 52 * the communication processor devices.
53 */ 53 */
54cpm2_map_t __iomem *cpm2_immr; 54cpm2_map_t __iomem *cpm2_immr;
55EXPORT_SYMBOL(cpm2_immr);
55 56
56#define CPM_MAP_SIZE (0x40000) /* 256k - the PQ3 reserve this amount 57#define CPM_MAP_SIZE (0x40000) /* 256k - the PQ3 reserve this amount
57 of space for CPM as it is larger 58 of space for CPM as it is larger
diff --git a/drivers/pci/hotplug/Kconfig b/drivers/pci/hotplug/Kconfig
index eacfb13998bb..9aa4fe100a0d 100644
--- a/drivers/pci/hotplug/Kconfig
+++ b/drivers/pci/hotplug/Kconfig
@@ -143,7 +143,7 @@ config HOTPLUG_PCI_SHPC
143 143
144config HOTPLUG_PCI_RPA 144config HOTPLUG_PCI_RPA
145 tristate "RPA PCI Hotplug driver" 145 tristate "RPA PCI Hotplug driver"
146 depends on PPC_PSERIES && PPC64 && !HOTPLUG_PCI_FAKE 146 depends on PPC_PSERIES && EEH && !HOTPLUG_PCI_FAKE
147 help 147 help
148 Say Y here if you have a RPA system that supports PCI Hotplug. 148 Say Y here if you have a RPA system that supports PCI Hotplug.
149 149
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index c7352f7195ee..ecf52e4b80f8 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -772,7 +772,7 @@ config TXX9_WDT
772 772
773config GEF_WDT 773config GEF_WDT
774 tristate "GE Fanuc Watchdog Timer" 774 tristate "GE Fanuc Watchdog Timer"
775 depends on GEF_SBC610 || GEF_SBC310 775 depends on GEF_SBC610 || GEF_SBC310 || GEF_PPC9A
776 ---help--- 776 ---help---
777 Watchdog timer found in a number of GE Fanuc single board computers. 777 Watchdog timer found in a number of GE Fanuc single board computers.
778 778
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 02:45:10 -0500