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-rw-r--r--arch/blackfin/kernel/entry.S5
-rw-r--r--arch/blackfin/lib/divsi3.S3
-rw-r--r--arch/blackfin/lib/ins.S4
-rw-r--r--arch/blackfin/lib/memchr.S2
-rw-r--r--arch/blackfin/lib/memcmp.S2
-rw-r--r--arch/blackfin/lib/memcpy.S2
-rw-r--r--arch/blackfin/lib/memmove.S2
-rw-r--r--arch/blackfin/lib/memset.S2
-rw-r--r--arch/blackfin/lib/modsi3.S2
-rw-r--r--arch/blackfin/lib/outs.S3
-rw-r--r--arch/blackfin/lib/smulsi3_highpart.S2
-rw-r--r--arch/blackfin/lib/udivsi3.S2
-rw-r--r--arch/blackfin/lib/umodsi3.S4
-rw-r--r--arch/blackfin/lib/umulsi3_highpart.S2
-rw-r--r--arch/blackfin/mach-common/cache.S10
-rw-r--r--arch/blackfin/mach-common/cacheinit.S4
-rw-r--r--arch/blackfin/mach-common/cplbhdlr.S4
-rw-r--r--arch/blackfin/mach-common/cplbmgr.S1
-rw-r--r--arch/blackfin/mach-common/entry.S18
-rw-r--r--arch/blackfin/mach-common/interrupt.S2
-rw-r--r--arch/blackfin/mach-common/lock.S4
21 files changed, 72 insertions, 8 deletions
diff --git a/arch/blackfin/kernel/entry.S b/arch/blackfin/kernel/entry.S
index 5880b270bd50..65c5ba4260b0 100644
--- a/arch/blackfin/kernel/entry.S
+++ b/arch/blackfin/kernel/entry.S
@@ -58,10 +58,12 @@ ENTRY(_ret_from_fork)
58 RESTORE_ALL_SYS 58 RESTORE_ALL_SYS
59 p0 = reti; 59 p0 = reti;
60 jump (p0); 60 jump (p0);
61ENDPROC(_ret_from_fork)
61 62
62ENTRY(_sys_fork) 63ENTRY(_sys_fork)
63 r0 = -EINVAL; 64 r0 = -EINVAL;
64 rts; 65 rts;
66ENDPROC(_sys_fork)
65 67
66ENTRY(_sys_vfork) 68ENTRY(_sys_vfork)
67 r0 = sp; 69 r0 = sp;
@@ -72,6 +74,7 @@ ENTRY(_sys_vfork)
72 SP += 12; 74 SP += 12;
73 rets = [sp++]; 75 rets = [sp++];
74 rts; 76 rts;
77ENDPROC(_sys_vfork)
75 78
76ENTRY(_sys_clone) 79ENTRY(_sys_clone)
77 r0 = sp; 80 r0 = sp;
@@ -82,6 +85,7 @@ ENTRY(_sys_clone)
82 SP += 12; 85 SP += 12;
83 rets = [sp++]; 86 rets = [sp++];
84 rts; 87 rts;
88ENDPROC(_sys_clone)
85 89
86ENTRY(_sys_rt_sigreturn) 90ENTRY(_sys_rt_sigreturn)
87 r0 = sp; 91 r0 = sp;
@@ -92,3 +96,4 @@ ENTRY(_sys_rt_sigreturn)
92 SP += 12; 96 SP += 12;
93 rets = [sp++]; 97 rets = [sp++];
94 rts; 98 rts;
99ENDPROC(_sys_rt_sigreturn)
diff --git a/arch/blackfin/lib/divsi3.S b/arch/blackfin/lib/divsi3.S
index 3e29861852b2..2ac59c70dd94 100644
--- a/arch/blackfin/lib/divsi3.S
+++ b/arch/blackfin/lib/divsi3.S
@@ -44,6 +44,7 @@
44 */ 44 */
45 45
46.global ___divsi3; 46.global ___divsi3;
47.type ___divsi3, STT_FUNC;
47 48
48#ifdef CONFIG_ARITHMETIC_OPS_L1 49#ifdef CONFIG_ARITHMETIC_OPS_L1
49.section .l1.text 50.section .l1.text
@@ -214,3 +215,5 @@ ___divsi3 :
214.Lret_zero: 215.Lret_zero:
215 R0 = 0; 216 R0 = 0;
216 RTS; 217 RTS;
218
219.size ___divsi3, .-___divsi3
diff --git a/arch/blackfin/lib/ins.S b/arch/blackfin/lib/ins.S
index 7d5e9846311d..a17cc77ac36f 100644
--- a/arch/blackfin/lib/ins.S
+++ b/arch/blackfin/lib/ins.S
@@ -46,7 +46,7 @@ ENTRY(_insl)
46.Llong_loop_e: NOP; 46.Llong_loop_e: NOP;
47 sti R3; 47 sti R3;
48 RTS; 48 RTS;
49 49ENDPROC(_insl)
50 50
51ENTRY(_insw) 51ENTRY(_insw)
52 P0 = R0; /* P0 = port */ 52 P0 = R0; /* P0 = port */
@@ -61,6 +61,7 @@ ENTRY(_insw)
61.Lword_loop_e: NOP; 61.Lword_loop_e: NOP;
62 sti R3; 62 sti R3;
63 RTS; 63 RTS;
64ENDPROC(_insw)
64 65
65ENTRY(_insb) 66ENTRY(_insb)
66 P0 = R0; /* P0 = port */ 67 P0 = R0; /* P0 = port */
@@ -75,3 +76,4 @@ ENTRY(_insb)
75.Lbyte_loop_e: NOP; 76.Lbyte_loop_e: NOP;
76 sti R3; 77 sti R3;
77 RTS; 78 RTS;
79ENDPROC(_insb)
diff --git a/arch/blackfin/lib/memchr.S b/arch/blackfin/lib/memchr.S
index 498122250d07..5da428134d32 100644
--- a/arch/blackfin/lib/memchr.S
+++ b/arch/blackfin/lib/memchr.S
@@ -67,4 +67,4 @@ ENTRY(_memchr)
67 R0 += -1; 67 R0 += -1;
68 RTS; 68 RTS;
69 69
70.size _memchr,.-_memchr 70ENDPROC(_memchr)
diff --git a/arch/blackfin/lib/memcmp.S b/arch/blackfin/lib/memcmp.S
index 5b9502368fc6..a6b8ee6a6bf2 100644
--- a/arch/blackfin/lib/memcmp.S
+++ b/arch/blackfin/lib/memcmp.S
@@ -107,4 +107,4 @@ ENTRY(_memcmp)
107 P3 = I1; 107 P3 = I1;
108 RTS; 108 RTS;
109 109
110.size _memcmp,.-_memcmp 110ENDPROC(_memcmp)
diff --git a/arch/blackfin/lib/memcpy.S b/arch/blackfin/lib/memcpy.S
index c1e00eff541c..34b5a91c215c 100644
--- a/arch/blackfin/lib/memcpy.S
+++ b/arch/blackfin/lib/memcpy.S
@@ -140,3 +140,5 @@ ENTRY(_memcpy)
140 B[P0--] = R1; 140 B[P0--] = R1;
141 141
142 RTS; 142 RTS;
143
144ENDPROC(_memcpy)
diff --git a/arch/blackfin/lib/memmove.S b/arch/blackfin/lib/memmove.S
index 2e5fb7f8df13..c371585e9dbd 100644
--- a/arch/blackfin/lib/memmove.S
+++ b/arch/blackfin/lib/memmove.S
@@ -100,4 +100,4 @@ ENTRY(_memmove)
100 P3 = I1; 100 P3 = I1;
101 RTS; 101 RTS;
102 102
103.size _memmove,.-_memmove 103ENDPROC(_memmove)
diff --git a/arch/blackfin/lib/memset.S b/arch/blackfin/lib/memset.S
index ba6d047568dd..8159136a29ea 100644
--- a/arch/blackfin/lib/memset.S
+++ b/arch/blackfin/lib/memset.S
@@ -106,4 +106,4 @@ ENTRY(_memset)
106 B[P0++] = R1; 106 B[P0++] = R1;
107 JUMP .Laligned; 107 JUMP .Laligned;
108 108
109.size _memset,.-_memset 109ENDPROC(_memset)
diff --git a/arch/blackfin/lib/modsi3.S b/arch/blackfin/lib/modsi3.S
index 528b8b1ccb34..ca1dd3973b39 100644
--- a/arch/blackfin/lib/modsi3.S
+++ b/arch/blackfin/lib/modsi3.S
@@ -77,3 +77,5 @@ ___modsi3:
77 R0 = 0; 77 R0 = 0;
78.LRETURN_R0: 78.LRETURN_R0:
79 RTS; 79 RTS;
80
81.size ___modsi3, .-___modsi3
diff --git a/arch/blackfin/lib/outs.S b/arch/blackfin/lib/outs.S
index f8c876fe8930..4c3da8ae094e 100644
--- a/arch/blackfin/lib/outs.S
+++ b/arch/blackfin/lib/outs.S
@@ -40,6 +40,7 @@ ENTRY(_outsl)
40.Llong_loop_s: R0 = [P1++]; 40.Llong_loop_s: R0 = [P1++];
41.Llong_loop_e: [P0] = R0; 41.Llong_loop_e: [P0] = R0;
42 RTS; 42 RTS;
43ENDPROC(_outsl)
43 44
44ENTRY(_outsw) 45ENTRY(_outsw)
45 P0 = R0; /* P0 = port */ 46 P0 = R0; /* P0 = port */
@@ -50,6 +51,7 @@ ENTRY(_outsw)
50.Lword_loop_s: R0 = W[P1++]; 51.Lword_loop_s: R0 = W[P1++];
51.Lword_loop_e: W[P0] = R0; 52.Lword_loop_e: W[P0] = R0;
52 RTS; 53 RTS;
54ENDPROC(_outsw)
53 55
54ENTRY(_outsb) 56ENTRY(_outsb)
55 P0 = R0; /* P0 = port */ 57 P0 = R0; /* P0 = port */
@@ -60,3 +62,4 @@ ENTRY(_outsb)
60.Lbyte_loop_s: R0 = B[P1++]; 62.Lbyte_loop_s: R0 = B[P1++];
61.Lbyte_loop_e: B[P0] = R0; 63.Lbyte_loop_e: B[P0] = R0;
62 RTS; 64 RTS;
65ENDPROC(_outsb)
diff --git a/arch/blackfin/lib/smulsi3_highpart.S b/arch/blackfin/lib/smulsi3_highpart.S
index 10b8f8da576f..e383cd3eca5d 100644
--- a/arch/blackfin/lib/smulsi3_highpart.S
+++ b/arch/blackfin/lib/smulsi3_highpart.S
@@ -28,3 +28,5 @@ ___smulsi3_highpart:
28 28
29 R0 = R0 + R1; 29 R0 = R0 + R1;
30 RTS; 30 RTS;
31
32.size ___smulsi3_highpart, .-___smulsi3_highpart
diff --git a/arch/blackfin/lib/udivsi3.S b/arch/blackfin/lib/udivsi3.S
index d39a12916259..58fd96d74766 100644
--- a/arch/blackfin/lib/udivsi3.S
+++ b/arch/blackfin/lib/udivsi3.S
@@ -296,3 +296,5 @@ ENTRY(___udivsi3)
296 R1 = R0 - R3; 296 R1 = R0 - R3;
297 IF CC R0 = R1; 297 IF CC R0 = R1;
298 RTS; 298 RTS;
299
300ENDPROC(___udivsi3)
diff --git a/arch/blackfin/lib/umodsi3.S b/arch/blackfin/lib/umodsi3.S
index b55ce96ab89f..4f2b76ee7626 100644
--- a/arch/blackfin/lib/umodsi3.S
+++ b/arch/blackfin/lib/umodsi3.S
@@ -34,7 +34,9 @@
34#endif 34#endif
35 35
36.extern ___udivsi3; 36.extern ___udivsi3;
37.type ___udivsi3, STT_FUNC;
37.globl ___umodsi3 38.globl ___umodsi3
39.type ___umodsi3, STT_FUNC;
38___umodsi3: 40___umodsi3:
39 41
40 CC=R0==0; 42 CC=R0==0;
@@ -64,3 +66,5 @@ ___umodsi3:
64 R0 = 0; 66 R0 = 0;
65.LRETURN_R0: 67.LRETURN_R0:
66 RTS; 68 RTS;
69
70.size ___umodsi3, .-___umodsi3
diff --git a/arch/blackfin/lib/umulsi3_highpart.S b/arch/blackfin/lib/umulsi3_highpart.S
index aac8218fb258..67b799351e3e 100644
--- a/arch/blackfin/lib/umulsi3_highpart.S
+++ b/arch/blackfin/lib/umulsi3_highpart.S
@@ -21,3 +21,5 @@ ___umulsi3_highpart:
21 R1 = PACK(R1.l,R0.h); 21 R1 = PACK(R1.l,R0.h);
22 R0 = R1 + R2; 22 R0 = R1 + R2;
23 RTS; 23 RTS;
24
25.size ___umulsi3_highpart, .-___umulsi3_highpart
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S
index bb9446ef66ef..8bd2af1935bd 100644
--- a/arch/blackfin/mach-common/cache.S
+++ b/arch/blackfin/mach-common/cache.S
@@ -70,6 +70,7 @@ ENTRY(_cache_invalidate)
70.Lno_dcache_b: 70.Lno_dcache_b:
71 R7 = [SP++]; 71 R7 = [SP++];
72 RTS; 72 RTS;
73ENDPROC(_cache_invalidate)
73 74
74/* Invalidate the Entire Instruction cache by 75/* Invalidate the Entire Instruction cache by
75 * disabling IMC bit 76 * disabling IMC bit
@@ -106,6 +107,8 @@ ENTRY(_invalidate_entire_icache)
106 107
107 ( R7:5) = [SP++]; 108 ( R7:5) = [SP++];
108 RTS; 109 RTS;
110ENDPROC(_invalidate_entire_icache)
111ENDPROC(_icache_invalidate)
109 112
110/* 113/*
111 * blackfin_cache_flush_range(start, end) 114 * blackfin_cache_flush_range(start, end)
@@ -129,6 +132,7 @@ ENTRY(_blackfin_icache_flush_range)
129 IFLUSH [P0]; 132 IFLUSH [P0];
130 SSYNC; 133 SSYNC;
131 RTS; 134 RTS;
135ENDPROC(_blackfin_icache_flush_range)
132 136
133/* 137/*
134 * blackfin_icache_dcache_flush_range(start, end) 138 * blackfin_icache_dcache_flush_range(start, end)
@@ -155,6 +159,7 @@ ENTRY(_blackfin_icache_dcache_flush_range)
155 FLUSH [P0]; 159 FLUSH [P0];
156 SSYNC; 160 SSYNC;
157 RTS; 161 RTS;
162ENDPROC(_blackfin_icache_dcache_flush_range)
158 163
159/* Throw away all D-cached data in specified region without any obligation to 164/* Throw away all D-cached data in specified region without any obligation to
160 * write them back. However, we must clean the D-cached entries around the 165 * write them back. However, we must clean the D-cached entries around the
@@ -183,6 +188,7 @@ ENTRY(_blackfin_dcache_invalidate_range)
183 FLUSHINV[P0]; 188 FLUSHINV[P0];
184 SSYNC; 189 SSYNC;
185 RTS; 190 RTS;
191ENDPROC(_blackfin_dcache_invalidate_range)
186 192
187/* Invalidate the Entire Data cache by 193/* Invalidate the Entire Data cache by
188 * clearing DMC[1:0] bits 194 * clearing DMC[1:0] bits
@@ -221,6 +227,8 @@ ENTRY(_dcache_invalidate)
221 227
222 ( R7:6) = [SP++]; 228 ( R7:6) = [SP++];
223 RTS; 229 RTS;
230ENDPROC(_dcache_invalidate)
231ENDPROC(_invalidate_entire_dcache)
224 232
225ENTRY(_blackfin_dcache_flush_range) 233ENTRY(_blackfin_dcache_flush_range)
226 R2 = -L1_CACHE_BYTES; 234 R2 = -L1_CACHE_BYTES;
@@ -241,6 +249,7 @@ ENTRY(_blackfin_dcache_flush_range)
241 FLUSH[P0]; 249 FLUSH[P0];
242 SSYNC; 250 SSYNC;
243 RTS; 251 RTS;
252ENDPROC(_blackfin_dcache_flush_range)
244 253
245ENTRY(_blackfin_dflush_page) 254ENTRY(_blackfin_dflush_page)
246 P1 = 1 << (PAGE_SHIFT - L1_CACHE_SHIFT); 255 P1 = 1 << (PAGE_SHIFT - L1_CACHE_SHIFT);
@@ -251,3 +260,4 @@ ENTRY(_blackfin_dflush_page)
251.Lfl1: FLUSH [P0++]; 260.Lfl1: FLUSH [P0++];
252 SSYNC; 261 SSYNC;
253 RTS; 262 RTS;
263ENDPROC(_blackfin_dflush_page)
diff --git a/arch/blackfin/mach-common/cacheinit.S b/arch/blackfin/mach-common/cacheinit.S
index 8c17f099e5eb..7924a90d9658 100644
--- a/arch/blackfin/mach-common/cacheinit.S
+++ b/arch/blackfin/mach-common/cacheinit.S
@@ -86,6 +86,8 @@ ENTRY(_bfin_icache_init)
86 SSYNC; 86 SSYNC;
87 STI R2; 87 STI R2;
88 RTS; 88 RTS;
89
90ENDPROC(_bfin_icache_init)
89#endif 91#endif
90 92
91#if defined(CONFIG_BLKFIN_DCACHE) 93#if defined(CONFIG_BLKFIN_DCACHE)
@@ -134,4 +136,6 @@ ENTRY(_bfin_dcache_init)
134 SSYNC; 136 SSYNC;
135 STI R2; 137 STI R2;
136 RTS; 138 RTS;
139
140ENDPROC(_bfin_dcache_init)
137#endif 141#endif
diff --git a/arch/blackfin/mach-common/cplbhdlr.S b/arch/blackfin/mach-common/cplbhdlr.S
index b979067c49ef..2f3c72c23997 100644
--- a/arch/blackfin/mach-common/cplbhdlr.S
+++ b/arch/blackfin/mach-common/cplbhdlr.S
@@ -42,8 +42,6 @@
42 42
43.align 2 43.align 2
44 44
45.global __cplb_hdr;
46.type __cplb_hdr, STT_FUNC;
47ENTRY(__cplb_hdr) 45ENTRY(__cplb_hdr)
48 R2 = SEQSTAT; 46 R2 = SEQSTAT;
49 47
@@ -128,3 +126,5 @@ ENTRY(__cplb_hdr)
128 call _panic_cplb_error; 126 call _panic_cplb_error;
129 SP += 12; 127 SP += 12;
130 JUMP _handle_bad_cplb; 128 JUMP _handle_bad_cplb;
129
130ENDPROC(__cplb_hdr)
diff --git a/arch/blackfin/mach-common/cplbmgr.S b/arch/blackfin/mach-common/cplbmgr.S
index f5efc4bc65e6..e4b47e09cf13 100644
--- a/arch/blackfin/mach-common/cplbmgr.S
+++ b/arch/blackfin/mach-common/cplbmgr.S
@@ -592,6 +592,7 @@ ENTRY(_cplb_mgr)
592 ( R7:4,P5:3 ) = [SP++]; 592 ( R7:4,P5:3 ) = [SP++];
593 R0 = CPLB_RELOADED; 593 R0 = CPLB_RELOADED;
594 RTS; 594 RTS;
595ENDPROC(_cplb_mgr)
595 596
596.data 597.data
597.align 4; 598.align 4;
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index 7d0368772cda..40045b1386ad 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -103,6 +103,7 @@ ENTRY(_ex_dcplb)
103 if !cc jump _return_from_exception; 103 if !cc jump _return_from_exception;
104 /* fall through */ 104 /* fall through */
105#endif 105#endif
106ENDPROC(_ex_dcplb)
106 107
107ENTRY(_ex_icplb) 108ENTRY(_ex_icplb)
108 (R7:6,P5:4) = [sp++]; 109 (R7:6,P5:4) = [sp++];
@@ -113,6 +114,7 @@ ENTRY(_ex_icplb)
113 RESTORE_ALL_SYS 114 RESTORE_ALL_SYS
114 SP = RETN; 115 SP = RETN;
115 rtx; 116 rtx;
117ENDPROC(_ex_icplb)
116 118
117ENTRY(_ex_spinlock) 119ENTRY(_ex_spinlock)
118 /* Transform this into a syscall - twiddle the syscall vector. */ 120 /* Transform this into a syscall - twiddle the syscall vector. */
@@ -123,6 +125,7 @@ ENTRY(_ex_spinlock)
123 [p5] = r7; 125 [p5] = r7;
124 csync; 126 csync;
125 /* Fall through. */ 127 /* Fall through. */
128ENDPROC(_ex_spinlock)
126 129
127ENTRY(_ex_syscall) 130ENTRY(_ex_syscall)
128 DEBUG_START_HWTRACE 131 DEBUG_START_HWTRACE
@@ -131,6 +134,7 @@ ENTRY(_ex_syscall)
131 raise 15; /* invoked by TRAP #0, for sys call */ 134 raise 15; /* invoked by TRAP #0, for sys call */
132 sp = retn; 135 sp = retn;
133 rtx 136 rtx
137ENDPROC(_ex_syscall)
134 138
135ENTRY(_spinlock_bh) 139ENTRY(_spinlock_bh)
136 SAVE_ALL_SYS 140 SAVE_ALL_SYS
@@ -150,12 +154,14 @@ ENTRY(_spinlock_bh)
150 [SP + PT_R0] = R0; 154 [SP + PT_R0] = R0;
151 RESTORE_ALL_SYS 155 RESTORE_ALL_SYS
152 rti; 156 rti;
157ENDPROC(_spinlock_bh)
153 158
154ENTRY(_ex_soft_bp) 159ENTRY(_ex_soft_bp)
155 r7 = retx; 160 r7 = retx;
156 r7 += -2; 161 r7 += -2;
157 retx = r7; 162 retx = r7;
158 jump.s _ex_trap_c; 163 jump.s _ex_trap_c;
164ENDPROC(_ex_soft_bp)
159 165
160ENTRY(_ex_single_step) 166ENTRY(_ex_single_step)
161 r7 = retx; 167 r7 = retx;
@@ -191,6 +197,7 @@ _return_from_exception:
191 ASTAT = [sp++]; 197 ASTAT = [sp++];
192 sp = retn; 198 sp = retn;
193 rtx; 199 rtx;
200ENDPROC(_ex_soft_bp)
194 201
195ENTRY(_handle_bad_cplb) 202ENTRY(_handle_bad_cplb)
196 /* To get here, we just tried and failed to change a CPLB 203 /* To get here, we just tried and failed to change a CPLB
@@ -250,6 +257,7 @@ ENTRY(_ex_trap_c)
250 SP = RETN; 257 SP = RETN;
251 raise 5; 258 raise 5;
252 rtx; 259 rtx;
260ENDPROC(_ex_trap_c)
253 261
254ENTRY(_exception_to_level5) 262ENTRY(_exception_to_level5)
255 SAVE_ALL_SYS 263 SAVE_ALL_SYS
@@ -314,6 +322,7 @@ ENTRY(_exception_to_level5)
314 call _ret_from_exception; 322 call _ret_from_exception;
315 RESTORE_ALL_SYS 323 RESTORE_ALL_SYS
316 rti; 324 rti;
325ENDPROC(_exception_to_level5)
317 326
318ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/ 327ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/
319 /* Since the kernel stack can be anywhere, it's not guaranteed to be 328 /* Since the kernel stack can be anywhere, it's not guaranteed to be
@@ -342,6 +351,7 @@ ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/
342 r7 = -ENOSYS; /* signextending enough */ 351 r7 = -ENOSYS; /* signextending enough */
343 [sp + PT_R0] = r7; /* return value from system call */ 352 [sp + PT_R0] = r7; /* return value from system call */
344 jump .Lsyscall_really_exit; 353 jump .Lsyscall_really_exit;
354ENDPROC(_trap)
345 355
346ENTRY(_kernel_execve) 356ENTRY(_kernel_execve)
347 link SIZEOF_PTREGS; 357 link SIZEOF_PTREGS;
@@ -396,6 +406,7 @@ ENTRY(_kernel_execve)
3961: 4061:
397 unlink; 407 unlink;
398 rts; 408 rts;
409ENDPROC(_kernel_execve)
399 410
400ENTRY(_system_call) 411ENTRY(_system_call)
401 /* Store IPEND */ 412 /* Store IPEND */
@@ -503,6 +514,7 @@ ENTRY(_system_call)
503 r5 = [sp + PT_RESERVED]; 514 r5 = [sp + PT_RESERVED];
504 rets = r5; 515 rets = r5;
505 rts; 516 rts;
517ENDPROC(_system_call)
506 518
507_sys_trace: 519_sys_trace:
508 call _syscall_trace; 520 call _syscall_trace;
@@ -531,6 +543,7 @@ _sys_trace:
531 543
532 call _syscall_trace; 544 call _syscall_trace;
533 jump .Lresume_userspace; 545 jump .Lresume_userspace;
546ENDPROC(_sys_trace)
534 547
535ENTRY(_resume) 548ENTRY(_resume)
536 /* 549 /*
@@ -580,6 +593,7 @@ _new_old_task:
580 * in "new" task. 593 * in "new" task.
581 */ 594 */
582 rts; 595 rts;
596ENDPROC(_resume)
583 597
584ENTRY(_ret_from_exception) 598ENTRY(_ret_from_exception)
585 p2.l = lo(IPEND); 599 p2.l = lo(IPEND);
@@ -638,6 +652,7 @@ ENTRY(_ret_from_exception)
638 syscfg = r0; 652 syscfg = r0;
6395: 6535:
640 rts; 654 rts;
655ENDPROC(_ret_from_exception)
641 656
642ENTRY(_return_from_int) 657ENTRY(_return_from_int)
643 /* If someone else already raised IRQ 15, do nothing. */ 658 /* If someone else already raised IRQ 15, do nothing. */
@@ -680,6 +695,7 @@ ENTRY(_return_from_int)
680 rti; 695 rti;
6812: 6962:
682 rts; 697 rts;
698ENDPROC(_return_from_int)
683 699
684ENTRY(_lower_to_irq14) 700ENTRY(_lower_to_irq14)
685#if defined(ANOMALY_05000281) 701#if defined(ANOMALY_05000281)
@@ -745,6 +761,7 @@ _schedule_and_signal:
7451: 7611:
746 RESTORE_CONTEXT 762 RESTORE_CONTEXT
747 rti; 763 rti;
764ENDPROC(_lower_to_irq14)
748 765
749/* Make sure when we start, that the circular buffer is initialized properly 766/* Make sure when we start, that the circular buffer is initialized properly
750 * R0 and P0 are call clobbered, so we can use them here. 767 * R0 and P0 are call clobbered, so we can use them here.
@@ -758,6 +775,7 @@ ENTRY(_init_exception_buff)
758 p0.l = _out_ptr_excause; 775 p0.l = _out_ptr_excause;
759 [p0] = r0; 776 [p0] = r0;
760 rts; 777 rts;
778ENDPROC(_init_exception_buff)
761 779
762/* 780/*
763 * Put these in the kernel data section - that should always be covered by 781 * Put these in the kernel data section - that should always be covered by
diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S
index dd45664f0d02..b69f517a650b 100644
--- a/arch/blackfin/mach-common/interrupt.S
+++ b/arch/blackfin/mach-common/interrupt.S
@@ -66,6 +66,7 @@ ENTRY(_evt_emulation)
66 SP += 12; 66 SP += 12;
67 /* - GDB stub fills this in by itself (if defined) */ 67 /* - GDB stub fills this in by itself (if defined) */
68 rte; 68 rte;
69ENDPROC(_evt_emulation)
69#endif 70#endif
70 71
71/* Common interrupt entry code. First we do CLI, then push 72/* Common interrupt entry code. First we do CLI, then push
@@ -251,3 +252,4 @@ ENTRY(_evt_system_call)
251#endif 252#endif
252 call _system_call; 253 call _system_call;
253 jump .Lcommon_restore_context; 254 jump .Lcommon_restore_context;
255ENDPROC(_evt_system_call)
diff --git a/arch/blackfin/mach-common/lock.S b/arch/blackfin/mach-common/lock.S
index 2cbb15b33925..386ac8dda076 100644
--- a/arch/blackfin/mach-common/lock.S
+++ b/arch/blackfin/mach-common/lock.S
@@ -155,6 +155,7 @@ ENTRY(_cache_grab_lock)
155 ( R7:0,P5:0 ) = [SP++]; 155 ( R7:0,P5:0 ) = [SP++];
156 156
157 RTS; 157 RTS;
158ENDPROC(_cache_grab_lock)
158 159
159/* After the execution of critical code, the code is now locked into 160/* After the execution of critical code, the code is now locked into
160 * the cache way. Now we need to set ILOC. 161 * the cache way. Now we need to set ILOC.
@@ -186,6 +187,7 @@ ENTRY(_cache_lock)
186 187
187 ( R7:0,P5:0 ) = [SP++]; 188 ( R7:0,P5:0 ) = [SP++];
188 RTS; 189 RTS;
190ENDPROC(_cache_lock)
189 191
190#endif /* BLKFIN_CACHE_LOCK */ 192#endif /* BLKFIN_CACHE_LOCK */
191 193
@@ -193,7 +195,6 @@ ENTRY(_cache_lock)
193 */ 195 */
194 196
195ENTRY(_read_iloc) 197ENTRY(_read_iloc)
196
197 P1.H = (IMEM_CONTROL >> 16); 198 P1.H = (IMEM_CONTROL >> 16);
198 P1.L = (IMEM_CONTROL & 0xFFFF); 199 P1.L = (IMEM_CONTROL & 0xFFFF);
199 R1 = 0xF; 200 R1 = 0xF;
@@ -202,3 +203,4 @@ ENTRY(_read_iloc)
202 R0 = R0 & R1; 203 R0 = R0 & R1;
203 204
204 RTS; 205 RTS;
206ENDPROC(_read_iloc)