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-rw-r--r--arch/sparc64/mm/tsb.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/sparc64/mm/tsb.c b/arch/sparc64/mm/tsb.c
index 6ae2a5a702cb..c5dc4b0cc1c5 100644
--- a/arch/sparc64/mm/tsb.c
+++ b/arch/sparc64/mm/tsb.c
@@ -231,7 +231,13 @@ static void copy_tsb(struct tsb *old_tsb, unsigned long old_size,
231 register unsigned long pte asm("o5"); 231 register unsigned long pte asm("o5");
232 unsigned long v, hash; 232 unsigned long v, hash;
233 233
234 if (tlb_type == cheetah_plus) { 234 if (tlb_type == hypervisor) {
235 __asm__ __volatile__(
236 "ldda [%2] %3, %0"
237 : "=r" (tag), "=r" (pte)
238 : "r" (__pa(&old_tsb[i])),
239 "i" (ASI_QUAD_LDD_PHYS_4V));
240 } else if (tlb_type == cheetah_plus) {
235 __asm__ __volatile__( 241 __asm__ __volatile__(
236 "ldda [%2] %3, %0" 242 "ldda [%2] %3, %0"
237 : "=r" (tag), "=r" (pte) 243 : "=r" (tag), "=r" (pte)
@@ -267,7 +273,8 @@ static void copy_tsb(struct tsb *old_tsb, unsigned long old_size,
267 v |= (i & (512UL - 1UL)) << 13UL; 273 v |= (i & (512UL - 1UL)) << 13UL;
268 274
269 hash = tsb_hash(v, new_nentries); 275 hash = tsb_hash(v, new_nentries);
270 if (tlb_type == cheetah_plus) { 276 if (tlb_type == cheetah_plus ||
277 tlb_type == hypervisor) {
271 __asm__ __volatile__( 278 __asm__ __volatile__(
272 "stxa %0, [%1] %2\n\t" 279 "stxa %0, [%1] %2\n\t"
273 "stxa %3, [%4] %2" 280 "stxa %3, [%4] %2"