19 files changed, 217 insertions, 182 deletions
diff --git a/arch/sparc/kernel/entry.S b/arch/sparc/kernel/entry.S
index 831f540251f8..eac38388f5fd 100644
--- a/arch/sparc/kernel/entry.S
+++ b/arch/sparc/kernel/entry.S
@@ -1749,8 +1749,8 @@ fpload:
 __ndelay:
        save    %sp, -STACKFRAME_SZ, %sp
        mov     %i0, %o0
-        call    .umul
+        call    .umul                   ! round multiplier up so large ns ok
-         mov    0x1ad, %o1              ! 2**32 / (1 000 000 000 / HZ)
+         mov    0x1ae, %o1              ! 2**32 / (1 000 000 000 / HZ)
        call    .umul
         mov    %i1, %o1                ! udelay_val
        ba      delay_continue
@@ -1760,11 +1760,17 @@ __ndelay:
 __udelay:
        save    %sp, -STACKFRAME_SZ, %sp
        mov     %i0, %o0
-        sethi   %hi(0x10c6), %o1
+        sethi   %hi(0x10c7), %o1        ! round multiplier up so large us ok
        call    .umul
-         or     %o1, %lo(0x10c6), %o1   ! 2**32 / 1 000 000
+         or     %o1, %lo(0x10c7), %o1   ! 2**32 / 1 000 000
        call    .umul
         mov    %i1, %o1                ! udelay_val
+        sethi   %hi(0x028f4b62), %l0    ! Add in rounding constant * 2**32,
+        or      %g0, %lo(0x028f4b62), %l0
+        addcc   %o0, %l0, %o0           ! 2**32 * 0.009 999
+        bcs,a   3f
+         add    %o1, 0x01, %o1
+3:
        call    .umul
         mov    HZ, %o0                 ! >>32 earlier for wider range
diff --git a/arch/sparc/kernel/irq.c b/arch/sparc/kernel/irq.c
index f257a67bcf93..75b2240ad0f9 100644
--- a/arch/sparc/kernel/irq.c
+++ b/arch/sparc/kernel/irq.c
@@ -47,6 +47,8 @@
 #include <asm/cacheflush.h>
 #include <asm/irq_regs.h>
+#include "irq.h"
 #ifdef CONFIG_SMP
 #define SMP_NOP2 "nop; nop;\n\t"
 #define SMP_NOP3 "nop; nop; nop;\n\t"
@@ -268,7 +270,7 @@ void free_irq(unsigned int irq, void *dev_id)
        kfree(action);
        if (!sparc_irq[cpu_irq].action)
-                disable_irq(irq);
+                __disable_irq(irq);
 out_unlock:
        spin_unlock_irqrestore(&irq_action_lock, flags);
@@ -464,7 +466,7 @@ int request_fast_irq(unsigned int irq,
        sparc_irq[cpu_irq].action = action;
-        enable_irq(irq);
+        __enable_irq(irq);
        ret = 0;
 out_unlock:
@@ -544,7 +546,7 @@ int request_irq(unsigned int irq,
        *actionp = action;
-        enable_irq(irq);
+        __enable_irq(irq);
        ret = 0;
 out_unlock:
@@ -555,6 +557,25 @@ out:
 EXPORT_SYMBOL(request_irq);
+void disable_irq_nosync(unsigned int irq)
+{
+        return __disable_irq(irq);
+}
+EXPORT_SYMBOL(disable_irq_nosync);
+void disable_irq(unsigned int irq)
+{
+        return __disable_irq(irq);
+}
+EXPORT_SYMBOL(disable_irq);
+void enable_irq(unsigned int irq)
+{
+        return __enable_irq(irq);
+}
+EXPORT_SYMBOL(enable_irq);
 /* We really don't need these at all on the Sparc.  We only have
 * stubs here because they are exported to modules.
 */
diff --git a/arch/sparc/kernel/irq.h b/arch/sparc/kernel/irq.h
new file mode 100644
index 000000000000..32ef3ebd0a88
--- /dev/null
+++ b/arch/sparc/kernel/irq.h
@@ -0,0 +1,68 @@
+#include <asm/btfixup.h>
+/* Dave Redman (djhr@tadpole.co.uk)
+ * changed these to function pointers.. it saves cycles and will allow
+ * the irq dependencies to be split into different files at a later date
+ * sun4c_irq.c, sun4m_irq.c etc so we could reduce the kernel size.
+ * Jakub Jelinek (jj@sunsite.mff.cuni.cz)
+ * Changed these to btfixup entities... It saves cycles :)
+ */
+BTFIXUPDEF_CALL(void, disable_irq, unsigned int)
+BTFIXUPDEF_CALL(void, enable_irq, unsigned int)
+BTFIXUPDEF_CALL(void, disable_pil_irq, unsigned int)
+BTFIXUPDEF_CALL(void, enable_pil_irq, unsigned int)
+BTFIXUPDEF_CALL(void, clear_clock_irq, void)
+BTFIXUPDEF_CALL(void, clear_profile_irq, int)
+BTFIXUPDEF_CALL(void, load_profile_irq, int, unsigned int)
+static inline void __disable_irq(unsigned int irq)
+{
+        BTFIXUP_CALL(disable_irq)(irq);
+}
+static inline void __enable_irq(unsigned int irq)
+{
+        BTFIXUP_CALL(enable_irq)(irq);
+}
+static inline void disable_pil_irq(unsigned int irq)
+{
+        BTFIXUP_CALL(disable_pil_irq)(irq);
+}
+static inline void enable_pil_irq(unsigned int irq)
+{
+        BTFIXUP_CALL(enable_pil_irq)(irq);
+}
+static inline void clear_clock_irq(void)
+{
+        BTFIXUP_CALL(clear_clock_irq)();
+}
+static inline void clear_profile_irq(int irq)
+{
+        BTFIXUP_CALL(clear_profile_irq)(irq);
+}
+static inline void load_profile_irq(int cpu, int limit)
+{
+        BTFIXUP_CALL(load_profile_irq)(cpu, limit);
+}
+extern void (*sparc_init_timers)(irq_handler_t lvl10_irq);
+extern void claim_ticker14(irq_handler_t irq_handler,
+                           int irq,
+                           unsigned int timeout);
+#ifdef CONFIG_SMP
+BTFIXUPDEF_CALL(void, set_cpu_int, int, int)
+BTFIXUPDEF_CALL(void, clear_cpu_int, int, int)
+BTFIXUPDEF_CALL(void, set_irq_udt, int)
+#define set_cpu_int(cpu,level) BTFIXUP_CALL(set_cpu_int)(cpu,level)
+#define clear_cpu_int(cpu,level) BTFIXUP_CALL(clear_cpu_int)(cpu,level)
+#define set_irq_udt(cpu) BTFIXUP_CALL(set_irq_udt)(cpu)
+#endif
diff --git a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c
index 791771196905..f2eae457fc9a 100644
--- a/arch/sparc/kernel/pcic.c
+++ b/arch/sparc/kernel/pcic.c
@@ -36,6 +36,7 @@
 #include <asm/uaccess.h>
 #include <asm/irq_regs.h>
+#include "irq.h"
 /*
 * I studied different documents and many live PROMs both from 2.30
diff --git a/arch/sparc/kernel/smp.c b/arch/sparc/kernel/smp.c
index 4fea3ac7bff0..6724ab90f82b 100644
--- a/arch/sparc/kernel/smp.c
+++ b/arch/sparc/kernel/smp.c
@@ -33,6 +33,8 @@
 #include <asm/tlbflush.h>
 #include <asm/cpudata.h>
+#include "irq.h"
 int smp_num_cpus = 1;
 volatile unsigned long cpu_callin_map[NR_CPUS] __initdata = {0,};
 unsigned char boot_cpu_id = 0;
diff --git a/arch/sparc/kernel/sparc_ksyms.c b/arch/sparc/kernel/sparc_ksyms.c
index d8e008a04e2b..55bac516dfe2 100644
--- a/arch/sparc/kernel/sparc_ksyms.c
+++ b/arch/sparc/kernel/sparc_ksyms.c
@@ -154,8 +154,6 @@ EXPORT_SYMBOL(BTFIXUP_CALL(___xchg32));
 #else
 EXPORT_SYMBOL(BTFIXUP_CALL(__hard_smp_processor_id));
 #endif
-EXPORT_SYMBOL(BTFIXUP_CALL(enable_irq));
-EXPORT_SYMBOL(BTFIXUP_CALL(disable_irq));
 EXPORT_SYMBOL(BTFIXUP_CALL(mmu_unlockarea));
 EXPORT_SYMBOL(BTFIXUP_CALL(mmu_lockarea));
 EXPORT_SYMBOL(BTFIXUP_CALL(mmu_get_scsi_sgl));
diff --git a/arch/sparc/kernel/sun4c_irq.c b/arch/sparc/kernel/sun4c_irq.c
index 009e891a4329..c6ac9fc52563 100644
--- a/arch/sparc/kernel/sun4c_irq.c
+++ b/arch/sparc/kernel/sun4c_irq.c
@@ -18,6 +18,7 @@
 #include <linux/interrupt.h>
 #include <linux/slab.h>
 #include <linux/init.h>
+#include "irq.h"
 #include <asm/ptrace.h>
 #include <asm/processor.h>
@@ -40,6 +41,20 @@ static struct resource sun4c_timer_eb = { "sun4c_timer" };
 static struct resource sun4c_intr_eb = { "sun4c_intr" };
 #endif
+/*
+ * Bit field defines for the interrupt registers on various
+ * Sparc machines.
+ */
+/* The sun4c interrupt register. */
+#define SUN4C_INT_ENABLE  0x01     /* Allow interrupts. */
+#define SUN4C_INT_E14     0x80     /* Enable level 14 IRQ. */
+#define SUN4C_INT_E10     0x20     /* Enable level 10 IRQ. */
+#define SUN4C_INT_E8      0x10     /* Enable level 8 IRQ. */
+#define SUN4C_INT_E6      0x08     /* Enable level 6 IRQ. */
+#define SUN4C_INT_E4      0x04     /* Enable level 4 IRQ. */
+#define SUN4C_INT_E1      0x02     /* Enable level 1 IRQ. */
 /* Pointer to the interrupt enable byte
 *
 * Dave Redman (djhr@tadpole.co.uk)
diff --git a/arch/sparc/kernel/sun4d_irq.c b/arch/sparc/kernel/sun4d_irq.c
index 396797e20c39..e0efab2a6bef 100644
--- a/arch/sparc/kernel/sun4d_irq.c
+++ b/arch/sparc/kernel/sun4d_irq.c
@@ -39,6 +39,8 @@
 #include <asm/cacheflush.h>
 #include <asm/irq_regs.h>
+#include "irq.h"
 /* If you trust current SCSI layer to handle different SCSI IRQs, enable this. I don't trust it... -jj */
 /* #define DISTRIBUTE_IRQS */
@@ -188,7 +190,7 @@ void sun4d_free_irq(unsigned int irq, void *dev_id)
        kfree(action);
        if (!(*actionp))
-                disable_irq(irq);
+                __disable_irq(irq);
 out_unlock:
        spin_unlock_irqrestore(&irq_action_lock, flags);
@@ -346,7 +348,7 @@ int sun4d_request_irq(unsigned int irq,
        else
                *actionp = action;
                
-        enable_irq(irq);
+        __enable_irq(irq);
        ret = 0;
 out_unlock:
diff --git a/arch/sparc/kernel/sun4d_smp.c b/arch/sparc/kernel/sun4d_smp.c
index 098c94f1a322..89a6de95070c 100644
--- a/arch/sparc/kernel/sun4d_smp.c
+++ b/arch/sparc/kernel/sun4d_smp.c
@@ -36,6 +36,7 @@
 #include <asm/cacheflush.h>
 #include <asm/cpudata.h>
+#include "irq.h"
 #define IRQ_CROSS_CALL          15
 extern ctxd_t *srmmu_ctx_table_phys;
diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c
index 91a803ea88be..b92d6d2d5b04 100644
--- a/arch/sparc/kernel/sun4m_irq.c
+++ b/arch/sparc/kernel/sun4m_irq.c
@@ -38,11 +38,85 @@
 #include <asm/sbus.h>
 #include <asm/cacheflush.h>
+#include "irq.h"
+/* On the sun4m, just like the timers, we have both per-cpu and master
+ * interrupt registers.
+ */
+/* These registers are used for sending/receiving irqs from/to
+ * different cpu's.
+ */
+struct sun4m_intreg_percpu {
+        unsigned int tbt;        /* Interrupts still pending for this cpu. */
+        /* These next two registers are WRITE-ONLY and are only
+         * "on bit" sensitive, "off bits" written have NO affect.
+         */
+        unsigned int clear;  /* Clear this cpus irqs here. */
+        unsigned int set;    /* Set this cpus irqs here. */
+        unsigned char space[PAGE_SIZE - 12];
+};
+/*
+ * djhr
+ * Actually the clear and set fields in this struct are misleading..
+ * according to the SLAVIO manual (and the same applies for the SEC)
+ * the clear field clears bits in the mask which will ENABLE that IRQ
+ * the set field sets bits in the mask to DISABLE the IRQ.
+ *
+ * Also the undirected_xx address in the SLAVIO is defined as
+ * RESERVED and write only..
+ *
+ * DAVEM_NOTE: The SLAVIO only specifies behavior on uniprocessor
+ *             sun4m machines, for MP the layout makes more sense.
+ */
+struct sun4m_intregs {
+        struct sun4m_intreg_percpu cpu_intregs[SUN4M_NCPUS];
+        unsigned int tbt;                /* IRQ's that are still pending. */
+        unsigned int irqs;               /* Master IRQ bits. */
+        /* Again, like the above, two these registers are WRITE-ONLY. */
+        unsigned int clear;              /* Clear master IRQ's by setting bits here. */
+        unsigned int set;                /* Set master IRQ's by setting bits here. */
+        /* This register is both READ and WRITE. */
+        unsigned int undirected_target;  /* Which cpu gets undirected irqs. */
+};
 static unsigned long dummy;
 struct sun4m_intregs *sun4m_interrupts;
 unsigned long *irq_rcvreg = &dummy;
+/* Dave Redman (djhr@tadpole.co.uk)
+ * The sun4m interrupt registers.
+ */
+#define SUN4M_INT_ENABLE        0x80000000
+#define SUN4M_INT_E14           0x00000080
+#define SUN4M_INT_E10           0x00080000
+#define SUN4M_HARD_INT(x)       (0x000000001 << (x))
+#define SUN4M_SOFT_INT(x)       (0x000010000 << (x))
+#define SUN4M_INT_MASKALL       0x80000000        /* mask all interrupts */
+#define SUN4M_INT_MODULE_ERR    0x40000000        /* module error */
+#define SUN4M_INT_M2S_WRITE     0x20000000        /* write buffer error */
+#define SUN4M_INT_ECC           0x10000000        /* ecc memory error */
+#define SUN4M_INT_FLOPPY        0x00400000        /* floppy disk */
+#define SUN4M_INT_MODULE        0x00200000        /* module interrupt */
+#define SUN4M_INT_VIDEO         0x00100000        /* onboard video */
+#define SUN4M_INT_REALTIME      0x00080000        /* system timer */
+#define SUN4M_INT_SCSI          0x00040000        /* onboard scsi */
+#define SUN4M_INT_AUDIO         0x00020000        /* audio/isdn */
+#define SUN4M_INT_ETHERNET      0x00010000        /* onboard ethernet */
+#define SUN4M_INT_SERIAL        0x00008000        /* serial ports */
+#define SUN4M_INT_KBDMS         0x00004000        /* keyboard/mouse */
+#define SUN4M_INT_SBUSBITS      0x00003F80        /* sbus int bits */
+#define SUN4M_INT_SBUS(x)       (1 << (x+7))
+#define SUN4M_INT_VME(x)        (1 << (x))
 /* These tables only apply for interrupts greater than 15..
 * 
 * any intr value below 0x10 is considered to be a soft-int
diff --git a/arch/sparc/kernel/sun4m_smp.c b/arch/sparc/kernel/sun4m_smp.c
index 63ed19bfd028..730eb5796f8e 100644
--- a/arch/sparc/kernel/sun4m_smp.c
+++ b/arch/sparc/kernel/sun4m_smp.c
@@ -31,6 +31,8 @@
 #include <asm/oplib.h>
 #include <asm/cpudata.h>
+#include "irq.h"
 #define IRQ_RESCHEDULE          13
 #define IRQ_STOP_CPU            14
 #define IRQ_CROSS_CALL          15
diff --git a/arch/sparc/kernel/tick14.c b/arch/sparc/kernel/tick14.c
index f1a7bd19e04f..707bfda86570 100644
--- a/arch/sparc/kernel/tick14.c
+++ b/arch/sparc/kernel/tick14.c
@@ -25,6 +25,8 @@
 #include <asm/irq.h>
 #include <asm/io.h>
+#include "irq.h"
 extern unsigned long lvl14_save[5];
 static unsigned long *linux_lvl14 = NULL;
 static unsigned long obp_lvl14[4];
@@ -62,7 +64,7 @@ void claim_ticker14(irq_handler_t handler,
        /* first we copy the obp handler instructions
         */
-        disable_irq(irq_nr);
+        __disable_irq(irq_nr);
        if (!handler)
                return;
    
@@ -79,6 +81,6 @@ void claim_ticker14(irq_handler_t handler,
                         NULL)) {
                install_linux_ticker();
                load_profile_irq(cpu, timeout);
-                enable_irq(irq_nr);
+                __enable_irq(irq_nr);
        }
 }
diff --git a/arch/sparc/kernel/time.c b/arch/sparc/kernel/time.c
index f2fdbb3664d3..6a2513321620 100644
--- a/arch/sparc/kernel/time.c
+++ b/arch/sparc/kernel/time.c
@@ -44,6 +44,8 @@
 #include <asm/of_device.h>
 #include <asm/irq_regs.h>
+#include "irq.h"
 DEFINE_SPINLOCK(rtc_lock);
 enum sparc_clock_type sp_clock_typ;
 DEFINE_SPINLOCK(mostek_lock);
diff --git a/arch/sparc/mm/init.c b/arch/sparc/mm/init.c
index a532922e2e35..a1bef07755a9 100644
--- a/arch/sparc/mm/init.c
+++ b/arch/sparc/mm/init.c
@@ -308,6 +308,9 @@ extern void sun4c_paging_init(void);
 extern void srmmu_paging_init(void);
 extern void device_scan(void);
+pgprot_t PAGE_SHARED __read_mostly;
+EXPORT_SYMBOL(PAGE_SHARED);
 void __init paging_init(void)
 {
        switch(sparc_cpu_model) {
diff --git a/arch/sparc/mm/srmmu.c b/arch/sparc/mm/srmmu.c
index ca26232da7ab..17b485f2825c 100644
--- a/arch/sparc/mm/srmmu.c
+++ b/arch/sparc/mm/srmmu.c
@@ -2154,7 +2154,7 @@ void __init ld_mmu_srmmu(void)
        BTFIXUPSET_SIMM13(ptrs_per_pgd, SRMMU_PTRS_PER_PGD);
        BTFIXUPSET_INT(page_none, pgprot_val(SRMMU_PAGE_NONE));
-        BTFIXUPSET_INT(page_shared, pgprot_val(SRMMU_PAGE_SHARED));
+        PAGE_SHARED = pgprot_val(SRMMU_PAGE_SHARED);
        BTFIXUPSET_INT(page_copy, pgprot_val(SRMMU_PAGE_COPY));
        BTFIXUPSET_INT(page_readonly, pgprot_val(SRMMU_PAGE_RDONLY));
        BTFIXUPSET_INT(page_kernel, pgprot_val(SRMMU_PAGE_KERNEL));
diff --git a/arch/sparc/mm/sun4c.c b/arch/sparc/mm/sun4c.c
index bdd835fba02e..a57a366e339a 100644
--- a/arch/sparc/mm/sun4c.c
+++ b/arch/sparc/mm/sun4c.c
@@ -2155,7 +2155,7 @@ void __init ld_mmu_sun4c(void)
        BTFIXUPSET_SIMM13(user_ptrs_per_pgd, KERNBASE / SUN4C_PGDIR_SIZE);
        BTFIXUPSET_INT(page_none, pgprot_val(SUN4C_PAGE_NONE));
-        BTFIXUPSET_INT(page_shared, pgprot_val(SUN4C_PAGE_SHARED));
+        PAGE_SHARED = pgprot_val(SUN4C_PAGE_SHARED);
        BTFIXUPSET_INT(page_copy, pgprot_val(SUN4C_PAGE_COPY));
        BTFIXUPSET_INT(page_readonly, pgprot_val(SUN4C_PAGE_READONLY));
        BTFIXUPSET_INT(page_kernel, pgprot_val(SUN4C_PAGE_KERNEL));
diff --git a/arch/sparc64/kernel/sparc64_ksyms.c b/arch/sparc64/kernel/sparc64_ksyms.c
index 7d36531aa5b9..d270c2f0be0f 100644
--- a/arch/sparc64/kernel/sparc64_ksyms.c
+++ b/arch/sparc64/kernel/sparc64_ksyms.c
@@ -280,6 +280,7 @@ EXPORT_SYMBOL(sys_getgid);
 EXPORT_SYMBOL(svr4_getcontext);
 EXPORT_SYMBOL(svr4_setcontext);
 EXPORT_SYMBOL(compat_sys_ioctl);
+EXPORT_SYMBOL(sys_ioctl);
 EXPORT_SYMBOL(sparc32_open);
 #endif
diff --git a/include/asm-sparc/irq.h b/include/asm-sparc/irq.h
index ff520ea97473..afb88a5973f0 100644
--- a/include/asm-sparc/irq.h
+++ b/include/asm-sparc/irq.h
@@ -7,178 +7,16 @@
 #ifndef _SPARC_IRQ_H
 #define _SPARC_IRQ_H
-#include <linux/linkage.h>
-#include <linux/threads.h>     /* For NR_CPUS */
 #include <linux/interrupt.h>
-#include <asm/system.h>     /* For SUN4M_NCPUS */
-#include <asm/btfixup.h>
-#define __irq_ino(irq) irq
-#define __irq_pil(irq) irq
 #define NR_IRQS    16
 #define irq_canonicalize(irq)   (irq)
-/* Dave Redman (djhr@tadpole.co.uk)
+extern void disable_irq_nosync(unsigned int irq);
- * changed these to function pointers.. it saves cycles and will allow
+extern void disable_irq(unsigned int irq);
- * the irq dependencies to be split into different files at a later date
+extern void enable_irq(unsigned int irq);
- * sun4c_irq.c, sun4m_irq.c etc so we could reduce the kernel size.
- * Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- * Changed these to btfixup entities... It saves cycles :)
- */
-BTFIXUPDEF_CALL(void, disable_irq, unsigned int)
-BTFIXUPDEF_CALL(void, enable_irq, unsigned int)
-BTFIXUPDEF_CALL(void, disable_pil_irq, unsigned int)
-BTFIXUPDEF_CALL(void, enable_pil_irq, unsigned int)
-BTFIXUPDEF_CALL(void, clear_clock_irq, void)
-BTFIXUPDEF_CALL(void, clear_profile_irq, int)
-BTFIXUPDEF_CALL(void, load_profile_irq, int, unsigned int)
-static inline void disable_irq_nosync(unsigned int irq)
-{
-        BTFIXUP_CALL(disable_irq)(irq);
-}
-static inline void disable_irq(unsigned int irq)
-{
-        BTFIXUP_CALL(disable_irq)(irq);
-}
-static inline void enable_irq(unsigned int irq)
-{
-        BTFIXUP_CALL(enable_irq)(irq);
-}
-static inline void disable_pil_irq(unsigned int irq)
-{
-        BTFIXUP_CALL(disable_pil_irq)(irq);
-}
-static inline void enable_pil_irq(unsigned int irq)
-{
-        BTFIXUP_CALL(enable_pil_irq)(irq);
-}
-static inline void clear_clock_irq(void)
-{
-        BTFIXUP_CALL(clear_clock_irq)();
-}
-static inline void clear_profile_irq(int irq)
-{
-        BTFIXUP_CALL(clear_profile_irq)(irq);
-}
-static inline void load_profile_irq(int cpu, int limit)
-{
-        BTFIXUP_CALL(load_profile_irq)(cpu, limit);
-}
-extern void (*sparc_init_timers)(irq_handler_t lvl10_irq);
-extern void claim_ticker14(irq_handler_t irq_handler,
-                           int irq,
-                           unsigned int timeout);
-#ifdef CONFIG_SMP
-BTFIXUPDEF_CALL(void, set_cpu_int, int, int)
-BTFIXUPDEF_CALL(void, clear_cpu_int, int, int)
-BTFIXUPDEF_CALL(void, set_irq_udt, int)
-#define set_cpu_int(cpu,level) BTFIXUP_CALL(set_cpu_int)(cpu,level)
-#define clear_cpu_int(cpu,level) BTFIXUP_CALL(clear_cpu_int)(cpu,level)
-#define set_irq_udt(cpu) BTFIXUP_CALL(set_irq_udt)(cpu)
-#endif
 extern int request_fast_irq(unsigned int irq, irq_handler_t handler, unsigned long flags, __const__ char *devname);
-/* On the sun4m, just like the timers, we have both per-cpu and master
- * interrupt registers.
- */
-/* These registers are used for sending/receiving irqs from/to
- * different cpu's.
- */
-struct sun4m_intreg_percpu {
-        unsigned int tbt;        /* Interrupts still pending for this cpu. */
-        /* These next two registers are WRITE-ONLY and are only
-         * "on bit" sensitive, "off bits" written have NO affect.
-         */
-        unsigned int clear;  /* Clear this cpus irqs here. */
-        unsigned int set;    /* Set this cpus irqs here. */
-        unsigned char space[PAGE_SIZE - 12];
-};
-/*
- * djhr
- * Actually the clear and set fields in this struct are misleading..
- * according to the SLAVIO manual (and the same applies for the SEC)
- * the clear field clears bits in the mask which will ENABLE that IRQ
- * the set field sets bits in the mask to DISABLE the IRQ.
- *
- * Also the undirected_xx address in the SLAVIO is defined as
- * RESERVED and write only..
- *
- * DAVEM_NOTE: The SLAVIO only specifies behavior on uniprocessor
- *             sun4m machines, for MP the layout makes more sense.
- */
-struct sun4m_intregs {
-        struct sun4m_intreg_percpu cpu_intregs[SUN4M_NCPUS];
-        unsigned int tbt;                /* IRQ's that are still pending. */
-        unsigned int irqs;               /* Master IRQ bits. */
-        /* Again, like the above, two these registers are WRITE-ONLY. */
-        unsigned int clear;              /* Clear master IRQ's by setting bits here. */
-        unsigned int set;                /* Set master IRQ's by setting bits here. */
-        /* This register is both READ and WRITE. */
-        unsigned int undirected_target;  /* Which cpu gets undirected irqs. */
-};
-extern struct sun4m_intregs *sun4m_interrupts;
-/* 
- * Bit field defines for the interrupt registers on various
- * Sparc machines.
- */
-/* The sun4c interrupt register. */
-#define SUN4C_INT_ENABLE  0x01     /* Allow interrupts. */
-#define SUN4C_INT_E14     0x80     /* Enable level 14 IRQ. */
-#define SUN4C_INT_E10     0x20     /* Enable level 10 IRQ. */
-#define SUN4C_INT_E8      0x10     /* Enable level 8 IRQ. */
-#define SUN4C_INT_E6      0x08     /* Enable level 6 IRQ. */
-#define SUN4C_INT_E4      0x04     /* Enable level 4 IRQ. */
-#define SUN4C_INT_E1      0x02     /* Enable level 1 IRQ. */
-/* Dave Redman (djhr@tadpole.co.uk)
- * The sun4m interrupt registers.
- */
-#define SUN4M_INT_ENABLE        0x80000000
-#define SUN4M_INT_E14           0x00000080
-#define SUN4M_INT_E10           0x00080000
-#define SUN4M_HARD_INT(x)       (0x000000001 << (x))
-#define SUN4M_SOFT_INT(x)       (0x000010000 << (x))
-#define SUN4M_INT_MASKALL       0x80000000        /* mask all interrupts */
-#define SUN4M_INT_MODULE_ERR    0x40000000        /* module error */
-#define SUN4M_INT_M2S_WRITE     0x20000000        /* write buffer error */
-#define SUN4M_INT_ECC           0x10000000        /* ecc memory error */
-#define SUN4M_INT_FLOPPY        0x00400000        /* floppy disk */
-#define SUN4M_INT_MODULE        0x00200000        /* module interrupt */
-#define SUN4M_INT_VIDEO         0x00100000        /* onboard video */
-#define SUN4M_INT_REALTIME      0x00080000        /* system timer */
-#define SUN4M_INT_SCSI          0x00040000        /* onboard scsi */
-#define SUN4M_INT_AUDIO         0x00020000        /* audio/isdn */
-#define SUN4M_INT_ETHERNET      0x00010000        /* onboard ethernet */
-#define SUN4M_INT_SERIAL        0x00008000        /* serial ports */
-#define SUN4M_INT_KBDMS         0x00004000        /* keyboard/mouse */
-#define SUN4M_INT_SBUSBITS      0x00003F80        /* sbus int bits */
-#define SUN4M_INT_SBUS(x)       (1 << (x+7))
-#define SUN4M_INT_VME(x)        (1 << (x))
 #endif
diff --git a/include/asm-sparc/pgtable.h b/include/asm-sparc/pgtable.h
index a55f4c3488b0..2cc235b74d94 100644
--- a/include/asm-sparc/pgtable.h
+++ b/include/asm-sparc/pgtable.h
@@ -46,7 +46,6 @@ BTFIXUPDEF_SIMM13(user_ptrs_per_pgd)
 #define pgd_ERROR(e)   __builtin_trap()
 BTFIXUPDEF_INT(page_none)
-BTFIXUPDEF_INT(page_shared)
 BTFIXUPDEF_INT(page_copy)
 BTFIXUPDEF_INT(page_readonly)
 BTFIXUPDEF_INT(page_kernel)
@@ -66,7 +65,7 @@ BTFIXUPDEF_INT(page_kernel)
 #define PTE_SIZE                (PTRS_PER_PTE*4)
 #define PAGE_NONE      __pgprot(BTFIXUP_INT(page_none))
-#define PAGE_SHARED    __pgprot(BTFIXUP_INT(page_shared))
+extern pgprot_t PAGE_SHARED;
 #define PAGE_COPY      __pgprot(BTFIXUP_INT(page_copy))
 #define PAGE_READONLY  __pgprot(BTFIXUP_INT(page_readonly))