aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--arch/powerpc/platforms/cell/cbe_regs.h8
-rw-r--r--arch/powerpc/platforms/cell/pervasive.c26
2 files changed, 32 insertions, 2 deletions
diff --git a/arch/powerpc/platforms/cell/cbe_regs.h b/arch/powerpc/platforms/cell/cbe_regs.h
index 17d597144877..b24025f2ac7a 100644
--- a/arch/powerpc/platforms/cell/cbe_regs.h
+++ b/arch/powerpc/platforms/cell/cbe_regs.h
@@ -113,10 +113,14 @@ struct cbe_pmd_regs {
113 u64 checkstop_fir; /* 0x0c00 */ 113 u64 checkstop_fir; /* 0x0c00 */
114 u64 recoverable_fir; /* 0x0c08 */ 114 u64 recoverable_fir; /* 0x0c08 */
115 u64 spec_att_mchk_fir; /* 0x0c10 */ 115 u64 spec_att_mchk_fir; /* 0x0c10 */
116 u64 fir_mode_reg; /* 0x0c18 */ 116 u32 fir_mode_reg; /* 0x0c18 */
117 u8 pad_0x0c1c_0x0c20 [4]; /* 0x0c1c */
118#define CBE_PMD_FIR_MODE_M8 0x00800
117 u64 fir_enable_mask; /* 0x0c20 */ 119 u64 fir_enable_mask; /* 0x0c20 */
118 120
119 u8 pad_0x0c28_0x1000 [0x1000 - 0x0c28]; /* 0x0c28 */ 121 u8 pad_0x0c28_0x0ca8 [0x0ca8 - 0x0c28]; /* 0x0c28 */
122 u64 ras_esc_0; /* 0x0ca8 */
123 u8 pad_0x0cb0_0x1000 [0x1000 - 0x0cb0]; /* 0x0cb0 */
120}; 124};
121 125
122extern struct cbe_pmd_regs __iomem *cbe_get_pmd_regs(struct device_node *np); 126extern struct cbe_pmd_regs __iomem *cbe_get_pmd_regs(struct device_node *np);
diff --git a/arch/powerpc/platforms/cell/pervasive.c b/arch/powerpc/platforms/cell/pervasive.c
index 812bf563ed65..4ede22d363fa 100644
--- a/arch/powerpc/platforms/cell/pervasive.c
+++ b/arch/powerpc/platforms/cell/pervasive.c
@@ -38,6 +38,8 @@
38#include "pervasive.h" 38#include "pervasive.h"
39#include "cbe_regs.h" 39#include "cbe_regs.h"
40 40
41static int sysreset_hack;
42
41static void cbe_power_save(void) 43static void cbe_power_save(void)
42{ 44{
43 unsigned long ctrl, thread_switch_control; 45 unsigned long ctrl, thread_switch_control;
@@ -85,6 +87,9 @@ static void cbe_power_save(void)
85 87
86static int cbe_system_reset_exception(struct pt_regs *regs) 88static int cbe_system_reset_exception(struct pt_regs *regs)
87{ 89{
90 int cpu;
91 struct cbe_pmd_regs __iomem *pmd;
92
88 switch (regs->msr & SRR1_WAKEMASK) { 93 switch (regs->msr & SRR1_WAKEMASK) {
89 case SRR1_WAKEEE: 94 case SRR1_WAKEEE:
90 do_IRQ(regs); 95 do_IRQ(regs);
@@ -93,6 +98,18 @@ static int cbe_system_reset_exception(struct pt_regs *regs)
93 timer_interrupt(regs); 98 timer_interrupt(regs);
94 break; 99 break;
95 case SRR1_WAKEMT: 100 case SRR1_WAKEMT:
101 /*
102 * The BMC can inject user triggered system reset exceptions,
103 * but cannot set the system reset reason in srr1,
104 * so check an extra register here.
105 */
106 if (sysreset_hack && (cpu = smp_processor_id()) == 0) {
107 pmd = cbe_get_cpu_pmd_regs(cpu);
108 if (in_be64(&pmd->ras_esc_0) & 0xffff) {
109 out_be64(&pmd->ras_esc_0, 0);
110 return 0;
111 }
112 }
96 break; 113 break;
97#ifdef CONFIG_CBE_RAS 114#ifdef CONFIG_CBE_RAS
98 case SRR1_WAKESYSERR: 115 case SRR1_WAKESYSERR:
@@ -113,9 +130,12 @@ static int cbe_system_reset_exception(struct pt_regs *regs)
113void __init cbe_pervasive_init(void) 130void __init cbe_pervasive_init(void)
114{ 131{
115 int cpu; 132 int cpu;
133
116 if (!cpu_has_feature(CPU_FTR_PAUSE_ZERO)) 134 if (!cpu_has_feature(CPU_FTR_PAUSE_ZERO))
117 return; 135 return;
118 136
137 sysreset_hack = machine_is_compatible("IBM,CBPLUS-1.0");
138
119 for_each_possible_cpu(cpu) { 139 for_each_possible_cpu(cpu) {
120 struct cbe_pmd_regs __iomem *regs = cbe_get_cpu_pmd_regs(cpu); 140 struct cbe_pmd_regs __iomem *regs = cbe_get_cpu_pmd_regs(cpu);
121 if (!regs) 141 if (!regs)
@@ -124,6 +144,12 @@ void __init cbe_pervasive_init(void)
124 /* Enable Pause(0) control bit */ 144 /* Enable Pause(0) control bit */
125 out_be64(&regs->pmcr, in_be64(&regs->pmcr) | 145 out_be64(&regs->pmcr, in_be64(&regs->pmcr) |
126 CBE_PMD_PAUSE_ZERO_CONTROL); 146 CBE_PMD_PAUSE_ZERO_CONTROL);
147
148 /* Enable JTAG system-reset hack */
149 if (sysreset_hack)
150 out_be32(&regs->fir_mode_reg,
151 in_be32(&regs->fir_mode_reg) |
152 CBE_PMD_FIR_MODE_M8);
127 } 153 }
128 154
129 ppc_md.power_save = cbe_power_save; 155 ppc_md.power_save = cbe_power_save;