diff options
-rw-r--r-- | drivers/net/wireless/b43/b43.h | 13 | ||||
-rw-r--r-- | drivers/net/wireless/b43/main.c | 37 |
2 files changed, 28 insertions, 22 deletions
diff --git a/drivers/net/wireless/b43/b43.h b/drivers/net/wireless/b43/b43.h index 104d0b2ba02e..c19b773c978a 100644 --- a/drivers/net/wireless/b43/b43.h +++ b/drivers/net/wireless/b43/b43.h | |||
@@ -35,8 +35,8 @@ | |||
35 | #define B43_MMIO_DMA4_IRQ_MASK 0x44 | 35 | #define B43_MMIO_DMA4_IRQ_MASK 0x44 |
36 | #define B43_MMIO_DMA5_REASON 0x48 | 36 | #define B43_MMIO_DMA5_REASON 0x48 |
37 | #define B43_MMIO_DMA5_IRQ_MASK 0x4C | 37 | #define B43_MMIO_DMA5_IRQ_MASK 0x4C |
38 | #define B43_MMIO_MACCTL 0x120 | 38 | #define B43_MMIO_MACCTL 0x120 /* MAC control */ |
39 | #define B43_MMIO_STATUS2_BITFIELD 0x124 | 39 | #define B43_MMIO_MACCMD 0x124 /* MAC command */ |
40 | #define B43_MMIO_GEN_IRQ_REASON 0x128 | 40 | #define B43_MMIO_GEN_IRQ_REASON 0x128 |
41 | #define B43_MMIO_GEN_IRQ_MASK 0x12C | 41 | #define B43_MMIO_GEN_IRQ_MASK 0x12C |
42 | #define B43_MMIO_RAM_CONTROL 0x130 | 42 | #define B43_MMIO_RAM_CONTROL 0x130 |
@@ -321,6 +321,13 @@ enum { | |||
321 | #define B43_MACCTL_DISCPMQ 0x40000000 /* Discard Power Management Queue */ | 321 | #define B43_MACCTL_DISCPMQ 0x40000000 /* Discard Power Management Queue */ |
322 | #define B43_MACCTL_GMODE 0x80000000 /* G Mode */ | 322 | #define B43_MACCTL_GMODE 0x80000000 /* G Mode */ |
323 | 323 | ||
324 | /* MAC Command bitfield */ | ||
325 | #define B43_MACCMD_BEACON0_VALID 0x00000001 /* Beacon 0 in template RAM is busy/valid */ | ||
326 | #define B43_MACCMD_BEACON1_VALID 0x00000002 /* Beacon 1 in template RAM is busy/valid */ | ||
327 | #define B43_MACCMD_DFQ_VALID 0x00000004 /* Directed frame queue valid (IBSS PS mode, ATIM) */ | ||
328 | #define B43_MACCMD_CCA 0x00000008 /* Clear channel assessment */ | ||
329 | #define B43_MACCMD_BGNOISE 0x00000010 /* Background noise */ | ||
330 | |||
324 | /* 802.11 core specific TM State Low flags */ | 331 | /* 802.11 core specific TM State Low flags */ |
325 | #define B43_TMSLOW_GMODE 0x20000000 /* G Mode Enable */ | 332 | #define B43_TMSLOW_GMODE 0x20000000 /* G Mode Enable */ |
326 | #define B43_TMSLOW_PLLREFSEL 0x00200000 /* PLL Frequency Reference Select */ | 333 | #define B43_TMSLOW_PLLREFSEL 0x00200000 /* PLL Frequency Reference Select */ |
@@ -693,7 +700,7 @@ struct b43_wldev { | |||
693 | int suspend_init_status; | 700 | int suspend_init_status; |
694 | 701 | ||
695 | bool bad_frames_preempt; /* Use "Bad Frames Preemption" (default off) */ | 702 | bool bad_frames_preempt; /* Use "Bad Frames Preemption" (default off) */ |
696 | bool reg124_set_0x4; /* Some variable to keep track of IRQ stuff. */ | 703 | bool dfq_valid; /* Directed frame queue valid (IBSS PS mode, ATIM) */ |
697 | bool short_preamble; /* TRUE, if short preamble is enabled. */ | 704 | bool short_preamble; /* TRUE, if short preamble is enabled. */ |
698 | bool short_slot; /* TRUE, if short slot timing is enabled. */ | 705 | bool short_slot; /* TRUE, if short slot timing is enabled. */ |
699 | bool radio_hw_enable; /* saved state of radio hardware enabled state */ | 706 | bool radio_hw_enable; /* saved state of radio hardware enabled state */ |
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c index 2add839f5045..62e4b6371e55 100644 --- a/drivers/net/wireless/b43/main.c +++ b/drivers/net/wireless/b43/main.c | |||
@@ -993,9 +993,8 @@ static void b43_jssi_write(struct b43_wldev *dev, u32 jssi) | |||
993 | static void b43_generate_noise_sample(struct b43_wldev *dev) | 993 | static void b43_generate_noise_sample(struct b43_wldev *dev) |
994 | { | 994 | { |
995 | b43_jssi_write(dev, 0x7F7F7F7F); | 995 | b43_jssi_write(dev, 0x7F7F7F7F); |
996 | b43_write32(dev, B43_MMIO_STATUS2_BITFIELD, | 996 | b43_write32(dev, B43_MMIO_MACCMD, |
997 | b43_read32(dev, B43_MMIO_STATUS2_BITFIELD) | 997 | b43_read32(dev, B43_MMIO_MACCMD) | B43_MACCMD_BGNOISE); |
998 | | (1 << 4)); | ||
999 | B43_WARN_ON(dev->noisecalc.channel_at_start != dev->phy.channel); | 998 | B43_WARN_ON(dev->noisecalc.channel_at_start != dev->phy.channel); |
1000 | } | 999 | } |
1001 | 1000 | ||
@@ -1081,18 +1080,18 @@ static void handle_irq_tbtt_indication(struct b43_wldev *dev) | |||
1081 | if (1 /*FIXME: the last PSpoll frame was sent successfully */ ) | 1080 | if (1 /*FIXME: the last PSpoll frame was sent successfully */ ) |
1082 | b43_power_saving_ctl_bits(dev, 0); | 1081 | b43_power_saving_ctl_bits(dev, 0); |
1083 | } | 1082 | } |
1084 | dev->reg124_set_0x4 = 0; | ||
1085 | if (b43_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS)) | 1083 | if (b43_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS)) |
1086 | dev->reg124_set_0x4 = 1; | 1084 | dev->dfq_valid = 1; |
1087 | } | 1085 | } |
1088 | 1086 | ||
1089 | static void handle_irq_atim_end(struct b43_wldev *dev) | 1087 | static void handle_irq_atim_end(struct b43_wldev *dev) |
1090 | { | 1088 | { |
1091 | if (!dev->reg124_set_0x4 /*FIXME rename this variable */ ) | 1089 | if (dev->dfq_valid) { |
1092 | return; | 1090 | b43_write32(dev, B43_MMIO_MACCMD, |
1093 | b43_write32(dev, B43_MMIO_STATUS2_BITFIELD, | 1091 | b43_read32(dev, B43_MMIO_MACCMD) |
1094 | b43_read32(dev, B43_MMIO_STATUS2_BITFIELD) | 1092 | | B43_MACCMD_DFQ_VALID); |
1095 | | 0x4); | 1093 | dev->dfq_valid = 0; |
1094 | } | ||
1096 | } | 1095 | } |
1097 | 1096 | ||
1098 | static void handle_irq_pmq(struct b43_wldev *dev) | 1097 | static void handle_irq_pmq(struct b43_wldev *dev) |
@@ -1271,7 +1270,7 @@ static int b43_refresh_cached_beacon(struct b43_wldev *dev, | |||
1271 | 1270 | ||
1272 | static void b43_update_templates(struct b43_wldev *dev) | 1271 | static void b43_update_templates(struct b43_wldev *dev) |
1273 | { | 1272 | { |
1274 | u32 status; | 1273 | u32 cmd; |
1275 | 1274 | ||
1276 | B43_WARN_ON(!dev->cached_beacon); | 1275 | B43_WARN_ON(!dev->cached_beacon); |
1277 | 1276 | ||
@@ -1279,9 +1278,9 @@ static void b43_update_templates(struct b43_wldev *dev) | |||
1279 | b43_write_beacon_template(dev, 0x468, 0x1A, B43_CCK_RATE_1MB); | 1278 | b43_write_beacon_template(dev, 0x468, 0x1A, B43_CCK_RATE_1MB); |
1280 | b43_write_probe_resp_template(dev, 0x268, 0x4A, B43_CCK_RATE_11MB); | 1279 | b43_write_probe_resp_template(dev, 0x268, 0x4A, B43_CCK_RATE_11MB); |
1281 | 1280 | ||
1282 | status = b43_read32(dev, B43_MMIO_STATUS2_BITFIELD); | 1281 | cmd = b43_read32(dev, B43_MMIO_MACCMD); |
1283 | status |= 0x03; | 1282 | cmd |= B43_MACCMD_BEACON0_VALID | B43_MACCMD_BEACON1_VALID; |
1284 | b43_write32(dev, B43_MMIO_STATUS2_BITFIELD, status); | 1283 | b43_write32(dev, B43_MMIO_MACCMD, cmd); |
1285 | } | 1284 | } |
1286 | 1285 | ||
1287 | static void b43_refresh_templates(struct b43_wldev *dev, struct sk_buff *beacon) | 1286 | static void b43_refresh_templates(struct b43_wldev *dev, struct sk_buff *beacon) |
@@ -1333,7 +1332,7 @@ static void handle_irq_beacon(struct b43_wldev *dev) | |||
1333 | return; | 1332 | return; |
1334 | 1333 | ||
1335 | dev->irq_savedstate &= ~B43_IRQ_BEACON; | 1334 | dev->irq_savedstate &= ~B43_IRQ_BEACON; |
1336 | status = b43_read32(dev, B43_MMIO_STATUS2_BITFIELD); | 1335 | status = b43_read32(dev, B43_MMIO_MACCMD); |
1337 | 1336 | ||
1338 | if (!dev->cached_beacon || ((status & 0x1) && (status & 0x2))) { | 1337 | if (!dev->cached_beacon || ((status & 0x1) && (status & 0x2))) { |
1339 | /* ACK beacon IRQ. */ | 1338 | /* ACK beacon IRQ. */ |
@@ -1347,12 +1346,12 @@ static void handle_irq_beacon(struct b43_wldev *dev) | |||
1347 | if (!(status & 0x1)) { | 1346 | if (!(status & 0x1)) { |
1348 | b43_write_beacon_template(dev, 0x68, 0x18, B43_CCK_RATE_1MB); | 1347 | b43_write_beacon_template(dev, 0x68, 0x18, B43_CCK_RATE_1MB); |
1349 | status |= 0x1; | 1348 | status |= 0x1; |
1350 | b43_write32(dev, B43_MMIO_STATUS2_BITFIELD, status); | 1349 | b43_write32(dev, B43_MMIO_MACCMD, status); |
1351 | } | 1350 | } |
1352 | if (!(status & 0x2)) { | 1351 | if (!(status & 0x2)) { |
1353 | b43_write_beacon_template(dev, 0x468, 0x1A, B43_CCK_RATE_1MB); | 1352 | b43_write_beacon_template(dev, 0x468, 0x1A, B43_CCK_RATE_1MB); |
1354 | status |= 0x2; | 1353 | status |= 0x2; |
1355 | b43_write32(dev, B43_MMIO_STATUS2_BITFIELD, status); | 1354 | b43_write32(dev, B43_MMIO_MACCMD, status); |
1356 | } | 1355 | } |
1357 | } | 1356 | } |
1358 | 1357 | ||
@@ -3177,8 +3176,8 @@ static void setup_struct_phy_for_init(struct b43_wldev *dev, | |||
3177 | 3176 | ||
3178 | static void setup_struct_wldev_for_init(struct b43_wldev *dev) | 3177 | static void setup_struct_wldev_for_init(struct b43_wldev *dev) |
3179 | { | 3178 | { |
3180 | /* Flags */ | 3179 | dev->dfq_valid = 0; |
3181 | dev->reg124_set_0x4 = 0; | 3180 | |
3182 | /* Assume the radio is enabled. If it's not enabled, the state will | 3181 | /* Assume the radio is enabled. If it's not enabled, the state will |
3183 | * immediately get fixed on the first periodic work run. */ | 3182 | * immediately get fixed on the first periodic work run. */ |
3184 | dev->radio_hw_enable = 1; | 3183 | dev->radio_hw_enable = 1; |