diff options
| -rw-r--r-- | drivers/net/igb/Makefile | 2 | ||||
| -rw-r--r-- | drivers/net/igb/e1000_82575.c | 42 | ||||
| -rw-r--r-- | drivers/net/igb/e1000_82575.h | 17 | ||||
| -rw-r--r-- | drivers/net/igb/e1000_defines.h | 9 | ||||
| -rw-r--r-- | drivers/net/igb/e1000_hw.h | 31 | ||||
| -rw-r--r-- | drivers/net/igb/e1000_mac.c | 24 | ||||
| -rw-r--r-- | drivers/net/igb/e1000_mac.h | 1 | ||||
| -rw-r--r-- | drivers/net/igb/e1000_mbx.c | 447 | ||||
| -rw-r--r-- | drivers/net/igb/e1000_mbx.h | 77 | ||||
| -rw-r--r-- | drivers/net/igb/e1000_regs.h | 12 | ||||
| -rw-r--r-- | drivers/net/igb/igb.h | 12 | ||||
| -rw-r--r-- | drivers/net/igb/igb_main.c | 429 |
12 files changed, 1077 insertions, 26 deletions
diff --git a/drivers/net/igb/Makefile b/drivers/net/igb/Makefile index cda3ad51bafa..8372cb9a8c1a 100644 --- a/drivers/net/igb/Makefile +++ b/drivers/net/igb/Makefile | |||
| @@ -33,5 +33,5 @@ | |||
| 33 | obj-$(CONFIG_IGB) += igb.o | 33 | obj-$(CONFIG_IGB) += igb.o |
| 34 | 34 | ||
| 35 | igb-objs := igb_main.o igb_ethtool.o e1000_82575.o \ | 35 | igb-objs := igb_main.o igb_ethtool.o e1000_82575.o \ |
| 36 | e1000_mac.o e1000_nvm.o e1000_phy.o | 36 | e1000_mac.o e1000_nvm.o e1000_phy.o e1000_mbx.o |
| 37 | 37 | ||
diff --git a/drivers/net/igb/e1000_82575.c b/drivers/net/igb/e1000_82575.c index 7f43e253c566..ea63a215c909 100644 --- a/drivers/net/igb/e1000_82575.c +++ b/drivers/net/igb/e1000_82575.c | |||
| @@ -213,6 +213,10 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw) | |||
| 213 | return -E1000_ERR_PHY; | 213 | return -E1000_ERR_PHY; |
| 214 | } | 214 | } |
| 215 | 215 | ||
| 216 | /* if 82576 then initialize mailbox parameters */ | ||
| 217 | if (mac->type == e1000_82576) | ||
| 218 | igb_init_mbx_params_pf(hw); | ||
| 219 | |||
| 216 | return 0; | 220 | return 0; |
| 217 | } | 221 | } |
| 218 | 222 | ||
| @@ -1413,6 +1417,44 @@ void igb_rx_fifo_flush_82575(struct e1000_hw *hw) | |||
| 1413 | rd32(E1000_MPC); | 1417 | rd32(E1000_MPC); |
| 1414 | } | 1418 | } |
| 1415 | 1419 | ||
| 1420 | /** | ||
| 1421 | * igb_vmdq_set_loopback_pf - enable or disable vmdq loopback | ||
| 1422 | * @hw: pointer to the hardware struct | ||
| 1423 | * @enable: state to enter, either enabled or disabled | ||
| 1424 | * | ||
| 1425 | * enables/disables L2 switch loopback functionality. | ||
| 1426 | **/ | ||
| 1427 | void igb_vmdq_set_loopback_pf(struct e1000_hw *hw, bool enable) | ||
| 1428 | { | ||
| 1429 | u32 dtxswc = rd32(E1000_DTXSWC); | ||
| 1430 | |||
| 1431 | if (enable) | ||
| 1432 | dtxswc |= E1000_DTXSWC_VMDQ_LOOPBACK_EN; | ||
| 1433 | else | ||
| 1434 | dtxswc &= ~E1000_DTXSWC_VMDQ_LOOPBACK_EN; | ||
| 1435 | |||
| 1436 | wr32(E1000_DTXSWC, dtxswc); | ||
| 1437 | } | ||
| 1438 | |||
| 1439 | /** | ||
| 1440 | * igb_vmdq_set_replication_pf - enable or disable vmdq replication | ||
| 1441 | * @hw: pointer to the hardware struct | ||
| 1442 | * @enable: state to enter, either enabled or disabled | ||
| 1443 | * | ||
| 1444 | * enables/disables replication of packets across multiple pools. | ||
| 1445 | **/ | ||
| 1446 | void igb_vmdq_set_replication_pf(struct e1000_hw *hw, bool enable) | ||
| 1447 | { | ||
| 1448 | u32 vt_ctl = rd32(E1000_VT_CTL); | ||
| 1449 | |||
| 1450 | if (enable) | ||
| 1451 | vt_ctl |= E1000_VT_CTL_VM_REPL_EN; | ||
| 1452 | else | ||
| 1453 | vt_ctl &= ~E1000_VT_CTL_VM_REPL_EN; | ||
| 1454 | |||
| 1455 | wr32(E1000_VT_CTL, vt_ctl); | ||
| 1456 | } | ||
| 1457 | |||
| 1416 | static struct e1000_mac_operations e1000_mac_ops_82575 = { | 1458 | static struct e1000_mac_operations e1000_mac_ops_82575 = { |
| 1417 | .reset_hw = igb_reset_hw_82575, | 1459 | .reset_hw = igb_reset_hw_82575, |
| 1418 | .init_hw = igb_init_hw_82575, | 1460 | .init_hw = igb_init_hw_82575, |
diff --git a/drivers/net/igb/e1000_82575.h b/drivers/net/igb/e1000_82575.h index 116714f346bb..eaf977050368 100644 --- a/drivers/net/igb/e1000_82575.h +++ b/drivers/net/igb/e1000_82575.h | |||
| @@ -162,6 +162,10 @@ struct e1000_adv_tx_context_desc { | |||
| 162 | #define E1000_DCA_TXCTRL_CPUID_SHIFT 24 /* Tx CPUID now in the last byte */ | 162 | #define E1000_DCA_TXCTRL_CPUID_SHIFT 24 /* Tx CPUID now in the last byte */ |
| 163 | #define E1000_DCA_RXCTRL_CPUID_SHIFT 24 /* Rx CPUID now in the last byte */ | 163 | #define E1000_DCA_RXCTRL_CPUID_SHIFT 24 /* Rx CPUID now in the last byte */ |
| 164 | 164 | ||
| 165 | #define MAX_NUM_VFS 8 | ||
| 166 | |||
| 167 | #define E1000_DTXSWC_VMDQ_LOOPBACK_EN (1 << 31) /* global VF LB enable */ | ||
| 168 | |||
| 165 | /* Easy defines for setting default pool, would normally be left a zero */ | 169 | /* Easy defines for setting default pool, would normally be left a zero */ |
| 166 | #define E1000_VT_CTL_DEFAULT_POOL_SHIFT 7 | 170 | #define E1000_VT_CTL_DEFAULT_POOL_SHIFT 7 |
| 167 | #define E1000_VT_CTL_DEFAULT_POOL_MASK (0x7 << E1000_VT_CTL_DEFAULT_POOL_SHIFT) | 171 | #define E1000_VT_CTL_DEFAULT_POOL_MASK (0x7 << E1000_VT_CTL_DEFAULT_POOL_SHIFT) |
| @@ -181,8 +185,21 @@ struct e1000_adv_tx_context_desc { | |||
| 181 | #define E1000_VMOLR_BAM 0x08000000 /* Accept Broadcast packets */ | 185 | #define E1000_VMOLR_BAM 0x08000000 /* Accept Broadcast packets */ |
| 182 | #define E1000_VMOLR_MPME 0x10000000 /* Multicast promiscuous mode */ | 186 | #define E1000_VMOLR_MPME 0x10000000 /* Multicast promiscuous mode */ |
| 183 | #define E1000_VMOLR_STRVLAN 0x40000000 /* Vlan stripping enable */ | 187 | #define E1000_VMOLR_STRVLAN 0x40000000 /* Vlan stripping enable */ |
| 188 | #define E1000_VMOLR_STRCRC 0x80000000 /* CRC stripping enable */ | ||
| 189 | |||
| 190 | #define E1000_VLVF_ARRAY_SIZE 32 | ||
| 191 | #define E1000_VLVF_VLANID_MASK 0x00000FFF | ||
| 192 | #define E1000_VLVF_POOLSEL_SHIFT 12 | ||
| 193 | #define E1000_VLVF_POOLSEL_MASK (0xFF << E1000_VLVF_POOLSEL_SHIFT) | ||
| 194 | #define E1000_VLVF_LVLAN 0x00100000 | ||
| 195 | #define E1000_VLVF_VLANID_ENABLE 0x80000000 | ||
| 196 | |||
| 197 | #define E1000_IOVCTL 0x05BBC | ||
| 198 | #define E1000_IOVCTL_REUSE_VFQ 0x00000001 | ||
| 184 | 199 | ||
| 185 | #define ALL_QUEUES 0xFFFF | 200 | #define ALL_QUEUES 0xFFFF |
| 186 | 201 | ||
| 202 | void igb_vmdq_set_loopback_pf(struct e1000_hw *, bool); | ||
| 203 | void igb_vmdq_set_replication_pf(struct e1000_hw *, bool); | ||
| 187 | 204 | ||
| 188 | #endif | 205 | #endif |
diff --git a/drivers/net/igb/e1000_defines.h b/drivers/net/igb/e1000_defines.h index d7613db78000..62e378b64611 100644 --- a/drivers/net/igb/e1000_defines.h +++ b/drivers/net/igb/e1000_defines.h | |||
| @@ -45,6 +45,8 @@ | |||
| 45 | 45 | ||
| 46 | /* Extended Device Control */ | 46 | /* Extended Device Control */ |
| 47 | #define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Defineable Pin 7 */ | 47 | #define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Defineable Pin 7 */ |
| 48 | /* Physical Func Reset Done Indication */ | ||
| 49 | #define E1000_CTRL_EXT_PFRSTD 0x00004000 | ||
| 48 | #define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000 | 50 | #define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000 |
| 49 | #define E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES 0x00C00000 | 51 | #define E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES 0x00C00000 |
| 50 | #define E1000_CTRL_EXT_LINK_MODE_SGMII 0x00800000 | 52 | #define E1000_CTRL_EXT_LINK_MODE_SGMII 0x00800000 |
| @@ -325,6 +327,7 @@ | |||
| 325 | #define E1000_ICR_RXSEQ 0x00000008 /* rx sequence error */ | 327 | #define E1000_ICR_RXSEQ 0x00000008 /* rx sequence error */ |
| 326 | #define E1000_ICR_RXDMT0 0x00000010 /* rx desc min. threshold (0) */ | 328 | #define E1000_ICR_RXDMT0 0x00000010 /* rx desc min. threshold (0) */ |
| 327 | #define E1000_ICR_RXT0 0x00000080 /* rx timer intr (ring 0) */ | 329 | #define E1000_ICR_RXT0 0x00000080 /* rx timer intr (ring 0) */ |
| 330 | #define E1000_ICR_VMMB 0x00000100 /* VM MB event */ | ||
| 328 | /* If this bit asserted, the driver should claim the interrupt */ | 331 | /* If this bit asserted, the driver should claim the interrupt */ |
| 329 | #define E1000_ICR_INT_ASSERTED 0x80000000 | 332 | #define E1000_ICR_INT_ASSERTED 0x80000000 |
| 330 | /* LAN connected device generates an interrupt */ | 333 | /* LAN connected device generates an interrupt */ |
| @@ -362,6 +365,7 @@ | |||
| 362 | /* Interrupt Mask Set */ | 365 | /* Interrupt Mask Set */ |
| 363 | #define E1000_IMS_TXDW E1000_ICR_TXDW /* Transmit desc written back */ | 366 | #define E1000_IMS_TXDW E1000_ICR_TXDW /* Transmit desc written back */ |
| 364 | #define E1000_IMS_LSC E1000_ICR_LSC /* Link Status Change */ | 367 | #define E1000_IMS_LSC E1000_ICR_LSC /* Link Status Change */ |
| 368 | #define E1000_IMS_VMMB E1000_ICR_VMMB /* Mail box activity */ | ||
| 365 | #define E1000_IMS_RXSEQ E1000_ICR_RXSEQ /* rx sequence error */ | 369 | #define E1000_IMS_RXSEQ E1000_ICR_RXSEQ /* rx sequence error */ |
| 366 | #define E1000_IMS_RXDMT0 E1000_ICR_RXDMT0 /* rx desc min. threshold */ | 370 | #define E1000_IMS_RXDMT0 E1000_ICR_RXDMT0 /* rx desc min. threshold */ |
| 367 | #define E1000_IMS_RXT0 E1000_ICR_RXT0 /* rx timer intr */ | 371 | #define E1000_IMS_RXT0 E1000_ICR_RXT0 /* rx timer intr */ |
| @@ -413,6 +417,7 @@ | |||
| 413 | #define E1000_BLK_PHY_RESET 12 | 417 | #define E1000_BLK_PHY_RESET 12 |
| 414 | #define E1000_ERR_SWFW_SYNC 13 | 418 | #define E1000_ERR_SWFW_SYNC 13 |
| 415 | #define E1000_NOT_IMPLEMENTED 14 | 419 | #define E1000_NOT_IMPLEMENTED 14 |
| 420 | #define E1000_ERR_MBX 15 | ||
| 416 | 421 | ||
| 417 | /* Loop limit on how long we wait for auto-negotiation to complete */ | 422 | /* Loop limit on how long we wait for auto-negotiation to complete */ |
| 418 | #define COPPER_LINK_UP_LIMIT 10 | 423 | #define COPPER_LINK_UP_LIMIT 10 |
| @@ -659,4 +664,8 @@ | |||
| 659 | #define E1000_GEN_CTL_ADDRESS_SHIFT 8 | 664 | #define E1000_GEN_CTL_ADDRESS_SHIFT 8 |
| 660 | #define E1000_GEN_POLL_TIMEOUT 640 | 665 | #define E1000_GEN_POLL_TIMEOUT 640 |
| 661 | 666 | ||
| 667 | #define E1000_VFTA_ENTRY_SHIFT 5 | ||
| 668 | #define E1000_VFTA_ENTRY_MASK 0x7F | ||
| 669 | #define E1000_VFTA_ENTRY_BIT_SHIFT_MASK 0x1F | ||
| 670 | |||
| 662 | #endif | 671 | #endif |
diff --git a/drivers/net/igb/e1000_hw.h b/drivers/net/igb/e1000_hw.h index 10b872d3c9f4..d793dca1eef6 100644 --- a/drivers/net/igb/e1000_hw.h +++ b/drivers/net/igb/e1000_hw.h | |||
| @@ -32,7 +32,6 @@ | |||
| 32 | #include <linux/delay.h> | 32 | #include <linux/delay.h> |
| 33 | #include <linux/io.h> | 33 | #include <linux/io.h> |
| 34 | 34 | ||
| 35 | #include "e1000_mac.h" | ||
| 36 | #include "e1000_regs.h" | 35 | #include "e1000_regs.h" |
| 37 | #include "e1000_defines.h" | 36 | #include "e1000_defines.h" |
| 38 | 37 | ||
| @@ -272,6 +271,7 @@ struct e1000_host_mng_command_info { | |||
| 272 | #include "e1000_mac.h" | 271 | #include "e1000_mac.h" |
| 273 | #include "e1000_phy.h" | 272 | #include "e1000_phy.h" |
| 274 | #include "e1000_nvm.h" | 273 | #include "e1000_nvm.h" |
| 274 | #include "e1000_mbx.h" | ||
| 275 | 275 | ||
| 276 | struct e1000_mac_operations { | 276 | struct e1000_mac_operations { |
| 277 | s32 (*check_for_link)(struct e1000_hw *); | 277 | s32 (*check_for_link)(struct e1000_hw *); |
| @@ -427,6 +427,34 @@ struct e1000_fc_info { | |||
| 427 | enum e1000_fc_type original_type; | 427 | enum e1000_fc_type original_type; |
| 428 | }; | 428 | }; |
| 429 | 429 | ||
| 430 | struct e1000_mbx_operations { | ||
| 431 | s32 (*init_params)(struct e1000_hw *hw); | ||
| 432 | s32 (*read)(struct e1000_hw *, u32 *, u16, u16); | ||
| 433 | s32 (*write)(struct e1000_hw *, u32 *, u16, u16); | ||
| 434 | s32 (*read_posted)(struct e1000_hw *, u32 *, u16, u16); | ||
| 435 | s32 (*write_posted)(struct e1000_hw *, u32 *, u16, u16); | ||
| 436 | s32 (*check_for_msg)(struct e1000_hw *, u16); | ||
| 437 | s32 (*check_for_ack)(struct e1000_hw *, u16); | ||
| 438 | s32 (*check_for_rst)(struct e1000_hw *, u16); | ||
| 439 | }; | ||
| 440 | |||
| 441 | struct e1000_mbx_stats { | ||
| 442 | u32 msgs_tx; | ||
| 443 | u32 msgs_rx; | ||
| 444 | |||
| 445 | u32 acks; | ||
| 446 | u32 reqs; | ||
| 447 | u32 rsts; | ||
| 448 | }; | ||
| 449 | |||
| 450 | struct e1000_mbx_info { | ||
| 451 | struct e1000_mbx_operations ops; | ||
| 452 | struct e1000_mbx_stats stats; | ||
| 453 | u32 timeout; | ||
| 454 | u32 usec_delay; | ||
| 455 | u16 size; | ||
| 456 | }; | ||
| 457 | |||
| 430 | struct e1000_dev_spec_82575 { | 458 | struct e1000_dev_spec_82575 { |
| 431 | bool sgmii_active; | 459 | bool sgmii_active; |
| 432 | }; | 460 | }; |
| @@ -443,6 +471,7 @@ struct e1000_hw { | |||
| 443 | struct e1000_phy_info phy; | 471 | struct e1000_phy_info phy; |
| 444 | struct e1000_nvm_info nvm; | 472 | struct e1000_nvm_info nvm; |
| 445 | struct e1000_bus_info bus; | 473 | struct e1000_bus_info bus; |
| 474 | struct e1000_mbx_info mbx; | ||
| 446 | struct e1000_host_mng_dhcp_cookie mng_cookie; | 475 | struct e1000_host_mng_dhcp_cookie mng_cookie; |
| 447 | 476 | ||
| 448 | union { | 477 | union { |
diff --git a/drivers/net/igb/e1000_mac.c b/drivers/net/igb/e1000_mac.c index 5c249e2ce93b..2804db03e9d9 100644 --- a/drivers/net/igb/e1000_mac.c +++ b/drivers/net/igb/e1000_mac.c | |||
| @@ -118,6 +118,30 @@ void igb_write_vfta(struct e1000_hw *hw, u32 offset, u32 value) | |||
| 118 | } | 118 | } |
| 119 | 119 | ||
| 120 | /** | 120 | /** |
| 121 | * igb_vfta_set - enable or disable vlan in VLAN filter table | ||
| 122 | * @hw: pointer to the HW structure | ||
| 123 | * @vid: VLAN id to add or remove | ||
| 124 | * @add: if true add filter, if false remove | ||
| 125 | * | ||
| 126 | * Sets or clears a bit in the VLAN filter table array based on VLAN id | ||
| 127 | * and if we are adding or removing the filter | ||
| 128 | **/ | ||
| 129 | void igb_vfta_set(struct e1000_hw *hw, u32 vid, bool add) | ||
| 130 | { | ||
| 131 | u32 index = (vid >> E1000_VFTA_ENTRY_SHIFT) & E1000_VFTA_ENTRY_MASK; | ||
| 132 | u32 mask = 1 < (vid & E1000_VFTA_ENTRY_BIT_SHIFT_MASK); | ||
| 133 | u32 vfta; | ||
| 134 | |||
| 135 | vfta = array_rd32(E1000_VFTA, index); | ||
| 136 | if (add) | ||
| 137 | vfta |= mask; | ||
| 138 | else | ||
| 139 | vfta &= ~mask; | ||
| 140 | |||
| 141 | igb_write_vfta(hw, index, vfta); | ||
| 142 | } | ||
| 143 | |||
| 144 | /** | ||
| 121 | * igb_check_alt_mac_addr - Check for alternate MAC addr | 145 | * igb_check_alt_mac_addr - Check for alternate MAC addr |
| 122 | * @hw: pointer to the HW structure | 146 | * @hw: pointer to the HW structure |
| 123 | * | 147 | * |
diff --git a/drivers/net/igb/e1000_mac.h b/drivers/net/igb/e1000_mac.h index e5200def582f..eccc3536a568 100644 --- a/drivers/net/igb/e1000_mac.h +++ b/drivers/net/igb/e1000_mac.h | |||
| @@ -58,6 +58,7 @@ s32 igb_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg, | |||
| 58 | 58 | ||
| 59 | void igb_clear_hw_cntrs_base(struct e1000_hw *hw); | 59 | void igb_clear_hw_cntrs_base(struct e1000_hw *hw); |
| 60 | void igb_clear_vfta(struct e1000_hw *hw); | 60 | void igb_clear_vfta(struct e1000_hw *hw); |
| 61 | void igb_vfta_set(struct e1000_hw *hw, u32 vid, bool add); | ||
| 61 | void igb_config_collision_dist(struct e1000_hw *hw); | 62 | void igb_config_collision_dist(struct e1000_hw *hw); |
| 62 | void igb_mta_set(struct e1000_hw *hw, u32 hash_value); | 63 | void igb_mta_set(struct e1000_hw *hw, u32 hash_value); |
| 63 | void igb_put_hw_semaphore(struct e1000_hw *hw); | 64 | void igb_put_hw_semaphore(struct e1000_hw *hw); |
diff --git a/drivers/net/igb/e1000_mbx.c b/drivers/net/igb/e1000_mbx.c new file mode 100644 index 000000000000..fe71c7ddaa05 --- /dev/null +++ b/drivers/net/igb/e1000_mbx.c | |||
| @@ -0,0 +1,447 @@ | |||
| 1 | /******************************************************************************* | ||
| 2 | |||
| 3 | Intel(R) Gigabit Ethernet Linux driver | ||
| 4 | Copyright(c) 2007-2009 Intel Corporation. | ||
| 5 | |||
| 6 | This program is free software; you can redistribute it and/or modify it | ||
| 7 | under the terms and conditions of the GNU General Public License, | ||
| 8 | version 2, as published by the Free Software Foundation. | ||
| 9 | |||
| 10 | This program is distributed in the hope it will be useful, but WITHOUT | ||
| 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
| 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
| 13 | more details. | ||
| 14 | |||
| 15 | You should have received a copy of the GNU General Public License along with | ||
| 16 | this program; if not, write to the Free Software Foundation, Inc., | ||
| 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | ||
| 18 | |||
| 19 | The full GNU General Public License is included in this distribution in | ||
| 20 | the file called "COPYING". | ||
| 21 | |||
| 22 | Contact Information: | ||
| 23 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
| 24 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | ||
| 25 | |||
| 26 | *******************************************************************************/ | ||
| 27 | |||
| 28 | #include "e1000_mbx.h" | ||
| 29 | |||
| 30 | /** | ||
| 31 | * igb_read_mbx - Reads a message from the mailbox | ||
| 32 | * @hw: pointer to the HW structure | ||
| 33 | * @msg: The message buffer | ||
| 34 | * @size: Length of buffer | ||
| 35 | * @mbx_id: id of mailbox to read | ||
| 36 | * | ||
| 37 | * returns SUCCESS if it successfuly read message from buffer | ||
| 38 | **/ | ||
| 39 | s32 igb_read_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id) | ||
| 40 | { | ||
| 41 | struct e1000_mbx_info *mbx = &hw->mbx; | ||
| 42 | s32 ret_val = -E1000_ERR_MBX; | ||
| 43 | |||
| 44 | /* limit read to size of mailbox */ | ||
| 45 | if (size > mbx->size) | ||
| 46 | size = mbx->size; | ||
| 47 | |||
| 48 | if (mbx->ops.read) | ||
| 49 | ret_val = mbx->ops.read(hw, msg, size, mbx_id); | ||
| 50 | |||
| 51 | return ret_val; | ||
| 52 | } | ||
| 53 | |||
| 54 | /** | ||
| 55 | * igb_write_mbx - Write a message to the mailbox | ||
| 56 | * @hw: pointer to the HW structure | ||
| 57 | * @msg: The message buffer | ||
| 58 | * @size: Length of buffer | ||
| 59 | * @mbx_id: id of mailbox to write | ||
| 60 | * | ||
| 61 | * returns SUCCESS if it successfully copied message into the buffer | ||
| 62 | **/ | ||
| 63 | s32 igb_write_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id) | ||
| 64 | { | ||
| 65 | struct e1000_mbx_info *mbx = &hw->mbx; | ||
| 66 | s32 ret_val = 0; | ||
| 67 | |||
| 68 | if (size > mbx->size) | ||
| 69 | ret_val = -E1000_ERR_MBX; | ||
| 70 | |||
| 71 | else if (mbx->ops.write) | ||
| 72 | ret_val = mbx->ops.write(hw, msg, size, mbx_id); | ||
| 73 | |||
| 74 | return ret_val; | ||
| 75 | } | ||
| 76 | |||
| 77 | /** | ||
| 78 | * igb_check_for_msg - checks to see if someone sent us mail | ||
| 79 | * @hw: pointer to the HW structure | ||
| 80 | * @mbx_id: id of mailbox to check | ||
| 81 | * | ||
| 82 | * returns SUCCESS if the Status bit was found or else ERR_MBX | ||
| 83 | **/ | ||
| 84 | s32 igb_check_for_msg(struct e1000_hw *hw, u16 mbx_id) | ||
| 85 | { | ||
| 86 | struct e1000_mbx_info *mbx = &hw->mbx; | ||
| 87 | s32 ret_val = -E1000_ERR_MBX; | ||
| 88 | |||
| 89 | if (mbx->ops.check_for_msg) | ||
| 90 | ret_val = mbx->ops.check_for_msg(hw, mbx_id); | ||
| 91 | |||
| 92 | return ret_val; | ||
| 93 | } | ||
| 94 | |||
| 95 | /** | ||
| 96 | * igb_check_for_ack - checks to see if someone sent us ACK | ||
| 97 | * @hw: pointer to the HW structure | ||
| 98 | * @mbx_id: id of mailbox to check | ||
| 99 | * | ||
| 100 | * returns SUCCESS if the Status bit was found or else ERR_MBX | ||
| 101 | **/ | ||
| 102 | s32 igb_check_for_ack(struct e1000_hw *hw, u16 mbx_id) | ||
| 103 | { | ||
| 104 | struct e1000_mbx_info *mbx = &hw->mbx; | ||
| 105 | s32 ret_val = -E1000_ERR_MBX; | ||
| 106 | |||
| 107 | if (mbx->ops.check_for_ack) | ||
| 108 | ret_val = mbx->ops.check_for_ack(hw, mbx_id); | ||
| 109 | |||
| 110 | return ret_val; | ||
| 111 | } | ||
| 112 | |||
| 113 | /** | ||
| 114 | * igb_check_for_rst - checks to see if other side has reset | ||
| 115 | * @hw: pointer to the HW structure | ||
| 116 | * @mbx_id: id of mailbox to check | ||
| 117 | * | ||
| 118 | * returns SUCCESS if the Status bit was found or else ERR_MBX | ||
| 119 | **/ | ||
| 120 | s32 igb_check_for_rst(struct e1000_hw *hw, u16 mbx_id) | ||
| 121 | { | ||
| 122 | struct e1000_mbx_info *mbx = &hw->mbx; | ||
| 123 | s32 ret_val = -E1000_ERR_MBX; | ||
| 124 | |||
| 125 | if (mbx->ops.check_for_rst) | ||
| 126 | ret_val = mbx->ops.check_for_rst(hw, mbx_id); | ||
| 127 | |||
| 128 | return ret_val; | ||
| 129 | } | ||
| 130 | |||
| 131 | /** | ||
| 132 | * igb_poll_for_msg - Wait for message notification | ||
| 133 | * @hw: pointer to the HW structure | ||
| 134 | * @mbx_id: id of mailbox to write | ||
| 135 | * | ||
| 136 | * returns SUCCESS if it successfully received a message notification | ||
| 137 | **/ | ||
| 138 | static s32 igb_poll_for_msg(struct e1000_hw *hw, u16 mbx_id) | ||
| 139 | { | ||
| 140 | struct e1000_mbx_info *mbx = &hw->mbx; | ||
| 141 | int countdown = mbx->timeout; | ||
| 142 | |||
| 143 | if (!mbx->ops.check_for_msg) | ||
| 144 | goto out; | ||
| 145 | |||
| 146 | while (mbx->ops.check_for_msg(hw, mbx_id)) { | ||
| 147 | if (!countdown) | ||
| 148 | break; | ||
| 149 | countdown--; | ||
| 150 | udelay(mbx->usec_delay); | ||
| 151 | } | ||
| 152 | out: | ||
| 153 | return countdown ? 0 : -E1000_ERR_MBX; | ||
| 154 | } | ||
| 155 | |||
| 156 | /** | ||
| 157 | * igb_poll_for_ack - Wait for message acknowledgement | ||
| 158 | * @hw: pointer to the HW structure | ||
| 159 | * @mbx_id: id of mailbox to write | ||
| 160 | * | ||
| 161 | * returns SUCCESS if it successfully received a message acknowledgement | ||
| 162 | **/ | ||
| 163 | static s32 igb_poll_for_ack(struct e1000_hw *hw, u16 mbx_id) | ||
| 164 | { | ||
| 165 | struct e1000_mbx_info *mbx = &hw->mbx; | ||
| 166 | int countdown = mbx->timeout; | ||
| 167 | |||
| 168 | if (!mbx->ops.check_for_ack) | ||
| 169 | goto out; | ||
| 170 | |||
| 171 | while (mbx->ops.check_for_ack(hw, mbx_id)) { | ||
| 172 | if (!countdown) | ||
| 173 | break; | ||
| 174 | countdown--; | ||
| 175 | udelay(mbx->usec_delay); | ||
| 176 | } | ||
| 177 | out: | ||
| 178 | return countdown ? 0 : -E1000_ERR_MBX; | ||
| 179 | } | ||
| 180 | |||
| 181 | /** | ||
| 182 | * igb_read_posted_mbx - Wait for message notification and receive message | ||
| 183 | * @hw: pointer to the HW structure | ||
| 184 | * @msg: The message buffer | ||
| 185 | * @size: Length of buffer | ||
| 186 | * @mbx_id: id of mailbox to write | ||
| 187 | * | ||
| 188 | * returns SUCCESS if it successfully received a message notification and | ||
| 189 | * copied it into the receive buffer. | ||
| 190 | **/ | ||
| 191 | s32 igb_read_posted_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id) | ||
| 192 | { | ||
| 193 | struct e1000_mbx_info *mbx = &hw->mbx; | ||
| 194 | s32 ret_val = -E1000_ERR_MBX; | ||
| 195 | |||
| 196 | if (!mbx->ops.read) | ||
| 197 | goto out; | ||
| 198 | |||
| 199 | ret_val = igb_poll_for_msg(hw, mbx_id); | ||
| 200 | |||
| 201 | if (!ret_val) | ||
| 202 | ret_val = mbx->ops.read(hw, msg, size, mbx_id); | ||
| 203 | out: | ||
| 204 | return ret_val; | ||
| 205 | } | ||
| 206 | |||
| 207 | /** | ||
| 208 | * igb_write_posted_mbx - Write a message to the mailbox, wait for ack | ||
| 209 | * @hw: pointer to the HW structure | ||
| 210 | * @msg: The message buffer | ||
| 211 | * @size: Length of buffer | ||
| 212 | * @mbx_id: id of mailbox to write | ||
| 213 | * | ||
| 214 | * returns SUCCESS if it successfully copied message into the buffer and | ||
| 215 | * received an ack to that message within delay * timeout period | ||
| 216 | **/ | ||
| 217 | s32 igb_write_posted_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id) | ||
| 218 | { | ||
| 219 | struct e1000_mbx_info *mbx = &hw->mbx; | ||
| 220 | s32 ret_val = 0; | ||
| 221 | |||
| 222 | if (!mbx->ops.write) | ||
| 223 | goto out; | ||
| 224 | |||
| 225 | /* send msg*/ | ||
| 226 | ret_val = mbx->ops.write(hw, msg, size, mbx_id); | ||
| 227 | |||
| 228 | /* if msg sent wait until we receive an ack */ | ||
| 229 | if (!ret_val) | ||
| 230 | ret_val = igb_poll_for_ack(hw, mbx_id); | ||
| 231 | out: | ||
| 232 | return ret_val; | ||
| 233 | } | ||
| 234 | |||
| 235 | /** | ||
| 236 | * e1000_init_mbx_ops_generic - Initialize NVM function pointers | ||
| 237 | * @hw: pointer to the HW structure | ||
| 238 | * | ||
| 239 | * Setups up the function pointers to no-op functions | ||
| 240 | **/ | ||
| 241 | void e1000_init_mbx_ops_generic(struct e1000_hw *hw) | ||
| 242 | { | ||
| 243 | struct e1000_mbx_info *mbx = &hw->mbx; | ||
| 244 | mbx->ops.read_posted = igb_read_posted_mbx; | ||
| 245 | mbx->ops.write_posted = igb_write_posted_mbx; | ||
| 246 | } | ||
| 247 | |||
| 248 | static s32 igb_check_for_bit_pf(struct e1000_hw *hw, u32 mask) | ||
| 249 | { | ||
| 250 | u32 mbvficr = rd32(E1000_MBVFICR); | ||
| 251 | s32 ret_val = -E1000_ERR_MBX; | ||
| 252 | |||
| 253 | if (mbvficr & mask) { | ||
| 254 | ret_val = 0; | ||
| 255 | wr32(E1000_MBVFICR, mask); | ||
| 256 | } | ||
| 257 | |||
| 258 | return ret_val; | ||
| 259 | } | ||
| 260 | |||
| 261 | /** | ||
| 262 | * igb_check_for_msg_pf - checks to see if the VF has sent mail | ||
| 263 | * @hw: pointer to the HW structure | ||
| 264 | * @vf_number: the VF index | ||
| 265 | * | ||
| 266 | * returns SUCCESS if the VF has set the Status bit or else ERR_MBX | ||
| 267 | **/ | ||
| 268 | static s32 igb_check_for_msg_pf(struct e1000_hw *hw, u16 vf_number) | ||
| 269 | { | ||
| 270 | s32 ret_val = -E1000_ERR_MBX; | ||
| 271 | |||
| 272 | if (!igb_check_for_bit_pf(hw, E1000_MBVFICR_VFREQ_VF1 << vf_number)) { | ||
| 273 | ret_val = 0; | ||
| 274 | hw->mbx.stats.reqs++; | ||
| 275 | } | ||
| 276 | |||
| 277 | return ret_val; | ||
| 278 | } | ||
| 279 | |||
| 280 | /** | ||
| 281 | * igb_check_for_ack_pf - checks to see if the VF has ACKed | ||
| 282 | * @hw: pointer to the HW structure | ||
| 283 | * @vf_number: the VF index | ||
| 284 | * | ||
| 285 | * returns SUCCESS if the VF has set the Status bit or else ERR_MBX | ||
| 286 | **/ | ||
| 287 | static s32 igb_check_for_ack_pf(struct e1000_hw *hw, u16 vf_number) | ||
| 288 | { | ||
| 289 | s32 ret_val = -E1000_ERR_MBX; | ||
| 290 | |||
| 291 | if (!igb_check_for_bit_pf(hw, E1000_MBVFICR_VFACK_VF1 << vf_number)) { | ||
| 292 | ret_val = 0; | ||
| 293 | hw->mbx.stats.acks++; | ||
| 294 | } | ||
| 295 | |||
| 296 | return ret_val; | ||
| 297 | } | ||
| 298 | |||
| 299 | /** | ||
| 300 | * igb_check_for_rst_pf - checks to see if the VF has reset | ||
| 301 | * @hw: pointer to the HW structure | ||
| 302 | * @vf_number: the VF index | ||
| 303 | * | ||
| 304 | * returns SUCCESS if the VF has set the Status bit or else ERR_MBX | ||
| 305 | **/ | ||
| 306 | static s32 igb_check_for_rst_pf(struct e1000_hw *hw, u16 vf_number) | ||
| 307 | { | ||
| 308 | u32 vflre = rd32(E1000_VFLRE); | ||
| 309 | s32 ret_val = -E1000_ERR_MBX; | ||
| 310 | |||
| 311 | if (vflre & (1 << vf_number)) { | ||
| 312 | ret_val = 0; | ||
| 313 | wr32(E1000_VFLRE, (1 << vf_number)); | ||
| 314 | hw->mbx.stats.rsts++; | ||
| 315 | } | ||
| 316 | |||
| 317 | return ret_val; | ||
| 318 | } | ||
| 319 | |||
| 320 | /** | ||
| 321 | * igb_write_mbx_pf - Places a message in the mailbox | ||
| 322 | * @hw: pointer to the HW structure | ||
| 323 | * @msg: The message buffer | ||
| 324 | * @size: Length of buffer | ||
| 325 | * @vf_number: the VF index | ||
| 326 | * | ||
| 327 | * returns SUCCESS if it successfully copied message into the buffer | ||
| 328 | **/ | ||
| 329 | static s32 igb_write_mbx_pf(struct e1000_hw *hw, u32 *msg, u16 size, | ||
| 330 | u16 vf_number) | ||
| 331 | { | ||
| 332 | u32 p2v_mailbox; | ||
| 333 | s32 ret_val = 0; | ||
| 334 | u16 i; | ||
| 335 | |||
| 336 | /* Take ownership of the buffer */ | ||
| 337 | wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_PFU); | ||
| 338 | |||
| 339 | /* Make sure we have ownership now... */ | ||
| 340 | p2v_mailbox = rd32(E1000_P2VMAILBOX(vf_number)); | ||
| 341 | if (!(p2v_mailbox & E1000_P2VMAILBOX_PFU)) { | ||
| 342 | /* failed to grab ownership */ | ||
| 343 | ret_val = -E1000_ERR_MBX; | ||
| 344 | goto out_no_write; | ||
| 345 | } | ||
| 346 | |||
| 347 | /* | ||
| 348 | * flush any ack or msg which may already be in the queue | ||
| 349 | * as they are likely the result of an error | ||
| 350 | */ | ||
| 351 | igb_check_for_ack_pf(hw, vf_number); | ||
| 352 | igb_check_for_msg_pf(hw, vf_number); | ||
| 353 | |||
| 354 | /* copy the caller specified message to the mailbox memory buffer */ | ||
| 355 | for (i = 0; i < size; i++) | ||
| 356 | array_wr32(E1000_VMBMEM(vf_number), i, msg[i]); | ||
| 357 | |||
| 358 | /* Interrupt VF to tell it a message has been sent and release buffer*/ | ||
| 359 | wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_STS); | ||
| 360 | |||
| 361 | /* update stats */ | ||
| 362 | hw->mbx.stats.msgs_tx++; | ||
| 363 | |||
| 364 | out_no_write: | ||
| 365 | return ret_val; | ||
| 366 | |||
| 367 | } | ||
| 368 | |||
| 369 | /** | ||
| 370 | * igb_read_mbx_pf - Read a message from the mailbox | ||
| 371 | * @hw: pointer to the HW structure | ||
| 372 | * @msg: The message buffer | ||
| 373 | * @size: Length of buffer | ||
| 374 | * @vf_number: the VF index | ||
| 375 | * | ||
| 376 | * This function copies a message from the mailbox buffer to the caller's | ||
| 377 | * memory buffer. The presumption is that the caller knows that there was | ||
| 378 | * a message due to a VF request so no polling for message is needed. | ||
| 379 | **/ | ||
| 380 | static s32 igb_read_mbx_pf(struct e1000_hw *hw, u32 *msg, u16 size, | ||
| 381 | u16 vf_number) | ||
| 382 | { | ||
| 383 | u32 p2v_mailbox; | ||
| 384 | s32 ret_val = 0; | ||
| 385 | u16 i; | ||
| 386 | |||
| 387 | /* Take ownership of the buffer */ | ||
| 388 | wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_PFU); | ||
| 389 | |||
| 390 | /* Make sure we have ownership now... */ | ||
| 391 | p2v_mailbox = rd32(E1000_P2VMAILBOX(vf_number)); | ||
| 392 | if (!(p2v_mailbox & E1000_P2VMAILBOX_PFU)) { | ||
| 393 | /* failed to grab ownership */ | ||
| 394 | ret_val = -E1000_ERR_MBX; | ||
| 395 | goto out_no_read; | ||
| 396 | } | ||
| 397 | |||
| 398 | /* copy the message to the mailbox memory buffer */ | ||
| 399 | for (i = 0; i < size; i++) | ||
| 400 | msg[i] = array_rd32(E1000_VMBMEM(vf_number), i); | ||
| 401 | |||
| 402 | /* Acknowledge the message and release buffer */ | ||
| 403 | wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_ACK); | ||
| 404 | |||
| 405 | /* update stats */ | ||
| 406 | hw->mbx.stats.msgs_rx++; | ||
| 407 | |||
| 408 | ret_val = 0; | ||
| 409 | |||
| 410 | out_no_read: | ||
| 411 | return ret_val; | ||
| 412 | } | ||
| 413 | |||
| 414 | /** | ||
| 415 | * e1000_init_mbx_params_pf - set initial values for pf mailbox | ||
| 416 | * @hw: pointer to the HW structure | ||
| 417 | * | ||
| 418 | * Initializes the hw->mbx struct to correct values for pf mailbox | ||
| 419 | */ | ||
| 420 | s32 igb_init_mbx_params_pf(struct e1000_hw *hw) | ||
| 421 | { | ||
| 422 | struct e1000_mbx_info *mbx = &hw->mbx; | ||
| 423 | |||
| 424 | if (hw->mac.type == e1000_82576) { | ||
| 425 | mbx->timeout = 0; | ||
| 426 | mbx->usec_delay = 0; | ||
| 427 | |||
| 428 | mbx->size = E1000_VFMAILBOX_SIZE; | ||
| 429 | |||
| 430 | mbx->ops.read = igb_read_mbx_pf; | ||
| 431 | mbx->ops.write = igb_write_mbx_pf; | ||
| 432 | mbx->ops.read_posted = igb_read_posted_mbx; | ||
| 433 | mbx->ops.write_posted = igb_write_posted_mbx; | ||
| 434 | mbx->ops.check_for_msg = igb_check_for_msg_pf; | ||
| 435 | mbx->ops.check_for_ack = igb_check_for_ack_pf; | ||
| 436 | mbx->ops.check_for_rst = igb_check_for_rst_pf; | ||
| 437 | |||
| 438 | mbx->stats.msgs_tx = 0; | ||
| 439 | mbx->stats.msgs_rx = 0; | ||
| 440 | mbx->stats.reqs = 0; | ||
| 441 | mbx->stats.acks = 0; | ||
| 442 | mbx->stats.rsts = 0; | ||
| 443 | } | ||
| 444 | |||
| 445 | return 0; | ||
| 446 | } | ||
| 447 | |||
diff --git a/drivers/net/igb/e1000_mbx.h b/drivers/net/igb/e1000_mbx.h new file mode 100644 index 000000000000..6ec9890a8f7a --- /dev/null +++ b/drivers/net/igb/e1000_mbx.h | |||
| @@ -0,0 +1,77 @@ | |||
| 1 | /******************************************************************************* | ||
| 2 | |||
| 3 | Intel(R) Gigabit Ethernet Linux driver | ||
| 4 | Copyright(c) 2007-2009 Intel Corporation. | ||
| 5 | |||
| 6 | This program is free software; you can redistribute it and/or modify it | ||
| 7 | under the terms and conditions of the GNU General Public License, | ||
| 8 | version 2, as published by the Free Software Foundation. | ||
| 9 | |||
| 10 | This program is distributed in the hope it will be useful, but WITHOUT | ||
| 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
| 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
| 13 | more details. | ||
| 14 | |||
| 15 | You should have received a copy of the GNU General Public License along with | ||
| 16 | this program; if not, write to the Free Software Foundation, Inc., | ||
| 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | ||
| 18 | |||
| 19 | The full GNU General Public License is included in this distribution in | ||
| 20 | the file called "COPYING". | ||
| 21 | |||
| 22 | Contact Information: | ||
| 23 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
| 24 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | ||
| 25 | |||
| 26 | *******************************************************************************/ | ||
| 27 | |||
| 28 | #ifndef _E1000_MBX_H_ | ||
| 29 | #define _E1000_MBX_H_ | ||
| 30 | |||
| 31 | #include "e1000_hw.h" | ||
| 32 | |||
| 33 | #define E1000_P2VMAILBOX_STS 0x00000001 /* Initiate message send to VF */ | ||
| 34 | #define E1000_P2VMAILBOX_ACK 0x00000002 /* Ack message recv'd from VF */ | ||
| 35 | #define E1000_P2VMAILBOX_VFU 0x00000004 /* VF owns the mailbox buffer */ | ||
| 36 | #define E1000_P2VMAILBOX_PFU 0x00000008 /* PF owns the mailbox buffer */ | ||
| 37 | #define E1000_P2VMAILBOX_RVFU 0x00000010 /* Reset VFU - used when VF stuck */ | ||
| 38 | |||
| 39 | #define E1000_MBVFICR_VFREQ_MASK 0x000000FF /* bits for VF messages */ | ||
| 40 | #define E1000_MBVFICR_VFREQ_VF1 0x00000001 /* bit for VF 1 message */ | ||
| 41 | #define E1000_MBVFICR_VFACK_MASK 0x00FF0000 /* bits for VF acks */ | ||
| 42 | #define E1000_MBVFICR_VFACK_VF1 0x00010000 /* bit for VF 1 ack */ | ||
| 43 | |||
| 44 | #define E1000_VFMAILBOX_SIZE 16 /* 16 32 bit words - 64 bytes */ | ||
| 45 | |||
| 46 | /* If it's a E1000_VF_* msg then it originates in the VF and is sent to the | ||
| 47 | * PF. The reverse is true if it is E1000_PF_*. | ||
| 48 | * Message ACK's are the value or'd with 0xF0000000 | ||
| 49 | */ | ||
| 50 | #define E1000_VT_MSGTYPE_ACK 0x80000000 /* Messages below or'd with | ||
| 51 | * this are the ACK */ | ||
| 52 | #define E1000_VT_MSGTYPE_NACK 0x40000000 /* Messages below or'd with | ||
| 53 | * this are the NACK */ | ||
| 54 | #define E1000_VT_MSGTYPE_CTS 0x20000000 /* Indicates that VF is still | ||
| 55 | clear to send requests */ | ||
| 56 | #define E1000_VT_MSGINFO_SHIFT 16 | ||
| 57 | /* bits 23:16 are used for exra info for certain messages */ | ||
| 58 | #define E1000_VT_MSGINFO_MASK (0xFF << E1000_VT_MSGINFO_SHIFT) | ||
| 59 | |||
| 60 | #define E1000_VF_RESET 0x01 /* VF requests reset */ | ||
| 61 | #define E1000_VF_SET_MAC_ADDR 0x02 /* VF requests PF to set MAC addr */ | ||
| 62 | #define E1000_VF_SET_MULTICAST 0x03 /* VF requests PF to set MC addr */ | ||
| 63 | #define E1000_VF_SET_VLAN 0x04 /* VF requests PF to set VLAN */ | ||
| 64 | #define E1000_VF_SET_LPE 0x05 /* VF requests PF to set VMOLR.LPE */ | ||
| 65 | |||
| 66 | #define E1000_PF_CONTROL_MSG 0x0100 /* PF control message */ | ||
| 67 | |||
| 68 | s32 igb_read_mbx(struct e1000_hw *, u32 *, u16, u16); | ||
| 69 | s32 igb_write_mbx(struct e1000_hw *, u32 *, u16, u16); | ||
| 70 | s32 igb_read_posted_mbx(struct e1000_hw *, u32 *, u16, u16); | ||
| 71 | s32 igb_write_posted_mbx(struct e1000_hw *, u32 *, u16, u16); | ||
| 72 | s32 igb_check_for_msg(struct e1000_hw *, u16); | ||
| 73 | s32 igb_check_for_ack(struct e1000_hw *, u16); | ||
| 74 | s32 igb_check_for_rst(struct e1000_hw *, u16); | ||
| 75 | s32 igb_init_mbx_params_pf(struct e1000_hw *); | ||
| 76 | |||
| 77 | #endif /* _E1000_MBX_H_ */ | ||
diff --git a/drivers/net/igb/e1000_regs.h b/drivers/net/igb/e1000_regs.h index 5d00c864d106..0bd7728fe469 100644 --- a/drivers/net/igb/e1000_regs.h +++ b/drivers/net/igb/e1000_regs.h | |||
| @@ -321,9 +321,21 @@ enum { | |||
| 321 | #define E1000_RSSRK(_i) (0x05C80 + ((_i) * 4)) /* RSS Random Key - RW Array */ | 321 | #define E1000_RSSRK(_i) (0x05C80 + ((_i) * 4)) /* RSS Random Key - RW Array */ |
| 322 | 322 | ||
| 323 | /* VT Registers */ | 323 | /* VT Registers */ |
| 324 | #define E1000_MBVFICR 0x00C80 /* Mailbox VF Cause - RWC */ | ||
| 325 | #define E1000_MBVFIMR 0x00C84 /* Mailbox VF int Mask - RW */ | ||
| 326 | #define E1000_VFLRE 0x00C88 /* VF Register Events - RWC */ | ||
| 327 | #define E1000_VFRE 0x00C8C /* VF Receive Enables */ | ||
| 328 | #define E1000_VFTE 0x00C90 /* VF Transmit Enables */ | ||
| 324 | #define E1000_QDE 0x02408 /* Queue Drop Enable - RW */ | 329 | #define E1000_QDE 0x02408 /* Queue Drop Enable - RW */ |
| 330 | #define E1000_DTXSWC 0x03500 /* DMA Tx Switch Control - RW */ | ||
| 331 | #define E1000_RPLOLR 0x05AF0 /* Replication Offload - RW */ | ||
| 332 | #define E1000_IOVTCL 0x05BBC /* IOV Control Register */ | ||
| 325 | /* These act per VF so an array friendly macro is used */ | 333 | /* These act per VF so an array friendly macro is used */ |
| 334 | #define E1000_P2VMAILBOX(_n) (0x00C00 + (4 * (_n))) | ||
| 335 | #define E1000_VMBMEM(_n) (0x00800 + (64 * (_n))) | ||
| 326 | #define E1000_VMOLR(_n) (0x05AD0 + (4 * (_n))) | 336 | #define E1000_VMOLR(_n) (0x05AD0 + (4 * (_n))) |
| 337 | #define E1000_VLVF(_n) (0x05D00 + (4 * (_n))) /* VLAN Virtual Machine | ||
| 338 | * Filter - RW */ | ||
| 327 | 339 | ||
| 328 | #define wr32(reg, value) (writel(value, hw->hw_addr + reg)) | 340 | #define wr32(reg, value) (writel(value, hw->hw_addr + reg)) |
| 329 | #define rd32(reg) (readl(hw->hw_addr + reg)) | 341 | #define rd32(reg) (readl(hw->hw_addr + reg)) |
diff --git a/drivers/net/igb/igb.h b/drivers/net/igb/igb.h index d925f7dd7fb2..e18ac1bf45ff 100644 --- a/drivers/net/igb/igb.h +++ b/drivers/net/igb/igb.h | |||
| @@ -62,6 +62,17 @@ struct igb_adapter; | |||
| 62 | #define IGB_MAX_TX_QUEUES IGB_MAX_RX_QUEUES | 62 | #define IGB_MAX_TX_QUEUES IGB_MAX_RX_QUEUES |
| 63 | #define IGB_ABS_MAX_TX_QUEUES 4 | 63 | #define IGB_ABS_MAX_TX_QUEUES 4 |
| 64 | 64 | ||
| 65 | #define IGB_MAX_VF_MC_ENTRIES 30 | ||
| 66 | #define IGB_MAX_VF_FUNCTIONS 8 | ||
| 67 | #define IGB_MAX_VFTA_ENTRIES 128 | ||
| 68 | |||
| 69 | struct vf_data_storage { | ||
| 70 | unsigned char vf_mac_addresses[ETH_ALEN]; | ||
| 71 | u16 vf_mc_hashes[IGB_MAX_VF_MC_ENTRIES]; | ||
| 72 | u16 num_vf_mc_hashes; | ||
| 73 | bool clear_to_send; | ||
| 74 | }; | ||
| 75 | |||
| 65 | /* RX descriptor control thresholds. | 76 | /* RX descriptor control thresholds. |
| 66 | * PTHRESH - MAC will consider prefetch if it has fewer than this number of | 77 | * PTHRESH - MAC will consider prefetch if it has fewer than this number of |
| 67 | * descriptors available in its onboard memory. | 78 | * descriptors available in its onboard memory. |
| @@ -272,6 +283,7 @@ struct igb_adapter { | |||
| 272 | unsigned int tx_ring_count; | 283 | unsigned int tx_ring_count; |
| 273 | unsigned int rx_ring_count; | 284 | unsigned int rx_ring_count; |
| 274 | unsigned int vfs_allocated_count; | 285 | unsigned int vfs_allocated_count; |
| 286 | struct vf_data_storage *vf_data; | ||
| 275 | }; | 287 | }; |
| 276 | 288 | ||
| 277 | #define IGB_FLAG_HAS_MSI (1 << 0) | 289 | #define IGB_FLAG_HAS_MSI (1 << 0) |
diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c index c7c7eeba3366..b9e7980e3f47 100644 --- a/drivers/net/igb/igb_main.c +++ b/drivers/net/igb/igb_main.c | |||
| @@ -122,10 +122,16 @@ static void igb_vlan_rx_register(struct net_device *, struct vlan_group *); | |||
| 122 | static void igb_vlan_rx_add_vid(struct net_device *, u16); | 122 | static void igb_vlan_rx_add_vid(struct net_device *, u16); |
| 123 | static void igb_vlan_rx_kill_vid(struct net_device *, u16); | 123 | static void igb_vlan_rx_kill_vid(struct net_device *, u16); |
| 124 | static void igb_restore_vlan(struct igb_adapter *); | 124 | static void igb_restore_vlan(struct igb_adapter *); |
| 125 | static void igb_ping_all_vfs(struct igb_adapter *); | ||
| 126 | static void igb_msg_task(struct igb_adapter *); | ||
| 127 | static int igb_rcv_msg_from_vf(struct igb_adapter *, u32); | ||
| 125 | static inline void igb_set_rah_pool(struct e1000_hw *, int , int); | 128 | static inline void igb_set_rah_pool(struct e1000_hw *, int , int); |
| 126 | static void igb_set_mc_list_pools(struct igb_adapter *, int, u16); | 129 | static void igb_set_mc_list_pools(struct igb_adapter *, int, u16); |
| 130 | static void igb_vmm_control(struct igb_adapter *); | ||
| 127 | static inline void igb_set_vmolr(struct e1000_hw *, int); | 131 | static inline void igb_set_vmolr(struct e1000_hw *, int); |
| 128 | static inline void igb_set_vf_rlpml(struct igb_adapter *, int, int); | 132 | static inline int igb_set_vf_rlpml(struct igb_adapter *, int, int); |
| 133 | static int igb_set_vf_mac(struct igb_adapter *adapter, int, unsigned char *); | ||
| 134 | static void igb_restore_vf_multicasts(struct igb_adapter *adapter); | ||
| 129 | 135 | ||
| 130 | static int igb_suspend(struct pci_dev *, pm_message_t); | 136 | static int igb_suspend(struct pci_dev *, pm_message_t); |
| 131 | #ifdef CONFIG_PM | 137 | #ifdef CONFIG_PM |
| @@ -768,7 +774,10 @@ static void igb_irq_enable(struct igb_adapter *adapter) | |||
| 768 | wr32(E1000_EIAC, adapter->eims_enable_mask); | 774 | wr32(E1000_EIAC, adapter->eims_enable_mask); |
| 769 | wr32(E1000_EIAM, adapter->eims_enable_mask); | 775 | wr32(E1000_EIAM, adapter->eims_enable_mask); |
| 770 | wr32(E1000_EIMS, adapter->eims_enable_mask); | 776 | wr32(E1000_EIMS, adapter->eims_enable_mask); |
| 771 | wr32(E1000_IMS, E1000_IMS_LSC | E1000_IMS_DOUTSYNC); | 777 | if (adapter->vfs_allocated_count) |
| 778 | wr32(E1000_MBVFIMR, 0xFF); | ||
| 779 | wr32(E1000_IMS, (E1000_IMS_LSC | E1000_IMS_VMMB | | ||
| 780 | E1000_IMS_DOUTSYNC)); | ||
| 772 | } else { | 781 | } else { |
| 773 | wr32(E1000_IMS, IMS_ENABLE_MASK); | 782 | wr32(E1000_IMS, IMS_ENABLE_MASK); |
| 774 | wr32(E1000_IAM, IMS_ENABLE_MASK); | 783 | wr32(E1000_IAM, IMS_ENABLE_MASK); |
| @@ -892,6 +901,7 @@ int igb_up(struct igb_adapter *adapter) | |||
| 892 | if (adapter->msix_entries) | 901 | if (adapter->msix_entries) |
| 893 | igb_configure_msix(adapter); | 902 | igb_configure_msix(adapter); |
| 894 | 903 | ||
| 904 | igb_vmm_control(adapter); | ||
| 895 | igb_set_rah_pool(hw, adapter->vfs_allocated_count, 0); | 905 | igb_set_rah_pool(hw, adapter->vfs_allocated_count, 0); |
| 896 | igb_set_vmolr(hw, adapter->vfs_allocated_count); | 906 | igb_set_vmolr(hw, adapter->vfs_allocated_count); |
| 897 | 907 | ||
| @@ -1047,6 +1057,20 @@ void igb_reset(struct igb_adapter *adapter) | |||
| 1047 | fc->send_xon = 1; | 1057 | fc->send_xon = 1; |
| 1048 | fc->type = fc->original_type; | 1058 | fc->type = fc->original_type; |
| 1049 | 1059 | ||
| 1060 | /* disable receive for all VFs and wait one second */ | ||
| 1061 | if (adapter->vfs_allocated_count) { | ||
| 1062 | int i; | ||
| 1063 | for (i = 0 ; i < adapter->vfs_allocated_count; i++) | ||
| 1064 | adapter->vf_data[i].clear_to_send = false; | ||
| 1065 | |||
| 1066 | /* ping all the active vfs to let them know we are going down */ | ||
| 1067 | igb_ping_all_vfs(adapter); | ||
| 1068 | |||
| 1069 | /* disable transmits and receives */ | ||
| 1070 | wr32(E1000_VFRE, 0); | ||
| 1071 | wr32(E1000_VFTE, 0); | ||
| 1072 | } | ||
| 1073 | |||
| 1050 | /* Allow time for pending master requests to run */ | 1074 | /* Allow time for pending master requests to run */ |
| 1051 | adapter->hw.mac.ops.reset_hw(&adapter->hw); | 1075 | adapter->hw.mac.ops.reset_hw(&adapter->hw); |
| 1052 | wr32(E1000_WUC, 0); | 1076 | wr32(E1000_WUC, 0); |
| @@ -1624,6 +1648,7 @@ static int igb_open(struct net_device *netdev) | |||
| 1624 | * clean_rx handler before we do so. */ | 1648 | * clean_rx handler before we do so. */ |
| 1625 | igb_configure(adapter); | 1649 | igb_configure(adapter); |
| 1626 | 1650 | ||
| 1651 | igb_vmm_control(adapter); | ||
| 1627 | igb_set_rah_pool(hw, adapter->vfs_allocated_count, 0); | 1652 | igb_set_rah_pool(hw, adapter->vfs_allocated_count, 0); |
| 1628 | igb_set_vmolr(hw, adapter->vfs_allocated_count); | 1653 | igb_set_vmolr(hw, adapter->vfs_allocated_count); |
| 1629 | 1654 | ||
| @@ -2456,6 +2481,8 @@ static void igb_set_multi(struct net_device *netdev) | |||
| 2456 | mac->rar_entry_count); | 2481 | mac->rar_entry_count); |
| 2457 | 2482 | ||
| 2458 | igb_set_mc_list_pools(adapter, i, mac->rar_entry_count); | 2483 | igb_set_mc_list_pools(adapter, i, mac->rar_entry_count); |
| 2484 | igb_restore_vf_multicasts(adapter); | ||
| 2485 | |||
| 2459 | kfree(mta_list); | 2486 | kfree(mta_list); |
| 2460 | } | 2487 | } |
| 2461 | 2488 | ||
| @@ -2571,6 +2598,8 @@ static void igb_watchdog_task(struct work_struct *work) | |||
| 2571 | netif_carrier_on(netdev); | 2598 | netif_carrier_on(netdev); |
| 2572 | netif_tx_wake_all_queues(netdev); | 2599 | netif_tx_wake_all_queues(netdev); |
| 2573 | 2600 | ||
| 2601 | igb_ping_all_vfs(adapter); | ||
| 2602 | |||
| 2574 | /* link state has changed, schedule phy info update */ | 2603 | /* link state has changed, schedule phy info update */ |
| 2575 | if (!test_bit(__IGB_DOWN, &adapter->state)) | 2604 | if (!test_bit(__IGB_DOWN, &adapter->state)) |
| 2576 | mod_timer(&adapter->phy_info_timer, | 2605 | mod_timer(&adapter->phy_info_timer, |
| @@ -2586,6 +2615,8 @@ static void igb_watchdog_task(struct work_struct *work) | |||
| 2586 | netif_carrier_off(netdev); | 2615 | netif_carrier_off(netdev); |
| 2587 | netif_tx_stop_all_queues(netdev); | 2616 | netif_tx_stop_all_queues(netdev); |
| 2588 | 2617 | ||
| 2618 | igb_ping_all_vfs(adapter); | ||
| 2619 | |||
| 2589 | /* link state has changed, schedule phy info update */ | 2620 | /* link state has changed, schedule phy info update */ |
| 2590 | if (!test_bit(__IGB_DOWN, &adapter->state)) | 2621 | if (!test_bit(__IGB_DOWN, &adapter->state)) |
| 2591 | mod_timer(&adapter->phy_info_timer, | 2622 | mod_timer(&adapter->phy_info_timer, |
| @@ -3523,15 +3554,19 @@ static irqreturn_t igb_msix_other(int irq, void *data) | |||
| 3523 | /* HW is reporting DMA is out of sync */ | 3554 | /* HW is reporting DMA is out of sync */ |
| 3524 | adapter->stats.doosync++; | 3555 | adapter->stats.doosync++; |
| 3525 | } | 3556 | } |
| 3526 | if (!(icr & E1000_ICR_LSC)) | ||
| 3527 | goto no_link_interrupt; | ||
| 3528 | hw->mac.get_link_status = 1; | ||
| 3529 | /* guard against interrupt when we're going down */ | ||
| 3530 | if (!test_bit(__IGB_DOWN, &adapter->state)) | ||
| 3531 | mod_timer(&adapter->watchdog_timer, jiffies + 1); | ||
| 3532 | 3557 | ||
| 3533 | no_link_interrupt: | 3558 | /* Check for a mailbox event */ |
| 3534 | wr32(E1000_IMS, E1000_IMS_LSC | E1000_IMS_DOUTSYNC); | 3559 | if (icr & E1000_ICR_VMMB) |
| 3560 | igb_msg_task(adapter); | ||
| 3561 | |||
| 3562 | if (icr & E1000_ICR_LSC) { | ||
| 3563 | hw->mac.get_link_status = 1; | ||
| 3564 | /* guard against interrupt when we're going down */ | ||
| 3565 | if (!test_bit(__IGB_DOWN, &adapter->state)) | ||
| 3566 | mod_timer(&adapter->watchdog_timer, jiffies + 1); | ||
| 3567 | } | ||
| 3568 | |||
| 3569 | wr32(E1000_IMS, E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_VMMB); | ||
| 3535 | wr32(E1000_EIMS, adapter->eims_other); | 3570 | wr32(E1000_EIMS, adapter->eims_other); |
| 3536 | 3571 | ||
| 3537 | return IRQ_HANDLED; | 3572 | return IRQ_HANDLED; |
| @@ -3719,6 +3754,317 @@ static int igb_notify_dca(struct notifier_block *nb, unsigned long event, | |||
| 3719 | } | 3754 | } |
| 3720 | #endif /* CONFIG_IGB_DCA */ | 3755 | #endif /* CONFIG_IGB_DCA */ |
| 3721 | 3756 | ||
| 3757 | static void igb_ping_all_vfs(struct igb_adapter *adapter) | ||
| 3758 | { | ||
| 3759 | struct e1000_hw *hw = &adapter->hw; | ||
| 3760 | u32 ping; | ||
| 3761 | int i; | ||
| 3762 | |||
| 3763 | for (i = 0 ; i < adapter->vfs_allocated_count; i++) { | ||
| 3764 | ping = E1000_PF_CONTROL_MSG; | ||
| 3765 | if (adapter->vf_data[i].clear_to_send) | ||
| 3766 | ping |= E1000_VT_MSGTYPE_CTS; | ||
| 3767 | igb_write_mbx(hw, &ping, 1, i); | ||
| 3768 | } | ||
| 3769 | } | ||
| 3770 | |||
| 3771 | static int igb_set_vf_multicasts(struct igb_adapter *adapter, | ||
| 3772 | u32 *msgbuf, u32 vf) | ||
| 3773 | { | ||
| 3774 | int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT; | ||
| 3775 | u16 *hash_list = (u16 *)&msgbuf[1]; | ||
| 3776 | struct vf_data_storage *vf_data = &adapter->vf_data[vf]; | ||
| 3777 | int i; | ||
| 3778 | |||
| 3779 | /* only up to 30 hash values supported */ | ||
| 3780 | if (n > 30) | ||
| 3781 | n = 30; | ||
| 3782 | |||
| 3783 | /* salt away the number of multi cast addresses assigned | ||
| 3784 | * to this VF for later use to restore when the PF multi cast | ||
| 3785 | * list changes | ||
| 3786 | */ | ||
| 3787 | vf_data->num_vf_mc_hashes = n; | ||
| 3788 | |||
| 3789 | /* VFs are limited to using the MTA hash table for their multicast | ||
| 3790 | * addresses */ | ||
| 3791 | for (i = 0; i < n; i++) | ||
| 3792 | vf_data->vf_mc_hashes[i] = hash_list[i];; | ||
| 3793 | |||
| 3794 | /* Flush and reset the mta with the new values */ | ||
| 3795 | igb_set_multi(adapter->netdev); | ||
| 3796 | |||
| 3797 | return 0; | ||
| 3798 | } | ||
| 3799 | |||
| 3800 | static void igb_restore_vf_multicasts(struct igb_adapter *adapter) | ||
| 3801 | { | ||
| 3802 | struct e1000_hw *hw = &adapter->hw; | ||
| 3803 | struct vf_data_storage *vf_data; | ||
| 3804 | int i, j; | ||
| 3805 | |||
| 3806 | for (i = 0; i < adapter->vfs_allocated_count; i++) { | ||
| 3807 | vf_data = &adapter->vf_data[i]; | ||
| 3808 | for (j = 0; j < vf_data[i].num_vf_mc_hashes; j++) | ||
| 3809 | igb_mta_set(hw, vf_data->vf_mc_hashes[j]); | ||
| 3810 | } | ||
| 3811 | } | ||
| 3812 | |||
| 3813 | static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf) | ||
| 3814 | { | ||
| 3815 | struct e1000_hw *hw = &adapter->hw; | ||
| 3816 | u32 pool_mask, reg, vid; | ||
| 3817 | int i; | ||
| 3818 | |||
| 3819 | pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf); | ||
| 3820 | |||
| 3821 | /* Find the vlan filter for this id */ | ||
| 3822 | for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) { | ||
| 3823 | reg = rd32(E1000_VLVF(i)); | ||
| 3824 | |||
| 3825 | /* remove the vf from the pool */ | ||
| 3826 | reg &= ~pool_mask; | ||
| 3827 | |||
| 3828 | /* if pool is empty then remove entry from vfta */ | ||
| 3829 | if (!(reg & E1000_VLVF_POOLSEL_MASK) && | ||
| 3830 | (reg & E1000_VLVF_VLANID_ENABLE)) { | ||
| 3831 | reg = 0; | ||
| 3832 | vid = reg & E1000_VLVF_VLANID_MASK; | ||
| 3833 | igb_vfta_set(hw, vid, false); | ||
| 3834 | } | ||
| 3835 | |||
| 3836 | wr32(E1000_VLVF(i), reg); | ||
| 3837 | } | ||
| 3838 | } | ||
| 3839 | |||
| 3840 | static s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf) | ||
| 3841 | { | ||
| 3842 | struct e1000_hw *hw = &adapter->hw; | ||
| 3843 | u32 reg, i; | ||
| 3844 | |||
| 3845 | /* It is an error to call this function when VFs are not enabled */ | ||
| 3846 | if (!adapter->vfs_allocated_count) | ||
| 3847 | return -1; | ||
| 3848 | |||
| 3849 | /* Find the vlan filter for this id */ | ||
| 3850 | for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) { | ||
| 3851 | reg = rd32(E1000_VLVF(i)); | ||
| 3852 | if ((reg & E1000_VLVF_VLANID_ENABLE) && | ||
| 3853 | vid == (reg & E1000_VLVF_VLANID_MASK)) | ||
| 3854 | break; | ||
| 3855 | } | ||
| 3856 | |||
| 3857 | if (add) { | ||
| 3858 | if (i == E1000_VLVF_ARRAY_SIZE) { | ||
| 3859 | /* Did not find a matching VLAN ID entry that was | ||
| 3860 | * enabled. Search for a free filter entry, i.e. | ||
| 3861 | * one without the enable bit set | ||
| 3862 | */ | ||
| 3863 | for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) { | ||
| 3864 | reg = rd32(E1000_VLVF(i)); | ||
| 3865 | if (!(reg & E1000_VLVF_VLANID_ENABLE)) | ||
| 3866 | break; | ||
| 3867 | } | ||
| 3868 | } | ||
| 3869 | if (i < E1000_VLVF_ARRAY_SIZE) { | ||
| 3870 | /* Found an enabled/available entry */ | ||
| 3871 | reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf); | ||
| 3872 | |||
| 3873 | /* if !enabled we need to set this up in vfta */ | ||
| 3874 | if (!(reg & E1000_VLVF_VLANID_ENABLE)) { | ||
| 3875 | /* add VID to filter table */ | ||
| 3876 | igb_vfta_set(hw, vid, true); | ||
| 3877 | reg |= E1000_VLVF_VLANID_ENABLE; | ||
| 3878 | } | ||
| 3879 | |||
| 3880 | wr32(E1000_VLVF(i), reg); | ||
| 3881 | return 0; | ||
| 3882 | } | ||
| 3883 | } else { | ||
| 3884 | if (i < E1000_VLVF_ARRAY_SIZE) { | ||
| 3885 | /* remove vf from the pool */ | ||
| 3886 | reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf)); | ||
| 3887 | /* if pool is empty then remove entry from vfta */ | ||
| 3888 | if (!(reg & E1000_VLVF_POOLSEL_MASK)) { | ||
| 3889 | reg = 0; | ||
| 3890 | igb_vfta_set(hw, vid, false); | ||
| 3891 | } | ||
| 3892 | wr32(E1000_VLVF(i), reg); | ||
| 3893 | return 0; | ||
| 3894 | } | ||
| 3895 | } | ||
| 3896 | return -1; | ||
| 3897 | } | ||
| 3898 | |||
| 3899 | static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf) | ||
| 3900 | { | ||
| 3901 | int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT; | ||
| 3902 | int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK); | ||
| 3903 | |||
| 3904 | return igb_vlvf_set(adapter, vid, add, vf); | ||
| 3905 | } | ||
| 3906 | |||
| 3907 | static inline void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf) | ||
| 3908 | { | ||
| 3909 | struct e1000_hw *hw = &adapter->hw; | ||
| 3910 | |||
| 3911 | /* disable mailbox functionality for vf */ | ||
| 3912 | adapter->vf_data[vf].clear_to_send = false; | ||
| 3913 | |||
| 3914 | /* reset offloads to defaults */ | ||
| 3915 | igb_set_vmolr(hw, vf); | ||
| 3916 | |||
| 3917 | /* reset vlans for device */ | ||
| 3918 | igb_clear_vf_vfta(adapter, vf); | ||
| 3919 | |||
| 3920 | /* reset multicast table array for vf */ | ||
| 3921 | adapter->vf_data[vf].num_vf_mc_hashes = 0; | ||
| 3922 | |||
| 3923 | /* Flush and reset the mta with the new values */ | ||
| 3924 | igb_set_multi(adapter->netdev); | ||
| 3925 | } | ||
| 3926 | |||
| 3927 | static inline void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf) | ||
| 3928 | { | ||
| 3929 | struct e1000_hw *hw = &adapter->hw; | ||
| 3930 | unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses; | ||
| 3931 | u32 reg, msgbuf[3]; | ||
| 3932 | u8 *addr = (u8 *)(&msgbuf[1]); | ||
| 3933 | |||
| 3934 | /* process all the same items cleared in a function level reset */ | ||
| 3935 | igb_vf_reset_event(adapter, vf); | ||
| 3936 | |||
| 3937 | /* set vf mac address */ | ||
| 3938 | igb_rar_set(hw, vf_mac, vf + 1); | ||
| 3939 | igb_set_rah_pool(hw, vf, vf + 1); | ||
| 3940 | |||
| 3941 | /* enable transmit and receive for vf */ | ||
| 3942 | reg = rd32(E1000_VFTE); | ||
| 3943 | wr32(E1000_VFTE, reg | (1 << vf)); | ||
| 3944 | reg = rd32(E1000_VFRE); | ||
| 3945 | wr32(E1000_VFRE, reg | (1 << vf)); | ||
| 3946 | |||
| 3947 | /* enable mailbox functionality for vf */ | ||
| 3948 | adapter->vf_data[vf].clear_to_send = true; | ||
| 3949 | |||
| 3950 | /* reply to reset with ack and vf mac address */ | ||
| 3951 | msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK; | ||
| 3952 | memcpy(addr, vf_mac, 6); | ||
| 3953 | igb_write_mbx(hw, msgbuf, 3, vf); | ||
| 3954 | } | ||
| 3955 | |||
| 3956 | static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf) | ||
| 3957 | { | ||
| 3958 | unsigned char *addr = (char *)&msg[1]; | ||
| 3959 | int err = -1; | ||
| 3960 | |||
| 3961 | if (is_valid_ether_addr(addr)) | ||
| 3962 | err = igb_set_vf_mac(adapter, vf, addr); | ||
| 3963 | |||
| 3964 | return err; | ||
| 3965 | |||
| 3966 | } | ||
| 3967 | |||
| 3968 | static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf) | ||
| 3969 | { | ||
| 3970 | struct e1000_hw *hw = &adapter->hw; | ||
| 3971 | u32 msg = E1000_VT_MSGTYPE_NACK; | ||
| 3972 | |||
| 3973 | /* if device isn't clear to send it shouldn't be reading either */ | ||
| 3974 | if (!adapter->vf_data[vf].clear_to_send) | ||
| 3975 | igb_write_mbx(hw, &msg, 1, vf); | ||
| 3976 | } | ||
| 3977 | |||
| 3978 | |||
| 3979 | static void igb_msg_task(struct igb_adapter *adapter) | ||
| 3980 | { | ||
| 3981 | struct e1000_hw *hw = &adapter->hw; | ||
| 3982 | u32 vf; | ||
| 3983 | |||
| 3984 | for (vf = 0; vf < adapter->vfs_allocated_count; vf++) { | ||
| 3985 | /* process any reset requests */ | ||
| 3986 | if (!igb_check_for_rst(hw, vf)) { | ||
| 3987 | adapter->vf_data[vf].clear_to_send = false; | ||
| 3988 | igb_vf_reset_event(adapter, vf); | ||
| 3989 | } | ||
| 3990 | |||
| 3991 | /* process any messages pending */ | ||
| 3992 | if (!igb_check_for_msg(hw, vf)) | ||
| 3993 | igb_rcv_msg_from_vf(adapter, vf); | ||
| 3994 | |||
| 3995 | /* process any acks */ | ||
| 3996 | if (!igb_check_for_ack(hw, vf)) | ||
| 3997 | igb_rcv_ack_from_vf(adapter, vf); | ||
| 3998 | |||
| 3999 | } | ||
| 4000 | } | ||
| 4001 | |||
| 4002 | static int igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf) | ||
| 4003 | { | ||
| 4004 | u32 mbx_size = E1000_VFMAILBOX_SIZE; | ||
| 4005 | u32 msgbuf[mbx_size]; | ||
| 4006 | struct e1000_hw *hw = &adapter->hw; | ||
| 4007 | s32 retval; | ||
| 4008 | |||
| 4009 | retval = igb_read_mbx(hw, msgbuf, mbx_size, vf); | ||
| 4010 | |||
| 4011 | if (retval) | ||
| 4012 | dev_err(&adapter->pdev->dev, | ||
| 4013 | "Error receiving message from VF\n"); | ||
| 4014 | |||
| 4015 | /* this is a message we already processed, do nothing */ | ||
| 4016 | if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK)) | ||
| 4017 | return retval; | ||
| 4018 | |||
| 4019 | /* | ||
| 4020 | * until the vf completes a reset it should not be | ||
| 4021 | * allowed to start any configuration. | ||
| 4022 | */ | ||
| 4023 | |||
| 4024 | if (msgbuf[0] == E1000_VF_RESET) { | ||
| 4025 | igb_vf_reset_msg(adapter, vf); | ||
| 4026 | |||
| 4027 | return retval; | ||
| 4028 | } | ||
| 4029 | |||
| 4030 | if (!adapter->vf_data[vf].clear_to_send) { | ||
| 4031 | msgbuf[0] |= E1000_VT_MSGTYPE_NACK; | ||
| 4032 | igb_write_mbx(hw, msgbuf, 1, vf); | ||
| 4033 | return retval; | ||
| 4034 | } | ||
| 4035 | |||
| 4036 | switch ((msgbuf[0] & 0xFFFF)) { | ||
| 4037 | case E1000_VF_SET_MAC_ADDR: | ||
| 4038 | retval = igb_set_vf_mac_addr(adapter, msgbuf, vf); | ||
| 4039 | break; | ||
| 4040 | case E1000_VF_SET_MULTICAST: | ||
| 4041 | retval = igb_set_vf_multicasts(adapter, msgbuf, vf); | ||
| 4042 | break; | ||
| 4043 | case E1000_VF_SET_LPE: | ||
| 4044 | retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf); | ||
| 4045 | break; | ||
| 4046 | case E1000_VF_SET_VLAN: | ||
| 4047 | retval = igb_set_vf_vlan(adapter, msgbuf, vf); | ||
| 4048 | break; | ||
| 4049 | default: | ||
| 4050 | dev_err(&adapter->pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]); | ||
| 4051 | retval = -1; | ||
| 4052 | break; | ||
| 4053 | } | ||
| 4054 | |||
| 4055 | /* notify the VF of the results of what it sent us */ | ||
| 4056 | if (retval) | ||
| 4057 | msgbuf[0] |= E1000_VT_MSGTYPE_NACK; | ||
| 4058 | else | ||
| 4059 | msgbuf[0] |= E1000_VT_MSGTYPE_ACK; | ||
| 4060 | |||
| 4061 | msgbuf[0] |= E1000_VT_MSGTYPE_CTS; | ||
| 4062 | |||
| 4063 | igb_write_mbx(hw, msgbuf, 1, vf); | ||
| 4064 | |||
| 4065 | return retval; | ||
| 4066 | } | ||
| 4067 | |||
| 3722 | /** | 4068 | /** |
| 3723 | * igb_intr_msi - Interrupt Handler | 4069 | * igb_intr_msi - Interrupt Handler |
| 3724 | * @irq: interrupt number | 4070 | * @irq: interrupt number |
| @@ -4582,24 +4928,25 @@ static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid) | |||
| 4582 | { | 4928 | { |
| 4583 | struct igb_adapter *adapter = netdev_priv(netdev); | 4929 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 4584 | struct e1000_hw *hw = &adapter->hw; | 4930 | struct e1000_hw *hw = &adapter->hw; |
| 4585 | u32 vfta, index; | 4931 | int pf_id = adapter->vfs_allocated_count; |
| 4586 | 4932 | ||
| 4587 | if ((hw->mng_cookie.status & | 4933 | if ((hw->mng_cookie.status & |
| 4588 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && | 4934 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && |
| 4589 | (vid == adapter->mng_vlan_id)) | 4935 | (vid == adapter->mng_vlan_id)) |
| 4590 | return; | 4936 | return; |
| 4591 | /* add VID to filter table */ | 4937 | |
| 4592 | index = (vid >> 5) & 0x7F; | 4938 | /* add vid to vlvf if sr-iov is enabled, |
| 4593 | vfta = array_rd32(E1000_VFTA, index); | 4939 | * if that fails add directly to filter table */ |
| 4594 | vfta |= (1 << (vid & 0x1F)); | 4940 | if (igb_vlvf_set(adapter, vid, true, pf_id)) |
| 4595 | igb_write_vfta(&adapter->hw, index, vfta); | 4941 | igb_vfta_set(hw, vid, true); |
| 4942 | |||
| 4596 | } | 4943 | } |
| 4597 | 4944 | ||
| 4598 | static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) | 4945 | static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) |
| 4599 | { | 4946 | { |
| 4600 | struct igb_adapter *adapter = netdev_priv(netdev); | 4947 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 4601 | struct e1000_hw *hw = &adapter->hw; | 4948 | struct e1000_hw *hw = &adapter->hw; |
| 4602 | u32 vfta, index; | 4949 | int pf_id = adapter->vfs_allocated_count; |
| 4603 | 4950 | ||
| 4604 | igb_irq_disable(adapter); | 4951 | igb_irq_disable(adapter); |
| 4605 | vlan_group_set_device(adapter->vlgrp, vid, NULL); | 4952 | vlan_group_set_device(adapter->vlgrp, vid, NULL); |
| @@ -4615,11 +4962,10 @@ static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) | |||
| 4615 | return; | 4962 | return; |
| 4616 | } | 4963 | } |
| 4617 | 4964 | ||
| 4618 | /* remove VID from filter table */ | 4965 | /* remove vid from vlvf if sr-iov is enabled, |
| 4619 | index = (vid >> 5) & 0x7F; | 4966 | * if not in vlvf remove from vfta */ |
| 4620 | vfta = array_rd32(E1000_VFTA, index); | 4967 | if (igb_vlvf_set(adapter, vid, false, pf_id)) |
| 4621 | vfta &= ~(1 << (vid & 0x1F)); | 4968 | igb_vfta_set(hw, vid, false); |
| 4622 | igb_write_vfta(&adapter->hw, index, vfta); | ||
| 4623 | } | 4969 | } |
| 4624 | 4970 | ||
| 4625 | static void igb_restore_vlan(struct igb_adapter *adapter) | 4971 | static void igb_restore_vlan(struct igb_adapter *adapter) |
| @@ -4950,8 +5296,8 @@ static inline void igb_set_vmolr(struct e1000_hw *hw, int vfn) | |||
| 4950 | wr32(E1000_VMOLR(vfn), reg_data); | 5296 | wr32(E1000_VMOLR(vfn), reg_data); |
| 4951 | } | 5297 | } |
| 4952 | 5298 | ||
| 4953 | static inline void igb_set_vf_rlpml(struct igb_adapter *adapter, int size, | 5299 | static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size, |
| 4954 | int vfn) | 5300 | int vfn) |
| 4955 | { | 5301 | { |
| 4956 | struct e1000_hw *hw = &adapter->hw; | 5302 | struct e1000_hw *hw = &adapter->hw; |
| 4957 | u32 vmolr; | 5303 | u32 vmolr; |
| @@ -4960,6 +5306,8 @@ static inline void igb_set_vf_rlpml(struct igb_adapter *adapter, int size, | |||
| 4960 | vmolr &= ~E1000_VMOLR_RLPML_MASK; | 5306 | vmolr &= ~E1000_VMOLR_RLPML_MASK; |
| 4961 | vmolr |= size | E1000_VMOLR_LPE; | 5307 | vmolr |= size | E1000_VMOLR_LPE; |
| 4962 | wr32(E1000_VMOLR(vfn), vmolr); | 5308 | wr32(E1000_VMOLR(vfn), vmolr); |
| 5309 | |||
| 5310 | return 0; | ||
| 4963 | } | 5311 | } |
| 4964 | 5312 | ||
| 4965 | static inline void igb_set_rah_pool(struct e1000_hw *hw, int pool, int entry) | 5313 | static inline void igb_set_rah_pool(struct e1000_hw *hw, int pool, int entry) |
| @@ -4985,4 +5333,37 @@ static void igb_set_mc_list_pools(struct igb_adapter *adapter, | |||
| 4985 | igb_set_rah_pool(hw, adapter->vfs_allocated_count, i); | 5333 | igb_set_rah_pool(hw, adapter->vfs_allocated_count, i); |
| 4986 | } | 5334 | } |
| 4987 | 5335 | ||
| 5336 | static int igb_set_vf_mac(struct igb_adapter *adapter, | ||
| 5337 | int vf, unsigned char *mac_addr) | ||
| 5338 | { | ||
| 5339 | struct e1000_hw *hw = &adapter->hw; | ||
| 5340 | int rar_entry = vf + 1; /* VF MAC addresses start at entry 1 */ | ||
| 5341 | |||
| 5342 | igb_rar_set(hw, mac_addr, rar_entry); | ||
| 5343 | |||
| 5344 | memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, 6); | ||
| 5345 | |||
| 5346 | igb_set_rah_pool(hw, vf, rar_entry); | ||
| 5347 | |||
| 5348 | return 0; | ||
| 5349 | } | ||
| 5350 | |||
| 5351 | static void igb_vmm_control(struct igb_adapter *adapter) | ||
| 5352 | { | ||
| 5353 | struct e1000_hw *hw = &adapter->hw; | ||
| 5354 | u32 reg_data; | ||
| 5355 | |||
| 5356 | if (!adapter->vfs_allocated_count) | ||
| 5357 | return; | ||
| 5358 | |||
| 5359 | /* VF's need PF reset indication before they | ||
| 5360 | * can send/receive mail */ | ||
| 5361 | reg_data = rd32(E1000_CTRL_EXT); | ||
| 5362 | reg_data |= E1000_CTRL_EXT_PFRSTD; | ||
| 5363 | wr32(E1000_CTRL_EXT, reg_data); | ||
| 5364 | |||
| 5365 | igb_vmdq_set_loopback_pf(hw, true); | ||
| 5366 | igb_vmdq_set_replication_pf(hw, true); | ||
| 5367 | } | ||
| 5368 | |||
| 4988 | /* igb_main.c */ | 5369 | /* igb_main.c */ |
