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-rw-r--r--Documentation/hwmon/asc7621296
-rw-r--r--MAINTAINERS7
-rw-r--r--drivers/hwmon/Kconfig13
-rw-r--r--drivers/hwmon/Makefile1
-rw-r--r--drivers/hwmon/asc7621.c1255
5 files changed, 1572 insertions, 0 deletions
diff --git a/Documentation/hwmon/asc7621 b/Documentation/hwmon/asc7621
new file mode 100644
index 000000000000..7287be7e1f21
--- /dev/null
+++ b/Documentation/hwmon/asc7621
@@ -0,0 +1,296 @@
1Kernel driver asc7621
2==================
3
4Supported chips:
5 Andigilog aSC7621 and aSC7621a
6 Prefix: 'asc7621'
7 Addresses scanned: I2C 0x2c, 0x2d, 0x2e
8 Datasheet: http://www.fairview5.com/linux/asc7621/asc7621.pdf
9
10Author:
11 George Joseph
12
13Description provided by Dave Pivin @ Andigilog:
14
15Andigilog has both the PECI and pre-PECI versions of the Heceta-6, as
16Intel calls them. Heceta-6e has high frequency PWM and Heceta-6p has
17added PECI and a 4th thermal zone. The Andigilog aSC7611 is the
18Heceta-6e part and aSC7621 is the Heceta-6p part. They are both in
19volume production, shipping to Intel and their subs.
20
21We have enhanced both parts relative to the governing Intel
22specification. First enhancement is temperature reading resolution. We
23have used registers below 20h for vendor-specific functions in addition
24to those in the Intel-specified vendor range.
25
26Our conversion process produces a result that is reported as two bytes.
27The fan speed control uses this finer value to produce a "step-less" fan
28PWM output. These two bytes are "read-locked" to guarantee that once a
29high or low byte is read, the other byte is locked-in until after the
30next read of any register. So to get an atomic reading, read high or low
31byte, then the very next read should be the opposite byte. Our data
32sheet says 10-bits of resolution, although you may find the lower bits
33are active, they are not necessarily reliable or useful externally. We
34chose not to mask them.
35
36We employ significant filtering that is user tunable as described in the
37data sheet. Our temperature reports and fan PWM outputs are very smooth
38when compared to the competition, in addition to the higher resolution
39temperature reports. The smoother PWM output does not require user
40intervention.
41
42We offer GPIO features on the former VID pins. These are open-drain
43outputs or inputs and may be used as general purpose I/O or as alarm
44outputs that are based on temperature limits. These are in 19h and 1Ah.
45
46We offer flexible mapping of temperature readings to thermal zones. Any
47temperature may be mapped to any zone, which has a default assignment
48that follows Intel's specs.
49
50Since there is a fan to zone assignment that allows for the "hotter" of
51a set of zones to control the PWM of an individual fan, but there is no
52indication to the user, we have added an indicator that shows which zone
53is currently controlling the PWM for a given fan. This is in register
5400h.
55
56Both remote diode temperature readings may be given an offset value such
57that the reported reading as well as the temperature used to determine
58PWM may be offset for system calibration purposes.
59
60PECI Extended configuration allows for having more than two domains per
61PECI address and also provides an enabling function for each PECI
62address. One could use our flexible zone assignment to have a zone
63assigned to up to 4 PECI addresses. This is not possible in the default
64Intel configuration. This would be useful in multi-CPU systems with
65individual fans on each that would benefit from individual fan control.
66This is in register 0Eh.
67
68The tachometer measurement system is flexible and able to adapt to many
69fan types. We can also support pulse-stretched PWM so that 3-wire fans
70may be used. These characteristics are in registers 04h to 07h.
71
72Finally, we have added a tach disable function that turns off the tach
73measurement system for individual tachs in order to save power. That is
74in register 75h.
75
76--
77aSC7621 Product Description
78
79The aSC7621 has a two wire digital interface compatible with SMBus 2.0.
80Using a 10-bit ADC, the aSC7621 measures the temperature of two remote diode
81connected transistors as well as its own die. Support for Platform
82Environmental Control Interface (PECI) is included.
83
84Using temperature information from these four zones, an automatic fan speed
85control algorithm is employed to minimize acoustic impact while achieving
86recommended CPU temperature under varying operational loads.
87
88To set fan speed, the aSC7621 has three independent pulse width modulation
89(PWM) outputs that are controlled by one, or a combination of three,
90temperature zones. Both high- and low-frequency PWM ranges are supported.
91
92The aSC7621 also includes a digital filter that can be invoked to smooth
93temperature readings for better control of fan speed and minimum acoustic
94impact.
95
96The aSC7621 has tachometer inputs to measure fan speed on up to four fans.
97Limit and status registers for all measured values are included to alert
98the system host that any measurements are outside of programmed limits
99via status registers.
100
101System voltages of VCCP, 2.5V, 3.3V, 5.0V, and 12V motherboard power are
102monitored efficiently with internal scaling resistors.
103
104Features
105- Supports PECI interface and monitors internal and remote thermal diodes
106- 2-wire, SMBus 2.0 compliant, serial interface
107- 10-bit ADC
108- Monitors VCCP, 2.5V, 3.3V, 5.0V, and 12V motherboard/processor supplies
109- Programmable autonomous fan control based on temperature readings
110- Noise filtering of temperature reading for fan speed control
111- 0.25C digital temperature sensor resolution
112- 3 PWM fan speed control outputs for 2-, 3- or 4-wire fans and up to 4 fan
113 tachometer inputs
114- Enhanced measured temperature to Temperature Zone assignment.
115- Provides high and low PWM frequency ranges
116- 3 GPIO pins for custom use
117- 24-Lead QSOP package
118
119Configuration Notes
120===================
121
122Except where noted below, the sysfs entries created by this driver follow
123the standards defined in "sysfs-interface".
124
125temp1_source
126 0 (default) peci_legacy = 0, Remote 1 Temperature
127 peci_legacy = 1, PECI Processor Temperature 0
128 1 Remote 1 Temperature
129 2 Remote 2 Temperature
130 3 Internal Temperature
131 4 PECI Processor Temperature 0
132 5 PECI Processor Temperature 1
133 6 PECI Processor Temperature 2
134 7 PECI Processor Temperature 3
135
136temp2_source
137 0 (default) Internal Temperature
138 1 Remote 1 Temperature
139 2 Remote 2 Temperature
140 3 Internal Temperature
141 4 PECI Processor Temperature 0
142 5 PECI Processor Temperature 1
143 6 PECI Processor Temperature 2
144 7 PECI Processor Temperature 3
145
146temp3_source
147 0 (default) Remote 2 Temperature
148 1 Remote 1 Temperature
149 2 Remote 2 Temperature
150 3 Internal Temperature
151 4 PECI Processor Temperature 0
152 5 PECI Processor Temperature 1
153 6 PECI Processor Temperature 2
154 7 PECI Processor Temperature 3
155
156temp4_source
157 0 (default) peci_legacy = 0, PECI Processor Temperature 0
158 peci_legacy = 1, Remote 1 Temperature
159 1 Remote 1 Temperature
160 2 Remote 2 Temperature
161 3 Internal Temperature
162 4 PECI Processor Temperature 0
163 5 PECI Processor Temperature 1
164 6 PECI Processor Temperature 2
165 7 PECI Processor Temperature 3
166
167temp[1-4]_smoothing_enable
168temp[1-4]_smoothing_time
169 Smooths spikes in temp readings caused by noise.
170 Valid values in milliseconds are:
171 35000
172 17600
173 11800
174 7000
175 4400
176 3000
177 1600
178 800
179
180temp[1-4]_crit
181 When the corresponding zone temperature reaches this value,
182 ALL pwm outputs will got to 100%.
183
184temp[5-8]_input
185temp[5-8]_enable
186 The aSC7621 can also read temperatures provided by the processor
187 via the PECI bus. Usually these are "core" temps and are relative
188 to the point where the automatic thermal control circuit starts
189 throttling. This means that these are usually negative numbers.
190
191pwm[1-3]_enable
192 0 Fan off.
193 1 Fan on manual control.
194 2 Fan on automatic control and will run at the minimum pwm
195 if the temperature for the zone is below the minimum.
196 3 Fan on automatic control but will be off if the temperature
197 for the zone is below the minimum.
198 4-254 Ignored.
199 255 Fan on full.
200
201pwm[1-3]_auto_channels
202 Bitmap as described in sysctl-interface with the following
203 exceptions...
204 Only the following combination of zones (and their corresponding masks)
205 are valid:
206 1
207 2
208 3
209 2,3
210 1,2,3
211 4
212 1,2,3,4
213
214 Special values:
215 0 Disabled.
216 16 Fan on manual control.
217 31 Fan on full.
218
219
220pwm[1-3]_invert
221 When set, inverts the meaning of pwm[1-3].
222 i.e. when pwm = 0, the fan will be on full and
223 when pwm = 255 the fan will be off.
224
225pwm[1-3]_freq
226 PWM frequency in Hz
227 Valid values in Hz are:
228
229 10
230 15
231 23
232 30 (default)
233 38
234 47
235 62
236 94
237 23000
238 24000
239 25000
240 26000
241 27000
242 28000
243 29000
244 30000
245
246 Setting any other value will be ignored.
247
248peci_enable
249 Enables or disables PECI
250
251peci_avg
252 Input filter average time.
253
254 0 0 Sec. (no Smoothing) (default)
255 1 0.25 Sec.
256 2 0.5 Sec.
257 3 1.0 Sec.
258 4 2.0 Sec.
259 5 4.0 Sec.
260 6 8.0 Sec.
261 7 0.0 Sec.
262
263peci_legacy
264
265 0 Standard Mode (default)
266 Remote Diode 1 reading is associated with
267 Temperature Zone 1, PECI is associated with
268 Zone 4
269
270 1 Legacy Mode
271 PECI is associated with Temperature Zone 1,
272 Remote Diode 1 is associated with Zone 4
273
274peci_diode
275 Diode filter
276
277 0 0.25 Sec.
278 1 1.1 Sec.
279 2 2.4 Sec. (default)
280 3 3.4 Sec.
281 4 5.0 Sec.
282 5 6.8 Sec.
283 6 10.2 Sec.
284 7 16.4 Sec.
285
286peci_4domain
287 Four domain enable
288
289 0 1 or 2 Domains for enabled processors (default)
290 1 3 or 4 Domains for enabled processors
291
292peci_domain
293 Domain
294
295 0 Processor contains a single domain (0) (default)
296 1 Processor contains two domains (0,1)
diff --git a/MAINTAINERS b/MAINTAINERS
index bb6ec71f025b..d6cbddb57326 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -966,6 +966,13 @@ W: http://www.arm.linux.org.uk/
966S: Maintained 966S: Maintained
967F: arch/arm/vfp/ 967F: arch/arm/vfp/
968 968
969ASC7621 HARDWARE MONITOR DRIVER
970M: George Joseph <george.joseph@fairview5.com>
971L: lm-sensors@lm-sensors.org
972S: Maintained
973F: Documentation/hwmon/asc7621
974F: drivers/hwmon/asc7621.c
975
969ASUS ACPI EXTRAS DRIVER 976ASUS ACPI EXTRAS DRIVER
970M: Corentin Chary <corentincj@iksaif.net> 977M: Corentin Chary <corentincj@iksaif.net>
971M: Karol Kozimor <sziwan@users.sourceforge.net> 978M: Karol Kozimor <sziwan@users.sourceforge.net>
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 77d032fb813d..b6d65aa20825 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -226,6 +226,19 @@ config SENSORS_ADT7475
226 This driver can also be build as a module. If so, the module 226 This driver can also be build as a module. If so, the module
227 will be called adt7475. 227 will be called adt7475.
228 228
229config SENSORS_ASC7621
230 tristate "Andigilog aSC7621"
231 depends on HWMON && I2C
232 help
233 If you say yes here you get support for the aSC7621
234 family of SMBus sensors chip found on most Intel X48, X38, 975,
235 965 and 945 desktop boards. Currently supported chips:
236 aSC7621
237 aSC7621a
238
239 This driver can also be built as a module. If so, the module
240 will be called asc7621.
241
229config SENSORS_K8TEMP 242config SENSORS_K8TEMP
230 tristate "AMD Athlon64/FX or Opteron temperature sensor" 243 tristate "AMD Athlon64/FX or Opteron temperature sensor"
231 depends on X86 && PCI && EXPERIMENTAL 244 depends on X86 && PCI && EXPERIMENTAL
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index 5fe67bf961b3..865da80f2b90 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -36,6 +36,7 @@ obj-$(CONFIG_SENSORS_ADT7473) += adt7473.o
36obj-$(CONFIG_SENSORS_ADT7475) += adt7475.o 36obj-$(CONFIG_SENSORS_ADT7475) += adt7475.o
37obj-$(CONFIG_SENSORS_APPLESMC) += applesmc.o 37obj-$(CONFIG_SENSORS_APPLESMC) += applesmc.o
38obj-$(CONFIG_SENSORS_AMS) += ams/ 38obj-$(CONFIG_SENSORS_AMS) += ams/
39obj-$(CONFIG_SENSORS_ASC7621) += asc7621.o
39obj-$(CONFIG_SENSORS_ATXP1) += atxp1.o 40obj-$(CONFIG_SENSORS_ATXP1) += atxp1.o
40obj-$(CONFIG_SENSORS_CORETEMP) += coretemp.o 41obj-$(CONFIG_SENSORS_CORETEMP) += coretemp.o
41obj-$(CONFIG_SENSORS_DME1737) += dme1737.o 42obj-$(CONFIG_SENSORS_DME1737) += dme1737.o
diff --git a/drivers/hwmon/asc7621.c b/drivers/hwmon/asc7621.c
new file mode 100644
index 000000000000..7f948105d8ad
--- /dev/null
+++ b/drivers/hwmon/asc7621.c
@@ -0,0 +1,1255 @@
1/*
2 * asc7621.c - Part of lm_sensors, Linux kernel modules for hardware monitoring
3 * Copyright (c) 2007, 2010 George Joseph <george.joseph@fairview5.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */
19
20#include <linux/module.h>
21#include <linux/init.h>
22#include <linux/slab.h>
23#include <linux/jiffies.h>
24#include <linux/i2c.h>
25#include <linux/hwmon.h>
26#include <linux/hwmon-sysfs.h>
27#include <linux/err.h>
28#include <linux/mutex.h>
29
30/* Addresses to scan */
31static unsigned short normal_i2c[] = {
32 0x2c, 0x2d, 0x2e, I2C_CLIENT_END
33};
34
35enum asc7621_type {
36 asc7621,
37 asc7621a
38};
39
40#define INTERVAL_HIGH (HZ + HZ / 2)
41#define INTERVAL_LOW (1 * 60 * HZ)
42#define PRI_NONE 0
43#define PRI_LOW 1
44#define PRI_HIGH 2
45#define FIRST_CHIP asc7621
46#define LAST_CHIP asc7621a
47
48struct asc7621_chip {
49 char *name;
50 enum asc7621_type chip_type;
51 u8 company_reg;
52 u8 company_id;
53 u8 verstep_reg;
54 u8 verstep_id;
55 unsigned short *addresses;
56};
57
58static struct asc7621_chip asc7621_chips[] = {
59 {
60 .name = "asc7621",
61 .chip_type = asc7621,
62 .company_reg = 0x3e,
63 .company_id = 0x61,
64 .verstep_reg = 0x3f,
65 .verstep_id = 0x6c,
66 .addresses = normal_i2c,
67 },
68 {
69 .name = "asc7621a",
70 .chip_type = asc7621a,
71 .company_reg = 0x3e,
72 .company_id = 0x61,
73 .verstep_reg = 0x3f,
74 .verstep_id = 0x6d,
75 .addresses = normal_i2c,
76 },
77};
78
79/*
80 * Defines the highest register to be used, not the count.
81 * The actual count will probably be smaller because of gaps
82 * in the implementation (unused register locations).
83 * This define will safely set the array size of both the parameter
84 * and data arrays.
85 * This comes from the data sheet register description table.
86 */
87#define LAST_REGISTER 0xff
88
89struct asc7621_data {
90 struct i2c_client client;
91 struct device *class_dev;
92 struct mutex update_lock;
93 int valid; /* !=0 if following fields are valid */
94 unsigned long last_high_reading; /* In jiffies */
95 unsigned long last_low_reading; /* In jiffies */
96 /*
97 * Registers we care about occupy the corresponding index
98 * in the array. Registers we don't care about are left
99 * at 0.
100 */
101 u8 reg[LAST_REGISTER + 1];
102};
103
104/*
105 * Macro to get the parent asc7621_param structure
106 * from a sensor_device_attribute passed into the
107 * show/store functions.
108 */
109#define to_asc7621_param(_sda) \
110 container_of(_sda, struct asc7621_param, sda)
111
112/*
113 * Each parameter to be retrieved needs an asc7621_param structure
114 * allocated. It contains the sensor_device_attribute structure
115 * and the control info needed to retrieve the value from the register map.
116 */
117struct asc7621_param {
118 struct sensor_device_attribute sda;
119 u8 priority;
120 u8 msb[3];
121 u8 lsb[3];
122 u8 mask[3];
123 u8 shift[3];
124};
125
126/*
127 * This is the map that ultimately indicates whether we'll be
128 * retrieving a register value or not, and at what frequency.
129 */
130static u8 asc7621_register_priorities[255];
131
132static struct asc7621_data *asc7621_update_device(struct device *dev);
133
134static inline u8 read_byte(struct i2c_client *client, u8 reg)
135{
136 int res = i2c_smbus_read_byte_data(client, reg);
137 if (res < 0) {
138 dev_err(&client->dev,
139 "Unable to read from register 0x%02x.\n", reg);
140 return 0;
141 };
142 return res & 0xff;
143}
144
145static inline int write_byte(struct i2c_client *client, u8 reg, u8 data)
146{
147 int res = i2c_smbus_write_byte_data(client, reg, data);
148 if (res < 0) {
149 dev_err(&client->dev,
150 "Unable to write value 0x%02x to register 0x%02x.\n",
151 data, reg);
152 };
153 return res;
154}
155
156/*
157 * Data Handlers
158 * Each function handles the formatting, storage
159 * and retrieval of like parameters.
160 */
161
162#define SETUP_SHOW_data_param(d, a) \
163 struct sensor_device_attribute *sda = to_sensor_dev_attr(a); \
164 struct asc7621_data *data = asc7621_update_device(d); \
165 struct asc7621_param *param = to_asc7621_param(sda)
166
167#define SETUP_STORE_data_param(d, a) \
168 struct sensor_device_attribute *sda = to_sensor_dev_attr(a); \
169 struct i2c_client *client = to_i2c_client(d); \
170 struct asc7621_data *data = i2c_get_clientdata(client); \
171 struct asc7621_param *param = to_asc7621_param(sda)
172
173/*
174 * u8 is just what it sounds like...an unsigned byte with no
175 * special formatting.
176 */
177static ssize_t show_u8(struct device *dev, struct device_attribute *attr,
178 char *buf)
179{
180 SETUP_SHOW_data_param(dev, attr);
181
182 return sprintf(buf, "%u\n", data->reg[param->msb[0]]);
183}
184
185static ssize_t store_u8(struct device *dev, struct device_attribute *attr,
186 const char *buf, size_t count)
187{
188 SETUP_STORE_data_param(dev, attr);
189 long reqval;
190
191 if (strict_strtol(buf, 10, &reqval))
192 return -EINVAL;
193
194 reqval = SENSORS_LIMIT(reqval, 0, 255);
195
196 mutex_lock(&data->update_lock);
197 data->reg[param->msb[0]] = reqval;
198 write_byte(client, param->msb[0], reqval);
199 mutex_unlock(&data->update_lock);
200 return count;
201}
202
203/*
204 * Many of the config values occupy only a few bits of a register.
205 */
206static ssize_t show_bitmask(struct device *dev,
207 struct device_attribute *attr, char *buf)
208{
209 SETUP_SHOW_data_param(dev, attr);
210
211 return sprintf(buf, "%u\n",
212 (data->reg[param->msb[0]] >> param->
213 shift[0]) & param->mask[0]);
214}
215
216static ssize_t store_bitmask(struct device *dev,
217 struct device_attribute *attr,
218 const char *buf, size_t count)
219{
220 SETUP_STORE_data_param(dev, attr);
221 long reqval;
222 u8 currval;
223
224 if (strict_strtol(buf, 10, &reqval))
225 return -EINVAL;
226
227 reqval = SENSORS_LIMIT(reqval, 0, param->mask[0]);
228
229 reqval = (reqval & param->mask[0]) << param->shift[0];
230
231 mutex_lock(&data->update_lock);
232 currval = read_byte(client, param->msb[0]);
233 reqval |= (currval & ~(param->mask[0] << param->shift[0]));
234 data->reg[param->msb[0]] = reqval;
235 write_byte(client, param->msb[0], reqval);
236 mutex_unlock(&data->update_lock);
237 return count;
238}
239
240/*
241 * 16 bit fan rpm values
242 * reported by the device as the number of 11.111us periods (90khz)
243 * between full fan rotations. Therefore...
244 * RPM = (90000 * 60) / register value
245 */
246static ssize_t show_fan16(struct device *dev,
247 struct device_attribute *attr, char *buf)
248{
249 SETUP_SHOW_data_param(dev, attr);
250 u16 regval;
251
252 mutex_lock(&data->update_lock);
253 regval = (data->reg[param->msb[0]] << 8) | data->reg[param->lsb[0]];
254 mutex_unlock(&data->update_lock);
255
256 return sprintf(buf, "%u\n",
257 (regval == 0 ? -1 : (regval) ==
258 0xffff ? 0 : 5400000 / regval));
259}
260
261static ssize_t store_fan16(struct device *dev,
262 struct device_attribute *attr, const char *buf,
263 size_t count)
264{
265 SETUP_STORE_data_param(dev, attr);
266 long reqval;
267
268 if (strict_strtol(buf, 10, &reqval))
269 return -EINVAL;
270
271 reqval =
272 (SENSORS_LIMIT((reqval) <= 0 ? 0 : 5400000 / (reqval), 0, 65534));
273
274 mutex_lock(&data->update_lock);
275 data->reg[param->msb[0]] = (reqval >> 8) & 0xff;
276 data->reg[param->lsb[0]] = reqval & 0xff;
277 write_byte(client, param->msb[0], data->reg[param->msb[0]]);
278 write_byte(client, param->lsb[0], data->reg[param->lsb[0]]);
279 mutex_unlock(&data->update_lock);
280
281 return count;
282}
283
284/*
285 * Voltages are scaled in the device so that the nominal voltage
286 * is 3/4ths of the 0-255 range (i.e. 192).
287 * If all voltages are 'normal' then all voltage registers will
288 * read 0xC0. This doesn't help us if we don't have a point of refernce.
289 * The data sheet however provides us with the full scale value for each
290 * which is stored in in_scaling. The sda->index parameter value provides
291 * the index into in_scaling.
292 *
293 * NOTE: The chip expects the first 2 inputs be 2.5 and 2.25 volts
294 * respectively. That doesn't mean that's what the motherboard provides. :)
295 */
296
297static int asc7621_in_scaling[] = {
298 3320, 3000, 4380, 6640, 16000
299};
300
301static ssize_t show_in10(struct device *dev, struct device_attribute *attr,
302 char *buf)
303{
304 SETUP_SHOW_data_param(dev, attr);
305 u16 regval;
306 u8 nr = sda->index;
307
308 mutex_lock(&data->update_lock);
309 regval = (data->reg[param->msb[0]] * asc7621_in_scaling[nr]) / 256;
310
311 /* The LSB value is a 2-bit scaling of the MSB's LSbit value.
312 * I.E. If the maximim voltage for this input is 6640 millivolts then
313 * a MSB register value of 0 = 0mv and 255 = 6640mv.
314 * A 1 step change therefore represents 25.9mv (6640 / 256).
315 * The extra 2-bits therefore represent increments of 6.48mv.
316 */
317 regval += ((asc7621_in_scaling[nr] / 256) / 4) *
318 (data->reg[param->lsb[0]] >> 6);
319
320 mutex_unlock(&data->update_lock);
321
322 return sprintf(buf, "%u\n", regval);
323}
324
325/* 8 bit voltage values (the mins and maxs) */
326static ssize_t show_in8(struct device *dev, struct device_attribute *attr,
327 char *buf)
328{
329 SETUP_SHOW_data_param(dev, attr);
330 u8 nr = sda->index;
331
332 return sprintf(buf, "%u\n",
333 ((data->reg[param->msb[0]] *
334 asc7621_in_scaling[nr]) / 256));
335}
336
337static ssize_t store_in8(struct device *dev, struct device_attribute *attr,
338 const char *buf, size_t count)
339{
340 SETUP_STORE_data_param(dev, attr);
341 long reqval;
342 u8 nr = sda->index;
343
344 if (strict_strtol(buf, 10, &reqval))
345 return -EINVAL;
346
347 reqval = SENSORS_LIMIT(reqval, 0, asc7621_in_scaling[nr]);
348
349 reqval = (reqval * 255 + 128) / asc7621_in_scaling[nr];
350
351 mutex_lock(&data->update_lock);
352 data->reg[param->msb[0]] = reqval;
353 write_byte(client, param->msb[0], reqval);
354 mutex_unlock(&data->update_lock);
355
356 return count;
357}
358
359static ssize_t show_temp8(struct device *dev,
360 struct device_attribute *attr, char *buf)
361{
362 SETUP_SHOW_data_param(dev, attr);
363
364 return sprintf(buf, "%d\n", ((s8) data->reg[param->msb[0]]) * 1000);
365}
366
367static ssize_t store_temp8(struct device *dev,
368 struct device_attribute *attr, const char *buf,
369 size_t count)
370{
371 SETUP_STORE_data_param(dev, attr);
372 long reqval;
373 s8 temp;
374
375 if (strict_strtol(buf, 10, &reqval))
376 return -EINVAL;
377
378 reqval = SENSORS_LIMIT(reqval, -127000, 127000);
379
380 temp = reqval / 1000;
381
382 mutex_lock(&data->update_lock);
383 data->reg[param->msb[0]] = temp;
384 write_byte(client, param->msb[0], temp);
385 mutex_unlock(&data->update_lock);
386 return count;
387}
388
389/*
390 * Temperatures that occupy 2 bytes always have the whole
391 * number of degrees in the MSB with some part of the LSB
392 * indicating fractional degrees.
393 */
394
395/* mmmmmmmm.llxxxxxx */
396static ssize_t show_temp10(struct device *dev,
397 struct device_attribute *attr, char *buf)
398{
399 SETUP_SHOW_data_param(dev, attr);
400 u8 msb, lsb;
401 int temp;
402
403 mutex_lock(&data->update_lock);
404 msb = data->reg[param->msb[0]];
405 lsb = (data->reg[param->lsb[0]] >> 6) & 0x03;
406 temp = (((s8) msb) * 1000) + (lsb * 250);
407 mutex_unlock(&data->update_lock);
408
409 return sprintf(buf, "%d\n", temp);
410}
411
412/* mmmmmm.ll */
413static ssize_t show_temp62(struct device *dev,
414 struct device_attribute *attr, char *buf)
415{
416 SETUP_SHOW_data_param(dev, attr);
417 u8 regval = data->reg[param->msb[0]];
418 int temp = ((s8) (regval & 0xfc) * 1000) + ((regval & 0x03) * 250);
419
420 return sprintf(buf, "%d\n", temp);
421}
422
423static ssize_t store_temp62(struct device *dev,
424 struct device_attribute *attr, const char *buf,
425 size_t count)
426{
427 SETUP_STORE_data_param(dev, attr);
428 long reqval, i, f;
429 s8 temp;
430
431 if (strict_strtol(buf, 10, &reqval))
432 return -EINVAL;
433
434 reqval = SENSORS_LIMIT(reqval, -32000, 31750);
435 i = reqval / 1000;
436 f = reqval - (i * 1000);
437 temp = i << 2;
438 temp |= f / 250;
439
440 mutex_lock(&data->update_lock);
441 data->reg[param->msb[0]] = temp;
442 write_byte(client, param->msb[0], temp);
443 mutex_unlock(&data->update_lock);
444 return count;
445}
446
447/*
448 * The aSC7621 doesn't provide an "auto_point2". Instead, you
449 * specify the auto_point1 and a range. To keep with the sysfs
450 * hwmon specs, we synthesize the auto_point_2 from them.
451 */
452
453static u32 asc7621_range_map[] = {
454 2000, 2500, 3330, 4000, 5000, 6670, 8000, 10000,
455 13330, 16000, 20000, 26670, 32000, 40000, 53330, 80000,
456};
457
458static ssize_t show_ap2_temp(struct device *dev,
459 struct device_attribute *attr, char *buf)
460{
461 SETUP_SHOW_data_param(dev, attr);
462 long auto_point1;
463 u8 regval;
464 int temp;
465
466 mutex_lock(&data->update_lock);
467 auto_point1 = ((s8) data->reg[param->msb[1]]) * 1000;
468 regval =
469 ((data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0]);
470 temp = auto_point1 + asc7621_range_map[SENSORS_LIMIT(regval, 0, 15)];
471 mutex_unlock(&data->update_lock);
472
473 return sprintf(buf, "%d\n", temp);
474
475}
476
477static ssize_t store_ap2_temp(struct device *dev,
478 struct device_attribute *attr,
479 const char *buf, size_t count)
480{
481 SETUP_STORE_data_param(dev, attr);
482 long reqval, auto_point1;
483 int i;
484 u8 currval, newval = 0;
485
486 if (strict_strtol(buf, 10, &reqval))
487 return -EINVAL;
488
489 mutex_lock(&data->update_lock);
490 auto_point1 = data->reg[param->msb[1]] * 1000;
491 reqval = SENSORS_LIMIT(reqval, auto_point1 + 2000, auto_point1 + 80000);
492
493 for (i = ARRAY_SIZE(asc7621_range_map) - 1; i >= 0; i--) {
494 if (reqval >= auto_point1 + asc7621_range_map[i]) {
495 newval = i;
496 break;
497 }
498 }
499
500 newval = (newval & param->mask[0]) << param->shift[0];
501 currval = read_byte(client, param->msb[0]);
502 newval |= (currval & ~(param->mask[0] << param->shift[0]));
503 data->reg[param->msb[0]] = newval;
504 write_byte(client, param->msb[0], newval);
505 mutex_unlock(&data->update_lock);
506 return count;
507}
508
509static ssize_t show_pwm_ac(struct device *dev,
510 struct device_attribute *attr, char *buf)
511{
512 SETUP_SHOW_data_param(dev, attr);
513 u8 config, altbit, regval;
514 u8 map[] = {
515 0x01, 0x02, 0x04, 0x1f, 0x00, 0x06, 0x07, 0x10,
516 0x08, 0x0f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f
517 };
518
519 mutex_lock(&data->update_lock);
520 config = (data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0];
521 altbit = (data->reg[param->msb[1]] >> param->shift[1]) & param->mask[1];
522 regval = config | (altbit << 3);
523 mutex_unlock(&data->update_lock);
524
525 return sprintf(buf, "%u\n", map[SENSORS_LIMIT(regval, 0, 15)]);
526}
527
528static ssize_t store_pwm_ac(struct device *dev,
529 struct device_attribute *attr,
530 const char *buf, size_t count)
531{
532 SETUP_STORE_data_param(dev, attr);
533 unsigned long reqval;
534 u8 currval, config, altbit, newval;
535 u16 map[] = {
536 0x04, 0x00, 0x01, 0xff, 0x02, 0xff, 0x05, 0x06,
537 0x08, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f,
538 0x07, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
539 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x03,
540 };
541
542 if (strict_strtoul(buf, 10, &reqval))
543 return -EINVAL;
544
545 if (reqval > 31)
546 return -EINVAL;
547
548 reqval = map[reqval];
549 if (reqval == 0xff)
550 return -EINVAL;
551
552 config = reqval & 0x07;
553 altbit = (reqval >> 3) & 0x01;
554
555 config = (config & param->mask[0]) << param->shift[0];
556 altbit = (altbit & param->mask[1]) << param->shift[1];
557
558 mutex_lock(&data->update_lock);
559 currval = read_byte(client, param->msb[0]);
560 newval = config | (currval & ~(param->mask[0] << param->shift[0]));
561 newval = altbit | (newval & ~(param->mask[1] << param->shift[1]));
562 data->reg[param->msb[0]] = newval;
563 write_byte(client, param->msb[0], newval);
564 mutex_unlock(&data->update_lock);
565 return count;
566}
567
568static ssize_t show_pwm_enable(struct device *dev,
569 struct device_attribute *attr, char *buf)
570{
571 SETUP_SHOW_data_param(dev, attr);
572 u8 config, altbit, minoff, val, newval;
573
574 mutex_lock(&data->update_lock);
575 config = (data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0];
576 altbit = (data->reg[param->msb[1]] >> param->shift[1]) & param->mask[1];
577 minoff = (data->reg[param->msb[2]] >> param->shift[2]) & param->mask[2];
578 mutex_unlock(&data->update_lock);
579
580 val = config | (altbit << 3);
581 newval = 0;
582
583 if (val == 3 || val >= 10)
584 newval = 255;
585 else if (val == 4)
586 newval = 0;
587 else if (val == 7)
588 newval = 1;
589 else if (minoff == 1)
590 newval = 2;
591 else
592 newval = 3;
593
594 return sprintf(buf, "%u\n", newval);
595}
596
597static ssize_t store_pwm_enable(struct device *dev,
598 struct device_attribute *attr,
599 const char *buf, size_t count)
600{
601 SETUP_STORE_data_param(dev, attr);
602 long reqval;
603 u8 currval, config, altbit, newval, minoff = 255;
604
605 if (strict_strtol(buf, 10, &reqval))
606 return -EINVAL;
607
608 switch (reqval) {
609 case 0:
610 newval = 0x04;
611 break;
612 case 1:
613 newval = 0x07;
614 break;
615 case 2:
616 newval = 0x00;
617 minoff = 1;
618 break;
619 case 3:
620 newval = 0x00;
621 minoff = 0;
622 break;
623 case 255:
624 newval = 0x03;
625 break;
626 default:
627 return -EINVAL;
628 }
629
630 config = newval & 0x07;
631 altbit = (newval >> 3) & 0x01;
632
633 mutex_lock(&data->update_lock);
634 config = (config & param->mask[0]) << param->shift[0];
635 altbit = (altbit & param->mask[1]) << param->shift[1];
636 currval = read_byte(client, param->msb[0]);
637 newval = config | (currval & ~(param->mask[0] << param->shift[0]));
638 newval = altbit | (newval & ~(param->mask[1] << param->shift[1]));
639 data->reg[param->msb[0]] = newval;
640 write_byte(client, param->msb[0], newval);
641 if (minoff < 255) {
642 minoff = (minoff & param->mask[2]) << param->shift[2];
643 currval = read_byte(client, param->msb[2]);
644 newval =
645 minoff | (currval & ~(param->mask[2] << param->shift[2]));
646 data->reg[param->msb[2]] = newval;
647 write_byte(client, param->msb[2], newval);
648 }
649 mutex_unlock(&data->update_lock);
650 return count;
651}
652
653static u32 asc7621_pwm_freq_map[] = {
654 10, 15, 23, 30, 38, 47, 62, 94,
655 23000, 24000, 25000, 26000, 27000, 28000, 29000, 30000
656};
657
658static ssize_t show_pwm_freq(struct device *dev,
659 struct device_attribute *attr, char *buf)
660{
661 SETUP_SHOW_data_param(dev, attr);
662 u8 regval =
663 (data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0];
664
665 regval = SENSORS_LIMIT(regval, 0, 15);
666
667 return sprintf(buf, "%u\n", asc7621_pwm_freq_map[regval]);
668}
669
670static ssize_t store_pwm_freq(struct device *dev,
671 struct device_attribute *attr,
672 const char *buf, size_t count)
673{
674 SETUP_STORE_data_param(dev, attr);
675 unsigned long reqval;
676 u8 currval, newval = 255;
677 int i;
678
679 if (strict_strtoul(buf, 10, &reqval))
680 return -EINVAL;
681
682 for (i = 0; i < ARRAY_SIZE(asc7621_pwm_freq_map); i++) {
683 if (reqval == asc7621_pwm_freq_map[i]) {
684 newval = i;
685 break;
686 }
687 }
688 if (newval == 255)
689 return -EINVAL;
690
691 newval = (newval & param->mask[0]) << param->shift[0];
692
693 mutex_lock(&data->update_lock);
694 currval = read_byte(client, param->msb[0]);
695 newval |= (currval & ~(param->mask[0] << param->shift[0]));
696 data->reg[param->msb[0]] = newval;
697 write_byte(client, param->msb[0], newval);
698 mutex_unlock(&data->update_lock);
699 return count;
700}
701
702static u32 asc7621_pwm_auto_spinup_map[] = {
703 0, 100, 250, 400, 700, 1000, 2000, 4000
704};
705
706static ssize_t show_pwm_ast(struct device *dev,
707 struct device_attribute *attr, char *buf)
708{
709 SETUP_SHOW_data_param(dev, attr);
710 u8 regval =
711 (data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0];
712
713 regval = SENSORS_LIMIT(regval, 0, 7);
714
715 return sprintf(buf, "%u\n", asc7621_pwm_auto_spinup_map[regval]);
716
717}
718
719static ssize_t store_pwm_ast(struct device *dev,
720 struct device_attribute *attr,
721 const char *buf, size_t count)
722{
723 SETUP_STORE_data_param(dev, attr);
724 long reqval;
725 u8 currval, newval = 255;
726 u32 i;
727
728 if (strict_strtol(buf, 10, &reqval))
729 return -EINVAL;
730
731 for (i = 0; i < ARRAY_SIZE(asc7621_pwm_auto_spinup_map); i++) {
732 if (reqval == asc7621_pwm_auto_spinup_map[i]) {
733 newval = i;
734 break;
735 }
736 }
737 if (newval == 255)
738 return -EINVAL;
739
740 newval = (newval & param->mask[0]) << param->shift[0];
741
742 mutex_lock(&data->update_lock);
743 currval = read_byte(client, param->msb[0]);
744 newval |= (currval & ~(param->mask[0] << param->shift[0]));
745 data->reg[param->msb[0]] = newval;
746 write_byte(client, param->msb[0], newval);
747 mutex_unlock(&data->update_lock);
748 return count;
749}
750
751static u32 asc7621_temp_smoothing_time_map[] = {
752 35000, 17600, 11800, 7000, 4400, 3000, 1600, 800
753};
754
755static ssize_t show_temp_st(struct device *dev,
756 struct device_attribute *attr, char *buf)
757{
758 SETUP_SHOW_data_param(dev, attr);
759 u8 regval =
760 (data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0];
761 regval = SENSORS_LIMIT(regval, 0, 7);
762
763 return sprintf(buf, "%u\n", asc7621_temp_smoothing_time_map[regval]);
764}
765
766static ssize_t store_temp_st(struct device *dev,
767 struct device_attribute *attr,
768 const char *buf, size_t count)
769{
770 SETUP_STORE_data_param(dev, attr);
771 long reqval;
772 u8 currval, newval = 255;
773 u32 i;
774
775 if (strict_strtol(buf, 10, &reqval))
776 return -EINVAL;
777
778 for (i = 0; i < ARRAY_SIZE(asc7621_temp_smoothing_time_map); i++) {
779 if (reqval == asc7621_temp_smoothing_time_map[i]) {
780 newval = i;
781 break;
782 }
783 }
784
785 if (newval == 255)
786 return -EINVAL;
787
788 newval = (newval & param->mask[0]) << param->shift[0];
789
790 mutex_lock(&data->update_lock);
791 currval = read_byte(client, param->msb[0]);
792 newval |= (currval & ~(param->mask[0] << param->shift[0]));
793 data->reg[param->msb[0]] = newval;
794 write_byte(client, param->msb[0], newval);
795 mutex_unlock(&data->update_lock);
796 return count;
797}
798
799/*
800 * End of data handlers
801 *
802 * These defines do nothing more than make the table easier
803 * to read when wrapped at column 80.
804 */
805
806/*
807 * Creates a variable length array inititalizer.
808 * VAA(1,3,5,7) would produce {1,3,5,7}
809 */
810#define VAA(args...) {args}
811
812#define PREAD(name, n, pri, rm, rl, m, s, r) \
813 {.sda = SENSOR_ATTR(name, S_IRUGO, show_##r, NULL, n), \
814 .priority = pri, .msb[0] = rm, .lsb[0] = rl, .mask[0] = m, \
815 .shift[0] = s,}
816
817#define PWRITE(name, n, pri, rm, rl, m, s, r) \
818 {.sda = SENSOR_ATTR(name, S_IRUGO | S_IWUSR, show_##r, store_##r, n), \
819 .priority = pri, .msb[0] = rm, .lsb[0] = rl, .mask[0] = m, \
820 .shift[0] = s,}
821
822/*
823 * PWRITEM assumes that the initializers for the .msb, .lsb, .mask and .shift
824 * were created using the VAA macro.
825 */
826#define PWRITEM(name, n, pri, rm, rl, m, s, r) \
827 {.sda = SENSOR_ATTR(name, S_IRUGO | S_IWUSR, show_##r, store_##r, n), \
828 .priority = pri, .msb = rm, .lsb = rl, .mask = m, .shift = s,}
829
830static struct asc7621_param asc7621_params[] = {
831 PREAD(in0_input, 0, PRI_HIGH, 0x20, 0x13, 0, 0, in10),
832 PREAD(in1_input, 1, PRI_HIGH, 0x21, 0x18, 0, 0, in10),
833 PREAD(in2_input, 2, PRI_HIGH, 0x22, 0x11, 0, 0, in10),
834 PREAD(in3_input, 3, PRI_HIGH, 0x23, 0x12, 0, 0, in10),
835 PREAD(in4_input, 4, PRI_HIGH, 0x24, 0x14, 0, 0, in10),
836
837 PWRITE(in0_min, 0, PRI_LOW, 0x44, 0, 0, 0, in8),
838 PWRITE(in1_min, 1, PRI_LOW, 0x46, 0, 0, 0, in8),
839 PWRITE(in2_min, 2, PRI_LOW, 0x48, 0, 0, 0, in8),
840 PWRITE(in3_min, 3, PRI_LOW, 0x4a, 0, 0, 0, in8),
841 PWRITE(in4_min, 4, PRI_LOW, 0x4c, 0, 0, 0, in8),
842
843 PWRITE(in0_max, 0, PRI_LOW, 0x45, 0, 0, 0, in8),
844 PWRITE(in1_max, 1, PRI_LOW, 0x47, 0, 0, 0, in8),
845 PWRITE(in2_max, 2, PRI_LOW, 0x49, 0, 0, 0, in8),
846 PWRITE(in3_max, 3, PRI_LOW, 0x4b, 0, 0, 0, in8),
847 PWRITE(in4_max, 4, PRI_LOW, 0x4d, 0, 0, 0, in8),
848
849 PREAD(in0_alarm, 0, PRI_LOW, 0x41, 0, 0x01, 0, bitmask),
850 PREAD(in1_alarm, 1, PRI_LOW, 0x41, 0, 0x01, 1, bitmask),
851 PREAD(in2_alarm, 2, PRI_LOW, 0x41, 0, 0x01, 2, bitmask),
852 PREAD(in3_alarm, 3, PRI_LOW, 0x41, 0, 0x01, 3, bitmask),
853 PREAD(in4_alarm, 4, PRI_LOW, 0x42, 0, 0x01, 0, bitmask),
854
855 PREAD(fan1_input, 0, PRI_HIGH, 0x29, 0x28, 0, 0, fan16),
856 PREAD(fan2_input, 1, PRI_HIGH, 0x2b, 0x2a, 0, 0, fan16),
857 PREAD(fan3_input, 2, PRI_HIGH, 0x2d, 0x2c, 0, 0, fan16),
858 PREAD(fan4_input, 3, PRI_HIGH, 0x2f, 0x2e, 0, 0, fan16),
859
860 PWRITE(fan1_min, 0, PRI_LOW, 0x55, 0x54, 0, 0, fan16),
861 PWRITE(fan2_min, 1, PRI_LOW, 0x57, 0x56, 0, 0, fan16),
862 PWRITE(fan3_min, 2, PRI_LOW, 0x59, 0x58, 0, 0, fan16),
863 PWRITE(fan4_min, 3, PRI_LOW, 0x5b, 0x5a, 0, 0, fan16),
864
865 PREAD(fan1_alarm, 0, PRI_LOW, 0x42, 0, 0x01, 0, bitmask),
866 PREAD(fan2_alarm, 1, PRI_LOW, 0x42, 0, 0x01, 1, bitmask),
867 PREAD(fan3_alarm, 2, PRI_LOW, 0x42, 0, 0x01, 2, bitmask),
868 PREAD(fan4_alarm, 3, PRI_LOW, 0x42, 0, 0x01, 3, bitmask),
869
870 PREAD(temp1_input, 0, PRI_HIGH, 0x25, 0x10, 0, 0, temp10),
871 PREAD(temp2_input, 1, PRI_HIGH, 0x26, 0x15, 0, 0, temp10),
872 PREAD(temp3_input, 2, PRI_HIGH, 0x27, 0x16, 0, 0, temp10),
873 PREAD(temp4_input, 3, PRI_HIGH, 0x33, 0x17, 0, 0, temp10),
874 PREAD(temp5_input, 4, PRI_HIGH, 0xf7, 0xf6, 0, 0, temp10),
875 PREAD(temp6_input, 5, PRI_HIGH, 0xf9, 0xf8, 0, 0, temp10),
876 PREAD(temp7_input, 6, PRI_HIGH, 0xfb, 0xfa, 0, 0, temp10),
877 PREAD(temp8_input, 7, PRI_HIGH, 0xfd, 0xfc, 0, 0, temp10),
878
879 PWRITE(temp1_min, 0, PRI_LOW, 0x4e, 0, 0, 0, temp8),
880 PWRITE(temp2_min, 1, PRI_LOW, 0x50, 0, 0, 0, temp8),
881 PWRITE(temp3_min, 2, PRI_LOW, 0x52, 0, 0, 0, temp8),
882 PWRITE(temp4_min, 3, PRI_LOW, 0x34, 0, 0, 0, temp8),
883
884 PWRITE(temp1_max, 0, PRI_LOW, 0x4f, 0, 0, 0, temp8),
885 PWRITE(temp2_max, 1, PRI_LOW, 0x51, 0, 0, 0, temp8),
886 PWRITE(temp3_max, 2, PRI_LOW, 0x53, 0, 0, 0, temp8),
887 PWRITE(temp4_max, 3, PRI_LOW, 0x35, 0, 0, 0, temp8),
888
889 PREAD(temp1_alarm, 0, PRI_LOW, 0x41, 0, 0x01, 4, bitmask),
890 PREAD(temp2_alarm, 1, PRI_LOW, 0x41, 0, 0x01, 5, bitmask),
891 PREAD(temp3_alarm, 2, PRI_LOW, 0x41, 0, 0x01, 6, bitmask),
892 PREAD(temp4_alarm, 3, PRI_LOW, 0x43, 0, 0x01, 0, bitmask),
893
894 PWRITE(temp1_source, 0, PRI_LOW, 0x02, 0, 0x07, 4, bitmask),
895 PWRITE(temp2_source, 1, PRI_LOW, 0x02, 0, 0x07, 0, bitmask),
896 PWRITE(temp3_source, 2, PRI_LOW, 0x03, 0, 0x07, 4, bitmask),
897 PWRITE(temp4_source, 3, PRI_LOW, 0x03, 0, 0x07, 0, bitmask),
898
899 PWRITE(temp1_smoothing_enable, 0, PRI_LOW, 0x62, 0, 0x01, 3, bitmask),
900 PWRITE(temp2_smoothing_enable, 1, PRI_LOW, 0x63, 0, 0x01, 7, bitmask),
901 PWRITE(temp3_smoothing_enable, 2, PRI_LOW, 0x64, 0, 0x01, 3, bitmask),
902 PWRITE(temp4_smoothing_enable, 3, PRI_LOW, 0x3c, 0, 0x01, 3, bitmask),
903
904 PWRITE(temp1_smoothing_time, 0, PRI_LOW, 0x62, 0, 0x07, 0, temp_st),
905 PWRITE(temp2_smoothing_time, 1, PRI_LOW, 0x63, 0, 0x07, 4, temp_st),
906 PWRITE(temp3_smoothing_time, 2, PRI_LOW, 0x63, 0, 0x07, 0, temp_st),
907 PWRITE(temp4_smoothing_time, 3, PRI_LOW, 0x3c, 0, 0x07, 0, temp_st),
908
909 PWRITE(temp1_auto_point1_temp_hyst, 0, PRI_LOW, 0x6d, 0, 0x0f, 4,
910 bitmask),
911 PWRITE(temp2_auto_point1_temp_hyst, 1, PRI_LOW, 0x6d, 0, 0x0f, 0,
912 bitmask),
913 PWRITE(temp3_auto_point1_temp_hyst, 2, PRI_LOW, 0x6e, 0, 0x0f, 4,
914 bitmask),
915 PWRITE(temp4_auto_point1_temp_hyst, 3, PRI_LOW, 0x6e, 0, 0x0f, 0,
916 bitmask),
917
918 PREAD(temp1_auto_point2_temp_hyst, 0, PRI_LOW, 0x6d, 0, 0x0f, 4,
919 bitmask),
920 PREAD(temp2_auto_point2_temp_hyst, 1, PRI_LOW, 0x6d, 0, 0x0f, 0,
921 bitmask),
922 PREAD(temp3_auto_point2_temp_hyst, 2, PRI_LOW, 0x6e, 0, 0x0f, 4,
923 bitmask),
924 PREAD(temp4_auto_point2_temp_hyst, 3, PRI_LOW, 0x6e, 0, 0x0f, 0,
925 bitmask),
926
927 PWRITE(temp1_auto_point1_temp, 0, PRI_LOW, 0x67, 0, 0, 0, temp8),
928 PWRITE(temp2_auto_point1_temp, 1, PRI_LOW, 0x68, 0, 0, 0, temp8),
929 PWRITE(temp3_auto_point1_temp, 2, PRI_LOW, 0x69, 0, 0, 0, temp8),
930 PWRITE(temp4_auto_point1_temp, 3, PRI_LOW, 0x3b, 0, 0, 0, temp8),
931
932 PWRITEM(temp1_auto_point2_temp, 0, PRI_LOW, VAA(0x5f, 0x67), VAA(0),
933 VAA(0x0f), VAA(4), ap2_temp),
934 PWRITEM(temp2_auto_point2_temp, 1, PRI_LOW, VAA(0x60, 0x68), VAA(0),
935 VAA(0x0f), VAA(4), ap2_temp),
936 PWRITEM(temp3_auto_point2_temp, 2, PRI_LOW, VAA(0x61, 0x69), VAA(0),
937 VAA(0x0f), VAA(4), ap2_temp),
938 PWRITEM(temp4_auto_point2_temp, 3, PRI_LOW, VAA(0x3c, 0x3b), VAA(0),
939 VAA(0x0f), VAA(4), ap2_temp),
940
941 PWRITE(temp1_crit, 0, PRI_LOW, 0x6a, 0, 0, 0, temp8),
942 PWRITE(temp2_crit, 1, PRI_LOW, 0x6b, 0, 0, 0, temp8),
943 PWRITE(temp3_crit, 2, PRI_LOW, 0x6c, 0, 0, 0, temp8),
944 PWRITE(temp4_crit, 3, PRI_LOW, 0x3d, 0, 0, 0, temp8),
945
946 PWRITE(temp5_enable, 4, PRI_LOW, 0x0e, 0, 0x01, 0, bitmask),
947 PWRITE(temp6_enable, 5, PRI_LOW, 0x0e, 0, 0x01, 1, bitmask),
948 PWRITE(temp7_enable, 6, PRI_LOW, 0x0e, 0, 0x01, 2, bitmask),
949 PWRITE(temp8_enable, 7, PRI_LOW, 0x0e, 0, 0x01, 3, bitmask),
950
951 PWRITE(remote1_offset, 0, PRI_LOW, 0x1c, 0, 0, 0, temp62),
952 PWRITE(remote2_offset, 1, PRI_LOW, 0x1d, 0, 0, 0, temp62),
953
954 PWRITE(pwm1, 0, PRI_HIGH, 0x30, 0, 0, 0, u8),
955 PWRITE(pwm2, 1, PRI_HIGH, 0x31, 0, 0, 0, u8),
956 PWRITE(pwm3, 2, PRI_HIGH, 0x32, 0, 0, 0, u8),
957
958 PWRITE(pwm1_invert, 0, PRI_LOW, 0x5c, 0, 0x01, 4, bitmask),
959 PWRITE(pwm2_invert, 1, PRI_LOW, 0x5d, 0, 0x01, 4, bitmask),
960 PWRITE(pwm3_invert, 2, PRI_LOW, 0x5e, 0, 0x01, 4, bitmask),
961
962 PWRITEM(pwm1_enable, 0, PRI_LOW, VAA(0x5c, 0x5c, 0x62), VAA(0, 0, 0),
963 VAA(0x07, 0x01, 0x01), VAA(5, 3, 5), pwm_enable),
964 PWRITEM(pwm2_enable, 1, PRI_LOW, VAA(0x5d, 0x5d, 0x62), VAA(0, 0, 0),
965 VAA(0x07, 0x01, 0x01), VAA(5, 3, 6), pwm_enable),
966 PWRITEM(pwm3_enable, 2, PRI_LOW, VAA(0x5e, 0x5e, 0x62), VAA(0, 0, 0),
967 VAA(0x07, 0x01, 0x01), VAA(5, 3, 7), pwm_enable),
968
969 PWRITEM(pwm1_auto_channels, 0, PRI_LOW, VAA(0x5c, 0x5c), VAA(0, 0),
970 VAA(0x07, 0x01), VAA(5, 3), pwm_ac),
971 PWRITEM(pwm2_auto_channels, 1, PRI_LOW, VAA(0x5d, 0x5d), VAA(0, 0),
972 VAA(0x07, 0x01), VAA(5, 3), pwm_ac),
973 PWRITEM(pwm3_auto_channels, 2, PRI_LOW, VAA(0x5e, 0x5e), VAA(0, 0),
974 VAA(0x07, 0x01), VAA(5, 3), pwm_ac),
975
976 PWRITE(pwm1_auto_point1_pwm, 0, PRI_LOW, 0x64, 0, 0, 0, u8),
977 PWRITE(pwm2_auto_point1_pwm, 1, PRI_LOW, 0x65, 0, 0, 0, u8),
978 PWRITE(pwm3_auto_point1_pwm, 2, PRI_LOW, 0x66, 0, 0, 0, u8),
979
980 PWRITE(pwm1_auto_point2_pwm, 0, PRI_LOW, 0x38, 0, 0, 0, u8),
981 PWRITE(pwm2_auto_point2_pwm, 1, PRI_LOW, 0x39, 0, 0, 0, u8),
982 PWRITE(pwm3_auto_point2_pwm, 2, PRI_LOW, 0x3a, 0, 0, 0, u8),
983
984 PWRITE(pwm1_freq, 0, PRI_LOW, 0x5f, 0, 0x0f, 0, pwm_freq),
985 PWRITE(pwm2_freq, 1, PRI_LOW, 0x60, 0, 0x0f, 0, pwm_freq),
986 PWRITE(pwm3_freq, 2, PRI_LOW, 0x61, 0, 0x0f, 0, pwm_freq),
987
988 PREAD(pwm1_auto_zone_assigned, 0, PRI_LOW, 0, 0, 0x03, 2, bitmask),
989 PREAD(pwm2_auto_zone_assigned, 1, PRI_LOW, 0, 0, 0x03, 4, bitmask),
990 PREAD(pwm3_auto_zone_assigned, 2, PRI_LOW, 0, 0, 0x03, 6, bitmask),
991
992 PWRITE(pwm1_auto_spinup_time, 0, PRI_LOW, 0x5c, 0, 0x07, 0, pwm_ast),
993 PWRITE(pwm2_auto_spinup_time, 1, PRI_LOW, 0x5d, 0, 0x07, 0, pwm_ast),
994 PWRITE(pwm3_auto_spinup_time, 2, PRI_LOW, 0x5e, 0, 0x07, 0, pwm_ast),
995
996 PWRITE(peci_enable, 0, PRI_LOW, 0x40, 0, 0x01, 4, bitmask),
997 PWRITE(peci_avg, 0, PRI_LOW, 0x36, 0, 0x07, 0, bitmask),
998 PWRITE(peci_domain, 0, PRI_LOW, 0x36, 0, 0x01, 3, bitmask),
999 PWRITE(peci_legacy, 0, PRI_LOW, 0x36, 0, 0x01, 4, bitmask),
1000 PWRITE(peci_diode, 0, PRI_LOW, 0x0e, 0, 0x07, 4, bitmask),
1001 PWRITE(peci_4domain, 0, PRI_LOW, 0x0e, 0, 0x01, 4, bitmask),
1002
1003};
1004
1005static struct asc7621_data *asc7621_update_device(struct device *dev)
1006{
1007 struct i2c_client *client = to_i2c_client(dev);
1008 struct asc7621_data *data = i2c_get_clientdata(client);
1009 int i;
1010
1011/*
1012 * The asc7621 chips guarantee consistent reads of multi-byte values
1013 * regardless of the order of the reads. No special logic is needed
1014 * so we can just read the registers in whatever order they appear
1015 * in the asc7621_params array.
1016 */
1017
1018 mutex_lock(&data->update_lock);
1019
1020 /* Read all the high priority registers */
1021
1022 if (!data->valid ||
1023 time_after(jiffies, data->last_high_reading + INTERVAL_HIGH)) {
1024
1025 for (i = 0; i < ARRAY_SIZE(asc7621_register_priorities); i++) {
1026 if (asc7621_register_priorities[i] == PRI_HIGH) {
1027 data->reg[i] =
1028 i2c_smbus_read_byte_data(client, i) & 0xff;
1029 }
1030 }
1031 data->last_high_reading = jiffies;
1032 }; /* last_reading */
1033
1034 /* Read all the low priority registers. */
1035
1036 if (!data->valid ||
1037 time_after(jiffies, data->last_low_reading + INTERVAL_LOW)) {
1038
1039 for (i = 0; i < ARRAY_SIZE(asc7621_params); i++) {
1040 if (asc7621_register_priorities[i] == PRI_LOW) {
1041 data->reg[i] =
1042 i2c_smbus_read_byte_data(client, i) & 0xff;
1043 }
1044 }
1045 data->last_low_reading = jiffies;
1046 }; /* last_reading */
1047
1048 data->valid = 1;
1049
1050 mutex_unlock(&data->update_lock);
1051
1052 return data;
1053}
1054
1055/*
1056 * Standard detection and initialization below
1057 *
1058 * Helper function that checks if an address is valid
1059 * for a particular chip.
1060 */
1061
1062static inline int valid_address_for_chip(int chip_type, int address)
1063{
1064 int i;
1065
1066 for (i = 0; asc7621_chips[chip_type].addresses[i] != I2C_CLIENT_END;
1067 i++) {
1068 if (asc7621_chips[chip_type].addresses[i] == address)
1069 return 1;
1070 }
1071 return 0;
1072}
1073
1074static void asc7621_init_client(struct i2c_client *client)
1075{
1076 int value;
1077
1078 /* Warn if part was not "READY" */
1079
1080 value = read_byte(client, 0x40);
1081
1082 if (value & 0x02) {
1083 dev_err(&client->dev,
1084 "Client (%d,0x%02x) config is locked.\n",
1085 i2c_adapter_id(client->adapter), client->addr);
1086 };
1087 if (!(value & 0x04)) {
1088 dev_err(&client->dev, "Client (%d,0x%02x) is not ready.\n",
1089 i2c_adapter_id(client->adapter), client->addr);
1090 };
1091
1092/*
1093 * Start monitoring
1094 *
1095 * Try to clear LOCK, Set START, save everything else
1096 */
1097 value = (value & ~0x02) | 0x01;
1098 write_byte(client, 0x40, value & 0xff);
1099
1100}
1101
1102static int
1103asc7621_probe(struct i2c_client *client, const struct i2c_device_id *id)
1104{
1105 struct asc7621_data *data;
1106 int i, err;
1107
1108 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1109 return -EIO;
1110
1111 data = kzalloc(sizeof(struct asc7621_data), GFP_KERNEL);
1112 if (data == NULL)
1113 return -ENOMEM;
1114
1115 i2c_set_clientdata(client, data);
1116 data->valid = 0;
1117 mutex_init(&data->update_lock);
1118
1119 /* Initialize the asc7621 chip */
1120 asc7621_init_client(client);
1121
1122 /* Create the sysfs entries */
1123 for (i = 0; i < ARRAY_SIZE(asc7621_params); i++) {
1124 err =
1125 device_create_file(&client->dev,
1126 &(asc7621_params[i].sda.dev_attr));
1127 if (err)
1128 goto exit_remove;
1129 }
1130
1131 data->class_dev = hwmon_device_register(&client->dev);
1132 if (IS_ERR(data->class_dev)) {
1133 err = PTR_ERR(data->class_dev);
1134 goto exit_remove;
1135 }
1136
1137 return 0;
1138
1139exit_remove:
1140 for (i = 0; i < ARRAY_SIZE(asc7621_params); i++) {
1141 device_remove_file(&client->dev,
1142 &(asc7621_params[i].sda.dev_attr));
1143 }
1144
1145 i2c_set_clientdata(client, NULL);
1146 kfree(data);
1147 return err;
1148}
1149
1150static int asc7621_detect(struct i2c_client *client,
1151 struct i2c_board_info *info)
1152{
1153 struct i2c_adapter *adapter = client->adapter;
1154 int company, verstep, chip_index;
1155 struct device *dev;
1156
1157 dev = &client->dev;
1158
1159 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1160 return -ENODEV;
1161
1162 for (chip_index = FIRST_CHIP; chip_index <= LAST_CHIP; chip_index++) {
1163
1164 if (!valid_address_for_chip(chip_index, client->addr))
1165 continue;
1166
1167 company = read_byte(client,
1168 asc7621_chips[chip_index].company_reg);
1169 verstep = read_byte(client,
1170 asc7621_chips[chip_index].verstep_reg);
1171
1172 if (company == asc7621_chips[chip_index].company_id &&
1173 verstep == asc7621_chips[chip_index].verstep_id) {
1174 strlcpy(client->name, asc7621_chips[chip_index].name,
1175 I2C_NAME_SIZE);
1176 strlcpy(info->type, asc7621_chips[chip_index].name,
1177 I2C_NAME_SIZE);
1178
1179 dev_info(&adapter->dev, "Matched %s\n",
1180 asc7621_chips[chip_index].name);
1181 return 0;
1182 }
1183 }
1184
1185 return -ENODEV;
1186}
1187
1188static int asc7621_remove(struct i2c_client *client)
1189{
1190 struct asc7621_data *data = i2c_get_clientdata(client);
1191 int i;
1192
1193 hwmon_device_unregister(data->class_dev);
1194
1195 for (i = 0; i < ARRAY_SIZE(asc7621_params); i++) {
1196 device_remove_file(&client->dev,
1197 &(asc7621_params[i].sda.dev_attr));
1198 }
1199
1200 i2c_set_clientdata(client, NULL);
1201 kfree(data);
1202 return 0;
1203}
1204
1205static const struct i2c_device_id asc7621_id[] = {
1206 {"asc7621", asc7621},
1207 {"asc7621a", asc7621a},
1208 {},
1209};
1210
1211MODULE_DEVICE_TABLE(i2c, asc7621_id);
1212
1213static struct i2c_driver asc7621_driver = {
1214 .class = I2C_CLASS_HWMON,
1215 .driver = {
1216 .name = "asc7621",
1217 },
1218 .probe = asc7621_probe,
1219 .remove = asc7621_remove,
1220 .id_table = asc7621_id,
1221 .detect = asc7621_detect,
1222 .address_list = normal_i2c,
1223};
1224
1225static int __init sm_asc7621_init(void)
1226{
1227 int i, j;
1228/*
1229 * Collect all the registers needed into a single array.
1230 * This way, if a register isn't actually used for anything,
1231 * we don't retrieve it.
1232 */
1233
1234 for (i = 0; i < ARRAY_SIZE(asc7621_params); i++) {
1235 for (j = 0; j < ARRAY_SIZE(asc7621_params[i].msb); j++)
1236 asc7621_register_priorities[asc7621_params[i].msb[j]] =
1237 asc7621_params[i].priority;
1238 for (j = 0; j < ARRAY_SIZE(asc7621_params[i].lsb); j++)
1239 asc7621_register_priorities[asc7621_params[i].lsb[j]] =
1240 asc7621_params[i].priority;
1241 }
1242 return i2c_add_driver(&asc7621_driver);
1243}
1244
1245static void __exit sm_asc7621_exit(void)
1246{
1247 i2c_del_driver(&asc7621_driver);
1248}
1249
1250MODULE_LICENSE("GPL");
1251MODULE_AUTHOR("George Joseph");
1252MODULE_DESCRIPTION("Andigilog aSC7621 and aSC7621a driver");
1253
1254module_init(sm_asc7621_init);
1255module_exit(sm_asc7621_exit);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-26 20:19:19 -0500