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-rw-r--r--arch/powerpc/mm/hash_low_64.S3
-rw-r--r--arch/powerpc/mm/hash_native_64.c2
-rw-r--r--include/asm-powerpc/mmu.h2
3 files changed, 6 insertions, 1 deletions
diff --git a/arch/powerpc/mm/hash_low_64.S b/arch/powerpc/mm/hash_low_64.S
index e0d02c4a2615..106fba391987 100644
--- a/arch/powerpc/mm/hash_low_64.S
+++ b/arch/powerpc/mm/hash_low_64.S
@@ -136,6 +136,7 @@ _GLOBAL(__hash_page_4K)
136 and r0,r0,r4 /* _PAGE_RW & _PAGE_DIRTY ->r0 bit 30*/ 136 and r0,r0,r4 /* _PAGE_RW & _PAGE_DIRTY ->r0 bit 30*/
137 andc r0,r30,r0 /* r0 = pte & ~r0 */ 137 andc r0,r30,r0 /* r0 = pte & ~r0 */
138 rlwimi r3,r0,32-1,31,31 /* Insert result into PP lsb */ 138 rlwimi r3,r0,32-1,31,31 /* Insert result into PP lsb */
139 ori r3,r3,HPTE_R_C /* Always add "C" bit for perf. */
139 140
140 /* We eventually do the icache sync here (maybe inline that 141 /* We eventually do the icache sync here (maybe inline that
141 * code rather than call a C function...) 142 * code rather than call a C function...)
@@ -400,6 +401,7 @@ _GLOBAL(__hash_page_4K)
400 and r0,r0,r4 /* _PAGE_RW & _PAGE_DIRTY ->r0 bit 30*/ 401 and r0,r0,r4 /* _PAGE_RW & _PAGE_DIRTY ->r0 bit 30*/
401 andc r0,r30,r0 /* r0 = pte & ~r0 */ 402 andc r0,r30,r0 /* r0 = pte & ~r0 */
402 rlwimi r3,r0,32-1,31,31 /* Insert result into PP lsb */ 403 rlwimi r3,r0,32-1,31,31 /* Insert result into PP lsb */
404 ori r3,r3,HPTE_R_C /* Always add "C" bit for perf. */
403 405
404 /* We eventually do the icache sync here (maybe inline that 406 /* We eventually do the icache sync here (maybe inline that
405 * code rather than call a C function...) 407 * code rather than call a C function...)
@@ -671,6 +673,7 @@ _GLOBAL(__hash_page_64K)
671 and r0,r0,r4 /* _PAGE_RW & _PAGE_DIRTY ->r0 bit 30*/ 673 and r0,r0,r4 /* _PAGE_RW & _PAGE_DIRTY ->r0 bit 30*/
672 andc r0,r30,r0 /* r0 = pte & ~r0 */ 674 andc r0,r30,r0 /* r0 = pte & ~r0 */
673 rlwimi r3,r0,32-1,31,31 /* Insert result into PP lsb */ 675 rlwimi r3,r0,32-1,31,31 /* Insert result into PP lsb */
676 ori r3,r3,HPTE_R_C /* Always add "C" bit for perf. */
674 677
675 /* We eventually do the icache sync here (maybe inline that 678 /* We eventually do the icache sync here (maybe inline that
676 * code rather than call a C function...) 679 * code rather than call a C function...)
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index 33654d1b1b43..3b8205033f15 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -238,7 +238,7 @@ static long native_hpte_updatepp(unsigned long slot, unsigned long newpp,
238 DBG_LOW(" -> hit\n"); 238 DBG_LOW(" -> hit\n");
239 /* Update the HPTE */ 239 /* Update the HPTE */
240 hptep->r = (hptep->r & ~(HPTE_R_PP | HPTE_R_N)) | 240 hptep->r = (hptep->r & ~(HPTE_R_PP | HPTE_R_N)) |
241 (newpp & (HPTE_R_PP | HPTE_R_N)); 241 (newpp & (HPTE_R_PP | HPTE_R_N | HPTE_R_C));
242 native_unlock_hpte(hptep); 242 native_unlock_hpte(hptep);
243 } 243 }
244 244
diff --git a/include/asm-powerpc/mmu.h b/include/asm-powerpc/mmu.h
index 96e47d1ce979..885397420104 100644
--- a/include/asm-powerpc/mmu.h
+++ b/include/asm-powerpc/mmu.h
@@ -96,6 +96,8 @@ extern char initial_stab[];
96#define HPTE_R_FLAGS ASM_CONST(0x00000000000003ff) 96#define HPTE_R_FLAGS ASM_CONST(0x00000000000003ff)
97#define HPTE_R_PP ASM_CONST(0x0000000000000003) 97#define HPTE_R_PP ASM_CONST(0x0000000000000003)
98#define HPTE_R_N ASM_CONST(0x0000000000000004) 98#define HPTE_R_N ASM_CONST(0x0000000000000004)
99#define HPTE_R_C ASM_CONST(0x0000000000000080)
100#define HPTE_R_R ASM_CONST(0x0000000000000100)
99 101
100/* Values for PP (assumes Ks=0, Kp=1) */ 102/* Values for PP (assumes Ks=0, Kp=1) */
101/* pp0 will always be 0 for linux */ 103/* pp0 will always be 0 for linux */