4 files changed, 21 insertions, 0 deletions

diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index a57c1f216b21..3f0173f45019 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -68,6 +68,7 @@ parameter is applicable:
         PARIDE  The ParIDE (parallel port IDE) subsystem is enabled.
         PARISC  The PA-RISC architecture is enabled.
         PCI     PCI bus support is enabled.
+        PCIE    PCI Express support is enabled.
         PCMCIA  The PCMCIA subsystem is enabled.
         PNP     Plug & Play support is enabled.
         PPC     PowerPC architecture is enabled.
@@ -1270,6 +1271,9 @@ and is between 256 and 4096 characters. It is defined in the file
                                 Mechanism 1.
                 conf2           [X86-32] Force use of PCI Configuration
                                 Mechanism 2.
+                noaer           [PCIE] If the PCIEAER kernel config parameter is
+                                enabled, this kernel boot option can be used to
+                                disable the use of PCIE advanced error reporting.
                 nommconf        [X86-32,X86_64] Disable use of MMCONFIG for PCI
                                 Configuration
                 nomsi           [MSI] If the PCI_MSI kernel config parameter is
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 19a64a36ecab..2dd5c282fabe 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1586,6 +1586,8 @@ static int __devinit pci_setup(char *str)
                 if (*str && (str = pcibios_setup(str)) && *str) {
                         if (!strcmp(str, "nomsi")) {
                                 pci_no_msi();
+                        } else if (!strcmp(str, "noaer")) {
+                                pci_no_aer();
                         } else if (!strncmp(str, "cbiosize=", 9)) {
                                 pci_cardbus_io_size = memparse(str + 9, &str);
                         } else if (!strncmp(str, "cbmemsize=", 10)) {
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index 4c36e80f6d26..5360d73d4941 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -52,6 +52,12 @@ void pci_restore_msi_state(struct pci_dev *dev);
 static inline void pci_restore_msi_state(struct pci_dev *dev) {}
 #endif
 
+#ifdef CONFIG_PCIEAER
+void pci_no_aer(void);
+#else
+static inline void pci_no_aer(void) { }
+#endif
+
 static inline int pci_no_d1d2(struct pci_dev *dev)
 {
         unsigned int parent_dstates = 0;
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c
index ad90a01b0dfc..7a62f7dd9009 100644
--- a/drivers/pci/pcie/aer/aerdrv.c
+++ b/drivers/pci/pcie/aer/aerdrv.c
@@ -81,6 +81,13 @@ static struct pcie_port_service_driver aerdriver = {
         .reset_link     = aer_root_reset,
 };
 
+static int pcie_aer_disable;
+
+void pci_no_aer(void)
+{
+        pcie_aer_disable = 1;   /* has priority over 'forceload' */
+}
+
 /**
  * aer_irq - Root Port's ISR
  * @irq: IRQ assigned to Root Port
@@ -327,6 +334,8 @@ static void aer_error_resume(struct pci_dev *dev)
  **/
 static int __init aer_service_init(void)
 {
+        if (pcie_aer_disable)
+                return -ENXIO;
         return pcie_port_service_register(&aerdriver);
 }