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-rw-r--r--drivers/net/bnx2x.h1
-rw-r--r--drivers/net/bnx2x_link.c9
2 files changed, 10 insertions, 0 deletions
diff --git a/drivers/net/bnx2x.h b/drivers/net/bnx2x.h
index e15ecfbfc85e..98d6f85fdeb5 100644
--- a/drivers/net/bnx2x.h
+++ b/drivers/net/bnx2x.h
@@ -120,6 +120,7 @@
120#define SHMEM_RD(bp, field) REG_RD(bp, SHMEM_ADDR(bp, field)) 120#define SHMEM_RD(bp, field) REG_RD(bp, SHMEM_ADDR(bp, field))
121#define SHMEM_WR(bp, field, val) REG_WR(bp, SHMEM_ADDR(bp, field), val) 121#define SHMEM_WR(bp, field, val) REG_WR(bp, SHMEM_ADDR(bp, field), val)
122 122
123#define EMAC_RD(bp, reg) REG_RD(bp, emac_base + reg)
123#define NIG_WR(reg, val) REG_WR(bp, reg, val) 124#define NIG_WR(reg, val) REG_WR(bp, reg, val)
124#define EMAC_WR(reg, val) REG_WR(bp, emac_base + reg, val) 125#define EMAC_WR(reg, val) REG_WR(bp, emac_base + reg, val)
125#define BMAC_WR(reg, val) REG_WR(bp, GRCBASE_NIG + bmac_addr + reg, val) 126#define BMAC_WR(reg, val) REG_WR(bp, GRCBASE_NIG + bmac_addr + reg, val)
diff --git a/drivers/net/bnx2x_link.c b/drivers/net/bnx2x_link.c
index 693efce7cda5..876a968c5941 100644
--- a/drivers/net/bnx2x_link.c
+++ b/drivers/net/bnx2x_link.c
@@ -3769,6 +3769,8 @@ u8 bnx2x_set_led(struct bnx2x *bp, u8 port, u8 mode, u32 speed,
3769 u16 hw_led_mode, u32 chip_id) 3769 u16 hw_led_mode, u32 chip_id)
3770{ 3770{
3771 u8 rc = 0; 3771 u8 rc = 0;
3772 u32 tmp;
3773 u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0;
3772 DP(NETIF_MSG_LINK, "bnx2x_set_led: port %x, mode %d\n", port, mode); 3774 DP(NETIF_MSG_LINK, "bnx2x_set_led: port %x, mode %d\n", port, mode);
3773 DP(NETIF_MSG_LINK, "speed 0x%x, hw_led_mode 0x%x\n", 3775 DP(NETIF_MSG_LINK, "speed 0x%x, hw_led_mode 0x%x\n",
3774 speed, hw_led_mode); 3776 speed, hw_led_mode);
@@ -3777,6 +3779,9 @@ u8 bnx2x_set_led(struct bnx2x *bp, u8 port, u8 mode, u32 speed,
3777 REG_WR(bp, NIG_REG_LED_10G_P0 + port*4, 0); 3779 REG_WR(bp, NIG_REG_LED_10G_P0 + port*4, 0);
3778 REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4, 3780 REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4,
3779 SHARED_HW_CFG_LED_MAC1); 3781 SHARED_HW_CFG_LED_MAC1);
3782
3783 tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED);
3784 EMAC_WR(EMAC_REG_EMAC_LED, (tmp | EMAC_LED_OVERRIDE));
3780 break; 3785 break;
3781 3786
3782 case LED_MODE_OPER: 3787 case LED_MODE_OPER:
@@ -3788,6 +3793,10 @@ u8 bnx2x_set_led(struct bnx2x *bp, u8 port, u8 mode, u32 speed,
3788 LED_BLINK_RATE_VAL); 3793 LED_BLINK_RATE_VAL);
3789 REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_ENA_P0 + 3794 REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_ENA_P0 +
3790 port*4, 1); 3795 port*4, 1);
3796 tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED);
3797 EMAC_WR(EMAC_REG_EMAC_LED,
3798 (tmp & (~EMAC_LED_OVERRIDE)));
3799
3791 if (!CHIP_IS_E1H(bp) && 3800 if (!CHIP_IS_E1H(bp) &&
3792 ((speed == SPEED_2500) || 3801 ((speed == SPEED_2500) ||
3793 (speed == SPEED_1000) || 3802 (speed == SPEED_1000) ||