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-rw-r--r--arch/x86_64/kernel/pci-calgary.c53
-rw-r--r--arch/x86_64/kernel/tce.c10
-rw-r--r--include/asm-x86_64/tce.h1
3 files changed, 28 insertions, 36 deletions
diff --git a/arch/x86_64/kernel/pci-calgary.c b/arch/x86_64/kernel/pci-calgary.c
index 146924ba5df5..96f6a866afad 100644
--- a/arch/x86_64/kernel/pci-calgary.c
+++ b/arch/x86_64/kernel/pci-calgary.c
@@ -111,17 +111,17 @@ static const unsigned long phb_offsets[] = {
111 0xB000 /* PHB3 */ 111 0xB000 /* PHB3 */
112}; 112};
113 113
114static char bus_to_phb[MAX_PHB_BUS_NUM];
115void* tce_table_kva[MAX_PHB_BUS_NUM];
116unsigned int specified_table_size = TCE_TABLE_SIZE_UNSPECIFIED; 114unsigned int specified_table_size = TCE_TABLE_SIZE_UNSPECIFIED;
117static int translate_empty_slots __read_mostly = 0; 115static int translate_empty_slots __read_mostly = 0;
118static int calgary_detected __read_mostly = 0; 116static int calgary_detected __read_mostly = 0;
119 117
120/* 118struct calgary_bus_info {
121 * the bitmap of PHBs the user requested that we disable 119 void *tce_space;
122 * translation on. 120 int translation_disabled;
123 */ 121 signed char phbid;
124static DECLARE_BITMAP(translation_disabled, MAX_PHB_BUS_NUM); 122};
123
124static struct calgary_bus_info bus_info[MAX_PHB_BUS_NUM] = { { NULL, 0, 0 }, };
125 125
126static void tce_cache_blast(struct iommu_table *tbl); 126static void tce_cache_blast(struct iommu_table *tbl);
127 127
@@ -149,7 +149,7 @@ static inline unsigned int num_dma_pages(unsigned long dma, unsigned int dmalen)
149 149
150static inline int translate_phb(struct pci_dev* dev) 150static inline int translate_phb(struct pci_dev* dev)
151{ 151{
152 int disabled = test_bit(dev->bus->number, translation_disabled); 152 int disabled = bus_info[dev->bus->number].translation_disabled;
153 return !disabled; 153 return !disabled;
154} 154}
155 155
@@ -454,7 +454,7 @@ static struct dma_mapping_ops calgary_dma_ops = {
454 454
455static inline int busno_to_phbid(unsigned char num) 455static inline int busno_to_phbid(unsigned char num)
456{ 456{
457 return bus_to_phb[num]; 457 return bus_info[num].phbid;
458} 458}
459 459
460static inline unsigned long split_queue_offset(unsigned char num) 460static inline unsigned long split_queue_offset(unsigned char num)
@@ -631,6 +631,10 @@ static int __init calgary_setup_tar(struct pci_dev *dev, void __iomem *bbar)
631 if (ret) 631 if (ret)
632 return ret; 632 return ret;
633 633
634 tbl = dev->sysdata;
635 tbl->it_base = (unsigned long)bus_info[dev->bus->number].tce_space;
636 tce_free(tbl, 0, tbl->it_size);
637
634 calgary_reserve_regions(dev); 638 calgary_reserve_regions(dev);
635 639
636 /* set TARs for each PHB */ 640 /* set TARs for each PHB */
@@ -824,7 +828,7 @@ static int __init calgary_init(void)
824 calgary_init_one_nontraslated(dev); 828 calgary_init_one_nontraslated(dev);
825 continue; 829 continue;
826 } 830 }
827 if (!tce_table_kva[dev->bus->number] && !translate_empty_slots) { 831 if (!bus_info[dev->bus->number].tce_space && !translate_empty_slots) {
828 pci_dev_put(dev); 832 pci_dev_put(dev);
829 continue; 833 continue;
830 } 834 }
@@ -844,7 +848,7 @@ error:
844 pci_dev_put(dev); 848 pci_dev_put(dev);
845 continue; 849 continue;
846 } 850 }
847 if (!tce_table_kva[dev->bus->number] && !translate_empty_slots) 851 if (!bus_info[dev->bus->number].tce_space && !translate_empty_slots)
848 continue; 852 continue;
849 calgary_disable_translation(dev); 853 calgary_disable_translation(dev);
850 calgary_free_tar(dev); 854 calgary_free_tar(dev);
@@ -894,9 +898,8 @@ void __init detect_calgary(void)
894 898
895 for (bus = 0; bus < MAX_PHB_BUS_NUM; bus++) { 899 for (bus = 0; bus < MAX_PHB_BUS_NUM; bus++) {
896 int dev; 900 int dev;
897 901 struct calgary_bus_info *info = &bus_info[bus];
898 tce_table_kva[bus] = NULL; 902 info->phbid = -1;
899 bus_to_phb[bus] = -1;
900 903
901 if (read_pci_config(bus, 0, 0, 0) != PCI_VENDOR_DEVICE_ID_CALGARY) 904 if (read_pci_config(bus, 0, 0, 0) != PCI_VENDOR_DEVICE_ID_CALGARY)
902 continue; 905 continue;
@@ -907,12 +910,9 @@ void __init detect_calgary(void)
907 */ 910 */
908 phb = (phb + 1) % PHBS_PER_CALGARY; 911 phb = (phb + 1) % PHBS_PER_CALGARY;
909 912
910 if (test_bit(bus, translation_disabled)) { 913 if (info->translation_disabled)
911 printk(KERN_INFO "Calgary: translation is disabled for "
912 "PHB 0x%x\n", bus);
913 /* skip this phb, don't allocate a tbl for it */
914 continue; 914 continue;
915 } 915
916 /* 916 /*
917 * Scan the slots of the PCI bus to see if there is a device present. 917 * Scan the slots of the PCI bus to see if there is a device present.
918 * The parent bus will be the zero-ith device, so start at 1. 918 * The parent bus will be the zero-ith device, so start at 1.
@@ -923,8 +923,8 @@ void __init detect_calgary(void)
923 tbl = alloc_tce_table(); 923 tbl = alloc_tce_table();
924 if (!tbl) 924 if (!tbl)
925 goto cleanup; 925 goto cleanup;
926 tce_table_kva[bus] = tbl; 926 info->tce_space = tbl;
927 bus_to_phb[bus] = phb; 927 info->phbid = phb;
928 calgary_found = 1; 928 calgary_found = 1;
929 break; 929 break;
930 } 930 }
@@ -940,9 +940,12 @@ void __init detect_calgary(void)
940 return; 940 return;
941 941
942cleanup: 942cleanup:
943 for (--bus; bus >= 0; --bus) 943 for (--bus; bus >= 0; --bus) {
944 if (tce_table_kva[bus]) 944 struct calgary_bus_info *info = &bus_info[bus];
945 free_tce_table(tce_table_kva[bus]); 945
946 if (info->tce_space)
947 free_tce_table(info->tce_space);
948 }
946} 949}
947 950
948int __init calgary_iommu_init(void) 951int __init calgary_iommu_init(void)
@@ -1016,7 +1019,7 @@ static int __init calgary_parse_options(char *p)
1016 if (bridge < MAX_PHB_BUS_NUM) { 1019 if (bridge < MAX_PHB_BUS_NUM) {
1017 printk(KERN_INFO "Calgary: disabling " 1020 printk(KERN_INFO "Calgary: disabling "
1018 "translation for PHB 0x%x\n", bridge); 1021 "translation for PHB 0x%x\n", bridge);
1019 set_bit(bridge, translation_disabled); 1022 bus_info[bridge].translation_disabled = 1;
1020 } 1023 }
1021 } 1024 }
1022 1025
diff --git a/arch/x86_64/kernel/tce.c b/arch/x86_64/kernel/tce.c
index 0905ce6b9b32..cbabfdf78e06 100644
--- a/arch/x86_64/kernel/tce.c
+++ b/arch/x86_64/kernel/tce.c
@@ -106,14 +106,6 @@ static int tce_table_setparms(struct pci_dev *dev, struct iommu_table *tbl)
106 /* set the tce table size - measured in entries */ 106 /* set the tce table size - measured in entries */
107 tbl->it_size = table_size_to_number_of_entries(specified_table_size); 107 tbl->it_size = table_size_to_number_of_entries(specified_table_size);
108 108
109 tbl->it_base = (unsigned long)tce_table_kva[dev->bus->number];
110 if (!tbl->it_base) {
111 printk(KERN_ERR "Calgary: iommu_table_setparms: "
112 "no table allocated?!\n");
113 ret = -ENOMEM;
114 goto done;
115 }
116
117 /* 109 /*
118 * number of bytes needed for the bitmap size in number of 110 * number of bytes needed for the bitmap size in number of
119 * entries; we need one bit per entry 111 * entries; we need one bit per entry
@@ -162,8 +154,6 @@ int build_tce_table(struct pci_dev *dev, void __iomem *bbar)
162 if (ret) 154 if (ret)
163 goto free_tbl; 155 goto free_tbl;
164 156
165 tce_free(tbl, 0, tbl->it_size);
166
167 tbl->bbar = bbar; 157 tbl->bbar = bbar;
168 158
169 /* 159 /*
diff --git a/include/asm-x86_64/tce.h b/include/asm-x86_64/tce.h
index 53e9a68b3336..dbb047febc5e 100644
--- a/include/asm-x86_64/tce.h
+++ b/include/asm-x86_64/tce.h
@@ -24,7 +24,6 @@
24#ifndef _ASM_X86_64_TCE_H 24#ifndef _ASM_X86_64_TCE_H
25#define _ASM_X86_64_TCE_H 25#define _ASM_X86_64_TCE_H
26 26
27extern void* tce_table_kva[];
28extern unsigned int specified_table_size; 27extern unsigned int specified_table_size;
29struct iommu_table; 28struct iommu_table;
30 29