diff options
-rw-r--r-- | drivers/pcmcia/pxa2xx_cm_x270.c | 93 |
1 files changed, 27 insertions, 66 deletions
diff --git a/drivers/pcmcia/pxa2xx_cm_x270.c b/drivers/pcmcia/pxa2xx_cm_x270.c index f123fce65f2e..bb95db7d2b76 100644 --- a/drivers/pcmcia/pxa2xx_cm_x270.c +++ b/drivers/pcmcia/pxa2xx_cm_x270.c | |||
@@ -5,83 +5,60 @@ | |||
5 | * it under the terms of the GNU General Public License version 2 as | 5 | * it under the terms of the GNU General Public License version 2 as |
6 | * published by the Free Software Foundation. | 6 | * published by the Free Software Foundation. |
7 | * | 7 | * |
8 | * Compulab Ltd., 2003, 2007 | 8 | * Compulab Ltd., 2003, 2007, 2008 |
9 | * Mike Rapoport <mike@compulab.co.il> | 9 | * Mike Rapoport <mike@compulab.co.il> |
10 | * | 10 | * |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/sched.h> | ||
15 | #include <linux/platform_device.h> | 13 | #include <linux/platform_device.h> |
16 | #include <linux/irq.h> | 14 | #include <linux/irq.h> |
17 | #include <linux/delay.h> | 15 | #include <linux/delay.h> |
16 | #include <linux/gpio.h> | ||
18 | 17 | ||
19 | #include <pcmcia/ss.h> | ||
20 | #include <asm/hardware.h> | ||
21 | #include <asm/mach-types.h> | 18 | #include <asm/mach-types.h> |
22 | |||
23 | #include <asm/arch/pxa-regs.h> | 19 | #include <asm/arch/pxa-regs.h> |
24 | #include <asm/arch/pxa2xx-gpio.h> | ||
25 | #include <asm/arch/cm-x270.h> | ||
26 | 20 | ||
27 | #include "soc_common.h" | 21 | #include "soc_common.h" |
28 | 22 | ||
23 | #define GPIO_PCMCIA_S0_CD_VALID (84) | ||
24 | #define GPIO_PCMCIA_S0_RDYINT (82) | ||
25 | #define GPIO_PCMCIA_RESET (53) | ||
26 | |||
27 | #define PCMCIA_S0_CD_VALID IRQ_GPIO(GPIO_PCMCIA_S0_CD_VALID) | ||
28 | #define PCMCIA_S0_RDYINT IRQ_GPIO(GPIO_PCMCIA_S0_RDYINT) | ||
29 | |||
30 | |||
29 | static struct pcmcia_irqs irqs[] = { | 31 | static struct pcmcia_irqs irqs[] = { |
30 | { 0, PCMCIA_S0_CD_VALID, "PCMCIA0 CD" }, | 32 | { 0, PCMCIA_S0_CD_VALID, "PCMCIA0 CD" }, |
31 | { 1, PCMCIA_S1_CD_VALID, "PCMCIA1 CD" }, | ||
32 | }; | 33 | }; |
33 | 34 | ||
34 | static int cmx270_pcmcia_hw_init(struct soc_pcmcia_socket *skt) | 35 | static int cmx270_pcmcia_hw_init(struct soc_pcmcia_socket *skt) |
35 | { | 36 | { |
36 | GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) | | 37 | int ret = gpio_request(GPIO_PCMCIA_RESET, "PCCard reset"); |
37 | GPIO_bit(GPIO49_nPWE) | | 38 | if (ret) |
38 | GPIO_bit(GPIO50_nPIOR) | | 39 | return ret; |
39 | GPIO_bit(GPIO51_nPIOW) | | 40 | gpio_direction_output(GPIO_PCMCIA_RESET, 0); |
40 | GPIO_bit(GPIO85_nPCE_1) | | 41 | |
41 | GPIO_bit(GPIO54_nPCE_2); | 42 | skt->irq = PCMCIA_S0_RDYINT; |
42 | 43 | ret = soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs)); | |
43 | pxa_gpio_mode(GPIO48_nPOE_MD); | 44 | if (!ret) |
44 | pxa_gpio_mode(GPIO49_nPWE_MD); | 45 | gpio_free(GPIO_PCMCIA_RESET); |
45 | pxa_gpio_mode(GPIO50_nPIOR_MD); | 46 | |
46 | pxa_gpio_mode(GPIO51_nPIOW_MD); | 47 | return ret; |
47 | pxa_gpio_mode(GPIO85_nPCE_1_MD); | ||
48 | pxa_gpio_mode(GPIO54_nPCE_2_MD); | ||
49 | pxa_gpio_mode(GPIO55_nPREG_MD); | ||
50 | pxa_gpio_mode(GPIO56_nPWAIT_MD); | ||
51 | pxa_gpio_mode(GPIO57_nIOIS16_MD); | ||
52 | |||
53 | /* Reset signal */ | ||
54 | pxa_gpio_mode(GPIO53_nPCE_2 | GPIO_OUT); | ||
55 | GPCR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2); | ||
56 | |||
57 | set_irq_type(PCMCIA_S0_CD_VALID, IRQ_TYPE_EDGE_BOTH); | ||
58 | set_irq_type(PCMCIA_S1_CD_VALID, IRQ_TYPE_EDGE_BOTH); | ||
59 | |||
60 | /* irq's for slots: */ | ||
61 | set_irq_type(PCMCIA_S0_RDYINT, IRQ_TYPE_EDGE_FALLING); | ||
62 | set_irq_type(PCMCIA_S1_RDYINT, IRQ_TYPE_EDGE_FALLING); | ||
63 | |||
64 | skt->irq = (skt->nr == 0) ? PCMCIA_S0_RDYINT : PCMCIA_S1_RDYINT; | ||
65 | return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs)); | ||
66 | } | 48 | } |
67 | 49 | ||
68 | static void cmx270_pcmcia_shutdown(struct soc_pcmcia_socket *skt) | 50 | static void cmx270_pcmcia_shutdown(struct soc_pcmcia_socket *skt) |
69 | { | 51 | { |
70 | soc_pcmcia_free_irqs(skt, irqs, ARRAY_SIZE(irqs)); | 52 | soc_pcmcia_free_irqs(skt, irqs, ARRAY_SIZE(irqs)); |
71 | 53 | gpio_free(GPIO_PCMCIA_RESET); | |
72 | set_irq_type(IRQ_TO_GPIO(PCMCIA_S0_CD_VALID), IRQ_TYPE_NONE); | ||
73 | set_irq_type(IRQ_TO_GPIO(PCMCIA_S1_CD_VALID), IRQ_TYPE_NONE); | ||
74 | |||
75 | set_irq_type(IRQ_TO_GPIO(PCMCIA_S0_RDYINT), IRQ_TYPE_NONE); | ||
76 | set_irq_type(IRQ_TO_GPIO(PCMCIA_S1_RDYINT), IRQ_TYPE_NONE); | ||
77 | } | 54 | } |
78 | 55 | ||
79 | 56 | ||
80 | static void cmx270_pcmcia_socket_state(struct soc_pcmcia_socket *skt, | 57 | static void cmx270_pcmcia_socket_state(struct soc_pcmcia_socket *skt, |
81 | struct pcmcia_state *state) | 58 | struct pcmcia_state *state) |
82 | { | 59 | { |
83 | state->detect = (PCC_DETECT(skt->nr) == 0) ? 1 : 0; | 60 | state->detect = (gpio_get_value(GPIO_PCMCIA_S0_CD_VALID) == 0) ? 1 : 0; |
84 | state->ready = (PCC_READY(skt->nr) == 0) ? 0 : 1; | 61 | state->ready = (gpio_get_value(GPIO_PCMCIA_S0_RDYINT) == 0) ? 0 : 1; |
85 | state->bvd1 = 1; | 62 | state->bvd1 = 1; |
86 | state->bvd2 = 1; | 63 | state->bvd2 = 1; |
87 | state->vs_3v = 0; | 64 | state->vs_3v = 0; |
@@ -93,32 +70,16 @@ static void cmx270_pcmcia_socket_state(struct soc_pcmcia_socket *skt, | |||
93 | static int cmx270_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, | 70 | static int cmx270_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, |
94 | const socket_state_t *state) | 71 | const socket_state_t *state) |
95 | { | 72 | { |
96 | GPSR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE); | ||
97 | pxa_gpio_mode(GPIO49_nPWE | GPIO_OUT); | ||
98 | |||
99 | switch (skt->nr) { | 73 | switch (skt->nr) { |
100 | case 0: | 74 | case 0: |
101 | if (state->flags & SS_RESET) { | 75 | if (state->flags & SS_RESET) { |
102 | GPCR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE); | 76 | gpio_set_value(GPIO_PCMCIA_RESET, 1); |
103 | GPSR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2); | ||
104 | udelay(10); | ||
105 | GPCR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2); | ||
106 | GPSR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE); | ||
107 | } | ||
108 | break; | ||
109 | case 1: | ||
110 | if (state->flags & SS_RESET) { | ||
111 | GPCR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE); | ||
112 | GPSR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2); | ||
113 | udelay(10); | 77 | udelay(10); |
114 | GPCR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2); | 78 | gpio_set_value(GPIO_PCMCIA_RESET, 0); |
115 | GPSR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE); | ||
116 | } | 79 | } |
117 | break; | 80 | break; |
118 | } | 81 | } |
119 | 82 | ||
120 | pxa_gpio_mode(GPIO49_nPWE_MD); | ||
121 | |||
122 | return 0; | 83 | return 0; |
123 | } | 84 | } |
124 | 85 | ||
@@ -139,7 +100,7 @@ static struct pcmcia_low_level cmx270_pcmcia_ops __initdata = { | |||
139 | .configure_socket = cmx270_pcmcia_configure_socket, | 100 | .configure_socket = cmx270_pcmcia_configure_socket, |
140 | .socket_init = cmx270_pcmcia_socket_init, | 101 | .socket_init = cmx270_pcmcia_socket_init, |
141 | .socket_suspend = cmx270_pcmcia_socket_suspend, | 102 | .socket_suspend = cmx270_pcmcia_socket_suspend, |
142 | .nr = 2, | 103 | .nr = 1, |
143 | }; | 104 | }; |
144 | 105 | ||
145 | static struct platform_device *cmx270_pcmcia_device; | 106 | static struct platform_device *cmx270_pcmcia_device; |