diff options
-rw-r--r-- | drivers/rtc/Kconfig | 10 | ||||
-rw-r--r-- | drivers/rtc/Makefile | 3 | ||||
-rw-r--r-- | drivers/rtc/rtc-x1205.c | 619 |
3 files changed, 632 insertions, 0 deletions
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 8e4dc32058d6..3de823f2f055 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig | |||
@@ -76,4 +76,14 @@ config RTC_INTF_DEV | |||
76 | comment "RTC drivers" | 76 | comment "RTC drivers" |
77 | depends on RTC_CLASS | 77 | depends on RTC_CLASS |
78 | 78 | ||
79 | config RTC_DRV_X1205 | ||
80 | tristate "Xicor/Intersil X1205" | ||
81 | depends on RTC_CLASS && I2C | ||
82 | help | ||
83 | If you say yes here you get support for the | ||
84 | Xicor/Intersil X1205 RTC chip. | ||
85 | |||
86 | This driver can also be built as a module. If so, the module | ||
87 | will be called rtc-x1205. | ||
88 | |||
79 | endmenu | 89 | endmenu |
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 38a9212a7f3b..eaf89b22db7a 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile | |||
@@ -10,3 +10,6 @@ rtc-core-y := class.o interface.o | |||
10 | obj-$(CONFIG_RTC_INTF_SYSFS) += rtc-sysfs.o | 10 | obj-$(CONFIG_RTC_INTF_SYSFS) += rtc-sysfs.o |
11 | obj-$(CONFIG_RTC_INTF_PROC) += rtc-proc.o | 11 | obj-$(CONFIG_RTC_INTF_PROC) += rtc-proc.o |
12 | obj-$(CONFIG_RTC_INTF_DEV) += rtc-dev.o | 12 | obj-$(CONFIG_RTC_INTF_DEV) += rtc-dev.o |
13 | |||
14 | obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o | ||
15 | |||
diff --git a/drivers/rtc/rtc-x1205.c b/drivers/rtc/rtc-x1205.c new file mode 100644 index 000000000000..621d17afc0d9 --- /dev/null +++ b/drivers/rtc/rtc-x1205.c | |||
@@ -0,0 +1,619 @@ | |||
1 | /* | ||
2 | * An i2c driver for the Xicor/Intersil X1205 RTC | ||
3 | * Copyright 2004 Karen Spearel | ||
4 | * Copyright 2005 Alessandro Zummo | ||
5 | * | ||
6 | * please send all reports to: | ||
7 | * Karen Spearel <kas111 at gmail dot com> | ||
8 | * Alessandro Zummo <a.zummo@towertech.it> | ||
9 | * | ||
10 | * based on a lot of other RTC drivers. | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or modify | ||
13 | * it under the terms of the GNU General Public License version 2 as | ||
14 | * published by the Free Software Foundation. | ||
15 | */ | ||
16 | |||
17 | #include <linux/i2c.h> | ||
18 | #include <linux/bcd.h> | ||
19 | #include <linux/rtc.h> | ||
20 | #include <linux/delay.h> | ||
21 | |||
22 | #define DRV_VERSION "1.0.6" | ||
23 | |||
24 | /* Addresses to scan: none. This chip is located at | ||
25 | * 0x6f and uses a two bytes register addressing. | ||
26 | * Two bytes need to be written to read a single register, | ||
27 | * while most other chips just require one and take the second | ||
28 | * one as the data to be written. To prevent corrupting | ||
29 | * unknown chips, the user must explicitely set the probe parameter. | ||
30 | */ | ||
31 | |||
32 | static unsigned short normal_i2c[] = { I2C_CLIENT_END }; | ||
33 | |||
34 | /* Insmod parameters */ | ||
35 | I2C_CLIENT_INSMOD; | ||
36 | |||
37 | /* offsets into CCR area */ | ||
38 | |||
39 | #define CCR_SEC 0 | ||
40 | #define CCR_MIN 1 | ||
41 | #define CCR_HOUR 2 | ||
42 | #define CCR_MDAY 3 | ||
43 | #define CCR_MONTH 4 | ||
44 | #define CCR_YEAR 5 | ||
45 | #define CCR_WDAY 6 | ||
46 | #define CCR_Y2K 7 | ||
47 | |||
48 | #define X1205_REG_SR 0x3F /* status register */ | ||
49 | #define X1205_REG_Y2K 0x37 | ||
50 | #define X1205_REG_DW 0x36 | ||
51 | #define X1205_REG_YR 0x35 | ||
52 | #define X1205_REG_MO 0x34 | ||
53 | #define X1205_REG_DT 0x33 | ||
54 | #define X1205_REG_HR 0x32 | ||
55 | #define X1205_REG_MN 0x31 | ||
56 | #define X1205_REG_SC 0x30 | ||
57 | #define X1205_REG_DTR 0x13 | ||
58 | #define X1205_REG_ATR 0x12 | ||
59 | #define X1205_REG_INT 0x11 | ||
60 | #define X1205_REG_0 0x10 | ||
61 | #define X1205_REG_Y2K1 0x0F | ||
62 | #define X1205_REG_DWA1 0x0E | ||
63 | #define X1205_REG_YRA1 0x0D | ||
64 | #define X1205_REG_MOA1 0x0C | ||
65 | #define X1205_REG_DTA1 0x0B | ||
66 | #define X1205_REG_HRA1 0x0A | ||
67 | #define X1205_REG_MNA1 0x09 | ||
68 | #define X1205_REG_SCA1 0x08 | ||
69 | #define X1205_REG_Y2K0 0x07 | ||
70 | #define X1205_REG_DWA0 0x06 | ||
71 | #define X1205_REG_YRA0 0x05 | ||
72 | #define X1205_REG_MOA0 0x04 | ||
73 | #define X1205_REG_DTA0 0x03 | ||
74 | #define X1205_REG_HRA0 0x02 | ||
75 | #define X1205_REG_MNA0 0x01 | ||
76 | #define X1205_REG_SCA0 0x00 | ||
77 | |||
78 | #define X1205_CCR_BASE 0x30 /* Base address of CCR */ | ||
79 | #define X1205_ALM0_BASE 0x00 /* Base address of ALARM0 */ | ||
80 | |||
81 | #define X1205_SR_RTCF 0x01 /* Clock failure */ | ||
82 | #define X1205_SR_WEL 0x02 /* Write Enable Latch */ | ||
83 | #define X1205_SR_RWEL 0x04 /* Register Write Enable */ | ||
84 | |||
85 | #define X1205_DTR_DTR0 0x01 | ||
86 | #define X1205_DTR_DTR1 0x02 | ||
87 | #define X1205_DTR_DTR2 0x04 | ||
88 | |||
89 | #define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */ | ||
90 | |||
91 | /* Prototypes */ | ||
92 | static int x1205_attach(struct i2c_adapter *adapter); | ||
93 | static int x1205_detach(struct i2c_client *client); | ||
94 | static int x1205_probe(struct i2c_adapter *adapter, int address, int kind); | ||
95 | |||
96 | static struct i2c_driver x1205_driver = { | ||
97 | .driver = { | ||
98 | .name = "x1205", | ||
99 | }, | ||
100 | .id = I2C_DRIVERID_X1205, | ||
101 | .attach_adapter = &x1205_attach, | ||
102 | .detach_client = &x1205_detach, | ||
103 | }; | ||
104 | |||
105 | /* | ||
106 | * In the routines that deal directly with the x1205 hardware, we use | ||
107 | * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch | ||
108 | * Epoch is initialized as 2000. Time is set to UTC. | ||
109 | */ | ||
110 | static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm, | ||
111 | unsigned char reg_base) | ||
112 | { | ||
113 | unsigned char dt_addr[2] = { 0, reg_base }; | ||
114 | |||
115 | unsigned char buf[8]; | ||
116 | |||
117 | struct i2c_msg msgs[] = { | ||
118 | { client->addr, 0, 2, dt_addr }, /* setup read ptr */ | ||
119 | { client->addr, I2C_M_RD, 8, buf }, /* read date */ | ||
120 | }; | ||
121 | |||
122 | /* read date registers */ | ||
123 | if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) { | ||
124 | dev_err(&client->dev, "%s: read error\n", __FUNCTION__); | ||
125 | return -EIO; | ||
126 | } | ||
127 | |||
128 | dev_dbg(&client->dev, | ||
129 | "%s: raw read data - sec=%02x, min=%02x, hr=%02x, " | ||
130 | "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n", | ||
131 | __FUNCTION__, | ||
132 | buf[0], buf[1], buf[2], buf[3], | ||
133 | buf[4], buf[5], buf[6], buf[7]); | ||
134 | |||
135 | tm->tm_sec = BCD2BIN(buf[CCR_SEC]); | ||
136 | tm->tm_min = BCD2BIN(buf[CCR_MIN]); | ||
137 | tm->tm_hour = BCD2BIN(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */ | ||
138 | tm->tm_mday = BCD2BIN(buf[CCR_MDAY]); | ||
139 | tm->tm_mon = BCD2BIN(buf[CCR_MONTH]) - 1; /* mon is 0-11 */ | ||
140 | tm->tm_year = BCD2BIN(buf[CCR_YEAR]) | ||
141 | + (BCD2BIN(buf[CCR_Y2K]) * 100) - 1900; | ||
142 | tm->tm_wday = buf[CCR_WDAY]; | ||
143 | |||
144 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, " | ||
145 | "mday=%d, mon=%d, year=%d, wday=%d\n", | ||
146 | __FUNCTION__, | ||
147 | tm->tm_sec, tm->tm_min, tm->tm_hour, | ||
148 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); | ||
149 | |||
150 | return 0; | ||
151 | } | ||
152 | |||
153 | static int x1205_get_status(struct i2c_client *client, unsigned char *sr) | ||
154 | { | ||
155 | static unsigned char sr_addr[2] = { 0, X1205_REG_SR }; | ||
156 | |||
157 | struct i2c_msg msgs[] = { | ||
158 | { client->addr, 0, 2, sr_addr }, /* setup read ptr */ | ||
159 | { client->addr, I2C_M_RD, 1, sr }, /* read status */ | ||
160 | }; | ||
161 | |||
162 | /* read status register */ | ||
163 | if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) { | ||
164 | dev_err(&client->dev, "%s: read error\n", __FUNCTION__); | ||
165 | return -EIO; | ||
166 | } | ||
167 | |||
168 | return 0; | ||
169 | } | ||
170 | |||
171 | static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm, | ||
172 | int datetoo, u8 reg_base) | ||
173 | { | ||
174 | int i, xfer; | ||
175 | unsigned char buf[8]; | ||
176 | |||
177 | static const unsigned char wel[3] = { 0, X1205_REG_SR, | ||
178 | X1205_SR_WEL }; | ||
179 | |||
180 | static const unsigned char rwel[3] = { 0, X1205_REG_SR, | ||
181 | X1205_SR_WEL | X1205_SR_RWEL }; | ||
182 | |||
183 | static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 }; | ||
184 | |||
185 | dev_dbg(&client->dev, | ||
186 | "%s: secs=%d, mins=%d, hours=%d\n", | ||
187 | __FUNCTION__, | ||
188 | tm->tm_sec, tm->tm_min, tm->tm_hour); | ||
189 | |||
190 | buf[CCR_SEC] = BIN2BCD(tm->tm_sec); | ||
191 | buf[CCR_MIN] = BIN2BCD(tm->tm_min); | ||
192 | |||
193 | /* set hour and 24hr bit */ | ||
194 | buf[CCR_HOUR] = BIN2BCD(tm->tm_hour) | X1205_HR_MIL; | ||
195 | |||
196 | /* should we also set the date? */ | ||
197 | if (datetoo) { | ||
198 | dev_dbg(&client->dev, | ||
199 | "%s: mday=%d, mon=%d, year=%d, wday=%d\n", | ||
200 | __FUNCTION__, | ||
201 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); | ||
202 | |||
203 | buf[CCR_MDAY] = BIN2BCD(tm->tm_mday); | ||
204 | |||
205 | /* month, 1 - 12 */ | ||
206 | buf[CCR_MONTH] = BIN2BCD(tm->tm_mon + 1); | ||
207 | |||
208 | /* year, since the rtc epoch*/ | ||
209 | buf[CCR_YEAR] = BIN2BCD(tm->tm_year % 100); | ||
210 | buf[CCR_WDAY] = tm->tm_wday & 0x07; | ||
211 | buf[CCR_Y2K] = BIN2BCD(tm->tm_year / 100); | ||
212 | } | ||
213 | |||
214 | /* this sequence is required to unlock the chip */ | ||
215 | if ((xfer = i2c_master_send(client, wel, 3)) != 3) { | ||
216 | dev_err(&client->dev, "%s: wel - %d\n", __FUNCTION__, xfer); | ||
217 | return -EIO; | ||
218 | } | ||
219 | |||
220 | if ((xfer = i2c_master_send(client, rwel, 3)) != 3) { | ||
221 | dev_err(&client->dev, "%s: rwel - %d\n", __FUNCTION__, xfer); | ||
222 | return -EIO; | ||
223 | } | ||
224 | |||
225 | /* write register's data */ | ||
226 | for (i = 0; i < (datetoo ? 8 : 3); i++) { | ||
227 | unsigned char rdata[3] = { 0, reg_base + i, buf[i] }; | ||
228 | |||
229 | xfer = i2c_master_send(client, rdata, 3); | ||
230 | if (xfer != 3) { | ||
231 | dev_err(&client->dev, | ||
232 | "%s: xfer=%d addr=%02x, data=%02x\n", | ||
233 | __FUNCTION__, | ||
234 | xfer, rdata[1], rdata[2]); | ||
235 | return -EIO; | ||
236 | } | ||
237 | }; | ||
238 | |||
239 | /* disable further writes */ | ||
240 | if ((xfer = i2c_master_send(client, diswe, 3)) != 3) { | ||
241 | dev_err(&client->dev, "%s: diswe - %d\n", __FUNCTION__, xfer); | ||
242 | return -EIO; | ||
243 | } | ||
244 | |||
245 | return 0; | ||
246 | } | ||
247 | |||
248 | static int x1205_fix_osc(struct i2c_client *client) | ||
249 | { | ||
250 | int err; | ||
251 | struct rtc_time tm; | ||
252 | |||
253 | tm.tm_hour = tm.tm_min = tm.tm_sec = 0; | ||
254 | |||
255 | if ((err = x1205_set_datetime(client, &tm, 0, X1205_CCR_BASE)) < 0) | ||
256 | dev_err(&client->dev, | ||
257 | "unable to restart the oscillator\n"); | ||
258 | |||
259 | return err; | ||
260 | } | ||
261 | |||
262 | static int x1205_get_dtrim(struct i2c_client *client, int *trim) | ||
263 | { | ||
264 | unsigned char dtr; | ||
265 | static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR }; | ||
266 | |||
267 | struct i2c_msg msgs[] = { | ||
268 | { client->addr, 0, 2, dtr_addr }, /* setup read ptr */ | ||
269 | { client->addr, I2C_M_RD, 1, &dtr }, /* read dtr */ | ||
270 | }; | ||
271 | |||
272 | /* read dtr register */ | ||
273 | if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) { | ||
274 | dev_err(&client->dev, "%s: read error\n", __FUNCTION__); | ||
275 | return -EIO; | ||
276 | } | ||
277 | |||
278 | dev_dbg(&client->dev, "%s: raw dtr=%x\n", __FUNCTION__, dtr); | ||
279 | |||
280 | *trim = 0; | ||
281 | |||
282 | if (dtr & X1205_DTR_DTR0) | ||
283 | *trim += 20; | ||
284 | |||
285 | if (dtr & X1205_DTR_DTR1) | ||
286 | *trim += 10; | ||
287 | |||
288 | if (dtr & X1205_DTR_DTR2) | ||
289 | *trim = -*trim; | ||
290 | |||
291 | return 0; | ||
292 | } | ||
293 | |||
294 | static int x1205_get_atrim(struct i2c_client *client, int *trim) | ||
295 | { | ||
296 | s8 atr; | ||
297 | static unsigned char atr_addr[2] = { 0, X1205_REG_ATR }; | ||
298 | |||
299 | struct i2c_msg msgs[] = { | ||
300 | { client->addr, 0, 2, atr_addr }, /* setup read ptr */ | ||
301 | { client->addr, I2C_M_RD, 1, &atr }, /* read atr */ | ||
302 | }; | ||
303 | |||
304 | /* read atr register */ | ||
305 | if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) { | ||
306 | dev_err(&client->dev, "%s: read error\n", __FUNCTION__); | ||
307 | return -EIO; | ||
308 | } | ||
309 | |||
310 | dev_dbg(&client->dev, "%s: raw atr=%x\n", __FUNCTION__, atr); | ||
311 | |||
312 | /* atr is a two's complement value on 6 bits, | ||
313 | * perform sign extension. The formula is | ||
314 | * Catr = (atr * 0.25pF) + 11.00pF. | ||
315 | */ | ||
316 | if (atr & 0x20) | ||
317 | atr |= 0xC0; | ||
318 | |||
319 | dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __FUNCTION__, atr, atr); | ||
320 | |||
321 | *trim = (atr * 250) + 11000; | ||
322 | |||
323 | dev_dbg(&client->dev, "%s: real=%d\n", __FUNCTION__, *trim); | ||
324 | |||
325 | return 0; | ||
326 | } | ||
327 | |||
328 | struct x1205_limit | ||
329 | { | ||
330 | unsigned char reg, mask, min, max; | ||
331 | }; | ||
332 | |||
333 | static int x1205_validate_client(struct i2c_client *client) | ||
334 | { | ||
335 | int i, xfer; | ||
336 | |||
337 | /* Probe array. We will read the register at the specified | ||
338 | * address and check if the given bits are zero. | ||
339 | */ | ||
340 | static const unsigned char probe_zero_pattern[] = { | ||
341 | /* register, mask */ | ||
342 | X1205_REG_SR, 0x18, | ||
343 | X1205_REG_DTR, 0xF8, | ||
344 | X1205_REG_ATR, 0xC0, | ||
345 | X1205_REG_INT, 0x18, | ||
346 | X1205_REG_0, 0xFF, | ||
347 | }; | ||
348 | |||
349 | static const struct x1205_limit probe_limits_pattern[] = { | ||
350 | /* register, mask, min, max */ | ||
351 | { X1205_REG_Y2K, 0xFF, 19, 20 }, | ||
352 | { X1205_REG_DW, 0xFF, 0, 6 }, | ||
353 | { X1205_REG_YR, 0xFF, 0, 99 }, | ||
354 | { X1205_REG_MO, 0xFF, 0, 12 }, | ||
355 | { X1205_REG_DT, 0xFF, 0, 31 }, | ||
356 | { X1205_REG_HR, 0x7F, 0, 23 }, | ||
357 | { X1205_REG_MN, 0xFF, 0, 59 }, | ||
358 | { X1205_REG_SC, 0xFF, 0, 59 }, | ||
359 | { X1205_REG_Y2K1, 0xFF, 19, 20 }, | ||
360 | { X1205_REG_Y2K0, 0xFF, 19, 20 }, | ||
361 | }; | ||
362 | |||
363 | /* check that registers have bits a 0 where expected */ | ||
364 | for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) { | ||
365 | unsigned char buf; | ||
366 | |||
367 | unsigned char addr[2] = { 0, probe_zero_pattern[i] }; | ||
368 | |||
369 | struct i2c_msg msgs[2] = { | ||
370 | { client->addr, 0, 2, addr }, | ||
371 | { client->addr, I2C_M_RD, 1, &buf }, | ||
372 | }; | ||
373 | |||
374 | if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) { | ||
375 | dev_err(&client->adapter->dev, | ||
376 | "%s: could not read register %x\n", | ||
377 | __FUNCTION__, probe_zero_pattern[i]); | ||
378 | |||
379 | return -EIO; | ||
380 | } | ||
381 | |||
382 | if ((buf & probe_zero_pattern[i+1]) != 0) { | ||
383 | dev_err(&client->adapter->dev, | ||
384 | "%s: register=%02x, zero pattern=%d, value=%x\n", | ||
385 | __FUNCTION__, probe_zero_pattern[i], i, buf); | ||
386 | |||
387 | return -ENODEV; | ||
388 | } | ||
389 | } | ||
390 | |||
391 | /* check limits (only registers with bcd values) */ | ||
392 | for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) { | ||
393 | unsigned char reg, value; | ||
394 | |||
395 | unsigned char addr[2] = { 0, probe_limits_pattern[i].reg }; | ||
396 | |||
397 | struct i2c_msg msgs[2] = { | ||
398 | { client->addr, 0, 2, addr }, | ||
399 | { client->addr, I2C_M_RD, 1, ® }, | ||
400 | }; | ||
401 | |||
402 | if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) { | ||
403 | dev_err(&client->adapter->dev, | ||
404 | "%s: could not read register %x\n", | ||
405 | __FUNCTION__, probe_limits_pattern[i].reg); | ||
406 | |||
407 | return -EIO; | ||
408 | } | ||
409 | |||
410 | value = BCD2BIN(reg & probe_limits_pattern[i].mask); | ||
411 | |||
412 | if (value > probe_limits_pattern[i].max || | ||
413 | value < probe_limits_pattern[i].min) { | ||
414 | dev_dbg(&client->adapter->dev, | ||
415 | "%s: register=%x, lim pattern=%d, value=%d\n", | ||
416 | __FUNCTION__, probe_limits_pattern[i].reg, | ||
417 | i, value); | ||
418 | |||
419 | return -ENODEV; | ||
420 | } | ||
421 | } | ||
422 | |||
423 | return 0; | ||
424 | } | ||
425 | |||
426 | static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) | ||
427 | { | ||
428 | return x1205_get_datetime(to_i2c_client(dev), | ||
429 | &alrm->time, X1205_ALM0_BASE); | ||
430 | } | ||
431 | |||
432 | static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) | ||
433 | { | ||
434 | return x1205_set_datetime(to_i2c_client(dev), | ||
435 | &alrm->time, 1, X1205_ALM0_BASE); | ||
436 | } | ||
437 | |||
438 | static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm) | ||
439 | { | ||
440 | return x1205_get_datetime(to_i2c_client(dev), | ||
441 | tm, X1205_CCR_BASE); | ||
442 | } | ||
443 | |||
444 | static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm) | ||
445 | { | ||
446 | return x1205_set_datetime(to_i2c_client(dev), | ||
447 | tm, 1, X1205_CCR_BASE); | ||
448 | } | ||
449 | |||
450 | static int x1205_rtc_proc(struct device *dev, struct seq_file *seq) | ||
451 | { | ||
452 | int err, dtrim, atrim; | ||
453 | |||
454 | seq_printf(seq, "24hr\t\t: yes\n"); | ||
455 | |||
456 | if ((err = x1205_get_dtrim(to_i2c_client(dev), &dtrim)) == 0) | ||
457 | seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim); | ||
458 | |||
459 | if ((err = x1205_get_atrim(to_i2c_client(dev), &atrim)) == 0) | ||
460 | seq_printf(seq, "analog_trim\t: %d.%02d pF\n", | ||
461 | atrim / 1000, atrim % 1000); | ||
462 | return 0; | ||
463 | } | ||
464 | |||
465 | static struct rtc_class_ops x1205_rtc_ops = { | ||
466 | .proc = x1205_rtc_proc, | ||
467 | .read_time = x1205_rtc_read_time, | ||
468 | .set_time = x1205_rtc_set_time, | ||
469 | .read_alarm = x1205_rtc_read_alarm, | ||
470 | .set_alarm = x1205_rtc_set_alarm, | ||
471 | }; | ||
472 | |||
473 | static ssize_t x1205_sysfs_show_atrim(struct device *dev, | ||
474 | struct device_attribute *attr, char *buf) | ||
475 | { | ||
476 | int atrim; | ||
477 | |||
478 | if (x1205_get_atrim(to_i2c_client(dev), &atrim) == 0) | ||
479 | return sprintf(buf, "%d.%02d pF\n", | ||
480 | atrim / 1000, atrim % 1000); | ||
481 | return 0; | ||
482 | } | ||
483 | static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL); | ||
484 | |||
485 | static ssize_t x1205_sysfs_show_dtrim(struct device *dev, | ||
486 | struct device_attribute *attr, char *buf) | ||
487 | { | ||
488 | int dtrim; | ||
489 | |||
490 | if (x1205_get_dtrim(to_i2c_client(dev), &dtrim) == 0) | ||
491 | return sprintf(buf, "%d ppm\n", dtrim); | ||
492 | |||
493 | return 0; | ||
494 | } | ||
495 | static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL); | ||
496 | |||
497 | static int x1205_attach(struct i2c_adapter *adapter) | ||
498 | { | ||
499 | dev_dbg(&adapter->dev, "%s\n", __FUNCTION__); | ||
500 | return i2c_probe(adapter, &addr_data, x1205_probe); | ||
501 | } | ||
502 | |||
503 | static int x1205_probe(struct i2c_adapter *adapter, int address, int kind) | ||
504 | { | ||
505 | int err = 0; | ||
506 | unsigned char sr; | ||
507 | struct i2c_client *client; | ||
508 | struct rtc_device *rtc; | ||
509 | |||
510 | dev_dbg(&adapter->dev, "%s\n", __FUNCTION__); | ||
511 | |||
512 | if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) { | ||
513 | err = -ENODEV; | ||
514 | goto exit; | ||
515 | } | ||
516 | |||
517 | if (!(client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL))) { | ||
518 | err = -ENOMEM; | ||
519 | goto exit; | ||
520 | } | ||
521 | |||
522 | /* I2C client */ | ||
523 | client->addr = address; | ||
524 | client->driver = &x1205_driver; | ||
525 | client->adapter = adapter; | ||
526 | |||
527 | strlcpy(client->name, x1205_driver.driver.name, I2C_NAME_SIZE); | ||
528 | |||
529 | /* Verify the chip is really an X1205 */ | ||
530 | if (kind < 0) { | ||
531 | if (x1205_validate_client(client) < 0) { | ||
532 | err = -ENODEV; | ||
533 | goto exit_kfree; | ||
534 | } | ||
535 | } | ||
536 | |||
537 | /* Inform the i2c layer */ | ||
538 | if ((err = i2c_attach_client(client))) | ||
539 | goto exit_kfree; | ||
540 | |||
541 | dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n"); | ||
542 | |||
543 | rtc = rtc_device_register(x1205_driver.driver.name, &client->dev, | ||
544 | &x1205_rtc_ops, THIS_MODULE); | ||
545 | |||
546 | if (IS_ERR(rtc)) { | ||
547 | err = PTR_ERR(rtc); | ||
548 | dev_err(&client->dev, | ||
549 | "unable to register the class device\n"); | ||
550 | goto exit_detach; | ||
551 | } | ||
552 | |||
553 | i2c_set_clientdata(client, rtc); | ||
554 | |||
555 | /* Check for power failures and eventualy enable the osc */ | ||
556 | if ((err = x1205_get_status(client, &sr)) == 0) { | ||
557 | if (sr & X1205_SR_RTCF) { | ||
558 | dev_err(&client->dev, | ||
559 | "power failure detected, " | ||
560 | "please set the clock\n"); | ||
561 | udelay(50); | ||
562 | x1205_fix_osc(client); | ||
563 | } | ||
564 | } | ||
565 | else | ||
566 | dev_err(&client->dev, "couldn't read status\n"); | ||
567 | |||
568 | device_create_file(&client->dev, &dev_attr_atrim); | ||
569 | device_create_file(&client->dev, &dev_attr_dtrim); | ||
570 | |||
571 | return 0; | ||
572 | |||
573 | exit_detach: | ||
574 | i2c_detach_client(client); | ||
575 | |||
576 | exit_kfree: | ||
577 | kfree(client); | ||
578 | |||
579 | exit: | ||
580 | return err; | ||
581 | } | ||
582 | |||
583 | static int x1205_detach(struct i2c_client *client) | ||
584 | { | ||
585 | int err; | ||
586 | struct rtc_device *rtc = i2c_get_clientdata(client); | ||
587 | |||
588 | dev_dbg(&client->dev, "%s\n", __FUNCTION__); | ||
589 | |||
590 | if (rtc) | ||
591 | rtc_device_unregister(rtc); | ||
592 | |||
593 | if ((err = i2c_detach_client(client))) | ||
594 | return err; | ||
595 | |||
596 | kfree(client); | ||
597 | |||
598 | return 0; | ||
599 | } | ||
600 | |||
601 | static int __init x1205_init(void) | ||
602 | { | ||
603 | return i2c_add_driver(&x1205_driver); | ||
604 | } | ||
605 | |||
606 | static void __exit x1205_exit(void) | ||
607 | { | ||
608 | i2c_del_driver(&x1205_driver); | ||
609 | } | ||
610 | |||
611 | MODULE_AUTHOR( | ||
612 | "Karen Spearel <kas111 at gmail dot com>, " | ||
613 | "Alessandro Zummo <a.zummo@towertech.it>"); | ||
614 | MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver"); | ||
615 | MODULE_LICENSE("GPL"); | ||
616 | MODULE_VERSION(DRV_VERSION); | ||
617 | |||
618 | module_init(x1205_init); | ||
619 | module_exit(x1205_exit); | ||