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-rw-r--r--arch/arm/mach-s3c2410/irq.c15
1 files changed, 0 insertions, 15 deletions
diff --git a/arch/arm/mach-s3c2410/irq.c b/arch/arm/mach-s3c2410/irq.c
index e7d2ad96ae68..3c0ed7871c55 100644
--- a/arch/arm/mach-s3c2410/irq.c
+++ b/arch/arm/mach-s3c2410/irq.c
@@ -206,18 +206,6 @@ s3c_irqext_mask(unsigned int irqno)
206 mask = __raw_readl(S3C24XX_EINTMASK); 206 mask = __raw_readl(S3C24XX_EINTMASK);
207 mask |= ( 1UL << irqno); 207 mask |= ( 1UL << irqno);
208 __raw_writel(mask, S3C24XX_EINTMASK); 208 __raw_writel(mask, S3C24XX_EINTMASK);
209
210 if (irqno <= (IRQ_EINT7 - EXTINT_OFF)) {
211 /* check to see if all need masking */
212
213 if ((mask & (0xf << 4)) == (0xf << 4)) {
214 /* all masked, mask the parent */
215 s3c_irq_mask(IRQ_EINT4t7);
216 }
217 } else {
218 /* todo: the same check as above for the rest of the irq regs...*/
219
220 }
221} 209}
222 210
223static void 211static void
@@ -229,7 +217,6 @@ s3c_irqext_ack(unsigned int irqno)
229 217
230 bit = 1UL << (irqno - EXTINT_OFF); 218 bit = 1UL << (irqno - EXTINT_OFF);
231 219
232
233 mask = __raw_readl(S3C24XX_EINTMASK); 220 mask = __raw_readl(S3C24XX_EINTMASK);
234 221
235 __raw_writel(bit, S3C24XX_EINTPEND); 222 __raw_writel(bit, S3C24XX_EINTPEND);
@@ -258,8 +245,6 @@ s3c_irqext_unmask(unsigned int irqno)
258 mask = __raw_readl(S3C24XX_EINTMASK); 245 mask = __raw_readl(S3C24XX_EINTMASK);
259 mask &= ~( 1UL << irqno); 246 mask &= ~( 1UL << irqno);
260 __raw_writel(mask, S3C24XX_EINTMASK); 247 __raw_writel(mask, S3C24XX_EINTMASK);
261
262 s3c_irq_unmask((irqno <= (IRQ_EINT7 - EXTINT_OFF)) ? IRQ_EINT4t7 : IRQ_EINT8t23);
263} 248}
264 249
265int 250int