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-rw-r--r--drivers/net/ixgb/ixgb_hw.c20
-rw-r--r--drivers/net/ixgb/ixgb_hw.h14
2 files changed, 12 insertions, 22 deletions
diff --git a/drivers/net/ixgb/ixgb_hw.c b/drivers/net/ixgb/ixgb_hw.c
index 11dcda0f453e..ff67a84e6802 100644
--- a/drivers/net/ixgb/ixgb_hw.c
+++ b/drivers/net/ixgb/ixgb_hw.c
@@ -192,7 +192,7 @@ ixgb_identify_xpak_vendor(struct ixgb_hw *hw)
192 vendor_name[i] = ixgb_read_phy_reg(hw, 192 vendor_name[i] = ixgb_read_phy_reg(hw,
193 MDIO_PMA_PMD_XPAK_VENDOR_NAME 193 MDIO_PMA_PMD_XPAK_VENDOR_NAME
194 + i, IXGB_PHY_ADDRESS, 194 + i, IXGB_PHY_ADDRESS,
195 MDIO_PMA_PMD_DID); 195 MDIO_MMD_PMAPMD);
196 } 196 }
197 197
198 /* Determine the actual vendor */ 198 /* Determine the actual vendor */
@@ -1225,15 +1225,15 @@ ixgb_optics_reset(struct ixgb_hw *hw)
1225 u16 mdio_reg; 1225 u16 mdio_reg;
1226 1226
1227 ixgb_write_phy_reg(hw, 1227 ixgb_write_phy_reg(hw,
1228 MDIO_PMA_PMD_CR1, 1228 MDIO_CTRL1,
1229 IXGB_PHY_ADDRESS, 1229 IXGB_PHY_ADDRESS,
1230 MDIO_PMA_PMD_DID, 1230 MDIO_MMD_PMAPMD,
1231 MDIO_PMA_PMD_CR1_RESET); 1231 MDIO_CTRL1_RESET);
1232 1232
1233 mdio_reg = ixgb_read_phy_reg( hw, 1233 mdio_reg = ixgb_read_phy_reg(hw,
1234 MDIO_PMA_PMD_CR1, 1234 MDIO_CTRL1,
1235 IXGB_PHY_ADDRESS, 1235 IXGB_PHY_ADDRESS,
1236 MDIO_PMA_PMD_DID); 1236 MDIO_MMD_PMAPMD);
1237 } 1237 }
1238 1238
1239 return; 1239 return;
diff --git a/drivers/net/ixgb/ixgb_hw.h b/drivers/net/ixgb/ixgb_hw.h
index 831fe0c58b2b..af6ca3aab5ad 100644
--- a/drivers/net/ixgb/ixgb_hw.h
+++ b/drivers/net/ixgb/ixgb_hw.h
@@ -29,6 +29,8 @@
29#ifndef _IXGB_HW_H_ 29#ifndef _IXGB_HW_H_
30#define _IXGB_HW_H_ 30#define _IXGB_HW_H_
31 31
32#include <linux/mdio.h>
33
32#include "ixgb_osdep.h" 34#include "ixgb_osdep.h"
33 35
34/* Enums */ 36/* Enums */
@@ -507,18 +509,6 @@ typedef enum {
507/* Definitions for the optics devices on the MDIO bus. */ 509/* Definitions for the optics devices on the MDIO bus. */
508#define IXGB_PHY_ADDRESS 0x0 /* Single PHY, multiple "Devices" */ 510#define IXGB_PHY_ADDRESS 0x0 /* Single PHY, multiple "Devices" */
509 511
510/* Standard five-bit Device IDs. See IEEE 802.3ae, clause 45 */
511#define MDIO_PMA_PMD_DID 0x01
512#define MDIO_WIS_DID 0x02
513#define MDIO_PCS_DID 0x03
514#define MDIO_XGXS_DID 0x04
515
516/* Standard PMA/PMD registers and bit definitions. */
517/* Note: This is a very limited set of definitions, */
518/* only implemented features are defined. */
519#define MDIO_PMA_PMD_CR1 0x0000
520#define MDIO_PMA_PMD_CR1_RESET 0x8000
521
522#define MDIO_PMA_PMD_XPAK_VENDOR_NAME 0x803A /* XPAK/XENPAK devices only */ 512#define MDIO_PMA_PMD_XPAK_VENDOR_NAME 0x803A /* XPAK/XENPAK devices only */
523 513
524/* Vendor-specific MDIO registers */ 514/* Vendor-specific MDIO registers */