diff options
-rw-r--r-- | arch/arm/plat-omap/dma.c | 85 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/dma.h | 12 |
2 files changed, 75 insertions, 22 deletions
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 0889769cb225..1bbb431843ce 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c | |||
@@ -119,32 +119,41 @@ static void clear_lch_regs(int lch) | |||
119 | omap_writew(0, lch_base + i); | 119 | omap_writew(0, lch_base + i); |
120 | } | 120 | } |
121 | 121 | ||
122 | void omap_set_dma_priority(int dst_port, int priority) | 122 | void omap_set_dma_priority(int lch, int dst_port, int priority) |
123 | { | 123 | { |
124 | unsigned long reg; | 124 | unsigned long reg; |
125 | u32 l; | 125 | u32 l; |
126 | 126 | ||
127 | switch (dst_port) { | 127 | if (cpu_class_is_omap1()) { |
128 | case OMAP_DMA_PORT_OCP_T1: /* FFFECC00 */ | 128 | switch (dst_port) { |
129 | reg = OMAP_TC_OCPT1_PRIOR; | 129 | case OMAP_DMA_PORT_OCP_T1: /* FFFECC00 */ |
130 | break; | 130 | reg = OMAP_TC_OCPT1_PRIOR; |
131 | case OMAP_DMA_PORT_OCP_T2: /* FFFECCD0 */ | 131 | break; |
132 | reg = OMAP_TC_OCPT2_PRIOR; | 132 | case OMAP_DMA_PORT_OCP_T2: /* FFFECCD0 */ |
133 | break; | 133 | reg = OMAP_TC_OCPT2_PRIOR; |
134 | case OMAP_DMA_PORT_EMIFF: /* FFFECC08 */ | 134 | break; |
135 | reg = OMAP_TC_EMIFF_PRIOR; | 135 | case OMAP_DMA_PORT_EMIFF: /* FFFECC08 */ |
136 | break; | 136 | reg = OMAP_TC_EMIFF_PRIOR; |
137 | case OMAP_DMA_PORT_EMIFS: /* FFFECC04 */ | 137 | break; |
138 | reg = OMAP_TC_EMIFS_PRIOR; | 138 | case OMAP_DMA_PORT_EMIFS: /* FFFECC04 */ |
139 | break; | 139 | reg = OMAP_TC_EMIFS_PRIOR; |
140 | default: | 140 | break; |
141 | BUG(); | 141 | default: |
142 | return; | 142 | BUG(); |
143 | return; | ||
144 | } | ||
145 | l = omap_readl(reg); | ||
146 | l &= ~(0xf << 8); | ||
147 | l |= (priority & 0xf) << 8; | ||
148 | omap_writel(l, reg); | ||
149 | } | ||
150 | |||
151 | if (cpu_is_omap24xx()) { | ||
152 | if (priority) | ||
153 | OMAP_DMA_CCR_REG(lch) |= (1 << 6); | ||
154 | else | ||
155 | OMAP_DMA_CCR_REG(lch) &= ~(1 << 6); | ||
143 | } | 156 | } |
144 | l = omap_readl(reg); | ||
145 | l &= ~(0xf << 8); | ||
146 | l |= (priority & 0xf) << 8; | ||
147 | omap_writel(l, reg); | ||
148 | } | 157 | } |
149 | 158 | ||
150 | void omap_set_dma_transfer_params(int lch, int data_type, int elem_count, | 159 | void omap_set_dma_transfer_params(int lch, int data_type, int elem_count, |
@@ -234,6 +243,14 @@ void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, u32 color) | |||
234 | OMAP1_DMA_LCH_CTRL_REG(lch) = w; | 243 | OMAP1_DMA_LCH_CTRL_REG(lch) = w; |
235 | } | 244 | } |
236 | 245 | ||
246 | void omap_set_dma_write_mode(int lch, enum omap_dma_write_mode mode) | ||
247 | { | ||
248 | if (cpu_is_omap24xx()) { | ||
249 | OMAP_DMA_CSDP_REG(lch) &= ~(0x3 << 16); | ||
250 | OMAP_DMA_CSDP_REG(lch) |= (mode << 16); | ||
251 | } | ||
252 | } | ||
253 | |||
237 | /* Note that src_port is only for omap1 */ | 254 | /* Note that src_port is only for omap1 */ |
238 | void omap_set_dma_src_params(int lch, int src_port, int src_amode, | 255 | void omap_set_dma_src_params(int lch, int src_port, int src_amode, |
239 | unsigned long src_start, | 256 | unsigned long src_start, |
@@ -698,6 +715,32 @@ void omap_stop_dma(int lch) | |||
698 | } | 715 | } |
699 | 716 | ||
700 | /* | 717 | /* |
718 | * Allows changing the DMA callback function or data. This may be needed if | ||
719 | * the driver shares a single DMA channel for multiple dma triggers. | ||
720 | */ | ||
721 | int omap_set_dma_callback(int lch, | ||
722 | void (* callback)(int lch, u16 ch_status, void *data), | ||
723 | void *data) | ||
724 | { | ||
725 | unsigned long flags; | ||
726 | |||
727 | if (lch < 0) | ||
728 | return -ENODEV; | ||
729 | |||
730 | spin_lock_irqsave(&dma_chan_lock, flags); | ||
731 | if (dma_chan[lch].dev_id == -1) { | ||
732 | printk(KERN_ERR "DMA callback for not set for free channel\n"); | ||
733 | spin_unlock_irqrestore(&dma_chan_lock, flags); | ||
734 | return -EINVAL; | ||
735 | } | ||
736 | dma_chan[lch].callback = callback; | ||
737 | dma_chan[lch].data = data; | ||
738 | spin_unlock_irqrestore(&dma_chan_lock, flags); | ||
739 | |||
740 | return 0; | ||
741 | } | ||
742 | |||
743 | /* | ||
701 | * Returns current physical source address for the given DMA channel. | 744 | * Returns current physical source address for the given DMA channel. |
702 | * If the channel is running the caller must disable interrupts prior calling | 745 | * If the channel is running the caller must disable interrupts prior calling |
703 | * this function and process the returned value before re-enabling interrupt to | 746 | * this function and process the returned value before re-enabling interrupt to |
diff --git a/include/asm-arm/arch-omap/dma.h b/include/asm-arm/arch-omap/dma.h index 33cd48d9a853..d591d0585bba 100644 --- a/include/asm-arm/arch-omap/dma.h +++ b/include/asm-arm/arch-omap/dma.h | |||
@@ -331,6 +331,12 @@ enum omap_dma_color_mode { | |||
331 | OMAP_DMA_TRANSPARENT_COPY | 331 | OMAP_DMA_TRANSPARENT_COPY |
332 | }; | 332 | }; |
333 | 333 | ||
334 | enum omap_dma_write_mode { | ||
335 | OMAP_DMA_WRITE_NON_POSTED = 0, | ||
336 | OMAP_DMA_WRITE_POSTED, | ||
337 | OMAP_DMA_WRITE_LAST_NON_POSTED | ||
338 | }; | ||
339 | |||
334 | struct omap_dma_channel_params { | 340 | struct omap_dma_channel_params { |
335 | int data_type; /* data type 8,16,32 */ | 341 | int data_type; /* data type 8,16,32 */ |
336 | int elem_count; /* number of elements in a frame */ | 342 | int elem_count; /* number of elements in a frame */ |
@@ -356,7 +362,7 @@ struct omap_dma_channel_params { | |||
356 | }; | 362 | }; |
357 | 363 | ||
358 | 364 | ||
359 | extern void omap_set_dma_priority(int dst_port, int priority); | 365 | extern void omap_set_dma_priority(int lch, int dst_port, int priority); |
360 | extern int omap_request_dma(int dev_id, const char *dev_name, | 366 | extern int omap_request_dma(int dev_id, const char *dev_name, |
361 | void (* callback)(int lch, u16 ch_status, void *data), | 367 | void (* callback)(int lch, u16 ch_status, void *data), |
362 | void *data, int *dma_ch); | 368 | void *data, int *dma_ch); |
@@ -371,6 +377,7 @@ extern void omap_set_dma_transfer_params(int lch, int data_type, | |||
371 | int dma_trigger, int src_or_dst_synch); | 377 | int dma_trigger, int src_or_dst_synch); |
372 | extern void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, | 378 | extern void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, |
373 | u32 color); | 379 | u32 color); |
380 | extern void omap_set_dma_write_mode(int lch, enum omap_dma_write_mode mode); | ||
374 | 381 | ||
375 | extern void omap_set_dma_src_params(int lch, int src_port, int src_amode, | 382 | extern void omap_set_dma_src_params(int lch, int src_port, int src_amode, |
376 | unsigned long src_start, | 383 | unsigned long src_start, |
@@ -394,6 +401,9 @@ extern void omap_set_dma_params(int lch, | |||
394 | extern void omap_dma_link_lch (int lch_head, int lch_queue); | 401 | extern void omap_dma_link_lch (int lch_head, int lch_queue); |
395 | extern void omap_dma_unlink_lch (int lch_head, int lch_queue); | 402 | extern void omap_dma_unlink_lch (int lch_head, int lch_queue); |
396 | 403 | ||
404 | extern int omap_set_dma_callback(int lch, | ||
405 | void (* callback)(int lch, u16 ch_status, void *data), | ||
406 | void *data); | ||
397 | extern dma_addr_t omap_get_dma_src_pos(int lch); | 407 | extern dma_addr_t omap_get_dma_src_pos(int lch); |
398 | extern dma_addr_t omap_get_dma_dst_pos(int lch); | 408 | extern dma_addr_t omap_get_dma_dst_pos(int lch); |
399 | extern int omap_get_dma_src_addr_counter(int lch); | 409 | extern int omap_get_dma_src_addr_counter(int lch); |