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-rw-r--r--arch/powerpc/kvm/book3s_64_mmu.c22
1 files changed, 21 insertions, 1 deletions
diff --git a/arch/powerpc/kvm/book3s_64_mmu.c b/arch/powerpc/kvm/book3s_64_mmu.c
index 5598f88f142e..e4beeb371a73 100644
--- a/arch/powerpc/kvm/book3s_64_mmu.c
+++ b/arch/powerpc/kvm/book3s_64_mmu.c
@@ -390,6 +390,26 @@ static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
390{ 390{
391 u64 rb = 0, rs = 0; 391 u64 rb = 0, rs = 0;
392 392
393 /*
394 * According to Book3 2.01 mtsrin is implemented as:
395 *
396 * The SLB entry specified by (RB)32:35 is loaded from register
397 * RS, as follows.
398 *
399 * SLBE Bit Source SLB Field
400 *
401 * 0:31 0x0000_0000 ESID-0:31
402 * 32:35 (RB)32:35 ESID-32:35
403 * 36 0b1 V
404 * 37:61 0x00_0000|| 0b0 VSID-0:24
405 * 62:88 (RS)37:63 VSID-25:51
406 * 89:91 (RS)33:35 Ks Kp N
407 * 92 (RS)36 L ((RS)36 must be 0b0)
408 * 93 0b0 C
409 */
410
411 dprintk("KVM MMU: mtsrin(0x%x, 0x%lx)\n", srnum, value);
412
393 /* ESID = srnum */ 413 /* ESID = srnum */
394 rb |= (srnum & 0xf) << 28; 414 rb |= (srnum & 0xf) << 28;
395 /* Set the valid bit */ 415 /* Set the valid bit */
@@ -400,7 +420,7 @@ static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
400 /* VSID = VSID */ 420 /* VSID = VSID */
401 rs |= (value & 0xfffffff) << 12; 421 rs |= (value & 0xfffffff) << 12;
402 /* flags = flags */ 422 /* flags = flags */
403 rs |= ((value >> 27) & 0xf) << 9; 423 rs |= ((value >> 28) & 0x7) << 9;
404 424
405 kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb); 425 kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb);
406} 426}