diff options
-rw-r--r-- | sound/soc/codecs/twl4030.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c index 1dae73af5273..ffd5120697a2 100644 --- a/sound/soc/codecs/twl4030.c +++ b/sound/soc/codecs/twl4030.c | |||
@@ -367,6 +367,12 @@ static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0); | |||
367 | static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0); | 367 | static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0); |
368 | 368 | ||
369 | /* | 369 | /* |
370 | * Gain controls tied to outputs | ||
371 | * -6 dB to 6 dB in 6 dB steps (mute instead of -12) | ||
372 | */ | ||
373 | static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1); | ||
374 | |||
375 | /* | ||
370 | * Capture gain after the ADCs | 376 | * Capture gain after the ADCs |
371 | * from 0 dB to 31 dB in 1 dB steps | 377 | * from 0 dB to 31 dB in 1 dB steps |
372 | */ | 378 | */ |
@@ -395,6 +401,21 @@ static const struct snd_kcontrol_new twl4030_snd_controls[] = { | |||
395 | TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL, | 401 | TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL, |
396 | 3, 0x12, 1, analog_tlv), | 402 | 3, 0x12, 1, analog_tlv), |
397 | 403 | ||
404 | /* Separate output gain controls */ | ||
405 | SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume", | ||
406 | TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL, | ||
407 | 4, 3, 0, output_tvl), | ||
408 | |||
409 | SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume", | ||
410 | TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, output_tvl), | ||
411 | |||
412 | SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume", | ||
413 | TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL, | ||
414 | 4, 3, 0, output_tvl), | ||
415 | |||
416 | SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume", | ||
417 | TWL4030_REG_EAR_CTL, 4, 3, 0, output_tvl), | ||
418 | |||
398 | /* Common capture gain controls */ | 419 | /* Common capture gain controls */ |
399 | SOC_DOUBLE_R_TLV("Capture Volume", | 420 | SOC_DOUBLE_R_TLV("Capture Volume", |
400 | TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA, | 421 | TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA, |