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-rw-r--r--arch/powerpc/sysdev/fsl_msi.c43
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c8
2 files changed, 21 insertions, 30 deletions
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index 9d0685babbd5..2c5187cc8a24 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -36,12 +36,6 @@ static inline u32 fsl_msi_read(u32 __iomem *base, unsigned int reg)
36 return in_be32(base + (reg >> 2)); 36 return in_be32(base + (reg >> 2));
37} 37}
38 38
39static inline void fsl_msi_write(u32 __iomem *base,
40 unsigned int reg, u32 value)
41{
42 out_be32(base + (reg >> 2), value);
43}
44
45/* 39/*
46 * We do not need this actually. The MSIR register has been read once 40 * We do not need this actually. The MSIR register has been read once
47 * in the cascade interrupt. So, this MSI interrupt has been acked 41 * in the cascade interrupt. So, this MSI interrupt has been acked
@@ -64,7 +58,7 @@ static int fsl_msi_host_map(struct irq_host *h, unsigned int virq,
64 58
65 get_irq_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING; 59 get_irq_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING;
66 60
67 set_irq_chip_and_handler(virq, chip, handle_edge_irq); 61 set_irq_chip_and_handler(virq, chip, handle_edge_irq);
68 62
69 return 0; 63 return 0;
70} 64}
@@ -73,10 +67,11 @@ static struct irq_host_ops fsl_msi_host_ops = {
73 .map = fsl_msi_host_map, 67 .map = fsl_msi_host_map,
74}; 68};
75 69
76irq_hw_number_t fsl_msi_alloc_hwirqs(struct fsl_msi *msi, int num) 70static irq_hw_number_t fsl_msi_alloc_hwirqs(struct fsl_msi *msi, int num)
77{ 71{
78 unsigned long flags; 72 unsigned long flags;
79 int offset, order = get_count_order(num); 73 int order = get_count_order(num);
74 int offset;
80 75
81 spin_lock_irqsave(&msi->bitmap_lock, flags); 76 spin_lock_irqsave(&msi->bitmap_lock, flags);
82 77
@@ -91,7 +86,7 @@ irq_hw_number_t fsl_msi_alloc_hwirqs(struct fsl_msi *msi, int num)
91 return offset; 86 return offset;
92} 87}
93 88
94void fsl_msi_free_hwirqs(struct fsl_msi *msi, int offset, int num) 89static void fsl_msi_free_hwirqs(struct fsl_msi *msi, int offset, int num)
95{ 90{
96 unsigned long flags; 91 unsigned long flags;
97 int order = get_count_order(num); 92 int order = get_count_order(num);
@@ -106,7 +101,8 @@ void fsl_msi_free_hwirqs(struct fsl_msi *msi, int offset, int num)
106 101
107static int fsl_msi_free_dt_hwirqs(struct fsl_msi *msi) 102static int fsl_msi_free_dt_hwirqs(struct fsl_msi *msi)
108{ 103{
109 int i, len; 104 int i;
105 int len;
110 const u32 *p; 106 const u32 *p;
111 107
112 bitmap_allocate_region(msi->fsl_msi_bitmap, 0, 108 bitmap_allocate_region(msi->fsl_msi_bitmap, 0,
@@ -138,9 +134,8 @@ static int fsl_msi_free_dt_hwirqs(struct fsl_msi *msi)
138 134
139static int fsl_msi_init_allocator(struct fsl_msi *msi_data) 135static int fsl_msi_init_allocator(struct fsl_msi *msi_data)
140{ 136{
141 int rc, size; 137 int rc;
142 138 int size = BITS_TO_LONGS(NR_MSI_IRQS) * sizeof(u32);
143 size = BITS_TO_LONGS(NR_MSI_IRQS) * sizeof(u32);
144 139
145 msi_data->fsl_msi_bitmap = kzalloc(size, GFP_KERNEL); 140 msi_data->fsl_msi_bitmap = kzalloc(size, GFP_KERNEL);
146 141
@@ -238,7 +233,7 @@ out_free:
238 return rc; 233 return rc;
239} 234}
240 235
241void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc) 236static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
242{ 237{
243 unsigned int cascade_irq; 238 unsigned int cascade_irq;
244 struct fsl_msi *msi_data = fsl_msi; 239 struct fsl_msi *msi_data = fsl_msi;
@@ -260,7 +255,7 @@ void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
260 if (unlikely(desc->status & IRQ_INPROGRESS)) 255 if (unlikely(desc->status & IRQ_INPROGRESS))
261 goto unlock; 256 goto unlock;
262 257
263 msir_index = (int)(desc->handler_data); 258 msir_index = (int)desc->handler_data;
264 259
265 if (msir_index >= NR_MSI_REG) 260 if (msir_index >= NR_MSI_REG)
266 cascade_irq = NO_IRQ; 261 cascade_irq = NO_IRQ;
@@ -280,12 +275,12 @@ void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
280 intr_index = ffs(msir_value) - 1; 275 intr_index = ffs(msir_value) - 1;
281 276
282 cascade_irq = irq_linear_revmap(msi_data->irqhost, 277 cascade_irq = irq_linear_revmap(msi_data->irqhost,
283 (msir_index * IRQS_PER_MSI_REG + 278 msir_index * IRQS_PER_MSI_REG +
284 intr_index + have_shift)); 279 intr_index + have_shift);
285 if (cascade_irq != NO_IRQ) 280 if (cascade_irq != NO_IRQ)
286 generic_handle_irq(cascade_irq); 281 generic_handle_irq(cascade_irq);
287 have_shift += (intr_index + 1); 282 have_shift += intr_index + 1;
288 msir_value = (msir_value >> (intr_index + 1)); 283 msir_value = msir_value >> (intr_index + 1);
289 } 284 }
290 desc->status &= ~IRQ_INPROGRESS; 285 desc->status &= ~IRQ_INPROGRESS;
291 286
@@ -311,7 +306,7 @@ static int __devinit fsl_of_msi_probe(struct of_device *dev,
311 int rc; 306 int rc;
312 int virt_msir; 307 int virt_msir;
313 const u32 *p; 308 const u32 *p;
314 struct fsl_msi_feature *tmp_data; 309 struct fsl_msi_feature *features = match->data;
315 310
316 printk(KERN_DEBUG "Setting up Freescale MSI support\n"); 311 printk(KERN_DEBUG "Setting up Freescale MSI support\n");
317 312
@@ -348,14 +343,12 @@ static int __devinit fsl_of_msi_probe(struct of_device *dev,
348 goto error_out; 343 goto error_out;
349 } 344 }
350 345
351 tmp_data = (struct fsl_msi_feature *)match->data; 346 msi->feature = features->fsl_pic_ip;
352
353 msi->feature = tmp_data->fsl_pic_ip;
354 347
355 msi->irqhost->host_data = msi; 348 msi->irqhost->host_data = msi;
356 349
357 msi->msi_addr_hi = 0x0; 350 msi->msi_addr_hi = 0x0;
358 msi->msi_addr_lo = res.start + tmp_data->msiir_offset; 351 msi->msi_addr_lo = res.start + features->msiir_offset;
359 352
360 rc = fsl_msi_init_allocator(msi); 353 rc = fsl_msi_init_allocator(msi);
361 if (rc) { 354 if (rc) {
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 52a5f7f41b4a..489ca5a397b1 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -106,15 +106,15 @@ void __init setup_pci_cmd(struct pci_controller *hose)
106 } 106 }
107} 107}
108 108
109#ifdef CONFIG_PCI_MSI 109static void __init setup_pci_pcsrbar(struct pci_controller *hose)
110void __init setup_pci_pcsrbar(struct pci_controller *hose)
111{ 110{
111#ifdef CONFIG_PCI_MSI
112 phys_addr_t immr_base; 112 phys_addr_t immr_base;
113 113
114 immr_base = get_immrbase(); 114 immr_base = get_immrbase();
115 early_write_config_dword(hose, 0, 0, PCI_BASE_ADDRESS_0, immr_base); 115 early_write_config_dword(hose, 0, 0, PCI_BASE_ADDRESS_0, immr_base);
116}
117#endif 116#endif
117}
118 118
119static int fsl_pcie_bus_fixup; 119static int fsl_pcie_bus_fixup;
120 120
@@ -222,9 +222,7 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
222 setup_pci_atmu(hose, &rsrc); 222 setup_pci_atmu(hose, &rsrc);
223 223
224 /* Setup PEXCSRBAR */ 224 /* Setup PEXCSRBAR */
225#ifdef CONFIG_PCI_MSI
226 setup_pci_pcsrbar(hose); 225 setup_pci_pcsrbar(hose);
227#endif
228 return 0; 226 return 0;
229} 227}
230 228