diff options
-rw-r--r-- | arch/arm/Kconfig | 2 | ||||
-rw-r--r-- | arch/arm/mach-ixp4xx/nas100d-power.c | 3 | ||||
-rw-r--r-- | arch/arm/mm/tlb-v6.S | 1 | ||||
-rw-r--r-- | include/asm-arm/tlbflush.h | 6 |
4 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 15dc1a0dffbb..9f80fa502f8f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -78,7 +78,7 @@ menu "System Type" | |||
78 | 78 | ||
79 | choice | 79 | choice |
80 | prompt "ARM system type" | 80 | prompt "ARM system type" |
81 | default ARCH_RPC | 81 | default ARCH_VERSATILE |
82 | 82 | ||
83 | config ARCH_CLPS7500 | 83 | config ARCH_CLPS7500 |
84 | bool "Cirrus-CL-PS7500FE" | 84 | bool "Cirrus-CL-PS7500FE" |
diff --git a/arch/arm/mach-ixp4xx/nas100d-power.c b/arch/arm/mach-ixp4xx/nas100d-power.c index 2bec69bfa715..99d333d7ebdd 100644 --- a/arch/arm/mach-ixp4xx/nas100d-power.c +++ b/arch/arm/mach-ixp4xx/nas100d-power.c | |||
@@ -56,6 +56,9 @@ static int __init nas100d_power_init(void) | |||
56 | 56 | ||
57 | static void __exit nas100d_power_exit(void) | 57 | static void __exit nas100d_power_exit(void) |
58 | { | 58 | { |
59 | if (!(machine_is_nas100d())) | ||
60 | return; | ||
61 | |||
59 | free_irq(NAS100D_RB_IRQ, NULL); | 62 | free_irq(NAS100D_RB_IRQ, NULL); |
60 | } | 63 | } |
61 | 64 | ||
diff --git a/arch/arm/mm/tlb-v6.S b/arch/arm/mm/tlb-v6.S index 6f76b89ef46e..fd6adde39091 100644 --- a/arch/arm/mm/tlb-v6.S +++ b/arch/arm/mm/tlb-v6.S | |||
@@ -80,6 +80,7 @@ ENTRY(v6wbi_flush_kern_tlb_range) | |||
80 | add r0, r0, #PAGE_SZ | 80 | add r0, r0, #PAGE_SZ |
81 | cmp r0, r1 | 81 | cmp r0, r1 |
82 | blo 1b | 82 | blo 1b |
83 | mcr p15, 0, r2, c7, c10, 4 @ data synchronization barrier | ||
83 | mov pc, lr | 84 | mov pc, lr |
84 | 85 | ||
85 | .section ".text.init", #alloc, #execinstr | 86 | .section ".text.init", #alloc, #execinstr |
diff --git a/include/asm-arm/tlbflush.h b/include/asm-arm/tlbflush.h index 9387a5e1ffe0..0c2acc944a0a 100644 --- a/include/asm-arm/tlbflush.h +++ b/include/asm-arm/tlbflush.h | |||
@@ -340,6 +340,12 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr) | |||
340 | asm("mcr%? p15, 0, %0, c8, c6, 1" : : "r" (kaddr)); | 340 | asm("mcr%? p15, 0, %0, c8, c6, 1" : : "r" (kaddr)); |
341 | if (tlb_flag(TLB_V6_I_PAGE)) | 341 | if (tlb_flag(TLB_V6_I_PAGE)) |
342 | asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (kaddr)); | 342 | asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (kaddr)); |
343 | |||
344 | /* The ARM ARM states that the completion of a TLB maintenance | ||
345 | * operation is only guaranteed by a DSB instruction | ||
346 | */ | ||
347 | if (tlb_flag(TLB_V6_U_PAGE | TLB_V6_D_PAGE | TLB_V6_I_PAGE)) | ||
348 | asm("mcr%? p15, 0, %0, c7, c10, 4" : : "r" (zero)); | ||
343 | } | 349 | } |
344 | 350 | ||
345 | /* | 351 | /* |