diff options
-rw-r--r-- | arch/sh/Kconfig | 7 | ||||
-rw-r--r-- | arch/sh/Kconfig.debug | 2 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh2a/Makefile | 1 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh2a/probe.c | 3 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh2a/setup-sh7203.c | 42 | ||||
-rw-r--r-- | arch/sh/kernel/setup.c | 2 | ||||
-rw-r--r-- | arch/sh/kernel/timers/timer-cmt.c | 4 | ||||
-rw-r--r-- | drivers/serial/sh-sci.h | 6 | ||||
-rw-r--r-- | include/asm-sh/bugs.h | 2 | ||||
-rw-r--r-- | include/asm-sh/processor.h | 2 |
10 files changed, 61 insertions, 10 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index d8f62b842656..c18a5512ac82 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig | |||
@@ -166,6 +166,10 @@ config CPU_SUBTYPE_SH7206 | |||
166 | bool "Support SH7206 processor" | 166 | bool "Support SH7206 processor" |
167 | select CPU_SH2A | 167 | select CPU_SH2A |
168 | 168 | ||
169 | config CPU_SUBTYPE_SH7263 | ||
170 | bool "Support SH7263 processor" | ||
171 | select CPU_SH2A | ||
172 | |||
169 | # SH-3 Processor Support | 173 | # SH-3 Processor Support |
170 | 174 | ||
171 | config CPU_SUBTYPE_SH7705 | 175 | config CPU_SUBTYPE_SH7705 |
@@ -560,7 +564,8 @@ config SH_PCLK_FREQ | |||
560 | default "32000000" if CPU_SUBTYPE_SH7722 | 564 | default "32000000" if CPU_SUBTYPE_SH7722 |
561 | default "33333333" if CPU_SUBTYPE_SH7770 || \ | 565 | default "33333333" if CPU_SUBTYPE_SH7770 || \ |
562 | CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \ | 566 | CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \ |
563 | CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206 | 567 | CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206 || \ |
568 | CPU_SUBTYPE_SH7263 | ||
564 | default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R | 569 | default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R |
565 | default "66000000" if CPU_SUBTYPE_SH4_202 | 570 | default "66000000" if CPU_SUBTYPE_SH4_202 |
566 | default "50000000" | 571 | default "50000000" |
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug index f7e362c9d76d..b0dcb240d798 100644 --- a/arch/sh/Kconfig.debug +++ b/arch/sh/Kconfig.debug | |||
@@ -33,7 +33,7 @@ config EARLY_SCIF_CONSOLE_PORT | |||
33 | default "0xffe00000" if CPU_SUBTYPE_SH7780 | 33 | default "0xffe00000" if CPU_SUBTYPE_SH7780 |
34 | default "0xffea0000" if CPU_SUBTYPE_SH7785 | 34 | default "0xffea0000" if CPU_SUBTYPE_SH7785 |
35 | default "0xfffe8000" if CPU_SUBTYPE_SH7203 | 35 | default "0xfffe8000" if CPU_SUBTYPE_SH7203 |
36 | default "0xfffe9800" if CPU_SUBTYPE_SH7206 | 36 | default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263 |
37 | default "0xf8420000" if CPU_SUBTYPE_SH7619 | 37 | default "0xf8420000" if CPU_SUBTYPE_SH7619 |
38 | default "0xa4400000" if CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7705 | 38 | default "0xa4400000" if CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7705 |
39 | default "0xa4430000" if CPU_SUBTYPE_SH7720 | 39 | default "0xa4430000" if CPU_SUBTYPE_SH7720 |
diff --git a/arch/sh/kernel/cpu/sh2a/Makefile b/arch/sh/kernel/cpu/sh2a/Makefile index 5286eeff1cc3..50e4d0ffdd6f 100644 --- a/arch/sh/kernel/cpu/sh2a/Makefile +++ b/arch/sh/kernel/cpu/sh2a/Makefile | |||
@@ -8,3 +8,4 @@ common-y += $(addprefix ../sh2/, ex.o entry.o) | |||
8 | 8 | ||
9 | obj-$(CONFIG_CPU_SUBTYPE_SH7206) += setup-sh7206.o clock-sh7206.o | 9 | obj-$(CONFIG_CPU_SUBTYPE_SH7206) += setup-sh7206.o clock-sh7206.o |
10 | obj-$(CONFIG_CPU_SUBTYPE_SH7203) += setup-sh7203.o clock-sh7203.o | 10 | obj-$(CONFIG_CPU_SUBTYPE_SH7203) += setup-sh7203.o clock-sh7203.o |
11 | obj-$(CONFIG_CPU_SUBTYPE_SH7263) += setup-sh7203.o clock-sh7203.o | ||
diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c index 64f10102b720..6910e2664468 100644 --- a/arch/sh/kernel/cpu/sh2a/probe.c +++ b/arch/sh/kernel/cpu/sh2a/probe.c | |||
@@ -22,6 +22,9 @@ int __init detect_cpu_and_cache_system(void) | |||
22 | boot_cpu_data.type = CPU_SH7203; | 22 | boot_cpu_data.type = CPU_SH7203; |
23 | /* SH7203 has an FPU.. */ | 23 | /* SH7203 has an FPU.. */ |
24 | boot_cpu_data.flags |= CPU_HAS_FPU; | 24 | boot_cpu_data.flags |= CPU_HAS_FPU; |
25 | #elif defined(CONFIG_CPU_SUBTYPE_SH7263) | ||
26 | boot_cpu_data.type = CPU_SH7263; | ||
27 | boot_cpu_data.flags |= CPU_HAS_FPU; | ||
25 | #elif defined(CONFIG_CPU_SUBTYPE_SH7206) | 28 | #elif defined(CONFIG_CPU_SUBTYPE_SH7206) |
26 | boot_cpu_data.type = CPU_SH7206; | 29 | boot_cpu_data.type = CPU_SH7206; |
27 | /* While SH7206 has a DSP.. */ | 30 | /* While SH7206 has a DSP.. */ |
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c index 06f27c8b8583..3518f9c37d93 100644 --- a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c +++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * SH7203 Setup | 2 | * SH7203 and SH7263 Setup |
3 | * | 3 | * |
4 | * Copyright (C) 2007 Paul Mundt | 4 | * Copyright (C) 2007 Paul Mundt |
5 | * | 5 | * |
@@ -41,17 +41,27 @@ enum { | |||
41 | SSU0_SSERI, SSU0_SSRXI, SSU0_SSTXI, | 41 | SSU0_SSERI, SSU0_SSRXI, SSU0_SSTXI, |
42 | SSU1_SSERI, SSU1_SSRXI, SSU1_SSTXI, | 42 | SSU1_SSERI, SSU1_SSRXI, SSU1_SSTXI, |
43 | SSI0_SSII, SSI1_SSII, SSI2_SSII, SSI3_SSII, | 43 | SSI0_SSII, SSI1_SSII, SSI2_SSII, SSI3_SSII, |
44 | |||
45 | /* ROM-DEC, SDHI, SRC, and IEB are SH7263 specific */ | ||
46 | ROMDEC_ISY, ROMDEC_IERR, ROMDEC_IARG, ROMDEC_ISEC, ROMDEC_IBUF, | ||
47 | ROMDEC_IREADY, | ||
48 | |||
44 | FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, | 49 | FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, |
50 | |||
51 | SDHI3, SDHI0, SDHI1, | ||
52 | |||
45 | RTC_ARM, RTC_PRD, RTC_CUP, | 53 | RTC_ARM, RTC_PRD, RTC_CUP, |
46 | RCAN0_ERS, RCAN0_OVR, RCAN0_RM0, RCAN0_RM1, RCAN0_SLE, | 54 | RCAN0_ERS, RCAN0_OVR, RCAN0_RM0, RCAN0_RM1, RCAN0_SLE, |
47 | RCAN1_ERS, RCAN1_OVR, RCAN1_RM0, RCAN1_RM1, RCAN1_SLE, | 55 | RCAN1_ERS, RCAN1_OVR, RCAN1_RM0, RCAN1_RM1, RCAN1_SLE, |
48 | 56 | ||
57 | SRC_OVF, SRC_ODFI, SRC_IDEI, IEBI, | ||
58 | |||
49 | /* interrupt groups */ | 59 | /* interrupt groups */ |
50 | PINT, DMAC0, DMAC1, DMAC2, DMAC3, DMAC4, DMAC5, DMAC6, DMAC7, | 60 | PINT, DMAC0, DMAC1, DMAC2, DMAC3, DMAC4, DMAC5, DMAC6, DMAC7, |
51 | MTU0_ABCD, MTU0_VEF, MTU1_AB, MTU1_VU, MTU2_AB, MTU2_VU, | 61 | MTU0_ABCD, MTU0_VEF, MTU1_AB, MTU1_VU, MTU2_AB, MTU2_VU, |
52 | MTU3_ABCD, MTU4_ABCD, | 62 | MTU3_ABCD, MTU4_ABCD, |
53 | IIC30, IIC31, IIC32, IIC33, SCIF0, SCIF1, SCIF2, SCIF3, | 63 | IIC30, IIC31, IIC32, IIC33, SCIF0, SCIF1, SCIF2, SCIF3, |
54 | SSU0, SSU1, FLCTL, RTC, RCAN0, RCAN1 | 64 | SSU0, SSU1, ROMDEC, SDHI, FLCTL, RTC, RCAN0, RCAN1, SRC |
55 | }; | 65 | }; |
56 | 66 | ||
57 | static struct intc_vect vectors[] __initdata = { | 67 | static struct intc_vect vectors[] __initdata = { |
@@ -125,6 +135,20 @@ static struct intc_vect vectors[] __initdata = { | |||
125 | INTC_IRQ(RCAN1_ERS, 239), INTC_IRQ(RCAN1_OVR, 240), | 135 | INTC_IRQ(RCAN1_ERS, 239), INTC_IRQ(RCAN1_OVR, 240), |
126 | INTC_IRQ(RCAN1_RM0, 241), INTC_IRQ(RCAN1_RM1, 242), | 136 | INTC_IRQ(RCAN1_RM0, 241), INTC_IRQ(RCAN1_RM1, 242), |
127 | INTC_IRQ(RCAN1_SLE, 243), | 137 | INTC_IRQ(RCAN1_SLE, 243), |
138 | |||
139 | /* SH7263-specific trash */ | ||
140 | #ifdef CONFIG_CPU_SUBTYPE_SH7263 | ||
141 | INTC_IRQ(ROMDEC_ISY, 218), INTC_IRQ(ROMDEC_IERR, 219), | ||
142 | INTC_IRQ(ROMDEC_IARG, 220), INTC_IRQ(ROMDEC_ISEC, 221), | ||
143 | INTC_IRQ(ROMDEC_IBUF, 222), INTC_IRQ(ROMDEC_IREADY, 223), | ||
144 | |||
145 | INTC_IRQ(SDHI3, 228), INTC_IRQ(SDHI0, 229), INTC_IRQ(SDHI1, 230), | ||
146 | |||
147 | INTC_IRQ(SRC_OVF, 244), INTC_IRQ(SRC_ODFI, 245), | ||
148 | INTC_IRQ(SRC_IDEI, 246), | ||
149 | |||
150 | INTC_IRQ(IEBI, 247), | ||
151 | #endif | ||
128 | }; | 152 | }; |
129 | 153 | ||
130 | static struct intc_group groups[] __initdata = { | 154 | static struct intc_group groups[] __initdata = { |
@@ -167,6 +191,13 @@ static struct intc_group groups[] __initdata = { | |||
167 | RCAN0_SLE), | 191 | RCAN0_SLE), |
168 | INTC_GROUP(RCAN1, RCAN1_ERS, RCAN1_OVR, RCAN1_RM0, RCAN1_RM1, | 192 | INTC_GROUP(RCAN1, RCAN1_ERS, RCAN1_OVR, RCAN1_RM0, RCAN1_RM1, |
169 | RCAN1_SLE), | 193 | RCAN1_SLE), |
194 | |||
195 | #ifdef CONFIG_CPU_SUBTYPE_SH7263 | ||
196 | INTC_GROUP(ROMDEC, ROMDEC_ISY, ROMDEC_IERR, ROMDEC_IARG, | ||
197 | ROMDEC_ISEC, ROMDEC_IBUF, ROMDEC_IREADY), | ||
198 | INTC_GROUP(SDHI, SDHI3, SDHI0, SDHI1), | ||
199 | INTC_GROUP(SRC, SRC_OVF, SRC_ODFI, SRC_IDEI), | ||
200 | #endif | ||
170 | }; | 201 | }; |
171 | 202 | ||
172 | static struct intc_prio_reg prio_registers[] __initdata = { | 203 | static struct intc_prio_reg prio_registers[] __initdata = { |
@@ -184,10 +215,17 @@ static struct intc_prio_reg prio_registers[] __initdata = { | |||
184 | { 0xfffe0c0c, 0, 16, 4, /* IPR12 */ { ADC_ADI, IIC30, IIC31, IIC32 } }, | 215 | { 0xfffe0c0c, 0, 16, 4, /* IPR12 */ { ADC_ADI, IIC30, IIC31, IIC32 } }, |
185 | { 0xfffe0c0e, 0, 16, 4, /* IPR13 */ { IIC33, SCIF0, SCIF1, SCIF2 } }, | 216 | { 0xfffe0c0e, 0, 16, 4, /* IPR13 */ { IIC33, SCIF0, SCIF1, SCIF2 } }, |
186 | { 0xfffe0c10, 0, 16, 4, /* IPR14 */ { SCIF3, SSU0, SSU1, SSI0_SSII } }, | 217 | { 0xfffe0c10, 0, 16, 4, /* IPR14 */ { SCIF3, SSU0, SSU1, SSI0_SSII } }, |
218 | #ifdef CONFIG_CPU_SUBTYPE_SH7203 | ||
187 | { 0xfffe0c12, 0, 16, 4, /* IPR15 */ { SSI1_SSII, SSI2_SSII, | 219 | { 0xfffe0c12, 0, 16, 4, /* IPR15 */ { SSI1_SSII, SSI2_SSII, |
188 | SSI3_SSII, 0 } }, | 220 | SSI3_SSII, 0 } }, |
189 | { 0xfffe0c14, 0, 16, 4, /* IPR16 */ { FLCTL, 0, RTC, RCAN0 } }, | 221 | { 0xfffe0c14, 0, 16, 4, /* IPR16 */ { FLCTL, 0, RTC, RCAN0 } }, |
190 | { 0xfffe0c16, 0, 16, 4, /* IPR17 */ { RCAN1, 0, 0, 0 } }, | 222 | { 0xfffe0c16, 0, 16, 4, /* IPR17 */ { RCAN1, 0, 0, 0 } }, |
223 | #else | ||
224 | { 0xfffe0c12, 0, 16, 4, /* IPR15 */ { SSI1_SSII, SSI2_SSII, | ||
225 | SSI3_SSII, ROMDEC } }, | ||
226 | { 0xfffe0c14, 0, 16, 4, /* IPR16 */ { FLCTL, SDHI, RTC, RCAN0 } }, | ||
227 | { 0xfffe0c16, 0, 16, 4, /* IPR17 */ { RCAN1, SRC, IEBI, 0 } }, | ||
228 | #endif | ||
191 | }; | 229 | }; |
192 | 230 | ||
193 | static struct intc_mask_reg mask_registers[] __initdata = { | 231 | static struct intc_mask_reg mask_registers[] __initdata = { |
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index c5a453fb19ca..6891cc93548e 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c | |||
@@ -294,7 +294,7 @@ void __init setup_arch(char **cmdline_p) | |||
294 | } | 294 | } |
295 | 295 | ||
296 | static const char *cpu_name[] = { | 296 | static const char *cpu_name[] = { |
297 | [CPU_SH7203] = "SH7203", | 297 | [CPU_SH7203] = "SH7203", [CPU_SH7263] = "SH7263", |
298 | [CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619", | 298 | [CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619", |
299 | [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706", | 299 | [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706", |
300 | [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708", | 300 | [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708", |
diff --git a/arch/sh/kernel/timers/timer-cmt.c b/arch/sh/kernel/timers/timer-cmt.c index 4828a53d81ea..499e07beebe2 100644 --- a/arch/sh/kernel/timers/timer-cmt.c +++ b/arch/sh/kernel/timers/timer-cmt.c | |||
@@ -31,7 +31,9 @@ | |||
31 | #define cmt_clock_enable() do { ctrl_outb(ctrl_inb(STBCR3) & ~0x10, STBCR3); } while(0) | 31 | #define cmt_clock_enable() do { ctrl_outb(ctrl_inb(STBCR3) & ~0x10, STBCR3); } while(0) |
32 | #define CMT_CMCSR_INIT 0x0040 | 32 | #define CMT_CMCSR_INIT 0x0040 |
33 | #define CMT_CMCSR_CALIB 0x0000 | 33 | #define CMT_CMCSR_CALIB 0x0000 |
34 | #elif defined(CONFIG_CPU_SUBTYPE_SH7203) || defined(CONFIG_CPU_SUBTYPE_SH7206) | 34 | #elif defined(CONFIG_CPU_SUBTYPE_SH7203) || \ |
35 | defined(CONFIG_CPU_SUBTYPE_SH7206) || \ | ||
36 | defined(CONFIG_CPU_SUBTYPE_SH7263) | ||
35 | #define CMT_CMSTR 0xfffec000 | 37 | #define CMT_CMSTR 0xfffec000 |
36 | #define CMT_CMCSR_0 0xfffec002 | 38 | #define CMT_CMCSR_0 0xfffec002 |
37 | #define CMT_CMCNT_0 0xfffec004 | 39 | #define CMT_CMCNT_0 0xfffec004 |
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index cde06a481829..0187dccfe8c1 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h | |||
@@ -143,7 +143,8 @@ | |||
143 | # define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | 143 | # define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ |
144 | # define SCIF_ONLY | 144 | # define SCIF_ONLY |
145 | #elif defined(CONFIG_CPU_SUBTYPE_SH7203) || \ | 145 | #elif defined(CONFIG_CPU_SUBTYPE_SH7203) || \ |
146 | defined(CONFIG_CPU_SUBTYPE_SH7206) | 146 | defined(CONFIG_CPU_SUBTYPE_SH7206) || \ |
147 | defined(CONFIG_CPU_SUBTYPE_SH7263) | ||
147 | # define SCSPTR0 0xfffe8020 /* 16 bit SCIF */ | 148 | # define SCSPTR0 0xfffe8020 /* 16 bit SCIF */ |
148 | # define SCSPTR1 0xfffe8820 /* 16 bit SCIF */ | 149 | # define SCSPTR1 0xfffe8820 /* 16 bit SCIF */ |
149 | # define SCSPTR2 0xfffe9020 /* 16 bit SCIF */ | 150 | # define SCSPTR2 0xfffe9020 /* 16 bit SCIF */ |
@@ -619,7 +620,8 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
619 | return 1; | 620 | return 1; |
620 | } | 621 | } |
621 | #elif defined(CONFIG_CPU_SUBTYPE_SH7203) || \ | 622 | #elif defined(CONFIG_CPU_SUBTYPE_SH7203) || \ |
622 | defined(CONFIG_CPU_SUBTYPE_SH7206) | 623 | defined(CONFIG_CPU_SUBTYPE_SH7206) || \ |
624 | defined(CONFIG_CPU_SUBTYPE_SH7263) | ||
623 | static inline int sci_rxd_in(struct uart_port *port) | 625 | static inline int sci_rxd_in(struct uart_port *port) |
624 | { | 626 | { |
625 | if (port->mapbase == 0xfffe8000) | 627 | if (port->mapbase == 0xfffe8000) |
diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h index 94149c8a759c..9ce67fd51190 100644 --- a/include/asm-sh/bugs.h +++ b/include/asm-sh/bugs.h | |||
@@ -25,7 +25,7 @@ static void __init check_bugs(void) | |||
25 | case CPU_SH7619: | 25 | case CPU_SH7619: |
26 | *p++ = '2'; | 26 | *p++ = '2'; |
27 | break; | 27 | break; |
28 | case CPU_SH7203 ... CPU_SH7206: | 28 | case CPU_SH7203 ... CPU_SH7263: |
29 | *p++ = '2'; | 29 | *p++ = '2'; |
30 | *p++ = 'a'; | 30 | *p++ = 'a'; |
31 | break; | 31 | break; |
diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index 70f083f07d71..bbbdaab8de5f 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h | |||
@@ -17,7 +17,7 @@ enum cpu_type { | |||
17 | CPU_SH7619, | 17 | CPU_SH7619, |
18 | 18 | ||
19 | /* SH-2A types */ | 19 | /* SH-2A types */ |
20 | CPU_SH7203, CPU_SH7206, | 20 | CPU_SH7203, CPU_SH7206, CPU_SH7263, |
21 | 21 | ||
22 | /* SH-3 types */ | 22 | /* SH-3 types */ |
23 | CPU_SH7705, CPU_SH7706, CPU_SH7707, | 23 | CPU_SH7705, CPU_SH7706, CPU_SH7707, |