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-rw-r--r--Documentation/cachetlb.txt27
-rw-r--r--include/asm-alpha/tlbflush.h11
-rw-r--r--include/asm-arm/tlbflush.h5
-rw-r--r--include/asm-avr32/tlbflush.h7
-rw-r--r--include/asm-blackfin/tlbflush.h6
-rw-r--r--include/asm-cris/tlbflush.h7
-rw-r--r--include/asm-frv/tlbflush.h2
-rw-r--r--include/asm-h8300/tlbflush.h6
-rw-r--r--include/asm-ia64/tlbflush.h13
-rw-r--r--include/asm-m32r/tlbflush.h3
-rw-r--r--include/asm-m68k/tlbflush.h10
-rw-r--r--include/asm-m68knommu/tlbflush.h6
-rw-r--r--include/asm-mips/tlbflush.h7
-rw-r--r--include/asm-parisc/tlbflush.h4
-rw-r--r--include/asm-powerpc/tlbflush.h11
-rw-r--r--include/asm-s390/tlbflush.h7
-rw-r--r--include/asm-sh/tlbflush.h6
-rw-r--r--include/asm-sh64/tlbflush.h4
-rw-r--r--include/asm-sparc/tlbflush.h6
-rw-r--r--include/asm-sparc64/tlbflush.h7
-rw-r--r--include/asm-um/tlbflush.h6
-rw-r--r--include/asm-v850/tlbflush.h6
-rw-r--r--include/asm-x86/tlbflush_32.h7
-rw-r--r--include/asm-x86/tlbflush_64.h9
-rw-r--r--include/asm-xtensa/tlbflush.h11
-rw-r--r--mm/memory.c3
26 files changed, 2 insertions, 195 deletions
diff --git a/Documentation/cachetlb.txt b/Documentation/cachetlb.txt
index 552cabac0608..da42ab414c48 100644
--- a/Documentation/cachetlb.txt
+++ b/Documentation/cachetlb.txt
@@ -87,30 +87,7 @@ changes occur:
87 87
88 This is used primarily during fault processing. 88 This is used primarily during fault processing.
89 89
905) void flush_tlb_pgtables(struct mm_struct *mm, 905) void update_mmu_cache(struct vm_area_struct *vma,
91 unsigned long start, unsigned long end)
92
93 The software page tables for address space 'mm' for virtual
94 addresses in the range 'start' to 'end-1' are being torn down.
95
96 Some platforms cache the lowest level of the software page tables
97 in a linear virtually mapped array, to make TLB miss processing
98 more efficient. On such platforms, since the TLB is caching the
99 software page table structure, it needs to be flushed when parts
100 of the software page table tree are unlinked/freed.
101
102 Sparc64 is one example of a platform which does this.
103
104 Usually, when munmap()'ing an area of user virtual address
105 space, the kernel leaves the page table parts around and just
106 marks the individual pte's as invalid. However, if very large
107 portions of the address space are unmapped, the kernel frees up
108 those portions of the software page tables to prevent potential
109 excessive kernel memory usage caused by erratic mmap/mmunmap
110 sequences. It is at these times that flush_tlb_pgtables will
111 be invoked.
112
1136) void update_mmu_cache(struct vm_area_struct *vma,
114 unsigned long address, pte_t pte) 91 unsigned long address, pte_t pte)
115 92
116 At the end of every page fault, this routine is invoked to 93 At the end of every page fault, this routine is invoked to
@@ -123,7 +100,7 @@ changes occur:
123 translations for software managed TLB configurations. 100 translations for software managed TLB configurations.
124 The sparc64 port currently does this. 101 The sparc64 port currently does this.
125 102
1267) void tlb_migrate_finish(struct mm_struct *mm) 1036) void tlb_migrate_finish(struct mm_struct *mm)
127 104
128 This interface is called at the end of an explicit 105 This interface is called at the end of an explicit
129 process migration. This interface provides a hook 106 process migration. This interface provides a hook
diff --git a/include/asm-alpha/tlbflush.h b/include/asm-alpha/tlbflush.h
index 1ca3ed3bd6d3..eefab3fb51ae 100644
--- a/include/asm-alpha/tlbflush.h
+++ b/include/asm-alpha/tlbflush.h
@@ -92,17 +92,6 @@ flush_tlb_other(struct mm_struct *mm)
92 if (*mmc) *mmc = 0; 92 if (*mmc) *mmc = 0;
93} 93}
94 94
95/* Flush a specified range of user mapping page tables from TLB.
96 Although Alpha uses VPTE caches, this can be a nop, as Alpha does
97 not have finegrained tlb flushing, so it will flush VPTE stuff
98 during next flush_tlb_range. */
99
100static inline void
101flush_tlb_pgtables(struct mm_struct *mm, unsigned long start,
102 unsigned long end)
103{
104}
105
106#ifndef CONFIG_SMP 95#ifndef CONFIG_SMP
107/* Flush everything (kernel mapping may also have changed 96/* Flush everything (kernel mapping may also have changed
108 due to vmalloc/vfree). */ 97 due to vmalloc/vfree). */
diff --git a/include/asm-arm/tlbflush.h b/include/asm-arm/tlbflush.h
index 71be4fded7e2..8c6bc1bb9d1a 100644
--- a/include/asm-arm/tlbflush.h
+++ b/include/asm-arm/tlbflush.h
@@ -463,11 +463,6 @@ extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
463 */ 463 */
464extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte); 464extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte);
465 465
466/*
467 * ARM processors do not cache TLB tables in RAM.
468 */
469#define flush_tlb_pgtables(mm,start,end) do { } while (0)
470
471#endif 466#endif
472 467
473#endif /* CONFIG_MMU */ 468#endif /* CONFIG_MMU */
diff --git a/include/asm-avr32/tlbflush.h b/include/asm-avr32/tlbflush.h
index 730e268f81f3..5bc7c88a5770 100644
--- a/include/asm-avr32/tlbflush.h
+++ b/include/asm-avr32/tlbflush.h
@@ -19,7 +19,6 @@
19 * - flush_tlb_page(vma, vmaddr) flushes one page 19 * - flush_tlb_page(vma, vmaddr) flushes one page
20 * - flush_tlb_range(vma, start, end) flushes a range of pages 20 * - flush_tlb_range(vma, start, end) flushes a range of pages
21 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages 21 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
22 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
23 */ 22 */
24extern void flush_tlb(void); 23extern void flush_tlb(void);
25extern void flush_tlb_all(void); 24extern void flush_tlb_all(void);
@@ -29,12 +28,6 @@ extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
29extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long page); 28extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long page);
30extern void __flush_tlb_page(unsigned long asid, unsigned long page); 29extern void __flush_tlb_page(unsigned long asid, unsigned long page);
31 30
32static inline void flush_tlb_pgtables(struct mm_struct *mm,
33 unsigned long start, unsigned long end)
34{
35 /* Nothing to do */
36}
37
38extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); 31extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
39 32
40#endif /* __ASM_AVR32_TLBFLUSH_H */ 33#endif /* __ASM_AVR32_TLBFLUSH_H */
diff --git a/include/asm-blackfin/tlbflush.h b/include/asm-blackfin/tlbflush.h
index 10a07ba1e011..277b400924b8 100644
--- a/include/asm-blackfin/tlbflush.h
+++ b/include/asm-blackfin/tlbflush.h
@@ -53,10 +53,4 @@ static inline void flush_tlb_kernel_page(unsigned long addr)
53 BUG(); 53 BUG();
54} 54}
55 55
56static inline void flush_tlb_pgtables(struct mm_struct *mm,
57 unsigned long start, unsigned long end)
58{
59 BUG();
60}
61
62#endif 56#endif
diff --git a/include/asm-cris/tlbflush.h b/include/asm-cris/tlbflush.h
index 0569612477e3..20697e7ef4f2 100644
--- a/include/asm-cris/tlbflush.h
+++ b/include/asm-cris/tlbflush.h
@@ -38,13 +38,6 @@ static inline void flush_tlb_range(struct vm_area_struct * vma, unsigned long st
38 flush_tlb_mm(vma->vm_mm); 38 flush_tlb_mm(vma->vm_mm);
39} 39}
40 40
41static inline void flush_tlb_pgtables(struct mm_struct *mm,
42 unsigned long start, unsigned long end)
43{
44 /* CRIS does not keep any page table caches in TLB */
45}
46
47
48static inline void flush_tlb(void) 41static inline void flush_tlb(void)
49{ 42{
50 flush_tlb_mm(current->mm); 43 flush_tlb_mm(current->mm);
diff --git a/include/asm-frv/tlbflush.h b/include/asm-frv/tlbflush.h
index 8370f97e41ee..7ac5eafc5d98 100644
--- a/include/asm-frv/tlbflush.h
+++ b/include/asm-frv/tlbflush.h
@@ -57,7 +57,6 @@ do { \
57#define __flush_tlb_global() flush_tlb_all() 57#define __flush_tlb_global() flush_tlb_all()
58#define flush_tlb() flush_tlb_all() 58#define flush_tlb() flush_tlb_all()
59#define flush_tlb_kernel_range(start, end) flush_tlb_all() 59#define flush_tlb_kernel_range(start, end) flush_tlb_all()
60#define flush_tlb_pgtables(mm,start,end) do { } while(0)
61 60
62#else 61#else
63 62
@@ -66,7 +65,6 @@ do { \
66#define flush_tlb_mm(mm) BUG() 65#define flush_tlb_mm(mm) BUG()
67#define flush_tlb_page(vma,addr) BUG() 66#define flush_tlb_page(vma,addr) BUG()
68#define flush_tlb_range(mm,start,end) BUG() 67#define flush_tlb_range(mm,start,end) BUG()
69#define flush_tlb_pgtables(mm,start,end) BUG()
70#define flush_tlb_kernel_range(start, end) BUG() 68#define flush_tlb_kernel_range(start, end) BUG()
71 69
72#endif 70#endif
diff --git a/include/asm-h8300/tlbflush.h b/include/asm-h8300/tlbflush.h
index 9a2c5c9fd700..41c148a9208e 100644
--- a/include/asm-h8300/tlbflush.h
+++ b/include/asm-h8300/tlbflush.h
@@ -52,10 +52,4 @@ static inline void flush_tlb_kernel_page(unsigned long addr)
52 BUG(); 52 BUG();
53} 53}
54 54
55static inline void flush_tlb_pgtables(struct mm_struct *mm,
56 unsigned long start, unsigned long end)
57{
58 BUG();
59}
60
61#endif /* _H8300_TLBFLUSH_H */ 55#endif /* _H8300_TLBFLUSH_H */
diff --git a/include/asm-ia64/tlbflush.h b/include/asm-ia64/tlbflush.h
index e37f9fbf33af..80bcb0a38e8a 100644
--- a/include/asm-ia64/tlbflush.h
+++ b/include/asm-ia64/tlbflush.h
@@ -84,19 +84,6 @@ flush_tlb_page (struct vm_area_struct *vma, unsigned long addr)
84} 84}
85 85
86/* 86/*
87 * Flush the TLB entries mapping the virtually mapped linear page
88 * table corresponding to address range [START-END).
89 */
90static inline void
91flush_tlb_pgtables (struct mm_struct *mm, unsigned long start, unsigned long end)
92{
93 /*
94 * Deprecated. The virtual page table is now flushed via the normal gather/flush
95 * interface (see tlb.h).
96 */
97}
98
99/*
100 * Flush the local TLB. Invoked from another cpu using an IPI. 87 * Flush the local TLB. Invoked from another cpu using an IPI.
101 */ 88 */
102#ifdef CONFIG_SMP 89#ifdef CONFIG_SMP
diff --git a/include/asm-m32r/tlbflush.h b/include/asm-m32r/tlbflush.h
index 3d37ac002bcc..0ef95307784e 100644
--- a/include/asm-m32r/tlbflush.h
+++ b/include/asm-m32r/tlbflush.h
@@ -12,7 +12,6 @@
12 * - flush_tlb_page(vma, vmaddr) flushes one page 12 * - flush_tlb_page(vma, vmaddr) flushes one page
13 * - flush_tlb_range(vma, start, end) flushes a range of pages 13 * - flush_tlb_range(vma, start, end) flushes a range of pages
14 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages 14 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
15 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
16 */ 15 */
17 16
18extern void local_flush_tlb_all(void); 17extern void local_flush_tlb_all(void);
@@ -93,8 +92,6 @@ static __inline__ void __flush_tlb_all(void)
93 ); 92 );
94} 93}
95 94
96#define flush_tlb_pgtables(mm, start, end) do { } while (0)
97
98extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t); 95extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
99 96
100#endif /* _ASM_M32R_TLBFLUSH_H */ 97#endif /* _ASM_M32R_TLBFLUSH_H */
diff --git a/include/asm-m68k/tlbflush.h b/include/asm-m68k/tlbflush.h
index 31678831ee47..17707ec315e2 100644
--- a/include/asm-m68k/tlbflush.h
+++ b/include/asm-m68k/tlbflush.h
@@ -92,11 +92,6 @@ static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end
92 flush_tlb_all(); 92 flush_tlb_all();
93} 93}
94 94
95static inline void flush_tlb_pgtables(struct mm_struct *mm,
96 unsigned long start, unsigned long end)
97{
98}
99
100#else 95#else
101 96
102 97
@@ -219,11 +214,6 @@ static inline void flush_tlb_kernel_page (unsigned long addr)
219 sun3_put_segmap (addr & ~(SUN3_PMEG_SIZE - 1), SUN3_INVALID_PMEG); 214 sun3_put_segmap (addr & ~(SUN3_PMEG_SIZE - 1), SUN3_INVALID_PMEG);
220} 215}
221 216
222static inline void flush_tlb_pgtables(struct mm_struct *mm,
223 unsigned long start, unsigned long end)
224{
225}
226
227#endif 217#endif
228 218
229#endif /* _M68K_TLBFLUSH_H */ 219#endif /* _M68K_TLBFLUSH_H */
diff --git a/include/asm-m68knommu/tlbflush.h b/include/asm-m68knommu/tlbflush.h
index de858db28b00..a470cfb803eb 100644
--- a/include/asm-m68knommu/tlbflush.h
+++ b/include/asm-m68knommu/tlbflush.h
@@ -52,10 +52,4 @@ static inline void flush_tlb_kernel_page(unsigned long addr)
52 BUG(); 52 BUG();
53} 53}
54 54
55static inline void flush_tlb_pgtables(struct mm_struct *mm,
56 unsigned long start, unsigned long end)
57{
58 BUG();
59}
60
61#endif /* _M68KNOMMU_TLBFLUSH_H */ 55#endif /* _M68KNOMMU_TLBFLUSH_H */
diff --git a/include/asm-mips/tlbflush.h b/include/asm-mips/tlbflush.h
index 730e841fb08a..86b21de12e91 100644
--- a/include/asm-mips/tlbflush.h
+++ b/include/asm-mips/tlbflush.h
@@ -11,7 +11,6 @@
11 * - flush_tlb_page(vma, vmaddr) flushes one page 11 * - flush_tlb_page(vma, vmaddr) flushes one page
12 * - flush_tlb_range(vma, start, end) flushes a range of pages 12 * - flush_tlb_range(vma, start, end) flushes a range of pages
13 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages 13 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
14 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
15 */ 14 */
16extern void local_flush_tlb_all(void); 15extern void local_flush_tlb_all(void);
17extern void local_flush_tlb_mm(struct mm_struct *mm); 16extern void local_flush_tlb_mm(struct mm_struct *mm);
@@ -45,10 +44,4 @@ extern void flush_tlb_one(unsigned long vaddr);
45 44
46#endif /* CONFIG_SMP */ 45#endif /* CONFIG_SMP */
47 46
48static inline void flush_tlb_pgtables(struct mm_struct *mm,
49 unsigned long start, unsigned long end)
50{
51 /* Nothing to do on MIPS. */
52}
53
54#endif /* __ASM_TLBFLUSH_H */ 47#endif /* __ASM_TLBFLUSH_H */
diff --git a/include/asm-parisc/tlbflush.h b/include/asm-parisc/tlbflush.h
index 270cf309772b..b72ec66db699 100644
--- a/include/asm-parisc/tlbflush.h
+++ b/include/asm-parisc/tlbflush.h
@@ -57,10 +57,6 @@ static inline void flush_tlb_mm(struct mm_struct *mm)
57#endif 57#endif
58} 58}
59 59
60extern __inline__ void flush_tlb_pgtables(struct mm_struct *mm, unsigned long start, unsigned long end)
61{
62}
63
64static inline void flush_tlb_page(struct vm_area_struct *vma, 60static inline void flush_tlb_page(struct vm_area_struct *vma,
65 unsigned long addr) 61 unsigned long addr)
66{ 62{
diff --git a/include/asm-powerpc/tlbflush.h b/include/asm-powerpc/tlbflush.h
index a022f806bb21..b6b036ccee34 100644
--- a/include/asm-powerpc/tlbflush.h
+++ b/include/asm-powerpc/tlbflush.h
@@ -8,7 +8,6 @@
8 * - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB 8 * - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB
9 * - flush_tlb_range(vma, start, end) flushes a range of pages 9 * - flush_tlb_range(vma, start, end) flushes a range of pages
10 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages 10 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
11 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
12 * 11 *
13 * This program is free software; you can redistribute it and/or 12 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License 13 * modify it under the terms of the GNU General Public License
@@ -174,15 +173,5 @@ extern void __flush_hash_table_range(struct mm_struct *mm, unsigned long start,
174 */ 173 */
175extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t); 174extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
176 175
177/*
178 * This is called in munmap when we have freed up some page-table
179 * pages. We don't need to do anything here, there's nothing special
180 * about our page-table pages. -- paulus
181 */
182static inline void flush_tlb_pgtables(struct mm_struct *mm,
183 unsigned long start, unsigned long end)
184{
185}
186
187#endif /*__KERNEL__ */ 176#endif /*__KERNEL__ */
188#endif /* _ASM_POWERPC_TLBFLUSH_H */ 177#endif /* _ASM_POWERPC_TLBFLUSH_H */
diff --git a/include/asm-s390/tlbflush.h b/include/asm-s390/tlbflush.h
index 66793f55c8b2..6de2632a3e4f 100644
--- a/include/asm-s390/tlbflush.h
+++ b/include/asm-s390/tlbflush.h
@@ -14,7 +14,6 @@
14 * - flush_tlb_page(vma, vmaddr) flushes one page 14 * - flush_tlb_page(vma, vmaddr) flushes one page
15 * - flush_tlb_range(vma, start, end) flushes a range of pages 15 * - flush_tlb_range(vma, start, end) flushes a range of pages
16 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages 16 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
17 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
18 */ 17 */
19 18
20/* 19/*
@@ -152,10 +151,4 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,
152 151
153#endif 152#endif
154 153
155static inline void flush_tlb_pgtables(struct mm_struct *mm,
156 unsigned long start, unsigned long end)
157{
158 /* S/390 does not keep any page table caches in TLB */
159}
160
161#endif /* _S390_TLBFLUSH_H */ 154#endif /* _S390_TLBFLUSH_H */
diff --git a/include/asm-sh/tlbflush.h b/include/asm-sh/tlbflush.h
index 455fb8da441e..e0ac97221ae6 100644
--- a/include/asm-sh/tlbflush.h
+++ b/include/asm-sh/tlbflush.h
@@ -9,7 +9,6 @@
9 * - flush_tlb_page(vma, vmaddr) flushes one page 9 * - flush_tlb_page(vma, vmaddr) flushes one page
10 * - flush_tlb_range(vma, start, end) flushes a range of pages 10 * - flush_tlb_range(vma, start, end) flushes a range of pages
11 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages 11 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
12 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
13 */ 12 */
14extern void local_flush_tlb_all(void); 13extern void local_flush_tlb_all(void);
15extern void local_flush_tlb_mm(struct mm_struct *mm); 14extern void local_flush_tlb_mm(struct mm_struct *mm);
@@ -47,9 +46,4 @@ extern void flush_tlb_one(unsigned long asid, unsigned long page);
47 46
48#endif /* CONFIG_SMP */ 47#endif /* CONFIG_SMP */
49 48
50static inline void flush_tlb_pgtables(struct mm_struct *mm,
51 unsigned long start, unsigned long end)
52{
53 /* Nothing to do */
54}
55#endif /* __ASM_SH_TLBFLUSH_H */ 49#endif /* __ASM_SH_TLBFLUSH_H */
diff --git a/include/asm-sh64/tlbflush.h b/include/asm-sh64/tlbflush.h
index e45beadc29ee..16a164a23754 100644
--- a/include/asm-sh64/tlbflush.h
+++ b/include/asm-sh64/tlbflush.h
@@ -20,10 +20,6 @@ extern void flush_tlb_mm(struct mm_struct *mm);
20extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, 20extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
21 unsigned long end); 21 unsigned long end);
22extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long page); 22extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long page);
23static inline void flush_tlb_pgtables(struct mm_struct *mm,
24 unsigned long start, unsigned long end)
25{
26}
27 23
28extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); 24extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
29 25
diff --git a/include/asm-sparc/tlbflush.h b/include/asm-sparc/tlbflush.h
index a619da5cfaa9..b957e29d2ae1 100644
--- a/include/asm-sparc/tlbflush.h
+++ b/include/asm-sparc/tlbflush.h
@@ -13,7 +13,6 @@
13 * - flush_tlb_page(vma, vmaddr) flushes one page 13 * - flush_tlb_page(vma, vmaddr) flushes one page
14 * - flush_tlb_range(vma, start, end) flushes a range of pages 14 * - flush_tlb_range(vma, start, end) flushes a range of pages
15 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages 15 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
16 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
17 */ 16 */
18 17
19#ifdef CONFIG_SMP 18#ifdef CONFIG_SMP
@@ -42,11 +41,6 @@ BTFIXUPDEF_CALL(void, flush_tlb_mm, struct mm_struct *)
42BTFIXUPDEF_CALL(void, flush_tlb_range, struct vm_area_struct *, unsigned long, unsigned long) 41BTFIXUPDEF_CALL(void, flush_tlb_range, struct vm_area_struct *, unsigned long, unsigned long)
43BTFIXUPDEF_CALL(void, flush_tlb_page, struct vm_area_struct *, unsigned long) 42BTFIXUPDEF_CALL(void, flush_tlb_page, struct vm_area_struct *, unsigned long)
44 43
45// Thanks to Anton Blanchard, our pagetables became uncached in 2.4. Wee!
46// extern void flush_tlb_pgtables(struct mm_struct *mm,
47// unsigned long start, unsigned long end);
48#define flush_tlb_pgtables(mm, start, end) do{ }while(0)
49
50#define flush_tlb_all() BTFIXUP_CALL(flush_tlb_all)() 44#define flush_tlb_all() BTFIXUP_CALL(flush_tlb_all)()
51#define flush_tlb_mm(mm) BTFIXUP_CALL(flush_tlb_mm)(mm) 45#define flush_tlb_mm(mm) BTFIXUP_CALL(flush_tlb_mm)(mm)
52#define flush_tlb_range(vma,start,end) BTFIXUP_CALL(flush_tlb_range)(vma,start,end) 46#define flush_tlb_range(vma,start,end) BTFIXUP_CALL(flush_tlb_range)(vma,start,end)
diff --git a/include/asm-sparc64/tlbflush.h b/include/asm-sparc64/tlbflush.h
index 3487328570ed..fbb675dbe0c9 100644
--- a/include/asm-sparc64/tlbflush.h
+++ b/include/asm-sparc64/tlbflush.h
@@ -41,11 +41,4 @@ do { flush_tsb_kernel_range(start,end); \
41 41
42#endif /* ! CONFIG_SMP */ 42#endif /* ! CONFIG_SMP */
43 43
44static inline void flush_tlb_pgtables(struct mm_struct *mm, unsigned long start, unsigned long end)
45{
46 /* We don't use virtual page tables for TLB miss processing
47 * any more. Nowadays we use the TSB.
48 */
49}
50
51#endif /* _SPARC64_TLBFLUSH_H */ 44#endif /* _SPARC64_TLBFLUSH_H */
diff --git a/include/asm-um/tlbflush.h b/include/asm-um/tlbflush.h
index 9d647c55350b..614f2c091178 100644
--- a/include/asm-um/tlbflush.h
+++ b/include/asm-um/tlbflush.h
@@ -17,7 +17,6 @@
17 * - flush_tlb_page(vma, vmaddr) flushes one page 17 * - flush_tlb_page(vma, vmaddr) flushes one page
18 * - flush_tlb_kernel_vm() flushes the kernel vm area 18 * - flush_tlb_kernel_vm() flushes the kernel vm area
19 * - flush_tlb_range(vma, start, end) flushes a range of pages 19 * - flush_tlb_range(vma, start, end) flushes a range of pages
20 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
21 */ 20 */
22 21
23extern void flush_tlb_all(void); 22extern void flush_tlb_all(void);
@@ -29,9 +28,4 @@ extern void flush_tlb_kernel_vm(void);
29extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); 28extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
30extern void __flush_tlb_one(unsigned long addr); 29extern void __flush_tlb_one(unsigned long addr);
31 30
32static inline void flush_tlb_pgtables(struct mm_struct *mm,
33 unsigned long start, unsigned long end)
34{
35}
36
37#endif 31#endif
diff --git a/include/asm-v850/tlbflush.h b/include/asm-v850/tlbflush.h
index 5f2f85f636ea..c44aa64449c8 100644
--- a/include/asm-v850/tlbflush.h
+++ b/include/asm-v850/tlbflush.h
@@ -61,10 +61,4 @@ static inline void flush_tlb_kernel_page(unsigned long addr)
61 BUG (); 61 BUG ();
62} 62}
63 63
64static inline void flush_tlb_pgtables(struct mm_struct *mm,
65 unsigned long start, unsigned long end)
66{
67 BUG ();
68}
69
70#endif /* __V850_TLBFLUSH_H__ */ 64#endif /* __V850_TLBFLUSH_H__ */
diff --git a/include/asm-x86/tlbflush_32.h b/include/asm-x86/tlbflush_32.h
index a50fa6741486..2bd5b95e2048 100644
--- a/include/asm-x86/tlbflush_32.h
+++ b/include/asm-x86/tlbflush_32.h
@@ -78,7 +78,6 @@
78 * - flush_tlb_page(vma, vmaddr) flushes one page 78 * - flush_tlb_page(vma, vmaddr) flushes one page
79 * - flush_tlb_range(vma, start, end) flushes a range of pages 79 * - flush_tlb_range(vma, start, end) flushes a range of pages
80 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages 80 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
81 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
82 * - flush_tlb_others(cpumask, mm, va) flushes a TLBs on other cpus 81 * - flush_tlb_others(cpumask, mm, va) flushes a TLBs on other cpus
83 * 82 *
84 * ..but the i386 has somewhat limited tlb flushing capabilities, 83 * ..but the i386 has somewhat limited tlb flushing capabilities,
@@ -166,10 +165,4 @@ static inline void flush_tlb_kernel_range(unsigned long start,
166 flush_tlb_all(); 165 flush_tlb_all();
167} 166}
168 167
169static inline void flush_tlb_pgtables(struct mm_struct *mm,
170 unsigned long start, unsigned long end)
171{
172 /* i386 does not keep any page table caches in TLB */
173}
174
175#endif /* _I386_TLBFLUSH_H */ 168#endif /* _I386_TLBFLUSH_H */
diff --git a/include/asm-x86/tlbflush_64.h b/include/asm-x86/tlbflush_64.h
index 888eb4abdd07..7731fd23d572 100644
--- a/include/asm-x86/tlbflush_64.h
+++ b/include/asm-x86/tlbflush_64.h
@@ -31,7 +31,6 @@ static inline void __flush_tlb_all(void)
31 * - flush_tlb_page(vma, vmaddr) flushes one page 31 * - flush_tlb_page(vma, vmaddr) flushes one page
32 * - flush_tlb_range(vma, start, end) flushes a range of pages 32 * - flush_tlb_range(vma, start, end) flushes a range of pages
33 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages 33 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
34 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
35 * 34 *
36 * x86-64 can only flush individual pages or full VMs. For a range flush 35 * x86-64 can only flush individual pages or full VMs. For a range flush
37 * we always do the full VM. Might be worth trying if for a small 36 * we always do the full VM. Might be worth trying if for a small
@@ -98,12 +97,4 @@ static inline void flush_tlb_kernel_range(unsigned long start,
98 flush_tlb_all(); 97 flush_tlb_all();
99} 98}
100 99
101static inline void flush_tlb_pgtables(struct mm_struct *mm,
102 unsigned long start, unsigned long end)
103{
104 /* x86_64 does not keep any page table caches in a software TLB.
105 The CPUs do in their hardware TLBs, but they are handled
106 by the normal TLB flushing algorithms. */
107}
108
109#endif /* _X8664_TLBFLUSH_H */ 100#endif /* _X8664_TLBFLUSH_H */
diff --git a/include/asm-xtensa/tlbflush.h b/include/asm-xtensa/tlbflush.h
index 7c637b3c352c..46d240074f74 100644
--- a/include/asm-xtensa/tlbflush.h
+++ b/include/asm-xtensa/tlbflush.h
@@ -41,17 +41,6 @@ extern void flush_tlb_range(struct vm_area_struct*,unsigned long,unsigned long);
41 41
42#define flush_tlb_kernel_range(start,end) flush_tlb_all() 42#define flush_tlb_kernel_range(start,end) flush_tlb_all()
43 43
44
45/* This is calld in munmap when we have freed up some page-table pages.
46 * We don't need to do anything here, there's nothing special about our
47 * page-table pages.
48 */
49
50static inline void flush_tlb_pgtables(struct mm_struct *mm,
51 unsigned long start, unsigned long end)
52{
53}
54
55/* TLB operations. */ 44/* TLB operations. */
56 45
57static inline unsigned long itlb_probe(unsigned long addr) 46static inline unsigned long itlb_probe(unsigned long addr)
diff --git a/mm/memory.c b/mm/memory.c
index bd16dcaeefb8..142683df8755 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -259,9 +259,6 @@ void free_pgd_range(struct mmu_gather **tlb,
259 continue; 259 continue;
260 free_pud_range(*tlb, pgd, addr, next, floor, ceiling); 260 free_pud_range(*tlb, pgd, addr, next, floor, ceiling);
261 } while (pgd++, addr = next, addr != end); 261 } while (pgd++, addr = next, addr != end);
262
263 if (!(*tlb)->fullmm)
264 flush_tlb_pgtables((*tlb)->mm, start, end);
265} 262}
266 263
267void free_pgtables(struct mmu_gather **tlb, struct vm_area_struct *vma, 264void free_pgtables(struct mmu_gather **tlb, struct vm_area_struct *vma,