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-rw-r--r--arch/blackfin/kernel/gptimers.c2
-rw-r--r--arch/blackfin/lib/outs.S2
-rw-r--r--arch/blackfin/mach-bf527/boards/ezkit.c4
-rw-r--r--arch/blackfin/mach-bf537/boards/Makefile2
-rw-r--r--arch/blackfin/mach-bf537/boards/led.S183
-rw-r--r--arch/blackfin/mach-bf548/boards/Makefile2
-rw-r--r--arch/blackfin/mach-bf548/boards/cm_bf548.c2
-rw-r--r--arch/blackfin/mach-bf548/boards/led.S172
-rw-r--r--drivers/serial/8250.c4
-rw-r--r--drivers/serial/8250.h5
-rw-r--r--include/asm-blackfin/bfin-global.h7
-rw-r--r--include/asm-blackfin/mach-bf527/anomaly.h5
-rw-r--r--include/asm-blackfin/mach-bf533/anomaly.h31
-rw-r--r--include/asm-blackfin/mach-bf537/anomaly.h10
-rw-r--r--include/asm-blackfin/mach-bf548/anomaly.h2
-rw-r--r--include/asm-blackfin/mach-bf561/anomaly.h2
16 files changed, 35 insertions, 400 deletions
diff --git a/arch/blackfin/kernel/gptimers.c b/arch/blackfin/kernel/gptimers.c
index e698554895a7..3a3e9615b002 100644
--- a/arch/blackfin/kernel/gptimers.c
+++ b/arch/blackfin/kernel/gptimers.c
@@ -10,8 +10,8 @@
10 10
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/module.h> 12#include <linux/module.h>
13#include <linux/io.h>
13 14
14#include <asm/io.h>
15#include <asm/blackfin.h> 15#include <asm/blackfin.h>
16#include <asm/gptimers.h> 16#include <asm/gptimers.h>
17 17
diff --git a/arch/blackfin/lib/outs.S b/arch/blackfin/lib/outs.S
index 3daf96035bf6..4685b7aa0080 100644
--- a/arch/blackfin/lib/outs.S
+++ b/arch/blackfin/lib/outs.S
@@ -76,4 +76,4 @@ ENTRY(_outsw_8)
76 R0 = R0 + R1; 76 R0 = R0 + R1;
77.Lword8_loop_e: W[P0] = R0; 77.Lword8_loop_e: W[P0] = R0;
78 RTS; 78 RTS;
79ENDPROC(_outsw) 79ENDPROC(_outsw_8)
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index bb6d58c931de..fa4f4e833e84 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -647,10 +647,10 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
647 { 647 {
648 .modalias = "ad7877", 648 .modalias = "ad7877",
649 .platform_data = &bfin_ad7877_ts_info, 649 .platform_data = &bfin_ad7877_ts_info,
650 .irq = IRQ_PF6, 650 .irq = IRQ_PF8,
651 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ 651 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
652 .bus_num = 0, 652 .bus_num = 0,
653 .chip_select = 1, 653 .chip_select = 2,
654 .controller_data = &spi_ad7877_chip_info, 654 .controller_data = &spi_ad7877_chip_info,
655 }, 655 },
656#endif 656#endif
diff --git a/arch/blackfin/mach-bf537/boards/Makefile b/arch/blackfin/mach-bf537/boards/Makefile
index 87e450f29e37..c94f7a5b8211 100644
--- a/arch/blackfin/mach-bf537/boards/Makefile
+++ b/arch/blackfin/mach-bf537/boards/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5obj-$(CONFIG_GENERIC_BF537_BOARD) += generic_board.o 5obj-$(CONFIG_GENERIC_BF537_BOARD) += generic_board.o
6obj-$(CONFIG_BFIN537_STAMP) += stamp.o led.o 6obj-$(CONFIG_BFIN537_STAMP) += stamp.o
7obj-$(CONFIG_BFIN537_BLUETECHNIX_CM) += cm_bf537.o 7obj-$(CONFIG_BFIN537_BLUETECHNIX_CM) += cm_bf537.o
8obj-$(CONFIG_PNAV10) += pnav10.o 8obj-$(CONFIG_PNAV10) += pnav10.o
9obj-$(CONFIG_CAMSIG_MINOTAUR) += minotaur.o 9obj-$(CONFIG_CAMSIG_MINOTAUR) += minotaur.o
diff --git a/arch/blackfin/mach-bf537/boards/led.S b/arch/blackfin/mach-bf537/boards/led.S
deleted file mode 100644
index 4e9ea4283e5f..000000000000
--- a/arch/blackfin/mach-bf537/boards/led.S
+++ /dev/null
@@ -1,183 +0,0 @@
1/****************************************************
2 * LED1 ---- PF6 LED2 ---- PF7 *
3 * LED3 ---- PF8 LED4 ---- PF9 *
4 * LED5 ---- PF10 LED6 ---- PF11 *
5 ****************************************************/
6
7#include <linux/linkage.h>
8#include <asm/blackfin.h>
9
10/* All functions in this file save the registers they uses.
11 So there is no need to save any registers before calling them. */
12
13 .text;
14
15/* Initialize LEDs. */
16
17ENTRY(_led_init)
18 LINK 12;
19 [--SP] = P0;
20 [--SP] = R0;
21 [--SP] = R1;
22 [--SP] = R2;
23 R1 = PF6|PF7|PF8|PF9|PF10|PF11 (Z);
24 R2 = ~R1;
25
26 P0.H = hi(PORTF_FER);
27 P0.L = lo(PORTF_FER);
28 R0 = W[P0](Z);
29 SSYNC;
30 R0 = R0 & R2;
31 W[P0] = R0.L;
32 SSYNC;
33
34 P0.H = hi(PORTFIO_DIR);
35 P0.L = lo(PORTFIO_DIR);
36 R0 = W[P0](Z);
37 SSYNC;
38 R0 = R0 | R1;
39 W[P0] = R0.L;
40 SSYNC;
41
42 P0.H = hi(PORTFIO_INEN);
43 P0.L = lo(PORTFIO_INEN);
44 R0 = W[P0](Z);
45 SSYNC;
46 R0 = R0 & R2;
47 W[P0] = R0.L;
48 SSYNC;
49
50 R2 = [SP++];
51 R1 = [SP++];
52 R0 = [SP++];
53 P0 = [SP++];
54 UNLINK;
55 RTS;
56 .size _led_init, .-_led_init
57
58/* Set one LED on. Leave other LEDs unchanged.
59 It expects the LED number passed through R0. */
60
61ENTRY(_led_on)
62 LINK 12;
63 [--SP] = P0;
64 [--SP] = R1;
65 CALL _led_init;
66 R1 = 1;
67 R0 += 5;
68 R1 <<= R0;
69 P0.H = hi(PORTFIO);
70 P0.L = lo(PORTFIO);
71 R0 = W[P0](Z);
72 SSYNC;
73 R0 = R0 | R1;
74 W[P0] = R0.L;
75 SSYNC;
76 R1 = [SP++];
77 P0 = [SP++];
78 UNLINK;
79 RTS;
80 .size _led_on, .-_led_on
81
82/* Set one LED off. Leave other LEDs unchanged. */
83
84ENTRY(_led_off)
85 LINK 12;
86 [--SP] = P0;
87 [--SP] = R1;
88 CALL _led_init;
89 R1 = 1;
90 R0 += 5;
91 R1 <<= R0;
92 R1 = ~R1;
93 P0.H = hi(PORTFIO);
94 P0.L = lo(PORTFIO);
95 R0 = W[P0](Z);
96 SSYNC;
97 R0 = R0 & R1;
98 W[P0] = R0.L;
99 SSYNC;
100 R1 = [SP++];
101 P0 = [SP++];
102 UNLINK;
103 RTS;
104 .size _led_off, .-_led_off
105
106/* Toggle one LED. Leave other LEDs unchanged. */
107
108ENTRY(_led_toggle)
109 LINK 12;
110 [--SP] = P0;
111 [--SP] = R1;
112 CALL _led_init;
113 R1 = 1;
114 R0 += 5;
115 R1 <<= R0;
116 P0.H = hi(PORTFIO);
117 P0.L = lo(PORTFIO);
118 R0 = W[P0](Z);
119 SSYNC;
120 R0 = R0 ^ R1;
121 W[P0] = R0.L;
122 SSYNC;
123 R1 = [SP++];
124 P0 = [SP++];
125 UNLINK;
126 RTS;
127 .size _led_toggle, .-_led_toggle
128
129/* Display the number using LEDs in binary format. */
130
131ENTRY(_led_disp_num)
132 LINK 12;
133 [--SP] = P0;
134 [--SP] = R1;
135 [--SP] = R2;
136 CALL _led_init;
137 R1 = 0x3f(X);
138 R0 = R0 & R1;
139 R2 = 6(X);
140 R0 <<= R2;
141 R1 <<= R2;
142 P0.H = hi(PORTFIO);
143 P0.L = lo(PORTFIO);
144 R2 = W[P0](Z);
145 SSYNC;
146 R1 = ~R1;
147 R2 = R2 & R1;
148 R2 = R2 | R0;
149 W[P0] = R2.L;
150 SSYNC;
151 R2 = [SP++];
152 R1 = [SP++];
153 P0 = [SP++];
154 UNLINK;
155 RTS;
156 .size _led_disp_num, .-_led_disp_num
157
158/* Toggle the number using LEDs in binary format. */
159
160ENTRY(_led_toggle_num)
161 LINK 12;
162 [--SP] = P0;
163 [--SP] = R1;
164 [--SP] = R2;
165 CALL _led_init;
166 R1 = 0x3f(X);
167 R0 = R0 & R1;
168 R1 = 6(X);
169 R0 <<= R1;
170 P0.H = hi(PORTFIO);
171 P0.L = lo(PORTFIO);
172 R1 = W[P0](Z);
173 SSYNC;
174 R1 = R1 ^ R0;
175 W[P0] = R1.L;
176 SSYNC;
177 R2 = [SP++];
178 R1 = [SP++];
179 P0 = [SP++];
180 UNLINK;
181 RTS;
182 .size _led_toggle_num, .-_led_toggle_num
183
diff --git a/arch/blackfin/mach-bf548/boards/Makefile b/arch/blackfin/mach-bf548/boards/Makefile
index eed161dd7845..319ef54c4221 100644
--- a/arch/blackfin/mach-bf548/boards/Makefile
+++ b/arch/blackfin/mach-bf548/boards/Makefile
@@ -2,5 +2,5 @@
2# arch/blackfin/mach-bf548/boards/Makefile 2# arch/blackfin/mach-bf548/boards/Makefile
3# 3#
4 4
5obj-$(CONFIG_BFIN548_EZKIT) += ezkit.o led.o 5obj-$(CONFIG_BFIN548_EZKIT) += ezkit.o
6obj-$(CONFIG_BFIN548_BLUETECHNIX_CM) += cm_bf548.o 6obj-$(CONFIG_BFIN548_BLUETECHNIX_CM) += cm_bf548.o
diff --git a/arch/blackfin/mach-bf548/boards/cm_bf548.c b/arch/blackfin/mach-bf548/boards/cm_bf548.c
index 3b74f96d3590..4f4ae8787edf 100644
--- a/arch/blackfin/mach-bf548/boards/cm_bf548.c
+++ b/arch/blackfin/mach-bf548/boards/cm_bf548.c
@@ -684,7 +684,7 @@ static struct platform_device *cm_bf548_devices[] __initdata = {
684 684
685static int __init cm_bf548_init(void) 685static int __init cm_bf548_init(void)
686{ 686{
687 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); 687 printk(KERN_INFO "%s(): registering device resources\n", __func__);
688 platform_add_devices(cm_bf548_devices, ARRAY_SIZE(cm_bf548_devices)); 688 platform_add_devices(cm_bf548_devices, ARRAY_SIZE(cm_bf548_devices));
689 689
690#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 690#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
diff --git a/arch/blackfin/mach-bf548/boards/led.S b/arch/blackfin/mach-bf548/boards/led.S
deleted file mode 100644
index f47daf3770d0..000000000000
--- a/arch/blackfin/mach-bf548/boards/led.S
+++ /dev/null
@@ -1,172 +0,0 @@
1/****************************************************
2 * LED1 ---- PG6 LED2 ---- PG7 *
3 * LED3 ---- PG8 LED4 ---- PG9 *
4 * LED5 ---- PG10 LED6 ---- PG11 *
5 ****************************************************/
6
7#include <linux/linkage.h>
8#include <asm/blackfin.h>
9
10/* All functions in this file save the registers they uses.
11 So there is no need to save any registers before calling them. */
12
13 .text;
14
15/* Initialize LEDs. */
16
17ENTRY(_led_init)
18 LINK 0;
19 [--SP] = P0;
20 [--SP] = R0;
21 [--SP] = R1;
22 [--SP] = R2;
23 R1 = (PG6|PG7|PG8|PG9|PG10|PG11)(Z);
24 R2 = ~R1;
25
26 P0.H = hi(PORTG_FER);
27 P0.L = lo(PORTG_FER);
28 R0 = W[P0](Z);
29 SSYNC;
30 R0 = R0 & R2;
31 W[P0] = R0.L;
32 SSYNC;
33
34 P0.H = hi(PORTG_DIR_SET);
35 P0.L = lo(PORTG_DIR_SET);
36 W[P0] = R1.L;
37 SSYNC;
38
39 P0.H = hi(PORTG_INEN);
40 P0.L = lo(PORTG_INEN);
41 R0 = W[P0](Z);
42 SSYNC;
43 R0 = R0 & R2;
44 W[P0] = R0.L;
45 SSYNC;
46
47 R2 = [SP++];
48 R1 = [SP++];
49 R0 = [SP++];
50 P0 = [SP++];
51 RTS;
52 .size _led_init, .-_led_init
53
54/* Set one LED on. Leave other LEDs unchanged.
55 It expects the LED number passed through R0. */
56
57ENTRY(_led_on)
58 LINK 0;
59 [--SP] = P0;
60 [--SP] = R1;
61 CALL _led_init;
62 R1 = 1;
63 R0 += 5;
64 R1 <<= R0;
65 P0.H = hi(PORTG_SET);
66 P0.L = lo(PORTG_SET);
67 W[P0] = R1.L;
68 SSYNC;
69 R1 = [SP++];
70 P0 = [SP++];
71 UNLINK;
72 RTS;
73 .size _led_on, .-_led_on
74
75/* Set one LED off. Leave other LEDs unchanged. */
76
77ENTRY(_led_off)
78 LINK 0;
79 [--SP] = P0;
80 [--SP] = R1;
81 CALL _led_init;
82 R1 = 1;
83 R0 += 5;
84 R1 <<= R0;
85 P0.H = hi(PORTG_CLEAR);
86 P0.L = lo(PORTG_CLEAR);
87 W[P0] = R1.L;
88 SSYNC;
89 R1 = [SP++];
90 P0 = [SP++];
91 UNLINK;
92 RTS;
93 .size _led_off, .-_led_off
94
95/* Toggle one LED. Leave other LEDs unchanged. */
96
97ENTRY(_led_toggle)
98 LINK 0;
99 [--SP] = P0;
100 [--SP] = R1;
101 CALL _led_init;
102 R1 = 1;
103 R0 += 5;
104 R1 <<= R0;
105 P0.H = hi(PORTG);
106 P0.L = lo(PORTG);
107 R0 = W[P0](Z);
108 SSYNC;
109 R0 = R0 ^ R1;
110 W[P0] = R0.L;
111 SSYNC;
112 R1 = [SP++];
113 P0 = [SP++];
114 UNLINK;
115 RTS;
116 .size _led_toggle, .-_led_toggle
117
118/* Display the number using LEDs in binary format. */
119
120ENTRY(_led_disp_num)
121 LINK 0;
122 [--SP] = P0;
123 [--SP] = R1;
124 [--SP] = R2;
125 CALL _led_init;
126 R1 = 0x3f(X);
127 R0 = R0 & R1;
128 R2 = 6(X);
129 R0 <<= R2;
130 R1 <<= R2;
131 P0.H = hi(PORTG);
132 P0.L = lo(PORTG);
133 R2 = W[P0](Z);
134 SSYNC;
135 R1 = ~R1;
136 R2 = R2 & R1;
137 R2 = R2 | R0;
138 W[P0] = R2.L;
139 SSYNC;
140 R2 = [SP++];
141 R1 = [SP++];
142 P0 = [SP++];
143 UNLINK;
144 RTS;
145 .size _led_disp_num, .-_led_disp_num
146
147/* Toggle the number using LEDs in binary format. */
148
149ENTRY(_led_toggle_num)
150 LINK 0;
151 [--SP] = P0;
152 [--SP] = R1;
153 [--SP] = R2;
154 CALL _led_init;
155 R1 = 0x3f(X);
156 R0 = R0 & R1;
157 R1 = 6(X);
158 R0 <<= R1;
159 P0.H = hi(PORTG);
160 P0.L = lo(PORTG);
161 R1 = W[P0](Z);
162 SSYNC;
163 R1 = R1 ^ R0;
164 W[P0] = R1.L;
165 SSYNC;
166 R2 = [SP++];
167 R1 = [SP++];
168 P0 = [SP++];
169 UNLINK;
170 RTS;
171 .size _led_toggle_num, .-_led_toggle_num
172
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index 1400ea6a2491..1bc00b721e9d 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -43,7 +43,6 @@
43 43
44#include <asm/io.h> 44#include <asm/io.h>
45#include <asm/irq.h> 45#include <asm/irq.h>
46#include <asm/serial.h>
47 46
48#include "8250.h" 47#include "8250.h"
49 48
@@ -93,6 +92,7 @@ static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;
93 */ 92 */
94#define CONFIG_HUB6 1 93#define CONFIG_HUB6 1
95 94
95#include <asm/serial.h>
96/* 96/*
97 * SERIAL_PORT_DFNS tells us about built-in ports that have no 97 * SERIAL_PORT_DFNS tells us about built-in ports that have no
98 * standard enumeration mechanism. Platforms that can find all 98 * standard enumeration mechanism. Platforms that can find all
@@ -1547,8 +1547,6 @@ static int serial_link_irq_chain(struct uart_8250_port *up)
1547 i->head = &up->list; 1547 i->head = &up->list;
1548 spin_unlock_irq(&i->lock); 1548 spin_unlock_irq(&i->lock);
1549 1549
1550 irq_flags |= SERIAL_EXTRA_IRQ_FLAGS;
1551
1552 ret = request_irq(up->port.irq, serial8250_interrupt, 1550 ret = request_irq(up->port.irq, serial8250_interrupt,
1553 irq_flags, "serial", i); 1551 irq_flags, "serial", i);
1554 if (ret < 0) 1552 if (ret < 0)
diff --git a/drivers/serial/8250.h b/drivers/serial/8250.h
index a10a40cc0d9e..91bd28f2bb47 100644
--- a/drivers/serial/8250.h
+++ b/drivers/serial/8250.h
@@ -78,8 +78,3 @@ struct serial8250_config {
78#else 78#else
79#define ALPHA_KLUDGE_MCR 0 79#define ALPHA_KLUDGE_MCR 0
80#endif 80#endif
81
82#ifndef SERIAL_EXTRA_IRQ_FLAGS
83#define SERIAL_EXTRA_IRQ_FLAGS 0
84#endif
85
diff --git a/include/asm-blackfin/bfin-global.h b/include/asm-blackfin/bfin-global.h
index a9248d883675..76033831eb35 100644
--- a/include/asm-blackfin/bfin-global.h
+++ b/include/asm-blackfin/bfin-global.h
@@ -105,13 +105,6 @@ extern int sram_free(const void*);
105extern void *sram_alloc_with_lsl(size_t, unsigned long); 105extern void *sram_alloc_with_lsl(size_t, unsigned long);
106extern int sram_free_with_lsl(const void*); 106extern int sram_free_with_lsl(const void*);
107 107
108extern void led_on(int);
109extern void led_off(int);
110extern void led_toggle(int);
111extern void led_disp_num(int);
112extern void led_toggle_num(int);
113extern void init_leds(void);
114
115extern const char bfin_board_name[]; 108extern const char bfin_board_name[];
116extern unsigned long wall_jiffies; 109extern unsigned long wall_jiffies;
117 110
diff --git a/include/asm-blackfin/mach-bf527/anomaly.h b/include/asm-blackfin/mach-bf527/anomaly.h
index 735fa02fafb2..4725268a5ada 100644
--- a/include/asm-blackfin/mach-bf527/anomaly.h
+++ b/include/asm-blackfin/mach-bf527/anomaly.h
@@ -15,12 +15,16 @@
15 15
16/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */ 16/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */
17#define ANOMALY_05000074 (1) 17#define ANOMALY_05000074 (1)
18/* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */
19#define ANOMALY_05000119 (1)
18/* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */ 20/* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */
19#define ANOMALY_05000122 (1) 21#define ANOMALY_05000122 (1)
20/* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */ 22/* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */
21#define ANOMALY_05000245 (1) 23#define ANOMALY_05000245 (1)
22/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ 24/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
23#define ANOMALY_05000265 (1) 25#define ANOMALY_05000265 (1)
26/* Errors when SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
27#define ANOMALY_05000312 (1)
24/* Incorrect Access of OTP_STATUS During otp_write() Function */ 28/* Incorrect Access of OTP_STATUS During otp_write() Function */
25#define ANOMALY_05000328 (1) 29#define ANOMALY_05000328 (1)
26/* Disallowed Configuration Prevents Subsequent Allowed Configuration on Host DMA Port */ 30/* Disallowed Configuration Prevents Subsequent Allowed Configuration on Host DMA Port */
@@ -92,7 +96,6 @@
92#define ANOMALY_05000266 (0) 96#define ANOMALY_05000266 (0)
93#define ANOMALY_05000273 (0) 97#define ANOMALY_05000273 (0)
94#define ANOMALY_05000311 (0) 98#define ANOMALY_05000311 (0)
95#define ANOMALY_05000312 (0)
96#define ANOMALY_05000323 (0) 99#define ANOMALY_05000323 (0)
97#define ANOMALY_05000363 (0) 100#define ANOMALY_05000363 (0)
98 101
diff --git a/include/asm-blackfin/mach-bf533/anomaly.h b/include/asm-blackfin/mach-bf533/anomaly.h
index 5a6dcc5fa36c..8f7ea112fd3a 100644
--- a/include/asm-blackfin/mach-bf533/anomaly.h
+++ b/include/asm-blackfin/mach-bf533/anomaly.h
@@ -2,7 +2,7 @@
2 * File: include/asm-blackfin/mach-bf533/anomaly.h 2 * File: include/asm-blackfin/mach-bf533/anomaly.h
3 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 * 4 *
5 * Copyright (C) 2004-2007 Analog Devices Inc. 5 * Copyright (C) 2004-2008 Analog Devices Inc.
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
8 8
@@ -176,6 +176,21 @@
176#define ANOMALY_05000315 (1) 176#define ANOMALY_05000315 (1)
177/* Internal Voltage Regulator Values of 1.05V, 1.10V and 1.15V Not Allowed for LQFP Packages */ 177/* Internal Voltage Regulator Values of 1.05V, 1.10V and 1.15V Not Allowed for LQFP Packages */
178#define ANOMALY_05000319 (ANOMALY_BF531 || ANOMALY_BF532) 178#define ANOMALY_05000319 (ANOMALY_BF531 || ANOMALY_BF532)
179/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */
180#define ANOMALY_05000357 (1)
181/* UART Break Signal Issues */
182#define ANOMALY_05000363 (__SILICON_REVISION__ < 5)
183/* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */
184#define ANOMALY_05000366 (1)
185/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
186#define ANOMALY_05000371 (1)
187/* PPI Does Not Start Properly In Specific Mode */
188#define ANOMALY_05000400 (__SILICON_REVISION__ >= 5)
189/* SSYNC Stalls Processor when Executed from Non-Cacheable Memory */
190#define ANOMALY_05000402 (__SILICON_REVISION__ >= 5)
191/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
192#define ANOMALY_05000403 (1)
193
179 194
180/* These anomalies have been "phased" out of analog.com anomaly sheets and are 195/* These anomalies have been "phased" out of analog.com anomaly sheets and are
181 * here to show running on older silicon just isn't feasible. 196 * here to show running on older silicon just isn't feasible.
@@ -249,20 +264,6 @@
249#define ANOMALY_05000192 (__SILICON_REVISION__ < 3) 264#define ANOMALY_05000192 (__SILICON_REVISION__ < 3)
250/* Internal Voltage Regulator may not start up */ 265/* Internal Voltage Regulator may not start up */
251#define ANOMALY_05000206 (__SILICON_REVISION__ < 3) 266#define ANOMALY_05000206 (__SILICON_REVISION__ < 3)
252/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */
253#define ANOMALY_05000357 (1)
254/* UART Break Signal Issues */
255#define ANOMALY_05000363 (__SILICON_REVISION__ < 5)
256/* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */
257#define ANOMALY_05000366 (1)
258/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
259#define ANOMALY_05000371 (1)
260/* PPI Does Not Start Properly In Specific Mode */
261#define ANOMALY_05000400 (__SILICON_REVISION__ == 5)
262/* SSYNC Stalls Processor when Executed from Non-Cacheable Memory */
263#define ANOMALY_05000402 (__SILICON_REVISION__ == 5)
264/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
265#define ANOMALY_05000403 (1)
266 267
267/* Anomalies that don't exist on this proc */ 268/* Anomalies that don't exist on this proc */
268#define ANOMALY_05000266 (0) 269#define ANOMALY_05000266 (0)
diff --git a/include/asm-blackfin/mach-bf537/anomaly.h b/include/asm-blackfin/mach-bf537/anomaly.h
index a6b08facb242..8460ab9c324f 100644
--- a/include/asm-blackfin/mach-bf537/anomaly.h
+++ b/include/asm-blackfin/mach-bf537/anomaly.h
@@ -2,7 +2,7 @@
2 * File: include/asm-blackfin/mach-bf537/anomaly.h 2 * File: include/asm-blackfin/mach-bf537/anomaly.h
3 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 * 4 *
5 * Copyright (C) 2004-2007 Analog Devices Inc. 5 * Copyright (C) 2004-2008 Analog Devices Inc.
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
8 8
@@ -132,8 +132,8 @@
132#define ANOMALY_05000322 (1) 132#define ANOMALY_05000322 (1)
133/* Ethernet MAC MDIO Reads Do Not Meet IEEE Specification */ 133/* Ethernet MAC MDIO Reads Do Not Meet IEEE Specification */
134#define ANOMALY_05000341 (__SILICON_REVISION__ >= 3) 134#define ANOMALY_05000341 (__SILICON_REVISION__ >= 3)
135/* New Feature: UART Remains Enabled after UART Boot (Not Available on Older Silicon) */ 135/* New Feature: UART Remains Enabled after UART Boot */
136#define ANOMALY_05000350 (__SILICON_REVISION__ < 3) 136#define ANOMALY_05000350 (__SILICON_REVISION__ >= 3)
137/* Regulator Programming Blocked when Hibernate Wakeup Source Remains Active */ 137/* Regulator Programming Blocked when Hibernate Wakeup Source Remains Active */
138#define ANOMALY_05000355 (1) 138#define ANOMALY_05000355 (1)
139/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */ 139/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */
@@ -145,12 +145,10 @@
145/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */ 145/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
146#define ANOMALY_05000371 (1) 146#define ANOMALY_05000371 (1)
147/* SSYNC Stalls Processor when Executed from Non-Cacheable Memory */ 147/* SSYNC Stalls Processor when Executed from Non-Cacheable Memory */
148#define ANOMALY_05000402 (__SILICON_REVISION__ >= 3) 148#define ANOMALY_05000402 (__SILICON_REVISION__ >= 5)
149/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */ 149/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
150#define ANOMALY_05000403 (1) 150#define ANOMALY_05000403 (1)
151 151
152
153
154/* Anomalies that don't exist on this proc */ 152/* Anomalies that don't exist on this proc */
155#define ANOMALY_05000125 (0) 153#define ANOMALY_05000125 (0)
156#define ANOMALY_05000158 (0) 154#define ANOMALY_05000158 (0)
diff --git a/include/asm-blackfin/mach-bf548/anomaly.h b/include/asm-blackfin/mach-bf548/anomaly.h
index 49d3cebc5293..3ad59655881a 100644
--- a/include/asm-blackfin/mach-bf548/anomaly.h
+++ b/include/asm-blackfin/mach-bf548/anomaly.h
@@ -75,6 +75,8 @@
75#define ANOMALY_05000365 (1) 75#define ANOMALY_05000365 (1)
76/* Addressing Conflict between Boot ROM and Asynchronous Memory */ 76/* Addressing Conflict between Boot ROM and Asynchronous Memory */
77#define ANOMALY_05000369 (1) 77#define ANOMALY_05000369 (1)
78/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
79#define ANOMALY_05000371 (1)
78/* Mobile DDR Operation Not Functional */ 80/* Mobile DDR Operation Not Functional */
79#define ANOMALY_05000377 (1) 81#define ANOMALY_05000377 (1)
80/* Security/Authentication Speedpath Causes Authentication To Fail To Initiate */ 82/* Security/Authentication Speedpath Causes Authentication To Fail To Initiate */
diff --git a/include/asm-blackfin/mach-bf561/anomaly.h b/include/asm-blackfin/mach-bf561/anomaly.h
index 82157caa96a2..5c5d7d7d695f 100644
--- a/include/asm-blackfin/mach-bf561/anomaly.h
+++ b/include/asm-blackfin/mach-bf561/anomaly.h
@@ -2,7 +2,7 @@
2 * File: include/asm-blackfin/mach-bf561/anomaly.h 2 * File: include/asm-blackfin/mach-bf561/anomaly.h
3 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 * 4 *
5 * Copyright (C) 2004-2007 Analog Devices Inc. 5 * Copyright (C) 2004-2008 Analog Devices Inc.
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
8 8
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-18 03:52:26 -0500