diff options
-rw-r--r-- | arch/arm/boot/compressed/Makefile | 3 | ||||
-rw-r--r-- | arch/arm/common/sa1111.c | 5 | ||||
-rw-r--r-- | arch/arm/include/asm/io.h | 50 | ||||
-rw-r--r-- | arch/arm/lib/csumpartialcopyuser.S | 2 | ||||
-rw-r--r-- | arch/arm/mach-realview/core.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-ux500/include/mach/uncompress.h | 10 | ||||
-rw-r--r-- | arch/arm/mach-vexpress/v2m.c | 2 | ||||
-rw-r--r-- | arch/arm/mm/cache-l2x0.c | 26 | ||||
-rw-r--r-- | arch/arm/mm/highmem.c | 13 | ||||
-rw-r--r-- | drivers/mmc/host/mmci.c | 8 | ||||
-rw-r--r-- | drivers/video/cyber2000fb.c | 3 |
11 files changed, 75 insertions, 49 deletions
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index 53faa9063a03..864a002137fe 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile | |||
@@ -71,6 +71,9 @@ targets := vmlinux vmlinux.lds \ | |||
71 | piggy.$(suffix_y) piggy.$(suffix_y).o \ | 71 | piggy.$(suffix_y) piggy.$(suffix_y).o \ |
72 | font.o font.c head.o misc.o $(OBJS) | 72 | font.o font.c head.o misc.o $(OBJS) |
73 | 73 | ||
74 | # Make sure files are removed during clean | ||
75 | extra-y += piggy.gzip piggy.lzo piggy.lzma lib1funcs.S | ||
76 | |||
74 | ifeq ($(CONFIG_FUNCTION_TRACER),y) | 77 | ifeq ($(CONFIG_FUNCTION_TRACER),y) |
75 | ORIG_CFLAGS := $(KBUILD_CFLAGS) | 78 | ORIG_CFLAGS := $(KBUILD_CFLAGS) |
76 | KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS)) | 79 | KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS)) |
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c index 6f80665f477e..9eaf65f43642 100644 --- a/arch/arm/common/sa1111.c +++ b/arch/arm/common/sa1111.c | |||
@@ -1028,13 +1028,12 @@ static int sa1111_remove(struct platform_device *pdev) | |||
1028 | struct sa1111 *sachip = platform_get_drvdata(pdev); | 1028 | struct sa1111 *sachip = platform_get_drvdata(pdev); |
1029 | 1029 | ||
1030 | if (sachip) { | 1030 | if (sachip) { |
1031 | __sa1111_remove(sachip); | ||
1032 | platform_set_drvdata(pdev, NULL); | ||
1033 | |||
1034 | #ifdef CONFIG_PM | 1031 | #ifdef CONFIG_PM |
1035 | kfree(sachip->saved_state); | 1032 | kfree(sachip->saved_state); |
1036 | sachip->saved_state = NULL; | 1033 | sachip->saved_state = NULL; |
1037 | #endif | 1034 | #endif |
1035 | __sa1111_remove(sachip); | ||
1036 | platform_set_drvdata(pdev, NULL); | ||
1038 | } | 1037 | } |
1039 | 1038 | ||
1040 | return 0; | 1039 | return 0; |
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index c980156f3263..1261b1f928d9 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/types.h> | 26 | #include <linux/types.h> |
27 | #include <asm/byteorder.h> | 27 | #include <asm/byteorder.h> |
28 | #include <asm/memory.h> | 28 | #include <asm/memory.h> |
29 | #include <asm/system.h> | ||
29 | 30 | ||
30 | /* | 31 | /* |
31 | * ISA I/O bus memory addresses are 1:1 with the physical address. | 32 | * ISA I/O bus memory addresses are 1:1 with the physical address. |
@@ -179,25 +180,38 @@ extern void _memset_io(volatile void __iomem *, int, size_t); | |||
179 | * IO port primitives for more information. | 180 | * IO port primitives for more information. |
180 | */ | 181 | */ |
181 | #ifdef __mem_pci | 182 | #ifdef __mem_pci |
182 | #define readb(c) ({ __u8 __v = __raw_readb(__mem_pci(c)); __v; }) | 183 | #define readb_relaxed(c) ({ u8 __v = __raw_readb(__mem_pci(c)); __v; }) |
183 | #define readw(c) ({ __u16 __v = le16_to_cpu((__force __le16) \ | 184 | #define readw_relaxed(c) ({ u16 __v = le16_to_cpu((__force __le16) \ |
184 | __raw_readw(__mem_pci(c))); __v; }) | 185 | __raw_readw(__mem_pci(c))); __v; }) |
185 | #define readl(c) ({ __u32 __v = le32_to_cpu((__force __le32) \ | 186 | #define readl_relaxed(c) ({ u32 __v = le32_to_cpu((__force __le32) \ |
186 | __raw_readl(__mem_pci(c))); __v; }) | 187 | __raw_readl(__mem_pci(c))); __v; }) |
187 | #define readb_relaxed(addr) readb(addr) | 188 | |
188 | #define readw_relaxed(addr) readw(addr) | 189 | #define writeb_relaxed(v,c) ((void)__raw_writeb(v,__mem_pci(c))) |
189 | #define readl_relaxed(addr) readl(addr) | 190 | #define writew_relaxed(v,c) ((void)__raw_writew((__force u16) \ |
191 | cpu_to_le16(v),__mem_pci(c))) | ||
192 | #define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \ | ||
193 | cpu_to_le32(v),__mem_pci(c))) | ||
194 | |||
195 | #ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE | ||
196 | #define __iormb() rmb() | ||
197 | #define __iowmb() wmb() | ||
198 | #else | ||
199 | #define __iormb() do { } while (0) | ||
200 | #define __iowmb() do { } while (0) | ||
201 | #endif | ||
202 | |||
203 | #define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; }) | ||
204 | #define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; }) | ||
205 | #define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; }) | ||
206 | |||
207 | #define writeb(v,c) ({ __iowmb(); writeb_relaxed(v,c); }) | ||
208 | #define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); }) | ||
209 | #define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); }) | ||
190 | 210 | ||
191 | #define readsb(p,d,l) __raw_readsb(__mem_pci(p),d,l) | 211 | #define readsb(p,d,l) __raw_readsb(__mem_pci(p),d,l) |
192 | #define readsw(p,d,l) __raw_readsw(__mem_pci(p),d,l) | 212 | #define readsw(p,d,l) __raw_readsw(__mem_pci(p),d,l) |
193 | #define readsl(p,d,l) __raw_readsl(__mem_pci(p),d,l) | 213 | #define readsl(p,d,l) __raw_readsl(__mem_pci(p),d,l) |
194 | 214 | ||
195 | #define writeb(v,c) __raw_writeb(v,__mem_pci(c)) | ||
196 | #define writew(v,c) __raw_writew((__force __u16) \ | ||
197 | cpu_to_le16(v),__mem_pci(c)) | ||
198 | #define writel(v,c) __raw_writel((__force __u32) \ | ||
199 | cpu_to_le32(v),__mem_pci(c)) | ||
200 | |||
201 | #define writesb(p,d,l) __raw_writesb(__mem_pci(p),d,l) | 215 | #define writesb(p,d,l) __raw_writesb(__mem_pci(p),d,l) |
202 | #define writesw(p,d,l) __raw_writesw(__mem_pci(p),d,l) | 216 | #define writesw(p,d,l) __raw_writesw(__mem_pci(p),d,l) |
203 | #define writesl(p,d,l) __raw_writesl(__mem_pci(p),d,l) | 217 | #define writesl(p,d,l) __raw_writesl(__mem_pci(p),d,l) |
@@ -244,13 +258,13 @@ extern void _memset_io(volatile void __iomem *, int, size_t); | |||
244 | * io{read,write}{8,16,32} macros | 258 | * io{read,write}{8,16,32} macros |
245 | */ | 259 | */ |
246 | #ifndef ioread8 | 260 | #ifndef ioread8 |
247 | #define ioread8(p) ({ unsigned int __v = __raw_readb(p); __v; }) | 261 | #define ioread8(p) ({ unsigned int __v = __raw_readb(p); __iormb(); __v; }) |
248 | #define ioread16(p) ({ unsigned int __v = le16_to_cpu((__force __le16)__raw_readw(p)); __v; }) | 262 | #define ioread16(p) ({ unsigned int __v = le16_to_cpu((__force __le16)__raw_readw(p)); __iormb(); __v; }) |
249 | #define ioread32(p) ({ unsigned int __v = le32_to_cpu((__force __le32)__raw_readl(p)); __v; }) | 263 | #define ioread32(p) ({ unsigned int __v = le32_to_cpu((__force __le32)__raw_readl(p)); __iormb(); __v; }) |
250 | 264 | ||
251 | #define iowrite8(v,p) __raw_writeb(v, p) | 265 | #define iowrite8(v,p) ({ __iowmb(); (void)__raw_writeb(v, p); }) |
252 | #define iowrite16(v,p) __raw_writew((__force __u16)cpu_to_le16(v), p) | 266 | #define iowrite16(v,p) ({ __iowmb(); (void)__raw_writew((__force __u16)cpu_to_le16(v), p); }) |
253 | #define iowrite32(v,p) __raw_writel((__force __u32)cpu_to_le32(v), p) | 267 | #define iowrite32(v,p) ({ __iowmb(); (void)__raw_writel((__force __u32)cpu_to_le32(v), p); }) |
254 | 268 | ||
255 | #define ioread8_rep(p,d,c) __raw_readsb(p,d,c) | 269 | #define ioread8_rep(p,d,c) __raw_readsb(p,d,c) |
256 | #define ioread16_rep(p,d,c) __raw_readsw(p,d,c) | 270 | #define ioread16_rep(p,d,c) __raw_readsw(p,d,c) |
diff --git a/arch/arm/lib/csumpartialcopyuser.S b/arch/arm/lib/csumpartialcopyuser.S index 59ff6fdc1e63..7d08b43d2c0e 100644 --- a/arch/arm/lib/csumpartialcopyuser.S +++ b/arch/arm/lib/csumpartialcopyuser.S | |||
@@ -71,7 +71,7 @@ | |||
71 | .pushsection .fixup,"ax" | 71 | .pushsection .fixup,"ax" |
72 | .align 4 | 72 | .align 4 |
73 | 9001: mov r4, #-EFAULT | 73 | 9001: mov r4, #-EFAULT |
74 | ldr r5, [fp, #4] @ *err_ptr | 74 | ldr r5, [sp, #8*4] @ *err_ptr |
75 | str r4, [r5] | 75 | str r4, [r5] |
76 | ldmia sp, {r1, r2} @ retrieve dst, len | 76 | ldmia sp, {r1, r2} @ retrieve dst, len |
77 | add r2, r2, r1 | 77 | add r2, r2, r1 |
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c index 595be19f8ad5..02e9fdeb8faf 100644 --- a/arch/arm/mach-realview/core.c +++ b/arch/arm/mach-realview/core.c | |||
@@ -237,7 +237,7 @@ static unsigned int realview_mmc_status(struct device *dev) | |||
237 | else | 237 | else |
238 | mask = 2; | 238 | mask = 2; |
239 | 239 | ||
240 | return !(readl(REALVIEW_SYSMCI) & mask); | 240 | return readl(REALVIEW_SYSMCI) & mask; |
241 | } | 241 | } |
242 | 242 | ||
243 | struct mmci_platform_data realview_mmc0_plat_data = { | 243 | struct mmci_platform_data realview_mmc0_plat_data = { |
diff --git a/arch/arm/mach-ux500/include/mach/uncompress.h b/arch/arm/mach-ux500/include/mach/uncompress.h index 8552eb188b50..0271ca0a83df 100644 --- a/arch/arm/mach-ux500/include/mach/uncompress.h +++ b/arch/arm/mach-ux500/include/mach/uncompress.h | |||
@@ -30,22 +30,22 @@ | |||
30 | static void putc(const char c) | 30 | static void putc(const char c) |
31 | { | 31 | { |
32 | /* Do nothing if the UART is not enabled. */ | 32 | /* Do nothing if the UART is not enabled. */ |
33 | if (!(readb(U8500_UART_CR) & 0x1)) | 33 | if (!(__raw_readb(U8500_UART_CR) & 0x1)) |
34 | return; | 34 | return; |
35 | 35 | ||
36 | if (c == '\n') | 36 | if (c == '\n') |
37 | putc('\r'); | 37 | putc('\r'); |
38 | 38 | ||
39 | while (readb(U8500_UART_FR) & (1 << 5)) | 39 | while (__raw_readb(U8500_UART_FR) & (1 << 5)) |
40 | barrier(); | 40 | barrier(); |
41 | writeb(c, U8500_UART_DR); | 41 | __raw_writeb(c, U8500_UART_DR); |
42 | } | 42 | } |
43 | 43 | ||
44 | static void flush(void) | 44 | static void flush(void) |
45 | { | 45 | { |
46 | if (!(readb(U8500_UART_CR) & 0x1)) | 46 | if (!(__raw_readb(U8500_UART_CR) & 0x1)) |
47 | return; | 47 | return; |
48 | while (readb(U8500_UART_FR) & (1 << 3)) | 48 | while (__raw_readb(U8500_UART_FR) & (1 << 3)) |
49 | barrier(); | 49 | barrier(); |
50 | } | 50 | } |
51 | 51 | ||
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c index d250711b8c7a..c84239761cb4 100644 --- a/arch/arm/mach-vexpress/v2m.c +++ b/arch/arm/mach-vexpress/v2m.c | |||
@@ -241,7 +241,7 @@ static struct platform_device v2m_flash_device = { | |||
241 | 241 | ||
242 | static unsigned int v2m_mmci_status(struct device *dev) | 242 | static unsigned int v2m_mmci_status(struct device *dev) |
243 | { | 243 | { |
244 | return !(readl(MMIO_P2V(V2M_SYS_MCI)) & (1 << 0)); | 244 | return readl(MMIO_P2V(V2M_SYS_MCI)) & (1 << 0); |
245 | } | 245 | } |
246 | 246 | ||
247 | static struct mmci_platform_data v2m_mmci_data = { | 247 | static struct mmci_platform_data v2m_mmci_data = { |
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index df4955885b21..9982eb385c0f 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c | |||
@@ -32,14 +32,14 @@ static uint32_t l2x0_way_mask; /* Bitmask of active ways */ | |||
32 | static inline void cache_wait(void __iomem *reg, unsigned long mask) | 32 | static inline void cache_wait(void __iomem *reg, unsigned long mask) |
33 | { | 33 | { |
34 | /* wait for the operation to complete */ | 34 | /* wait for the operation to complete */ |
35 | while (readl(reg) & mask) | 35 | while (readl_relaxed(reg) & mask) |
36 | ; | 36 | ; |
37 | } | 37 | } |
38 | 38 | ||
39 | static inline void cache_sync(void) | 39 | static inline void cache_sync(void) |
40 | { | 40 | { |
41 | void __iomem *base = l2x0_base; | 41 | void __iomem *base = l2x0_base; |
42 | writel(0, base + L2X0_CACHE_SYNC); | 42 | writel_relaxed(0, base + L2X0_CACHE_SYNC); |
43 | cache_wait(base + L2X0_CACHE_SYNC, 1); | 43 | cache_wait(base + L2X0_CACHE_SYNC, 1); |
44 | } | 44 | } |
45 | 45 | ||
@@ -47,14 +47,14 @@ static inline void l2x0_clean_line(unsigned long addr) | |||
47 | { | 47 | { |
48 | void __iomem *base = l2x0_base; | 48 | void __iomem *base = l2x0_base; |
49 | cache_wait(base + L2X0_CLEAN_LINE_PA, 1); | 49 | cache_wait(base + L2X0_CLEAN_LINE_PA, 1); |
50 | writel(addr, base + L2X0_CLEAN_LINE_PA); | 50 | writel_relaxed(addr, base + L2X0_CLEAN_LINE_PA); |
51 | } | 51 | } |
52 | 52 | ||
53 | static inline void l2x0_inv_line(unsigned long addr) | 53 | static inline void l2x0_inv_line(unsigned long addr) |
54 | { | 54 | { |
55 | void __iomem *base = l2x0_base; | 55 | void __iomem *base = l2x0_base; |
56 | cache_wait(base + L2X0_INV_LINE_PA, 1); | 56 | cache_wait(base + L2X0_INV_LINE_PA, 1); |
57 | writel(addr, base + L2X0_INV_LINE_PA); | 57 | writel_relaxed(addr, base + L2X0_INV_LINE_PA); |
58 | } | 58 | } |
59 | 59 | ||
60 | #ifdef CONFIG_PL310_ERRATA_588369 | 60 | #ifdef CONFIG_PL310_ERRATA_588369 |
@@ -75,9 +75,9 @@ static inline void l2x0_flush_line(unsigned long addr) | |||
75 | 75 | ||
76 | /* Clean by PA followed by Invalidate by PA */ | 76 | /* Clean by PA followed by Invalidate by PA */ |
77 | cache_wait(base + L2X0_CLEAN_LINE_PA, 1); | 77 | cache_wait(base + L2X0_CLEAN_LINE_PA, 1); |
78 | writel(addr, base + L2X0_CLEAN_LINE_PA); | 78 | writel_relaxed(addr, base + L2X0_CLEAN_LINE_PA); |
79 | cache_wait(base + L2X0_INV_LINE_PA, 1); | 79 | cache_wait(base + L2X0_INV_LINE_PA, 1); |
80 | writel(addr, base + L2X0_INV_LINE_PA); | 80 | writel_relaxed(addr, base + L2X0_INV_LINE_PA); |
81 | } | 81 | } |
82 | #else | 82 | #else |
83 | 83 | ||
@@ -90,7 +90,7 @@ static inline void l2x0_flush_line(unsigned long addr) | |||
90 | { | 90 | { |
91 | void __iomem *base = l2x0_base; | 91 | void __iomem *base = l2x0_base; |
92 | cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1); | 92 | cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1); |
93 | writel(addr, base + L2X0_CLEAN_INV_LINE_PA); | 93 | writel_relaxed(addr, base + L2X0_CLEAN_INV_LINE_PA); |
94 | } | 94 | } |
95 | #endif | 95 | #endif |
96 | 96 | ||
@@ -109,7 +109,7 @@ static inline void l2x0_inv_all(void) | |||
109 | 109 | ||
110 | /* invalidate all ways */ | 110 | /* invalidate all ways */ |
111 | spin_lock_irqsave(&l2x0_lock, flags); | 111 | spin_lock_irqsave(&l2x0_lock, flags); |
112 | writel(l2x0_way_mask, l2x0_base + L2X0_INV_WAY); | 112 | writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_INV_WAY); |
113 | cache_wait(l2x0_base + L2X0_INV_WAY, l2x0_way_mask); | 113 | cache_wait(l2x0_base + L2X0_INV_WAY, l2x0_way_mask); |
114 | cache_sync(); | 114 | cache_sync(); |
115 | spin_unlock_irqrestore(&l2x0_lock, flags); | 115 | spin_unlock_irqrestore(&l2x0_lock, flags); |
@@ -215,8 +215,8 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) | |||
215 | 215 | ||
216 | l2x0_base = base; | 216 | l2x0_base = base; |
217 | 217 | ||
218 | cache_id = readl(l2x0_base + L2X0_CACHE_ID); | 218 | cache_id = readl_relaxed(l2x0_base + L2X0_CACHE_ID); |
219 | aux = readl(l2x0_base + L2X0_AUX_CTRL); | 219 | aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL); |
220 | 220 | ||
221 | aux &= aux_mask; | 221 | aux &= aux_mask; |
222 | aux |= aux_val; | 222 | aux |= aux_val; |
@@ -248,15 +248,15 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) | |||
248 | * If you are booting from non-secure mode | 248 | * If you are booting from non-secure mode |
249 | * accessing the below registers will fault. | 249 | * accessing the below registers will fault. |
250 | */ | 250 | */ |
251 | if (!(readl(l2x0_base + L2X0_CTRL) & 1)) { | 251 | if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & 1)) { |
252 | 252 | ||
253 | /* l2x0 controller is disabled */ | 253 | /* l2x0 controller is disabled */ |
254 | writel(aux, l2x0_base + L2X0_AUX_CTRL); | 254 | writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL); |
255 | 255 | ||
256 | l2x0_inv_all(); | 256 | l2x0_inv_all(); |
257 | 257 | ||
258 | /* enable L2X0 */ | 258 | /* enable L2X0 */ |
259 | writel(1, l2x0_base + L2X0_CTRL); | 259 | writel_relaxed(1, l2x0_base + L2X0_CTRL); |
260 | } | 260 | } |
261 | 261 | ||
262 | outer_cache.inv_range = l2x0_inv_range; | 262 | outer_cache.inv_range = l2x0_inv_range; |
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c index 086816b205b8..6ab244062b4a 100644 --- a/arch/arm/mm/highmem.c +++ b/arch/arm/mm/highmem.c | |||
@@ -163,19 +163,22 @@ static DEFINE_PER_CPU(int, kmap_high_l1_vipt_depth); | |||
163 | 163 | ||
164 | void *kmap_high_l1_vipt(struct page *page, pte_t *saved_pte) | 164 | void *kmap_high_l1_vipt(struct page *page, pte_t *saved_pte) |
165 | { | 165 | { |
166 | unsigned int idx, cpu = smp_processor_id(); | 166 | unsigned int idx, cpu; |
167 | int *depth = &per_cpu(kmap_high_l1_vipt_depth, cpu); | 167 | int *depth; |
168 | unsigned long vaddr, flags; | 168 | unsigned long vaddr, flags; |
169 | pte_t pte, *ptep; | 169 | pte_t pte, *ptep; |
170 | 170 | ||
171 | if (!in_interrupt()) | ||
172 | preempt_disable(); | ||
173 | |||
174 | cpu = smp_processor_id(); | ||
175 | depth = &per_cpu(kmap_high_l1_vipt_depth, cpu); | ||
176 | |||
171 | idx = KM_L1_CACHE + KM_TYPE_NR * cpu; | 177 | idx = KM_L1_CACHE + KM_TYPE_NR * cpu; |
172 | vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); | 178 | vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); |
173 | ptep = TOP_PTE(vaddr); | 179 | ptep = TOP_PTE(vaddr); |
174 | pte = mk_pte(page, kmap_prot); | 180 | pte = mk_pte(page, kmap_prot); |
175 | 181 | ||
176 | if (!in_interrupt()) | ||
177 | preempt_disable(); | ||
178 | |||
179 | raw_local_irq_save(flags); | 182 | raw_local_irq_save(flags); |
180 | (*depth)++; | 183 | (*depth)++; |
181 | if (pte_val(*ptep) == pte_val(pte)) { | 184 | if (pte_val(*ptep) == pte_val(pte)) { |
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 4917af96bae1..2ed435bd4b6c 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c | |||
@@ -539,9 +539,13 @@ static int mmci_get_cd(struct mmc_host *mmc) | |||
539 | if (host->gpio_cd == -ENOSYS) | 539 | if (host->gpio_cd == -ENOSYS) |
540 | status = host->plat->status(mmc_dev(host->mmc)); | 540 | status = host->plat->status(mmc_dev(host->mmc)); |
541 | else | 541 | else |
542 | status = gpio_get_value(host->gpio_cd); | 542 | status = !gpio_get_value(host->gpio_cd); |
543 | 543 | ||
544 | return !status; | 544 | /* |
545 | * Use positive logic throughout - status is zero for no card, | ||
546 | * non-zero for card inserted. | ||
547 | */ | ||
548 | return status; | ||
545 | } | 549 | } |
546 | 550 | ||
547 | static const struct mmc_host_ops mmci_ops = { | 551 | static const struct mmc_host_ops mmci_ops = { |
diff --git a/drivers/video/cyber2000fb.c b/drivers/video/cyber2000fb.c index 3a561df2e8a2..0c1afd13ddd3 100644 --- a/drivers/video/cyber2000fb.c +++ b/drivers/video/cyber2000fb.c | |||
@@ -388,6 +388,7 @@ cyber2000fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | |||
388 | pseudo_val |= convert_bitfield(red, &var->red); | 388 | pseudo_val |= convert_bitfield(red, &var->red); |
389 | pseudo_val |= convert_bitfield(green, &var->green); | 389 | pseudo_val |= convert_bitfield(green, &var->green); |
390 | pseudo_val |= convert_bitfield(blue, &var->blue); | 390 | pseudo_val |= convert_bitfield(blue, &var->blue); |
391 | ret = 0; | ||
391 | break; | 392 | break; |
392 | } | 393 | } |
393 | 394 | ||
@@ -436,6 +437,8 @@ static void cyber2000fb_write_ramdac_ctrl(struct cfb_info *cfb) | |||
436 | cyber2000fb_writeb(i | 4, 0x3cf, cfb); | 437 | cyber2000fb_writeb(i | 4, 0x3cf, cfb); |
437 | cyber2000fb_writeb(val, 0x3c6, cfb); | 438 | cyber2000fb_writeb(val, 0x3c6, cfb); |
438 | cyber2000fb_writeb(i, 0x3cf, cfb); | 439 | cyber2000fb_writeb(i, 0x3cf, cfb); |
440 | /* prevent card lock-up observed on x86 with CyberPro 2000 */ | ||
441 | cyber2000fb_readb(0x3cf, cfb); | ||
439 | } | 442 | } |
440 | 443 | ||
441 | static void cyber2000fb_set_timing(struct cfb_info *cfb, struct par_info *hw) | 444 | static void cyber2000fb_set_timing(struct cfb_info *cfb, struct par_info *hw) |