diff options
-rw-r--r-- | drivers/net/bnx2x.h | 10 | ||||
-rw-r--r-- | drivers/net/bnx2x_hsi.h | 16 | ||||
-rw-r--r-- | drivers/net/bnx2x_init.h | 6 | ||||
-rw-r--r-- | drivers/net/bnx2x_link.h | 4 | ||||
-rw-r--r-- | drivers/net/bnx2x_main.c | 24 | ||||
-rw-r--r-- | drivers/net/bnx2x_reg.h | 18 |
6 files changed, 39 insertions, 39 deletions
diff --git a/drivers/net/bnx2x.h b/drivers/net/bnx2x.h index 80f5179d636c..33437e5bcec3 100644 --- a/drivers/net/bnx2x.h +++ b/drivers/net/bnx2x.h | |||
@@ -155,7 +155,7 @@ struct sw_rx_page { | |||
155 | #define NUM_RX_SGE_PAGES 2 | 155 | #define NUM_RX_SGE_PAGES 2 |
156 | #define RX_SGE_CNT (BCM_PAGE_SIZE / sizeof(struct eth_rx_sge)) | 156 | #define RX_SGE_CNT (BCM_PAGE_SIZE / sizeof(struct eth_rx_sge)) |
157 | #define MAX_RX_SGE_CNT (RX_SGE_CNT - 2) | 157 | #define MAX_RX_SGE_CNT (RX_SGE_CNT - 2) |
158 | /* RX_SGE_CNT is promissed to be a power of 2 */ | 158 | /* RX_SGE_CNT is promised to be a power of 2 */ |
159 | #define RX_SGE_MASK (RX_SGE_CNT - 1) | 159 | #define RX_SGE_MASK (RX_SGE_CNT - 1) |
160 | #define NUM_RX_SGE (RX_SGE_CNT * NUM_RX_SGE_PAGES) | 160 | #define NUM_RX_SGE (RX_SGE_CNT * NUM_RX_SGE_PAGES) |
161 | #define MAX_RX_SGE (NUM_RX_SGE - 1) | 161 | #define MAX_RX_SGE (NUM_RX_SGE - 1) |
@@ -317,7 +317,7 @@ struct bnx2x_fastpath { | |||
317 | #define RCQ_BD(x) ((x) & MAX_RCQ_BD) | 317 | #define RCQ_BD(x) ((x) & MAX_RCQ_BD) |
318 | 318 | ||
319 | 319 | ||
320 | /* This is needed for determening of last_max */ | 320 | /* This is needed for determining of last_max */ |
321 | #define SUB_S16(a, b) (s16)((s16)(a) - (s16)(b)) | 321 | #define SUB_S16(a, b) (s16)((s16)(a) - (s16)(b)) |
322 | 322 | ||
323 | #define __SGE_MASK_SET_BIT(el, bit) \ | 323 | #define __SGE_MASK_SET_BIT(el, bit) \ |
@@ -784,7 +784,7 @@ struct bnx2x { | |||
784 | u8 stats_pending; | 784 | u8 stats_pending; |
785 | u8 set_mac_pending; | 785 | u8 set_mac_pending; |
786 | 786 | ||
787 | /* End of fileds used in the performance code paths */ | 787 | /* End of fields used in the performance code paths */ |
788 | 788 | ||
789 | int panic; | 789 | int panic; |
790 | int msglevel; | 790 | int msglevel; |
@@ -1024,10 +1024,10 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, | |||
1024 | /* resolution of the rate shaping timer - 100 usec */ | 1024 | /* resolution of the rate shaping timer - 100 usec */ |
1025 | #define RS_PERIODIC_TIMEOUT_USEC 100 | 1025 | #define RS_PERIODIC_TIMEOUT_USEC 100 |
1026 | /* resolution of fairness algorithm in usecs - | 1026 | /* resolution of fairness algorithm in usecs - |
1027 | coefficient for clauclating the actuall t fair */ | 1027 | coefficient for calculating the actual t fair */ |
1028 | #define T_FAIR_COEF 10000000 | 1028 | #define T_FAIR_COEF 10000000 |
1029 | /* number of bytes in single QM arbitration cycle - | 1029 | /* number of bytes in single QM arbitration cycle - |
1030 | coeffiecnt for calculating the fairness timer */ | 1030 | coefficient for calculating the fairness timer */ |
1031 | #define QM_ARB_BYTES 40000 | 1031 | #define QM_ARB_BYTES 40000 |
1032 | #define FAIR_MEM 2 | 1032 | #define FAIR_MEM 2 |
1033 | 1033 | ||
diff --git a/drivers/net/bnx2x_hsi.h b/drivers/net/bnx2x_hsi.h index d3e8198d7dba..efd764427fa1 100644 --- a/drivers/net/bnx2x_hsi.h +++ b/drivers/net/bnx2x_hsi.h | |||
@@ -1268,7 +1268,7 @@ struct doorbell { | |||
1268 | 1268 | ||
1269 | 1269 | ||
1270 | /* | 1270 | /* |
1271 | * IGU driver acknowlegement register | 1271 | * IGU driver acknowledgement register |
1272 | */ | 1272 | */ |
1273 | struct igu_ack_register { | 1273 | struct igu_ack_register { |
1274 | #if defined(__BIG_ENDIAN) | 1274 | #if defined(__BIG_ENDIAN) |
@@ -1882,7 +1882,7 @@ struct timers_block_context { | |||
1882 | }; | 1882 | }; |
1883 | 1883 | ||
1884 | /* | 1884 | /* |
1885 | * structure for easy accessability to assembler | 1885 | * structure for easy accessibility to assembler |
1886 | */ | 1886 | */ |
1887 | struct eth_tx_bd_flags { | 1887 | struct eth_tx_bd_flags { |
1888 | u8 as_bitfield; | 1888 | u8 as_bitfield; |
@@ -2044,7 +2044,7 @@ struct eth_context { | |||
2044 | 2044 | ||
2045 | 2045 | ||
2046 | /* | 2046 | /* |
2047 | * ethernet doorbell | 2047 | * Ethernet doorbell |
2048 | */ | 2048 | */ |
2049 | struct eth_tx_doorbell { | 2049 | struct eth_tx_doorbell { |
2050 | #if defined(__BIG_ENDIAN) | 2050 | #if defined(__BIG_ENDIAN) |
@@ -2256,7 +2256,7 @@ struct ramrod_data { | |||
2256 | }; | 2256 | }; |
2257 | 2257 | ||
2258 | /* | 2258 | /* |
2259 | * union for ramrod data for ethernet protocol (CQE) (force size of 16 bits) | 2259 | * union for ramrod data for Ethernet protocol (CQE) (force size of 16 bits) |
2260 | */ | 2260 | */ |
2261 | union eth_ramrod_data { | 2261 | union eth_ramrod_data { |
2262 | struct ramrod_data general; | 2262 | struct ramrod_data general; |
@@ -2330,7 +2330,7 @@ struct spe_hdr { | |||
2330 | }; | 2330 | }; |
2331 | 2331 | ||
2332 | /* | 2332 | /* |
2333 | * ethernet slow path element | 2333 | * Ethernet slow path element |
2334 | */ | 2334 | */ |
2335 | union eth_specific_data { | 2335 | union eth_specific_data { |
2336 | u8 protocol_data[8]; | 2336 | u8 protocol_data[8]; |
@@ -2343,7 +2343,7 @@ union eth_specific_data { | |||
2343 | }; | 2343 | }; |
2344 | 2344 | ||
2345 | /* | 2345 | /* |
2346 | * ethernet slow path element | 2346 | * Ethernet slow path element |
2347 | */ | 2347 | */ |
2348 | struct eth_spe { | 2348 | struct eth_spe { |
2349 | struct spe_hdr hdr; | 2349 | struct spe_hdr hdr; |
@@ -2615,7 +2615,7 @@ struct tstorm_eth_rx_producers { | |||
2615 | 2615 | ||
2616 | 2616 | ||
2617 | /* | 2617 | /* |
2618 | * common flag to indicate existance of TPA. | 2618 | * common flag to indicate existence of TPA. |
2619 | */ | 2619 | */ |
2620 | struct tstorm_eth_tpa_exist { | 2620 | struct tstorm_eth_tpa_exist { |
2621 | #if defined(__BIG_ENDIAN) | 2621 | #if defined(__BIG_ENDIAN) |
@@ -2765,7 +2765,7 @@ struct tstorm_common_stats { | |||
2765 | }; | 2765 | }; |
2766 | 2766 | ||
2767 | /* | 2767 | /* |
2768 | * Eth statistics query sturcture for the eth_stats_quesry ramrod | 2768 | * Eth statistics query structure for the eth_stats_query ramrod |
2769 | */ | 2769 | */ |
2770 | struct eth_stats_query { | 2770 | struct eth_stats_query { |
2771 | struct xstorm_common_stats xstorm_common; | 2771 | struct xstorm_common_stats xstorm_common; |
diff --git a/drivers/net/bnx2x_init.h b/drivers/net/bnx2x_init.h index 4c7750789b62..f62891bf757f 100644 --- a/drivers/net/bnx2x_init.h +++ b/drivers/net/bnx2x_init.h | |||
@@ -208,7 +208,7 @@ static void bnx2x_init_wr_64(struct bnx2x *bp, u32 addr, const u32 *data, | |||
208 | /********************************************************* | 208 | /********************************************************* |
209 | There are different blobs for each PRAM section. | 209 | There are different blobs for each PRAM section. |
210 | In addition, each blob write operation is divided into a few operations | 210 | In addition, each blob write operation is divided into a few operations |
211 | in order to decrease the amount of phys. contigious buffer needed. | 211 | in order to decrease the amount of phys. contiguous buffer needed. |
212 | Thus, when we select a blob the address may be with some offset | 212 | Thus, when we select a blob the address may be with some offset |
213 | from the beginning of PRAM section. | 213 | from the beginning of PRAM section. |
214 | The same holds for the INT_TABLE sections. | 214 | The same holds for the INT_TABLE sections. |
@@ -336,7 +336,7 @@ static void bnx2x_init_block(struct bnx2x *bp, u32 op_start, u32 op_end) | |||
336 | len = op->str_wr.data_len; | 336 | len = op->str_wr.data_len; |
337 | data = data_base + op->str_wr.data_off; | 337 | data = data_base + op->str_wr.data_off; |
338 | 338 | ||
339 | /* carefull! it must be in order */ | 339 | /* careful! it must be in order */ |
340 | if (unlikely(op_type > OP_WB)) { | 340 | if (unlikely(op_type > OP_WB)) { |
341 | 341 | ||
342 | /* If E1 only */ | 342 | /* If E1 only */ |
@@ -740,7 +740,7 @@ static u8 calc_crc8(u32 data, u8 crc) | |||
740 | return crc_res; | 740 | return crc_res; |
741 | } | 741 | } |
742 | 742 | ||
743 | /* regiesers addresses are not in order | 743 | /* registers addresses are not in order |
744 | so these arrays help simplify the code */ | 744 | so these arrays help simplify the code */ |
745 | static const int cm_start[E1H_FUNC_MAX][9] = { | 745 | static const int cm_start[E1H_FUNC_MAX][9] = { |
746 | {MISC_FUNC0_START, TCM_FUNC0_START, UCM_FUNC0_START, CCM_FUNC0_START, | 746 | {MISC_FUNC0_START, TCM_FUNC0_START, UCM_FUNC0_START, CCM_FUNC0_START, |
diff --git a/drivers/net/bnx2x_link.h b/drivers/net/bnx2x_link.h index 80c945ca3a51..86d54a17b411 100644 --- a/drivers/net/bnx2x_link.h +++ b/drivers/net/bnx2x_link.h | |||
@@ -143,7 +143,7 @@ u8 bnx2x_cl45_write(struct bnx2x *bp, u8 port, u32 ext_phy_type, | |||
143 | u8 phy_addr, u8 devad, u16 reg, u16 val); | 143 | u8 phy_addr, u8 devad, u16 reg, u16 val); |
144 | 144 | ||
145 | /* Reads the link_status from the shmem, | 145 | /* Reads the link_status from the shmem, |
146 | and update the link vars accordinaly */ | 146 | and update the link vars accordingly */ |
147 | void bnx2x_link_status_update(struct link_params *input, | 147 | void bnx2x_link_status_update(struct link_params *input, |
148 | struct link_vars *output); | 148 | struct link_vars *output); |
149 | /* returns string representing the fw_version of the external phy */ | 149 | /* returns string representing the fw_version of the external phy */ |
@@ -152,7 +152,7 @@ u8 bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 driver_loaded, | |||
152 | 152 | ||
153 | /* Set/Unset the led | 153 | /* Set/Unset the led |
154 | Basically, the CLC takes care of the led for the link, but in case one needs | 154 | Basically, the CLC takes care of the led for the link, but in case one needs |
155 | to set/unset the led unnatually, set the "mode" to LED_MODE_OPER to | 155 | to set/unset the led unnaturally, set the "mode" to LED_MODE_OPER to |
156 | blink the led, and LED_MODE_OFF to set the led off.*/ | 156 | blink the led, and LED_MODE_OFF to set the led off.*/ |
157 | u8 bnx2x_set_led(struct bnx2x *bp, u8 port, u8 mode, u32 speed, | 157 | u8 bnx2x_set_led(struct bnx2x *bp, u8 port, u8 mode, u32 speed, |
158 | u16 hw_led_mode, u32 chip_id); | 158 | u16 hw_led_mode, u32 chip_id); |
diff --git a/drivers/net/bnx2x_main.c b/drivers/net/bnx2x_main.c index d3c4c1ed07ef..1bbcdb22d96f 100644 --- a/drivers/net/bnx2x_main.c +++ b/drivers/net/bnx2x_main.c | |||
@@ -1151,8 +1151,8 @@ static inline void bnx2x_init_sge_ring_bit_mask(struct bnx2x_fastpath *fp) | |||
1151 | memset(fp->sge_mask, 0xff, | 1151 | memset(fp->sge_mask, 0xff, |
1152 | (NUM_RX_SGE >> RX_SGE_MASK_ELEM_SHIFT)*sizeof(u64)); | 1152 | (NUM_RX_SGE >> RX_SGE_MASK_ELEM_SHIFT)*sizeof(u64)); |
1153 | 1153 | ||
1154 | /* Clear the two last indeces in the page to 1: | 1154 | /* Clear the two last indices in the page to 1: |
1155 | these are the indeces that correspond to the "next" element, | 1155 | these are the indices that correspond to the "next" element, |
1156 | hence will never be indicated and should be removed from | 1156 | hence will never be indicated and should be removed from |
1157 | the calculations. */ | 1157 | the calculations. */ |
1158 | bnx2x_clear_sge_mask_next_elems(fp); | 1158 | bnx2x_clear_sge_mask_next_elems(fp); |
@@ -2011,7 +2011,7 @@ static u8 bnx2x_link_test(struct bnx2x *bp) | |||
2011 | sum of vn_min_rates | 2011 | sum of vn_min_rates |
2012 | or | 2012 | or |
2013 | 0 - if all the min_rates are 0. | 2013 | 0 - if all the min_rates are 0. |
2014 | In the later case fainess algorithm should be deactivated. | 2014 | In the later case fairness algorithm should be deactivated. |
2015 | If not all min_rates are zero then those that are zeroes will | 2015 | If not all min_rates are zero then those that are zeroes will |
2016 | be set to 1. | 2016 | be set to 1. |
2017 | */ | 2017 | */ |
@@ -2134,7 +2134,7 @@ static void bnx2x_init_vn_minmax(struct bnx2x *bp, int func, | |||
2134 | FUNC_MF_CFG_MIN_BW_SHIFT) * 100; | 2134 | FUNC_MF_CFG_MIN_BW_SHIFT) * 100; |
2135 | /* If FAIRNESS is enabled (not all min rates are zeroes) and | 2135 | /* If FAIRNESS is enabled (not all min rates are zeroes) and |
2136 | if current min rate is zero - set it to 1. | 2136 | if current min rate is zero - set it to 1. |
2137 | This is a requirment of the algorithm. */ | 2137 | This is a requirement of the algorithm. */ |
2138 | if ((vn_min_rate == 0) && wsum) | 2138 | if ((vn_min_rate == 0) && wsum) |
2139 | vn_min_rate = DEF_MIN_RATE; | 2139 | vn_min_rate = DEF_MIN_RATE; |
2140 | vn_max_rate = ((vn_cfg & FUNC_MF_CFG_MAX_BW_MASK) >> | 2140 | vn_max_rate = ((vn_cfg & FUNC_MF_CFG_MAX_BW_MASK) >> |
@@ -6562,7 +6562,7 @@ static void bnx2x_reset_port(struct bnx2x *bp) | |||
6562 | val = REG_RD(bp, BRB1_REG_PORT_NUM_OCC_BLOCKS_0 + port*4); | 6562 | val = REG_RD(bp, BRB1_REG_PORT_NUM_OCC_BLOCKS_0 + port*4); |
6563 | if (val) | 6563 | if (val) |
6564 | DP(NETIF_MSG_IFDOWN, | 6564 | DP(NETIF_MSG_IFDOWN, |
6565 | "BRB1 is not empty %d blooks are occupied\n", val); | 6565 | "BRB1 is not empty %d blocks are occupied\n", val); |
6566 | 6566 | ||
6567 | /* TODO: Close Doorbell port? */ | 6567 | /* TODO: Close Doorbell port? */ |
6568 | } | 6568 | } |
@@ -6602,7 +6602,7 @@ static void bnx2x_reset_chip(struct bnx2x *bp, u32 reset_code) | |||
6602 | } | 6602 | } |
6603 | } | 6603 | } |
6604 | 6604 | ||
6605 | /* msut be called with rtnl_lock */ | 6605 | /* must be called with rtnl_lock */ |
6606 | static int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode) | 6606 | static int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode) |
6607 | { | 6607 | { |
6608 | int port = BP_PORT(bp); | 6608 | int port = BP_PORT(bp); |
@@ -7455,7 +7455,7 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp) | |||
7455 | 7455 | ||
7456 | if (BP_NOMCP(bp)) { | 7456 | if (BP_NOMCP(bp)) { |
7457 | /* only supposed to happen on emulation/FPGA */ | 7457 | /* only supposed to happen on emulation/FPGA */ |
7458 | BNX2X_ERR("warning rendom MAC workaround active\n"); | 7458 | BNX2X_ERR("warning random MAC workaround active\n"); |
7459 | random_ether_addr(bp->dev->dev_addr); | 7459 | random_ether_addr(bp->dev->dev_addr); |
7460 | memcpy(bp->dev->perm_addr, bp->dev->dev_addr, ETH_ALEN); | 7460 | memcpy(bp->dev->perm_addr, bp->dev->dev_addr, ETH_ALEN); |
7461 | } | 7461 | } |
@@ -8907,7 +8907,7 @@ static void bnx2x_self_test(struct net_device *dev, | |||
8907 | if (!netif_running(dev)) | 8907 | if (!netif_running(dev)) |
8908 | return; | 8908 | return; |
8909 | 8909 | ||
8910 | /* offline tests are not suppoerted in MF mode */ | 8910 | /* offline tests are not supported in MF mode */ |
8911 | if (IS_E1HMF(bp)) | 8911 | if (IS_E1HMF(bp)) |
8912 | etest->flags &= ~ETH_TEST_FL_OFFLINE; | 8912 | etest->flags &= ~ETH_TEST_FL_OFFLINE; |
8913 | 8913 | ||
@@ -9216,7 +9216,7 @@ static int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state) | |||
9216 | PCI_PM_CTRL_PME_STATUS)); | 9216 | PCI_PM_CTRL_PME_STATUS)); |
9217 | 9217 | ||
9218 | if (pmcsr & PCI_PM_CTRL_STATE_MASK) | 9218 | if (pmcsr & PCI_PM_CTRL_STATE_MASK) |
9219 | /* delay required during transition out of D3hot */ | 9219 | /* delay required during transition out of D3hot */ |
9220 | msleep(20); | 9220 | msleep(20); |
9221 | break; | 9221 | break; |
9222 | 9222 | ||
@@ -9289,7 +9289,7 @@ poll_panic: | |||
9289 | 9289 | ||
9290 | 9290 | ||
9291 | /* we split the first BD into headers and data BDs | 9291 | /* we split the first BD into headers and data BDs |
9292 | * to ease the pain of our fellow micocode engineers | 9292 | * to ease the pain of our fellow microcode engineers |
9293 | * we use one mapping for both BDs | 9293 | * we use one mapping for both BDs |
9294 | * So far this has only been observed to happen | 9294 | * So far this has only been observed to happen |
9295 | * in Other Operating Systems(TM) | 9295 | * in Other Operating Systems(TM) |
@@ -9396,7 +9396,7 @@ static int bnx2x_pkt_req_lin(struct bnx2x *bp, struct sk_buff *skb, | |||
9396 | /* Check if LSO packet needs to be copied: | 9396 | /* Check if LSO packet needs to be copied: |
9397 | 3 = 1 (for headers BD) + 2 (for PBD and last BD) */ | 9397 | 3 = 1 (for headers BD) + 2 (for PBD and last BD) */ |
9398 | int wnd_size = MAX_FETCH_BD - 3; | 9398 | int wnd_size = MAX_FETCH_BD - 3; |
9399 | /* Number of widnows to check */ | 9399 | /* Number of windows to check */ |
9400 | int num_wnds = skb_shinfo(skb)->nr_frags - wnd_size; | 9400 | int num_wnds = skb_shinfo(skb)->nr_frags - wnd_size; |
9401 | int wnd_idx = 0; | 9401 | int wnd_idx = 0; |
9402 | int frag_idx = 0; | 9402 | int frag_idx = 0; |
@@ -9498,7 +9498,7 @@ static int bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
9498 | skb->ip_summed, skb->protocol, ipv6_hdr(skb)->nexthdr, | 9498 | skb->ip_summed, skb->protocol, ipv6_hdr(skb)->nexthdr, |
9499 | ip_hdr(skb)->protocol, skb_shinfo(skb)->gso_type, xmit_type); | 9499 | ip_hdr(skb)->protocol, skb_shinfo(skb)->gso_type, xmit_type); |
9500 | 9500 | ||
9501 | /* First, check if we need to linearaize the skb | 9501 | /* First, check if we need to linearize the skb |
9502 | (due to FW restrictions) */ | 9502 | (due to FW restrictions) */ |
9503 | if (bnx2x_pkt_req_lin(bp, skb, xmit_type)) { | 9503 | if (bnx2x_pkt_req_lin(bp, skb, xmit_type)) { |
9504 | /* Statistics of linearization */ | 9504 | /* Statistics of linearization */ |
diff --git a/drivers/net/bnx2x_reg.h b/drivers/net/bnx2x_reg.h index 5029d1e466f6..a67b0c358ae4 100644 --- a/drivers/net/bnx2x_reg.h +++ b/drivers/net/bnx2x_reg.h | |||
@@ -6,7 +6,7 @@ | |||
6 | * it under the terms of the GNU General Public License as published by | 6 | * it under the terms of the GNU General Public License as published by |
7 | * the Free Software Foundation. | 7 | * the Free Software Foundation. |
8 | * | 8 | * |
9 | * The registers description starts with the regsister Access type followed | 9 | * The registers description starts with the register Access type followed |
10 | * by size in bits. For example [RW 32]. The access types are: | 10 | * by size in bits. For example [RW 32]. The access types are: |
11 | * R - Read only | 11 | * R - Read only |
12 | * RC - Clear on read | 12 | * RC - Clear on read |
@@ -49,7 +49,7 @@ | |||
49 | /* [RW 10] Write client 0: Assert pause threshold. */ | 49 | /* [RW 10] Write client 0: Assert pause threshold. */ |
50 | #define BRB1_REG_PAUSE_LOW_THRESHOLD_0 0x60068 | 50 | #define BRB1_REG_PAUSE_LOW_THRESHOLD_0 0x60068 |
51 | #define BRB1_REG_PAUSE_LOW_THRESHOLD_1 0x6006c | 51 | #define BRB1_REG_PAUSE_LOW_THRESHOLD_1 0x6006c |
52 | /* [R 24] The number of full blocks occpied by port. */ | 52 | /* [R 24] The number of full blocks occupied by port. */ |
53 | #define BRB1_REG_PORT_NUM_OCC_BLOCKS_0 0x60094 | 53 | #define BRB1_REG_PORT_NUM_OCC_BLOCKS_0 0x60094 |
54 | /* [RW 1] Reset the design by software. */ | 54 | /* [RW 1] Reset the design by software. */ |
55 | #define BRB1_REG_SOFT_RESET 0x600dc | 55 | #define BRB1_REG_SOFT_RESET 0x600dc |
@@ -1412,13 +1412,13 @@ | |||
1412 | #define MISC_REG_GPIO 0xa490 | 1412 | #define MISC_REG_GPIO 0xa490 |
1413 | /* [R 28] this field hold the last information that caused reserved | 1413 | /* [R 28] this field hold the last information that caused reserved |
1414 | attention. bits [19:0] - address; [22:20] function; [23] reserved; | 1414 | attention. bits [19:0] - address; [22:20] function; [23] reserved; |
1415 | [27:24] the master thatcaused the attention - according to the following | 1415 | [27:24] the master that caused the attention - according to the following |
1416 | encodeing:1 = pxp; 2 = mcp; 3 = usdm; 4 = tsdm; 5 = xsdm; 6 = csdm; 7 = | 1416 | encodeing:1 = pxp; 2 = mcp; 3 = usdm; 4 = tsdm; 5 = xsdm; 6 = csdm; 7 = |
1417 | dbu; 8 = dmae */ | 1417 | dbu; 8 = dmae */ |
1418 | #define MISC_REG_GRC_RSV_ATTN 0xa3c0 | 1418 | #define MISC_REG_GRC_RSV_ATTN 0xa3c0 |
1419 | /* [R 28] this field hold the last information that caused timeout | 1419 | /* [R 28] this field hold the last information that caused timeout |
1420 | attention. bits [19:0] - address; [22:20] function; [23] reserved; | 1420 | attention. bits [19:0] - address; [22:20] function; [23] reserved; |
1421 | [27:24] the master thatcaused the attention - according to the following | 1421 | [27:24] the master that caused the attention - according to the following |
1422 | encodeing:1 = pxp; 2 = mcp; 3 = usdm; 4 = tsdm; 5 = xsdm; 6 = csdm; 7 = | 1422 | encodeing:1 = pxp; 2 = mcp; 3 = usdm; 4 = tsdm; 5 = xsdm; 6 = csdm; 7 = |
1423 | dbu; 8 = dmae */ | 1423 | dbu; 8 = dmae */ |
1424 | #define MISC_REG_GRC_TIMEOUT_ATTN 0xa3c4 | 1424 | #define MISC_REG_GRC_TIMEOUT_ATTN 0xa3c4 |
@@ -2320,7 +2320,7 @@ | |||
2320 | /* [RW 3] page size in L2P table for QM module; -4k; -8k; -16k; -32k; -64k; | 2320 | /* [RW 3] page size in L2P table for QM module; -4k; -8k; -16k; -32k; -64k; |
2321 | -128k */ | 2321 | -128k */ |
2322 | #define PXP2_REG_RQ_QM_P_SIZE 0x120050 | 2322 | #define PXP2_REG_RQ_QM_P_SIZE 0x120050 |
2323 | /* [RW 1] 1' indicates that the RBC has finished configurating the PSWRQ */ | 2323 | /* [RW 1] 1' indicates that the RBC has finished configuring the PSWRQ */ |
2324 | #define PXP2_REG_RQ_RBC_DONE 0x1201b0 | 2324 | #define PXP2_REG_RQ_RBC_DONE 0x1201b0 |
2325 | /* [RW 3] Max burst size filed for read requests port 0; 000 - 128B; | 2325 | /* [RW 3] Max burst size filed for read requests port 0; 000 - 128B; |
2326 | 001:256B; 010: 512B; 11:1K:100:2K; 01:4K */ | 2326 | 001:256B; 010: 512B; 11:1K:100:2K; 01:4K */ |
@@ -2428,7 +2428,7 @@ | |||
2428 | /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the | 2428 | /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the |
2429 | buffer reaches this number has_payload will be asserted */ | 2429 | buffer reaches this number has_payload will be asserted */ |
2430 | #define PXP2_REG_WR_DMAE_MPS 0x1205ec | 2430 | #define PXP2_REG_WR_DMAE_MPS 0x1205ec |
2431 | /* [RW 10] if Number of entries in dmae fifo will be higer than this | 2431 | /* [RW 10] if Number of entries in dmae fifo will be higher than this |
2432 | threshold then has_payload indication will be asserted; the default value | 2432 | threshold then has_payload indication will be asserted; the default value |
2433 | should be equal to > write MBS size! */ | 2433 | should be equal to > write MBS size! */ |
2434 | #define PXP2_REG_WR_DMAE_TH 0x120368 | 2434 | #define PXP2_REG_WR_DMAE_TH 0x120368 |
@@ -2449,7 +2449,7 @@ | |||
2449 | /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the | 2449 | /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the |
2450 | buffer reaches this number has_payload will be asserted */ | 2450 | buffer reaches this number has_payload will be asserted */ |
2451 | #define PXP2_REG_WR_TSDM_MPS 0x1205d4 | 2451 | #define PXP2_REG_WR_TSDM_MPS 0x1205d4 |
2452 | /* [RW 10] if Number of entries in usdmdp fifo will be higer than this | 2452 | /* [RW 10] if Number of entries in usdmdp fifo will be higher than this |
2453 | threshold then has_payload indication will be asserted; the default value | 2453 | threshold then has_payload indication will be asserted; the default value |
2454 | should be equal to > write MBS size! */ | 2454 | should be equal to > write MBS size! */ |
2455 | #define PXP2_REG_WR_USDMDP_TH 0x120348 | 2455 | #define PXP2_REG_WR_USDMDP_TH 0x120348 |
@@ -3316,12 +3316,12 @@ | |||
3316 | #define XSEM_XSEM_INT_MASK_0_REG_ADDRESS_ERROR_SIZE 0 | 3316 | #define XSEM_XSEM_INT_MASK_0_REG_ADDRESS_ERROR_SIZE 0 |
3317 | #define CFC_DEBUG1_REG_WRITE_AC (0x1<<4) | 3317 | #define CFC_DEBUG1_REG_WRITE_AC (0x1<<4) |
3318 | #define CFC_DEBUG1_REG_WRITE_AC_SIZE 4 | 3318 | #define CFC_DEBUG1_REG_WRITE_AC_SIZE 4 |
3319 | /* [R 1] debug only: This bit indicates wheter indicates that external | 3319 | /* [R 1] debug only: This bit indicates whether indicates that external |
3320 | buffer was wrapped (oldest data was thrown); Relevant only when | 3320 | buffer was wrapped (oldest data was thrown); Relevant only when |
3321 | ~dbg_registers_debug_target=2 (PCI) & ~dbg_registers_full_mode=1 (wrap); */ | 3321 | ~dbg_registers_debug_target=2 (PCI) & ~dbg_registers_full_mode=1 (wrap); */ |
3322 | #define DBG_REG_WRAP_ON_EXT_BUFFER 0xc124 | 3322 | #define DBG_REG_WRAP_ON_EXT_BUFFER 0xc124 |
3323 | #define DBG_REG_WRAP_ON_EXT_BUFFER_SIZE 1 | 3323 | #define DBG_REG_WRAP_ON_EXT_BUFFER_SIZE 1 |
3324 | /* [R 1] debug only: This bit indicates wheter the internal buffer was | 3324 | /* [R 1] debug only: This bit indicates whether the internal buffer was |
3325 | wrapped (oldest data was thrown) Relevant only when | 3325 | wrapped (oldest data was thrown) Relevant only when |
3326 | ~dbg_registers_debug_target=0 (internal buffer) */ | 3326 | ~dbg_registers_debug_target=0 (internal buffer) */ |
3327 | #define DBG_REG_WRAP_ON_INT_BUFFER 0xc128 | 3327 | #define DBG_REG_WRAP_ON_INT_BUFFER 0xc128 |