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-rw-r--r--drivers/net/wireless/ipw2100.c1
-rw-r--r--drivers/net/wireless/ipw2100.h49
2 files changed, 0 insertions, 50 deletions
diff --git a/drivers/net/wireless/ipw2100.c b/drivers/net/wireless/ipw2100.c
index d2b70f6e99dd..832b736e181c 100644
--- a/drivers/net/wireless/ipw2100.c
+++ b/drivers/net/wireless/ipw2100.c
@@ -1116,7 +1116,6 @@ static inline int rf_kill_active(struct ipw2100_priv *priv)
1116{ 1116{
1117#define MAX_RF_KILL_CHECKS 5 1117#define MAX_RF_KILL_CHECKS 5
1118#define RF_KILL_CHECK_DELAY 40 1118#define RF_KILL_CHECK_DELAY 40
1119#define RF_KILL_CHECK_THRESHOLD 3
1120 1119
1121 unsigned short value = 0; 1120 unsigned short value = 0;
1122 u32 reg = 0; 1121 u32 reg = 0;
diff --git a/drivers/net/wireless/ipw2100.h b/drivers/net/wireless/ipw2100.h
index 2980900beb53..95a05b554c1a 100644
--- a/drivers/net/wireless/ipw2100.h
+++ b/drivers/net/wireless/ipw2100.h
@@ -143,15 +143,6 @@ enum { IPW_DEBUG_ENABLED = 0 };
143#define IPW_DEBUG_STATE(f, a...) IPW_DEBUG(IPW_DL_STATE | IPW_DL_ASSOC | IPW_DL_INFO, f, ## a) 143#define IPW_DEBUG_STATE(f, a...) IPW_DEBUG(IPW_DL_STATE | IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
144#define IPW_DEBUG_ASSOC(f, a...) IPW_DEBUG(IPW_DL_ASSOC | IPW_DL_INFO, f, ## a) 144#define IPW_DEBUG_ASSOC(f, a...) IPW_DEBUG(IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
145 145
146
147#define VERIFY(f) \
148{ \
149 int status = 0; \
150 status = f; \
151 if(status) \
152 return status; \
153}
154
155enum { 146enum {
156 IPW_HW_STATE_DISABLED = 1, 147 IPW_HW_STATE_DISABLED = 1,
157 IPW_HW_STATE_ENABLED = 0 148 IPW_HW_STATE_ENABLED = 0
@@ -186,8 +177,6 @@ struct bd_status {
186 } info; 177 } info;
187} __attribute__ ((packed)); 178} __attribute__ ((packed));
188 179
189#define IPW_BUFDESC_LAST_FRAG 0
190
191struct ipw2100_bd { 180struct ipw2100_bd {
192 u32 host_addr; 181 u32 host_addr;
193 u32 buf_length; 182 u32 buf_length;
@@ -624,9 +613,6 @@ struct ipw2100_priv {
624 struct semaphore adapter_sem; 613 struct semaphore adapter_sem;
625 614
626 wait_queue_head_t wait_command_queue; 615 wait_queue_head_t wait_command_queue;
627#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)
628 u32 pm_state[PM_STATE_SIZE];
629#endif
630}; 616};
631 617
632 618
@@ -728,41 +714,6 @@ struct ipw2100_priv {
728#define IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX \ 714#define IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX \
729 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND) 715 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND)
730 716
731
732#if 0
733#define IPW_MEM_HOST_SHARED_TX_QUEUE_0_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x00)
734#define IPW_MEM_HOST_SHARED_TX_QUEUE_0_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x04)
735#define IPW_MEM_HOST_SHARED_TX_QUEUE_1_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x08)
736#define IPW_MEM_HOST_SHARED_TX_QUEUE_1_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0c)
737#define IPW_MEM_HOST_SHARED_TX_QUEUE_2_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x10)
738#define IPW_MEM_HOST_SHARED_TX_QUEUE_2_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x14)
739#define IPW_MEM_HOST_SHARED_TX_QUEUE_3_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x18)
740#define IPW_MEM_HOST_SHARED_TX_QUEUE_3_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x1c)
741#define IPW_MEM_HOST_SHARED_TX_QUEUE_0_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x80)
742#define IPW_MEM_HOST_SHARED_TX_QUEUE_1_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x84)
743#define IPW_MEM_HOST_SHARED_TX_QUEUE_2_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x88)
744#define IPW_MEM_HOST_SHARED_TX_QUEUE_3_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x8c)
745
746#define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_BASE(QueueNum) \
747 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + (QueueNum<<3))
748#define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_SIZE(QueueNum) \
749 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0004+(QueueNum<<3))
750#define IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX(QueueNum) \
751 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0080+(QueueNum<<2))
752
753#define IPW_MEM_HOST_SHARED_TX_QUEUE_0_WRITE_INDEX \
754 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x00)
755#define IPW_MEM_HOST_SHARED_TX_QUEUE_1_WRITE_INDEX \
756 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x04)
757#define IPW_MEM_HOST_SHARED_TX_QUEUE_2_WRITE_INDEX \
758 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x08)
759#define IPW_MEM_HOST_SHARED_TX_QUEUE_3_WRITE_INDEX \
760 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x0c)
761#define IPW_MEM_HOST_SHARED_SLAVE_MODE_INT_REGISTER \
762 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x78)
763
764#endif
765
766#define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_1 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x180) 717#define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_1 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x180)
767#define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_2 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x184) 718#define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_2 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x184)
768 719