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-rw-r--r--sound/pci/echoaudio/echoaudio_dsp.h15
1 files changed, 7 insertions, 8 deletions
diff --git a/sound/pci/echoaudio/echoaudio_dsp.h b/sound/pci/echoaudio/echoaudio_dsp.h
index e55ee00991ac..e352f3ae292c 100644
--- a/sound/pci/echoaudio/echoaudio_dsp.h
+++ b/sound/pci/echoaudio/echoaudio_dsp.h
@@ -642,18 +642,18 @@ struct comm_page { /* Base Length*/
642 u32 flags; /* See Appendix A below 0x004 4 */ 642 u32 flags; /* See Appendix A below 0x004 4 */
643 u32 unused; /* Unused entry 0x008 4 */ 643 u32 unused; /* Unused entry 0x008 4 */
644 u32 sample_rate; /* Card sample rate in Hz 0x00c 4 */ 644 u32 sample_rate; /* Card sample rate in Hz 0x00c 4 */
645 volatile u32 handshake; /* DSP command handshake 0x010 4 */ 645 u32 handshake; /* DSP command handshake 0x010 4 */
646 u32 cmd_start; /* Chs. to start mask 0x014 4 */ 646 u32 cmd_start; /* Chs. to start mask 0x014 4 */
647 u32 cmd_stop; /* Chs. to stop mask 0x018 4 */ 647 u32 cmd_stop; /* Chs. to stop mask 0x018 4 */
648 u32 cmd_reset; /* Chs. to reset mask 0x01c 4 */ 648 u32 cmd_reset; /* Chs. to reset mask 0x01c 4 */
649 u16 audio_format[DSP_MAXPIPES]; /* Chs. audio format 0x020 32*2 */ 649 u16 audio_format[DSP_MAXPIPES]; /* Chs. audio format 0x020 32*2 */
650 struct sg_entry sglist_addr[DSP_MAXPIPES]; 650 struct sg_entry sglist_addr[DSP_MAXPIPES];
651 /* Chs. Physical sglist addrs 0x060 32*8 */ 651 /* Chs. Physical sglist addrs 0x060 32*8 */
652 volatile u32 position[DSP_MAXPIPES]; 652 u32 position[DSP_MAXPIPES];
653 /* Positions for ea. ch. 0x160 32*4 */ 653 /* Positions for ea. ch. 0x160 32*4 */
654 volatile s8 vu_meter[DSP_MAXPIPES]; 654 s8 vu_meter[DSP_MAXPIPES];
655 /* VU meters 0x1e0 32*1 */ 655 /* VU meters 0x1e0 32*1 */
656 volatile s8 peak_meter[DSP_MAXPIPES]; 656 s8 peak_meter[DSP_MAXPIPES];
657 /* Peak meters 0x200 32*1 */ 657 /* Peak meters 0x200 32*1 */
658 s8 line_out_level[DSP_MAXAUDIOOUTPUTS]; 658 s8 line_out_level[DSP_MAXAUDIOOUTPUTS];
659 /* Output gain 0x220 16*1 */ 659 /* Output gain 0x220 16*1 */
@@ -665,7 +665,7 @@ struct comm_page { /* Base Length*/
665 /* Gina/Darla play filters - obsolete 0x3c0 168*4 */ 665 /* Gina/Darla play filters - obsolete 0x3c0 168*4 */
666 u32 rec_coeff[MAX_REC_TAPS]; 666 u32 rec_coeff[MAX_REC_TAPS];
667 /* Gina/Darla record filters - obsolete 0x660 192*4 */ 667 /* Gina/Darla record filters - obsolete 0x660 192*4 */
668 volatile u16 midi_input[MIDI_IN_BUFFER_SIZE]; 668 u16 midi_input[MIDI_IN_BUFFER_SIZE];
669 /* MIDI input data transfer buffer 0x960 256*2 */ 669 /* MIDI input data transfer buffer 0x960 256*2 */
670 u8 gd_clock_state; /* Chg Gina/Darla clock state 0xb60 1 */ 670 u8 gd_clock_state; /* Chg Gina/Darla clock state 0xb60 1 */
671 u8 gd_spdif_status; /* Chg. Gina/Darla S/PDIF state 0xb61 1 */ 671 u8 gd_spdif_status; /* Chg. Gina/Darla S/PDIF state 0xb61 1 */
@@ -674,11 +674,10 @@ struct comm_page { /* Base Length*/
674 u32 nominal_level_mask; /* -10 level enable mask 0xb64 4 */ 674 u32 nominal_level_mask; /* -10 level enable mask 0xb64 4 */
675 u16 input_clock; /* Chg. Input clock state 0xb68 2 */ 675 u16 input_clock; /* Chg. Input clock state 0xb68 2 */
676 u16 output_clock; /* Chg. Output clock state 0xb6a 2 */ 676 u16 output_clock; /* Chg. Output clock state 0xb6a 2 */
677 volatile u32 status_clocks; 677 u32 status_clocks; /* Current Input clock state 0xb6c 4 */
678 /* Current Input clock state 0xb6c 4 */
679 u32 ext_box_status; /* External box status 0xb70 4 */ 678 u32 ext_box_status; /* External box status 0xb70 4 */
680 u32 cmd_add_buffer; /* Pipes to add (obsolete) 0xb74 4 */ 679 u32 cmd_add_buffer; /* Pipes to add (obsolete) 0xb74 4 */
681 volatile u32 midi_out_free_count; 680 u32 midi_out_free_count;
682 /* # of bytes free in MIDI output FIFO 0xb78 4 */ 681 /* # of bytes free in MIDI output FIFO 0xb78 4 */
683 u32 unused2; /* Cyclic pipes 0xb7c 4 */ 682 u32 unused2; /* Cyclic pipes 0xb7c 4 */
684 u32 control_register; 683 u32 control_register;