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-rw-r--r--arch/arm/Kconfig9
-rw-r--r--arch/arm/Makefile1
-rw-r--r--arch/arm/mach-ep93xx/Kconfig21
-rw-r--r--arch/arm/mach-ep93xx/Makefile10
-rw-r--r--arch/arm/mach-ep93xx/Makefile.boot2
-rw-r--r--arch/arm/mach-ep93xx/core.c173
-rw-r--r--arch/arm/mach-ep93xx/gesbc9312.c40
-rw-r--r--arch/arm/mach-ep93xx/ts72xx.c118
-rw-r--r--arch/arm/mm/Kconfig2
-rw-r--r--include/asm-arm/arch-ep93xx/debug-macro.S22
-rw-r--r--include/asm-arm/arch-ep93xx/dma.h3
-rw-r--r--include/asm-arm/arch-ep93xx/entry-macro.S53
-rw-r--r--include/asm-arm/arch-ep93xx/ep93xx-regs.h114
-rw-r--r--include/asm-arm/arch-ep93xx/gesbc9312.h3
-rw-r--r--include/asm-arm/arch-ep93xx/hardware.h12
-rw-r--r--include/asm-arm/arch-ep93xx/io.h8
-rw-r--r--include/asm-arm/arch-ep93xx/irqs.h78
-rw-r--r--include/asm-arm/arch-ep93xx/memory.h14
-rw-r--r--include/asm-arm/arch-ep93xx/platform.h14
-rw-r--r--include/asm-arm/arch-ep93xx/system.h26
-rw-r--r--include/asm-arm/arch-ep93xx/timex.h5
-rw-r--r--include/asm-arm/arch-ep93xx/ts72xx.h90
-rw-r--r--include/asm-arm/arch-ep93xx/uncompress.h53
-rw-r--r--include/asm-arm/arch-ep93xx/vmalloc.h5
24 files changed, 875 insertions, 1 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 6e9e8cedd723..0dd24ebdf6ac 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -108,6 +108,13 @@ config ARCH_EBSA110
108 Ethernet interface, two PCMCIA sockets, two serial ports and a 108 Ethernet interface, two PCMCIA sockets, two serial ports and a
109 parallel port. 109 parallel port.
110 110
111config ARCH_EP93XX
112 bool "EP93xx-based"
113 select ARM_AMBA
114 select ARM_VIC
115 help
116 This enables support for the Cirrus EP93xx series of CPUs.
117
111config ARCH_FOOTBRIDGE 118config ARCH_FOOTBRIDGE
112 bool "FootBridge" 119 bool "FootBridge"
113 select FOOTBRIDGE 120 select FOOTBRIDGE
@@ -250,6 +257,8 @@ endchoice
250 257
251source "arch/arm/mach-clps711x/Kconfig" 258source "arch/arm/mach-clps711x/Kconfig"
252 259
260source "arch/arm/mach-ep93xx/Kconfig"
261
253source "arch/arm/mach-footbridge/Kconfig" 262source "arch/arm/mach-footbridge/Kconfig"
254 263
255source "arch/arm/mach-integrator/Kconfig" 264source "arch/arm/mach-integrator/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index fbfc14a56b96..b5b1e4087516 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -105,6 +105,7 @@ endif
105 machine-$(CONFIG_ARCH_AAEC2000) := aaec2000 105 machine-$(CONFIG_ARCH_AAEC2000) := aaec2000
106 machine-$(CONFIG_ARCH_REALVIEW) := realview 106 machine-$(CONFIG_ARCH_REALVIEW) := realview
107 machine-$(CONFIG_ARCH_AT91RM9200) := at91rm9200 107 machine-$(CONFIG_ARCH_AT91RM9200) := at91rm9200
108 machine-$(CONFIG_ARCH_EP93XX) := ep93xx
108 109
109ifeq ($(CONFIG_ARCH_EBSA110),y) 110ifeq ($(CONFIG_ARCH_EBSA110),y)
110# This is what happens if you forget the IOCS16 line. 111# This is what happens if you forget the IOCS16 line.
diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
new file mode 100644
index 000000000000..cec5a21ca4e3
--- /dev/null
+++ b/arch/arm/mach-ep93xx/Kconfig
@@ -0,0 +1,21 @@
1if ARCH_EP93XX
2
3menu "Cirrus EP93xx Implementation Options"
4
5comment "EP93xx Platforms"
6
7config MACH_GESBC9312
8 bool "Support Glomation GESBC-9312-sx"
9 help
10 Say 'Y' here if you want your kernel to support the Glomation
11 GESBC-9312-sx board.
12
13config MACH_TS72XX
14 bool "Support Technologic Systems TS-72xx SBC"
15 help
16 Say 'Y' here if you want your kernel to support the
17 Technologic Systems TS-72xx board.
18
19endmenu
20
21endif
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
new file mode 100644
index 000000000000..5393af989e94
--- /dev/null
+++ b/arch/arm/mach-ep93xx/Makefile
@@ -0,0 +1,10 @@
1#
2# Makefile for the linux kernel.
3#
4obj-y := core.o
5obj-m :=
6obj-n :=
7obj- :=
8
9obj-$(CONFIG_MACH_GESBC9312) += gesbc9312.o
10obj-$(CONFIG_MACH_TS72XX) += ts72xx.o
diff --git a/arch/arm/mach-ep93xx/Makefile.boot b/arch/arm/mach-ep93xx/Makefile.boot
new file mode 100644
index 000000000000..d5561ad15bad
--- /dev/null
+++ b/arch/arm/mach-ep93xx/Makefile.boot
@@ -0,0 +1,2 @@
1 zreladdr-y := 0x00008000
2params_phys-y := 0x00000100
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
new file mode 100644
index 000000000000..f831f74dc8cc
--- /dev/null
+++ b/arch/arm/mach-ep93xx/core.c
@@ -0,0 +1,173 @@
1/*
2 * arch/arm/mach-ep93xx/core.c
3 * Core routines for Cirrus EP93xx chips.
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * Thanks go to Michael Burian and Ray Lehtiniemi for their key
8 * role in the ep93xx linux community.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
14 */
15
16#include <linux/config.h>
17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/spinlock.h>
20#include <linux/sched.h>
21#include <linux/interrupt.h>
22#include <linux/serial.h>
23#include <linux/tty.h>
24#include <linux/bitops.h>
25#include <linux/serial.h>
26#include <linux/serial_8250.h>
27#include <linux/serial_core.h>
28#include <linux/device.h>
29#include <linux/mm.h>
30#include <linux/time.h>
31#include <linux/timex.h>
32#include <linux/delay.h>
33#include <linux/amba/bus.h>
34
35#include <asm/types.h>
36#include <asm/setup.h>
37#include <asm/memory.h>
38#include <asm/hardware.h>
39#include <asm/irq.h>
40#include <asm/system.h>
41#include <asm/tlbflush.h>
42#include <asm/pgtable.h>
43#include <asm/io.h>
44
45#include <asm/mach/map.h>
46#include <asm/mach/time.h>
47#include <asm/mach/irq.h>
48
49#include <asm/hardware/vic.h>
50
51
52/*************************************************************************
53 * Static I/O mappings that are needed for all EP93xx platforms
54 *************************************************************************/
55static struct map_desc ep93xx_io_desc[] __initdata = {
56 {
57 .virtual = EP93XX_AHB_VIRT_BASE,
58 .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
59 .length = EP93XX_AHB_SIZE,
60 .type = MT_DEVICE,
61 }, {
62 .virtual = EP93XX_APB_VIRT_BASE,
63 .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
64 .length = EP93XX_APB_SIZE,
65 .type = MT_DEVICE,
66 },
67};
68
69void __init ep93xx_map_io(void)
70{
71 iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
72}
73
74
75/*************************************************************************
76 * Timer handling for EP93xx
77 *************************************************************************
78 * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
79 * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
80 * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
81 * is free-running, and can't generate interrupts.
82 *
83 * The 508 kHz timers are ideal for use for the timer interrupt, as the
84 * most common values of HZ divide 508 kHz nicely. We pick one of the 16
85 * bit timers (timer 1) since we don't need more than 16 bits of reload
86 * value as long as HZ >= 8.
87 *
88 * The higher clock rate of timer 4 makes it a better choice than the
89 * other timers for use in gettimeoffset(), while the fact that it can't
90 * generate interrupts means we don't have to worry about not being able
91 * to use this timer for something else. We also use timer 4 for keeping
92 * track of lost jiffies.
93 */
94static unsigned int last_jiffy_time;
95
96#define TIMER4_TICKS_PER_JIFFY ((CLOCK_TICK_RATE + (HZ/2)) / HZ)
97
98static int ep93xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
99{
100 write_seqlock(&xtime_lock);
101
102 __raw_writel(1, EP93XX_TIMER1_CLEAR);
103 while (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time
104 >= TIMER4_TICKS_PER_JIFFY) {
105 last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
106 timer_tick(regs);
107 }
108
109 write_sequnlock(&xtime_lock);
110
111 return IRQ_HANDLED;
112}
113
114static struct irqaction ep93xx_timer_irq = {
115 .name = "ep93xx timer",
116 .flags = SA_INTERRUPT | SA_TIMER,
117 .handler = ep93xx_timer_interrupt,
118};
119
120static void __init ep93xx_timer_init(void)
121{
122 /* Enable periodic HZ timer. */
123 __raw_writel(0x48, EP93XX_TIMER1_CONTROL);
124 __raw_writel((508000 / HZ) - 1, EP93XX_TIMER1_LOAD);
125 __raw_writel(0xc8, EP93XX_TIMER1_CONTROL);
126
127 /* Enable lost jiffy timer. */
128 __raw_writel(0x100, EP93XX_TIMER4_VALUE_HIGH);
129
130 setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
131}
132
133static unsigned long ep93xx_gettimeoffset(void)
134{
135 int offset;
136
137 offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
138
139 /* Calculate (1000000 / 983040) * offset. */
140 return offset + (53 * offset / 3072);
141}
142
143struct sys_timer ep93xx_timer = {
144 .init = ep93xx_timer_init,
145 .offset = ep93xx_gettimeoffset,
146};
147
148
149/*************************************************************************
150 * EP93xx IRQ handling
151 *************************************************************************/
152void __init ep93xx_init_irq(void)
153{
154 vic_init((void *)EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK);
155 vic_init((void *)EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK);
156}
157
158
159/*************************************************************************
160 * EP93xx peripheral handling
161 *************************************************************************/
162void __init ep93xx_init_devices(void)
163{
164 unsigned int v;
165
166 /*
167 * Disallow access to MaverickCrunch initially.
168 */
169 v = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG);
170 v &= ~EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE;
171 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
172 __raw_writel(v, EP93XX_SYSCON_DEVICE_CONFIG);
173}
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
new file mode 100644
index 000000000000..d18fcb1a2f1b
--- /dev/null
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -0,0 +1,40 @@
1/*
2 * arch/arm/mach-ep93xx/gesbc9312.c
3 * Glomation GESBC-9312-sx support.
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version.
11 */
12
13#include <linux/config.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/mm.h>
17#include <linux/sched.h>
18#include <linux/interrupt.h>
19#include <linux/mtd/physmap.h>
20#include <asm/io.h>
21#include <asm/hardware.h>
22#include <asm/mach-types.h>
23#include <asm/mach/arch.h>
24
25static void __init gesbc9312_init_machine(void)
26{
27 ep93xx_init_devices();
28 physmap_configure(0x60000000, 0x00800000, 4, NULL);
29}
30
31MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")
32 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
33 .phys_io = EP93XX_APB_PHYS_BASE,
34 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
35 .boot_params = 0x00000100,
36 .map_io = ep93xx_map_io,
37 .init_irq = ep93xx_init_irq,
38 .timer = &ep93xx_timer,
39 .init_machine = gesbc9312_init_machine,
40MACHINE_END
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
new file mode 100644
index 000000000000..777e75daa8a5
--- /dev/null
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -0,0 +1,118 @@
1/*
2 * arch/arm/mach-ep93xx/ts72xx.c
3 * Technologic Systems TS72xx SBC support.
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version.
11 */
12
13#include <linux/config.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/mm.h>
17#include <linux/sched.h>
18#include <linux/interrupt.h>
19#include <linux/mtd/physmap.h>
20#include <asm/io.h>
21#include <asm/hardware.h>
22#include <asm/mach-types.h>
23#include <asm/mach/arch.h>
24#include <asm/mach/map.h>
25
26static struct map_desc ts72xx_io_desc[] __initdata = {
27 {
28 .virtual = TS72XX_MODEL_VIRT_BASE,
29 .pfn = __phys_to_pfn(TS72XX_MODEL_PHYS_BASE),
30 .length = TS72XX_MODEL_SIZE,
31 .type = MT_DEVICE,
32 }, {
33 .virtual = TS72XX_OPTIONS_VIRT_BASE,
34 .pfn = __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE),
35 .length = TS72XX_OPTIONS_SIZE,
36 .type = MT_DEVICE,
37 }, {
38 .virtual = TS72XX_OPTIONS2_VIRT_BASE,
39 .pfn = __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE),
40 .length = TS72XX_OPTIONS2_SIZE,
41 .type = MT_DEVICE,
42 }
43};
44
45static struct map_desc ts72xx_nand_io_desc[] __initdata = {
46 {
47 .virtual = TS72XX_NAND_DATA_VIRT_BASE,
48 .pfn = __phys_to_pfn(TS72XX_NAND1_DATA_PHYS_BASE),
49 .length = TS72XX_NAND_DATA_SIZE,
50 .type = MT_DEVICE,
51 }, {
52 .virtual = TS72XX_NAND_CONTROL_VIRT_BASE,
53 .pfn = __phys_to_pfn(TS72XX_NAND1_CONTROL_PHYS_BASE),
54 .length = TS72XX_NAND_CONTROL_SIZE,
55 .type = MT_DEVICE,
56 }, {
57 .virtual = TS72XX_NAND_BUSY_VIRT_BASE,
58 .pfn = __phys_to_pfn(TS72XX_NAND1_BUSY_PHYS_BASE),
59 .length = TS72XX_NAND_BUSY_SIZE,
60 .type = MT_DEVICE,
61 }
62};
63
64static struct map_desc ts72xx_alternate_nand_io_desc[] __initdata = {
65 {
66 .virtual = TS72XX_NAND_DATA_VIRT_BASE,
67 .pfn = __phys_to_pfn(TS72XX_NAND2_DATA_PHYS_BASE),
68 .length = TS72XX_NAND_DATA_SIZE,
69 .type = MT_DEVICE,
70 }, {
71 .virtual = TS72XX_NAND_CONTROL_VIRT_BASE,
72 .pfn = __phys_to_pfn(TS72XX_NAND2_CONTROL_PHYS_BASE),
73 .length = TS72XX_NAND_CONTROL_SIZE,
74 .type = MT_DEVICE,
75 }, {
76 .virtual = TS72XX_NAND_BUSY_VIRT_BASE,
77 .pfn = __phys_to_pfn(TS72XX_NAND2_BUSY_PHYS_BASE),
78 .length = TS72XX_NAND_BUSY_SIZE,
79 .type = MT_DEVICE,
80 }
81};
82
83static void __init ts72xx_map_io(void)
84{
85 ep93xx_map_io();
86 iotable_init(ts72xx_io_desc, ARRAY_SIZE(ts72xx_io_desc));
87
88 /*
89 * The TS-7200 has NOR flash, the other models have NAND flash.
90 */
91 if (!board_is_ts7200()) {
92 if (is_ts9420_installed()) {
93 iotable_init(ts72xx_alternate_nand_io_desc,
94 ARRAY_SIZE(ts72xx_alternate_nand_io_desc));
95 } else {
96 iotable_init(ts72xx_nand_io_desc,
97 ARRAY_SIZE(ts72xx_nand_io_desc));
98 }
99 }
100}
101
102static void __init ts72xx_init_machine(void)
103{
104 ep93xx_init_devices();
105 if (board_is_ts7200())
106 physmap_configure(TS72XX_NOR_PHYS_BASE, 0x01000000, 1, NULL);
107}
108
109MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
110 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
111 .phys_io = EP93XX_APB_PHYS_BASE,
112 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
113 .boot_params = 0x00000100,
114 .map_io = ts72xx_map_io,
115 .init_irq = ep93xx_init_irq,
116 .timer = &ep93xx_timer,
117 .init_machine = ts72xx_init_machine,
118MACHINE_END
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 3b79d0e23455..eaaec90db972 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -62,7 +62,7 @@ config CPU_ARM720T
62# ARM920T 62# ARM920T
63config CPU_ARM920T 63config CPU_ARM920T
64 bool "Support ARM920T processor" if !ARCH_S3C2410 64 bool "Support ARM920T processor" if !ARCH_S3C2410
65 depends on ARCH_INTEGRATOR || ARCH_S3C2410 || ARCH_IMX || ARCH_AAEC2000 || ARCH_AT91RM9200 65 depends on ARCH_EP93XX || ARCH_INTEGRATOR || ARCH_S3C2410 || ARCH_IMX || ARCH_AAEC2000 || ARCH_AT91RM9200
66 default y if ARCH_S3C2410 || ARCH_AT91RM9200 66 default y if ARCH_S3C2410 || ARCH_AT91RM9200
67 select CPU_32v4 67 select CPU_32v4
68 select CPU_ABRT_EV4T 68 select CPU_ABRT_EV4T
diff --git a/include/asm-arm/arch-ep93xx/debug-macro.S b/include/asm-arm/arch-ep93xx/debug-macro.S
new file mode 100644
index 000000000000..397565a0c671
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/debug-macro.S
@@ -0,0 +1,22 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/debug-macro.S
3 * Debugging macro include header
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version.
11 */
12#include <asm/arch/ep93xx-regs.h>
13
14 .macro addruart,rx
15 mrc p15, 0, \rx, c1, c0
16 tst \rx, #1 @ MMU enabled?
17 ldreq \rx, =EP93XX_APB_PHYS_BASE @ Physical base
18 ldrne \rx, =EP93XX_APB_VIRT_BASE @ virtual base
19 orr \rx, \rx, #0x000c0000
20 .endm
21
22#include <asm/hardware/debug-pl01x.S>
diff --git a/include/asm-arm/arch-ep93xx/dma.h b/include/asm-arm/arch-ep93xx/dma.h
new file mode 100644
index 000000000000..898b3ab7fd46
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/dma.h
@@ -0,0 +1,3 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/dma.h
3 */
diff --git a/include/asm-arm/arch-ep93xx/entry-macro.S b/include/asm-arm/arch-ep93xx/entry-macro.S
new file mode 100644
index 000000000000..84140a28dfcf
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/entry-macro.S
@@ -0,0 +1,53 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/entry-macro.S
3 * IRQ demultiplexing for EP93xx
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version.
11 */
12#include <asm/arch/ep93xx-regs.h>
13
14 .macro disable_fiq
15 .endm
16
17 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
18 ldr \base, =(EP93XX_AHB_VIRT_BASE)
19 orr \base, \base, #0x000b0000
20 mov \irqnr, #0
21 ldr \irqstat, [\base] @ lower 32 interrupts
22 cmp \irqstat, #0
23 bne 1001f
24
25 eor \base, \base, #0x00070000
26 ldr \irqstat, [\base] @ upper 32 interrupts
27 cmp \irqstat, #0
28 beq 1002f
29 mov \irqnr, #0x20
30
311001:
32 movs \tmp, \irqstat, lsl #16
33 movne \irqstat, \tmp
34 addeq \irqnr, \irqnr, #16
35
36 movs \tmp, \irqstat, lsl #8
37 movne \irqstat, \tmp
38 addeq \irqnr, \irqnr, #8
39
40 movs \tmp, \irqstat, lsl #4
41 movne \irqstat, \tmp
42 addeq \irqnr, \irqnr, #4
43
44 movs \tmp, \irqstat, lsl #2
45 movne \irqstat, \tmp
46 addeq \irqnr, \irqnr, #2
47
48 movs \tmp, \irqstat, lsl #1
49 addeq \irqnr, \irqnr, #1
50 orrs \base, \base, #1
51
521002:
53 .endm
diff --git a/include/asm-arm/arch-ep93xx/ep93xx-regs.h b/include/asm-arm/arch-ep93xx/ep93xx-regs.h
new file mode 100644
index 000000000000..693f23886e85
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/ep93xx-regs.h
@@ -0,0 +1,114 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/ep93xx-regs.h
3 */
4
5#ifndef __ASM_ARCH_EP93XX_REGS_H
6#define __ASM_ARCH_EP93XX_REGS_H
7
8/*
9 * EP93xx linux memory map:
10 *
11 * virt phys size
12 * fe800000 5M per-platform mappings
13 * fed00000 80800000 2M APB
14 * fef00000 80000000 1M AHB
15 */
16
17#define EP93XX_AHB_PHYS_BASE 0x80000000
18#define EP93XX_AHB_VIRT_BASE 0xfef00000
19#define EP93XX_AHB_SIZE 0x00100000
20
21#define EP93XX_APB_PHYS_BASE 0x80800000
22#define EP93XX_APB_VIRT_BASE 0xfed00000
23#define EP93XX_APB_SIZE 0x00200000
24
25
26/* AHB peripherals */
27#define EP93XX_DMA_BASE (EP93XX_AHB_VIRT_BASE + 0x00000000)
28
29#define EP93XX_ETHERNET_BASE (EP93XX_AHB_VIRT_BASE + 0x00010000)
30
31#define EP93XX_USB_BASE (EP93XX_AHB_VIRT_BASE + 0x00020000)
32#define EP93XX_USB_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00020000)
33
34#define EP93XX_RASTER_BASE (EP93XX_AHB_VIRT_BASE + 0x00030000)
35
36#define EP93XX_GRAPHICS_ACCEL_BASE (EP93XX_AHB_VIRT_BASE + 0x00040000)
37
38#define EP93XX_SDRAM_CONTROLLER_BASE (EP93XX_AHB_VIRT_BASE + 0x00060000)
39
40#define EP93XX_PCMCIA_CONTROLLER_BASE (EP93XX_AHB_VIRT_BASE + 0x00080000)
41
42#define EP93XX_BOOT_ROM_BASE (EP93XX_AHB_VIRT_BASE + 0x00090000)
43
44#define EP93XX_IDE_BASE (EP93XX_AHB_VIRT_BASE + 0x000a0000)
45
46#define EP93XX_VIC1_BASE (EP93XX_AHB_VIRT_BASE + 0x000b0000)
47
48#define EP93XX_VIC2_BASE (EP93XX_AHB_VIRT_BASE + 0x000c0000)
49
50
51/* APB peripherals */
52#define EP93XX_TIMER_BASE (EP93XX_APB_VIRT_BASE + 0x00010000)
53#define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
54#define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
55#define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
56#define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
57#define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
58#define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
59#define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
60#define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
61#define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
62#define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
63#define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
64#define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
65#define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
66#define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
67#define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
68
69#define EP93XX_I2S_BASE (EP93XX_APB_VIRT_BASE + 0x00020000)
70
71#define EP93XX_SECURITY_BASE (EP93XX_APB_VIRT_BASE + 0x00030000)
72
73#define EP93XX_GPIO_BASE (EP93XX_APB_VIRT_BASE + 0x00040000)
74
75#define EP93XX_AAC_BASE (EP93XX_APB_VIRT_BASE + 0x00080000)
76
77#define EP93XX_SPI_BASE (EP93XX_APB_VIRT_BASE + 0x000a0000)
78
79#define EP93XX_IRDA_BASE (EP93XX_APB_VIRT_BASE + 0x000b0000)
80
81#define EP93XX_UART1_BASE (EP93XX_APB_VIRT_BASE + 0x000c0000)
82#define EP93XX_UART1_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000c0000)
83
84#define EP93XX_UART2_BASE (EP93XX_APB_VIRT_BASE + 0x000d0000)
85#define EP93XX_UART2_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000d0000)
86
87#define EP93XX_UART3_BASE (EP93XX_APB_VIRT_BASE + 0x000e0000)
88#define EP93XX_UART3_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000e0000)
89
90#define EP93XX_KEY_MATRIX_BASE (EP93XX_APB_VIRT_BASE + 0x000f0000)
91
92#define EP93XX_ADC_BASE (EP93XX_APB_VIRT_BASE + 0x00100000)
93#define EP93XX_TOUCHSCREEN_BASE (EP93XX_APB_VIRT_BASE + 0x00100000)
94
95#define EP93XX_PWM_BASE (EP93XX_APB_VIRT_BASE + 0x00110000)
96
97#define EP93XX_RTC_BASE (EP93XX_APB_VIRT_BASE + 0x00120000)
98
99#define EP93XX_SYSCON_BASE (EP93XX_APB_VIRT_BASE + 0x00130000)
100#define EP93XX_SYSCON_REG(x) (EP93XX_SYSCON_BASE + (x))
101#define EP93XX_SYSCON_POWER_STATE EP93XX_SYSCON_REG(0x00)
102#define EP93XX_SYSCON_CLOCK_CONTROL EP93XX_SYSCON_REG(0x04)
103#define EP93XX_SYSCON_CLOCK_UARTBAUD 0x20000000
104#define EP93XX_SYSCON_CLOCK_USH_EN 0x10000000
105#define EP93XX_SYSCON_HALT EP93XX_SYSCON_REG(0x08)
106#define EP93XX_SYSCON_STANDBY EP93XX_SYSCON_REG(0x0c)
107#define EP93XX_SYSCON_DEVICE_CONFIG EP93XX_SYSCON_REG(0x80)
108#define EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE 0x00800000
109#define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0)
110
111#define EP93XX_WATCHDOG_BASE (EP93XX_APB_VIRT_BASE + 0x00140000)
112
113
114#endif
diff --git a/include/asm-arm/arch-ep93xx/gesbc9312.h b/include/asm-arm/arch-ep93xx/gesbc9312.h
new file mode 100644
index 000000000000..4d0b3023bff7
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/gesbc9312.h
@@ -0,0 +1,3 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/gesbc9312.h
3 */
diff --git a/include/asm-arm/arch-ep93xx/hardware.h b/include/asm-arm/arch-ep93xx/hardware.h
new file mode 100644
index 000000000000..9b69f454065d
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/hardware.h
@@ -0,0 +1,12 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/hardware.h
3 */
4
5#include "ep93xx-regs.h"
6
7#define pcibios_assign_all_busses() 0
8
9#include "platform.h"
10
11#include "gesbc9312.h"
12#include "ts72xx.h"
diff --git a/include/asm-arm/arch-ep93xx/io.h b/include/asm-arm/arch-ep93xx/io.h
new file mode 100644
index 000000000000..7b4d25e29060
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/io.h
@@ -0,0 +1,8 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/io.h
3 */
4
5#define IO_SPACE_LIMIT 0xffffffff
6
7#define __io(p) ((void __iomem *)(p))
8#define __mem_pci(p) (p)
diff --git a/include/asm-arm/arch-ep93xx/irqs.h b/include/asm-arm/arch-ep93xx/irqs.h
new file mode 100644
index 000000000000..8c10fb964faf
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/irqs.h
@@ -0,0 +1,78 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/irqs.h
3 */
4
5#ifndef __ASM_ARCH_IRQS_H
6#define __ASM_ARCH_IRQS_H
7
8#define IRQ_EP93XX_COMMRX 2
9#define IRQ_EP93XX_COMMTX 3
10#define IRQ_EP93XX_TIMER1 4
11#define IRQ_EP93XX_TIMER2 5
12#define IRQ_EP93XX_AACINTR 6
13#define IRQ_EP93XX_DMAM2P0 7
14#define IRQ_EP93XX_DMAM2P1 8
15#define IRQ_EP93XX_DMAM2P2 9
16#define IRQ_EP93XX_DMAM2P3 10
17#define IRQ_EP93XX_DMAM2P4 11
18#define IRQ_EP93XX_DMAM2P5 12
19#define IRQ_EP93XX_DMAM2P6 13
20#define IRQ_EP93XX_DMAM2P7 14
21#define IRQ_EP93XX_DMAM2P8 15
22#define IRQ_EP93XX_DMAM2P9 16
23#define IRQ_EP93XX_DMAM2M0 17
24#define IRQ_EP93XX_DMAM2M1 18
25#define IRQ_EP93XX_GPIO0MUX 20
26#define IRQ_EP93XX_GPIO1MUX 21
27#define IRQ_EP93XX_GPIO2MUX 22
28#define IRQ_EP93XX_GPIO3MUX 22
29#define IRQ_EP93XX_UART1RX 23
30#define IRQ_EP93XX_UART1TX 24
31#define IRQ_EP93XX_UART2RX 25
32#define IRQ_EP93XX_UART2TX 26
33#define IRQ_EP93XX_UART3RX 27
34#define IRQ_EP93XX_UART3TX 28
35#define IRQ_EP93XX_KEY 29
36#define IRQ_EP93XX_TOUCH 30
37#define EP93XX_VIC1_VALID_IRQ_MASK 0x7ffffffc
38
39#define IRQ_EP93XX_EXT0 32
40#define IRQ_EP93XX_EXT1 33
41#define IRQ_EP93XX_EXT2 34
42#define IRQ_EP93XX_64HZ 35
43#define IRQ_EP93XX_WATCHDOG 36
44#define IRQ_EP93XX_RTC 37
45#define IRQ_EP93XX_IRDA 38
46#define IRQ_EP93XX_ETHERNET 39
47#define IRQ_EP93XX_EXT3 40
48#define IRQ_EP93XX_PROG 41
49#define IRQ_EP93XX_1HZ 42
50#define IRQ_EP93XX_VSYNC 43
51#define IRQ_EP93XX_VIDEO_FIFO 44
52#define IRQ_EP93XX_SSP1RX 45
53#define IRQ_EP93XX_SSP1TX 46
54#define IRQ_EP93XX_GPIO4MUX 47
55#define IRQ_EP93XX_GPIO5MUX 48
56#define IRQ_EP93XX_GPIO6MUX 49
57#define IRQ_EP93XX_GPIO7MUX 50
58#define IRQ_EP93XX_TIMER3 51
59#define IRQ_EP93XX_UART1 52
60#define IRQ_EP93XX_SSP 53
61#define IRQ_EP93XX_UART2 54
62#define IRQ_EP93XX_UART3 55
63#define IRQ_EP93XX_USB 56
64#define IRQ_EP93XX_ETHERNET_PME 57
65#define IRQ_EP93XX_DSP 58
66#define IRQ_EP93XX_GPIO_AB 59
67#define IRQ_EP93XX_SAI 60
68#define EP93XX_VIC2_VALID_IRQ_MASK 0x1fffffff
69
70#define NR_EP93XX_IRQS 64
71
72#define EP93XX_BOARD_IRQ(x) (NR_EP93XX_IRQS + (x))
73#define EP93XX_BOARD_IRQS 32
74
75#define NR_IRQS (NR_EP93XX_IRQS + EP93XX_BOARD_IRQS)
76
77
78#endif
diff --git a/include/asm-arm/arch-ep93xx/memory.h b/include/asm-arm/arch-ep93xx/memory.h
new file mode 100644
index 000000000000..4b1a5c7c8363
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/memory.h
@@ -0,0 +1,14 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/memory.h
3 */
4
5#ifndef __ASM_ARCH_MEMORY_H
6#define __ASM_ARCH_MEMORY_H
7
8#define PHYS_OFFSET UL(0x00000000)
9
10#define __bus_to_virt(x) __phys_to_virt(x)
11#define __virt_to_bus(x) __virt_to_phys(x)
12
13
14#endif
diff --git a/include/asm-arm/arch-ep93xx/platform.h b/include/asm-arm/arch-ep93xx/platform.h
new file mode 100644
index 000000000000..df9cbb6ef660
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/platform.h
@@ -0,0 +1,14 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/platform.h
3 */
4
5#ifndef __ASSEMBLY__
6
7void ep93xx_map_io(void);
8void ep93xx_init_irq(void);
9void ep93xx_init_time(unsigned long);
10void ep93xx_init_devices(void);
11extern struct sys_timer ep93xx_timer;
12
13
14#endif
diff --git a/include/asm-arm/arch-ep93xx/system.h b/include/asm-arm/arch-ep93xx/system.h
new file mode 100644
index 000000000000..79b718586746
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/system.h
@@ -0,0 +1,26 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/system.h
3 */
4
5#include <asm/hardware.h>
6
7static inline void arch_idle(void)
8{
9 cpu_do_idle();
10}
11
12static inline void arch_reset(char mode)
13{
14 u32 devicecfg;
15
16 local_irq_disable();
17
18 devicecfg = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG);
19 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
20 __raw_writel(devicecfg | 0x80000000, EP93XX_SYSCON_DEVICE_CONFIG);
21 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
22 __raw_writel(devicecfg & ~0x80000000, EP93XX_SYSCON_DEVICE_CONFIG);
23
24 while (1)
25 ;
26}
diff --git a/include/asm-arm/arch-ep93xx/timex.h b/include/asm-arm/arch-ep93xx/timex.h
new file mode 100644
index 000000000000..4140bddc97e2
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/timex.h
@@ -0,0 +1,5 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/timex.h
3 */
4
5#define CLOCK_TICK_RATE 983040
diff --git a/include/asm-arm/arch-ep93xx/ts72xx.h b/include/asm-arm/arch-ep93xx/ts72xx.h
new file mode 100644
index 000000000000..412215e77f44
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/ts72xx.h
@@ -0,0 +1,90 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/ts72xx.h
3 */
4
5/*
6 * TS72xx memory map:
7 *
8 * virt phys size
9 * febff000 22000000 4K model number register
10 * febfe000 22400000 4K options register
11 * febfd000 22800000 4K options register #2
12 * febfc000 [67]0000000 4K NAND data register
13 * febfb000 [67]0400000 4K NAND control register
14 * febfa000 [67]0800000 4K NAND busy register
15 */
16
17#define TS72XX_MODEL_PHYS_BASE 0x22000000
18#define TS72XX_MODEL_VIRT_BASE 0xfebff000
19#define TS72XX_MODEL_SIZE 0x00001000
20
21#define TS72XX_MODEL_TS7200 0x00
22#define TS72XX_MODEL_TS7250 0x01
23#define TS72XX_MODEL_TS7260 0x02
24
25
26#define TS72XX_OPTIONS_PHYS_BASE 0x22400000
27#define TS72XX_OPTIONS_VIRT_BASE 0xfebfe000
28#define TS72XX_OPTIONS_SIZE 0x00001000
29
30#define TS72XX_OPTIONS_COM2_RS485 0x02
31#define TS72XX_OPTIONS_MAX197 0x01
32
33
34#define TS72XX_OPTIONS2_PHYS_BASE 0x22800000
35#define TS72XX_OPTIONS2_VIRT_BASE 0xfebfd000
36#define TS72XX_OPTIONS2_SIZE 0x00001000
37
38#define TS72XX_OPTIONS2_TS9420 0x04
39#define TS72XX_OPTIONS2_TS9420_BOOT 0x02
40
41
42#define TS72XX_NOR_PHYS_BASE 0x60000000
43#define TS72XX_NOR2_PHYS_BASE 0x62000000
44
45#define TS72XX_NAND1_DATA_PHYS_BASE 0x60000000
46#define TS72XX_NAND2_DATA_PHYS_BASE 0x70000000
47#define TS72XX_NAND_DATA_VIRT_BASE 0xfebfc000
48#define TS72XX_NAND_DATA_SIZE 0x00001000
49
50#define TS72XX_NAND1_CONTROL_PHYS_BASE 0x60400000
51#define TS72XX_NAND2_CONTROL_PHYS_BASE 0x70400000
52#define TS72XX_NAND_CONTROL_VIRT_BASE 0xfebfb000
53#define TS72XX_NAND_CONTROL_SIZE 0x00001000
54
55#define TS72XX_NAND1_BUSY_PHYS_BASE 0x60800000
56#define TS72XX_NAND2_BUSY_PHYS_BASE 0x70800000
57#define TS72XX_NAND_BUSY_VIRT_BASE 0xfebfa000
58#define TS72XX_NAND_BUSY_SIZE 0x00001000
59
60
61#ifndef __ASSEMBLY__
62#include <asm/io.h>
63
64static inline int board_is_ts7200(void)
65{
66 return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7200;
67}
68
69static inline int board_is_ts7250(void)
70{
71 return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7250;
72}
73
74static inline int board_is_ts7260(void)
75{
76 return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7260;
77}
78
79static inline int is_max197_installed(void)
80{
81 return !!(__raw_readb(TS72XX_OPTIONS_VIRT_BASE) &
82 TS72XX_OPTIONS_MAX197);
83}
84
85static inline int is_ts9420_installed(void)
86{
87 return !!(__raw_readb(TS72XX_OPTIONS2_VIRT_BASE) &
88 TS72XX_OPTIONS2_TS9420);
89}
90#endif
diff --git a/include/asm-arm/arch-ep93xx/uncompress.h b/include/asm-arm/arch-ep93xx/uncompress.h
new file mode 100644
index 000000000000..4410d217077e
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/uncompress.h
@@ -0,0 +1,53 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/uncompress.h
3 *
4 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
10 */
11
12#include <asm/arch/ep93xx-regs.h>
13
14static unsigned char __raw_readb(unsigned int ptr)
15{
16 return *((volatile unsigned char *)ptr);
17}
18
19static void __raw_writeb(unsigned char value, unsigned int ptr)
20{
21 *((volatile unsigned char *)ptr) = value;
22}
23
24
25#define PHYS_UART1_DATA 0x808c0000
26#define PHYS_UART1_FLAG 0x808c0018
27#define UART1_FLAG_TXFF 0x20
28
29static __inline__ void putc(char c)
30{
31 int i;
32
33 for (i = 0; i < 1000; i++) {
34 /* Transmit fifo not full? */
35 if (!(__raw_readb(PHYS_UART1_FLAG) & UART1_FLAG_TXFF))
36 break;
37 }
38
39 __raw_writeb(c, PHYS_UART1_DATA);
40}
41
42static void putstr(const char *s)
43{
44 while (*s) {
45 putc(*s);
46 if (*s == '\n')
47 putc('\r');
48 s++;
49 }
50}
51
52#define arch_decomp_setup()
53#define arch_decomp_wdog()
diff --git a/include/asm-arm/arch-ep93xx/vmalloc.h b/include/asm-arm/arch-ep93xx/vmalloc.h
new file mode 100644
index 000000000000..205ea6b1cf5e
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/vmalloc.h
@@ -0,0 +1,5 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfe800000
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-14 18:23:31 -0500