3 files changed, 35 insertions, 7 deletions

diff --git a/arch/ppc/syslib/open_pic.c b/arch/ppc/syslib/open_pic.c
index b45d8268bf93..ad39b86ca92c 100644
--- a/arch/ppc/syslib/open_pic.c
+++ b/arch/ppc/syslib/open_pic.c
@@ -370,8 +370,9 @@ void __init openpic_init(int offset)
         /* Initialize IPI interrupts */
         if ( ppc_md.progress ) ppc_md.progress("openpic: ipi",0x3bb);
         for (i = 0; i < OPENPIC_NUM_IPI; i++) {
-                /* Disabled, Priority 10..13 */
-                openpic_initipi(i, 10+i, OPENPIC_VEC_IPI+i+offset);
+                /* Disabled, increased priorities 10..13 */
+                openpic_initipi(i, OPENPIC_PRIORITY_IPI_BASE+i,
+                                OPENPIC_VEC_IPI+i+offset);
                 /* IPIs are per-CPU */
                 irq_desc[OPENPIC_VEC_IPI+i+offset].status |= IRQ_PER_CPU;
                 irq_desc[OPENPIC_VEC_IPI+i+offset].handler = &open_pic_ipi;
@@ -399,8 +400,9 @@ void __init openpic_init(int offset)
                 if (sense & IRQ_SENSE_MASK)
                         irq_desc[i+offset].status = IRQ_LEVEL;
 
-                /* Enabled, Priority 8 */
-                openpic_initirq(i, 8, i+offset, (sense & IRQ_POLARITY_MASK),
+                /* Enabled, Default priority */
+                openpic_initirq(i, OPENPIC_PRIORITY_DEFAULT, i+offset,
+                                (sense & IRQ_POLARITY_MASK),
                                 (sense & IRQ_SENSE_MASK));
                 /* Processor 0 */
                 openpic_mapirq(i, CPU_MASK_CPU0, CPU_MASK_NONE);
@@ -656,6 +658,18 @@ static void __init openpic_maptimer(u_int timer, cpumask_t cpumask)
 }
 
 /*
+ * Change the priority of an interrupt
+ */
+void __init
+openpic_set_irq_priority(u_int irq, u_int pri)
+{
+        check_arg_irq(irq);
+        openpic_safe_writefield(&ISR[irq - open_pic_irq_offset]->Vector_Priority,
+                                OPENPIC_PRIORITY_MASK,
+                                pri << OPENPIC_PRIORITY_SHIFT);
+}
+
+/*
  * Initalize the interrupt source which will generate an NMI.
  * This raises the interrupt's priority from 8 to 9.
  *
@@ -665,9 +679,7 @@ void __init
 openpic_init_nmi_irq(u_int irq)
 {
         check_arg_irq(irq);
-        openpic_safe_writefield(&ISR[irq - open_pic_irq_offset]->Vector_Priority,
-                                OPENPIC_PRIORITY_MASK,
-                                9 << OPENPIC_PRIORITY_SHIFT);
+        openpic_set_irq_priority(irq, OPENPIC_PRIORITY_NMI);
 }
 
 /*
diff --git a/drivers/macintosh/via-pmu.c b/drivers/macintosh/via-pmu.c
index b941ee220997..5375df03c6f3 100644
--- a/drivers/macintosh/via-pmu.c
+++ b/drivers/macintosh/via-pmu.c
@@ -63,6 +63,10 @@
 #include <asm/backlight.h>
 #endif
 
+#ifdef CONFIG_PPC32
+#include <asm/open_pic.h>
+#endif
+
 /* Some compile options */
 #undef SUSPEND_USES_PMU
 #define DEBUG_SLEEP
@@ -407,6 +411,12 @@ static int __init via_pmu_start(void)
         batt_req.complete = 1;
 #endif
 
+#ifdef CONFIG_PPC32
+        if (pmu_kind == PMU_KEYLARGO_BASED)
+                openpic_set_irq_priority(vias->intrs[0].line,
+                                         OPENPIC_PRIORITY_DEFAULT + 1);
+#endif
+
         if (request_irq(vias->intrs[0].line, via_pmu_interrupt, 0, "VIA-PMU",
                         (void *)0)) {
                 printk(KERN_ERR "VIA-PMU: can't get irq %d\n",
diff --git a/include/asm-ppc/open_pic.h b/include/asm-ppc/open_pic.h
index dbe853319741..7848aa610c05 100644
--- a/include/asm-ppc/open_pic.h
+++ b/include/asm-ppc/open_pic.h
@@ -25,6 +25,11 @@
 #define OPENPIC_VEC_IPI         118     /* and up */
 #define OPENPIC_VEC_SPURIOUS    255
 
+/* Priorities */
+#define OPENPIC_PRIORITY_IPI_BASE       10
+#define OPENPIC_PRIORITY_DEFAULT        4
+#define OPENPIC_PRIORITY_NMI            9
+
 /* OpenPIC IRQ controller structure */
 extern struct hw_interrupt_type open_pic;
 
@@ -42,6 +47,7 @@ extern int epic_serial_mode;
 extern void openpic_set_sources(int first_irq, int num_irqs, void __iomem *isr);
 extern void openpic_init(int linux_irq_offset);
 extern void openpic_init_nmi_irq(u_int irq);
+extern void openpic_set_irq_priority(u_int irq, u_int pri);
 extern void openpic_hookup_cascade(u_int irq, char *name,
                                    int (*cascade_fn)(struct pt_regs *));
 extern u_int openpic_irq(void);