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-rw-r--r--drivers/gpu/drm/radeon/r100.c20
-rw-r--r--drivers/gpu/drm/radeon/r300.c23
-rw-r--r--drivers/gpu/drm/radeon/radeon.h51
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c13
-rw-r--r--drivers/gpu/drm/radeon/rv515.c19
5 files changed, 47 insertions, 79 deletions
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index e1a6e82b9960..90ff8e0ac04e 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -1622,26 +1622,6 @@ void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
1622 r100_pll_errata_after_data(rdev); 1622 r100_pll_errata_after_data(rdev);
1623} 1623}
1624 1624
1625uint32_t r100_mm_rreg(struct radeon_device *rdev, uint32_t reg)
1626{
1627 if (reg < 0x10000)
1628 return readl(((void __iomem *)rdev->rmmio) + reg);
1629 else {
1630 writel(reg, ((void __iomem *)rdev->rmmio) + RADEON_MM_INDEX);
1631 return readl(((void __iomem *)rdev->rmmio) + RADEON_MM_DATA);
1632 }
1633}
1634
1635void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
1636{
1637 if (reg < 0x10000)
1638 writel(v, ((void __iomem *)rdev->rmmio) + reg);
1639 else {
1640 writel(reg, ((void __iomem *)rdev->rmmio) + RADEON_MM_INDEX);
1641 writel(v, ((void __iomem *)rdev->rmmio) + RADEON_MM_DATA);
1642 }
1643}
1644
1645int r100_init(struct radeon_device *rdev) 1625int r100_init(struct radeon_device *rdev)
1646{ 1626{
1647 return 0; 1627 return 0;
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 8594486e1625..c47579dcafa1 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -83,8 +83,8 @@ void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev)
83 WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp | RADEON_PCIE_TX_GART_INVALIDATE_TLB); 83 WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp | RADEON_PCIE_TX_GART_INVALIDATE_TLB);
84 (void)RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL); 84 (void)RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL);
85 WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp); 85 WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp);
86 mb();
87 } 86 }
87 mb();
88} 88}
89 89
90int rv370_pcie_gart_enable(struct radeon_device *rdev) 90int rv370_pcie_gart_enable(struct radeon_device *rdev)
@@ -593,27 +593,6 @@ void r300_vram_info(struct radeon_device *rdev)
593 593
594 594
595/* 595/*
596 * Indirect registers accessor
597 */
598uint32_t rv370_pcie_rreg(struct radeon_device *rdev, uint32_t reg)
599{
600 uint32_t r;
601
602 WREG8(RADEON_PCIE_INDEX, ((reg) & 0xff));
603 (void)RREG32(RADEON_PCIE_INDEX);
604 r = RREG32(RADEON_PCIE_DATA);
605 return r;
606}
607
608void rv370_pcie_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
609{
610 WREG8(RADEON_PCIE_INDEX, ((reg) & 0xff));
611 (void)RREG32(RADEON_PCIE_INDEX);
612 WREG32(RADEON_PCIE_DATA, (v));
613 (void)RREG32(RADEON_PCIE_DATA);
614}
615
616/*
617 * PCIE Lanes 596 * PCIE Lanes
618 */ 597 */
619 598
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 346112740846..87170a56e37b 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -667,14 +667,11 @@ struct radeon_device {
667 resource_size_t rmmio_base; 667 resource_size_t rmmio_base;
668 resource_size_t rmmio_size; 668 resource_size_t rmmio_size;
669 void *rmmio; 669 void *rmmio;
670 radeon_rreg_t mm_rreg;
671 radeon_wreg_t mm_wreg;
672 radeon_rreg_t mc_rreg; 670 radeon_rreg_t mc_rreg;
673 radeon_wreg_t mc_wreg; 671 radeon_wreg_t mc_wreg;
674 radeon_rreg_t pll_rreg; 672 radeon_rreg_t pll_rreg;
675 radeon_wreg_t pll_wreg; 673 radeon_wreg_t pll_wreg;
676 radeon_rreg_t pcie_rreg; 674 uint32_t pcie_reg_mask;
677 radeon_wreg_t pcie_wreg;
678 radeon_rreg_t pciep_rreg; 675 radeon_rreg_t pciep_rreg;
679 radeon_wreg_t pciep_wreg; 676 radeon_wreg_t pciep_wreg;
680 struct radeon_clock clock; 677 struct radeon_clock clock;
@@ -706,22 +703,42 @@ int radeon_device_init(struct radeon_device *rdev,
706void radeon_device_fini(struct radeon_device *rdev); 703void radeon_device_fini(struct radeon_device *rdev);
707int radeon_gpu_wait_for_idle(struct radeon_device *rdev); 704int radeon_gpu_wait_for_idle(struct radeon_device *rdev);
708 705
706static inline uint32_t r100_mm_rreg(struct radeon_device *rdev, uint32_t reg)
707{
708 if (reg < 0x10000)
709 return readl(((void __iomem *)rdev->rmmio) + reg);
710 else {
711 writel(reg, ((void __iomem *)rdev->rmmio) + RADEON_MM_INDEX);
712 return readl(((void __iomem *)rdev->rmmio) + RADEON_MM_DATA);
713 }
714}
715
716static inline void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
717{
718 if (reg < 0x10000)
719 writel(v, ((void __iomem *)rdev->rmmio) + reg);
720 else {
721 writel(reg, ((void __iomem *)rdev->rmmio) + RADEON_MM_INDEX);
722 writel(v, ((void __iomem *)rdev->rmmio) + RADEON_MM_DATA);
723 }
724}
725
709 726
710/* 727/*
711 * Registers read & write functions. 728 * Registers read & write functions.
712 */ 729 */
713#define RREG8(reg) readb(((void __iomem *)rdev->rmmio) + (reg)) 730#define RREG8(reg) readb(((void __iomem *)rdev->rmmio) + (reg))
714#define WREG8(reg, v) writeb(v, ((void __iomem *)rdev->rmmio) + (reg)) 731#define WREG8(reg, v) writeb(v, ((void __iomem *)rdev->rmmio) + (reg))
715#define RREG32(reg) rdev->mm_rreg(rdev, (reg)) 732#define RREG32(reg) r100_mm_rreg(rdev, (reg))
716#define WREG32(reg, v) rdev->mm_wreg(rdev, (reg), (v)) 733#define WREG32(reg, v) r100_mm_wreg(rdev, (reg), (v))
717#define REG_SET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK) 734#define REG_SET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK)
718#define REG_GET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK) 735#define REG_GET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK)
719#define RREG32_PLL(reg) rdev->pll_rreg(rdev, (reg)) 736#define RREG32_PLL(reg) rdev->pll_rreg(rdev, (reg))
720#define WREG32_PLL(reg, v) rdev->pll_wreg(rdev, (reg), (v)) 737#define WREG32_PLL(reg, v) rdev->pll_wreg(rdev, (reg), (v))
721#define RREG32_MC(reg) rdev->mc_rreg(rdev, (reg)) 738#define RREG32_MC(reg) rdev->mc_rreg(rdev, (reg))
722#define WREG32_MC(reg, v) rdev->mc_wreg(rdev, (reg), (v)) 739#define WREG32_MC(reg, v) rdev->mc_wreg(rdev, (reg), (v))
723#define RREG32_PCIE(reg) rdev->pcie_rreg(rdev, (reg)) 740#define RREG32_PCIE(reg) rv370_pcie_rreg(rdev, (reg))
724#define WREG32_PCIE(reg, v) rdev->pcie_wreg(rdev, (reg), (v)) 741#define WREG32_PCIE(reg, v) rv370_pcie_wreg(rdev, (reg), (v))
725#define WREG32_P(reg, val, mask) \ 742#define WREG32_P(reg, val, mask) \
726 do { \ 743 do { \
727 uint32_t tmp_ = RREG32(reg); \ 744 uint32_t tmp_ = RREG32(reg); \
@@ -737,6 +754,24 @@ int radeon_gpu_wait_for_idle(struct radeon_device *rdev);
737 WREG32_PLL(reg, tmp_); \ 754 WREG32_PLL(reg, tmp_); \
738 } while (0) 755 } while (0)
739 756
757/*
758 * Indirect registers accessor
759 */
760static inline uint32_t rv370_pcie_rreg(struct radeon_device *rdev, uint32_t reg)
761{
762 uint32_t r;
763
764 WREG32(RADEON_PCIE_INDEX, ((reg) & rdev->pcie_reg_mask));
765 r = RREG32(RADEON_PCIE_DATA);
766 return r;
767}
768
769static inline void rv370_pcie_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
770{
771 WREG32(RADEON_PCIE_INDEX, ((reg) & rdev->pcie_reg_mask));
772 WREG32(RADEON_PCIE_DATA, (v));
773}
774
740void r100_pll_errata_after_index(struct radeon_device *rdev); 775void r100_pll_errata_after_index(struct radeon_device *rdev);
741 776
742 777
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index 9ff6dcb97f9d..7693f7c67bd3 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -225,25 +225,18 @@ void radeon_invalid_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
225 225
226void radeon_register_accessor_init(struct radeon_device *rdev) 226void radeon_register_accessor_init(struct radeon_device *rdev)
227{ 227{
228 rdev->mm_rreg = &r100_mm_rreg;
229 rdev->mm_wreg = &r100_mm_wreg;
230 rdev->mc_rreg = &radeon_invalid_rreg; 228 rdev->mc_rreg = &radeon_invalid_rreg;
231 rdev->mc_wreg = &radeon_invalid_wreg; 229 rdev->mc_wreg = &radeon_invalid_wreg;
232 rdev->pll_rreg = &radeon_invalid_rreg; 230 rdev->pll_rreg = &radeon_invalid_rreg;
233 rdev->pll_wreg = &radeon_invalid_wreg; 231 rdev->pll_wreg = &radeon_invalid_wreg;
234 rdev->pcie_rreg = &radeon_invalid_rreg;
235 rdev->pcie_wreg = &radeon_invalid_wreg;
236 rdev->pciep_rreg = &radeon_invalid_rreg; 232 rdev->pciep_rreg = &radeon_invalid_rreg;
237 rdev->pciep_wreg = &radeon_invalid_wreg; 233 rdev->pciep_wreg = &radeon_invalid_wreg;
238 234
239 /* Don't change order as we are overridding accessor. */ 235 /* Don't change order as we are overridding accessor. */
240 if (rdev->family < CHIP_RV515) { 236 if (rdev->family < CHIP_RV515) {
241 rdev->pcie_rreg = &rv370_pcie_rreg; 237 rdev->pcie_reg_mask = 0xff;
242 rdev->pcie_wreg = &rv370_pcie_wreg; 238 } else {
243 } 239 rdev->pcie_reg_mask = 0x7ff;
244 if (rdev->family >= CHIP_RV515) {
245 rdev->pcie_rreg = &rv515_pcie_rreg;
246 rdev->pcie_wreg = &rv515_pcie_wreg;
247 } 240 }
248 /* FIXME: not sure here */ 241 /* FIXME: not sure here */
249 if (rdev->family <= CHIP_R580) { 242 if (rdev->family <= CHIP_R580) {
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index fd8f3ca716ea..31a7f668ae5a 100644
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -400,25 +400,6 @@ void rv515_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
400 WREG32(MC_IND_INDEX, 0); 400 WREG32(MC_IND_INDEX, 0);
401} 401}
402 402
403uint32_t rv515_pcie_rreg(struct radeon_device *rdev, uint32_t reg)
404{
405 uint32_t r;
406
407 WREG32(PCIE_INDEX, ((reg) & 0x7ff));
408 (void)RREG32(PCIE_INDEX);
409 r = RREG32(PCIE_DATA);
410 return r;
411}
412
413void rv515_pcie_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
414{
415 WREG32(PCIE_INDEX, ((reg) & 0x7ff));
416 (void)RREG32(PCIE_INDEX);
417 WREG32(PCIE_DATA, (v));
418 (void)RREG32(PCIE_DATA);
419}
420
421
422/* 403/*
423 * Debugfs info 404 * Debugfs info
424 */ 405 */