2 files changed, 20 insertions, 3 deletions

diff --git a/Documentation/powerpc/dts-bindings/fsl/ssi.txt b/Documentation/powerpc/dts-bindings/fsl/ssi.txt
index d100555d488a..5d9841303cae 100644
--- a/Documentation/powerpc/dts-bindings/fsl/ssi.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/ssi.txt
@@ -24,6 +24,12 @@ Required properties:
                     "rj-master" - r.j., SSI is clock master
                     "ac97-slave" - AC97 mode, SSI is clock slave
                     "ac97-master" - AC97 mode, SSI is clock master
+- fsl,playback-dma: phandle to a DMA node for the DMA channel to use for
+                    playback of audio.  This is typically dictated by SOC
+                    design.  See the notes below.
+- fsl,capture-dma:  phandle to a DMA node for the DMA channel to use for
+                    capture (recording) of audio.  This is typically dictated
+                    by SOC design.  See the notes below.
 
 Optional properties:
 - codec-handle    : phandle to a 'codec' node that defines an audio
@@ -36,3 +42,12 @@ Child 'codec' node required properties:
 Child 'codec' node optional properties:
 - clock-frequency  : The frequency of the input clock, which typically
                      comes from an on-board dedicated oscillator.
+
+Notes on fsl,playback-dma and fsl,capture-dma:
+
+On SOCs that have an SSI, specific DMA channels are hard-wired for playback
+and capture.  On the MPC8610, for example, SSI1 must use DMA channel 0 for
+playback and DMA channel 1 for capture.  SSI2 must use DMA channel 2 for
+playback and DMA channel 3 for capture.  The developer can choose which
+DMA controller to use, but the channels themselves are hard-wired.  The
+purpose of these two properties is to represent this hardware design.
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index 3b3a1062cb25..0f3a36e0ea6d 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -207,7 +207,7 @@
                         reg = <0xe4000 0x100>;
                 };
 
-                i2s@16000 {
+                ssi@16000 {
                         compatible = "fsl,mpc8610-ssi";
                         cell-index = <0>;
                         reg = <0x16000 0x100>;
@@ -215,6 +215,8 @@
                         interrupts = <62 2>;
                         fsl,mode = "i2s-slave";
                         codec-handle = <&cs4270>;
+                        fsl,playback-dma = <&dma00>;
+                        fsl,capture-dma = <&dma01>;
                 };
 
                 ssi@16100 {
@@ -233,7 +235,7 @@
                         reg = <0x21300 0x4>; /* DMA general status register */
                         ranges = <0x0 0x21100 0x200>;
 
-                        dma-channel@0 {
+                        dma00: dma-channel@0 {
                                 compatible = "fsl,mpc8610-dma-channel",
                                         "fsl,eloplus-dma-channel";
                                 cell-index = <0>;
@@ -241,7 +243,7 @@
                                 interrupt-parent = <&mpic>;
                                 interrupts = <20 2>;
                         };
-                        dma-channel@1 {
+                        dma01: dma-channel@1 {
                                 compatible = "fsl,mpc8610-dma-channel",
                                         "fsl,eloplus-dma-channel";
                                 cell-index = <1>;