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-rw-r--r--arch/powerpc/platforms/cell/spu_base.c27
-rw-r--r--arch/powerpc/platforms/cell/spufs/Makefile4
-rw-r--r--arch/powerpc/platforms/cell/spufs/context.c18
-rw-r--r--arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped231
-rw-r--r--arch/powerpc/platforms/cell/spufs/spu_save_dump.h_shipped191
-rw-r--r--arch/powerpc/platforms/cell/spufs/spufs.h2
-rw-r--r--arch/powerpc/platforms/cell/spufs/switch.c174
-rw-r--r--include/asm-powerpc/spu.h76
-rw-r--r--include/asm-powerpc/spu_csa.h256
9 files changed, 975 insertions, 4 deletions
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index 9e9096590a07..44492d87cdf7 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -62,7 +62,9 @@ static int __spu_trap_error(struct spu *spu)
62static void spu_restart_dma(struct spu *spu) 62static void spu_restart_dma(struct spu *spu)
63{ 63{
64 struct spu_priv2 __iomem *priv2 = spu->priv2; 64 struct spu_priv2 __iomem *priv2 = spu->priv2;
65 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND); 65
66 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING_nr, &spu->flags))
67 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
66} 68}
67 69
68static int __spu_trap_data_seg(struct spu *spu, unsigned long ea) 70static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
@@ -72,6 +74,11 @@ static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
72 74
73 pr_debug("%s\n", __FUNCTION__); 75 pr_debug("%s\n", __FUNCTION__);
74 76
77 if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE_nr, &spu->flags)) {
78 printk("%s: invalid access during switch!\n", __func__);
79 return 1;
80 }
81
75 if (REGION_ID(ea) != USER_REGION_ID) { 82 if (REGION_ID(ea) != USER_REGION_ID) {
76 pr_debug("invalid region access at %016lx\n", ea); 83 pr_debug("invalid region access at %016lx\n", ea);
77 return 1; 84 return 1;
@@ -98,6 +105,7 @@ static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
98 return 0; 105 return 0;
99} 106}
100 107
108extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); //XXX
101static int __spu_trap_data_map(struct spu *spu, unsigned long ea) 109static int __spu_trap_data_map(struct spu *spu, unsigned long ea)
102{ 110{
103 unsigned long dsisr; 111 unsigned long dsisr;
@@ -107,8 +115,21 @@ static int __spu_trap_data_map(struct spu *spu, unsigned long ea)
107 priv1 = spu->priv1; 115 priv1 = spu->priv1;
108 dsisr = in_be64(&priv1->mfc_dsisr_RW); 116 dsisr = in_be64(&priv1->mfc_dsisr_RW);
109 117
110 wake_up(&spu->stop_wq); 118 /* Handle kernel space hash faults immediately.
119 User hash faults need to be deferred to process context. */
120 if ((dsisr & MFC_DSISR_PTE_NOT_FOUND)
121 && REGION_ID(ea) != USER_REGION_ID
122 && hash_page(ea, _PAGE_PRESENT, 0x300) == 0) {
123 spu_restart_dma(spu);
124 return 0;
125 }
126
127 if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE_nr, &spu->flags)) {
128 printk("%s: invalid access during switch!\n", __func__);
129 return 1;
130 }
111 131
132 wake_up(&spu->stop_wq);
112 return 0; 133 return 0;
113} 134}
114 135
@@ -382,7 +403,6 @@ void spu_free(struct spu *spu)
382} 403}
383EXPORT_SYMBOL(spu_free); 404EXPORT_SYMBOL(spu_free);
384 405
385extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); //XXX
386static int spu_handle_mm_fault(struct spu *spu) 406static int spu_handle_mm_fault(struct spu *spu)
387{ 407{
388 struct spu_priv1 __iomem *priv1; 408 struct spu_priv1 __iomem *priv1;
@@ -650,6 +670,7 @@ static int __init create_spu(struct device_node *spe)
650 spu->slb_replace = 0; 670 spu->slb_replace = 0;
651 spu->mm = NULL; 671 spu->mm = NULL;
652 spu->class_0_pending = 0; 672 spu->class_0_pending = 0;
673 spu->flags = 0UL;
653 spin_lock_init(&spu->register_lock); 674 spin_lock_init(&spu->register_lock);
654 675
655 out_be64(&spu->priv1->mfc_sdr_RW, mfspr(SPRN_SDR1)); 676 out_be64(&spu->priv1->mfc_sdr_RW, mfspr(SPRN_SDR1));
diff --git a/arch/powerpc/platforms/cell/spufs/Makefile b/arch/powerpc/platforms/cell/spufs/Makefile
index 6f496e37bcb7..e70e3cc1158f 100644
--- a/arch/powerpc/platforms/cell/spufs/Makefile
+++ b/arch/powerpc/platforms/cell/spufs/Makefile
@@ -1,3 +1,5 @@
1obj-$(CONFIG_SPU_FS) += spufs.o 1obj-$(CONFIG_SPU_FS) += spufs.o
2 2
3spufs-y += inode.o file.o context.o syscalls.o 3spufs-y += inode.o file.o context.o switch.o syscalls.o
4
5$(obj)/switch.o: $(obj)/spu_save_dump.h $(obj)/spu_restore_dump.h
diff --git a/arch/powerpc/platforms/cell/spufs/context.c b/arch/powerpc/platforms/cell/spufs/context.c
index a69b85e2778a..41eea4576b6d 100644
--- a/arch/powerpc/platforms/cell/spufs/context.c
+++ b/arch/powerpc/platforms/cell/spufs/context.c
@@ -22,6 +22,7 @@
22 22
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include <asm/spu.h> 24#include <asm/spu.h>
25#include <asm/spu_csa.h>
25#include "spufs.h" 26#include "spufs.h"
26 27
27struct spu_context *alloc_spu_context(void) 28struct spu_context *alloc_spu_context(void)
@@ -30,9 +31,25 @@ struct spu_context *alloc_spu_context(void)
30 ctx = kmalloc(sizeof *ctx, GFP_KERNEL); 31 ctx = kmalloc(sizeof *ctx, GFP_KERNEL);
31 if (!ctx) 32 if (!ctx)
32 goto out; 33 goto out;
34 /* Future enhancement: do not call spu_alloc()
35 * here. This step should be deferred until
36 * spu_run()!!
37 *
38 * More work needs to be done to read(),
39 * write(), mmap(), etc., so that operations
40 * are performed on CSA when the context is
41 * not currently being run. In this way we
42 * can support arbitrarily large number of
43 * entries in /spu, allow state queries, etc.
44 */
33 ctx->spu = spu_alloc(); 45 ctx->spu = spu_alloc();
34 if (!ctx->spu) 46 if (!ctx->spu)
35 goto out_free; 47 goto out_free;
48 spu_init_csa(&ctx->csa);
49 if (!ctx->csa.lscsa) {
50 spu_free(ctx->spu);
51 goto out_free;
52 }
36 init_rwsem(&ctx->backing_sema); 53 init_rwsem(&ctx->backing_sema);
37 spin_lock_init(&ctx->mmio_lock); 54 spin_lock_init(&ctx->mmio_lock);
38 kref_init(&ctx->kref); 55 kref_init(&ctx->kref);
@@ -50,6 +67,7 @@ void destroy_spu_context(struct kref *kref)
50 ctx = container_of(kref, struct spu_context, kref); 67 ctx = container_of(kref, struct spu_context, kref);
51 if (ctx->spu) 68 if (ctx->spu)
52 spu_free(ctx->spu); 69 spu_free(ctx->spu);
70 spu_fini_csa(&ctx->csa);
53 kfree(ctx); 71 kfree(ctx);
54} 72}
55 73
diff --git a/arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped b/arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped
new file mode 100644
index 000000000000..1b2355ff7036
--- /dev/null
+++ b/arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped
@@ -0,0 +1,231 @@
1/*
2 * spu_restore_dump.h: Copyright (C) 2005 IBM.
3 * Hex-dump auto generated from spu_restore.c.
4 * Do not edit!
5 */
6static unsigned int spu_restore_code[] __page_aligned = {
70x40800000, 0x409ff801, 0x24000080, 0x24fd8081,
80x1cd80081, 0x33001180, 0x42030003, 0x33800284,
90x1c010204, 0x40200000, 0x40200000, 0x40200000,
100x34000190, 0x34004191, 0x34008192, 0x3400c193,
110x141fc205, 0x23fffd84, 0x1c100183, 0x217ffa85,
120x3080a000, 0x3080a201, 0x3080a402, 0x3080a603,
130x3080a804, 0x3080aa05, 0x3080ac06, 0x3080ae07,
140x3080b008, 0x3080b209, 0x3080b40a, 0x3080b60b,
150x3080b80c, 0x3080ba0d, 0x3080bc0e, 0x3080be0f,
160x00003ffc, 0x00000000, 0x00000000, 0x00000000,
170x01a00182, 0x3ec00083, 0xb0a14103, 0x01a00204,
180x3ec10082, 0x4202800e, 0x04000703, 0xb0a14202,
190x21a00803, 0x3fbf028d, 0x3f20068d, 0x3fbe0682,
200x3fe30102, 0x21a00882, 0x3f82028f, 0x3fe3078f,
210x3fbf0784, 0x3f200204, 0x3fbe0204, 0x3fe30204,
220x04000203, 0x21a00903, 0x40848002, 0x21a00982,
230x40800003, 0x21a00a03, 0x40802002, 0x21a00a82,
240x21a00083, 0x40800082, 0x21a00b02, 0x10002818,
250x40a80002, 0x32800007, 0x4207000c, 0x18008208,
260x40a0000b, 0x4080020a, 0x40800709, 0x00200000,
270x42070002, 0x3ac30384, 0x1cffc489, 0x00200000,
280x18008383, 0x38830382, 0x4cffc486, 0x3ac28185,
290xb0408584, 0x28830382, 0x1c020387, 0x38828182,
300xb0408405, 0x1802c408, 0x28828182, 0x217ff886,
310x04000583, 0x21a00803, 0x3fbe0682, 0x3fe30102,
320x04000106, 0x21a00886, 0x04000603, 0x21a00903,
330x40803c02, 0x21a00982, 0x40800003, 0x04000184,
340x21a00a04, 0x40802202, 0x21a00a82, 0x42028005,
350x34208702, 0x21002282, 0x21a00804, 0x21a00886,
360x3fbf0782, 0x3f200102, 0x3fbe0102, 0x3fe30102,
370x21a00902, 0x40804003, 0x21a00983, 0x21a00a04,
380x40805a02, 0x21a00a82, 0x40800083, 0x21a00b83,
390x01a00c02, 0x01a00d83, 0x3420c282, 0x21a00e02,
400x34210283, 0x21a00f03, 0x34200284, 0x77400200,
410x3421c282, 0x21a00702, 0x34218283, 0x21a00083,
420x34214282, 0x21a00b02, 0x4200480c, 0x00200000,
430x1c010286, 0x34220284, 0x34220302, 0x0f608203,
440x5c024204, 0x3b81810b, 0x42013c02, 0x00200000,
450x18008185, 0x38808183, 0x3b814182, 0x21004e84,
460x4020007f, 0x35000100, 0x000004e0, 0x000002a0,
470x000002e8, 0x00000428, 0x00000360, 0x000002e8,
480x000004a0, 0x00000468, 0x000003c8, 0x00000360,
490x409ffe02, 0x30801203, 0x40800204, 0x3ec40085,
500x10009c09, 0x3ac10606, 0xb060c105, 0x4020007f,
510x4020007f, 0x20801203, 0x38810602, 0xb0408586,
520x28810602, 0x32004180, 0x34204702, 0x21a00382,
530x4020007f, 0x327fdc80, 0x409ffe02, 0x30801203,
540x40800204, 0x3ec40087, 0x40800405, 0x00200000,
550x40800606, 0x3ac10608, 0x3ac14609, 0x3ac1860a,
560xb060c107, 0x20801203, 0x41004003, 0x38810602,
570x4020007f, 0xb0408188, 0x4020007f, 0x28810602,
580x41201002, 0x38814603, 0x10009c09, 0xb060c109,
590x4020007f, 0x28814603, 0x41193f83, 0x38818602,
600x60ffc003, 0xb040818a, 0x28818602, 0x32003080,
610x409ffe02, 0x30801203, 0x40800204, 0x3ec40087,
620x41201008, 0x10009c14, 0x40800405, 0x3ac10609,
630x40800606, 0x3ac1460a, 0xb060c107, 0x3ac1860b,
640x20801203, 0x38810602, 0xb0408409, 0x28810602,
650x38814603, 0xb060c40a, 0x4020007f, 0x28814603,
660x41193f83, 0x38818602, 0x60ffc003, 0xb040818b,
670x28818602, 0x32002380, 0x409ffe02, 0x30801204,
680x40800205, 0x3ec40083, 0x40800406, 0x3ac14607,
690x3ac18608, 0xb0810103, 0x41004002, 0x20801204,
700x4020007f, 0x38814603, 0x10009c0b, 0xb060c107,
710x4020007f, 0x4020007f, 0x28814603, 0x38818602,
720x4020007f, 0x4020007f, 0xb0408588, 0x28818602,
730x4020007f, 0x32001780, 0x409ffe02, 0x1000640e,
740x40800204, 0x30801203, 0x40800405, 0x3ec40087,
750x40800606, 0x3ac10608, 0x3ac14609, 0x3ac1860a,
760xb060c107, 0x20801203, 0x413d8003, 0x38810602,
770x4020007f, 0x327fd780, 0x409ffe02, 0x10007f0c,
780x40800205, 0x30801204, 0x40800406, 0x3ec40083,
790x3ac14607, 0x3ac18608, 0xb0810103, 0x413d8002,
800x20801204, 0x38814603, 0x4020007f, 0x327feb80,
810x409ffe02, 0x30801203, 0x40800204, 0x3ec40087,
820x40800405, 0x1000650a, 0x40800606, 0x3ac10608,
830x3ac14609, 0x3ac1860a, 0xb060c107, 0x20801203,
840x38810602, 0xb0408588, 0x4020007f, 0x327fc980,
850x00400000, 0x40800003, 0x4020007f, 0x35000000,
860x00000000, 0x00000000, 0x00000000, 0x00000000,
870x00000000, 0x00000000, 0x00000000, 0x00000000,
880x00000000, 0x00000000, 0x00000000, 0x00000000,
890x00000000, 0x00000000, 0x00000000, 0x00000000,
900x00000000, 0x00000000, 0x00000000, 0x00000000,
910x00000000, 0x00000000, 0x00000000, 0x00000000,
920x00000000, 0x00000000, 0x00000000, 0x00000000,
930x00000000, 0x00000000, 0x00000000, 0x00000000,
940x00000000, 0x00000000, 0x00000000, 0x00000000,
950x00000000, 0x00000000, 0x00000000, 0x00000000,
960x00000000, 0x00000000, 0x00000000, 0x00000000,
970x00000000, 0x00000000, 0x00000000, 0x00000000,
980x00000000, 0x00000000, 0x00000000, 0x00000000,
990x00000000, 0x00000000, 0x00000000, 0x00000000,
1000x00000000, 0x00000000, 0x00000000, 0x00000000,
1010x00000000, 0x00000000, 0x00000000, 0x00000000,
1020x00000000, 0x00000000, 0x00000000, 0x00000000,
1030x00000000, 0x00000000, 0x00000000, 0x00000000,
1040x00000000, 0x00000000, 0x00000000, 0x00000000,
1050x00000000, 0x00000000, 0x00000000, 0x00000000,
1060x00000000, 0x00000000, 0x00000000, 0x00000000,
1070x00000000, 0x00000000, 0x00000000, 0x00000000,
1080x00000000, 0x00000000, 0x00000000, 0x00000000,
1090x00000000, 0x00000000, 0x00000000, 0x00000000,
1100x00000000, 0x00000000, 0x00000000, 0x00000000,
1110x00000000, 0x00000000, 0x00000000, 0x00000000,
1120x00000000, 0x00000000, 0x00000000, 0x00000000,
1130x00000000, 0x00000000, 0x00000000, 0x00000000,
1140x00000000, 0x00000000, 0x00000000, 0x00000000,
1150x00000000, 0x00000000, 0x00000000, 0x00000000,
1160x00000000, 0x00000000, 0x00000000, 0x00000000,
1170x00000000, 0x00000000, 0x00000000, 0x00000000,
1180x00000000, 0x00000000, 0x00000000, 0x00000000,
1190x00000000, 0x00000000, 0x00000000, 0x00000000,
1200x00000000, 0x00000000, 0x00000000, 0x00000000,
1210x00000000, 0x00000000, 0x00000000, 0x00000000,
1220x00000000, 0x00000000, 0x00000000, 0x00000000,
1230x00000000, 0x00000000, 0x00000000, 0x00000000,
1240x00000000, 0x00000000, 0x00000000, 0x00000000,
1250x00000000, 0x00000000, 0x00000000, 0x00000000,
1260x00000000, 0x00000000, 0x00000000, 0x00000000,
1270x00000000, 0x00000000, 0x00000000, 0x00000000,
1280x00000000, 0x00000000, 0x00000000, 0x00000000,
1290x00000000, 0x00000000, 0x00000000, 0x00000000,
1300x00000000, 0x00000000, 0x00000000, 0x00000000,
1310x00000000, 0x00000000, 0x00000000, 0x00000000,
1320x00000000, 0x00000000, 0x00000000, 0x00000000,
1330x00000000, 0x00000000, 0x00000000, 0x00000000,
1340x00000000, 0x00000000, 0x00000000, 0x00000000,
1350x00000000, 0x00000000, 0x00000000, 0x00000000,
1360x00000000, 0x00000000, 0x00000000, 0x00000000,
1370x00000000, 0x00000000, 0x00000000, 0x00000000,
1380x00000000, 0x00000000, 0x00000000, 0x00000000,
1390x00000000, 0x00000000, 0x00000000, 0x00000000,
1400x00000000, 0x00000000, 0x00000000, 0x00000000,
1410x00000000, 0x00000000, 0x00000000, 0x00000000,
1420x00000000, 0x00000000, 0x00000000, 0x00000000,
1430x00000000, 0x00000000, 0x00000000, 0x00000000,
1440x00000000, 0x00000000, 0x00000000, 0x00000000,
1450x00000000, 0x00000000, 0x00000000, 0x00000000,
1460x00000000, 0x00000000, 0x00000000, 0x00000000,
1470x00000000, 0x00000000, 0x00000000, 0x00000000,
1480x00000000, 0x00000000, 0x00000000, 0x00000000,
1490x00000000, 0x00000000, 0x00000000, 0x00000000,
1500x00000000, 0x00000000, 0x00000000, 0x00000000,
1510x00000000, 0x00000000, 0x00000000, 0x00000000,
1520x00000000, 0x00000000, 0x00000000, 0x00000000,
1530x00000000, 0x00000000, 0x00000000, 0x00000000,
1540x00000000, 0x00000000, 0x00000000, 0x00000000,
1550x00000000, 0x00000000, 0x00000000, 0x00000000,
1560x00000000, 0x00000000, 0x00000000, 0x00000000,
1570x00000000, 0x00000000, 0x00000000, 0x00000000,
1580x00000000, 0x00000000, 0x00000000, 0x00000000,
1590x00000000, 0x00000000, 0x00000000, 0x00000000,
1600x00000000, 0x00000000, 0x00000000, 0x00000000,
1610x00000000, 0x00000000, 0x00000000, 0x00000000,
1620x00000000, 0x00000000, 0x00000000, 0x00000000,
1630x00000000, 0x00000000, 0x00000000, 0x00000000,
1640x00000000, 0x00000000, 0x00000000, 0x00000000,
1650x00000000, 0x00000000, 0x00000000, 0x00000000,
1660x00000000, 0x00000000, 0x00000000, 0x00000000,
1670x00000000, 0x00000000, 0x00000000, 0x00000000,
1680x00000000, 0x00000000, 0x00000000, 0x00000000,
1690x00000000, 0x00000000, 0x00000000, 0x00000000,
1700x00000000, 0x00000000, 0x00000000, 0x00000000,
1710x00000000, 0x00000000, 0x00000000, 0x00000000,
1720x00000000, 0x00000000, 0x00000000, 0x00000000,
1730x00000000, 0x00000000, 0x00000000, 0x00000000,
1740x00000000, 0x00000000, 0x00000000, 0x00000000,
1750x00000000, 0x00000000, 0x00000000, 0x00000000,
1760x00000000, 0x00000000, 0x00000000, 0x00000000,
1770x00000000, 0x00000000, 0x00000000, 0x00000000,
1780x00000000, 0x00000000, 0x00000000, 0x00000000,
1790x00000000, 0x00000000, 0x00000000, 0x00000000,
1800x00000000, 0x00000000, 0x00000000, 0x00000000,
1810x00000000, 0x00000000, 0x00000000, 0x00000000,
1820x00000000, 0x00000000, 0x00000000, 0x00000000,
1830x00000000, 0x00000000, 0x00000000, 0x00000000,
1840x00000000, 0x00000000, 0x00000000, 0x00000000,
1850x00000000, 0x00000000, 0x00000000, 0x00000000,
1860x00000000, 0x00000000, 0x00000000, 0x00000000,
1870x00000000, 0x00000000, 0x00000000, 0x00000000,
1880x00000000, 0x00000000, 0x00000000, 0x00000000,
1890x00000000, 0x00000000, 0x00000000, 0x00000000,
1900x00000000, 0x00000000, 0x00000000, 0x00000000,
1910x00000000, 0x00000000, 0x00000000, 0x00000000,
1920x00000000, 0x00000000, 0x00000000, 0x00000000,
1930x00000000, 0x00000000, 0x00000000, 0x00000000,
1940x00000000, 0x00000000, 0x00000000, 0x00000000,
1950x00000000, 0x00000000, 0x00000000, 0x00000000,
1960x00000000, 0x00000000, 0x00000000, 0x00000000,
1970x00000000, 0x00000000, 0x00000000, 0x00000000,
1980x00000000, 0x00000000, 0x00000000, 0x00000000,
1990x00000000, 0x00000000, 0x00000000, 0x00000000,
2000x00000000, 0x00000000, 0x00000000, 0x00000000,
2010x00000000, 0x00000000, 0x00000000, 0x00000000,
2020x00000000, 0x00000000, 0x00000000, 0x00000000,
2030x00000000, 0x00000000, 0x00000000, 0x00000000,
2040x00000000, 0x00000000, 0x00000000, 0x00000000,
2050x00000000, 0x00000000, 0x00000000, 0x00000000,
2060x00000000, 0x00000000, 0x00000000, 0x00000000,
2070x00000000, 0x00000000, 0x00000000, 0x00000000,
2080x00000000, 0x00000000, 0x00000000, 0x00000000,
2090x00000000, 0x00000000, 0x00000000, 0x00000000,
2100x00000000, 0x00000000, 0x00000000, 0x00000000,
2110x00000000, 0x00000000, 0x00000000, 0x00000000,
2120x00000000, 0x00000000, 0x00000000, 0x00000000,
2130x00000000, 0x00000000, 0x00000000, 0x00000000,
2140x00000000, 0x00000000, 0x00000000, 0x00000000,
2150x00000000, 0x00000000, 0x00000000, 0x00000000,
2160x00000000, 0x00000000, 0x00000000, 0x00000000,
2170x00000000, 0x00000000, 0x00000000, 0x00000000,
2180x00000000, 0x00000000, 0x00000000, 0x00000000,
2190x00000000, 0x00000000, 0x00000000, 0x00000000,
2200x00000000, 0x00000000, 0x00000000, 0x00000000,
2210x00000000, 0x00000000, 0x00000000, 0x00000000,
2220x00000000, 0x00000000, 0x00000000, 0x00000000,
2230x00000000, 0x00000000, 0x00000000, 0x00000000,
2240x00000000, 0x00000000, 0x00000000, 0x00000000,
2250x00000000, 0x00000000, 0x00000000, 0x00000000,
2260x00000000, 0x00000000, 0x00000000, 0x00000000,
2270x00000000, 0x00000000, 0x00000000, 0x00000000,
2280x00000000, 0x00000000, 0x00000000, 0x00000000,
2290x00000000, 0x00000000, 0x00000000, 0x00000000,
2300x00000000, 0x00000000, 0x00000000, 0x00000000,
231};
diff --git a/arch/powerpc/platforms/cell/spufs/spu_save_dump.h_shipped b/arch/powerpc/platforms/cell/spufs/spu_save_dump.h_shipped
new file mode 100644
index 000000000000..39e54003f1df
--- /dev/null
+++ b/arch/powerpc/platforms/cell/spufs/spu_save_dump.h_shipped
@@ -0,0 +1,191 @@
1/*
2 * spu_save_dump.h: Copyright (C) 2005 IBM.
3 * Hex-dump auto generated from spu_save.c.
4 * Do not edit!
5 */
6static unsigned int spu_save_code[] __page_aligned = {
70x20805000, 0x20805201, 0x20805402, 0x20805603,
80x20805804, 0x20805a05, 0x20805c06, 0x20805e07,
90x20806008, 0x20806209, 0x2080640a, 0x2080660b,
100x2080680c, 0x20806a0d, 0x20806c0e, 0x20806e0f,
110x4201c003, 0x33800184, 0x1c010204, 0x40200000,
120x24000190, 0x24004191, 0x24008192, 0x2400c193,
130x141fc205, 0x23fffd84, 0x1c100183, 0x217ffb85,
140x40800000, 0x409ff801, 0x24000080, 0x24fd8081,
150x1cd80081, 0x33000180, 0x00000000, 0x00000000,
160x01a00182, 0x3ec00083, 0xb1c38103, 0x01a00204,
170x3ec10082, 0x4201400d, 0xb1c38202, 0x01a00583,
180x34218682, 0x3ed80684, 0xb0408184, 0x24218682,
190x01a00603, 0x00200000, 0x34214682, 0x3ed40684,
200xb0408184, 0x40800003, 0x24214682, 0x21a00083,
210x40800082, 0x21a00b02, 0x4020007f, 0x1000251e,
220x40a80002, 0x32800008, 0x4205c00c, 0x00200000,
230x40a0000b, 0x3f82070f, 0x4080020a, 0x40800709,
240x3fe3078f, 0x3fbf0783, 0x3f200183, 0x3fbe0183,
250x3fe30187, 0x18008387, 0x4205c002, 0x3ac30404,
260x1cffc489, 0x00200000, 0x18008403, 0x38830402,
270x4cffc486, 0x3ac28185, 0xb0408584, 0x28830402,
280x1c020408, 0x38828182, 0xb0408385, 0x1802c387,
290x28828182, 0x217ff886, 0x04000582, 0x32800007,
300x21a00802, 0x3fbf0705, 0x3f200285, 0x3fbe0285,
310x3fe30285, 0x21a00885, 0x04000603, 0x21a00903,
320x40803c02, 0x21a00982, 0x04000386, 0x21a00a06,
330x40801202, 0x21a00a82, 0x73000003, 0x24200683,
340x01a00404, 0x00200000, 0x34204682, 0x3ec40683,
350xb0408203, 0x24204682, 0x01a00783, 0x00200000,
360x3421c682, 0x3edc0684, 0xb0408184, 0x2421c682,
370x21a00806, 0x21a00885, 0x3fbf0784, 0x3f200204,
380x3fbe0204, 0x3fe30204, 0x21a00904, 0x40804002,
390x21a00982, 0x21a00a06, 0x40805a02, 0x21a00a82,
400x04000683, 0x21a00803, 0x21a00885, 0x21a00904,
410x40848002, 0x21a00982, 0x21a00a06, 0x40801002,
420x21a00a82, 0x21a00a06, 0x40806602, 0x00200000,
430x35800009, 0x21a00a82, 0x40800083, 0x21a00b83,
440x01a00c02, 0x01a00d83, 0x00003ffb, 0x40800003,
450x4020007f, 0x35000000, 0x00000000, 0x00000000,
460x00000000, 0x00000000, 0x00000000, 0x00000000,
470x00000000, 0x00000000, 0x00000000, 0x00000000,
480x00000000, 0x00000000, 0x00000000, 0x00000000,
490x00000000, 0x00000000, 0x00000000, 0x00000000,
500x00000000, 0x00000000, 0x00000000, 0x00000000,
510x00000000, 0x00000000, 0x00000000, 0x00000000,
520x00000000, 0x00000000, 0x00000000, 0x00000000,
530x00000000, 0x00000000, 0x00000000, 0x00000000,
540x00000000, 0x00000000, 0x00000000, 0x00000000,
550x00000000, 0x00000000, 0x00000000, 0x00000000,
560x00000000, 0x00000000, 0x00000000, 0x00000000,
570x00000000, 0x00000000, 0x00000000, 0x00000000,
580x00000000, 0x00000000, 0x00000000, 0x00000000,
590x00000000, 0x00000000, 0x00000000, 0x00000000,
600x00000000, 0x00000000, 0x00000000, 0x00000000,
610x00000000, 0x00000000, 0x00000000, 0x00000000,
620x00000000, 0x00000000, 0x00000000, 0x00000000,
630x00000000, 0x00000000, 0x00000000, 0x00000000,
640x00000000, 0x00000000, 0x00000000, 0x00000000,
650x00000000, 0x00000000, 0x00000000, 0x00000000,
660x00000000, 0x00000000, 0x00000000, 0x00000000,
670x00000000, 0x00000000, 0x00000000, 0x00000000,
680x00000000, 0x00000000, 0x00000000, 0x00000000,
690x00000000, 0x00000000, 0x00000000, 0x00000000,
700x00000000, 0x00000000, 0x00000000, 0x00000000,
710x00000000, 0x00000000, 0x00000000, 0x00000000,
720x00000000, 0x00000000, 0x00000000, 0x00000000,
730x00000000, 0x00000000, 0x00000000, 0x00000000,
740x00000000, 0x00000000, 0x00000000, 0x00000000,
750x00000000, 0x00000000, 0x00000000, 0x00000000,
760x00000000, 0x00000000, 0x00000000, 0x00000000,
770x00000000, 0x00000000, 0x00000000, 0x00000000,
780x00000000, 0x00000000, 0x00000000, 0x00000000,
790x00000000, 0x00000000, 0x00000000, 0x00000000,
800x00000000, 0x00000000, 0x00000000, 0x00000000,
810x00000000, 0x00000000, 0x00000000, 0x00000000,
820x00000000, 0x00000000, 0x00000000, 0x00000000,
830x00000000, 0x00000000, 0x00000000, 0x00000000,
840x00000000, 0x00000000, 0x00000000, 0x00000000,
850x00000000, 0x00000000, 0x00000000, 0x00000000,
860x00000000, 0x00000000, 0x00000000, 0x00000000,
870x00000000, 0x00000000, 0x00000000, 0x00000000,
880x00000000, 0x00000000, 0x00000000, 0x00000000,
890x00000000, 0x00000000, 0x00000000, 0x00000000,
900x00000000, 0x00000000, 0x00000000, 0x00000000,
910x00000000, 0x00000000, 0x00000000, 0x00000000,
920x00000000, 0x00000000, 0x00000000, 0x00000000,
930x00000000, 0x00000000, 0x00000000, 0x00000000,
940x00000000, 0x00000000, 0x00000000, 0x00000000,
950x00000000, 0x00000000, 0x00000000, 0x00000000,
960x00000000, 0x00000000, 0x00000000, 0x00000000,
970x00000000, 0x00000000, 0x00000000, 0x00000000,
980x00000000, 0x00000000, 0x00000000, 0x00000000,
990x00000000, 0x00000000, 0x00000000, 0x00000000,
1000x00000000, 0x00000000, 0x00000000, 0x00000000,
1010x00000000, 0x00000000, 0x00000000, 0x00000000,
1020x00000000, 0x00000000, 0x00000000, 0x00000000,
1030x00000000, 0x00000000, 0x00000000, 0x00000000,
1040x00000000, 0x00000000, 0x00000000, 0x00000000,
1050x00000000, 0x00000000, 0x00000000, 0x00000000,
1060x00000000, 0x00000000, 0x00000000, 0x00000000,
1070x00000000, 0x00000000, 0x00000000, 0x00000000,
1080x00000000, 0x00000000, 0x00000000, 0x00000000,
1090x00000000, 0x00000000, 0x00000000, 0x00000000,
1100x00000000, 0x00000000, 0x00000000, 0x00000000,
1110x00000000, 0x00000000, 0x00000000, 0x00000000,
1120x00000000, 0x00000000, 0x00000000, 0x00000000,
1130x00000000, 0x00000000, 0x00000000, 0x00000000,
1140x00000000, 0x00000000, 0x00000000, 0x00000000,
1150x00000000, 0x00000000, 0x00000000, 0x00000000,
1160x00000000, 0x00000000, 0x00000000, 0x00000000,
1170x00000000, 0x00000000, 0x00000000, 0x00000000,
1180x00000000, 0x00000000, 0x00000000, 0x00000000,
1190x00000000, 0x00000000, 0x00000000, 0x00000000,
1200x00000000, 0x00000000, 0x00000000, 0x00000000,
1210x00000000, 0x00000000, 0x00000000, 0x00000000,
1220x00000000, 0x00000000, 0x00000000, 0x00000000,
1230x00000000, 0x00000000, 0x00000000, 0x00000000,
1240x00000000, 0x00000000, 0x00000000, 0x00000000,
1250x00000000, 0x00000000, 0x00000000, 0x00000000,
1260x00000000, 0x00000000, 0x00000000, 0x00000000,
1270x00000000, 0x00000000, 0x00000000, 0x00000000,
1280x00000000, 0x00000000, 0x00000000, 0x00000000,
1290x00000000, 0x00000000, 0x00000000, 0x00000000,
1300x00000000, 0x00000000, 0x00000000, 0x00000000,
1310x00000000, 0x00000000, 0x00000000, 0x00000000,
1320x00000000, 0x00000000, 0x00000000, 0x00000000,
1330x00000000, 0x00000000, 0x00000000, 0x00000000,
1340x00000000, 0x00000000, 0x00000000, 0x00000000,
1350x00000000, 0x00000000, 0x00000000, 0x00000000,
1360x00000000, 0x00000000, 0x00000000, 0x00000000,
1370x00000000, 0x00000000, 0x00000000, 0x00000000,
1380x00000000, 0x00000000, 0x00000000, 0x00000000,
1390x00000000, 0x00000000, 0x00000000, 0x00000000,
1400x00000000, 0x00000000, 0x00000000, 0x00000000,
1410x00000000, 0x00000000, 0x00000000, 0x00000000,
1420x00000000, 0x00000000, 0x00000000, 0x00000000,
1430x00000000, 0x00000000, 0x00000000, 0x00000000,
1440x00000000, 0x00000000, 0x00000000, 0x00000000,
1450x00000000, 0x00000000, 0x00000000, 0x00000000,
1460x00000000, 0x00000000, 0x00000000, 0x00000000,
1470x00000000, 0x00000000, 0x00000000, 0x00000000,
1480x00000000, 0x00000000, 0x00000000, 0x00000000,
1490x00000000, 0x00000000, 0x00000000, 0x00000000,
1500x00000000, 0x00000000, 0x00000000, 0x00000000,
1510x00000000, 0x00000000, 0x00000000, 0x00000000,
1520x00000000, 0x00000000, 0x00000000, 0x00000000,
1530x00000000, 0x00000000, 0x00000000, 0x00000000,
1540x00000000, 0x00000000, 0x00000000, 0x00000000,
1550x00000000, 0x00000000, 0x00000000, 0x00000000,
1560x00000000, 0x00000000, 0x00000000, 0x00000000,
1570x00000000, 0x00000000, 0x00000000, 0x00000000,
1580x00000000, 0x00000000, 0x00000000, 0x00000000,
1590x00000000, 0x00000000, 0x00000000, 0x00000000,
1600x00000000, 0x00000000, 0x00000000, 0x00000000,
1610x00000000, 0x00000000, 0x00000000, 0x00000000,
1620x00000000, 0x00000000, 0x00000000, 0x00000000,
1630x00000000, 0x00000000, 0x00000000, 0x00000000,
1640x00000000, 0x00000000, 0x00000000, 0x00000000,
1650x00000000, 0x00000000, 0x00000000, 0x00000000,
1660x00000000, 0x00000000, 0x00000000, 0x00000000,
1670x00000000, 0x00000000, 0x00000000, 0x00000000,
1680x00000000, 0x00000000, 0x00000000, 0x00000000,
1690x00000000, 0x00000000, 0x00000000, 0x00000000,
1700x00000000, 0x00000000, 0x00000000, 0x00000000,
1710x00000000, 0x00000000, 0x00000000, 0x00000000,
1720x00000000, 0x00000000, 0x00000000, 0x00000000,
1730x00000000, 0x00000000, 0x00000000, 0x00000000,
1740x00000000, 0x00000000, 0x00000000, 0x00000000,
1750x00000000, 0x00000000, 0x00000000, 0x00000000,
1760x00000000, 0x00000000, 0x00000000, 0x00000000,
1770x00000000, 0x00000000, 0x00000000, 0x00000000,
1780x00000000, 0x00000000, 0x00000000, 0x00000000,
1790x00000000, 0x00000000, 0x00000000, 0x00000000,
1800x00000000, 0x00000000, 0x00000000, 0x00000000,
1810x00000000, 0x00000000, 0x00000000, 0x00000000,
1820x00000000, 0x00000000, 0x00000000, 0x00000000,
1830x00000000, 0x00000000, 0x00000000, 0x00000000,
1840x00000000, 0x00000000, 0x00000000, 0x00000000,
1850x00000000, 0x00000000, 0x00000000, 0x00000000,
1860x00000000, 0x00000000, 0x00000000, 0x00000000,
1870x00000000, 0x00000000, 0x00000000, 0x00000000,
1880x00000000, 0x00000000, 0x00000000, 0x00000000,
1890x00000000, 0x00000000, 0x00000000, 0x00000000,
1900x00000000, 0x00000000, 0x00000000, 0x00000000,
191};
diff --git a/arch/powerpc/platforms/cell/spufs/spufs.h b/arch/powerpc/platforms/cell/spufs/spufs.h
index b37fe797ea1c..67aff57faf60 100644
--- a/arch/powerpc/platforms/cell/spufs/spufs.h
+++ b/arch/powerpc/platforms/cell/spufs/spufs.h
@@ -28,6 +28,7 @@
28#include <linux/fs.h> 28#include <linux/fs.h>
29 29
30#include <asm/spu.h> 30#include <asm/spu.h>
31#include <asm/spu_csa.h>
31 32
32/* The magic number for our file system */ 33/* The magic number for our file system */
33enum { 34enum {
@@ -36,6 +37,7 @@ enum {
36 37
37struct spu_context { 38struct spu_context {
38 struct spu *spu; /* pointer to a physical SPU */ 39 struct spu *spu; /* pointer to a physical SPU */
40 struct spu_state csa; /* SPU context save area. */
39 struct rw_semaphore backing_sema; /* protects the above */ 41 struct rw_semaphore backing_sema; /* protects the above */
40 spinlock_t mmio_lock; /* protects mmio access */ 42 spinlock_t mmio_lock; /* protects mmio access */
41 43
diff --git a/arch/powerpc/platforms/cell/spufs/switch.c b/arch/powerpc/platforms/cell/spufs/switch.c
new file mode 100644
index 000000000000..6804342e99c3
--- /dev/null
+++ b/arch/powerpc/platforms/cell/spufs/switch.c
@@ -0,0 +1,174 @@
1/*
2 * spu_switch.c
3 *
4 * (C) Copyright IBM Corp. 2005
5 *
6 * Author: Mark Nutter <mnutter@us.ibm.com>
7 *
8 * Host-side part of SPU context switch sequence outlined in
9 * Synergistic Processor Element, Book IV.
10 *
11 * A fully premptive switch of an SPE is very expensive in terms
12 * of time and system resources. SPE Book IV indicates that SPE
13 * allocation should follow a "serially reusable device" model,
14 * in which the SPE is assigned a task until it completes. When
15 * this is not possible, this sequence may be used to premptively
16 * save, and then later (optionally) restore the context of a
17 * program executing on an SPE.
18 *
19 *
20 * This program is free software; you can redistribute it and/or modify
21 * it under the terms of the GNU General Public License as published by
22 * the Free Software Foundation; either version 2, or (at your option)
23 * any later version.
24 *
25 * This program is distributed in the hope that it will be useful,
26 * but WITHOUT ANY WARRANTY; without even the implied warranty of
27 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 * GNU General Public License for more details.
29 *
30 * You should have received a copy of the GNU General Public License
31 * along with this program; if not, write to the Free Software
32 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 */
34
35#include <linux/config.h>
36#include <linux/module.h>
37#include <linux/errno.h>
38#include <linux/sched.h>
39#include <linux/kernel.h>
40#include <linux/mm.h>
41#include <linux/vmalloc.h>
42#include <linux/smp.h>
43#include <linux/smp_lock.h>
44#include <linux/stddef.h>
45#include <linux/unistd.h>
46
47#include <asm/io.h>
48#include <asm/spu.h>
49#include <asm/spu_csa.h>
50#include <asm/mmu_context.h>
51
52#include "spu_save_dump.h"
53#include "spu_restore_dump.h"
54
55/**
56 * spu_save - SPU context save, with locking.
57 * @prev: pointer to SPU context save area, to be saved.
58 * @spu: pointer to SPU iomem structure.
59 *
60 * Acquire locks, perform the save operation then return.
61 */
62int spu_save(struct spu_state *prev, struct spu *spu)
63{
64 /* XXX missing */
65
66 return 0;
67}
68
69/**
70 * spu_restore - SPU context restore, with harvest and locking.
71 * @new: pointer to SPU context save area, to be restored.
72 * @spu: pointer to SPU iomem structure.
73 *
74 * Perform harvest + restore, as we may not be coming
75 * from a previous succesful save operation, and the
76 * hardware state is unknown.
77 */
78int spu_restore(struct spu_state *new, struct spu *spu)
79{
80 /* XXX missing */
81
82 return 0;
83}
84
85/**
86 * spu_switch - SPU context switch (save + restore).
87 * @prev: pointer to SPU context save area, to be saved.
88 * @new: pointer to SPU context save area, to be restored.
89 * @spu: pointer to SPU iomem structure.
90 *
91 * Perform save, then restore. Only harvest if the
92 * save fails, as cleanup is otherwise not needed.
93 */
94int spu_switch(struct spu_state *prev, struct spu_state *new, struct spu *spu)
95{
96 /* XXX missing */
97
98 return 0;
99}
100
101static void init_prob(struct spu_state *csa)
102{
103 csa->spu_chnlcnt_RW[9] = 1;
104 csa->spu_chnlcnt_RW[21] = 16;
105 csa->spu_chnlcnt_RW[23] = 1;
106 csa->spu_chnlcnt_RW[28] = 1;
107 csa->spu_chnlcnt_RW[30] = 1;
108 csa->prob.spu_runcntl_RW = SPU_RUNCNTL_STOP;
109}
110
111static void init_priv1(struct spu_state *csa)
112{
113 /* Enable decode, relocate, tlbie response, master runcntl. */
114 csa->priv1.mfc_sr1_RW = MFC_STATE1_LOCAL_STORAGE_DECODE_MASK |
115 MFC_STATE1_MASTER_RUN_CONTROL_MASK |
116 MFC_STATE1_PROBLEM_STATE_MASK |
117 MFC_STATE1_RELOCATE_MASK | MFC_STATE1_BUS_TLBIE_MASK;
118
119 /* Set storage description. */
120 csa->priv1.mfc_sdr_RW = mfspr(SPRN_SDR1);
121
122 /* Enable OS-specific set of interrupts. */
123 csa->priv1.int_mask_class0_RW = CLASS0_ENABLE_DMA_ALIGNMENT_INTR |
124 CLASS0_ENABLE_INVALID_DMA_COMMAND_INTR |
125 CLASS0_ENABLE_SPU_ERROR_INTR;
126 csa->priv1.int_mask_class1_RW = CLASS1_ENABLE_SEGMENT_FAULT_INTR |
127 CLASS1_ENABLE_STORAGE_FAULT_INTR;
128 csa->priv1.int_mask_class2_RW = CLASS2_ENABLE_MAILBOX_INTR |
129 CLASS2_ENABLE_SPU_STOP_INTR | CLASS2_ENABLE_SPU_HALT_INTR;
130}
131
132static void init_priv2(struct spu_state *csa)
133{
134 csa->priv2.spu_lslr_RW = LS_ADDR_MASK;
135 csa->priv2.mfc_control_RW = MFC_CNTL_RESUME_DMA_QUEUE |
136 MFC_CNTL_NORMAL_DMA_QUEUE_OPERATION |
137 MFC_CNTL_DMA_QUEUES_EMPTY_MASK;
138}
139
140/**
141 * spu_alloc_csa - allocate and initialize an SPU context save area.
142 *
143 * Allocate and initialize the contents of an SPU context save area.
144 * This includes enabling address translation, interrupt masks, etc.,
145 * as appropriate for the given OS environment.
146 *
147 * Note that storage for the 'lscsa' is allocated separately,
148 * as it is by far the largest of the context save regions,
149 * and may need to be pinned or otherwise specially aligned.
150 */
151void spu_init_csa(struct spu_state *csa)
152{
153 struct spu_lscsa *lscsa;
154
155 if (!csa)
156 return;
157 memset(csa, 0, sizeof(struct spu_state));
158
159 lscsa = vmalloc(sizeof(struct spu_lscsa));
160 if (!lscsa)
161 return;
162
163 memset(lscsa, 0, sizeof(struct spu_lscsa));
164 csa->lscsa = lscsa;
165
166 init_prob(csa);
167 init_priv1(csa);
168 init_priv2(csa);
169}
170
171void spu_fini_csa(struct spu_state *csa)
172{
173 vfree(csa->lscsa);
174}
diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h
index b036385cd831..62718f3ba03f 100644
--- a/include/asm-powerpc/spu.h
+++ b/include/asm-powerpc/spu.h
@@ -29,6 +29,81 @@
29#define LS_ORDER (6) /* 256 kb */ 29#define LS_ORDER (6) /* 256 kb */
30 30
31#define LS_SIZE (PAGE_SIZE << LS_ORDER) 31#define LS_SIZE (PAGE_SIZE << LS_ORDER)
32#define LS_ADDR_MASK (LS_SIZE - 1)
33
34#define MFC_PUT_CMD 0x20
35#define MFC_PUTS_CMD 0x28
36#define MFC_PUTR_CMD 0x30
37#define MFC_PUTF_CMD 0x22
38#define MFC_PUTB_CMD 0x21
39#define MFC_PUTFS_CMD 0x2A
40#define MFC_PUTBS_CMD 0x29
41#define MFC_PUTRF_CMD 0x32
42#define MFC_PUTRB_CMD 0x31
43#define MFC_PUTL_CMD 0x24
44#define MFC_PUTRL_CMD 0x34
45#define MFC_PUTLF_CMD 0x26
46#define MFC_PUTLB_CMD 0x25
47#define MFC_PUTRLF_CMD 0x36
48#define MFC_PUTRLB_CMD 0x35
49
50#define MFC_GET_CMD 0x40
51#define MFC_GETS_CMD 0x48
52#define MFC_GETF_CMD 0x42
53#define MFC_GETB_CMD 0x41
54#define MFC_GETFS_CMD 0x4A
55#define MFC_GETBS_CMD 0x49
56#define MFC_GETL_CMD 0x44
57#define MFC_GETLF_CMD 0x46
58#define MFC_GETLB_CMD 0x45
59
60#define MFC_SDCRT_CMD 0x80
61#define MFC_SDCRTST_CMD 0x81
62#define MFC_SDCRZ_CMD 0x89
63#define MFC_SDCRS_CMD 0x8D
64#define MFC_SDCRF_CMD 0x8F
65
66#define MFC_GETLLAR_CMD 0xD0
67#define MFC_PUTLLC_CMD 0xB4
68#define MFC_PUTLLUC_CMD 0xB0
69#define MFC_PUTQLLUC_CMD 0xB8
70#define MFC_SNDSIG_CMD 0xA0
71#define MFC_SNDSIGB_CMD 0xA1
72#define MFC_SNDSIGF_CMD 0xA2
73#define MFC_BARRIER_CMD 0xC0
74#define MFC_EIEIO_CMD 0xC8
75#define MFC_SYNC_CMD 0xCC
76
77#define MFC_MIN_DMA_SIZE_SHIFT 4 /* 16 bytes */
78#define MFC_MAX_DMA_SIZE_SHIFT 14 /* 16384 bytes */
79#define MFC_MIN_DMA_SIZE (1 << MFC_MIN_DMA_SIZE_SHIFT)
80#define MFC_MAX_DMA_SIZE (1 << MFC_MAX_DMA_SIZE_SHIFT)
81#define MFC_MIN_DMA_SIZE_MASK (MFC_MIN_DMA_SIZE - 1)
82#define MFC_MAX_DMA_SIZE_MASK (MFC_MAX_DMA_SIZE - 1)
83#define MFC_MIN_DMA_LIST_SIZE 0x0008 /* 8 bytes */
84#define MFC_MAX_DMA_LIST_SIZE 0x4000 /* 16K bytes */
85
86#define MFC_TAGID_TO_TAGMASK(tag_id) (1 << (tag_id & 0x1F))
87
88/* Events for Channels 0-2 */
89#define MFC_DMA_TAG_STATUS_UPDATE_EVENT 0x00000001
90#define MFC_DMA_TAG_CMD_STALL_NOTIFY_EVENT 0x00000002
91#define MFC_DMA_QUEUE_AVAILABLE_EVENT 0x00000008
92#define MFC_SPU_MAILBOX_WRITTEN_EVENT 0x00000010
93#define MFC_DECREMENTER_EVENT 0x00000020
94#define MFC_PU_INT_MAILBOX_AVAILABLE_EVENT 0x00000040
95#define MFC_PU_MAILBOX_AVAILABLE_EVENT 0x00000080
96#define MFC_SIGNAL_2_EVENT 0x00000100
97#define MFC_SIGNAL_1_EVENT 0x00000200
98#define MFC_LLR_LOST_EVENT 0x00000400
99#define MFC_PRIV_ATTN_EVENT 0x00000800
100#define MFC_MULTI_SRC_EVENT 0x00001000
101
102/* Flags indicating progress during context switch. */
103#define SPU_CONTEXT_SWITCH_PENDING_nr 0UL
104#define SPU_CONTEXT_SWITCH_ACTIVE_nr 1UL
105#define SPU_CONTEXT_SWITCH_PENDING (1UL << SPU_CONTEXT_SWITCH_PENDING_nr)
106#define SPU_CONTEXT_SWITCH_ACTIVE (1UL << SPU_CONTEXT_SWITCH_ACTIVE_nr)
32 107
33struct spu { 108struct spu {
34 char *name; 109 char *name;
@@ -41,6 +116,7 @@ struct spu {
41 int number; 116 int number;
42 u32 isrc; 117 u32 isrc;
43 u32 node; 118 u32 node;
119 u64 flags;
44 struct kref kref; 120 struct kref kref;
45 size_t ls_size; 121 size_t ls_size;
46 unsigned int slb_replace; 122 unsigned int slb_replace;
diff --git a/include/asm-powerpc/spu_csa.h b/include/asm-powerpc/spu_csa.h
new file mode 100644
index 000000000000..d1d537de4f5c
--- /dev/null
+++ b/include/asm-powerpc/spu_csa.h
@@ -0,0 +1,256 @@
1/*
2 * spu_csa.h: Definitions for SPU context save area (CSA).
3 *
4 * (C) Copyright IBM 2005
5 *
6 * Author: Mark Nutter <mnutter@us.ibm.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
11 * any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#ifndef _SPU_CSA_H_
24#define _SPU_CSA_H_
25
26/*
27 * Total number of 128-bit registers.
28 */
29#define NR_SPU_GPRS 128
30#define NR_SPU_SPRS 9
31#define NR_SPU_REGS_PAD 7
32#define NR_SPU_SPILL_REGS 144 /* GPRS + SPRS + PAD */
33#define SIZEOF_SPU_SPILL_REGS NR_SPU_SPILL_REGS * 16
34
35#define SPU_SAVE_COMPLETE 0x3FFB
36#define SPU_RESTORE_COMPLETE 0x3FFC
37
38/*
39 * Definitions for various 'stopped' status conditions,
40 * to be recreated during context restore.
41 */
42#define SPU_STOPPED_STATUS_P 1
43#define SPU_STOPPED_STATUS_I 2
44#define SPU_STOPPED_STATUS_H 3
45#define SPU_STOPPED_STATUS_S 4
46#define SPU_STOPPED_STATUS_S_I 5
47#define SPU_STOPPED_STATUS_S_P 6
48#define SPU_STOPPED_STATUS_P_H 7
49#define SPU_STOPPED_STATUS_P_I 8
50#define SPU_STOPPED_STATUS_R 9
51
52#ifndef __ASSEMBLY__
53/**
54 * spu_reg128 - generic 128-bit register definition.
55 */
56struct spu_reg128 {
57 u32 slot[4];
58};
59
60/**
61 * struct spu_lscsa - Local Store Context Save Area.
62 * @gprs: Array of saved registers.
63 * @fpcr: Saved floating point status control register.
64 * @decr: Saved decrementer value.
65 * @decr_status: Indicates decrementer run status.
66 * @ppu_mb: Saved PPU mailbox data.
67 * @ppuint_mb: Saved PPU interrupting mailbox data.
68 * @tag_mask: Saved tag group mask.
69 * @event_mask: Saved event mask.
70 * @srr0: Saved SRR0.
71 * @stopped_status: Conditions to be recreated by restore.
72 * @ls: Saved contents of Local Storage Area.
73 *
74 * The LSCSA represents state that is primarily saved and
75 * restored by SPU-side code.
76 */
77struct spu_lscsa {
78 struct spu_reg128 gprs[128];
79 struct spu_reg128 fpcr;
80 struct spu_reg128 decr;
81 struct spu_reg128 decr_status;
82 struct spu_reg128 ppu_mb;
83 struct spu_reg128 ppuint_mb;
84 struct spu_reg128 tag_mask;
85 struct spu_reg128 event_mask;
86 struct spu_reg128 srr0;
87 struct spu_reg128 stopped_status;
88 struct spu_reg128 pad[119]; /* 'ls' must be page-aligned. */
89 unsigned char ls[LS_SIZE];
90};
91
92#ifdef __KERNEL__
93
94/*
95 * struct spu_problem_collapsed - condensed problem state area, w/o pads.
96 */
97struct spu_problem_collapsed {
98 u64 spc_mssync_RW;
99 u32 mfc_lsa_W;
100 u32 unused_pad0;
101 u64 mfc_ea_W;
102 union mfc_tag_size_class_cmd mfc_union_W;
103 u32 dma_qstatus_R;
104 u32 dma_querytype_RW;
105 u32 dma_querymask_RW;
106 u32 dma_tagstatus_R;
107 u32 pu_mb_R;
108 u32 spu_mb_W;
109 u32 mb_stat_R;
110 u32 spu_runcntl_RW;
111 u32 spu_status_R;
112 u32 spu_spc_R;
113 u32 spu_npc_RW;
114 u32 signal_notify1;
115 u32 signal_notify2;
116 u32 unused_pad1;
117};
118
119/*
120 * struct spu_priv1_collapsed - condensed privileged 1 area, w/o pads.
121 */
122struct spu_priv1_collapsed {
123 u64 mfc_sr1_RW;
124 u64 mfc_lpid_RW;
125 u64 spu_idr_RW;
126 u64 mfc_vr_RO;
127 u64 spu_vr_RO;
128 u64 int_mask_class0_RW;
129 u64 int_mask_class1_RW;
130 u64 int_mask_class2_RW;
131 u64 int_stat_class0_RW;
132 u64 int_stat_class1_RW;
133 u64 int_stat_class2_RW;
134 u64 int_route_RW;
135 u64 mfc_atomic_flush_RW;
136 u64 resource_allocation_groupID_RW;
137 u64 resource_allocation_enable_RW;
138 u64 mfc_fir_R;
139 u64 mfc_fir_status_or_W;
140 u64 mfc_fir_status_and_W;
141 u64 mfc_fir_mask_R;
142 u64 mfc_fir_mask_or_W;
143 u64 mfc_fir_mask_and_W;
144 u64 mfc_fir_chkstp_enable_RW;
145 u64 smf_sbi_signal_sel;
146 u64 smf_ato_signal_sel;
147 u64 mfc_sdr_RW;
148 u64 tlb_index_hint_RO;
149 u64 tlb_index_W;
150 u64 tlb_vpn_RW;
151 u64 tlb_rpn_RW;
152 u64 tlb_invalidate_entry_W;
153 u64 tlb_invalidate_all_W;
154 u64 smm_hid;
155 u64 mfc_accr_RW;
156 u64 mfc_dsisr_RW;
157 u64 mfc_dar_RW;
158 u64 rmt_index_RW;
159 u64 rmt_data1_RW;
160 u64 mfc_dsir_R;
161 u64 mfc_lsacr_RW;
162 u64 mfc_lscrr_R;
163 u64 mfc_tclass_id_RW;
164 u64 mfc_rm_boundary;
165 u64 smf_dma_signal_sel;
166 u64 smm_signal_sel;
167 u64 mfc_cer_R;
168 u64 pu_ecc_cntl_RW;
169 u64 pu_ecc_stat_RW;
170 u64 spu_ecc_addr_RW;
171 u64 spu_err_mask_RW;
172 u64 spu_trig0_sel;
173 u64 spu_trig1_sel;
174 u64 spu_trig2_sel;
175 u64 spu_trig3_sel;
176 u64 spu_trace_sel;
177 u64 spu_event0_sel;
178 u64 spu_event1_sel;
179 u64 spu_event2_sel;
180 u64 spu_event3_sel;
181 u64 spu_trace_cntl;
182};
183
184/*
185 * struct spu_priv2_collapsed - condensed priviliged 2 area, w/o pads.
186 */
187struct spu_priv2_collapsed {
188 u64 slb_index_W;
189 u64 slb_esid_RW;
190 u64 slb_vsid_RW;
191 u64 slb_invalidate_entry_W;
192 u64 slb_invalidate_all_W;
193 struct mfc_cq_sr spuq[16];
194 struct mfc_cq_sr puq[8];
195 u64 mfc_control_RW;
196 u64 puint_mb_R;
197 u64 spu_privcntl_RW;
198 u64 spu_lslr_RW;
199 u64 spu_chnlcntptr_RW;
200 u64 spu_chnlcnt_RW;
201 u64 spu_chnldata_RW;
202 u64 spu_cfg_RW;
203 u64 spu_pm_trace_tag_status_RW;
204 u64 spu_tag_status_query_RW;
205 u64 spu_cmd_buf1_RW;
206 u64 spu_cmd_buf2_RW;
207 u64 spu_atomic_status_RW;
208};
209
210/**
211 * struct spu_state
212 * @lscsa: Local Store Context Save Area.
213 * @prob: Collapsed Problem State Area, w/o pads.
214 * @priv1: Collapsed Privileged 1 Area, w/o pads.
215 * @priv2: Collapsed Privileged 2 Area, w/o pads.
216 * @spu_chnlcnt_RW: Array of saved channel counts.
217 * @spu_chnldata_RW: Array of saved channel data.
218 * @suspend_time: Time stamp when decrementer disabled.
219 * @slb_esid_RW: Array of saved SLB esid entries.
220 * @slb_vsid_RW: Array of saved SLB vsid entries.
221 *
222 * Structure representing the whole of the SPU
223 * context save area (CSA). This struct contains
224 * all of the state necessary to suspend and then
225 * later optionally resume execution of an SPU
226 * context.
227 *
228 * The @lscsa region is by far the largest, and is
229 * allocated separately so that it may either be
230 * pinned or mapped to/from application memory, as
231 * appropriate for the OS environment.
232 */
233struct spu_state {
234 struct spu_lscsa *lscsa;
235 struct spu_problem_collapsed prob;
236 struct spu_priv1_collapsed priv1;
237 struct spu_priv2_collapsed priv2;
238 u64 spu_chnlcnt_RW[32];
239 u64 spu_chnldata_RW[32];
240 u32 spu_mailbox_data[4];
241 u32 pu_mailbox_data[1];
242 unsigned long suspend_time;
243 u64 slb_esid_RW[8];
244 u64 slb_vsid_RW[8];
245};
246
247extern void spu_init_csa(struct spu_state *csa);
248extern void spu_fini_csa(struct spu_state *csa);
249extern int spu_save(struct spu_state *prev, struct spu *spu);
250extern int spu_restore(struct spu_state *new, struct spu *spu);
251extern int spu_switch(struct spu_state *prev, struct spu_state *new,
252 struct spu *spu);
253
254#endif /* __KERNEL__ */
255#endif /* !__ASSEMBLY__ */
256#endif /* _SPU_CSA_H_ */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-15 01:32:46 -0500