diff options
-rw-r--r-- | arch/arm/mach-at91/at91sam9260.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9261.c | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-at91/at91_rstc.h | 3 |
3 files changed, 3 insertions, 4 deletions
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index 003c27c2ef65..6ea41d8266cb 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c | |||
@@ -259,7 +259,7 @@ static struct at91_gpio_bank at91sam9260_gpio[] = { | |||
259 | 259 | ||
260 | static void at91sam9260_reset(void) | 260 | static void at91sam9260_reset(void) |
261 | { | 261 | { |
262 | at91_sys_write(AT91_RSTC_CR, (0xA5 << 24) | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); | 262 | at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); |
263 | } | 263 | } |
264 | 264 | ||
265 | 265 | ||
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 1a9102368f11..784d1e682d6d 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c | |||
@@ -225,7 +225,7 @@ static struct at91_gpio_bank at91sam9261_gpio[] = { | |||
225 | 225 | ||
226 | static void at91sam9261_reset(void) | 226 | static void at91sam9261_reset(void) |
227 | { | 227 | { |
228 | at91_sys_write(AT91_RSTC_CR, (0xA5 << 24) | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); | 228 | at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); |
229 | } | 229 | } |
230 | 230 | ||
231 | 231 | ||
diff --git a/include/asm-arm/arch-at91/at91_rstc.h b/include/asm-arm/arch-at91/at91_rstc.h index 0b7afbc015a2..fb8d1618a231 100644 --- a/include/asm-arm/arch-at91/at91_rstc.h +++ b/include/asm-arm/arch-at91/at91_rstc.h | |||
@@ -17,7 +17,7 @@ | |||
17 | #define AT91_RSTC_PROCRST (1 << 0) /* Processor Reset */ | 17 | #define AT91_RSTC_PROCRST (1 << 0) /* Processor Reset */ |
18 | #define AT91_RSTC_PERRST (1 << 2) /* Peripheral Reset */ | 18 | #define AT91_RSTC_PERRST (1 << 2) /* Peripheral Reset */ |
19 | #define AT91_RSTC_EXTRST (1 << 3) /* External Reset */ | 19 | #define AT91_RSTC_EXTRST (1 << 3) /* External Reset */ |
20 | #define AT91_RSTC_KEY (0xff << 24) /* KEY Password */ | 20 | #define AT91_RSTC_KEY (0xa5 << 24) /* KEY Password */ |
21 | 21 | ||
22 | #define AT91_RSTC_SR (AT91_RSTC + 0x04) /* Reset Controller Status Register */ | 22 | #define AT91_RSTC_SR (AT91_RSTC + 0x04) /* Reset Controller Status Register */ |
23 | #define AT91_RSTC_URSTS (1 << 0) /* User Reset Status */ | 23 | #define AT91_RSTC_URSTS (1 << 0) /* User Reset Status */ |
@@ -34,6 +34,5 @@ | |||
34 | #define AT91_RSTC_URSTEN (1 << 0) /* User Reset Enable */ | 34 | #define AT91_RSTC_URSTEN (1 << 0) /* User Reset Enable */ |
35 | #define AT91_RSTC_URSTIEN (1 << 4) /* User Reset Interrupt Enable */ | 35 | #define AT91_RSTC_URSTIEN (1 << 4) /* User Reset Interrupt Enable */ |
36 | #define AT91_RSTC_ERSTL (0xf << 8) /* External Reset Length */ | 36 | #define AT91_RSTC_ERSTL (0xf << 8) /* External Reset Length */ |
37 | #define AT91_RSTC_KEY (0xff << 24) /* KEY Password */ | ||
38 | 37 | ||
39 | #endif | 38 | #endif |