diff options
-rw-r--r-- | drivers/usb/net/asix.c | 1001 |
1 files changed, 769 insertions, 232 deletions
diff --git a/drivers/usb/net/asix.c b/drivers/usb/net/asix.c index 2e2bbc003e93..9b97aa6384c7 100644 --- a/drivers/usb/net/asix.c +++ b/drivers/usb/net/asix.c | |||
@@ -1,7 +1,8 @@ | |||
1 | /* | 1 | /* |
2 | * ASIX AX8817X based USB 2.0 Ethernet Devices | 2 | * ASIX AX8817X based USB 2.0 Ethernet Devices |
3 | * Copyright (C) 2003-2005 David Hollis <dhollis@davehollis.com> | 3 | * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com> |
4 | * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net> | 4 | * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net> |
5 | * Copyright (C) 2006 James Painter <jamie.painter@iname.com> | ||
5 | * Copyright (c) 2002-2003 TiVo Inc. | 6 | * Copyright (c) 2002-2003 TiVo Inc. |
6 | * | 7 | * |
7 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
@@ -36,6 +37,9 @@ | |||
36 | 37 | ||
37 | #include "usbnet.h" | 38 | #include "usbnet.h" |
38 | 39 | ||
40 | #define DRIVER_VERSION "14-Jun-2006" | ||
41 | static const char driver_name [] = "asix"; | ||
42 | |||
39 | /* ASIX AX8817X based USB 2.0 Ethernet Devices */ | 43 | /* ASIX AX8817X based USB 2.0 Ethernet Devices */ |
40 | 44 | ||
41 | #define AX_CMD_SET_SW_MII 0x06 | 45 | #define AX_CMD_SET_SW_MII 0x06 |
@@ -46,23 +50,25 @@ | |||
46 | #define AX_CMD_WRITE_EEPROM 0x0c | 50 | #define AX_CMD_WRITE_EEPROM 0x0c |
47 | #define AX_CMD_WRITE_ENABLE 0x0d | 51 | #define AX_CMD_WRITE_ENABLE 0x0d |
48 | #define AX_CMD_WRITE_DISABLE 0x0e | 52 | #define AX_CMD_WRITE_DISABLE 0x0e |
53 | #define AX_CMD_READ_RX_CTL 0x0f | ||
49 | #define AX_CMD_WRITE_RX_CTL 0x10 | 54 | #define AX_CMD_WRITE_RX_CTL 0x10 |
50 | #define AX_CMD_READ_IPG012 0x11 | 55 | #define AX_CMD_READ_IPG012 0x11 |
51 | #define AX_CMD_WRITE_IPG0 0x12 | 56 | #define AX_CMD_WRITE_IPG0 0x12 |
52 | #define AX_CMD_WRITE_IPG1 0x13 | 57 | #define AX_CMD_WRITE_IPG1 0x13 |
58 | #define AX_CMD_READ_NODE_ID 0x13 | ||
53 | #define AX_CMD_WRITE_IPG2 0x14 | 59 | #define AX_CMD_WRITE_IPG2 0x14 |
54 | #define AX_CMD_WRITE_MULTI_FILTER 0x16 | 60 | #define AX_CMD_WRITE_MULTI_FILTER 0x16 |
55 | #define AX_CMD_READ_NODE_ID 0x17 | 61 | #define AX88172_CMD_READ_NODE_ID 0x17 |
56 | #define AX_CMD_READ_PHY_ID 0x19 | 62 | #define AX_CMD_READ_PHY_ID 0x19 |
57 | #define AX_CMD_READ_MEDIUM_STATUS 0x1a | 63 | #define AX_CMD_READ_MEDIUM_STATUS 0x1a |
58 | #define AX_CMD_WRITE_MEDIUM_MODE 0x1b | 64 | #define AX_CMD_WRITE_MEDIUM_MODE 0x1b |
59 | #define AX_CMD_READ_MONITOR_MODE 0x1c | 65 | #define AX_CMD_READ_MONITOR_MODE 0x1c |
60 | #define AX_CMD_WRITE_MONITOR_MODE 0x1d | 66 | #define AX_CMD_WRITE_MONITOR_MODE 0x1d |
67 | #define AX_CMD_READ_GPIOS 0x1e | ||
61 | #define AX_CMD_WRITE_GPIOS 0x1f | 68 | #define AX_CMD_WRITE_GPIOS 0x1f |
62 | #define AX_CMD_SW_RESET 0x20 | 69 | #define AX_CMD_SW_RESET 0x20 |
63 | #define AX_CMD_SW_PHY_STATUS 0x21 | 70 | #define AX_CMD_SW_PHY_STATUS 0x21 |
64 | #define AX_CMD_SW_PHY_SELECT 0x22 | 71 | #define AX_CMD_SW_PHY_SELECT 0x22 |
65 | #define AX88772_CMD_READ_NODE_ID 0x13 | ||
66 | 72 | ||
67 | #define AX_MONITOR_MODE 0x01 | 73 | #define AX_MONITOR_MODE 0x01 |
68 | #define AX_MONITOR_LINK 0x02 | 74 | #define AX_MONITOR_LINK 0x02 |
@@ -70,15 +76,15 @@ | |||
70 | #define AX_MONITOR_HSFS 0x10 | 76 | #define AX_MONITOR_HSFS 0x10 |
71 | 77 | ||
72 | /* AX88172 Medium Status Register values */ | 78 | /* AX88172 Medium Status Register values */ |
73 | #define AX_MEDIUM_FULL_DUPLEX 0x02 | 79 | #define AX88172_MEDIUM_FD 0x02 |
74 | #define AX_MEDIUM_TX_ABORT_ALLOW 0x04 | 80 | #define AX88172_MEDIUM_TX 0x04 |
75 | #define AX_MEDIUM_FLOW_CONTROL_EN 0x10 | 81 | #define AX88172_MEDIUM_FC 0x10 |
82 | #define AX88172_MEDIUM_DEFAULT \ | ||
83 | ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC ) | ||
76 | 84 | ||
77 | #define AX_MCAST_FILTER_SIZE 8 | 85 | #define AX_MCAST_FILTER_SIZE 8 |
78 | #define AX_MAX_MCAST 64 | 86 | #define AX_MAX_MCAST 64 |
79 | 87 | ||
80 | #define AX_EEPROM_LEN 0x40 | ||
81 | |||
82 | #define AX_SWRESET_CLEAR 0x00 | 88 | #define AX_SWRESET_CLEAR 0x00 |
83 | #define AX_SWRESET_RR 0x01 | 89 | #define AX_SWRESET_RR 0x01 |
84 | #define AX_SWRESET_RT 0x02 | 90 | #define AX_SWRESET_RT 0x02 |
@@ -92,23 +98,78 @@ | |||
92 | #define AX88772_IPG1_DEFAULT 0x0c | 98 | #define AX88772_IPG1_DEFAULT 0x0c |
93 | #define AX88772_IPG2_DEFAULT 0x12 | 99 | #define AX88772_IPG2_DEFAULT 0x12 |
94 | 100 | ||
95 | #define AX88772_MEDIUM_FULL_DUPLEX 0x0002 | 101 | /* AX88772 & AX88178 Medium Mode Register */ |
96 | #define AX88772_MEDIUM_RESERVED 0x0004 | 102 | #define AX_MEDIUM_PF 0x0080 |
97 | #define AX88772_MEDIUM_RX_FC_ENABLE 0x0010 | 103 | #define AX_MEDIUM_JFE 0x0040 |
98 | #define AX88772_MEDIUM_TX_FC_ENABLE 0x0020 | 104 | #define AX_MEDIUM_TFC 0x0020 |
99 | #define AX88772_MEDIUM_PAUSE_FORMAT 0x0080 | 105 | #define AX_MEDIUM_RFC 0x0010 |
100 | #define AX88772_MEDIUM_RX_ENABLE 0x0100 | 106 | #define AX_MEDIUM_ENCK 0x0008 |
101 | #define AX88772_MEDIUM_100MB 0x0200 | 107 | #define AX_MEDIUM_AC 0x0004 |
102 | #define AX88772_MEDIUM_DEFAULT \ | 108 | #define AX_MEDIUM_FD 0x0002 |
103 | (AX88772_MEDIUM_FULL_DUPLEX | AX88772_MEDIUM_RX_FC_ENABLE | \ | 109 | #define AX_MEDIUM_GM 0x0001 |
104 | AX88772_MEDIUM_TX_FC_ENABLE | AX88772_MEDIUM_100MB | \ | 110 | #define AX_MEDIUM_SM 0x1000 |
105 | AX88772_MEDIUM_RESERVED | AX88772_MEDIUM_RX_ENABLE ) | 111 | #define AX_MEDIUM_SBP 0x0800 |
112 | #define AX_MEDIUM_PS 0x0200 | ||
113 | #define AX_MEDIUM_RE 0x0100 | ||
114 | |||
115 | #define AX88178_MEDIUM_DEFAULT \ | ||
116 | (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \ | ||
117 | AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \ | ||
118 | AX_MEDIUM_RE ) | ||
106 | 119 | ||
107 | #define AX_EEPROM_MAGIC 0xdeadbeef | 120 | #define AX88772_MEDIUM_DEFAULT \ |
121 | (AX_MEDIUM_FD | AX_MEDIUM_RFC | \ | ||
122 | AX_MEDIUM_TFC | AX_MEDIUM_PS | \ | ||
123 | AX_MEDIUM_AC | AX_MEDIUM_RE ) | ||
124 | |||
125 | /* AX88772 & AX88178 RX_CTL values */ | ||
126 | #define AX_RX_CTL_SO 0x0080 | ||
127 | #define AX_RX_CTL_AP 0x0020 | ||
128 | #define AX_RX_CTL_AM 0x0010 | ||
129 | #define AX_RX_CTL_AB 0x0008 | ||
130 | #define AX_RX_CTL_SEP 0x0004 | ||
131 | #define AX_RX_CTL_AMALL 0x0002 | ||
132 | #define AX_RX_CTL_PRO 0x0001 | ||
133 | #define AX_RX_CTL_MFB_2048 0x0000 | ||
134 | #define AX_RX_CTL_MFB_4096 0x0100 | ||
135 | #define AX_RX_CTL_MFB_8192 0x0200 | ||
136 | #define AX_RX_CTL_MFB_16384 0x0300 | ||
137 | |||
138 | #define AX_DEFAULT_RX_CTL \ | ||
139 | (AX_RX_CTL_SO | AX_RX_CTL_AB ) | ||
140 | |||
141 | /* GPIO 0 .. 2 toggles */ | ||
142 | #define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */ | ||
143 | #define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */ | ||
144 | #define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */ | ||
145 | #define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */ | ||
146 | #define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */ | ||
147 | #define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */ | ||
148 | #define AX_GPIO_RESERVED 0x40 /* Reserved */ | ||
149 | #define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */ | ||
150 | |||
151 | #define AX_EEPROM_MAGIC 0xdeadbeef | ||
152 | #define AX88172_EEPROM_LEN 0x40 | ||
153 | #define AX88772_EEPROM_LEN 0xff | ||
154 | |||
155 | #define PHY_MODE_MARVELL 0x0000 | ||
156 | #define MII_MARVELL_LED_CTRL 0x0018 | ||
157 | #define MII_MARVELL_STATUS 0x001b | ||
158 | #define MII_MARVELL_CTRL 0x0014 | ||
159 | |||
160 | #define MARVELL_LED_MANUAL 0x0019 | ||
161 | |||
162 | #define MARVELL_STATUS_HWCFG 0x0004 | ||
163 | |||
164 | #define MARVELL_CTRL_TXDELAY 0x0002 | ||
165 | #define MARVELL_CTRL_RXDELAY 0x0080 | ||
108 | 166 | ||
109 | /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */ | 167 | /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */ |
110 | struct asix_data { | 168 | struct asix_data { |
111 | u8 multi_filter[AX_MCAST_FILTER_SIZE]; | 169 | u8 multi_filter[AX_MCAST_FILTER_SIZE]; |
170 | u8 phymode; | ||
171 | u8 ledmode; | ||
172 | u8 eeprom_len; | ||
112 | }; | 173 | }; |
113 | 174 | ||
114 | struct ax88172_int_data { | 175 | struct ax88172_int_data { |
@@ -122,6 +183,8 @@ struct ax88172_int_data { | |||
122 | static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, | 183 | static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, |
123 | u16 size, void *data) | 184 | u16 size, void *data) |
124 | { | 185 | { |
186 | devdbg(dev,"asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d", | ||
187 | cmd, value, index, size); | ||
125 | return usb_control_msg( | 188 | return usb_control_msg( |
126 | dev->udev, | 189 | dev->udev, |
127 | usb_rcvctrlpipe(dev->udev, 0), | 190 | usb_rcvctrlpipe(dev->udev, 0), |
@@ -137,6 +200,8 @@ static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, | |||
137 | static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, | 200 | static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, |
138 | u16 size, void *data) | 201 | u16 size, void *data) |
139 | { | 202 | { |
203 | devdbg(dev,"asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d", | ||
204 | cmd, value, index, size); | ||
140 | return usb_control_msg( | 205 | return usb_control_msg( |
141 | dev->udev, | 206 | dev->udev, |
142 | usb_sndctrlpipe(dev->udev, 0), | 207 | usb_sndctrlpipe(dev->udev, 0), |
@@ -161,12 +226,167 @@ static void asix_async_cmd_callback(struct urb *urb, struct pt_regs *regs) | |||
161 | usb_free_urb(urb); | 226 | usb_free_urb(urb); |
162 | } | 227 | } |
163 | 228 | ||
229 | static void | ||
230 | asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index, | ||
231 | u16 size, void *data) | ||
232 | { | ||
233 | struct usb_ctrlrequest *req; | ||
234 | int status; | ||
235 | struct urb *urb; | ||
236 | |||
237 | devdbg(dev,"asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d", | ||
238 | cmd, value, index, size); | ||
239 | if ((urb = usb_alloc_urb(0, GFP_ATOMIC)) == NULL) { | ||
240 | deverr(dev, "Error allocating URB in write_cmd_async!"); | ||
241 | return; | ||
242 | } | ||
243 | |||
244 | if ((req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC)) == NULL) { | ||
245 | deverr(dev, "Failed to allocate memory for control request"); | ||
246 | usb_free_urb(urb); | ||
247 | return; | ||
248 | } | ||
249 | |||
250 | req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE; | ||
251 | req->bRequest = cmd; | ||
252 | req->wValue = value; | ||
253 | req->wIndex = index; | ||
254 | req->wLength = size; | ||
255 | |||
256 | usb_fill_control_urb(urb, dev->udev, | ||
257 | usb_sndctrlpipe(dev->udev, 0), | ||
258 | (void *)req, data, size, | ||
259 | asix_async_cmd_callback, req); | ||
260 | |||
261 | if((status = usb_submit_urb(urb, GFP_ATOMIC)) < 0) { | ||
262 | deverr(dev, "Error submitting the control message: status=%d", | ||
263 | status); | ||
264 | kfree(req); | ||
265 | usb_free_urb(urb); | ||
266 | } | ||
267 | } | ||
268 | |||
269 | static int asix_rx_fixup(struct usbnet *dev, struct sk_buff *skb) | ||
270 | { | ||
271 | u8 *head; | ||
272 | u32 header; | ||
273 | char *packet; | ||
274 | struct sk_buff *ax_skb; | ||
275 | u16 size; | ||
276 | |||
277 | head = (u8 *) skb->data; | ||
278 | memcpy(&header, head, sizeof(header)); | ||
279 | le32_to_cpus(&header); | ||
280 | packet = head + sizeof(header); | ||
281 | |||
282 | skb_pull(skb, 4); | ||
283 | |||
284 | while (skb->len > 0) { | ||
285 | if ((short)(header & 0x0000ffff) != | ||
286 | ~((short)((header & 0xffff0000) >> 16))) { | ||
287 | deverr(dev,"asix_rx_fixup() Bad Header Length"); | ||
288 | } | ||
289 | /* get the packet length */ | ||
290 | size = (u16) (header & 0x0000ffff); | ||
291 | |||
292 | if ((skb->len) - ((size + 1) & 0xfffe) == 0) | ||
293 | return 2; | ||
294 | if (size > ETH_FRAME_LEN) { | ||
295 | deverr(dev,"asix_rx_fixup() Bad RX Length %d", size); | ||
296 | return 0; | ||
297 | } | ||
298 | ax_skb = skb_clone(skb, GFP_ATOMIC); | ||
299 | if (ax_skb) { | ||
300 | ax_skb->len = size; | ||
301 | ax_skb->data = packet; | ||
302 | ax_skb->tail = packet + size; | ||
303 | usbnet_skb_return(dev, ax_skb); | ||
304 | } else { | ||
305 | return 0; | ||
306 | } | ||
307 | |||
308 | skb_pull(skb, (size + 1) & 0xfffe); | ||
309 | |||
310 | if (skb->len == 0) | ||
311 | break; | ||
312 | |||
313 | head = (u8 *) skb->data; | ||
314 | memcpy(&header, head, sizeof(header)); | ||
315 | le32_to_cpus(&header); | ||
316 | packet = head + sizeof(header); | ||
317 | skb_pull(skb, 4); | ||
318 | } | ||
319 | |||
320 | if (skb->len < 0) { | ||
321 | deverr(dev,"asix_rx_fixup() Bad SKB Length %d", skb->len); | ||
322 | return 0; | ||
323 | } | ||
324 | return 1; | ||
325 | } | ||
326 | |||
327 | static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb, | ||
328 | gfp_t flags) | ||
329 | { | ||
330 | int padlen; | ||
331 | int headroom = skb_headroom(skb); | ||
332 | int tailroom = skb_tailroom(skb); | ||
333 | u32 packet_len; | ||
334 | u32 padbytes = 0xffff0000; | ||
335 | |||
336 | padlen = ((skb->len + 4) % 512) ? 0 : 4; | ||
337 | |||
338 | if ((!skb_cloned(skb)) | ||
339 | && ((headroom + tailroom) >= (4 + padlen))) { | ||
340 | if ((headroom < 4) || (tailroom < padlen)) { | ||
341 | skb->data = memmove(skb->head + 4, skb->data, skb->len); | ||
342 | skb->tail = skb->data + skb->len; | ||
343 | } | ||
344 | } else { | ||
345 | struct sk_buff *skb2; | ||
346 | skb2 = skb_copy_expand(skb, 4, padlen, flags); | ||
347 | dev_kfree_skb_any(skb); | ||
348 | skb = skb2; | ||
349 | if (!skb) | ||
350 | return NULL; | ||
351 | } | ||
352 | |||
353 | skb_push(skb, 4); | ||
354 | packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4); | ||
355 | memcpy(skb->data, &packet_len, sizeof(packet_len)); | ||
356 | |||
357 | if ((skb->len % 512) == 0) { | ||
358 | memcpy( skb->tail, &padbytes, sizeof(padbytes)); | ||
359 | skb_put(skb, sizeof(padbytes)); | ||
360 | } | ||
361 | return skb; | ||
362 | } | ||
363 | |||
364 | static void asix_status(struct usbnet *dev, struct urb *urb) | ||
365 | { | ||
366 | struct ax88172_int_data *event; | ||
367 | int link; | ||
368 | |||
369 | if (urb->actual_length < 8) | ||
370 | return; | ||
371 | |||
372 | event = urb->transfer_buffer; | ||
373 | link = event->link & 0x01; | ||
374 | if (netif_carrier_ok(dev->net) != link) { | ||
375 | if (link) { | ||
376 | netif_carrier_on(dev->net); | ||
377 | usbnet_defer_kevent (dev, EVENT_LINK_RESET ); | ||
378 | } else | ||
379 | netif_carrier_off(dev->net); | ||
380 | devdbg(dev, "Link Status is: %d", link); | ||
381 | } | ||
382 | } | ||
383 | |||
164 | static inline int asix_set_sw_mii(struct usbnet *dev) | 384 | static inline int asix_set_sw_mii(struct usbnet *dev) |
165 | { | 385 | { |
166 | int ret; | 386 | int ret; |
167 | ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL); | 387 | ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL); |
168 | if (ret < 0) | 388 | if (ret < 0) |
169 | devdbg(dev, "Failed to enable software MII access"); | 389 | deverr(dev, "Failed to enable software MII access"); |
170 | return ret; | 390 | return ret; |
171 | } | 391 | } |
172 | 392 | ||
@@ -175,24 +395,27 @@ static inline int asix_set_hw_mii(struct usbnet *dev) | |||
175 | int ret; | 395 | int ret; |
176 | ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL); | 396 | ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL); |
177 | if (ret < 0) | 397 | if (ret < 0) |
178 | devdbg(dev, "Failed to enable hardware MII access"); | 398 | deverr(dev, "Failed to enable hardware MII access"); |
179 | return ret; | 399 | return ret; |
180 | } | 400 | } |
181 | 401 | ||
182 | static inline int asix_get_phyid(struct usbnet *dev) | 402 | static inline int asix_get_phy_addr(struct usbnet *dev) |
183 | { | 403 | { |
184 | int ret = 0; | 404 | int ret = 0; |
185 | void *buf; | 405 | void *buf; |
186 | 406 | ||
407 | devdbg(dev, "asix_get_phy_addr()"); | ||
408 | |||
187 | buf = kmalloc(2, GFP_KERNEL); | 409 | buf = kmalloc(2, GFP_KERNEL); |
188 | if (!buf) | 410 | if (!buf) |
189 | goto out1; | 411 | goto out1; |
190 | 412 | ||
191 | if ((ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, | 413 | if ((ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, |
192 | 0, 0, 2, buf)) < 2) { | 414 | 0, 0, 2, buf)) < 2) { |
193 | devdbg(dev, "Error reading PHYID register: %02x", ret); | 415 | deverr(dev, "Error reading PHYID register: %02x", ret); |
194 | goto out2; | 416 | goto out2; |
195 | } | 417 | } |
418 | devdbg(dev, "asix_get_phy_addr() returning 0x%04x", *((u16 *)buf)); | ||
196 | ret = *((u8 *)buf + 1); | 419 | ret = *((u8 *)buf + 1); |
197 | out2: | 420 | out2: |
198 | kfree(buf); | 421 | kfree(buf); |
@@ -206,8 +429,29 @@ static int asix_sw_reset(struct usbnet *dev, u8 flags) | |||
206 | 429 | ||
207 | ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL); | 430 | ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL); |
208 | if (ret < 0) | 431 | if (ret < 0) |
209 | devdbg(dev,"Failed to send software reset: %02x", ret); | 432 | deverr(dev,"Failed to send software reset: %02x", ret); |
433 | |||
434 | return ret; | ||
435 | } | ||
436 | |||
437 | static u16 asix_read_rx_ctl(struct usbnet *dev) | ||
438 | { | ||
439 | u16 ret = 0; | ||
440 | void *buf; | ||
441 | |||
442 | buf = kmalloc(2, GFP_KERNEL); | ||
443 | if (!buf) | ||
444 | goto out1; | ||
210 | 445 | ||
446 | if ((ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, | ||
447 | 0, 0, 2, buf)) < 2) { | ||
448 | deverr(dev, "Error reading RX_CTL register: %02x", ret); | ||
449 | goto out2; | ||
450 | } | ||
451 | ret = le16_to_cpu(*((u16 *)buf)); | ||
452 | out2: | ||
453 | kfree(buf); | ||
454 | out1: | ||
211 | return ret; | 455 | return ret; |
212 | } | 456 | } |
213 | 457 | ||
@@ -215,82 +459,79 @@ static int asix_write_rx_ctl(struct usbnet *dev, u16 mode) | |||
215 | { | 459 | { |
216 | int ret; | 460 | int ret; |
217 | 461 | ||
462 | devdbg(dev,"asix_write_rx_ctl() - mode = 0x%04x", mode); | ||
218 | ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL); | 463 | ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL); |
219 | if (ret < 0) | 464 | if (ret < 0) |
220 | devdbg(dev, "Failed to write RX_CTL mode: %02x", ret); | 465 | deverr(dev, "Failed to write RX_CTL mode to 0x%04x: %02x", |
466 | mode, ret); | ||
221 | 467 | ||
222 | return ret; | 468 | return ret; |
223 | } | 469 | } |
224 | 470 | ||
225 | static void asix_status(struct usbnet *dev, struct urb *urb) | 471 | static u16 asix_read_medium_status(struct usbnet *dev) |
226 | { | 472 | { |
227 | struct ax88172_int_data *event; | 473 | u16 ret = 0; |
228 | int link; | 474 | void *buf; |
229 | 475 | ||
230 | if (urb->actual_length < 8) | 476 | buf = kmalloc(2, GFP_KERNEL); |
231 | return; | 477 | if (!buf) |
478 | goto out1; | ||
232 | 479 | ||
233 | event = urb->transfer_buffer; | 480 | if ((ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS, |
234 | link = event->link & 0x01; | 481 | 0, 0, 2, buf)) < 2) { |
235 | if (netif_carrier_ok(dev->net) != link) { | 482 | deverr(dev, "Error reading Medium Status register: %02x", ret); |
236 | if (link) { | 483 | goto out2; |
237 | netif_carrier_on(dev->net); | ||
238 | usbnet_defer_kevent (dev, EVENT_LINK_RESET ); | ||
239 | } else | ||
240 | netif_carrier_off(dev->net); | ||
241 | devdbg(dev, "Link Status is: %d", link); | ||
242 | } | 484 | } |
485 | ret = le16_to_cpu(*((u16 *)buf)); | ||
486 | out2: | ||
487 | kfree(buf); | ||
488 | out1: | ||
489 | return ret; | ||
243 | } | 490 | } |
244 | 491 | ||
245 | static void | 492 | static int asix_write_medium_mode(struct usbnet *dev, u16 mode) |
246 | asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index, | ||
247 | u16 size, void *data) | ||
248 | { | 493 | { |
249 | struct usb_ctrlrequest *req; | 494 | int ret; |
250 | int status; | ||
251 | struct urb *urb; | ||
252 | 495 | ||
253 | if ((urb = usb_alloc_urb(0, GFP_ATOMIC)) == NULL) { | 496 | devdbg(dev,"asix_write_medium_mode() - mode = 0x%04x", mode); |
254 | devdbg(dev, "Error allocating URB in write_cmd_async!"); | 497 | ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL); |
255 | return; | 498 | if (ret < 0) |
256 | } | 499 | deverr(dev, "Failed to write Medium Mode mode to 0x%04x: %02x", |
500 | mode, ret); | ||
257 | 501 | ||
258 | if ((req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC)) == NULL) { | 502 | return ret; |
259 | deverr(dev, "Failed to allocate memory for control request"); | 503 | } |
260 | usb_free_urb(urb); | ||
261 | return; | ||
262 | } | ||
263 | 504 | ||
264 | req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE; | 505 | static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep) |
265 | req->bRequest = cmd; | 506 | { |
266 | req->wValue = cpu_to_le16(value); | 507 | int ret; |
267 | req->wIndex = cpu_to_le16(index); | ||
268 | req->wLength = cpu_to_le16(size); | ||
269 | 508 | ||
270 | usb_fill_control_urb(urb, dev->udev, | 509 | devdbg(dev,"asix_write_gpio() - value = 0x%04x", value); |
271 | usb_sndctrlpipe(dev->udev, 0), | 510 | ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL); |
272 | (void *)req, data, size, | 511 | if (ret < 0) |
273 | asix_async_cmd_callback, req); | 512 | deverr(dev, "Failed to write GPIO value 0x%04x: %02x", |
513 | value, ret); | ||
274 | 514 | ||
275 | if((status = usb_submit_urb(urb, GFP_ATOMIC)) < 0) { | 515 | if (sleep) |
276 | deverr(dev, "Error submitting the control message: status=%d", | 516 | msleep(sleep); |
277 | status); | 517 | |
278 | kfree(req); | 518 | return ret; |
279 | usb_free_urb(urb); | ||
280 | } | ||
281 | } | 519 | } |
282 | 520 | ||
521 | /* | ||
522 | * AX88772 & AX88178 have a 16-bit RX_CTL value | ||
523 | */ | ||
283 | static void asix_set_multicast(struct net_device *net) | 524 | static void asix_set_multicast(struct net_device *net) |
284 | { | 525 | { |
285 | struct usbnet *dev = netdev_priv(net); | 526 | struct usbnet *dev = netdev_priv(net); |
286 | struct asix_data *data = (struct asix_data *)&dev->data; | 527 | struct asix_data *data = (struct asix_data *)&dev->data; |
287 | u8 rx_ctl = 0x8c; | 528 | u16 rx_ctl = AX_DEFAULT_RX_CTL; |
288 | 529 | ||
289 | if (net->flags & IFF_PROMISC) { | 530 | if (net->flags & IFF_PROMISC) { |
290 | rx_ctl |= 0x01; | 531 | rx_ctl |= AX_RX_CTL_PRO; |
291 | } else if (net->flags & IFF_ALLMULTI | 532 | } else if (net->flags & IFF_ALLMULTI |
292 | || net->mc_count > AX_MAX_MCAST) { | 533 | || net->mc_count > AX_MAX_MCAST) { |
293 | rx_ctl |= 0x02; | 534 | rx_ctl |= AX_RX_CTL_AMALL; |
294 | } else if (net->mc_count == 0) { | 535 | } else if (net->mc_count == 0) { |
295 | /* just broadcast and directed */ | 536 | /* just broadcast and directed */ |
296 | } else { | 537 | } else { |
@@ -317,7 +558,7 @@ static void asix_set_multicast(struct net_device *net) | |||
317 | asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0, | 558 | asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0, |
318 | AX_MCAST_FILTER_SIZE, data->multi_filter); | 559 | AX_MCAST_FILTER_SIZE, data->multi_filter); |
319 | 560 | ||
320 | rx_ctl |= 0x10; | 561 | rx_ctl |= AX_RX_CTL_AM; |
321 | } | 562 | } |
322 | 563 | ||
323 | asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL); | 564 | asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL); |
@@ -333,50 +574,43 @@ static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc) | |||
333 | (__u16)loc, 2, (u16 *)&res); | 574 | (__u16)loc, 2, (u16 *)&res); |
334 | asix_set_hw_mii(dev); | 575 | asix_set_hw_mii(dev); |
335 | 576 | ||
336 | return res & 0xffff; | 577 | devdbg(dev, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x", phy_id, loc, le16_to_cpu(res & 0xffff)); |
337 | } | ||
338 | 578 | ||
339 | /* same as above, but converts resulting value to cpu byte order */ | 579 | return le16_to_cpu(res & 0xffff); |
340 | static int asix_mdio_read_le(struct net_device *netdev, int phy_id, int loc) | ||
341 | { | ||
342 | return le16_to_cpu(asix_mdio_read(netdev,phy_id, loc)); | ||
343 | } | 580 | } |
344 | 581 | ||
345 | static void | 582 | static void |
346 | asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val) | 583 | asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val) |
347 | { | 584 | { |
348 | struct usbnet *dev = netdev_priv(netdev); | 585 | struct usbnet *dev = netdev_priv(netdev); |
349 | u16 res = val; | 586 | u16 res = cpu_to_le16(val); |
350 | 587 | ||
588 | devdbg(dev, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x", phy_id, loc, val); | ||
351 | asix_set_sw_mii(dev); | 589 | asix_set_sw_mii(dev); |
352 | asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, | 590 | asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, |
353 | (__u16)loc, 2, (u16 *)&res); | 591 | (__u16)loc, 2, (u16 *)&res); |
354 | asix_set_hw_mii(dev); | 592 | asix_set_hw_mii(dev); |
355 | } | 593 | } |
356 | 594 | ||
357 | /* same as above, but converts new value to le16 byte order before writing */ | 595 | /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */ |
358 | static void | 596 | static u32 asix_get_phyid(struct usbnet *dev) |
359 | asix_mdio_write_le(struct net_device *netdev, int phy_id, int loc, int val) | ||
360 | { | 597 | { |
361 | asix_mdio_write( netdev, phy_id, loc, cpu_to_le16(val) ); | 598 | int phy_reg; |
362 | } | 599 | u32 phy_id; |
363 | 600 | ||
364 | static int ax88172_link_reset(struct usbnet *dev) | 601 | phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1); |
365 | { | 602 | if (phy_reg < 0) |
366 | u16 lpa; | 603 | return 0; |
367 | u16 adv; | ||
368 | u16 res; | ||
369 | u8 mode; | ||
370 | 604 | ||
371 | mode = AX_MEDIUM_TX_ABORT_ALLOW | AX_MEDIUM_FLOW_CONTROL_EN; | 605 | phy_id = (phy_reg & 0xffff) << 16; |
372 | lpa = asix_mdio_read_le(dev->net, dev->mii.phy_id, MII_LPA); | ||
373 | adv = asix_mdio_read_le(dev->net, dev->mii.phy_id, MII_ADVERTISE); | ||
374 | res = mii_nway_result(lpa|adv); | ||
375 | if (res & LPA_DUPLEX) | ||
376 | mode |= AX_MEDIUM_FULL_DUPLEX; | ||
377 | asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL); | ||
378 | 606 | ||
379 | return 0; | 607 | phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2); |
608 | if (phy_reg < 0) | ||
609 | return 0; | ||
610 | |||
611 | phy_id |= (phy_reg & 0xffff); | ||
612 | |||
613 | return phy_id; | ||
380 | } | 614 | } |
381 | 615 | ||
382 | static void | 616 | static void |
@@ -423,7 +657,10 @@ asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo) | |||
423 | 657 | ||
424 | static int asix_get_eeprom_len(struct net_device *net) | 658 | static int asix_get_eeprom_len(struct net_device *net) |
425 | { | 659 | { |
426 | return AX_EEPROM_LEN; | 660 | struct usbnet *dev = netdev_priv(net); |
661 | struct asix_data *data = (struct asix_data *)&dev->data; | ||
662 | |||
663 | return data->eeprom_len; | ||
427 | } | 664 | } |
428 | 665 | ||
429 | static int asix_get_eeprom(struct net_device *net, | 666 | static int asix_get_eeprom(struct net_device *net, |
@@ -453,9 +690,14 @@ static int asix_get_eeprom(struct net_device *net, | |||
453 | static void asix_get_drvinfo (struct net_device *net, | 690 | static void asix_get_drvinfo (struct net_device *net, |
454 | struct ethtool_drvinfo *info) | 691 | struct ethtool_drvinfo *info) |
455 | { | 692 | { |
693 | struct usbnet *dev = netdev_priv(net); | ||
694 | struct asix_data *data = (struct asix_data *)&dev->data; | ||
695 | |||
456 | /* Inherit standard device info */ | 696 | /* Inherit standard device info */ |
457 | usbnet_get_drvinfo(net, info); | 697 | usbnet_get_drvinfo(net, info); |
458 | info->eedump_len = 0x3e; | 698 | strncpy (info->driver, driver_name, sizeof info->driver); |
699 | strncpy (info->version, DRIVER_VERSION, sizeof info->version); | ||
700 | info->eedump_len = data->eeprom_len; | ||
459 | } | 701 | } |
460 | 702 | ||
461 | static int asix_get_settings(struct net_device *net, struct ethtool_cmd *cmd) | 703 | static int asix_get_settings(struct net_device *net, struct ethtool_cmd *cmd) |
@@ -468,8 +710,34 @@ static int asix_get_settings(struct net_device *net, struct ethtool_cmd *cmd) | |||
468 | static int asix_set_settings(struct net_device *net, struct ethtool_cmd *cmd) | 710 | static int asix_set_settings(struct net_device *net, struct ethtool_cmd *cmd) |
469 | { | 711 | { |
470 | struct usbnet *dev = netdev_priv(net); | 712 | struct usbnet *dev = netdev_priv(net); |
713 | int res = mii_ethtool_sset(&dev->mii,cmd); | ||
714 | |||
715 | /* link speed/duplex might have changed */ | ||
716 | if (dev->driver_info->link_reset) | ||
717 | dev->driver_info->link_reset(dev); | ||
718 | |||
719 | return res; | ||
720 | } | ||
721 | |||
722 | static int asix_nway_reset(struct net_device *net) | ||
723 | { | ||
724 | struct usbnet *dev = netdev_priv(net); | ||
725 | |||
726 | return mii_nway_restart(&dev->mii); | ||
727 | } | ||
728 | |||
729 | static u32 asix_get_link(struct net_device *net) | ||
730 | { | ||
731 | struct usbnet *dev = netdev_priv(net); | ||
471 | 732 | ||
472 | return mii_ethtool_sset(&dev->mii,cmd); | 733 | return mii_link_ok(&dev->mii); |
734 | } | ||
735 | |||
736 | static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd) | ||
737 | { | ||
738 | struct usbnet *dev = netdev_priv(net); | ||
739 | |||
740 | return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); | ||
473 | } | 741 | } |
474 | 742 | ||
475 | /* We need to override some ethtool_ops so we require our | 743 | /* We need to override some ethtool_ops so we require our |
@@ -477,7 +745,8 @@ static int asix_set_settings(struct net_device *net, struct ethtool_cmd *cmd) | |||
477 | devices that may be connected at the same time. */ | 745 | devices that may be connected at the same time. */ |
478 | static struct ethtool_ops ax88172_ethtool_ops = { | 746 | static struct ethtool_ops ax88172_ethtool_ops = { |
479 | .get_drvinfo = asix_get_drvinfo, | 747 | .get_drvinfo = asix_get_drvinfo, |
480 | .get_link = ethtool_op_get_link, | 748 | .get_link = asix_get_link, |
749 | .nway_reset = asix_nway_reset, | ||
481 | .get_msglevel = usbnet_get_msglevel, | 750 | .get_msglevel = usbnet_get_msglevel, |
482 | .set_msglevel = usbnet_set_msglevel, | 751 | .set_msglevel = usbnet_set_msglevel, |
483 | .get_wol = asix_get_wol, | 752 | .get_wol = asix_get_wol, |
@@ -488,11 +757,66 @@ static struct ethtool_ops ax88172_ethtool_ops = { | |||
488 | .set_settings = asix_set_settings, | 757 | .set_settings = asix_set_settings, |
489 | }; | 758 | }; |
490 | 759 | ||
491 | static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd) | 760 | static void ax88172_set_multicast(struct net_device *net) |
492 | { | 761 | { |
493 | struct usbnet *dev = netdev_priv(net); | 762 | struct usbnet *dev = netdev_priv(net); |
763 | struct asix_data *data = (struct asix_data *)&dev->data; | ||
764 | u8 rx_ctl = 0x8c; | ||
494 | 765 | ||
495 | return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); | 766 | if (net->flags & IFF_PROMISC) { |
767 | rx_ctl |= 0x01; | ||
768 | } else if (net->flags & IFF_ALLMULTI | ||
769 | || net->mc_count > AX_MAX_MCAST) { | ||
770 | rx_ctl |= 0x02; | ||
771 | } else if (net->mc_count == 0) { | ||
772 | /* just broadcast and directed */ | ||
773 | } else { | ||
774 | /* We use the 20 byte dev->data | ||
775 | * for our 8 byte filter buffer | ||
776 | * to avoid allocating memory that | ||
777 | * is tricky to free later */ | ||
778 | struct dev_mc_list *mc_list = net->mc_list; | ||
779 | u32 crc_bits; | ||
780 | int i; | ||
781 | |||
782 | memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE); | ||
783 | |||
784 | /* Build the multicast hash filter. */ | ||
785 | for (i = 0; i < net->mc_count; i++) { | ||
786 | crc_bits = | ||
787 | ether_crc(ETH_ALEN, | ||
788 | mc_list->dmi_addr) >> 26; | ||
789 | data->multi_filter[crc_bits >> 3] |= | ||
790 | 1 << (crc_bits & 7); | ||
791 | mc_list = mc_list->next; | ||
792 | } | ||
793 | |||
794 | asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0, | ||
795 | AX_MCAST_FILTER_SIZE, data->multi_filter); | ||
796 | |||
797 | rx_ctl |= 0x10; | ||
798 | } | ||
799 | |||
800 | asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL); | ||
801 | } | ||
802 | |||
803 | static int ax88172_link_reset(struct usbnet *dev) | ||
804 | { | ||
805 | u8 mode; | ||
806 | struct ethtool_cmd ecmd; | ||
807 | |||
808 | mii_check_media(&dev->mii, 1, 1); | ||
809 | mii_ethtool_gset(&dev->mii, &ecmd); | ||
810 | mode = AX88172_MEDIUM_DEFAULT; | ||
811 | |||
812 | if (ecmd.duplex != DUPLEX_FULL) | ||
813 | mode |= ~AX88172_MEDIUM_FD; | ||
814 | |||
815 | devdbg(dev, "ax88172_link_reset() speed: %d duplex: %d setting mode to 0x%04x", ecmd.speed, ecmd.duplex, mode); | ||
816 | |||
817 | asix_write_medium_mode(dev, mode); | ||
818 | |||
819 | return 0; | ||
496 | } | 820 | } |
497 | 821 | ||
498 | static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf) | 822 | static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf) |
@@ -501,6 +825,9 @@ static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf) | |||
501 | void *buf; | 825 | void *buf; |
502 | int i; | 826 | int i; |
503 | unsigned long gpio_bits = dev->driver_info->data; | 827 | unsigned long gpio_bits = dev->driver_info->data; |
828 | struct asix_data *data = (struct asix_data *)&dev->data; | ||
829 | |||
830 | data->eeprom_len = AX88172_EEPROM_LEN; | ||
504 | 831 | ||
505 | usbnet_get_endpoints(dev,intf); | 832 | usbnet_get_endpoints(dev,intf); |
506 | 833 | ||
@@ -519,12 +846,12 @@ static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf) | |||
519 | msleep(5); | 846 | msleep(5); |
520 | } | 847 | } |
521 | 848 | ||
522 | if ((ret = asix_write_rx_ctl(dev,0x80)) < 0) | 849 | if ((ret = asix_write_rx_ctl(dev, 0x80)) < 0) |
523 | goto out2; | 850 | goto out2; |
524 | 851 | ||
525 | /* Get the MAC address */ | 852 | /* Get the MAC address */ |
526 | memset(buf, 0, ETH_ALEN); | 853 | memset(buf, 0, ETH_ALEN); |
527 | if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, | 854 | if ((ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, |
528 | 0, 0, 6, buf)) < 0) { | 855 | 0, 0, 6, buf)) < 0) { |
529 | dbg("read AX_CMD_READ_NODE_ID failed: %d", ret); | 856 | dbg("read AX_CMD_READ_NODE_ID failed: %d", ret); |
530 | goto out2; | 857 | goto out2; |
@@ -537,14 +864,14 @@ static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf) | |||
537 | dev->mii.mdio_write = asix_mdio_write; | 864 | dev->mii.mdio_write = asix_mdio_write; |
538 | dev->mii.phy_id_mask = 0x3f; | 865 | dev->mii.phy_id_mask = 0x3f; |
539 | dev->mii.reg_num_mask = 0x1f; | 866 | dev->mii.reg_num_mask = 0x1f; |
540 | dev->mii.phy_id = asix_get_phyid(dev); | 867 | dev->mii.phy_id = asix_get_phy_addr(dev); |
541 | dev->net->do_ioctl = asix_ioctl; | 868 | dev->net->do_ioctl = asix_ioctl; |
542 | 869 | ||
543 | dev->net->set_multicast_list = asix_set_multicast; | 870 | dev->net->set_multicast_list = ax88172_set_multicast; |
544 | dev->net->ethtool_ops = &ax88172_ethtool_ops; | 871 | dev->net->ethtool_ops = &ax88172_ethtool_ops; |
545 | 872 | ||
546 | asix_mdio_write_le(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); | 873 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); |
547 | asix_mdio_write_le(dev->net, dev->mii.phy_id, MII_ADVERTISE, | 874 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, |
548 | ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP); | 875 | ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP); |
549 | mii_nway_restart(&dev->mii); | 876 | mii_nway_restart(&dev->mii); |
550 | 877 | ||
@@ -557,7 +884,8 @@ out1: | |||
557 | 884 | ||
558 | static struct ethtool_ops ax88772_ethtool_ops = { | 885 | static struct ethtool_ops ax88772_ethtool_ops = { |
559 | .get_drvinfo = asix_get_drvinfo, | 886 | .get_drvinfo = asix_get_drvinfo, |
560 | .get_link = ethtool_op_get_link, | 887 | .get_link = asix_get_link, |
888 | .nway_reset = asix_nway_reset, | ||
561 | .get_msglevel = usbnet_get_msglevel, | 889 | .get_msglevel = usbnet_get_msglevel, |
562 | .set_msglevel = usbnet_set_msglevel, | 890 | .set_msglevel = usbnet_set_msglevel, |
563 | .get_wol = asix_get_wol, | 891 | .get_wol = asix_get_wol, |
@@ -568,10 +896,37 @@ static struct ethtool_ops ax88772_ethtool_ops = { | |||
568 | .set_settings = asix_set_settings, | 896 | .set_settings = asix_set_settings, |
569 | }; | 897 | }; |
570 | 898 | ||
899 | static int ax88772_link_reset(struct usbnet *dev) | ||
900 | { | ||
901 | u16 mode; | ||
902 | struct ethtool_cmd ecmd; | ||
903 | |||
904 | mii_check_media(&dev->mii, 1, 1); | ||
905 | mii_ethtool_gset(&dev->mii, &ecmd); | ||
906 | mode = AX88772_MEDIUM_DEFAULT; | ||
907 | |||
908 | if (ecmd.speed != SPEED_100) | ||
909 | mode &= ~AX_MEDIUM_PS; | ||
910 | |||
911 | if (ecmd.duplex != DUPLEX_FULL) | ||
912 | mode &= ~AX_MEDIUM_FD; | ||
913 | |||
914 | devdbg(dev, "ax88772_link_reset() speed: %d duplex: %d setting mode to 0x%04x", ecmd.speed, ecmd.duplex, mode); | ||
915 | |||
916 | asix_write_medium_mode(dev, mode); | ||
917 | |||
918 | return 0; | ||
919 | } | ||
920 | |||
571 | static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf) | 921 | static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf) |
572 | { | 922 | { |
573 | int ret; | 923 | int ret; |
574 | void *buf; | 924 | void *buf; |
925 | u16 rx_ctl; | ||
926 | struct asix_data *data = (struct asix_data *)&dev->data; | ||
927 | u32 phyid; | ||
928 | |||
929 | data->eeprom_len = AX88772_EEPROM_LEN; | ||
575 | 930 | ||
576 | usbnet_get_endpoints(dev,intf); | 931 | usbnet_get_endpoints(dev,intf); |
577 | 932 | ||
@@ -582,13 +937,12 @@ static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf) | |||
582 | goto out1; | 937 | goto out1; |
583 | } | 938 | } |
584 | 939 | ||
585 | if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, | 940 | if ((ret = asix_write_gpio(dev, |
586 | 0x00B0, 0, 0, buf)) < 0) | 941 | AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5)) < 0) |
587 | goto out2; | 942 | goto out2; |
588 | 943 | ||
589 | msleep(5); | ||
590 | if ((ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, | 944 | if ((ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, |
591 | 0x0001, 0, 0, buf)) < 0) { | 945 | 0x0000, 0, 0, buf)) < 0) { |
592 | dbg("Select PHY #1 failed: %d", ret); | 946 | dbg("Select PHY #1 failed: %d", ret); |
593 | goto out2; | 947 | goto out2; |
594 | } | 948 | } |
@@ -605,36 +959,34 @@ static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf) | |||
605 | goto out2; | 959 | goto out2; |
606 | 960 | ||
607 | msleep(150); | 961 | msleep(150); |
608 | if ((ret = asix_write_rx_ctl(dev, 0x00)) < 0) | 962 | rx_ctl = asix_read_rx_ctl(dev); |
963 | dbg("RX_CTL is 0x%04x after software reset", rx_ctl); | ||
964 | if ((ret = asix_write_rx_ctl(dev, 0x0000)) < 0) | ||
609 | goto out2; | 965 | goto out2; |
610 | 966 | ||
967 | rx_ctl = asix_read_rx_ctl(dev); | ||
968 | dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl); | ||
969 | |||
611 | /* Get the MAC address */ | 970 | /* Get the MAC address */ |
612 | memset(buf, 0, ETH_ALEN); | 971 | memset(buf, 0, ETH_ALEN); |
613 | if ((ret = asix_read_cmd(dev, AX88772_CMD_READ_NODE_ID, | 972 | if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, |
614 | 0, 0, ETH_ALEN, buf)) < 0) { | 973 | 0, 0, ETH_ALEN, buf)) < 0) { |
615 | dbg("Failed to read MAC address: %d", ret); | 974 | dbg("Failed to read MAC address: %d", ret); |
616 | goto out2; | 975 | goto out2; |
617 | } | 976 | } |
618 | memcpy(dev->net->dev_addr, buf, ETH_ALEN); | 977 | memcpy(dev->net->dev_addr, buf, ETH_ALEN); |
619 | 978 | ||
620 | if ((ret = asix_set_sw_mii(dev)) < 0) | ||
621 | goto out2; | ||
622 | |||
623 | if (((ret = asix_read_cmd(dev, AX_CMD_READ_MII_REG, | ||
624 | 0x0010, 2, 2, buf)) < 0) | ||
625 | || (*((u16 *)buf) != 0x003b)) { | ||
626 | dbg("Read PHY register 2 must be 0x3b00: %d", ret); | ||
627 | goto out2; | ||
628 | } | ||
629 | |||
630 | /* Initialize MII structure */ | 979 | /* Initialize MII structure */ |
631 | dev->mii.dev = dev->net; | 980 | dev->mii.dev = dev->net; |
632 | dev->mii.mdio_read = asix_mdio_read; | 981 | dev->mii.mdio_read = asix_mdio_read; |
633 | dev->mii.mdio_write = asix_mdio_write; | 982 | dev->mii.mdio_write = asix_mdio_write; |
634 | dev->mii.phy_id_mask = 0xff; | 983 | dev->mii.phy_id_mask = 0x1f; |
635 | dev->mii.reg_num_mask = 0xff; | 984 | dev->mii.reg_num_mask = 0x1f; |
636 | dev->net->do_ioctl = asix_ioctl; | 985 | dev->net->do_ioctl = asix_ioctl; |
637 | dev->mii.phy_id = asix_get_phyid(dev); | 986 | dev->mii.phy_id = asix_get_phy_addr(dev); |
987 | |||
988 | phyid = asix_get_phyid(dev); | ||
989 | dbg("PHYID=0x%08x", phyid); | ||
638 | 990 | ||
639 | if ((ret = asix_sw_reset(dev, AX_SWRESET_PRL)) < 0) | 991 | if ((ret = asix_sw_reset(dev, AX_SWRESET_PRL)) < 0) |
640 | goto out2; | 992 | goto out2; |
@@ -649,16 +1001,13 @@ static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf) | |||
649 | dev->net->set_multicast_list = asix_set_multicast; | 1001 | dev->net->set_multicast_list = asix_set_multicast; |
650 | dev->net->ethtool_ops = &ax88772_ethtool_ops; | 1002 | dev->net->ethtool_ops = &ax88772_ethtool_ops; |
651 | 1003 | ||
652 | asix_mdio_write_le(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); | 1004 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); |
653 | asix_mdio_write_le(dev->net, dev->mii.phy_id, MII_ADVERTISE, | 1005 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, |
654 | ADVERTISE_ALL | ADVERTISE_CSMA); | 1006 | ADVERTISE_ALL | ADVERTISE_CSMA); |
655 | mii_nway_restart(&dev->mii); | 1007 | mii_nway_restart(&dev->mii); |
656 | 1008 | ||
657 | if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, | 1009 | if ((ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT)) < 0) |
658 | AX88772_MEDIUM_DEFAULT, 0, 0, buf)) < 0) { | ||
659 | dbg("Write medium mode register: %d", ret); | ||
660 | goto out2; | 1010 | goto out2; |
661 | } | ||
662 | 1011 | ||
663 | if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0, | 1012 | if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0, |
664 | AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT, | 1013 | AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT, |
@@ -666,13 +1015,17 @@ static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf) | |||
666 | dbg("Write IPG,IPG1,IPG2 failed: %d", ret); | 1015 | dbg("Write IPG,IPG1,IPG2 failed: %d", ret); |
667 | goto out2; | 1016 | goto out2; |
668 | } | 1017 | } |
669 | if ((ret = asix_set_hw_mii(dev)) < 0) | ||
670 | goto out2; | ||
671 | 1018 | ||
672 | /* Set RX_CTL to default values with 2k buffer, and enable cactus */ | 1019 | /* Set RX_CTL to default values with 2k buffer, and enable cactus */ |
673 | if ((ret = asix_write_rx_ctl(dev, 0x0088)) < 0) | 1020 | if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0) |
674 | goto out2; | 1021 | goto out2; |
675 | 1022 | ||
1023 | rx_ctl = asix_read_rx_ctl(dev); | ||
1024 | dbg("RX_CTL is 0x%04x after all initializations", rx_ctl); | ||
1025 | |||
1026 | rx_ctl = asix_read_medium_status(dev); | ||
1027 | dbg("Medium Status is 0x%04x after all initializations", rx_ctl); | ||
1028 | |||
676 | kfree(buf); | 1029 | kfree(buf); |
677 | 1030 | ||
678 | /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */ | 1031 | /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */ |
@@ -690,120 +1043,285 @@ out1: | |||
690 | return ret; | 1043 | return ret; |
691 | } | 1044 | } |
692 | 1045 | ||
693 | static int ax88772_rx_fixup(struct usbnet *dev, struct sk_buff *skb) | 1046 | static struct ethtool_ops ax88178_ethtool_ops = { |
1047 | .get_drvinfo = asix_get_drvinfo, | ||
1048 | .get_link = asix_get_link, | ||
1049 | .nway_reset = asix_nway_reset, | ||
1050 | .get_msglevel = usbnet_get_msglevel, | ||
1051 | .set_msglevel = usbnet_set_msglevel, | ||
1052 | .get_wol = asix_get_wol, | ||
1053 | .set_wol = asix_set_wol, | ||
1054 | .get_eeprom_len = asix_get_eeprom_len, | ||
1055 | .get_eeprom = asix_get_eeprom, | ||
1056 | .get_settings = asix_get_settings, | ||
1057 | .set_settings = asix_set_settings, | ||
1058 | }; | ||
1059 | |||
1060 | static int marvell_phy_init(struct usbnet *dev) | ||
694 | { | 1061 | { |
695 | u8 *head; | 1062 | struct asix_data *data = (struct asix_data *)&dev->data; |
696 | u32 header; | 1063 | u16 reg; |
697 | char *packet; | ||
698 | struct sk_buff *ax_skb; | ||
699 | u16 size; | ||
700 | 1064 | ||
701 | head = (u8 *) skb->data; | 1065 | devdbg(dev,"marvell_phy_init()"); |
702 | memcpy(&header, head, sizeof(header)); | ||
703 | le32_to_cpus(&header); | ||
704 | packet = head + sizeof(header); | ||
705 | 1066 | ||
706 | skb_pull(skb, 4); | 1067 | reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS); |
1068 | devdbg(dev,"MII_MARVELL_STATUS = 0x%04x", reg); | ||
707 | 1069 | ||
708 | while (skb->len > 0) { | 1070 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL, |
709 | if ((short)(header & 0x0000ffff) != | 1071 | MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY); |
710 | ~((short)((header & 0xffff0000) >> 16))) { | ||
711 | devdbg(dev,"header length data is error"); | ||
712 | } | ||
713 | /* get the packet length */ | ||
714 | size = (u16) (header & 0x0000ffff); | ||
715 | 1072 | ||
716 | if ((skb->len) - ((size + 1) & 0xfffe) == 0) | 1073 | if (data->ledmode) { |
717 | return 2; | 1074 | reg = asix_mdio_read(dev->net, dev->mii.phy_id, |
718 | if (size > ETH_FRAME_LEN) { | 1075 | MII_MARVELL_LED_CTRL); |
719 | devdbg(dev,"invalid rx length %d", size); | 1076 | devdbg(dev,"MII_MARVELL_LED_CTRL (1) = 0x%04x", reg); |
720 | return 0; | ||
721 | } | ||
722 | ax_skb = skb_clone(skb, GFP_ATOMIC); | ||
723 | if (ax_skb) { | ||
724 | ax_skb->len = size; | ||
725 | ax_skb->data = packet; | ||
726 | ax_skb->tail = packet + size; | ||
727 | usbnet_skb_return(dev, ax_skb); | ||
728 | } else { | ||
729 | return 0; | ||
730 | } | ||
731 | 1077 | ||
732 | skb_pull(skb, (size + 1) & 0xfffe); | 1078 | reg &= 0xf8ff; |
1079 | reg |= (1 + 0x0100); | ||
1080 | asix_mdio_write(dev->net, dev->mii.phy_id, | ||
1081 | MII_MARVELL_LED_CTRL, reg); | ||
733 | 1082 | ||
734 | if (skb->len == 0) | 1083 | reg = asix_mdio_read(dev->net, dev->mii.phy_id, |
735 | break; | 1084 | MII_MARVELL_LED_CTRL); |
1085 | devdbg(dev,"MII_MARVELL_LED_CTRL (2) = 0x%04x", reg); | ||
1086 | reg &= 0xfc0f; | ||
1087 | } | ||
736 | 1088 | ||
737 | head = (u8 *) skb->data; | 1089 | return 0; |
738 | memcpy(&header, head, sizeof(header)); | 1090 | } |
739 | le32_to_cpus(&header); | 1091 | |
740 | packet = head + sizeof(header); | 1092 | static int marvell_led_status(struct usbnet *dev, u16 speed) |
741 | skb_pull(skb, 4); | 1093 | { |
1094 | u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL); | ||
1095 | |||
1096 | devdbg(dev, "marvell_led_status() read 0x%04x", reg); | ||
1097 | |||
1098 | /* Clear out the center LED bits - 0x03F0 */ | ||
1099 | reg &= 0xfc0f; | ||
1100 | |||
1101 | switch (speed) { | ||
1102 | case SPEED_1000: | ||
1103 | reg |= 0x03e0; | ||
1104 | break; | ||
1105 | case SPEED_100: | ||
1106 | reg |= 0x03b0; | ||
1107 | break; | ||
1108 | default: | ||
1109 | reg |= 0x02f0; | ||
742 | } | 1110 | } |
743 | 1111 | ||
744 | if (skb->len < 0) { | 1112 | devdbg(dev, "marvell_led_status() writing 0x%04x", reg); |
745 | devdbg(dev,"invalid rx length %d", skb->len); | 1113 | asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg); |
746 | return 0; | 1114 | |
1115 | return 0; | ||
1116 | } | ||
1117 | |||
1118 | static int ax88178_link_reset(struct usbnet *dev) | ||
1119 | { | ||
1120 | u16 mode; | ||
1121 | struct ethtool_cmd ecmd; | ||
1122 | struct asix_data *data = (struct asix_data *)&dev->data; | ||
1123 | |||
1124 | devdbg(dev,"ax88178_link_reset()"); | ||
1125 | |||
1126 | mii_check_media(&dev->mii, 1, 1); | ||
1127 | mii_ethtool_gset(&dev->mii, &ecmd); | ||
1128 | mode = AX88178_MEDIUM_DEFAULT; | ||
1129 | |||
1130 | if (ecmd.speed == SPEED_1000) | ||
1131 | mode |= AX_MEDIUM_GM | AX_MEDIUM_ENCK; | ||
1132 | else if (ecmd.speed == SPEED_100) | ||
1133 | mode |= AX_MEDIUM_PS; | ||
1134 | else | ||
1135 | mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM); | ||
1136 | |||
1137 | if (ecmd.duplex == DUPLEX_FULL) | ||
1138 | mode |= AX_MEDIUM_FD; | ||
1139 | else | ||
1140 | mode &= ~AX_MEDIUM_FD; | ||
1141 | |||
1142 | devdbg(dev, "ax88178_link_reset() speed: %d duplex: %d setting mode to 0x%04x", ecmd.speed, ecmd.duplex, mode); | ||
1143 | |||
1144 | asix_write_medium_mode(dev, mode); | ||
1145 | |||
1146 | if (data->phymode == PHY_MODE_MARVELL && data->ledmode) | ||
1147 | marvell_led_status(dev, ecmd.speed); | ||
1148 | |||
1149 | return 0; | ||
1150 | } | ||
1151 | |||
1152 | static void ax88178_set_mfb(struct usbnet *dev) | ||
1153 | { | ||
1154 | u16 mfb = AX_RX_CTL_MFB_16384; | ||
1155 | u16 rxctl; | ||
1156 | u16 medium; | ||
1157 | int old_rx_urb_size = dev->rx_urb_size; | ||
1158 | |||
1159 | if (dev->hard_mtu < 2048) { | ||
1160 | dev->rx_urb_size = 2048; | ||
1161 | mfb = AX_RX_CTL_MFB_2048; | ||
1162 | } else if (dev->hard_mtu < 4096) { | ||
1163 | dev->rx_urb_size = 4096; | ||
1164 | mfb = AX_RX_CTL_MFB_4096; | ||
1165 | } else if (dev->hard_mtu < 8192) { | ||
1166 | dev->rx_urb_size = 8192; | ||
1167 | mfb = AX_RX_CTL_MFB_8192; | ||
1168 | } else if (dev->hard_mtu < 16384) { | ||
1169 | dev->rx_urb_size = 16384; | ||
1170 | mfb = AX_RX_CTL_MFB_16384; | ||
747 | } | 1171 | } |
748 | return 1; | 1172 | |
1173 | rxctl = asix_read_rx_ctl(dev); | ||
1174 | asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb); | ||
1175 | |||
1176 | medium = asix_read_medium_status(dev); | ||
1177 | if (dev->net->mtu > 1500) | ||
1178 | medium |= AX_MEDIUM_JFE; | ||
1179 | else | ||
1180 | medium &= ~AX_MEDIUM_JFE; | ||
1181 | asix_write_medium_mode(dev, medium); | ||
1182 | |||
1183 | if (dev->rx_urb_size > old_rx_urb_size) | ||
1184 | usbnet_unlink_rx_urbs(dev); | ||
749 | } | 1185 | } |
750 | 1186 | ||
751 | static struct sk_buff *ax88772_tx_fixup(struct usbnet *dev, struct sk_buff *skb, | 1187 | static int ax88178_change_mtu(struct net_device *net, int new_mtu) |
752 | gfp_t flags) | ||
753 | { | 1188 | { |
754 | int padlen; | 1189 | struct usbnet *dev = netdev_priv(net); |
755 | int headroom = skb_headroom(skb); | 1190 | int ll_mtu = new_mtu + net->hard_header_len + 4; |
756 | int tailroom = skb_tailroom(skb); | ||
757 | u32 packet_len; | ||
758 | u32 padbytes = 0xffff0000; | ||
759 | 1191 | ||
760 | padlen = ((skb->len + 4) % 512) ? 0 : 4; | 1192 | devdbg(dev, "ax88178_change_mtu() new_mtu=%d", new_mtu); |
761 | 1193 | ||
762 | if ((!skb_cloned(skb)) | 1194 | if (new_mtu <= 0 || ll_mtu > 16384) |
763 | && ((headroom + tailroom) >= (4 + padlen))) { | 1195 | return -EINVAL; |
764 | if ((headroom < 4) || (tailroom < padlen)) { | 1196 | |
765 | skb->data = memmove(skb->head + 4, skb->data, skb->len); | 1197 | if ((ll_mtu % dev->maxpacket) == 0) |
766 | skb->tail = skb->data + skb->len; | 1198 | return -EDOM; |
767 | } | 1199 | |
1200 | net->mtu = new_mtu; | ||
1201 | dev->hard_mtu = net->mtu + net->hard_header_len; | ||
1202 | ax88178_set_mfb(dev); | ||
1203 | |||
1204 | return 0; | ||
1205 | } | ||
1206 | |||
1207 | static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf) | ||
1208 | { | ||
1209 | struct asix_data *data = (struct asix_data *)&dev->data; | ||
1210 | int ret; | ||
1211 | void *buf; | ||
1212 | u16 eeprom; | ||
1213 | int gpio0 = 0; | ||
1214 | u32 phyid; | ||
1215 | |||
1216 | usbnet_get_endpoints(dev,intf); | ||
1217 | |||
1218 | buf = kmalloc(6, GFP_KERNEL); | ||
1219 | if(!buf) { | ||
1220 | dbg ("Cannot allocate memory for buffer"); | ||
1221 | ret = -ENOMEM; | ||
1222 | goto out1; | ||
1223 | } | ||
1224 | |||
1225 | eeprom = 0; | ||
1226 | asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &eeprom); | ||
1227 | dbg("GPIO Status: 0x%04x", eeprom); | ||
1228 | |||
1229 | asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL); | ||
1230 | asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom); | ||
1231 | asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL); | ||
1232 | |||
1233 | dbg("EEPROM index 0x17 is 0x%04x", eeprom); | ||
1234 | |||
1235 | if (eeprom == 0xffff) { | ||
1236 | data->phymode = PHY_MODE_MARVELL; | ||
1237 | data->ledmode = 0; | ||
1238 | gpio0 = 1; | ||
768 | } else { | 1239 | } else { |
769 | struct sk_buff *skb2; | 1240 | data->phymode = eeprom & 7; |
770 | skb2 = skb_copy_expand(skb, 4, padlen, flags); | 1241 | data->ledmode = eeprom >> 8; |
771 | dev_kfree_skb_any(skb); | 1242 | gpio0 = (eeprom & 0x80) ? 0 : 1; |
772 | skb = skb2; | ||
773 | if (!skb) | ||
774 | return NULL; | ||
775 | } | 1243 | } |
1244 | dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode); | ||
776 | 1245 | ||
777 | skb_push(skb, 4); | 1246 | asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40); |
778 | packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4); | 1247 | if ((eeprom >> 8) != 1) { |
779 | memcpy(skb->data, &packet_len, sizeof(packet_len)); | 1248 | asix_write_gpio(dev, 0x003c, 30); |
1249 | asix_write_gpio(dev, 0x001c, 300); | ||
1250 | asix_write_gpio(dev, 0x003c, 30); | ||
1251 | } else { | ||
1252 | dbg("gpio phymode == 1 path"); | ||
1253 | asix_write_gpio(dev, AX_GPIO_GPO1EN, 30); | ||
1254 | asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30); | ||
1255 | } | ||
780 | 1256 | ||
781 | if ((skb->len % 512) == 0) { | 1257 | asix_sw_reset(dev, 0); |
782 | memcpy( skb->tail, &padbytes, sizeof(padbytes)); | 1258 | msleep(150); |
783 | skb_put(skb, sizeof(padbytes)); | 1259 | |
1260 | asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD); | ||
1261 | msleep(150); | ||
1262 | |||
1263 | asix_write_rx_ctl(dev, 0); | ||
1264 | |||
1265 | /* Get the MAC address */ | ||
1266 | memset(buf, 0, ETH_ALEN); | ||
1267 | if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, | ||
1268 | 0, 0, ETH_ALEN, buf)) < 0) { | ||
1269 | dbg("Failed to read MAC address: %d", ret); | ||
1270 | goto out2; | ||
784 | } | 1271 | } |
785 | return skb; | 1272 | memcpy(dev->net->dev_addr, buf, ETH_ALEN); |
786 | } | ||
787 | 1273 | ||
788 | static int ax88772_link_reset(struct usbnet *dev) | 1274 | /* Initialize MII structure */ |
789 | { | 1275 | dev->mii.dev = dev->net; |
790 | u16 lpa; | 1276 | dev->mii.mdio_read = asix_mdio_read; |
791 | u16 adv; | 1277 | dev->mii.mdio_write = asix_mdio_write; |
792 | u16 res; | 1278 | dev->mii.phy_id_mask = 0x1f; |
793 | u16 mode; | 1279 | dev->mii.reg_num_mask = 0xff; |
1280 | dev->mii.supports_gmii = 1; | ||
1281 | dev->net->do_ioctl = asix_ioctl; | ||
1282 | dev->mii.phy_id = asix_get_phy_addr(dev); | ||
1283 | dev->net->set_multicast_list = asix_set_multicast; | ||
1284 | dev->net->ethtool_ops = &ax88178_ethtool_ops; | ||
1285 | dev->net->change_mtu = &ax88178_change_mtu; | ||
794 | 1286 | ||
795 | mode = AX88772_MEDIUM_DEFAULT; | 1287 | phyid = asix_get_phyid(dev); |
796 | lpa = asix_mdio_read_le(dev->net, dev->mii.phy_id, MII_LPA); | 1288 | dbg("PHYID=0x%08x", phyid); |
797 | adv = asix_mdio_read_le(dev->net, dev->mii.phy_id, MII_ADVERTISE); | 1289 | |
798 | res = mii_nway_result(lpa|adv); | 1290 | if (data->phymode == PHY_MODE_MARVELL) { |
1291 | marvell_phy_init(dev); | ||
1292 | msleep(60); | ||
1293 | } | ||
1294 | |||
1295 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, | ||
1296 | BMCR_RESET | BMCR_ANENABLE); | ||
1297 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, | ||
1298 | ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP); | ||
1299 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000, | ||
1300 | ADVERTISE_1000FULL); | ||
1301 | |||
1302 | mii_nway_restart(&dev->mii); | ||
799 | 1303 | ||
800 | if ((res & LPA_DUPLEX) == 0) | 1304 | if ((ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT)) < 0) |
801 | mode &= ~AX88772_MEDIUM_FULL_DUPLEX; | 1305 | goto out2; |
802 | if ((res & LPA_100) == 0) | 1306 | |
803 | mode &= ~AX88772_MEDIUM_100MB; | 1307 | if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0) |
804 | asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL); | 1308 | goto out2; |
1309 | |||
1310 | kfree(buf); | ||
1311 | |||
1312 | /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */ | ||
1313 | if (dev->driver_info->flags & FLAG_FRAMING_AX) { | ||
1314 | /* hard_mtu is still the default - the device does not support | ||
1315 | jumbo eth frames */ | ||
1316 | dev->rx_urb_size = 2048; | ||
1317 | } | ||
805 | 1318 | ||
806 | return 0; | 1319 | return 0; |
1320 | |||
1321 | out2: | ||
1322 | kfree(buf); | ||
1323 | out1: | ||
1324 | return ret; | ||
807 | } | 1325 | } |
808 | 1326 | ||
809 | static const struct driver_info ax8817x_info = { | 1327 | static const struct driver_info ax8817x_info = { |
@@ -853,8 +1371,19 @@ static const struct driver_info ax88772_info = { | |||
853 | .link_reset = ax88772_link_reset, | 1371 | .link_reset = ax88772_link_reset, |
854 | .reset = ax88772_link_reset, | 1372 | .reset = ax88772_link_reset, |
855 | .flags = FLAG_ETHER | FLAG_FRAMING_AX, | 1373 | .flags = FLAG_ETHER | FLAG_FRAMING_AX, |
856 | .rx_fixup = ax88772_rx_fixup, | 1374 | .rx_fixup = asix_rx_fixup, |
857 | .tx_fixup = ax88772_tx_fixup, | 1375 | .tx_fixup = asix_tx_fixup, |
1376 | }; | ||
1377 | |||
1378 | static const struct driver_info ax88178_info = { | ||
1379 | .description = "ASIX AX88178 USB 2.0 Ethernet", | ||
1380 | .bind = ax88178_bind, | ||
1381 | .status = asix_status, | ||
1382 | .link_reset = ax88178_link_reset, | ||
1383 | .reset = ax88178_link_reset, | ||
1384 | .flags = FLAG_ETHER | FLAG_FRAMING_AX, | ||
1385 | .rx_fixup = asix_rx_fixup, | ||
1386 | .tx_fixup = asix_tx_fixup, | ||
858 | }; | 1387 | }; |
859 | 1388 | ||
860 | static const struct usb_device_id products [] = { | 1389 | static const struct usb_device_id products [] = { |
@@ -913,7 +1442,7 @@ static const struct usb_device_id products [] = { | |||
913 | }, { | 1442 | }, { |
914 | // ASIX AX88178 10/100/1000 | 1443 | // ASIX AX88178 10/100/1000 |
915 | USB_DEVICE (0x0b95, 0x1780), | 1444 | USB_DEVICE (0x0b95, 0x1780), |
916 | .driver_info = (unsigned long) &ax88772_info, | 1445 | .driver_info = (unsigned long) &ax88178_info, |
917 | }, { | 1446 | }, { |
918 | // Linksys USB200M Rev 2 | 1447 | // Linksys USB200M Rev 2 |
919 | USB_DEVICE (0x13b1, 0x0018), | 1448 | USB_DEVICE (0x13b1, 0x0018), |
@@ -922,6 +1451,14 @@ static const struct usb_device_id products [] = { | |||
922 | // 0Q0 cable ethernet | 1451 | // 0Q0 cable ethernet |
923 | USB_DEVICE (0x1557, 0x7720), | 1452 | USB_DEVICE (0x1557, 0x7720), |
924 | .driver_info = (unsigned long) &ax88772_info, | 1453 | .driver_info = (unsigned long) &ax88772_info, |
1454 | }, { | ||
1455 | // DLink DUB-E100 H/W Ver B1 | ||
1456 | USB_DEVICE (0x07d1, 0x3c05), | ||
1457 | .driver_info = (unsigned long) &ax88772_info, | ||
1458 | }, { | ||
1459 | // Linksys USB1000 | ||
1460 | USB_DEVICE (0x1737, 0x0039), | ||
1461 | .driver_info = (unsigned long) &ax88178_info, | ||
925 | }, | 1462 | }, |
926 | { }, // END | 1463 | { }, // END |
927 | }; | 1464 | }; |