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-rw-r--r--arch/arm/Kconfig8
-rw-r--r--arch/arm/Kconfig-nommu44
-rw-r--r--arch/arm/Makefile9
-rw-r--r--arch/arm/boot/compressed/head.S106
-rw-r--r--arch/arm/kernel/entry-armv.S2
-rw-r--r--arch/arm/kernel/head-common.S217
-rw-r--r--arch/arm/kernel/head-nommu.S83
-rw-r--r--arch/arm/kernel/head.S207
-rw-r--r--arch/arm/kernel/signal.h2
-rw-r--r--arch/arm/kernel/traps.c9
-rw-r--r--arch/arm/mm/proc-xsc3.S1
-rw-r--r--arch/ia64/kernel/palinfo.c8
-rw-r--r--arch/ia64/kernel/time.c2
-rw-r--r--arch/ia64/kernel/topology.c367
-rw-r--r--drivers/mmc/Kconfig11
-rw-r--r--drivers/mmc/Makefile5
-rw-r--r--drivers/mmc/au1xmmc.c19
-rw-r--r--drivers/mmc/mmc.c19
-rw-r--r--drivers/mmc/mmci.c4
-rw-r--r--drivers/mmc/omap.c1226
-rw-r--r--drivers/mmc/omap.h55
-rw-r--r--drivers/mmc/pxamci.c24
-rw-r--r--drivers/mmc/sdhci.c6
-rw-r--r--drivers/mmc/wbsd.c9
-rw-r--r--drivers/serial/Kconfig27
-rw-r--r--drivers/serial/Makefile12
-rw-r--r--fs/cifs/CHANGES18
-rw-r--r--fs/cifs/Makefile2
-rw-r--r--fs/cifs/README7
-rw-r--r--fs/cifs/cifsencrypt.c42
-rw-r--r--fs/cifs/cifsfs.c5
-rw-r--r--fs/cifs/cifsfs.h2
-rw-r--r--fs/cifs/cifsglob.h11
-rw-r--r--fs/cifs/cifspdu.h13
-rw-r--r--fs/cifs/cifsproto.h15
-rw-r--r--fs/cifs/cifssmb.c135
-rw-r--r--fs/cifs/connect.c99
-rw-r--r--fs/cifs/dir.c7
-rw-r--r--fs/cifs/file.c94
-rw-r--r--fs/cifs/inode.c22
-rw-r--r--fs/cifs/link.c2
-rw-r--r--fs/cifs/misc.c46
-rw-r--r--fs/cifs/ntlmssp.c129
-rw-r--r--fs/cifs/ntlmssp.h2
-rw-r--r--fs/cifs/readdir.c7
-rw-r--r--fs/cifs/transport.c22
-rw-r--r--include/asm-arm/arch-ixp23xx/uncompress.h11
-rw-r--r--include/asm-arm/arch-pxa/pxa-regs.h2
-rw-r--r--include/asm-arm/unistd.h11
-rw-r--r--include/asm-ia64/pal.h34
50 files changed, 2762 insertions, 458 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e91db542eb01..dc5a9332c915 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -77,6 +77,14 @@ config FIQ
77config ARCH_MTD_XIP 77config ARCH_MTD_XIP
78 bool 78 bool
79 79
80config VECTORS_BASE
81 hex
82 default 0xffff0000 if MMU
83 default DRAM_BASE if REMAP_VECTORS_TO_RAM
84 default 0x00000000
85 help
86 The base address of exception vectors.
87
80source "init/Kconfig" 88source "init/Kconfig"
81 89
82menu "System Type" 90menu "System Type"
diff --git a/arch/arm/Kconfig-nommu b/arch/arm/Kconfig-nommu
new file mode 100644
index 000000000000..e1574be2ded6
--- /dev/null
+++ b/arch/arm/Kconfig-nommu
@@ -0,0 +1,44 @@
1#
2# Kconfig for uClinux(non-paged MM) depend configurations
3# Hyok S. Choi <hyok.choi@samsung.com>
4#
5
6config SET_MEM_PARAM
7 bool "Set flash/sdram size and base addr"
8 help
9 Say Y to manually set the base addresses and sizes.
10 otherwise, the default values are assigned.
11
12config DRAM_BASE
13 hex '(S)DRAM Base Address' if SET_MEM_PARAM
14 default 0x00800000
15
16config DRAM_SIZE
17 hex '(S)DRAM SIZE' if SET_MEM_PARAM
18 default 0x00800000
19
20config FLASH_MEM_BASE
21 hex 'FLASH Base Address' if SET_MEM_PARAM
22 default 0x00400000
23
24config FLASH_SIZE
25 hex 'FLASH Size' if SET_MEM_PARAM
26 default 0x00400000
27
28config REMAP_VECTORS_TO_RAM
29 bool 'Install vectors to the begining of RAM' if DRAM_BASE
30 depends on DRAM_BASE
31 help
32 The kernel needs to change the hardware exception vectors.
33 In nommu mode, the hardware exception vectors are normally
34 placed at address 0x00000000. However, this region may be
35 occupied by read-only memory depending on H/W design.
36
37 If the region contains read-write memory, say 'n' here.
38
39 If your CPU provides a remap facility which allows the exception
40 vectors to be mapped to writable memory, say 'n' here.
41
42 Otherwise, say 'y' here. In this case, the kernel will require
43 external support to redirect the hardware exception vectors to
44 the writable versions located at DRAM_BASE.
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index ce3e804ea0f3..95a96275f88a 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -20,6 +20,11 @@ GZFLAGS :=-9
20# Select a platform tht is kept up-to-date 20# Select a platform tht is kept up-to-date
21KBUILD_DEFCONFIG := versatile_defconfig 21KBUILD_DEFCONFIG := versatile_defconfig
22 22
23# defines filename extension depending memory manement type.
24ifeq ($(CONFIG_MMU),)
25MMUEXT := -nommu
26endif
27
23ifeq ($(CONFIG_FRAME_POINTER),y) 28ifeq ($(CONFIG_FRAME_POINTER),y)
24CFLAGS +=-fno-omit-frame-pointer -mapcs -mno-sched-prolog 29CFLAGS +=-fno-omit-frame-pointer -mapcs -mno-sched-prolog
25endif 30endif
@@ -73,7 +78,7 @@ AFLAGS +=$(CFLAGS_ABI) $(arch-y) $(tune-y) -msoft-float
73CHECKFLAGS += -D__arm__ 78CHECKFLAGS += -D__arm__
74 79
75#Default value 80#Default value
76head-y := arch/arm/kernel/head.o arch/arm/kernel/init_task.o 81head-y := arch/arm/kernel/head$(MMUEXT).o arch/arm/kernel/init_task.o
77textofs-y := 0x00008000 82textofs-y := 0x00008000
78 83
79 machine-$(CONFIG_ARCH_RPC) := rpc 84 machine-$(CONFIG_ARCH_RPC) := rpc
@@ -133,7 +138,7 @@ else
133MACHINE := 138MACHINE :=
134endif 139endif
135 140
136export TEXT_OFFSET GZFLAGS 141export TEXT_OFFSET GZFLAGS MMUEXT
137 142
138# Do we have FASTFPE? 143# Do we have FASTFPE?
139FASTFPE :=arch/arm/fastfpe 144FASTFPE :=arch/arm/fastfpe
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 491c7e4c9ac6..b56f5e691d65 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -2,6 +2,7 @@
2 * linux/arch/arm/boot/compressed/head.S 2 * linux/arch/arm/boot/compressed/head.S
3 * 3 *
4 * Copyright (C) 1996-2002 Russell King 4 * Copyright (C) 1996-2002 Russell King
5 * Copyright (C) 2004 Hyok S. Choi (MPU support)
5 * 6 *
6 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 8 * it under the terms of the GNU General Public License version 2 as
@@ -320,6 +321,62 @@ params: ldr r0, =params_phys
320cache_on: mov r3, #8 @ cache_on function 321cache_on: mov r3, #8 @ cache_on function
321 b call_cache_fn 322 b call_cache_fn
322 323
324/*
325 * Initialize the highest priority protection region, PR7
326 * to cover all 32bit address and cacheable and bufferable.
327 */
328__armv4_mpu_cache_on:
329 mov r0, #0x3f @ 4G, the whole
330 mcr p15, 0, r0, c6, c7, 0 @ PR7 Area Setting
331 mcr p15, 0, r0, c6, c7, 1
332
333 mov r0, #0x80 @ PR7
334 mcr p15, 0, r0, c2, c0, 0 @ D-cache on
335 mcr p15, 0, r0, c2, c0, 1 @ I-cache on
336 mcr p15, 0, r0, c3, c0, 0 @ write-buffer on
337
338 mov r0, #0xc000
339 mcr p15, 0, r0, c5, c0, 1 @ I-access permission
340 mcr p15, 0, r0, c5, c0, 0 @ D-access permission
341
342 mov r0, #0
343 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
344 mcr p15, 0, r0, c7, c5, 0 @ flush(inval) I-Cache
345 mcr p15, 0, r0, c7, c6, 0 @ flush(inval) D-Cache
346 mrc p15, 0, r0, c1, c0, 0 @ read control reg
347 @ ...I .... ..D. WC.M
348 orr r0, r0, #0x002d @ .... .... ..1. 11.1
349 orr r0, r0, #0x1000 @ ...1 .... .... ....
350
351 mcr p15, 0, r0, c1, c0, 0 @ write control reg
352
353 mov r0, #0
354 mcr p15, 0, r0, c7, c5, 0 @ flush(inval) I-Cache
355 mcr p15, 0, r0, c7, c6, 0 @ flush(inval) D-Cache
356 mov pc, lr
357
358__armv3_mpu_cache_on:
359 mov r0, #0x3f @ 4G, the whole
360 mcr p15, 0, r0, c6, c7, 0 @ PR7 Area Setting
361
362 mov r0, #0x80 @ PR7
363 mcr p15, 0, r0, c2, c0, 0 @ cache on
364 mcr p15, 0, r0, c3, c0, 0 @ write-buffer on
365
366 mov r0, #0xc000
367 mcr p15, 0, r0, c5, c0, 0 @ access permission
368
369 mov r0, #0
370 mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3
371 mrc p15, 0, r0, c1, c0, 0 @ read control reg
372 @ .... .... .... WC.M
373 orr r0, r0, #0x000d @ .... .... .... 11.1
374 mov r0, #0
375 mcr p15, 0, r0, c1, c0, 0 @ write control reg
376
377 mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3
378 mov pc, lr
379
323__setup_mmu: sub r3, r4, #16384 @ Page directory size 380__setup_mmu: sub r3, r4, #16384 @ Page directory size
324 bic r3, r3, #0xff @ Align the pointer 381 bic r3, r3, #0xff @ Align the pointer
325 bic r3, r3, #0x3f00 382 bic r3, r3, #0x3f00
@@ -496,6 +553,18 @@ proc_types:
496 b __armv4_mmu_cache_off 553 b __armv4_mmu_cache_off
497 mov pc, lr 554 mov pc, lr
498 555
556 .word 0x41007400 @ ARM74x
557 .word 0xff00ff00
558 b __armv3_mpu_cache_on
559 b __armv3_mpu_cache_off
560 b __armv3_mpu_cache_flush
561
562 .word 0x41009400 @ ARM94x
563 .word 0xff00ff00
564 b __armv4_mpu_cache_on
565 b __armv4_mpu_cache_off
566 b __armv4_mpu_cache_flush
567
499 .word 0x00007000 @ ARM7 IDs 568 .word 0x00007000 @ ARM7 IDs
500 .word 0x0000f000 569 .word 0x0000f000
501 mov pc, lr 570 mov pc, lr
@@ -562,6 +631,24 @@ proc_types:
562cache_off: mov r3, #12 @ cache_off function 631cache_off: mov r3, #12 @ cache_off function
563 b call_cache_fn 632 b call_cache_fn
564 633
634__armv4_mpu_cache_off:
635 mrc p15, 0, r0, c1, c0
636 bic r0, r0, #0x000d
637 mcr p15, 0, r0, c1, c0 @ turn MPU and cache off
638 mov r0, #0
639 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
640 mcr p15, 0, r0, c7, c6, 0 @ flush D-Cache
641 mcr p15, 0, r0, c7, c5, 0 @ flush I-Cache
642 mov pc, lr
643
644__armv3_mpu_cache_off:
645 mrc p15, 0, r0, c1, c0
646 bic r0, r0, #0x000d
647 mcr p15, 0, r0, c1, c0, 0 @ turn MPU and cache off
648 mov r0, #0
649 mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3
650 mov pc, lr
651
565__armv4_mmu_cache_off: 652__armv4_mmu_cache_off:
566 mrc p15, 0, r0, c1, c0 653 mrc p15, 0, r0, c1, c0
567 bic r0, r0, #0x000d 654 bic r0, r0, #0x000d
@@ -601,6 +688,24 @@ cache_clean_flush:
601 mov r3, #16 688 mov r3, #16
602 b call_cache_fn 689 b call_cache_fn
603 690
691__armv4_mpu_cache_flush:
692 mov r2, #1
693 mov r3, #0
694 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
695 mov r1, #7 << 5 @ 8 segments
6961: orr r3, r1, #63 << 26 @ 64 entries
6972: mcr p15, 0, r3, c7, c14, 2 @ clean & invalidate D index
698 subs r3, r3, #1 << 26
699 bcs 2b @ entries 63 to 0
700 subs r1, r1, #1 << 5
701 bcs 1b @ segments 7 to 0
702
703 teq r2, #0
704 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
705 mcr p15, 0, ip, c7, c10, 4 @ drain WB
706 mov pc, lr
707
708
604__armv6_mmu_cache_flush: 709__armv6_mmu_cache_flush:
605 mov r1, #0 710 mov r1, #0
606 mcr p15, 0, r1, c7, c14, 0 @ clean+invalidate D 711 mcr p15, 0, r1, c7, c14, 0 @ clean+invalidate D
@@ -638,6 +743,7 @@ no_cache_id:
638 mov pc, lr 743 mov pc, lr
639 744
640__armv3_mmu_cache_flush: 745__armv3_mmu_cache_flush:
746__armv3_mpu_cache_flush:
641 mov r1, #0 747 mov r1, #0
642 mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3 748 mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3
643 mov pc, lr 749 mov pc, lr
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 355914ffb192..ab8e600c18c8 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -666,7 +666,7 @@ __kuser_helper_start:
666 * 666 *
667 * #define __kernel_dmb() \ 667 * #define __kernel_dmb() \
668 * asm volatile ( "mov r0, #0xffff0fff; mov lr, pc; sub pc, r0, #95" \ 668 * asm volatile ( "mov r0, #0xffff0fff; mov lr, pc; sub pc, r0, #95" \
669 * : : : "lr","cc" ) 669 * : : : "r0", "lr","cc" )
670 */ 670 */
671 671
672__kuser_memory_barrier: @ 0xffff0fa0 672__kuser_memory_barrier: @ 0xffff0fa0
diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
new file mode 100644
index 000000000000..a52da0ddb43d
--- /dev/null
+++ b/arch/arm/kernel/head-common.S
@@ -0,0 +1,217 @@
1/*
2 * linux/arch/arm/kernel/head-common.S
3 *
4 * Copyright (C) 1994-2002 Russell King
5 * Copyright (c) 2003 ARM Limited
6 * All Rights Reserved
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14 .type __switch_data, %object
15__switch_data:
16 .long __mmap_switched
17 .long __data_loc @ r4
18 .long __data_start @ r5
19 .long __bss_start @ r6
20 .long _end @ r7
21 .long processor_id @ r4
22 .long __machine_arch_type @ r5
23 .long cr_alignment @ r6
24 .long init_thread_union + THREAD_START_SP @ sp
25
26/*
27 * The following fragment of code is executed with the MMU on in MMU mode,
28 * and uses absolute addresses; this is not position independent.
29 *
30 * r0 = cp#15 control register
31 * r1 = machine ID
32 * r9 = processor ID
33 */
34 .type __mmap_switched, %function
35__mmap_switched:
36 adr r3, __switch_data + 4
37
38 ldmia r3!, {r4, r5, r6, r7}
39 cmp r4, r5 @ Copy data segment if needed
401: cmpne r5, r6
41 ldrne fp, [r4], #4
42 strne fp, [r5], #4
43 bne 1b
44
45 mov fp, #0 @ Clear BSS (and zero fp)
461: cmp r6, r7
47 strcc fp, [r6],#4
48 bcc 1b
49
50 ldmia r3, {r4, r5, r6, sp}
51 str r9, [r4] @ Save processor ID
52 str r1, [r5] @ Save machine type
53 bic r4, r0, #CR_A @ Clear 'A' bit
54 stmia r6, {r0, r4} @ Save control register values
55 b start_kernel
56
57/*
58 * Exception handling. Something went wrong and we can't proceed. We
59 * ought to tell the user, but since we don't have any guarantee that
60 * we're even running on the right architecture, we do virtually nothing.
61 *
62 * If CONFIG_DEBUG_LL is set we try to print out something about the error
63 * and hope for the best (useful if bootloader fails to pass a proper
64 * machine ID for example).
65 */
66
67 .type __error_p, %function
68__error_p:
69#ifdef CONFIG_DEBUG_LL
70 adr r0, str_p1
71 bl printascii
72 b __error
73str_p1: .asciz "\nError: unrecognized/unsupported processor variant.\n"
74 .align
75#endif
76
77 .type __error_a, %function
78__error_a:
79#ifdef CONFIG_DEBUG_LL
80 mov r4, r1 @ preserve machine ID
81 adr r0, str_a1
82 bl printascii
83 mov r0, r4
84 bl printhex8
85 adr r0, str_a2
86 bl printascii
87 adr r3, 3f
88 ldmia r3, {r4, r5, r6} @ get machine desc list
89 sub r4, r3, r4 @ get offset between virt&phys
90 add r5, r5, r4 @ convert virt addresses to
91 add r6, r6, r4 @ physical address space
921: ldr r0, [r5, #MACHINFO_TYPE] @ get machine type
93 bl printhex8
94 mov r0, #'\t'
95 bl printch
96 ldr r0, [r5, #MACHINFO_NAME] @ get machine name
97 add r0, r0, r4
98 bl printascii
99 mov r0, #'\n'
100 bl printch
101 add r5, r5, #SIZEOF_MACHINE_DESC @ next machine_desc
102 cmp r5, r6
103 blo 1b
104 adr r0, str_a3
105 bl printascii
106 b __error
107str_a1: .asciz "\nError: unrecognized/unsupported machine ID (r1 = 0x"
108str_a2: .asciz ").\n\nAvailable machine support:\n\nID (hex)\tNAME\n"
109str_a3: .asciz "\nPlease check your kernel config and/or bootloader.\n"
110 .align
111#endif
112
113 .type __error, %function
114__error:
115#ifdef CONFIG_ARCH_RPC
116/*
117 * Turn the screen red on a error - RiscPC only.
118 */
119 mov r0, #0x02000000
120 mov r3, #0x11
121 orr r3, r3, r3, lsl #8
122 orr r3, r3, r3, lsl #16
123 str r3, [r0], #4
124 str r3, [r0], #4
125 str r3, [r0], #4
126 str r3, [r0], #4
127#endif
1281: mov r0, r0
129 b 1b
130
131
132/*
133 * Read processor ID register (CP#15, CR0), and look up in the linker-built
134 * supported processor list. Note that we can't use the absolute addresses
135 * for the __proc_info lists since we aren't running with the MMU on
136 * (and therefore, we are not in the correct address space). We have to
137 * calculate the offset.
138 *
139 * r9 = cpuid
140 * Returns:
141 * r3, r4, r6 corrupted
142 * r5 = proc_info pointer in physical address space
143 * r9 = cpuid (preserved)
144 */
145 .type __lookup_processor_type, %function
146__lookup_processor_type:
147 adr r3, 3f
148 ldmda r3, {r5 - r7}
149 sub r3, r3, r7 @ get offset between virt&phys
150 add r5, r5, r3 @ convert virt addresses to
151 add r6, r6, r3 @ physical address space
1521: ldmia r5, {r3, r4} @ value, mask
153 and r4, r4, r9 @ mask wanted bits
154 teq r3, r4
155 beq 2f
156 add r5, r5, #PROC_INFO_SZ @ sizeof(proc_info_list)
157 cmp r5, r6
158 blo 1b
159 mov r5, #0 @ unknown processor
1602: mov pc, lr
161
162/*
163 * This provides a C-API version of the above function.
164 */
165ENTRY(lookup_processor_type)
166 stmfd sp!, {r4 - r7, r9, lr}
167 mov r9, r0
168 bl __lookup_processor_type
169 mov r0, r5
170 ldmfd sp!, {r4 - r7, r9, pc}
171
172/*
173 * Look in include/asm-arm/procinfo.h and arch/arm/kernel/arch.[ch] for
174 * more information about the __proc_info and __arch_info structures.
175 */
176 .long __proc_info_begin
177 .long __proc_info_end
1783: .long .
179 .long __arch_info_begin
180 .long __arch_info_end
181
182/*
183 * Lookup machine architecture in the linker-build list of architectures.
184 * Note that we can't use the absolute addresses for the __arch_info
185 * lists since we aren't running with the MMU on (and therefore, we are
186 * not in the correct address space). We have to calculate the offset.
187 *
188 * r1 = machine architecture number
189 * Returns:
190 * r3, r4, r6 corrupted
191 * r5 = mach_info pointer in physical address space
192 */
193 .type __lookup_machine_type, %function
194__lookup_machine_type:
195 adr r3, 3b
196 ldmia r3, {r4, r5, r6}
197 sub r3, r3, r4 @ get offset between virt&phys
198 add r5, r5, r3 @ convert virt addresses to
199 add r6, r6, r3 @ physical address space
2001: ldr r3, [r5, #MACHINFO_TYPE] @ get machine type
201 teq r3, r1 @ matches loader number?
202 beq 2f @ found
203 add r5, r5, #SIZEOF_MACHINE_DESC @ next machine_desc
204 cmp r5, r6
205 blo 1b
206 mov r5, #0 @ unknown machine
2072: mov pc, lr
208
209/*
210 * This provides a C-API version of the above function.
211 */
212ENTRY(lookup_machine_type)
213 stmfd sp!, {r4 - r6, lr}
214 mov r1, r0
215 bl __lookup_machine_type
216 mov r0, r5
217 ldmfd sp!, {r4 - r6, pc}
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
new file mode 100644
index 000000000000..b093ab8738b5
--- /dev/null
+++ b/arch/arm/kernel/head-nommu.S
@@ -0,0 +1,83 @@
1/*
2 * linux/arch/arm/kernel/head-nommu.S
3 *
4 * Copyright (C) 1994-2002 Russell King
5 * Copyright (C) 2003-2006 Hyok S. Choi
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * Common kernel startup code (non-paged MM)
12 * for 32-bit CPUs which has a process ID register(CP15).
13 *
14 */
15#include <linux/config.h>
16#include <linux/linkage.h>
17#include <linux/init.h>
18
19#include <asm/assembler.h>
20#include <asm/mach-types.h>
21#include <asm/procinfo.h>
22#include <asm/ptrace.h>
23#include <asm/constants.h>
24#include <asm/system.h>
25
26#define PROCINFO_INITFUNC 12
27
28/*
29 * Kernel startup entry point.
30 * ---------------------------
31 *
32 * This is normally called from the decompressor code. The requirements
33 * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
34 * r1 = machine nr.
35 *
36 * See linux/arch/arm/tools/mach-types for the complete list of machine
37 * numbers for r1.
38 *
39 */
40 __INIT
41 .type stext, %function
42ENTRY(stext)
43 msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ ensure svc mode
44 @ and irqs disabled
45 mrc p15, 0, r9, c0, c0 @ get processor id
46 bl __lookup_processor_type @ r5=procinfo r9=cpuid
47 movs r10, r5 @ invalid processor (r5=0)?
48 beq __error_p @ yes, error 'p'
49 bl __lookup_machine_type @ r5=machinfo
50 movs r8, r5 @ invalid machine (r5=0)?
51 beq __error_a @ yes, error 'a'
52
53 ldr r13, __switch_data @ address to jump to after
54 @ the initialization is done
55 adr lr, __after_proc_init @ return (PIC) address
56 add pc, r10, #PROCINFO_INITFUNC
57
58/*
59 * Set the Control Register and Read the process ID.
60 */
61 .type __after_proc_init, %function
62__after_proc_init:
63 mrc p15, 0, r0, c1, c0, 0 @ read control reg
64#ifdef CONFIG_ALIGNMENT_TRAP
65 orr r0, r0, #CR_A
66#else
67 bic r0, r0, #CR_A
68#endif
69#ifdef CONFIG_CPU_DCACHE_DISABLE
70 bic r0, r0, #CR_C
71#endif
72#ifdef CONFIG_CPU_BPREDICT_DISABLE
73 bic r0, r0, #CR_Z
74#endif
75#ifdef CONFIG_CPU_ICACHE_DISABLE
76 bic r0, r0, #CR_I
77#endif
78 mcr p15, 0, r0, c1, c0, 0 @ write control reg
79
80 mov pc, r13 @ clear the BSS and jump
81 @ to start_kernel
82
83#include "head-common.S"
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 53b6901f70a6..04b66a9328ef 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -102,49 +102,6 @@ ENTRY(stext)
102 adr lr, __enable_mmu @ return (PIC) address 102 adr lr, __enable_mmu @ return (PIC) address
103 add pc, r10, #PROCINFO_INITFUNC 103 add pc, r10, #PROCINFO_INITFUNC
104 104
105 .type __switch_data, %object
106__switch_data:
107 .long __mmap_switched
108 .long __data_loc @ r4
109 .long __data_start @ r5
110 .long __bss_start @ r6
111 .long _end @ r7
112 .long processor_id @ r4
113 .long __machine_arch_type @ r5
114 .long cr_alignment @ r6
115 .long init_thread_union + THREAD_START_SP @ sp
116
117/*
118 * The following fragment of code is executed with the MMU on, and uses
119 * absolute addresses; this is not position independent.
120 *
121 * r0 = cp#15 control register
122 * r1 = machine ID
123 * r9 = processor ID
124 */
125 .type __mmap_switched, %function
126__mmap_switched:
127 adr r3, __switch_data + 4
128
129 ldmia r3!, {r4, r5, r6, r7}
130 cmp r4, r5 @ Copy data segment if needed
1311: cmpne r5, r6
132 ldrne fp, [r4], #4
133 strne fp, [r5], #4
134 bne 1b
135
136 mov fp, #0 @ Clear BSS (and zero fp)
1371: cmp r6, r7
138 strcc fp, [r6],#4
139 bcc 1b
140
141 ldmia r3, {r4, r5, r6, sp}
142 str r9, [r4] @ Save processor ID
143 str r1, [r5] @ Save machine type
144 bic r4, r0, #CR_A @ Clear 'A' bit
145 stmia r6, {r0, r4} @ Save control register values
146 b start_kernel
147
148#if defined(CONFIG_SMP) 105#if defined(CONFIG_SMP)
149 .type secondary_startup, #function 106 .type secondary_startup, #function
150ENTRY(secondary_startup) 107ENTRY(secondary_startup)
@@ -367,166 +324,4 @@ __create_page_tables:
367 mov pc, lr 324 mov pc, lr
368 .ltorg 325 .ltorg
369 326
370 327#include "head-common.S"
371
372/*
373 * Exception handling. Something went wrong and we can't proceed. We
374 * ought to tell the user, but since we don't have any guarantee that
375 * we're even running on the right architecture, we do virtually nothing.
376 *
377 * If CONFIG_DEBUG_LL is set we try to print out something about the error
378 * and hope for the best (useful if bootloader fails to pass a proper
379 * machine ID for example).
380 */
381
382 .type __error_p, %function
383__error_p:
384#ifdef CONFIG_DEBUG_LL
385 adr r0, str_p1
386 bl printascii
387 b __error
388str_p1: .asciz "\nError: unrecognized/unsupported processor variant.\n"
389 .align
390#endif
391
392 .type __error_a, %function
393__error_a:
394#ifdef CONFIG_DEBUG_LL
395 mov r4, r1 @ preserve machine ID
396 adr r0, str_a1
397 bl printascii
398 mov r0, r4
399 bl printhex8
400 adr r0, str_a2
401 bl printascii
402 adr r3, 3f
403 ldmia r3, {r4, r5, r6} @ get machine desc list
404 sub r4, r3, r4 @ get offset between virt&phys
405 add r5, r5, r4 @ convert virt addresses to
406 add r6, r6, r4 @ physical address space
4071: ldr r0, [r5, #MACHINFO_TYPE] @ get machine type
408 bl printhex8
409 mov r0, #'\t'
410 bl printch
411 ldr r0, [r5, #MACHINFO_NAME] @ get machine name
412 add r0, r0, r4
413 bl printascii
414 mov r0, #'\n'
415 bl printch
416 add r5, r5, #SIZEOF_MACHINE_DESC @ next machine_desc
417 cmp r5, r6
418 blo 1b
419 adr r0, str_a3
420 bl printascii
421 b __error
422str_a1: .asciz "\nError: unrecognized/unsupported machine ID (r1 = 0x"
423str_a2: .asciz ").\n\nAvailable machine support:\n\nID (hex)\tNAME\n"
424str_a3: .asciz "\nPlease check your kernel config and/or bootloader.\n"
425 .align
426#endif
427
428 .type __error, %function
429__error:
430#ifdef CONFIG_ARCH_RPC
431/*
432 * Turn the screen red on a error - RiscPC only.
433 */
434 mov r0, #0x02000000
435 mov r3, #0x11
436 orr r3, r3, r3, lsl #8
437 orr r3, r3, r3, lsl #16
438 str r3, [r0], #4
439 str r3, [r0], #4
440 str r3, [r0], #4
441 str r3, [r0], #4
442#endif
4431: mov r0, r0
444 b 1b
445
446
447/*
448 * Read processor ID register (CP#15, CR0), and look up in the linker-built
449 * supported processor list. Note that we can't use the absolute addresses
450 * for the __proc_info lists since we aren't running with the MMU on
451 * (and therefore, we are not in the correct address space). We have to
452 * calculate the offset.
453 *
454 * r9 = cpuid
455 * Returns:
456 * r3, r4, r6 corrupted
457 * r5 = proc_info pointer in physical address space
458 * r9 = cpuid (preserved)
459 */
460 .type __lookup_processor_type, %function
461__lookup_processor_type:
462 adr r3, 3f
463 ldmda r3, {r5 - r7}
464 sub r3, r3, r7 @ get offset between virt&phys
465 add r5, r5, r3 @ convert virt addresses to
466 add r6, r6, r3 @ physical address space
4671: ldmia r5, {r3, r4} @ value, mask
468 and r4, r4, r9 @ mask wanted bits
469 teq r3, r4
470 beq 2f
471 add r5, r5, #PROC_INFO_SZ @ sizeof(proc_info_list)
472 cmp r5, r6
473 blo 1b
474 mov r5, #0 @ unknown processor
4752: mov pc, lr
476
477/*
478 * This provides a C-API version of the above function.
479 */
480ENTRY(lookup_processor_type)
481 stmfd sp!, {r4 - r7, r9, lr}
482 mov r9, r0
483 bl __lookup_processor_type
484 mov r0, r5
485 ldmfd sp!, {r4 - r7, r9, pc}
486
487/*
488 * Look in include/asm-arm/procinfo.h and arch/arm/kernel/arch.[ch] for
489 * more information about the __proc_info and __arch_info structures.
490 */
491 .long __proc_info_begin
492 .long __proc_info_end
4933: .long .
494 .long __arch_info_begin
495 .long __arch_info_end
496
497/*
498 * Lookup machine architecture in the linker-build list of architectures.
499 * Note that we can't use the absolute addresses for the __arch_info
500 * lists since we aren't running with the MMU on (and therefore, we are
501 * not in the correct address space). We have to calculate the offset.
502 *
503 * r1 = machine architecture number
504 * Returns:
505 * r3, r4, r6 corrupted
506 * r5 = mach_info pointer in physical address space
507 */
508 .type __lookup_machine_type, %function
509__lookup_machine_type:
510 adr r3, 3b
511 ldmia r3, {r4, r5, r6}
512 sub r3, r3, r4 @ get offset between virt&phys
513 add r5, r5, r3 @ convert virt addresses to
514 add r6, r6, r3 @ physical address space
5151: ldr r3, [r5, #MACHINFO_TYPE] @ get machine type
516 teq r3, r1 @ matches loader number?
517 beq 2f @ found
518 add r5, r5, #SIZEOF_MACHINE_DESC @ next machine_desc
519 cmp r5, r6
520 blo 1b
521 mov r5, #0 @ unknown machine
5222: mov pc, lr
523
524/*
525 * This provides a C-API version of the above function.
526 */
527ENTRY(lookup_machine_type)
528 stmfd sp!, {r4 - r6, lr}
529 mov r1, r0
530 bl __lookup_machine_type
531 mov r0, r5
532 ldmfd sp!, {r4 - r6, pc}
diff --git a/arch/arm/kernel/signal.h b/arch/arm/kernel/signal.h
index 9991049c522d..27beece15502 100644
--- a/arch/arm/kernel/signal.h
+++ b/arch/arm/kernel/signal.h
@@ -7,6 +7,6 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#define KERN_SIGRETURN_CODE 0xffff0500 10#define KERN_SIGRETURN_CODE (CONFIG_VECTORS_BASE + 0x00000500)
11 11
12extern const unsigned long sigreturn_codes[7]; 12extern const unsigned long sigreturn_codes[7];
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index d566d5f4574d..35230a060108 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -688,6 +688,7 @@ EXPORT_SYMBOL(abort);
688 688
689void __init trap_init(void) 689void __init trap_init(void)
690{ 690{
691 unsigned long vectors = CONFIG_VECTORS_BASE;
691 extern char __stubs_start[], __stubs_end[]; 692 extern char __stubs_start[], __stubs_end[];
692 extern char __vectors_start[], __vectors_end[]; 693 extern char __vectors_start[], __vectors_end[];
693 extern char __kuser_helper_start[], __kuser_helper_end[]; 694 extern char __kuser_helper_start[], __kuser_helper_end[];
@@ -698,9 +699,9 @@ void __init trap_init(void)
698 * into the vector page, mapped at 0xffff0000, and ensure these 699 * into the vector page, mapped at 0xffff0000, and ensure these
699 * are visible to the instruction stream. 700 * are visible to the instruction stream.
700 */ 701 */
701 memcpy((void *)0xffff0000, __vectors_start, __vectors_end - __vectors_start); 702 memcpy((void *)vectors, __vectors_start, __vectors_end - __vectors_start);
702 memcpy((void *)0xffff0200, __stubs_start, __stubs_end - __stubs_start); 703 memcpy((void *)vectors + 0x200, __stubs_start, __stubs_end - __stubs_start);
703 memcpy((void *)0xffff1000 - kuser_sz, __kuser_helper_start, kuser_sz); 704 memcpy((void *)vectors + 0x1000 - kuser_sz, __kuser_helper_start, kuser_sz);
704 705
705 /* 706 /*
706 * Copy signal return handlers into the vector page, and 707 * Copy signal return handlers into the vector page, and
@@ -709,6 +710,6 @@ void __init trap_init(void)
709 memcpy((void *)KERN_SIGRETURN_CODE, sigreturn_codes, 710 memcpy((void *)KERN_SIGRETURN_CODE, sigreturn_codes,
710 sizeof(sigreturn_codes)); 711 sizeof(sigreturn_codes));
711 712
712 flush_icache_range(0xffff0000, 0xffff0000 + PAGE_SIZE); 713 flush_icache_range(vectors, vectors + PAGE_SIZE);
713 modify_domain(DOMAIN_USER, DOMAIN_CLIENT); 714 modify_domain(DOMAIN_USER, DOMAIN_CLIENT);
714} 715}
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index f90513e9af0c..b9dfce57c272 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -30,6 +30,7 @@
30#include <asm/procinfo.h> 30#include <asm/procinfo.h>
31#include <asm/hardware.h> 31#include <asm/hardware.h>
32#include <asm/pgtable.h> 32#include <asm/pgtable.h>
33#include <asm/pgtable-hwdef.h>
33#include <asm/page.h> 34#include <asm/page.h>
34#include <asm/ptrace.h> 35#include <asm/ptrace.h>
35#include "proc-macros.S" 36#include "proc-macros.S"
diff --git a/arch/ia64/kernel/palinfo.c b/arch/ia64/kernel/palinfo.c
index 89faa603c6be..6386f63c413e 100644
--- a/arch/ia64/kernel/palinfo.c
+++ b/arch/ia64/kernel/palinfo.c
@@ -240,7 +240,7 @@ cache_info(char *page)
240 } 240 }
241 p += sprintf(p, 241 p += sprintf(p,
242 "%s Cache level %lu:\n" 242 "%s Cache level %lu:\n"
243 "\tSize : %lu bytes\n" 243 "\tSize : %u bytes\n"
244 "\tAttributes : ", 244 "\tAttributes : ",
245 cache_types[j+cci.pcci_unified], i+1, 245 cache_types[j+cci.pcci_unified], i+1,
246 cci.pcci_cache_size); 246 cci.pcci_cache_size);
@@ -648,9 +648,9 @@ frequency_info(char *page)
648 if (ia64_pal_freq_ratios(&proc, &bus, &itc) != 0) return 0; 648 if (ia64_pal_freq_ratios(&proc, &bus, &itc) != 0) return 0;
649 649
650 p += sprintf(p, 650 p += sprintf(p,
651 "Processor/Clock ratio : %ld/%ld\n" 651 "Processor/Clock ratio : %d/%d\n"
652 "Bus/Clock ratio : %ld/%ld\n" 652 "Bus/Clock ratio : %d/%d\n"
653 "ITC/Clock ratio : %ld/%ld\n", 653 "ITC/Clock ratio : %d/%d\n",
654 proc.num, proc.den, bus.num, bus.den, itc.num, itc.den); 654 proc.num, proc.den, bus.num, bus.den, itc.num, itc.den);
655 655
656 return p - page; 656 return p - page;
diff --git a/arch/ia64/kernel/time.c b/arch/ia64/kernel/time.c
index ac167436e936..49958904045b 100644
--- a/arch/ia64/kernel/time.c
+++ b/arch/ia64/kernel/time.c
@@ -188,7 +188,7 @@ ia64_init_itm (void)
188 itc_freq = (platform_base_freq*itc_ratio.num)/itc_ratio.den; 188 itc_freq = (platform_base_freq*itc_ratio.num)/itc_ratio.den;
189 189
190 local_cpu_data->itm_delta = (itc_freq + HZ/2) / HZ; 190 local_cpu_data->itm_delta = (itc_freq + HZ/2) / HZ;
191 printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%lu/%lu, " 191 printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%u/%u, "
192 "ITC freq=%lu.%03luMHz", smp_processor_id(), 192 "ITC freq=%lu.%03luMHz", smp_processor_id(),
193 platform_base_freq / 1000000, (platform_base_freq / 1000) % 1000, 193 platform_base_freq / 1000000, (platform_base_freq / 1000) % 1000,
194 itc_ratio.num, itc_ratio.den, itc_freq / 1000000, (itc_freq / 1000) % 1000); 194 itc_ratio.num, itc_ratio.den, itc_freq / 1000000, (itc_freq / 1000) % 1000);
diff --git a/arch/ia64/kernel/topology.c b/arch/ia64/kernel/topology.c
index 3b6fd798c4d6..b47476d655f1 100644
--- a/arch/ia64/kernel/topology.c
+++ b/arch/ia64/kernel/topology.c
@@ -9,6 +9,8 @@
9 * 2002/08/07 Erich Focht <efocht@ess.nec.de> 9 * 2002/08/07 Erich Focht <efocht@ess.nec.de>
10 * Populate cpu entries in sysfs for non-numa systems as well 10 * Populate cpu entries in sysfs for non-numa systems as well
11 * Intel Corporation - Ashok Raj 11 * Intel Corporation - Ashok Raj
12 * 02/27/2006 Zhang, Yanmin
13 * Populate cpu cache entries in sysfs for cpu cache info
12 */ 14 */
13 15
14#include <linux/config.h> 16#include <linux/config.h>
@@ -19,6 +21,7 @@
19#include <linux/init.h> 21#include <linux/init.h>
20#include <linux/bootmem.h> 22#include <linux/bootmem.h>
21#include <linux/nodemask.h> 23#include <linux/nodemask.h>
24#include <linux/notifier.h>
22#include <asm/mmzone.h> 25#include <asm/mmzone.h>
23#include <asm/numa.h> 26#include <asm/numa.h>
24#include <asm/cpu.h> 27#include <asm/cpu.h>
@@ -101,3 +104,367 @@ out:
101} 104}
102 105
103subsys_initcall(topology_init); 106subsys_initcall(topology_init);
107
108
109/*
110 * Export cpu cache information through sysfs
111 */
112
113/*
114 * A bunch of string array to get pretty printing
115 */
116static const char *cache_types[] = {
117 "", /* not used */
118 "Instruction",
119 "Data",
120 "Unified" /* unified */
121};
122
123static const char *cache_mattrib[]={
124 "WriteThrough",
125 "WriteBack",
126 "", /* reserved */
127 "" /* reserved */
128};
129
130struct cache_info {
131 pal_cache_config_info_t cci;
132 cpumask_t shared_cpu_map;
133 int level;
134 int type;
135 struct kobject kobj;
136};
137
138struct cpu_cache_info {
139 struct cache_info *cache_leaves;
140 int num_cache_leaves;
141 struct kobject kobj;
142};
143
144static struct cpu_cache_info all_cpu_cache_info[NR_CPUS];
145#define LEAF_KOBJECT_PTR(x,y) (&all_cpu_cache_info[x].cache_leaves[y])
146
147#ifdef CONFIG_SMP
148static void cache_shared_cpu_map_setup( unsigned int cpu,
149 struct cache_info * this_leaf)
150{
151 pal_cache_shared_info_t csi;
152 int num_shared, i = 0;
153 unsigned int j;
154
155 if (cpu_data(cpu)->threads_per_core <= 1 &&
156 cpu_data(cpu)->cores_per_socket <= 1) {
157 cpu_set(cpu, this_leaf->shared_cpu_map);
158 return;
159 }
160
161 if (ia64_pal_cache_shared_info(this_leaf->level,
162 this_leaf->type,
163 0,
164 &csi) != PAL_STATUS_SUCCESS)
165 return;
166
167 num_shared = (int) csi.num_shared;
168 do {
169 for_each_cpu(j)
170 if (cpu_data(cpu)->socket_id == cpu_data(j)->socket_id
171 && cpu_data(j)->core_id == csi.log1_cid
172 && cpu_data(j)->thread_id == csi.log1_tid)
173 cpu_set(j, this_leaf->shared_cpu_map);
174
175 i++;
176 } while (i < num_shared &&
177 ia64_pal_cache_shared_info(this_leaf->level,
178 this_leaf->type,
179 i,
180 &csi) == PAL_STATUS_SUCCESS);
181}
182#else
183static void cache_shared_cpu_map_setup(unsigned int cpu,
184 struct cache_info * this_leaf)
185{
186 cpu_set(cpu, this_leaf->shared_cpu_map);
187 return;
188}
189#endif
190
191static ssize_t show_coherency_line_size(struct cache_info *this_leaf,
192 char *buf)
193{
194 return sprintf(buf, "%u\n", 1 << this_leaf->cci.pcci_line_size);
195}
196
197static ssize_t show_ways_of_associativity(struct cache_info *this_leaf,
198 char *buf)
199{
200 return sprintf(buf, "%u\n", this_leaf->cci.pcci_assoc);
201}
202
203static ssize_t show_attributes(struct cache_info *this_leaf, char *buf)
204{
205 return sprintf(buf,
206 "%s\n",
207 cache_mattrib[this_leaf->cci.pcci_cache_attr]);
208}
209
210static ssize_t show_size(struct cache_info *this_leaf, char *buf)
211{
212 return sprintf(buf, "%uK\n", this_leaf->cci.pcci_cache_size / 1024);
213}
214
215static ssize_t show_number_of_sets(struct cache_info *this_leaf, char *buf)
216{
217 unsigned number_of_sets = this_leaf->cci.pcci_cache_size;
218 number_of_sets /= this_leaf->cci.pcci_assoc;
219 number_of_sets /= 1 << this_leaf->cci.pcci_line_size;
220
221 return sprintf(buf, "%u\n", number_of_sets);
222}
223
224static ssize_t show_shared_cpu_map(struct cache_info *this_leaf, char *buf)
225{
226 ssize_t len;
227 cpumask_t shared_cpu_map;
228
229 cpus_and(shared_cpu_map, this_leaf->shared_cpu_map, cpu_online_map);
230 len = cpumask_scnprintf(buf, NR_CPUS+1, shared_cpu_map);
231 len += sprintf(buf+len, "\n");
232 return len;
233}
234
235static ssize_t show_type(struct cache_info *this_leaf, char *buf)
236{
237 int type = this_leaf->type + this_leaf->cci.pcci_unified;
238 return sprintf(buf, "%s\n", cache_types[type]);
239}
240
241static ssize_t show_level(struct cache_info *this_leaf, char *buf)
242{
243 return sprintf(buf, "%u\n", this_leaf->level);
244}
245
246struct cache_attr {
247 struct attribute attr;
248 ssize_t (*show)(struct cache_info *, char *);
249 ssize_t (*store)(struct cache_info *, const char *, size_t count);
250};
251
252#ifdef define_one_ro
253 #undef define_one_ro
254#endif
255#define define_one_ro(_name) \
256 static struct cache_attr _name = \
257__ATTR(_name, 0444, show_##_name, NULL)
258
259define_one_ro(level);
260define_one_ro(type);
261define_one_ro(coherency_line_size);
262define_one_ro(ways_of_associativity);
263define_one_ro(size);
264define_one_ro(number_of_sets);
265define_one_ro(shared_cpu_map);
266define_one_ro(attributes);
267
268static struct attribute * cache_default_attrs[] = {
269 &type.attr,
270 &level.attr,
271 &coherency_line_size.attr,
272 &ways_of_associativity.attr,
273 &attributes.attr,
274 &size.attr,
275 &number_of_sets.attr,
276 &shared_cpu_map.attr,
277 NULL
278};
279
280#define to_object(k) container_of(k, struct cache_info, kobj)
281#define to_attr(a) container_of(a, struct cache_attr, attr)
282
283static ssize_t cache_show(struct kobject * kobj, struct attribute * attr, char * buf)
284{
285 struct cache_attr *fattr = to_attr(attr);
286 struct cache_info *this_leaf = to_object(kobj);
287 ssize_t ret;
288
289 ret = fattr->show ? fattr->show(this_leaf, buf) : 0;
290 return ret;
291}
292
293static struct sysfs_ops cache_sysfs_ops = {
294 .show = cache_show
295};
296
297static struct kobj_type cache_ktype = {
298 .sysfs_ops = &cache_sysfs_ops,
299 .default_attrs = cache_default_attrs,
300};
301
302static struct kobj_type cache_ktype_percpu_entry = {
303 .sysfs_ops = &cache_sysfs_ops,
304};
305
306static void __cpuinit cpu_cache_sysfs_exit(unsigned int cpu)
307{
308 if (all_cpu_cache_info[cpu].cache_leaves) {
309 kfree(all_cpu_cache_info[cpu].cache_leaves);
310 all_cpu_cache_info[cpu].cache_leaves = NULL;
311 }
312 all_cpu_cache_info[cpu].num_cache_leaves = 0;
313 memset(&all_cpu_cache_info[cpu].kobj, 0, sizeof(struct kobject));
314
315 return;
316}
317
318static int __cpuinit cpu_cache_sysfs_init(unsigned int cpu)
319{
320 u64 i, levels, unique_caches;
321 pal_cache_config_info_t cci;
322 int j;
323 s64 status;
324 struct cache_info *this_cache;
325 int num_cache_leaves = 0;
326
327 if ((status = ia64_pal_cache_summary(&levels, &unique_caches)) != 0) {
328 printk(KERN_ERR "ia64_pal_cache_summary=%ld\n", status);
329 return -1;
330 }
331
332 this_cache=kzalloc(sizeof(struct cache_info)*unique_caches,
333 GFP_KERNEL);
334 if (this_cache == NULL)
335 return -ENOMEM;
336
337 for (i=0; i < levels; i++) {
338 for (j=2; j >0 ; j--) {
339 if ((status=ia64_pal_cache_config_info(i,j, &cci)) !=
340 PAL_STATUS_SUCCESS)
341 continue;
342
343 this_cache[num_cache_leaves].cci = cci;
344 this_cache[num_cache_leaves].level = i + 1;
345 this_cache[num_cache_leaves].type = j;
346
347 cache_shared_cpu_map_setup(cpu,
348 &this_cache[num_cache_leaves]);
349 num_cache_leaves ++;
350 }
351 }
352
353 all_cpu_cache_info[cpu].cache_leaves = this_cache;
354 all_cpu_cache_info[cpu].num_cache_leaves = num_cache_leaves;
355
356 memset(&all_cpu_cache_info[cpu].kobj, 0, sizeof(struct kobject));
357
358 return 0;
359}
360
361/* Add cache interface for CPU device */
362static int __cpuinit cache_add_dev(struct sys_device * sys_dev)
363{
364 unsigned int cpu = sys_dev->id;
365 unsigned long i, j;
366 struct cache_info *this_object;
367 int retval = 0;
368 cpumask_t oldmask;
369
370 if (all_cpu_cache_info[cpu].kobj.parent)
371 return 0;
372
373 oldmask = current->cpus_allowed;
374 retval = set_cpus_allowed(current, cpumask_of_cpu(cpu));
375 if (unlikely(retval))
376 return retval;
377
378 retval = cpu_cache_sysfs_init(cpu);
379 set_cpus_allowed(current, oldmask);
380 if (unlikely(retval < 0))
381 return retval;
382
383 all_cpu_cache_info[cpu].kobj.parent = &sys_dev->kobj;
384 kobject_set_name(&all_cpu_cache_info[cpu].kobj, "%s", "cache");
385 all_cpu_cache_info[cpu].kobj.ktype = &cache_ktype_percpu_entry;
386 retval = kobject_register(&all_cpu_cache_info[cpu].kobj);
387
388 for (i = 0; i < all_cpu_cache_info[cpu].num_cache_leaves; i++) {
389 this_object = LEAF_KOBJECT_PTR(cpu,i);
390 this_object->kobj.parent = &all_cpu_cache_info[cpu].kobj;
391 kobject_set_name(&(this_object->kobj), "index%1lu", i);
392 this_object->kobj.ktype = &cache_ktype;
393 retval = kobject_register(&(this_object->kobj));
394 if (unlikely(retval)) {
395 for (j = 0; j < i; j++) {
396 kobject_unregister(
397 &(LEAF_KOBJECT_PTR(cpu,j)->kobj));
398 }
399 kobject_unregister(&all_cpu_cache_info[cpu].kobj);
400 cpu_cache_sysfs_exit(cpu);
401 break;
402 }
403 }
404 return retval;
405}
406
407/* Remove cache interface for CPU device */
408static int __cpuinit cache_remove_dev(struct sys_device * sys_dev)
409{
410 unsigned int cpu = sys_dev->id;
411 unsigned long i;
412
413 for (i = 0; i < all_cpu_cache_info[cpu].num_cache_leaves; i++)
414 kobject_unregister(&(LEAF_KOBJECT_PTR(cpu,i)->kobj));
415
416 if (all_cpu_cache_info[cpu].kobj.parent) {
417 kobject_unregister(&all_cpu_cache_info[cpu].kobj);
418 memset(&all_cpu_cache_info[cpu].kobj,
419 0,
420 sizeof(struct kobject));
421 }
422
423 cpu_cache_sysfs_exit(cpu);
424
425 return 0;
426}
427
428/*
429 * When a cpu is hot-plugged, do a check and initiate
430 * cache kobject if necessary
431 */
432static int __cpuinit cache_cpu_callback(struct notifier_block *nfb,
433 unsigned long action, void *hcpu)
434{
435 unsigned int cpu = (unsigned long)hcpu;
436 struct sys_device *sys_dev;
437
438 sys_dev = get_cpu_sysdev(cpu);
439 switch (action) {
440 case CPU_ONLINE:
441 cache_add_dev(sys_dev);
442 break;
443 case CPU_DEAD:
444 cache_remove_dev(sys_dev);
445 break;
446 }
447 return NOTIFY_OK;
448}
449
450static struct notifier_block cache_cpu_notifier =
451{
452 .notifier_call = cache_cpu_callback
453};
454
455static int __cpuinit cache_sysfs_init(void)
456{
457 int i;
458
459 for_each_online_cpu(i) {
460 cache_cpu_callback(&cache_cpu_notifier, CPU_ONLINE,
461 (void *)(long)i);
462 }
463
464 register_cpu_notifier(&cache_cpu_notifier);
465
466 return 0;
467}
468
469device_initcall(cache_sysfs_init);
470
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 3f5d77f633fa..7cc162e8978b 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -60,6 +60,17 @@ config MMC_SDHCI
60 60
61 If unsure, say N. 61 If unsure, say N.
62 62
63config MMC_OMAP
64 tristate "TI OMAP Multimedia Card Interface support"
65 depends on ARCH_OMAP && MMC
66 select TPS65010 if MACH_OMAP_H2
67 help
68 This selects the TI OMAP Multimedia card Interface.
69 If you have an OMAP board with a Multimedia Card slot,
70 say Y or M here.
71
72 If unsure, say N.
73
63config MMC_WBSD 74config MMC_WBSD
64 tristate "Winbond W83L51xD SD/MMC Card Interface support" 75 tristate "Winbond W83L51xD SD/MMC Card Interface support"
65 depends on MMC && ISA_DMA_API 76 depends on MMC && ISA_DMA_API
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 769d545284a4..c7c34aadfc92 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -20,5 +20,10 @@ obj-$(CONFIG_MMC_PXA) += pxamci.o
20obj-$(CONFIG_MMC_SDHCI) += sdhci.o 20obj-$(CONFIG_MMC_SDHCI) += sdhci.o
21obj-$(CONFIG_MMC_WBSD) += wbsd.o 21obj-$(CONFIG_MMC_WBSD) += wbsd.o
22obj-$(CONFIG_MMC_AU1X) += au1xmmc.o 22obj-$(CONFIG_MMC_AU1X) += au1xmmc.o
23obj-$(CONFIG_MMC_OMAP) += omap.o
23 24
24mmc_core-y := mmc.o mmc_queue.o mmc_sysfs.o 25mmc_core-y := mmc.o mmc_queue.o mmc_sysfs.o
26
27ifeq ($(CONFIG_MMC_DEBUG),y)
28EXTRA_CFLAGS += -DDEBUG
29endif
diff --git a/drivers/mmc/au1xmmc.c b/drivers/mmc/au1xmmc.c
index 85e89c77bdea..c0326bbc5f28 100644
--- a/drivers/mmc/au1xmmc.c
+++ b/drivers/mmc/au1xmmc.c
@@ -56,12 +56,11 @@
56#define DRIVER_NAME "au1xxx-mmc" 56#define DRIVER_NAME "au1xxx-mmc"
57 57
58/* Set this to enable special debugging macros */ 58/* Set this to enable special debugging macros */
59/* #define MMC_DEBUG */
60 59
61#ifdef MMC_DEBUG 60#ifdef DEBUG
62#define DEBUG(fmt, idx, args...) printk("au1xx(%d): DEBUG: " fmt, idx, ##args) 61#define DBG(fmt, idx, args...) printk("au1xx(%d): DEBUG: " fmt, idx, ##args)
63#else 62#else
64#define DEBUG(fmt, idx, args...) 63#define DBG(fmt, idx, args...)
65#endif 64#endif
66 65
67const struct { 66const struct {
@@ -424,18 +423,18 @@ static void au1xmmc_receive_pio(struct au1xmmc_host *host)
424 break; 423 break;
425 424
426 if (status & SD_STATUS_RC) { 425 if (status & SD_STATUS_RC) {
427 DEBUG("RX CRC Error [%d + %d].\n", host->id, 426 DBG("RX CRC Error [%d + %d].\n", host->id,
428 host->pio.len, count); 427 host->pio.len, count);
429 break; 428 break;
430 } 429 }
431 430
432 if (status & SD_STATUS_RO) { 431 if (status & SD_STATUS_RO) {
433 DEBUG("RX Overrun [%d + %d]\n", host->id, 432 DBG("RX Overrun [%d + %d]\n", host->id,
434 host->pio.len, count); 433 host->pio.len, count);
435 break; 434 break;
436 } 435 }
437 else if (status & SD_STATUS_RU) { 436 else if (status & SD_STATUS_RU) {
438 DEBUG("RX Underrun [%d + %d]\n", host->id, 437 DBG("RX Underrun [%d + %d]\n", host->id,
439 host->pio.len, count); 438 host->pio.len, count);
440 break; 439 break;
441 } 440 }
@@ -721,7 +720,7 @@ static void au1xmmc_set_ios(struct mmc_host* mmc, struct mmc_ios* ios)
721{ 720{
722 struct au1xmmc_host *host = mmc_priv(mmc); 721 struct au1xmmc_host *host = mmc_priv(mmc);
723 722
724 DEBUG("set_ios (power=%u, clock=%uHz, vdd=%u, mode=%u)\n", 723 DBG("set_ios (power=%u, clock=%uHz, vdd=%u, mode=%u)\n",
725 host->id, ios->power_mode, ios->clock, ios->vdd, 724 host->id, ios->power_mode, ios->clock, ios->vdd,
726 ios->bus_mode); 725 ios->bus_mode);
727 726
@@ -810,7 +809,7 @@ static irqreturn_t au1xmmc_irq(int irq, void *dev_id, struct pt_regs *regs)
810 au1xmmc_receive_pio(host); 809 au1xmmc_receive_pio(host);
811 } 810 }
812 else if (status & 0x203FBC70) { 811 else if (status & 0x203FBC70) {
813 DEBUG("Unhandled status %8.8x\n", host->id, status); 812 DBG("Unhandled status %8.8x\n", host->id, status);
814 handled = 0; 813 handled = 0;
815 } 814 }
816 815
@@ -839,7 +838,7 @@ static void au1xmmc_poll_event(unsigned long arg)
839 838
840 if (host->mrq != NULL) { 839 if (host->mrq != NULL) {
841 u32 status = au_readl(HOST_STATUS(host)); 840 u32 status = au_readl(HOST_STATUS(host));
842 DEBUG("PENDING - %8.8x\n", host->id, status); 841 DBG("PENDING - %8.8x\n", host->id, status);
843 } 842 }
844 843
845 mod_timer(&host->timer, jiffies + AU1XMMC_DETECT_TIMEOUT); 844 mod_timer(&host->timer, jiffies + AU1XMMC_DETECT_TIMEOUT);
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 1888060c5e0c..da6ddd910fc5 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -27,12 +27,6 @@
27 27
28#include "mmc.h" 28#include "mmc.h"
29 29
30#ifdef CONFIG_MMC_DEBUG
31#define DBG(x...) printk(KERN_DEBUG x)
32#else
33#define DBG(x...) do { } while (0)
34#endif
35
36#define CMD_RETRIES 3 30#define CMD_RETRIES 3
37 31
38/* 32/*
@@ -77,8 +71,9 @@ void mmc_request_done(struct mmc_host *host, struct mmc_request *mrq)
77{ 71{
78 struct mmc_command *cmd = mrq->cmd; 72 struct mmc_command *cmd = mrq->cmd;
79 int err = mrq->cmd->error; 73 int err = mrq->cmd->error;
80 DBG("MMC: req done (%02x): %d: %08x %08x %08x %08x\n", cmd->opcode, 74 pr_debug("MMC: req done (%02x): %d: %08x %08x %08x %08x\n",
81 err, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]); 75 cmd->opcode, err, cmd->resp[0], cmd->resp[1],
76 cmd->resp[2], cmd->resp[3]);
82 77
83 if (err && cmd->retries) { 78 if (err && cmd->retries) {
84 cmd->retries--; 79 cmd->retries--;
@@ -102,8 +97,8 @@ EXPORT_SYMBOL(mmc_request_done);
102void 97void
103mmc_start_request(struct mmc_host *host, struct mmc_request *mrq) 98mmc_start_request(struct mmc_host *host, struct mmc_request *mrq)
104{ 99{
105 DBG("MMC: starting cmd %02x arg %08x flags %08x\n", 100 pr_debug("MMC: starting cmd %02x arg %08x flags %08x\n",
106 mrq->cmd->opcode, mrq->cmd->arg, mrq->cmd->flags); 101 mrq->cmd->opcode, mrq->cmd->arg, mrq->cmd->flags);
107 102
108 WARN_ON(host->card_busy == NULL); 103 WARN_ON(host->card_busy == NULL);
109 104
@@ -976,8 +971,8 @@ static unsigned int mmc_calculate_clock(struct mmc_host *host)
976 if (!mmc_card_dead(card) && max_dtr > card->csd.max_dtr) 971 if (!mmc_card_dead(card) && max_dtr > card->csd.max_dtr)
977 max_dtr = card->csd.max_dtr; 972 max_dtr = card->csd.max_dtr;
978 973
979 DBG("MMC: selected %d.%03dMHz transfer rate\n", 974 pr_debug("MMC: selected %d.%03dMHz transfer rate\n",
980 max_dtr / 1000000, (max_dtr / 1000) % 1000); 975 max_dtr / 1000000, (max_dtr / 1000) % 1000);
981 976
982 return max_dtr; 977 return max_dtr;
983} 978}
diff --git a/drivers/mmc/mmci.c b/drivers/mmc/mmci.c
index 9fef29d978b5..df7e861e2fc7 100644
--- a/drivers/mmc/mmci.c
+++ b/drivers/mmc/mmci.c
@@ -33,12 +33,8 @@
33 33
34#define DRIVER_NAME "mmci-pl18x" 34#define DRIVER_NAME "mmci-pl18x"
35 35
36#ifdef CONFIG_MMC_DEBUG
37#define DBG(host,fmt,args...) \ 36#define DBG(host,fmt,args...) \
38 pr_debug("%s: %s: " fmt, mmc_hostname(host->mmc), __func__ , args) 37 pr_debug("%s: %s: " fmt, mmc_hostname(host->mmc), __func__ , args)
39#else
40#define DBG(host,fmt,args...) do { } while (0)
41#endif
42 38
43static unsigned int fmax = 515633; 39static unsigned int fmax = 515633;
44 40
diff --git a/drivers/mmc/omap.c b/drivers/mmc/omap.c
new file mode 100644
index 000000000000..becb3c68c34d
--- /dev/null
+++ b/drivers/mmc/omap.c
@@ -0,0 +1,1226 @@
1/*
2 * linux/drivers/media/mmc/omap.c
3 *
4 * Copyright (C) 2004 Nokia Corporation
5 * Written by Tuukka Tikkanen and Juha Yrjölä<juha.yrjola@nokia.com>
6 * Misc hacks here and there by Tony Lindgren <tony@atomide.com>
7 * Other hacks (DMA, SD, etc) by David Brownell
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/config.h>
15#include <linux/module.h>
16#include <linux/moduleparam.h>
17#include <linux/init.h>
18#include <linux/ioport.h>
19#include <linux/platform_device.h>
20#include <linux/interrupt.h>
21#include <linux/dma-mapping.h>
22#include <linux/delay.h>
23#include <linux/spinlock.h>
24#include <linux/timer.h>
25#include <linux/mmc/host.h>
26#include <linux/mmc/protocol.h>
27#include <linux/mmc/card.h>
28#include <linux/clk.h>
29
30#include <asm/io.h>
31#include <asm/irq.h>
32#include <asm/scatterlist.h>
33#include <asm/mach-types.h>
34
35#include <asm/arch/board.h>
36#include <asm/arch/gpio.h>
37#include <asm/arch/dma.h>
38#include <asm/arch/mux.h>
39#include <asm/arch/fpga.h>
40#include <asm/arch/tps65010.h>
41
42#include "omap.h"
43
44#define DRIVER_NAME "mmci-omap"
45#define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE))
46
47/* Specifies how often in millisecs to poll for card status changes
48 * when the cover switch is open */
49#define OMAP_MMC_SWITCH_POLL_DELAY 500
50
51static int mmc_omap_enable_poll = 1;
52
53struct mmc_omap_host {
54 int initialized;
55 int suspended;
56 struct mmc_request * mrq;
57 struct mmc_command * cmd;
58 struct mmc_data * data;
59 struct mmc_host * mmc;
60 struct device * dev;
61 unsigned char id; /* 16xx chips have 2 MMC blocks */
62 struct clk * iclk;
63 struct clk * fclk;
64 void __iomem *base;
65 int irq;
66 unsigned char bus_mode;
67 unsigned char hw_bus_mode;
68
69 unsigned int sg_len;
70 int sg_idx;
71 u16 * buffer;
72 u32 buffer_bytes_left;
73 u32 total_bytes_left;
74
75 unsigned use_dma:1;
76 unsigned brs_received:1, dma_done:1;
77 unsigned dma_is_read:1;
78 unsigned dma_in_use:1;
79 int dma_ch;
80 spinlock_t dma_lock;
81 struct timer_list dma_timer;
82 unsigned dma_len;
83
84 short power_pin;
85 short wp_pin;
86
87 int switch_pin;
88 struct work_struct switch_work;
89 struct timer_list switch_timer;
90 int switch_last_state;
91};
92
93static inline int
94mmc_omap_cover_is_open(struct mmc_omap_host *host)
95{
96 if (host->switch_pin < 0)
97 return 0;
98 return omap_get_gpio_datain(host->switch_pin);
99}
100
101static ssize_t
102mmc_omap_show_cover_switch(struct device *dev,
103 struct device_attribute *attr, char *buf)
104{
105 struct mmc_omap_host *host = dev_get_drvdata(dev);
106
107 return sprintf(buf, "%s\n", mmc_omap_cover_is_open(host) ? "open" :
108 "closed");
109}
110
111static DEVICE_ATTR(cover_switch, S_IRUGO, mmc_omap_show_cover_switch, NULL);
112
113static ssize_t
114mmc_omap_show_enable_poll(struct device *dev,
115 struct device_attribute *attr, char *buf)
116{
117 return snprintf(buf, PAGE_SIZE, "%d\n", mmc_omap_enable_poll);
118}
119
120static ssize_t
121mmc_omap_store_enable_poll(struct device *dev,
122 struct device_attribute *attr, const char *buf,
123 size_t size)
124{
125 int enable_poll;
126
127 if (sscanf(buf, "%10d", &enable_poll) != 1)
128 return -EINVAL;
129
130 if (enable_poll != mmc_omap_enable_poll) {
131 struct mmc_omap_host *host = dev_get_drvdata(dev);
132
133 mmc_omap_enable_poll = enable_poll;
134 if (enable_poll && host->switch_pin >= 0)
135 schedule_work(&host->switch_work);
136 }
137 return size;
138}
139
140static DEVICE_ATTR(enable_poll, 0664,
141 mmc_omap_show_enable_poll, mmc_omap_store_enable_poll);
142
143static void
144mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd)
145{
146 u32 cmdreg;
147 u32 resptype;
148 u32 cmdtype;
149
150 host->cmd = cmd;
151
152 resptype = 0;
153 cmdtype = 0;
154
155 /* Our hardware needs to know exact type */
156 switch (RSP_TYPE(mmc_resp_type(cmd))) {
157 case RSP_TYPE(MMC_RSP_R1):
158 /* resp 1, resp 1b */
159 resptype = 1;
160 break;
161 case RSP_TYPE(MMC_RSP_R2):
162 resptype = 2;
163 break;
164 case RSP_TYPE(MMC_RSP_R3):
165 resptype = 3;
166 break;
167 default:
168 break;
169 }
170
171 if (mmc_cmd_type(cmd) == MMC_CMD_ADTC) {
172 cmdtype = OMAP_MMC_CMDTYPE_ADTC;
173 } else if (mmc_cmd_type(cmd) == MMC_CMD_BC) {
174 cmdtype = OMAP_MMC_CMDTYPE_BC;
175 } else if (mmc_cmd_type(cmd) == MMC_CMD_BCR) {
176 cmdtype = OMAP_MMC_CMDTYPE_BCR;
177 } else {
178 cmdtype = OMAP_MMC_CMDTYPE_AC;
179 }
180
181 cmdreg = cmd->opcode | (resptype << 8) | (cmdtype << 12);
182
183 if (host->bus_mode == MMC_BUSMODE_OPENDRAIN)
184 cmdreg |= 1 << 6;
185
186 if (cmd->flags & MMC_RSP_BUSY)
187 cmdreg |= 1 << 11;
188
189 if (host->data && !(host->data->flags & MMC_DATA_WRITE))
190 cmdreg |= 1 << 15;
191
192 clk_enable(host->fclk);
193
194 OMAP_MMC_WRITE(host->base, CTO, 200);
195 OMAP_MMC_WRITE(host->base, ARGL, cmd->arg & 0xffff);
196 OMAP_MMC_WRITE(host->base, ARGH, cmd->arg >> 16);
197 OMAP_MMC_WRITE(host->base, IE,
198 OMAP_MMC_STAT_A_EMPTY | OMAP_MMC_STAT_A_FULL |
199 OMAP_MMC_STAT_CMD_CRC | OMAP_MMC_STAT_CMD_TOUT |
200 OMAP_MMC_STAT_DATA_CRC | OMAP_MMC_STAT_DATA_TOUT |
201 OMAP_MMC_STAT_END_OF_CMD | OMAP_MMC_STAT_CARD_ERR |
202 OMAP_MMC_STAT_END_OF_DATA);
203 OMAP_MMC_WRITE(host->base, CMD, cmdreg);
204}
205
206static void
207mmc_omap_xfer_done(struct mmc_omap_host *host, struct mmc_data *data)
208{
209 if (host->dma_in_use) {
210 enum dma_data_direction dma_data_dir;
211
212 BUG_ON(host->dma_ch < 0);
213 if (data->error != MMC_ERR_NONE)
214 omap_stop_dma(host->dma_ch);
215 /* Release DMA channel lazily */
216 mod_timer(&host->dma_timer, jiffies + HZ);
217 if (data->flags & MMC_DATA_WRITE)
218 dma_data_dir = DMA_TO_DEVICE;
219 else
220 dma_data_dir = DMA_FROM_DEVICE;
221 dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->sg_len,
222 dma_data_dir);
223 }
224 host->data = NULL;
225 host->sg_len = 0;
226 clk_disable(host->fclk);
227
228 /* NOTE: MMC layer will sometimes poll-wait CMD13 next, issuing
229 * dozens of requests until the card finishes writing data.
230 * It'd be cheaper to just wait till an EOFB interrupt arrives...
231 */
232
233 if (!data->stop) {
234 host->mrq = NULL;
235 mmc_request_done(host->mmc, data->mrq);
236 return;
237 }
238
239 mmc_omap_start_command(host, data->stop);
240}
241
242static void
243mmc_omap_end_of_data(struct mmc_omap_host *host, struct mmc_data *data)
244{
245 unsigned long flags;
246 int done;
247
248 if (!host->dma_in_use) {
249 mmc_omap_xfer_done(host, data);
250 return;
251 }
252 done = 0;
253 spin_lock_irqsave(&host->dma_lock, flags);
254 if (host->dma_done)
255 done = 1;
256 else
257 host->brs_received = 1;
258 spin_unlock_irqrestore(&host->dma_lock, flags);
259 if (done)
260 mmc_omap_xfer_done(host, data);
261}
262
263static void
264mmc_omap_dma_timer(unsigned long data)
265{
266 struct mmc_omap_host *host = (struct mmc_omap_host *) data;
267
268 BUG_ON(host->dma_ch < 0);
269 omap_free_dma(host->dma_ch);
270 host->dma_ch = -1;
271}
272
273static void
274mmc_omap_dma_done(struct mmc_omap_host *host, struct mmc_data *data)
275{
276 unsigned long flags;
277 int done;
278
279 done = 0;
280 spin_lock_irqsave(&host->dma_lock, flags);
281 if (host->brs_received)
282 done = 1;
283 else
284 host->dma_done = 1;
285 spin_unlock_irqrestore(&host->dma_lock, flags);
286 if (done)
287 mmc_omap_xfer_done(host, data);
288}
289
290static void
291mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd)
292{
293 host->cmd = NULL;
294
295 if (cmd->flags & MMC_RSP_PRESENT) {
296 if (cmd->flags & MMC_RSP_136) {
297 /* response type 2 */
298 cmd->resp[3] =
299 OMAP_MMC_READ(host->base, RSP0) |
300 (OMAP_MMC_READ(host->base, RSP1) << 16);
301 cmd->resp[2] =
302 OMAP_MMC_READ(host->base, RSP2) |
303 (OMAP_MMC_READ(host->base, RSP3) << 16);
304 cmd->resp[1] =
305 OMAP_MMC_READ(host->base, RSP4) |
306 (OMAP_MMC_READ(host->base, RSP5) << 16);
307 cmd->resp[0] =
308 OMAP_MMC_READ(host->base, RSP6) |
309 (OMAP_MMC_READ(host->base, RSP7) << 16);
310 } else {
311 /* response types 1, 1b, 3, 4, 5, 6 */
312 cmd->resp[0] =
313 OMAP_MMC_READ(host->base, RSP6) |
314 (OMAP_MMC_READ(host->base, RSP7) << 16);
315 }
316 }
317
318 if (host->data == NULL || cmd->error != MMC_ERR_NONE) {
319 host->mrq = NULL;
320 clk_disable(host->fclk);
321 mmc_request_done(host->mmc, cmd->mrq);
322 }
323}
324
325/* PIO only */
326static void
327mmc_omap_sg_to_buf(struct mmc_omap_host *host)
328{
329 struct scatterlist *sg;
330
331 sg = host->data->sg + host->sg_idx;
332 host->buffer_bytes_left = sg->length;
333 host->buffer = page_address(sg->page) + sg->offset;
334 if (host->buffer_bytes_left > host->total_bytes_left)
335 host->buffer_bytes_left = host->total_bytes_left;
336}
337
338/* PIO only */
339static void
340mmc_omap_xfer_data(struct mmc_omap_host *host, int write)
341{
342 int n;
343 void __iomem *reg;
344 u16 *p;
345
346 if (host->buffer_bytes_left == 0) {
347 host->sg_idx++;
348 BUG_ON(host->sg_idx == host->sg_len);
349 mmc_omap_sg_to_buf(host);
350 }
351 n = 64;
352 if (n > host->buffer_bytes_left)
353 n = host->buffer_bytes_left;
354 host->buffer_bytes_left -= n;
355 host->total_bytes_left -= n;
356 host->data->bytes_xfered += n;
357
358 if (write) {
359 __raw_writesw(host->base + OMAP_MMC_REG_DATA, host->buffer, n);
360 } else {
361 __raw_readsw(host->base + OMAP_MMC_REG_DATA, host->buffer, n);
362 }
363}
364
365static inline void mmc_omap_report_irq(u16 status)
366{
367 static const char *mmc_omap_status_bits[] = {
368 "EOC", "CD", "CB", "BRS", "EOFB", "DTO", "DCRC", "CTO",
369 "CCRC", "CRW", "AF", "AE", "OCRB", "CIRQ", "CERR"
370 };
371 int i, c = 0;
372
373 for (i = 0; i < ARRAY_SIZE(mmc_omap_status_bits); i++)
374 if (status & (1 << i)) {
375 if (c)
376 printk(" ");
377 printk("%s", mmc_omap_status_bits[i]);
378 c++;
379 }
380}
381
382static irqreturn_t mmc_omap_irq(int irq, void *dev_id, struct pt_regs *regs)
383{
384 struct mmc_omap_host * host = (struct mmc_omap_host *)dev_id;
385 u16 status;
386 int end_command;
387 int end_transfer;
388 int transfer_error;
389
390 if (host->cmd == NULL && host->data == NULL) {
391 status = OMAP_MMC_READ(host->base, STAT);
392 dev_info(mmc_dev(host->mmc),"spurious irq 0x%04x\n", status);
393 if (status != 0) {
394 OMAP_MMC_WRITE(host->base, STAT, status);
395 OMAP_MMC_WRITE(host->base, IE, 0);
396 }
397 return IRQ_HANDLED;
398 }
399
400 end_command = 0;
401 end_transfer = 0;
402 transfer_error = 0;
403
404 while ((status = OMAP_MMC_READ(host->base, STAT)) != 0) {
405 OMAP_MMC_WRITE(host->base, STAT, status);
406#ifdef CONFIG_MMC_DEBUG
407 dev_dbg(mmc_dev(host->mmc), "MMC IRQ %04x (CMD %d): ",
408 status, host->cmd != NULL ? host->cmd->opcode : -1);
409 mmc_omap_report_irq(status);
410 printk("\n");
411#endif
412 if (host->total_bytes_left) {
413 if ((status & OMAP_MMC_STAT_A_FULL) ||
414 (status & OMAP_MMC_STAT_END_OF_DATA))
415 mmc_omap_xfer_data(host, 0);
416 if (status & OMAP_MMC_STAT_A_EMPTY)
417 mmc_omap_xfer_data(host, 1);
418 }
419
420 if (status & OMAP_MMC_STAT_END_OF_DATA) {
421 end_transfer = 1;
422 }
423
424 if (status & OMAP_MMC_STAT_DATA_TOUT) {
425 dev_dbg(mmc_dev(host->mmc), "data timeout\n");
426 if (host->data) {
427 host->data->error |= MMC_ERR_TIMEOUT;
428 transfer_error = 1;
429 }
430 }
431
432 if (status & OMAP_MMC_STAT_DATA_CRC) {
433 if (host->data) {
434 host->data->error |= MMC_ERR_BADCRC;
435 dev_dbg(mmc_dev(host->mmc),
436 "data CRC error, bytes left %d\n",
437 host->total_bytes_left);
438 transfer_error = 1;
439 } else {
440 dev_dbg(mmc_dev(host->mmc), "data CRC error\n");
441 }
442 }
443
444 if (status & OMAP_MMC_STAT_CMD_TOUT) {
445 /* Timeouts are routine with some commands */
446 if (host->cmd) {
447 if (host->cmd->opcode != MMC_ALL_SEND_CID &&
448 host->cmd->opcode !=
449 MMC_SEND_OP_COND &&
450 host->cmd->opcode !=
451 MMC_APP_CMD &&
452 !mmc_omap_cover_is_open(host))
453 dev_err(mmc_dev(host->mmc),
454 "command timeout, CMD %d\n",
455 host->cmd->opcode);
456 host->cmd->error = MMC_ERR_TIMEOUT;
457 end_command = 1;
458 }
459 }
460
461 if (status & OMAP_MMC_STAT_CMD_CRC) {
462 if (host->cmd) {
463 dev_err(mmc_dev(host->mmc),
464 "command CRC error (CMD%d, arg 0x%08x)\n",
465 host->cmd->opcode, host->cmd->arg);
466 host->cmd->error = MMC_ERR_BADCRC;
467 end_command = 1;
468 } else
469 dev_err(mmc_dev(host->mmc),
470 "command CRC error without cmd?\n");
471 }
472
473 if (status & OMAP_MMC_STAT_CARD_ERR) {
474 if (host->cmd && host->cmd->opcode == MMC_STOP_TRANSMISSION) {
475 u32 response = OMAP_MMC_READ(host->base, RSP6)
476 | (OMAP_MMC_READ(host->base, RSP7) << 16);
477 /* STOP sometimes sets must-ignore bits */
478 if (!(response & (R1_CC_ERROR
479 | R1_ILLEGAL_COMMAND
480 | R1_COM_CRC_ERROR))) {
481 end_command = 1;
482 continue;
483 }
484 }
485
486 dev_dbg(mmc_dev(host->mmc), "card status error (CMD%d)\n",
487 host->cmd->opcode);
488 if (host->cmd) {
489 host->cmd->error = MMC_ERR_FAILED;
490 end_command = 1;
491 }
492 if (host->data) {
493 host->data->error = MMC_ERR_FAILED;
494 transfer_error = 1;
495 }
496 }
497
498 /*
499 * NOTE: On 1610 the END_OF_CMD may come too early when
500 * starting a write
501 */
502 if ((status & OMAP_MMC_STAT_END_OF_CMD) &&
503 (!(status & OMAP_MMC_STAT_A_EMPTY))) {
504 end_command = 1;
505 }
506 }
507
508 if (end_command) {
509 mmc_omap_cmd_done(host, host->cmd);
510 }
511 if (transfer_error)
512 mmc_omap_xfer_done(host, host->data);
513 else if (end_transfer)
514 mmc_omap_end_of_data(host, host->data);
515
516 return IRQ_HANDLED;
517}
518
519static irqreturn_t mmc_omap_switch_irq(int irq, void *dev_id, struct pt_regs *regs)
520{
521 struct mmc_omap_host *host = (struct mmc_omap_host *) dev_id;
522
523 schedule_work(&host->switch_work);
524
525 return IRQ_HANDLED;
526}
527
528static void mmc_omap_switch_timer(unsigned long arg)
529{
530 struct mmc_omap_host *host = (struct mmc_omap_host *) arg;
531
532 schedule_work(&host->switch_work);
533}
534
535/* FIXME: Handle card insertion and removal properly. Maybe use a mask
536 * for MMC state? */
537static void mmc_omap_switch_callback(unsigned long data, u8 mmc_mask)
538{
539}
540
541static void mmc_omap_switch_handler(void *data)
542{
543 struct mmc_omap_host *host = (struct mmc_omap_host *) data;
544 struct mmc_card *card;
545 static int complained = 0;
546 int cards = 0, cover_open;
547
548 if (host->switch_pin == -1)
549 return;
550 cover_open = mmc_omap_cover_is_open(host);
551 if (cover_open != host->switch_last_state) {
552 kobject_uevent(&host->dev->kobj, KOBJ_CHANGE);
553 host->switch_last_state = cover_open;
554 }
555 mmc_detect_change(host->mmc, 0);
556 list_for_each_entry(card, &host->mmc->cards, node) {
557 if (mmc_card_present(card))
558 cards++;
559 }
560 if (mmc_omap_cover_is_open(host)) {
561 if (!complained) {
562 dev_info(mmc_dev(host->mmc), "cover is open");
563 complained = 1;
564 }
565 if (mmc_omap_enable_poll)
566 mod_timer(&host->switch_timer, jiffies +
567 msecs_to_jiffies(OMAP_MMC_SWITCH_POLL_DELAY));
568 } else {
569 complained = 0;
570 }
571}
572
573/* Prepare to transfer the next segment of a scatterlist */
574static void
575mmc_omap_prepare_dma(struct mmc_omap_host *host, struct mmc_data *data)
576{
577 int dma_ch = host->dma_ch;
578 unsigned long data_addr;
579 u16 buf, frame;
580 u32 count;
581 struct scatterlist *sg = &data->sg[host->sg_idx];
582 int src_port = 0;
583 int dst_port = 0;
584 int sync_dev = 0;
585
586 data_addr = io_v2p((u32) host->base) + OMAP_MMC_REG_DATA;
587 frame = 1 << data->blksz_bits;
588 count = sg_dma_len(sg);
589
590 if ((data->blocks == 1) && (count > (1 << data->blksz_bits)))
591 count = frame;
592
593 host->dma_len = count;
594
595 /* FIFO is 16x2 bytes on 15xx, and 32x2 bytes on 16xx and 24xx.
596 * Use 16 or 32 word frames when the blocksize is at least that large.
597 * Blocksize is usually 512 bytes; but not for some SD reads.
598 */
599 if (cpu_is_omap15xx() && frame > 32)
600 frame = 32;
601 else if (frame > 64)
602 frame = 64;
603 count /= frame;
604 frame >>= 1;
605
606 if (!(data->flags & MMC_DATA_WRITE)) {
607 buf = 0x800f | ((frame - 1) << 8);
608
609 if (cpu_class_is_omap1()) {
610 src_port = OMAP_DMA_PORT_TIPB;
611 dst_port = OMAP_DMA_PORT_EMIFF;
612 }
613 if (cpu_is_omap24xx())
614 sync_dev = OMAP24XX_DMA_MMC1_RX;
615
616 omap_set_dma_src_params(dma_ch, src_port,
617 OMAP_DMA_AMODE_CONSTANT,
618 data_addr, 0, 0);
619 omap_set_dma_dest_params(dma_ch, dst_port,
620 OMAP_DMA_AMODE_POST_INC,
621 sg_dma_address(sg), 0, 0);
622 omap_set_dma_dest_data_pack(dma_ch, 1);
623 omap_set_dma_dest_burst_mode(dma_ch, OMAP_DMA_DATA_BURST_4);
624 } else {
625 buf = 0x0f80 | ((frame - 1) << 0);
626
627 if (cpu_class_is_omap1()) {
628 src_port = OMAP_DMA_PORT_EMIFF;
629 dst_port = OMAP_DMA_PORT_TIPB;
630 }
631 if (cpu_is_omap24xx())
632 sync_dev = OMAP24XX_DMA_MMC1_TX;
633
634 omap_set_dma_dest_params(dma_ch, dst_port,
635 OMAP_DMA_AMODE_CONSTANT,
636 data_addr, 0, 0);
637 omap_set_dma_src_params(dma_ch, src_port,
638 OMAP_DMA_AMODE_POST_INC,
639 sg_dma_address(sg), 0, 0);
640 omap_set_dma_src_data_pack(dma_ch, 1);
641 omap_set_dma_src_burst_mode(dma_ch, OMAP_DMA_DATA_BURST_4);
642 }
643
644 /* Max limit for DMA frame count is 0xffff */
645 if (unlikely(count > 0xffff))
646 BUG();
647
648 OMAP_MMC_WRITE(host->base, BUF, buf);
649 omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S16,
650 frame, count, OMAP_DMA_SYNC_FRAME,
651 sync_dev, 0);
652}
653
654/* A scatterlist segment completed */
655static void mmc_omap_dma_cb(int lch, u16 ch_status, void *data)
656{
657 struct mmc_omap_host *host = (struct mmc_omap_host *) data;
658 struct mmc_data *mmcdat = host->data;
659
660 if (unlikely(host->dma_ch < 0)) {
661 dev_err(mmc_dev(host->mmc), "DMA callback while DMA not
662 enabled\n");
663 return;
664 }
665 /* FIXME: We really should do something to _handle_ the errors */
666 if (ch_status & OMAP_DMA_TOUT_IRQ) {
667 dev_err(mmc_dev(host->mmc),"DMA timeout\n");
668 return;
669 }
670 if (ch_status & OMAP_DMA_DROP_IRQ) {
671 dev_err(mmc_dev(host->mmc), "DMA sync error\n");
672 return;
673 }
674 if (!(ch_status & OMAP_DMA_BLOCK_IRQ)) {
675 return;
676 }
677 mmcdat->bytes_xfered += host->dma_len;
678 host->sg_idx++;
679 if (host->sg_idx < host->sg_len) {
680 mmc_omap_prepare_dma(host, host->data);
681 omap_start_dma(host->dma_ch);
682 } else
683 mmc_omap_dma_done(host, host->data);
684}
685
686static int mmc_omap_get_dma_channel(struct mmc_omap_host *host, struct mmc_data *data)
687{
688 const char *dev_name;
689 int sync_dev, dma_ch, is_read, r;
690
691 is_read = !(data->flags & MMC_DATA_WRITE);
692 del_timer_sync(&host->dma_timer);
693 if (host->dma_ch >= 0) {
694 if (is_read == host->dma_is_read)
695 return 0;
696 omap_free_dma(host->dma_ch);
697 host->dma_ch = -1;
698 }
699
700 if (is_read) {
701 if (host->id == 1) {
702 sync_dev = OMAP_DMA_MMC_RX;
703 dev_name = "MMC1 read";
704 } else {
705 sync_dev = OMAP_DMA_MMC2_RX;
706 dev_name = "MMC2 read";
707 }
708 } else {
709 if (host->id == 1) {
710 sync_dev = OMAP_DMA_MMC_TX;
711 dev_name = "MMC1 write";
712 } else {
713 sync_dev = OMAP_DMA_MMC2_TX;
714 dev_name = "MMC2 write";
715 }
716 }
717 r = omap_request_dma(sync_dev, dev_name, mmc_omap_dma_cb,
718 host, &dma_ch);
719 if (r != 0) {
720 dev_dbg(mmc_dev(host->mmc), "omap_request_dma() failed with %d\n", r);
721 return r;
722 }
723 host->dma_ch = dma_ch;
724 host->dma_is_read = is_read;
725
726 return 0;
727}
728
729static inline void set_cmd_timeout(struct mmc_omap_host *host, struct mmc_request *req)
730{
731 u16 reg;
732
733 reg = OMAP_MMC_READ(host->base, SDIO);
734 reg &= ~(1 << 5);
735 OMAP_MMC_WRITE(host->base, SDIO, reg);
736 /* Set maximum timeout */
737 OMAP_MMC_WRITE(host->base, CTO, 0xff);
738}
739
740static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_request *req)
741{
742 int timeout;
743 u16 reg;
744
745 /* Convert ns to clock cycles by assuming 20MHz frequency
746 * 1 cycle at 20MHz = 500 ns
747 */
748 timeout = req->data->timeout_clks + req->data->timeout_ns / 500;
749
750 /* Check if we need to use timeout multiplier register */
751 reg = OMAP_MMC_READ(host->base, SDIO);
752 if (timeout > 0xffff) {
753 reg |= (1 << 5);
754 timeout /= 1024;
755 } else
756 reg &= ~(1 << 5);
757 OMAP_MMC_WRITE(host->base, SDIO, reg);
758 OMAP_MMC_WRITE(host->base, DTO, timeout);
759}
760
761static void
762mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
763{
764 struct mmc_data *data = req->data;
765 int i, use_dma, block_size;
766 unsigned sg_len;
767
768 host->data = data;
769 if (data == NULL) {
770 OMAP_MMC_WRITE(host->base, BLEN, 0);
771 OMAP_MMC_WRITE(host->base, NBLK, 0);
772 OMAP_MMC_WRITE(host->base, BUF, 0);
773 host->dma_in_use = 0;
774 set_cmd_timeout(host, req);
775 return;
776 }
777
778
779 block_size = 1 << data->blksz_bits;
780
781 OMAP_MMC_WRITE(host->base, NBLK, data->blocks - 1);
782 OMAP_MMC_WRITE(host->base, BLEN, block_size - 1);
783 set_data_timeout(host, req);
784
785 /* cope with calling layer confusion; it issues "single
786 * block" writes using multi-block scatterlists.
787 */
788 sg_len = (data->blocks == 1) ? 1 : data->sg_len;
789
790 /* Only do DMA for entire blocks */
791 use_dma = host->use_dma;
792 if (use_dma) {
793 for (i = 0; i < sg_len; i++) {
794 if ((data->sg[i].length % block_size) != 0) {
795 use_dma = 0;
796 break;
797 }
798 }
799 }
800
801 host->sg_idx = 0;
802 if (use_dma) {
803 if (mmc_omap_get_dma_channel(host, data) == 0) {
804 enum dma_data_direction dma_data_dir;
805
806 if (data->flags & MMC_DATA_WRITE)
807 dma_data_dir = DMA_TO_DEVICE;
808 else
809 dma_data_dir = DMA_FROM_DEVICE;
810
811 host->sg_len = dma_map_sg(mmc_dev(host->mmc), data->sg,
812 sg_len, dma_data_dir);
813 host->total_bytes_left = 0;
814 mmc_omap_prepare_dma(host, req->data);
815 host->brs_received = 0;
816 host->dma_done = 0;
817 host->dma_in_use = 1;
818 } else
819 use_dma = 0;
820 }
821
822 /* Revert to PIO? */
823 if (!use_dma) {
824 OMAP_MMC_WRITE(host->base, BUF, 0x1f1f);
825 host->total_bytes_left = data->blocks * block_size;
826 host->sg_len = sg_len;
827 mmc_omap_sg_to_buf(host);
828 host->dma_in_use = 0;
829 }
830}
831
832static void mmc_omap_request(struct mmc_host *mmc, struct mmc_request *req)
833{
834 struct mmc_omap_host *host = mmc_priv(mmc);
835
836 WARN_ON(host->mrq != NULL);
837
838 host->mrq = req;
839
840 /* only touch fifo AFTER the controller readies it */
841 mmc_omap_prepare_data(host, req);
842 mmc_omap_start_command(host, req->cmd);
843 if (host->dma_in_use)
844 omap_start_dma(host->dma_ch);
845}
846
847static void innovator_fpga_socket_power(int on)
848{
849#if defined(CONFIG_MACH_OMAP_INNOVATOR) && defined(CONFIG_ARCH_OMAP15XX)
850
851 if (on) {
852 fpga_write(fpga_read(OMAP1510_FPGA_POWER) | (1 << 3),
853 OMAP1510_FPGA_POWER);
854 } else {
855 fpga_write(fpga_read(OMAP1510_FPGA_POWER) & ~(1 << 3),
856 OMAP1510_FPGA_POWER);
857 }
858#endif
859}
860
861/*
862 * Turn the socket power on/off. Innovator uses FPGA, most boards
863 * probably use GPIO.
864 */
865static void mmc_omap_power(struct mmc_omap_host *host, int on)
866{
867 if (on) {
868 if (machine_is_omap_innovator())
869 innovator_fpga_socket_power(1);
870 else if (machine_is_omap_h2())
871 tps65010_set_gpio_out_value(GPIO3, HIGH);
872 else if (machine_is_omap_h3())
873 /* GPIO 4 of TPS65010 sends SD_EN signal */
874 tps65010_set_gpio_out_value(GPIO4, HIGH);
875 else if (cpu_is_omap24xx()) {
876 u16 reg = OMAP_MMC_READ(host->base, CON);
877 OMAP_MMC_WRITE(host->base, CON, reg | (1 << 11));
878 } else
879 if (host->power_pin >= 0)
880 omap_set_gpio_dataout(host->power_pin, 1);
881 } else {
882 if (machine_is_omap_innovator())
883 innovator_fpga_socket_power(0);
884 else if (machine_is_omap_h2())
885 tps65010_set_gpio_out_value(GPIO3, LOW);
886 else if (machine_is_omap_h3())
887 tps65010_set_gpio_out_value(GPIO4, LOW);
888 else if (cpu_is_omap24xx()) {
889 u16 reg = OMAP_MMC_READ(host->base, CON);
890 OMAP_MMC_WRITE(host->base, CON, reg & ~(1 << 11));
891 } else
892 if (host->power_pin >= 0)
893 omap_set_gpio_dataout(host->power_pin, 0);
894 }
895}
896
897static void mmc_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
898{
899 struct mmc_omap_host *host = mmc_priv(mmc);
900 int dsor;
901 int realclock, i;
902
903 realclock = ios->clock;
904
905 if (ios->clock == 0)
906 dsor = 0;
907 else {
908 int func_clk_rate = clk_get_rate(host->fclk);
909
910 dsor = func_clk_rate / realclock;
911 if (dsor < 1)
912 dsor = 1;
913
914 if (func_clk_rate / dsor > realclock)
915 dsor++;
916
917 if (dsor > 250)
918 dsor = 250;
919 dsor++;
920
921 if (ios->bus_width == MMC_BUS_WIDTH_4)
922 dsor |= 1 << 15;
923 }
924
925 switch (ios->power_mode) {
926 case MMC_POWER_OFF:
927 mmc_omap_power(host, 0);
928 break;
929 case MMC_POWER_UP:
930 case MMC_POWER_ON:
931 mmc_omap_power(host, 1);
932 dsor |= 1<<11;
933 break;
934 }
935
936 host->bus_mode = ios->bus_mode;
937 host->hw_bus_mode = host->bus_mode;
938
939 clk_enable(host->fclk);
940
941 /* On insanely high arm_per frequencies something sometimes
942 * goes somehow out of sync, and the POW bit is not being set,
943 * which results in the while loop below getting stuck.
944 * Writing to the CON register twice seems to do the trick. */
945 for (i = 0; i < 2; i++)
946 OMAP_MMC_WRITE(host->base, CON, dsor);
947 if (ios->power_mode == MMC_POWER_UP) {
948 /* Send clock cycles, poll completion */
949 OMAP_MMC_WRITE(host->base, IE, 0);
950 OMAP_MMC_WRITE(host->base, STAT, 0xffff);
951 OMAP_MMC_WRITE(host->base, CMD, 1<<7);
952 while (0 == (OMAP_MMC_READ(host->base, STAT) & 1));
953 OMAP_MMC_WRITE(host->base, STAT, 1);
954 }
955 clk_disable(host->fclk);
956}
957
958static int mmc_omap_get_ro(struct mmc_host *mmc)
959{
960 struct mmc_omap_host *host = mmc_priv(mmc);
961
962 return host->wp_pin && omap_get_gpio_datain(host->wp_pin);
963}
964
965static struct mmc_host_ops mmc_omap_ops = {
966 .request = mmc_omap_request,
967 .set_ios = mmc_omap_set_ios,
968 .get_ro = mmc_omap_get_ro,
969};
970
971static int __init mmc_omap_probe(struct platform_device *pdev)
972{
973 struct omap_mmc_conf *minfo = pdev->dev.platform_data;
974 struct mmc_host *mmc;
975 struct mmc_omap_host *host = NULL;
976 int ret = 0;
977
978 if (platform_get_resource(pdev, IORESOURCE_MEM, 0) ||
979 platform_get_irq(pdev, IORESOURCE_IRQ, 0)) {
980 dev_err(&pdev->dev, "mmc_omap_probe: invalid resource type\n");
981 return -ENODEV;
982 }
983
984 if (!request_mem_region(pdev->resource[0].start,
985 pdev->resource[0].end - pdev->resource[0].start + 1,
986 pdev->name)) {
987 dev_dbg(&pdev->dev, "request_mem_region failed\n");
988 return -EBUSY;
989 }
990
991 mmc = mmc_alloc_host(sizeof(struct mmc_omap_host), &pdev->dev);
992 if (!mmc) {
993 ret = -ENOMEM;
994 goto out;
995 }
996
997 host = mmc_priv(mmc);
998 host->mmc = mmc;
999
1000 spin_lock_init(&host->dma_lock);
1001 init_timer(&host->dma_timer);
1002 host->dma_timer.function = mmc_omap_dma_timer;
1003 host->dma_timer.data = (unsigned long) host;
1004
1005 host->id = pdev->id;
1006
1007 if (cpu_is_omap24xx()) {
1008 host->iclk = clk_get(&pdev->dev, "mmc_ick");
1009 if (IS_ERR(host->iclk))
1010 goto out;
1011 clk_enable(host->iclk);
1012 }
1013
1014 if (!cpu_is_omap24xx())
1015 host->fclk = clk_get(&pdev->dev, "mmc_ck");
1016 else
1017 host->fclk = clk_get(&pdev->dev, "mmc_fck");
1018
1019 if (IS_ERR(host->fclk)) {
1020 ret = PTR_ERR(host->fclk);
1021 goto out;
1022 }
1023
1024 /* REVISIT:
1025 * Also, use minfo->cover to decide how to manage
1026 * the card detect sensing.
1027 */
1028 host->power_pin = minfo->power_pin;
1029 host->switch_pin = minfo->switch_pin;
1030 host->wp_pin = minfo->wp_pin;
1031 host->use_dma = 1;
1032 host->dma_ch = -1;
1033
1034 host->irq = pdev->resource[1].start;
1035 host->base = ioremap(pdev->res.start, SZ_4K);
1036 if (!host->base) {
1037 ret = -ENOMEM;
1038 goto out;
1039 }
1040
1041 if (minfo->wire4)
1042 mmc->caps |= MMC_CAP_4_BIT_DATA;
1043
1044 mmc->ops = &mmc_omap_ops;
1045 mmc->f_min = 400000;
1046 mmc->f_max = 24000000;
1047 mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34;
1048
1049 /* Use scatterlist DMA to reduce per-transfer costs.
1050 * NOTE max_seg_size assumption that small blocks aren't
1051 * normally used (except e.g. for reading SD registers).
1052 */
1053 mmc->max_phys_segs = 32;
1054 mmc->max_hw_segs = 32;
1055 mmc->max_sectors = 256; /* NBLK max 11-bits, OMAP also limited by DMA */
1056 mmc->max_seg_size = mmc->max_sectors * 512;
1057
1058 if (host->power_pin >= 0) {
1059 if ((ret = omap_request_gpio(host->power_pin)) != 0) {
1060 dev_err(mmc_dev(host->mmc), "Unable to get GPIO
1061 pin for MMC power\n");
1062 goto out;
1063 }
1064 omap_set_gpio_direction(host->power_pin, 0);
1065 }
1066
1067 ret = request_irq(host->irq, mmc_omap_irq, 0, DRIVER_NAME, host);
1068 if (ret)
1069 goto out;
1070
1071 host->dev = &pdev->dev;
1072 platform_set_drvdata(pdev, host);
1073
1074 mmc_add_host(mmc);
1075
1076 if (host->switch_pin >= 0) {
1077 INIT_WORK(&host->switch_work, mmc_omap_switch_handler, host);
1078 init_timer(&host->switch_timer);
1079 host->switch_timer.function = mmc_omap_switch_timer;
1080 host->switch_timer.data = (unsigned long) host;
1081 if (omap_request_gpio(host->switch_pin) != 0) {
1082 dev_warn(mmc_dev(host->mmc), "Unable to get GPIO pin for MMC cover switch\n");
1083 host->switch_pin = -1;
1084 goto no_switch;
1085 }
1086
1087 omap_set_gpio_direction(host->switch_pin, 1);
1088 ret = request_irq(OMAP_GPIO_IRQ(host->switch_pin),
1089 mmc_omap_switch_irq, SA_TRIGGER_RISING, DRIVER_NAME, host);
1090 if (ret) {
1091 dev_warn(mmc_dev(host->mmc), "Unable to get IRQ for MMC cover switch\n");
1092 omap_free_gpio(host->switch_pin);
1093 host->switch_pin = -1;
1094 goto no_switch;
1095 }
1096 ret = device_create_file(&pdev->dev, &dev_attr_cover_switch);
1097 if (ret == 0) {
1098 ret = device_create_file(&pdev->dev, &dev_attr_enable_poll);
1099 if (ret != 0)
1100 device_remove_file(&pdev->dev, &dev_attr_cover_switch);
1101 }
1102 if (ret) {
1103 dev_wan(mmc_dev(host->mmc), "Unable to create sysfs attributes\n");
1104 free_irq(OMAP_GPIO_IRQ(host->switch_pin), host);
1105 omap_free_gpio(host->switch_pin);
1106 host->switch_pin = -1;
1107 goto no_switch;
1108 }
1109 if (mmc_omap_enable_poll && mmc_omap_cover_is_open(host))
1110 schedule_work(&host->switch_work);
1111 }
1112
1113no_switch:
1114 return 0;
1115
1116out:
1117 /* FIXME: Free other resources too. */
1118 if (host) {
1119 if (host->iclk && !IS_ERR(host->iclk))
1120 clk_put(host->iclk);
1121 if (host->fclk && !IS_ERR(host->fclk))
1122 clk_put(host->fclk);
1123 mmc_free_host(host->mmc);
1124 }
1125 return ret;
1126}
1127
1128static int mmc_omap_remove(struct platform_device *pdev)
1129{
1130 struct mmc_omap_host *host = platform_get_drvdata(pdev);
1131
1132 platform_set_drvdata(pdev, NULL);
1133
1134 if (host) {
1135 mmc_remove_host(host->mmc);
1136 free_irq(host->irq, host);
1137
1138 if (host->power_pin >= 0)
1139 omap_free_gpio(host->power_pin);
1140 if (host->switch_pin >= 0) {
1141 device_remove_file(&pdev->dev, &dev_attr_enable_poll);
1142 device_remove_file(&pdev->dev, &dev_attr_cover_switch);
1143 free_irq(OMAP_GPIO_IRQ(host->switch_pin), host);
1144 omap_free_gpio(host->switch_pin);
1145 host->switch_pin = -1;
1146 del_timer_sync(&host->switch_timer);
1147 flush_scheduled_work();
1148 }
1149 if (host->iclk && !IS_ERR(host->iclk))
1150 clk_put(host->iclk);
1151 if (host->fclk && !IS_ERR(host->fclk))
1152 clk_put(host->fclk);
1153 mmc_free_host(host->mmc);
1154 }
1155
1156 release_mem_region(pdev->resource[0].start,
1157 pdev->resource[0].end - pdev->resource[0].start + 1);
1158
1159 return 0;
1160}
1161
1162#ifdef CONFIG_PM
1163static int mmc_omap_suspend(struct platform_device *pdev, pm_message_t mesg)
1164{
1165 int ret = 0;
1166 struct mmc_omap_host *host = platform_get_drvdata(pdev);
1167
1168 if (host && host->suspended)
1169 return 0;
1170
1171 if (host) {
1172 ret = mmc_suspend_host(host->mmc, mesg);
1173 if (ret == 0)
1174 host->suspended = 1;
1175 }
1176 return ret;
1177}
1178
1179static int mmc_omap_resume(struct platform_device *pdev)
1180{
1181 int ret = 0;
1182 struct mmc_omap_host *host = platform_get_drvdata(pdev);
1183
1184 if (host && !host->suspended)
1185 return 0;
1186
1187 if (host) {
1188 ret = mmc_resume_host(host->mmc);
1189 if (ret == 0)
1190 host->suspended = 0;
1191 }
1192
1193 return ret;
1194}
1195#else
1196#define mmc_omap_suspend NULL
1197#define mmc_omap_resume NULL
1198#endif
1199
1200static struct platform_driver mmc_omap_driver = {
1201 .probe = mmc_omap_probe,
1202 .remove = mmc_omap_remove,
1203 .suspend = mmc_omap_suspend,
1204 .resume = mmc_omap_resume,
1205 .driver = {
1206 .name = DRIVER_NAME,
1207 },
1208};
1209
1210static int __init mmc_omap_init(void)
1211{
1212 return platform_driver_register(&mmc_omap_driver);
1213}
1214
1215static void __exit mmc_omap_exit(void)
1216{
1217 platform_driver_unregister(&mmc_omap_driver);
1218}
1219
1220module_init(mmc_omap_init);
1221module_exit(mmc_omap_exit);
1222
1223MODULE_DESCRIPTION("OMAP Multimedia Card driver");
1224MODULE_LICENSE("GPL");
1225MODULE_ALIAS(DRIVER_NAME);
1226MODULE_AUTHOR("Juha Yrjölä");
diff --git a/drivers/mmc/omap.h b/drivers/mmc/omap.h
new file mode 100644
index 000000000000..c954d355a5e3
--- /dev/null
+++ b/drivers/mmc/omap.h
@@ -0,0 +1,55 @@
1#ifndef DRIVERS_MEDIA_MMC_OMAP_H
2#define DRIVERS_MEDIA_MMC_OMAP_H
3
4#define OMAP_MMC_REG_CMD 0x00
5#define OMAP_MMC_REG_ARGL 0x04
6#define OMAP_MMC_REG_ARGH 0x08
7#define OMAP_MMC_REG_CON 0x0c
8#define OMAP_MMC_REG_STAT 0x10
9#define OMAP_MMC_REG_IE 0x14
10#define OMAP_MMC_REG_CTO 0x18
11#define OMAP_MMC_REG_DTO 0x1c
12#define OMAP_MMC_REG_DATA 0x20
13#define OMAP_MMC_REG_BLEN 0x24
14#define OMAP_MMC_REG_NBLK 0x28
15#define OMAP_MMC_REG_BUF 0x2c
16#define OMAP_MMC_REG_SDIO 0x34
17#define OMAP_MMC_REG_REV 0x3c
18#define OMAP_MMC_REG_RSP0 0x40
19#define OMAP_MMC_REG_RSP1 0x44
20#define OMAP_MMC_REG_RSP2 0x48
21#define OMAP_MMC_REG_RSP3 0x4c
22#define OMAP_MMC_REG_RSP4 0x50
23#define OMAP_MMC_REG_RSP5 0x54
24#define OMAP_MMC_REG_RSP6 0x58
25#define OMAP_MMC_REG_RSP7 0x5c
26#define OMAP_MMC_REG_IOSR 0x60
27#define OMAP_MMC_REG_SYSC 0x64
28#define OMAP_MMC_REG_SYSS 0x68
29
30#define OMAP_MMC_STAT_CARD_ERR (1 << 14)
31#define OMAP_MMC_STAT_CARD_IRQ (1 << 13)
32#define OMAP_MMC_STAT_OCR_BUSY (1 << 12)
33#define OMAP_MMC_STAT_A_EMPTY (1 << 11)
34#define OMAP_MMC_STAT_A_FULL (1 << 10)
35#define OMAP_MMC_STAT_CMD_CRC (1 << 8)
36#define OMAP_MMC_STAT_CMD_TOUT (1 << 7)
37#define OMAP_MMC_STAT_DATA_CRC (1 << 6)
38#define OMAP_MMC_STAT_DATA_TOUT (1 << 5)
39#define OMAP_MMC_STAT_END_BUSY (1 << 4)
40#define OMAP_MMC_STAT_END_OF_DATA (1 << 3)
41#define OMAP_MMC_STAT_CARD_BUSY (1 << 2)
42#define OMAP_MMC_STAT_END_OF_CMD (1 << 0)
43
44#define OMAP_MMC_READ(base, reg) __raw_readw((base) + OMAP_MMC_REG_##reg)
45#define OMAP_MMC_WRITE(base, reg, val) __raw_writew((val), (base) + OMAP_MMC_REG_##reg)
46
47/*
48 * Command types
49 */
50#define OMAP_MMC_CMDTYPE_BC 0
51#define OMAP_MMC_CMDTYPE_BCR 1
52#define OMAP_MMC_CMDTYPE_AC 2
53#define OMAP_MMC_CMDTYPE_ADTC 3
54
55#endif
diff --git a/drivers/mmc/pxamci.c b/drivers/mmc/pxamci.c
index c32fad1ce51c..eb9a8826e9b5 100644
--- a/drivers/mmc/pxamci.c
+++ b/drivers/mmc/pxamci.c
@@ -37,12 +37,6 @@
37 37
38#include "pxamci.h" 38#include "pxamci.h"
39 39
40#ifdef CONFIG_MMC_DEBUG
41#define DBG(x...) printk(KERN_DEBUG x)
42#else
43#define DBG(x...) do { } while (0)
44#endif
45
46#define DRIVER_NAME "pxa2xx-mci" 40#define DRIVER_NAME "pxa2xx-mci"
47 41
48#define NR_SG 1 42#define NR_SG 1
@@ -206,7 +200,7 @@ static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd,
206 200
207static void pxamci_finish_request(struct pxamci_host *host, struct mmc_request *mrq) 201static void pxamci_finish_request(struct pxamci_host *host, struct mmc_request *mrq)
208{ 202{
209 DBG("PXAMCI: request done\n"); 203 pr_debug("PXAMCI: request done\n");
210 host->mrq = NULL; 204 host->mrq = NULL;
211 host->cmd = NULL; 205 host->cmd = NULL;
212 host->data = NULL; 206 host->data = NULL;
@@ -252,7 +246,7 @@ static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
252 if ((cmd->resp[0] & 0x80000000) == 0) 246 if ((cmd->resp[0] & 0x80000000) == 0)
253 cmd->error = MMC_ERR_BADCRC; 247 cmd->error = MMC_ERR_BADCRC;
254 } else { 248 } else {
255 DBG("ignoring CRC from command %d - *risky*\n",cmd->opcode); 249 pr_debug("ignoring CRC from command %d - *risky*\n",cmd->opcode);
256 } 250 }
257#else 251#else
258 cmd->error = MMC_ERR_BADCRC; 252 cmd->error = MMC_ERR_BADCRC;
@@ -317,12 +311,12 @@ static irqreturn_t pxamci_irq(int irq, void *devid, struct pt_regs *regs)
317 311
318 ireg = readl(host->base + MMC_I_REG); 312 ireg = readl(host->base + MMC_I_REG);
319 313
320 DBG("PXAMCI: irq %08x\n", ireg); 314 pr_debug("PXAMCI: irq %08x\n", ireg);
321 315
322 if (ireg) { 316 if (ireg) {
323 unsigned stat = readl(host->base + MMC_STAT); 317 unsigned stat = readl(host->base + MMC_STAT);
324 318
325 DBG("PXAMCI: stat %08x\n", stat); 319 pr_debug("PXAMCI: stat %08x\n", stat);
326 320
327 if (ireg & END_CMD_RES) 321 if (ireg & END_CMD_RES)
328 handled |= pxamci_cmd_done(host, stat); 322 handled |= pxamci_cmd_done(host, stat);
@@ -376,9 +370,9 @@ static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
376{ 370{
377 struct pxamci_host *host = mmc_priv(mmc); 371 struct pxamci_host *host = mmc_priv(mmc);
378 372
379 DBG("pxamci_set_ios: clock %u power %u vdd %u.%02u\n", 373 pr_debug("pxamci_set_ios: clock %u power %u vdd %u.%02u\n",
380 ios->clock, ios->power_mode, ios->vdd / 100, 374 ios->clock, ios->power_mode, ios->vdd / 100,
381 ios->vdd % 100); 375 ios->vdd % 100);
382 376
383 if (ios->clock) { 377 if (ios->clock) {
384 unsigned int clk = CLOCKRATE / ios->clock; 378 unsigned int clk = CLOCKRATE / ios->clock;
@@ -405,8 +399,8 @@ static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
405 host->cmdat |= CMDAT_INIT; 399 host->cmdat |= CMDAT_INIT;
406 } 400 }
407 401
408 DBG("pxamci_set_ios: clkrt = %x cmdat = %x\n", 402 pr_debug("pxamci_set_ios: clkrt = %x cmdat = %x\n",
409 host->clkrt, host->cmdat); 403 host->clkrt, host->cmdat);
410} 404}
411 405
412static struct mmc_host_ops pxamci_ops = { 406static struct mmc_host_ops pxamci_ops = {
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 8b811d94371c..bdbfca050029 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -31,12 +31,8 @@
31 31
32#define BUGMAIL "<sdhci-devel@list.drzeus.cx>" 32#define BUGMAIL "<sdhci-devel@list.drzeus.cx>"
33 33
34#ifdef CONFIG_MMC_DEBUG
35#define DBG(f, x...) \ 34#define DBG(f, x...) \
36 printk(KERN_DEBUG DRIVER_NAME " [%s()]: " f, __func__,## x) 35 pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
37#else
38#define DBG(f, x...) do { } while (0)
39#endif
40 36
41static const struct pci_device_id pci_ids[] __devinitdata = { 37static const struct pci_device_id pci_ids[] __devinitdata = {
42 /* handle any SD host controller */ 38 /* handle any SD host controller */
diff --git a/drivers/mmc/wbsd.c b/drivers/mmc/wbsd.c
index 3be397d436fa..511f7b0b31d2 100644
--- a/drivers/mmc/wbsd.c
+++ b/drivers/mmc/wbsd.c
@@ -44,15 +44,10 @@
44#define DRIVER_NAME "wbsd" 44#define DRIVER_NAME "wbsd"
45#define DRIVER_VERSION "1.5" 45#define DRIVER_VERSION "1.5"
46 46
47#ifdef CONFIG_MMC_DEBUG
48#define DBG(x...) \ 47#define DBG(x...) \
49 printk(KERN_DEBUG DRIVER_NAME ": " x) 48 pr_debug(DRIVER_NAME ": " x)
50#define DBGF(f, x...) \ 49#define DBGF(f, x...) \
51 printk(KERN_DEBUG DRIVER_NAME " [%s()]: " f, __func__ , ##x) 50 pr_debug(DRIVER_NAME " [%s()]: " f, __func__ , ##x)
52#else
53#define DBG(x...) do { } while (0)
54#define DBGF(x...) do { } while (0)
55#endif
56 51
57/* 52/*
58 * Device resources 53 * Device resources
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index fe0d8b8e91c8..7d22dc0478d3 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -63,6 +63,33 @@ config SERIAL_8250_CONSOLE
63 63
64 If unsure, say N. 64 If unsure, say N.
65 65
66config SERIAL_8250_GSC
67 tristate
68 depends on SERIAL_8250 && GSC
69 default SERIAL_8250
70
71config SERIAL_8250_PCI
72 tristate "8250/16550 PCI device support" if EMBEDDED
73 depends on SERIAL_8250 && PCI
74 default SERIAL_8250
75 help
76 This builds standard PCI serial support. You may be able to
77 disable this feature if you only need legacy serial support.
78 Saves about 9K.
79
80config SERIAL_8250_PNP
81 tristate "8250/16550 PNP device support" if EMBEDDED
82 depends on SERIAL_8250 && PNP
83 default SERIAL_8250
84 help
85 This builds standard PNP serial support. You may be able to
86 disable this feature if you only need legacy serial support.
87
88config SERIAL_8250_HP300
89 tristate
90 depends on SERIAL_8250 && HP300
91 default SERIAL_8250
92
66config SERIAL_8250_CS 93config SERIAL_8250_CS
67 tristate "8250/16550 PCMCIA device support" 94 tristate "8250/16550 PCMCIA device support"
68 depends on PCMCIA && SERIAL_8250 95 depends on PCMCIA && SERIAL_8250
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index d2b4c214876b..0a71bf68a03f 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -4,15 +4,13 @@
4# $Id: Makefile,v 1.8 2002/07/21 21:32:30 rmk Exp $ 4# $Id: Makefile,v 1.8 2002/07/21 21:32:30 rmk Exp $
5# 5#
6 6
7serial-8250-y :=
8serial-8250-$(CONFIG_PNP) += 8250_pnp.o
9serial-8250-$(CONFIG_GSC) += 8250_gsc.o
10serial-8250-$(CONFIG_PCI) += 8250_pci.o
11serial-8250-$(CONFIG_HP300) += 8250_hp300.o
12
13obj-$(CONFIG_SERIAL_CORE) += serial_core.o 7obj-$(CONFIG_SERIAL_CORE) += serial_core.o
14obj-$(CONFIG_SERIAL_21285) += 21285.o 8obj-$(CONFIG_SERIAL_21285) += 21285.o
15obj-$(CONFIG_SERIAL_8250) += 8250.o $(serial-8250-y) 9obj-$(CONFIG_SERIAL_8250) += 8250.o
10obj-$(CONFIG_SERIAL_8250_PNP) += 8250_pnp.o
11obj-$(CONFIG_SERIAL_8250_GSC) += 8250_gsc.o
12obj-$(CONFIG_SERIAL_8250_PCI) += 8250_pci.o
13obj-$(CONFIG_SERIAL_8250_HP300) += 8250_hp300.o
16obj-$(CONFIG_SERIAL_8250_CS) += serial_cs.o 14obj-$(CONFIG_SERIAL_8250_CS) += serial_cs.o
17obj-$(CONFIG_SERIAL_8250_ACORN) += 8250_acorn.o 15obj-$(CONFIG_SERIAL_8250_ACORN) += 8250_acorn.o
18obj-$(CONFIG_SERIAL_8250_CONSOLE) += 8250_early.o 16obj-$(CONFIG_SERIAL_8250_CONSOLE) += 8250_early.o
diff --git a/fs/cifs/CHANGES b/fs/cifs/CHANGES
index cb68efba35db..8a2de038882e 100644
--- a/fs/cifs/CHANGES
+++ b/fs/cifs/CHANGES
@@ -1,3 +1,21 @@
1Version 1.42
2------------
3Fix slow oplock break when mounted to different servers at the same time and
4the tids match and we try to find matching fid on wrong server.
5
6Version 1.41
7------------
8Fix NTLMv2 security (can be enabled in /proc/fs/cifs) so customers can
9configure stronger authentication. Fix sfu symlinks so they can
10be followed (not just recognized). Fix wraparound of bcc on
11read responses when buffer size over 64K and also fix wrap of
12max smb buffer size when CIFSMaxBufSize over 64K. Fix oops in
13cifs_user_read and cifs_readpages (when EAGAIN on send of smb
14on socket is returned over and over). Add POSIX (advisory) byte range
15locking support (requires server with newest CIFS UNIX Extensions
16to the protocol implemented). Slow down negprot slightly in port 139
17RFC1001 case to give session_init time on buggy servers.
18
1Version 1.40 19Version 1.40
2------------ 20------------
3Use fsuid (fsgid) more consistently instead of uid (gid). Improve performance 21Use fsuid (fsgid) more consistently instead of uid (gid). Improve performance
diff --git a/fs/cifs/Makefile b/fs/cifs/Makefile
index 7384947a0f93..58c77254a23b 100644
--- a/fs/cifs/Makefile
+++ b/fs/cifs/Makefile
@@ -3,4 +3,4 @@
3# 3#
4obj-$(CONFIG_CIFS) += cifs.o 4obj-$(CONFIG_CIFS) += cifs.o
5 5
6cifs-objs := cifsfs.o cifssmb.o cifs_debug.o connect.o dir.o file.o inode.o link.o misc.o netmisc.o smbdes.o smbencrypt.o transport.o asn1.o md4.o md5.o cifs_unicode.o nterr.o xattr.o cifsencrypt.o fcntl.o readdir.o ioctl.o 6cifs-objs := cifsfs.o cifssmb.o cifs_debug.o connect.o dir.o file.o inode.o link.o misc.o netmisc.o smbdes.o smbencrypt.o transport.o asn1.o md4.o md5.o cifs_unicode.o nterr.o xattr.o cifsencrypt.o fcntl.o readdir.o ioctl.o ntlmssp.o
diff --git a/fs/cifs/README b/fs/cifs/README
index b0070d1b149d..b2b4d0803761 100644
--- a/fs/cifs/README
+++ b/fs/cifs/README
@@ -422,6 +422,13 @@ A partial list of the supported mount options follows:
422 nomapchars Do not translate any of these seven characters (default). 422 nomapchars Do not translate any of these seven characters (default).
423 nocase Request case insensitive path name matching (case 423 nocase Request case insensitive path name matching (case
424 sensitive is the default if the server suports it). 424 sensitive is the default if the server suports it).
425 posixpaths If CIFS Unix extensions are supported, attempt to
426 negotiate posix path name support which allows certain
427 characters forbidden in typical CIFS filenames, without
428 requiring remapping. (default)
429 noposixpaths If CIFS Unix extensions are supported, do not request
430 posix path name support (this may cause servers to
431 reject creatingfile with certain reserved characters).
425 nobrl Do not send byte range lock requests to the server. 432 nobrl Do not send byte range lock requests to the server.
426 This is necessary for certain applications that break 433 This is necessary for certain applications that break
427 with cifs style mandatory byte range locks (and most 434 with cifs style mandatory byte range locks (and most
diff --git a/fs/cifs/cifsencrypt.c b/fs/cifs/cifsencrypt.c
index a2c24858d40f..e7d63737e651 100644
--- a/fs/cifs/cifsencrypt.c
+++ b/fs/cifs/cifsencrypt.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * fs/cifs/cifsencrypt.c 2 * fs/cifs/cifsencrypt.c
3 * 3 *
4 * Copyright (C) International Business Machines Corp., 2005 4 * Copyright (C) International Business Machines Corp., 2005,2006
5 * Author(s): Steve French (sfrench@us.ibm.com) 5 * Author(s): Steve French (sfrench@us.ibm.com)
6 * 6 *
7 * This library is free software; you can redistribute it and/or modify 7 * This library is free software; you can redistribute it and/or modify
@@ -36,7 +36,8 @@
36extern void mdfour(unsigned char *out, unsigned char *in, int n); 36extern void mdfour(unsigned char *out, unsigned char *in, int n);
37extern void E_md4hash(const unsigned char *passwd, unsigned char *p16); 37extern void E_md4hash(const unsigned char *passwd, unsigned char *p16);
38 38
39static int cifs_calculate_signature(const struct smb_hdr * cifs_pdu, const char * key, char * signature) 39static int cifs_calculate_signature(const struct smb_hdr * cifs_pdu,
40 const char * key, char * signature)
40{ 41{
41 struct MD5Context context; 42 struct MD5Context context;
42 43
@@ -56,9 +57,6 @@ int cifs_sign_smb(struct smb_hdr * cifs_pdu, struct TCP_Server_Info * server,
56 int rc = 0; 57 int rc = 0;
57 char smb_signature[20]; 58 char smb_signature[20];
58 59
59 /* BB remember to initialize sequence number elsewhere and initialize mac_signing key elsewhere BB */
60 /* BB remember to add code to save expected sequence number in midQ entry BB */
61
62 if((cifs_pdu == NULL) || (server == NULL)) 60 if((cifs_pdu == NULL) || (server == NULL))
63 return -EINVAL; 61 return -EINVAL;
64 62
@@ -85,20 +83,33 @@ int cifs_sign_smb(struct smb_hdr * cifs_pdu, struct TCP_Server_Info * server,
85static int cifs_calc_signature2(const struct kvec * iov, int n_vec, 83static int cifs_calc_signature2(const struct kvec * iov, int n_vec,
86 const char * key, char * signature) 84 const char * key, char * signature)
87{ 85{
88 struct MD5Context context; 86 struct MD5Context context;
89 87 int i;
90 if((iov == NULL) || (signature == NULL))
91 return -EINVAL;
92 88
93 MD5Init(&context); 89 if((iov == NULL) || (signature == NULL))
94 MD5Update(&context,key,CIFS_SESSION_KEY_SIZE+16); 90 return -EINVAL;
95 91
96/* MD5Update(&context,cifs_pdu->Protocol,cifs_pdu->smb_buf_length); */ /* BB FIXME BB */ 92 MD5Init(&context);
93 MD5Update(&context,key,CIFS_SESSION_KEY_SIZE+16);
94 for(i=0;i<n_vec;i++) {
95 if(iov[i].iov_base == NULL) {
96 cERROR(1,("null iovec entry"));
97 return -EIO;
98 } else if(iov[i].iov_len == 0)
99 break; /* bail out if we are sent nothing to sign */
100 /* The first entry includes a length field (which does not get
101 signed that occupies the first 4 bytes before the header */
102 if(i==0) {
103 if (iov[0].iov_len <= 8 ) /* cmd field at offset 9 */
104 break; /* nothing to sign or corrupt header */
105 MD5Update(&context,iov[0].iov_base+4, iov[0].iov_len-4);
106 } else
107 MD5Update(&context,iov[i].iov_base, iov[i].iov_len);
108 }
97 109
98 MD5Final(signature,&context); 110 MD5Final(signature,&context);
99 111
100 return -EOPNOTSUPP; 112 return 0;
101/* return 0; */
102} 113}
103 114
104 115
@@ -259,4 +270,5 @@ void CalcNTLMv2_response(const struct cifsSesInfo * ses,char * v2_session_respon
259/* hmac_md5_update(v2_session_response+16)client thing,8,&context); */ /* BB fix */ 270/* hmac_md5_update(v2_session_response+16)client thing,8,&context); */ /* BB fix */
260 271
261 hmac_md5_final(v2_session_response,&context); 272 hmac_md5_final(v2_session_response,&context);
273 cifs_dump_mem("v2_sess_rsp: ", v2_session_response, 32); /* BB removeme BB */
262} 274}
diff --git a/fs/cifs/cifsfs.c b/fs/cifs/cifsfs.c
index 4bbc544857bc..d4b713e5affb 100644
--- a/fs/cifs/cifsfs.c
+++ b/fs/cifs/cifsfs.c
@@ -93,13 +93,10 @@ cifs_read_super(struct super_block *sb, void *data,
93 int rc = 0; 93 int rc = 0;
94 94
95 sb->s_flags |= MS_NODIRATIME; /* and probably even noatime */ 95 sb->s_flags |= MS_NODIRATIME; /* and probably even noatime */
96 sb->s_fs_info = kmalloc(sizeof(struct cifs_sb_info),GFP_KERNEL); 96 sb->s_fs_info = kzalloc(sizeof(struct cifs_sb_info),GFP_KERNEL);
97 cifs_sb = CIFS_SB(sb); 97 cifs_sb = CIFS_SB(sb);
98 if(cifs_sb == NULL) 98 if(cifs_sb == NULL)
99 return -ENOMEM; 99 return -ENOMEM;
100 else
101 memset(cifs_sb,0,sizeof(struct cifs_sb_info));
102
103 100
104 rc = cifs_mount(sb, cifs_sb, data, devname); 101 rc = cifs_mount(sb, cifs_sb, data, devname);
105 102
diff --git a/fs/cifs/cifsfs.h b/fs/cifs/cifsfs.h
index 74f405ae4da3..4e829dc672a6 100644
--- a/fs/cifs/cifsfs.h
+++ b/fs/cifs/cifsfs.h
@@ -99,5 +99,5 @@ extern ssize_t cifs_getxattr(struct dentry *, const char *, void *, size_t);
99extern ssize_t cifs_listxattr(struct dentry *, char *, size_t); 99extern ssize_t cifs_listxattr(struct dentry *, char *, size_t);
100extern int cifs_ioctl (struct inode * inode, struct file * filep, 100extern int cifs_ioctl (struct inode * inode, struct file * filep,
101 unsigned int command, unsigned long arg); 101 unsigned int command, unsigned long arg);
102#define CIFS_VERSION "1.40" 102#define CIFS_VERSION "1.42"
103#endif /* _CIFSFS_H */ 103#endif /* _CIFSFS_H */
diff --git a/fs/cifs/cifsglob.h b/fs/cifs/cifsglob.h
index 7bed27601ce5..006eb33bff5f 100644
--- a/fs/cifs/cifsglob.h
+++ b/fs/cifs/cifsglob.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * fs/cifs/cifsglob.h 2 * fs/cifs/cifsglob.h
3 * 3 *
4 * Copyright (C) International Business Machines Corp., 2002,2005 4 * Copyright (C) International Business Machines Corp., 2002,2006
5 * Author(s): Steve French (sfrench@us.ibm.com) 5 * Author(s): Steve French (sfrench@us.ibm.com)
6 * 6 *
7 * This library is free software; you can redistribute it and/or modify 7 * This library is free software; you can redistribute it and/or modify
@@ -430,6 +430,15 @@ struct dir_notify_req {
430#define CIFS_LARGE_BUFFER 2 430#define CIFS_LARGE_BUFFER 2
431#define CIFS_IOVEC 4 /* array of response buffers */ 431#define CIFS_IOVEC 4 /* array of response buffers */
432 432
433/* Type of session setup needed */
434#define CIFS_PLAINTEXT 0
435#define CIFS_LANMAN 1
436#define CIFS_NTLM 2
437#define CIFS_NTLMSSP_NEG 3
438#define CIFS_NTLMSSP_AUTH 4
439#define CIFS_SPNEGO_INIT 5
440#define CIFS_SPNEGO_TARG 6
441
433/* 442/*
434 ***************************************************************** 443 *****************************************************************
435 * All constants go here 444 * All constants go here
diff --git a/fs/cifs/cifspdu.h b/fs/cifs/cifspdu.h
index cc2471094ca5..b2233ac05bd2 100644
--- a/fs/cifs/cifspdu.h
+++ b/fs/cifs/cifspdu.h
@@ -859,7 +859,10 @@ typedef struct smb_com_lock_req {
859 LOCKING_ANDX_RANGE Locks[1]; 859 LOCKING_ANDX_RANGE Locks[1];
860} __attribute__((packed)) LOCK_REQ; 860} __attribute__((packed)) LOCK_REQ;
861 861
862 862/* lock type */
863#define CIFS_RDLCK 0
864#define CIFS_WRLCK 1
865#define CIFS_UNLCK 2
863typedef struct cifs_posix_lock { 866typedef struct cifs_posix_lock {
864 __le16 lock_type; /* 0 = Read, 1 = Write, 2 = Unlock */ 867 __le16 lock_type; /* 0 = Read, 1 = Write, 2 = Unlock */
865 __le16 lock_flags; /* 1 = Wait (only valid for setlock) */ 868 __le16 lock_flags; /* 1 = Wait (only valid for setlock) */
@@ -1786,7 +1789,13 @@ typedef struct {
1786#define CIFS_UNIX_POSIX_ACL_CAP 0x00000002 /* support getfacl/setfacl */ 1789#define CIFS_UNIX_POSIX_ACL_CAP 0x00000002 /* support getfacl/setfacl */
1787#define CIFS_UNIX_XATTR_CAP 0x00000004 /* support new namespace */ 1790#define CIFS_UNIX_XATTR_CAP 0x00000004 /* support new namespace */
1788#define CIFS_UNIX_EXTATTR_CAP 0x00000008 /* support chattr/chflag */ 1791#define CIFS_UNIX_EXTATTR_CAP 0x00000008 /* support chattr/chflag */
1789#define CIFS_UNIX_POSIX_PATHNAMES_CAP 0x00000010 /* Use POSIX pathnames on the wire. */ 1792#define CIFS_UNIX_POSIX_PATHNAMES_CAP 0x00000010 /* Allow POSIX path chars */
1793#ifdef CONFIG_CIFS_POSIX
1794#define CIFS_UNIX_CAP_MASK 0x0000001b
1795#else
1796#define CIFS_UNIX_CAP_MASK 0x00000013
1797#endif /* CONFIG_CIFS_POSIX */
1798
1790 1799
1791#define CIFS_POSIX_EXTENSIONS 0x00000010 /* support for new QFSInfo */ 1800#define CIFS_POSIX_EXTENSIONS 0x00000010 /* support for new QFSInfo */
1792 1801
diff --git a/fs/cifs/cifsproto.h b/fs/cifs/cifsproto.h
index 7b25463d3c14..2879ba343ca7 100644
--- a/fs/cifs/cifsproto.h
+++ b/fs/cifs/cifsproto.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * fs/cifs/cifsproto.h 2 * fs/cifs/cifsproto.h
3 * 3 *
4 * Copyright (c) International Business Machines Corp., 2002,2005 4 * Copyright (c) International Business Machines Corp., 2002,2006
5 * Author(s): Steve French (sfrench@us.ibm.com) 5 * Author(s): Steve French (sfrench@us.ibm.com)
6 * 6 *
7 * This library is free software; you can redistribute it and/or modify 7 * This library is free software; you can redistribute it and/or modify
@@ -64,6 +64,14 @@ extern int map_smb_to_linux_error(struct smb_hdr *smb);
64extern void header_assemble(struct smb_hdr *, char /* command */ , 64extern void header_assemble(struct smb_hdr *, char /* command */ ,
65 const struct cifsTconInfo *, int /* length of 65 const struct cifsTconInfo *, int /* length of
66 fixed section (word count) in two byte units */); 66 fixed section (word count) in two byte units */);
67#ifdef CONFIG_CIFS_EXPERIMENTAL
68extern int small_smb_init_no_tc(const int smb_cmd, const int wct,
69 struct cifsSesInfo *ses,
70 void ** request_buf);
71extern int CIFS_SessSetup(unsigned int xid, struct cifsSesInfo *ses,
72 const int stage, int * pNTLMv2_flg,
73 const struct nls_table *nls_cp);
74#endif
67extern __u16 GetNextMid(struct TCP_Server_Info *server); 75extern __u16 GetNextMid(struct TCP_Server_Info *server);
68extern struct oplock_q_entry * AllocOplockQEntry(struct inode *, u16, 76extern struct oplock_q_entry * AllocOplockQEntry(struct inode *, u16,
69 struct cifsTconInfo *); 77 struct cifsTconInfo *);
@@ -257,7 +265,10 @@ extern int CIFSSMBLock(const int xid, struct cifsTconInfo *tcon,
257 const __u64 offset, const __u32 numUnlock, 265 const __u64 offset, const __u32 numUnlock,
258 const __u32 numLock, const __u8 lockType, 266 const __u32 numLock, const __u8 lockType,
259 const int waitFlag); 267 const int waitFlag);
260 268extern int CIFSSMBPosixLock(const int xid, struct cifsTconInfo *tcon,
269 const __u16 smb_file_id, const int get_flag,
270 const __u64 len, const __u64 offset,
271 const __u16 lock_type, const int waitFlag);
261extern int CIFSSMBTDis(const int xid, struct cifsTconInfo *tcon); 272extern int CIFSSMBTDis(const int xid, struct cifsTconInfo *tcon);
262extern int CIFSSMBLogoff(const int xid, struct cifsSesInfo *ses); 273extern int CIFSSMBLogoff(const int xid, struct cifsSesInfo *ses);
263 274
diff --git a/fs/cifs/cifssmb.c b/fs/cifs/cifssmb.c
index a243fe2792d5..d705500aa283 100644
--- a/fs/cifs/cifssmb.c
+++ b/fs/cifs/cifssmb.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * fs/cifs/cifssmb.c 2 * fs/cifs/cifssmb.c
3 * 3 *
4 * Copyright (C) International Business Machines Corp., 2002,2005 4 * Copyright (C) International Business Machines Corp., 2002,2006
5 * Author(s): Steve French (sfrench@us.ibm.com) 5 * Author(s): Steve French (sfrench@us.ibm.com)
6 * 6 *
7 * Contains the routines for constructing the SMB PDUs themselves 7 * Contains the routines for constructing the SMB PDUs themselves
@@ -186,7 +186,35 @@ small_smb_init(int smb_command, int wct, struct cifsTconInfo *tcon,
186 cifs_stats_inc(&tcon->num_smbs_sent); 186 cifs_stats_inc(&tcon->num_smbs_sent);
187 187
188 return rc; 188 return rc;
189} 189}
190
191#ifdef CONFIG_CIFS_EXPERIMENTAL
192int
193small_smb_init_no_tc(const int smb_command, const int wct,
194 struct cifsSesInfo *ses, void **request_buf)
195{
196 int rc;
197 struct smb_hdr * buffer;
198
199 rc = small_smb_init(smb_command, wct, NULL, request_buf);
200 if(rc)
201 return rc;
202
203 buffer = (struct smb_hdr *)*request_buf;
204 buffer->Mid = GetNextMid(ses->server);
205 if (ses->capabilities & CAP_UNICODE)
206 buffer->Flags2 |= SMBFLG2_UNICODE;
207 if (ses->capabilities & CAP_STATUS32)
208 buffer->Flags2 |= SMBFLG2_ERR_STATUS;
209
210 /* uid, tid can stay at zero as set in header assemble */
211
212 /* BB add support for turning on the signing when
213 this function is used after 1st of session setup requests */
214
215 return rc;
216}
217#endif /* CONFIG_CIFS_EXPERIMENTAL */
190 218
191/* If the return code is zero, this function must fill in request_buf pointer */ 219/* If the return code is zero, this function must fill in request_buf pointer */
192static int 220static int
@@ -1042,7 +1070,7 @@ CIFSSMBRead(const int xid, struct cifsTconInfo *tcon,
1042 } 1070 }
1043 } 1071 }
1044 1072
1045 cifs_small_buf_release(pSMB); 1073/* cifs_small_buf_release(pSMB); */ /* Freed earlier now in SendReceive2 */
1046 if(*buf) { 1074 if(*buf) {
1047 if(resp_buf_type == CIFS_SMALL_BUFFER) 1075 if(resp_buf_type == CIFS_SMALL_BUFFER)
1048 cifs_small_buf_release(iov[0].iov_base); 1076 cifs_small_buf_release(iov[0].iov_base);
@@ -1246,7 +1274,7 @@ CIFSSMBWrite2(const int xid, struct cifsTconInfo *tcon,
1246 *nbytes += le16_to_cpu(pSMBr->Count); 1274 *nbytes += le16_to_cpu(pSMBr->Count);
1247 } 1275 }
1248 1276
1249 cifs_small_buf_release(pSMB); 1277/* cifs_small_buf_release(pSMB); */ /* Freed earlier now in SendReceive2 */
1250 if(resp_buf_type == CIFS_SMALL_BUFFER) 1278 if(resp_buf_type == CIFS_SMALL_BUFFER)
1251 cifs_small_buf_release(iov[0].iov_base); 1279 cifs_small_buf_release(iov[0].iov_base);
1252 else if(resp_buf_type == CIFS_LARGE_BUFFER) 1280 else if(resp_buf_type == CIFS_LARGE_BUFFER)
@@ -1325,6 +1353,85 @@ CIFSSMBLock(const int xid, struct cifsTconInfo *tcon,
1325} 1353}
1326 1354
1327int 1355int
1356CIFSSMBPosixLock(const int xid, struct cifsTconInfo *tcon,
1357 const __u16 smb_file_id, const int get_flag, const __u64 len,
1358 const __u64 lkoffset, const __u16 lock_type, const int waitFlag)
1359{
1360 struct smb_com_transaction2_sfi_req *pSMB = NULL;
1361 struct smb_com_transaction2_sfi_rsp *pSMBr = NULL;
1362 char *data_offset;
1363 struct cifs_posix_lock *parm_data;
1364 int rc = 0;
1365 int bytes_returned = 0;
1366 __u16 params, param_offset, offset, byte_count, count;
1367
1368 cFYI(1, ("Posix Lock"));
1369 rc = small_smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB);
1370
1371 if (rc)
1372 return rc;
1373
1374 pSMBr = (struct smb_com_transaction2_sfi_rsp *)pSMB;
1375
1376 params = 6;
1377 pSMB->MaxSetupCount = 0;
1378 pSMB->Reserved = 0;
1379 pSMB->Flags = 0;
1380 pSMB->Timeout = 0;
1381 pSMB->Reserved2 = 0;
1382 param_offset = offsetof(struct smb_com_transaction2_sfi_req, Fid) - 4;
1383 offset = param_offset + params;
1384
1385 data_offset = (char *) (&pSMB->hdr.Protocol) + offset;
1386
1387 count = sizeof(struct cifs_posix_lock);
1388 pSMB->MaxParameterCount = cpu_to_le16(2);
1389 pSMB->MaxDataCount = cpu_to_le16(1000); /* BB find max SMB PDU from sess */
1390 pSMB->SetupCount = 1;
1391 pSMB->Reserved3 = 0;
1392 if(get_flag)
1393 pSMB->SubCommand = cpu_to_le16(TRANS2_QUERY_FILE_INFORMATION);
1394 else
1395 pSMB->SubCommand = cpu_to_le16(TRANS2_SET_FILE_INFORMATION);
1396 byte_count = 3 /* pad */ + params + count;
1397 pSMB->DataCount = cpu_to_le16(count);
1398 pSMB->ParameterCount = cpu_to_le16(params);
1399 pSMB->TotalDataCount = pSMB->DataCount;
1400 pSMB->TotalParameterCount = pSMB->ParameterCount;
1401 pSMB->ParameterOffset = cpu_to_le16(param_offset);
1402 parm_data = (struct cifs_posix_lock *)
1403 (((char *) &pSMB->hdr.Protocol) + offset);
1404
1405 parm_data->lock_type = cpu_to_le16(lock_type);
1406 if(waitFlag)
1407 parm_data->lock_flags = 1;
1408 parm_data->pid = cpu_to_le32(current->tgid);
1409 parm_data->start = lkoffset;
1410 parm_data->length = len; /* normalize negative numbers */
1411
1412 pSMB->DataOffset = cpu_to_le16(offset);
1413 pSMB->Fid = smb_file_id;
1414 pSMB->InformationLevel = cpu_to_le16(SMB_SET_POSIX_LOCK);
1415 pSMB->Reserved4 = 0;
1416 pSMB->hdr.smb_buf_length += byte_count;
1417 pSMB->ByteCount = cpu_to_le16(byte_count);
1418 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
1419 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
1420 if (rc) {
1421 cFYI(1, ("Send error in Posix Lock = %d", rc));
1422 }
1423
1424 if (pSMB)
1425 cifs_small_buf_release(pSMB);
1426
1427 /* Note: On -EAGAIN error only caller can retry on handle based calls
1428 since file handle passed in no longer valid */
1429
1430 return rc;
1431}
1432
1433
1434int
1328CIFSSMBClose(const int xid, struct cifsTconInfo *tcon, int smb_file_id) 1435CIFSSMBClose(const int xid, struct cifsTconInfo *tcon, int smb_file_id)
1329{ 1436{
1330 int rc = 0; 1437 int rc = 0;
@@ -2578,7 +2685,7 @@ qsec_out:
2578 cifs_small_buf_release(iov[0].iov_base); 2685 cifs_small_buf_release(iov[0].iov_base);
2579 else if(buf_type == CIFS_LARGE_BUFFER) 2686 else if(buf_type == CIFS_LARGE_BUFFER)
2580 cifs_buf_release(iov[0].iov_base); 2687 cifs_buf_release(iov[0].iov_base);
2581 cifs_small_buf_release(pSMB); 2688/* cifs_small_buf_release(pSMB); */ /* Freed earlier now in SendReceive2 */
2582 return rc; 2689 return rc;
2583} 2690}
2584 2691
@@ -2954,7 +3061,8 @@ findFirstRetry:
2954 pSMB->TotalParameterCount = cpu_to_le16(params); 3061 pSMB->TotalParameterCount = cpu_to_le16(params);
2955 pSMB->ParameterCount = pSMB->TotalParameterCount; 3062 pSMB->ParameterCount = pSMB->TotalParameterCount;
2956 pSMB->ParameterOffset = cpu_to_le16( 3063 pSMB->ParameterOffset = cpu_to_le16(
2957 offsetof(struct smb_com_transaction2_ffirst_req, SearchAttributes) - 4); 3064 offsetof(struct smb_com_transaction2_ffirst_req, SearchAttributes)
3065 - 4);
2958 pSMB->DataCount = 0; 3066 pSMB->DataCount = 0;
2959 pSMB->DataOffset = 0; 3067 pSMB->DataOffset = 0;
2960 pSMB->SetupCount = 1; /* one byte, no need to make endian neutral */ 3068 pSMB->SetupCount = 1; /* one byte, no need to make endian neutral */
@@ -2977,12 +3085,12 @@ findFirstRetry:
2977 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 3085 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
2978 cifs_stats_inc(&tcon->num_ffirst); 3086 cifs_stats_inc(&tcon->num_ffirst);
2979 3087
2980 if (rc) {/* BB add logic to retry regular search if Unix search rejected unexpectedly by server */ 3088 if (rc) {/* BB add logic to retry regular search if Unix search
3089 rejected unexpectedly by server */
2981 /* BB Add code to handle unsupported level rc */ 3090 /* BB Add code to handle unsupported level rc */
2982 cFYI(1, ("Error in FindFirst = %d", rc)); 3091 cFYI(1, ("Error in FindFirst = %d", rc));
2983 3092
2984 if (pSMB) 3093 cifs_buf_release(pSMB);
2985 cifs_buf_release(pSMB);
2986 3094
2987 /* BB eventually could optimize out free and realloc of buf */ 3095 /* BB eventually could optimize out free and realloc of buf */
2988 /* for this case */ 3096 /* for this case */
@@ -2998,6 +3106,7 @@ findFirstRetry:
2998 psrch_inf->unicode = FALSE; 3106 psrch_inf->unicode = FALSE;
2999 3107
3000 psrch_inf->ntwrk_buf_start = (char *)pSMBr; 3108 psrch_inf->ntwrk_buf_start = (char *)pSMBr;
3109 psrch_inf->smallBuf = 0;
3001 psrch_inf->srch_entries_start = 3110 psrch_inf->srch_entries_start =
3002 (char *) &pSMBr->hdr.Protocol + 3111 (char *) &pSMBr->hdr.Protocol +
3003 le16_to_cpu(pSMBr->t2.DataOffset); 3112 le16_to_cpu(pSMBr->t2.DataOffset);
@@ -3118,9 +3227,14 @@ int CIFSFindNext(const int xid, struct cifsTconInfo *tcon,
3118 parms = (T2_FNEXT_RSP_PARMS *)response_data; 3227 parms = (T2_FNEXT_RSP_PARMS *)response_data;
3119 response_data = (char *)&pSMBr->hdr.Protocol + 3228 response_data = (char *)&pSMBr->hdr.Protocol +
3120 le16_to_cpu(pSMBr->t2.DataOffset); 3229 le16_to_cpu(pSMBr->t2.DataOffset);
3121 cifs_buf_release(psrch_inf->ntwrk_buf_start); 3230 if(psrch_inf->smallBuf)
3231 cifs_small_buf_release(
3232 psrch_inf->ntwrk_buf_start);
3233 else
3234 cifs_buf_release(psrch_inf->ntwrk_buf_start);
3122 psrch_inf->srch_entries_start = response_data; 3235 psrch_inf->srch_entries_start = response_data;
3123 psrch_inf->ntwrk_buf_start = (char *)pSMB; 3236 psrch_inf->ntwrk_buf_start = (char *)pSMB;
3237 psrch_inf->smallBuf = 0;
3124 if(parms->EndofSearch) 3238 if(parms->EndofSearch)
3125 psrch_inf->endOfSearch = TRUE; 3239 psrch_inf->endOfSearch = TRUE;
3126 else 3240 else
@@ -3834,6 +3948,7 @@ CIFSSMBSetFSUnixInfo(const int xid, struct cifsTconInfo *tcon, __u64 cap)
3834 3948
3835 cFYI(1, ("In SETFSUnixInfo")); 3949 cFYI(1, ("In SETFSUnixInfo"));
3836SETFSUnixRetry: 3950SETFSUnixRetry:
3951 /* BB switch to small buf init to save memory */
3837 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 3952 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
3838 (void **) &pSMBr); 3953 (void **) &pSMBr);
3839 if (rc) 3954 if (rc)
diff --git a/fs/cifs/connect.c b/fs/cifs/connect.c
index 2a0c1f4ca0ae..0b86d5ca9014 100644
--- a/fs/cifs/connect.c
+++ b/fs/cifs/connect.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * fs/cifs/connect.c 2 * fs/cifs/connect.c
3 * 3 *
4 * Copyright (C) International Business Machines Corp., 2002,2005 4 * Copyright (C) International Business Machines Corp., 2002,2006
5 * Author(s): Steve French (sfrench@us.ibm.com) 5 * Author(s): Steve French (sfrench@us.ibm.com)
6 * 6 *
7 * This library is free software; you can redistribute it and/or modify 7 * This library is free software; you can redistribute it and/or modify
@@ -564,7 +564,7 @@ cifs_demultiplex_thread(struct TCP_Server_Info *server)
564 564
565 565
566 dump_smb(smb_buffer, length); 566 dump_smb(smb_buffer, length);
567 if (checkSMB (smb_buffer, smb_buffer->Mid, total_read+4)) { 567 if (checkSMB(smb_buffer, smb_buffer->Mid, total_read+4)) {
568 cifs_dump_mem("Bad SMB: ", smb_buffer, 48); 568 cifs_dump_mem("Bad SMB: ", smb_buffer, 48);
569 continue; 569 continue;
570 } 570 }
@@ -1476,6 +1476,14 @@ ipv4_connect(struct sockaddr_in *psin_server, struct socket **csocket,
1476 rc = smb_send(*csocket, smb_buf, 0x44, 1476 rc = smb_send(*csocket, smb_buf, 0x44,
1477 (struct sockaddr *)psin_server); 1477 (struct sockaddr *)psin_server);
1478 kfree(ses_init_buf); 1478 kfree(ses_init_buf);
1479 msleep(1); /* RFC1001 layer in at least one server
1480 requires very short break before negprot
1481 presumably because not expecting negprot
1482 to follow so fast. This is a simple
1483 solution that works without
1484 complicating the code and causes no
1485 significant slowing down on mount
1486 for everyone else */
1479 } 1487 }
1480 /* else the negprot may still work without this 1488 /* else the negprot may still work without this
1481 even though malloc failed */ 1489 even though malloc failed */
@@ -1920,27 +1928,34 @@ cifs_mount(struct super_block *sb, struct cifs_sb_info *cifs_sb,
1920 cifs_sb->tcon = tcon; 1928 cifs_sb->tcon = tcon;
1921 tcon->ses = pSesInfo; 1929 tcon->ses = pSesInfo;
1922 1930
1923 /* do not care if following two calls succeed - informational only */ 1931 /* do not care if following two calls succeed - informational */
1924 CIFSSMBQFSDeviceInfo(xid, tcon); 1932 CIFSSMBQFSDeviceInfo(xid, tcon);
1925 CIFSSMBQFSAttributeInfo(xid, tcon); 1933 CIFSSMBQFSAttributeInfo(xid, tcon);
1934
1926 if (tcon->ses->capabilities & CAP_UNIX) { 1935 if (tcon->ses->capabilities & CAP_UNIX) {
1927 if(!CIFSSMBQFSUnixInfo(xid, tcon)) { 1936 if(!CIFSSMBQFSUnixInfo(xid, tcon)) {
1928 if(!volume_info.no_psx_acl) { 1937 __u64 cap =
1929 if(CIFS_UNIX_POSIX_ACL_CAP & 1938 le64_to_cpu(tcon->fsUnixInfo.Capability);
1930 le64_to_cpu(tcon->fsUnixInfo.Capability)) 1939 cap &= CIFS_UNIX_CAP_MASK;
1931 cFYI(1,("server negotiated posix acl support")); 1940 if(volume_info.no_psx_acl)
1932 sb->s_flags |= MS_POSIXACL; 1941 cap &= ~CIFS_UNIX_POSIX_ACL_CAP;
1942 else if(CIFS_UNIX_POSIX_ACL_CAP & cap) {
1943 cFYI(1,("negotiated posix acl support"));
1944 sb->s_flags |= MS_POSIXACL;
1933 } 1945 }
1934 1946
1935 /* Try and negotiate POSIX pathnames if we can. */ 1947 if(volume_info.posix_paths == 0)
1936 if (volume_info.posix_paths && (CIFS_UNIX_POSIX_PATHNAMES_CAP & 1948 cap &= ~CIFS_UNIX_POSIX_PATHNAMES_CAP;
1937 le64_to_cpu(tcon->fsUnixInfo.Capability))) { 1949 else if(cap & CIFS_UNIX_POSIX_PATHNAMES_CAP) {
1938 if (!CIFSSMBSetFSUnixInfo(xid, tcon, CIFS_UNIX_POSIX_PATHNAMES_CAP)) { 1950 cFYI(1,("negotiate posix pathnames"));
1939 cFYI(1,("negotiated posix pathnames support")); 1951 cifs_sb->mnt_cifs_flags |=
1940 cifs_sb->mnt_cifs_flags |= CIFS_MOUNT_POSIX_PATHS; 1952 CIFS_MOUNT_POSIX_PATHS;
1941 } else { 1953 }
1942 cFYI(1,("posix pathnames support requested but not supported")); 1954
1943 } 1955 cFYI(1,("Negotiate caps 0x%x",(int)cap));
1956
1957 if (CIFSSMBSetFSUnixInfo(xid, tcon, cap)) {
1958 cFYI(1,("setting capabilities failed"));
1944 } 1959 }
1945 } 1960 }
1946 } 1961 }
@@ -2278,6 +2293,8 @@ CIFSSpnegoSessSetup(unsigned int xid, struct cifsSesInfo *ses,
2278 smb_buffer->Mid = GetNextMid(ses->server); 2293 smb_buffer->Mid = GetNextMid(ses->server);
2279 pSMB->req.hdr.Flags2 |= SMBFLG2_EXT_SEC; 2294 pSMB->req.hdr.Flags2 |= SMBFLG2_EXT_SEC;
2280 pSMB->req.AndXCommand = 0xFF; 2295 pSMB->req.AndXCommand = 0xFF;
2296 if(ses->server->maxBuf > 64*1024)
2297 ses->server->maxBuf = (64*1023);
2281 pSMB->req.MaxBufferSize = cpu_to_le16(ses->server->maxBuf); 2298 pSMB->req.MaxBufferSize = cpu_to_le16(ses->server->maxBuf);
2282 pSMB->req.MaxMpxCount = cpu_to_le16(ses->server->maxReq); 2299 pSMB->req.MaxMpxCount = cpu_to_le16(ses->server->maxReq);
2283 2300
@@ -2525,7 +2542,7 @@ CIFSNTLMSSPNegotiateSessSetup(unsigned int xid,
2525 __u32 negotiate_flags, capabilities; 2542 __u32 negotiate_flags, capabilities;
2526 __u16 count; 2543 __u16 count;
2527 2544
2528 cFYI(1, ("In NTLMSSP sesssetup (negotiate) ")); 2545 cFYI(1, ("In NTLMSSP sesssetup (negotiate)"));
2529 if(ses == NULL) 2546 if(ses == NULL)
2530 return -EINVAL; 2547 return -EINVAL;
2531 domain = ses->domainName; 2548 domain = ses->domainName;
@@ -2575,7 +2592,8 @@ CIFSNTLMSSPNegotiateSessSetup(unsigned int xid,
2575 SecurityBlob->MessageType = NtLmNegotiate; 2592 SecurityBlob->MessageType = NtLmNegotiate;
2576 negotiate_flags = 2593 negotiate_flags =
2577 NTLMSSP_NEGOTIATE_UNICODE | NTLMSSP_NEGOTIATE_OEM | 2594 NTLMSSP_NEGOTIATE_UNICODE | NTLMSSP_NEGOTIATE_OEM |
2578 NTLMSSP_REQUEST_TARGET | NTLMSSP_NEGOTIATE_NTLM | 0x80000000 | 2595 NTLMSSP_REQUEST_TARGET | NTLMSSP_NEGOTIATE_NTLM |
2596 NTLMSSP_NEGOTIATE_56 |
2579 /* NTLMSSP_NEGOTIATE_ALWAYS_SIGN | */ NTLMSSP_NEGOTIATE_128; 2597 /* NTLMSSP_NEGOTIATE_ALWAYS_SIGN | */ NTLMSSP_NEGOTIATE_128;
2580 if(sign_CIFS_PDUs) 2598 if(sign_CIFS_PDUs)
2581 negotiate_flags |= NTLMSSP_NEGOTIATE_SIGN; 2599 negotiate_flags |= NTLMSSP_NEGOTIATE_SIGN;
@@ -2588,26 +2606,11 @@ CIFSNTLMSSPNegotiateSessSetup(unsigned int xid,
2588 SecurityBlob->WorkstationName.Length = 0; 2606 SecurityBlob->WorkstationName.Length = 0;
2589 SecurityBlob->WorkstationName.MaximumLength = 0; 2607 SecurityBlob->WorkstationName.MaximumLength = 0;
2590 2608
2591 if (domain == NULL) { 2609 /* Domain not sent on first Sesssetup in NTLMSSP, instead it is sent
2592 SecurityBlob->DomainName.Buffer = 0; 2610 along with username on auth request (ie the response to challenge) */
2593 SecurityBlob->DomainName.Length = 0; 2611 SecurityBlob->DomainName.Buffer = 0;
2594 SecurityBlob->DomainName.MaximumLength = 0; 2612 SecurityBlob->DomainName.Length = 0;
2595 } else { 2613 SecurityBlob->DomainName.MaximumLength = 0;
2596 __u16 len;
2597 negotiate_flags |= NTLMSSP_NEGOTIATE_DOMAIN_SUPPLIED;
2598 strncpy(bcc_ptr, domain, 63);
2599 len = strnlen(domain, 64);
2600 SecurityBlob->DomainName.MaximumLength =
2601 cpu_to_le16(len);
2602 SecurityBlob->DomainName.Buffer =
2603 cpu_to_le32((long) &SecurityBlob->
2604 DomainString -
2605 (long) &SecurityBlob->Signature);
2606 bcc_ptr += len;
2607 SecurityBlobLength += len;
2608 SecurityBlob->DomainName.Length =
2609 cpu_to_le16(len);
2610 }
2611 if (ses->capabilities & CAP_UNICODE) { 2614 if (ses->capabilities & CAP_UNICODE) {
2612 if ((long) bcc_ptr % 2) { 2615 if ((long) bcc_ptr % 2) {
2613 *bcc_ptr = 0; 2616 *bcc_ptr = 0;
@@ -2677,7 +2680,7 @@ CIFSNTLMSSPNegotiateSessSetup(unsigned int xid,
2677 SecurityBlob2->MessageType)); 2680 SecurityBlob2->MessageType));
2678 } else if (ses) { 2681 } else if (ses) {
2679 ses->Suid = smb_buffer_response->Uid; /* UID left in le format */ 2682 ses->Suid = smb_buffer_response->Uid; /* UID left in le format */
2680 cFYI(1, ("UID = %d ", ses->Suid)); 2683 cFYI(1, ("UID = %d", ses->Suid));
2681 if ((pSMBr->resp.hdr.WordCount == 3) 2684 if ((pSMBr->resp.hdr.WordCount == 3)
2682 || ((pSMBr->resp.hdr.WordCount == 4) 2685 || ((pSMBr->resp.hdr.WordCount == 4)
2683 && (blob_len < 2686 && (blob_len <
@@ -2685,17 +2688,17 @@ CIFSNTLMSSPNegotiateSessSetup(unsigned int xid,
2685 2688
2686 if (pSMBr->resp.hdr.WordCount == 4) { 2689 if (pSMBr->resp.hdr.WordCount == 4) {
2687 bcc_ptr += blob_len; 2690 bcc_ptr += blob_len;
2688 cFYI(1, 2691 cFYI(1, ("Security Blob Length %d",
2689 ("Security Blob Length %d ",
2690 blob_len)); 2692 blob_len));
2691 } 2693 }
2692 2694
2693 cFYI(1, ("NTLMSSP Challenge rcvd ")); 2695 cFYI(1, ("NTLMSSP Challenge rcvd"));
2694 2696
2695 memcpy(ses->server->cryptKey, 2697 memcpy(ses->server->cryptKey,
2696 SecurityBlob2->Challenge, 2698 SecurityBlob2->Challenge,
2697 CIFS_CRYPTO_KEY_SIZE); 2699 CIFS_CRYPTO_KEY_SIZE);
2698 if(SecurityBlob2->NegotiateFlags & cpu_to_le32(NTLMSSP_NEGOTIATE_NTLMV2)) 2700 if(SecurityBlob2->NegotiateFlags &
2701 cpu_to_le32(NTLMSSP_NEGOTIATE_NTLMV2))
2699 *pNTLMv2_flag = TRUE; 2702 *pNTLMv2_flag = TRUE;
2700 2703
2701 if((SecurityBlob2->NegotiateFlags & 2704 if((SecurityBlob2->NegotiateFlags &
@@ -2818,7 +2821,7 @@ CIFSNTLMSSPNegotiateSessSetup(unsigned int xid,
2818 bcc_ptr++; 2821 bcc_ptr++;
2819 } else 2822 } else
2820 cFYI(1, 2823 cFYI(1,
2821 ("Variable field of length %d extends beyond end of smb ", 2824 ("Variable field of length %d extends beyond end of smb",
2822 len)); 2825 len));
2823 } 2826 }
2824 } else { 2827 } else {
@@ -2830,7 +2833,7 @@ CIFSNTLMSSPNegotiateSessSetup(unsigned int xid,
2830 } 2833 }
2831 } else { 2834 } else {
2832 cERROR(1, 2835 cERROR(1,
2833 (" Invalid Word count %d: ", 2836 (" Invalid Word count %d:",
2834 smb_buffer_response->WordCount)); 2837 smb_buffer_response->WordCount));
2835 rc = -EIO; 2838 rc = -EIO;
2836 } 2839 }
@@ -3447,7 +3450,7 @@ int cifs_setup_session(unsigned int xid, struct cifsSesInfo *pSesInfo,
3447 if (extended_security 3450 if (extended_security
3448 && (pSesInfo->capabilities & CAP_EXTENDED_SECURITY) 3451 && (pSesInfo->capabilities & CAP_EXTENDED_SECURITY)
3449 && (pSesInfo->server->secType == NTLMSSP)) { 3452 && (pSesInfo->server->secType == NTLMSSP)) {
3450 cFYI(1, ("New style sesssetup ")); 3453 cFYI(1, ("New style sesssetup"));
3451 rc = CIFSSpnegoSessSetup(xid, pSesInfo, 3454 rc = CIFSSpnegoSessSetup(xid, pSesInfo,
3452 NULL /* security blob */, 3455 NULL /* security blob */,
3453 0 /* blob length */, 3456 0 /* blob length */,
@@ -3455,7 +3458,7 @@ int cifs_setup_session(unsigned int xid, struct cifsSesInfo *pSesInfo,
3455 } else if (extended_security 3458 } else if (extended_security
3456 && (pSesInfo->capabilities & CAP_EXTENDED_SECURITY) 3459 && (pSesInfo->capabilities & CAP_EXTENDED_SECURITY)
3457 && (pSesInfo->server->secType == RawNTLMSSP)) { 3460 && (pSesInfo->server->secType == RawNTLMSSP)) {
3458 cFYI(1, ("NTLMSSP sesssetup ")); 3461 cFYI(1, ("NTLMSSP sesssetup"));
3459 rc = CIFSNTLMSSPNegotiateSessSetup(xid, 3462 rc = CIFSNTLMSSPNegotiateSessSetup(xid,
3460 pSesInfo, 3463 pSesInfo,
3461 &ntlmv2_flag, 3464 &ntlmv2_flag,
diff --git a/fs/cifs/dir.c b/fs/cifs/dir.c
index 632561dd9c50..1d0ca3eaaca5 100644
--- a/fs/cifs/dir.c
+++ b/fs/cifs/dir.c
@@ -48,13 +48,14 @@ build_path_from_dentry(struct dentry *direntry)
48 struct dentry *temp; 48 struct dentry *temp;
49 int namelen = 0; 49 int namelen = 0;
50 char *full_path; 50 char *full_path;
51 char dirsep = CIFS_DIR_SEP(CIFS_SB(direntry->d_sb)); 51 char dirsep;
52 52
53 if(direntry == NULL) 53 if(direntry == NULL)
54 return NULL; /* not much we can do if dentry is freed and 54 return NULL; /* not much we can do if dentry is freed and
55 we need to reopen the file after it was closed implicitly 55 we need to reopen the file after it was closed implicitly
56 when the server crashed */ 56 when the server crashed */
57 57
58 dirsep = CIFS_DIR_SEP(CIFS_SB(direntry->d_sb));
58cifs_bp_rename_retry: 59cifs_bp_rename_retry:
59 for (temp = direntry; !IS_ROOT(temp);) { 60 for (temp = direntry; !IS_ROOT(temp);) {
60 namelen += (1 + temp->d_name.len); 61 namelen += (1 + temp->d_name.len);
@@ -255,12 +256,10 @@ cifs_create(struct inode *inode, struct dentry *direntry, int mode,
255 CIFSSMBClose(xid, pTcon, fileHandle); 256 CIFSSMBClose(xid, pTcon, fileHandle);
256 } else if(newinode) { 257 } else if(newinode) {
257 pCifsFile = 258 pCifsFile =
258 kmalloc(sizeof (struct cifsFileInfo), GFP_KERNEL); 259 kzalloc(sizeof (struct cifsFileInfo), GFP_KERNEL);
259 260
260 if(pCifsFile == NULL) 261 if(pCifsFile == NULL)
261 goto cifs_create_out; 262 goto cifs_create_out;
262 memset((char *)pCifsFile, 0,
263 sizeof (struct cifsFileInfo));
264 pCifsFile->netfid = fileHandle; 263 pCifsFile->netfid = fileHandle;
265 pCifsFile->pid = current->tgid; 264 pCifsFile->pid = current->tgid;
266 pCifsFile->pInode = newinode; 265 pCifsFile->pInode = newinode;
diff --git a/fs/cifs/file.c b/fs/cifs/file.c
index fb49aef1f2ec..5c497c529772 100644
--- a/fs/cifs/file.c
+++ b/fs/cifs/file.c
@@ -555,7 +555,10 @@ int cifs_closedir(struct inode *inode, struct file *file)
555 if (ptmp) { 555 if (ptmp) {
556 cFYI(1, ("closedir free smb buf in srch struct")); 556 cFYI(1, ("closedir free smb buf in srch struct"));
557 pCFileStruct->srch_inf.ntwrk_buf_start = NULL; 557 pCFileStruct->srch_inf.ntwrk_buf_start = NULL;
558 cifs_buf_release(ptmp); 558 if(pCFileStruct->srch_inf.smallBuf)
559 cifs_small_buf_release(ptmp);
560 else
561 cifs_buf_release(ptmp);
559 } 562 }
560 ptmp = pCFileStruct->search_resume_name; 563 ptmp = pCFileStruct->search_resume_name;
561 if (ptmp) { 564 if (ptmp) {
@@ -574,13 +577,14 @@ int cifs_closedir(struct inode *inode, struct file *file)
574int cifs_lock(struct file *file, int cmd, struct file_lock *pfLock) 577int cifs_lock(struct file *file, int cmd, struct file_lock *pfLock)
575{ 578{
576 int rc, xid; 579 int rc, xid;
577 __u32 lockType = LOCKING_ANDX_LARGE_FILES;
578 __u32 numLock = 0; 580 __u32 numLock = 0;
579 __u32 numUnlock = 0; 581 __u32 numUnlock = 0;
580 __u64 length; 582 __u64 length;
581 int wait_flag = FALSE; 583 int wait_flag = FALSE;
582 struct cifs_sb_info *cifs_sb; 584 struct cifs_sb_info *cifs_sb;
583 struct cifsTconInfo *pTcon; 585 struct cifsTconInfo *pTcon;
586 __u16 netfid;
587 __u8 lockType = LOCKING_ANDX_LARGE_FILES;
584 588
585 length = 1 + pfLock->fl_end - pfLock->fl_start; 589 length = 1 + pfLock->fl_end - pfLock->fl_start;
586 rc = -EACCES; 590 rc = -EACCES;
@@ -592,11 +596,11 @@ int cifs_lock(struct file *file, int cmd, struct file_lock *pfLock)
592 pfLock->fl_end)); 596 pfLock->fl_end));
593 597
594 if (pfLock->fl_flags & FL_POSIX) 598 if (pfLock->fl_flags & FL_POSIX)
595 cFYI(1, ("Posix ")); 599 cFYI(1, ("Posix"));
596 if (pfLock->fl_flags & FL_FLOCK) 600 if (pfLock->fl_flags & FL_FLOCK)
597 cFYI(1, ("Flock ")); 601 cFYI(1, ("Flock"));
598 if (pfLock->fl_flags & FL_SLEEP) { 602 if (pfLock->fl_flags & FL_SLEEP) {
599 cFYI(1, ("Blocking lock ")); 603 cFYI(1, ("Blocking lock"));
600 wait_flag = TRUE; 604 wait_flag = TRUE;
601 } 605 }
602 if (pfLock->fl_flags & FL_ACCESS) 606 if (pfLock->fl_flags & FL_ACCESS)
@@ -612,21 +616,23 @@ int cifs_lock(struct file *file, int cmd, struct file_lock *pfLock)
612 cFYI(1, ("F_WRLCK ")); 616 cFYI(1, ("F_WRLCK "));
613 numLock = 1; 617 numLock = 1;
614 } else if (pfLock->fl_type == F_UNLCK) { 618 } else if (pfLock->fl_type == F_UNLCK) {
615 cFYI(1, ("F_UNLCK ")); 619 cFYI(1, ("F_UNLCK"));
616 numUnlock = 1; 620 numUnlock = 1;
621 /* Check if unlock includes more than
622 one lock range */
617 } else if (pfLock->fl_type == F_RDLCK) { 623 } else if (pfLock->fl_type == F_RDLCK) {
618 cFYI(1, ("F_RDLCK ")); 624 cFYI(1, ("F_RDLCK"));
619 lockType |= LOCKING_ANDX_SHARED_LOCK; 625 lockType |= LOCKING_ANDX_SHARED_LOCK;
620 numLock = 1; 626 numLock = 1;
621 } else if (pfLock->fl_type == F_EXLCK) { 627 } else if (pfLock->fl_type == F_EXLCK) {
622 cFYI(1, ("F_EXLCK ")); 628 cFYI(1, ("F_EXLCK"));
623 numLock = 1; 629 numLock = 1;
624 } else if (pfLock->fl_type == F_SHLCK) { 630 } else if (pfLock->fl_type == F_SHLCK) {
625 cFYI(1, ("F_SHLCK ")); 631 cFYI(1, ("F_SHLCK"));
626 lockType |= LOCKING_ANDX_SHARED_LOCK; 632 lockType |= LOCKING_ANDX_SHARED_LOCK;
627 numLock = 1; 633 numLock = 1;
628 } else 634 } else
629 cFYI(1, ("Unknown type of lock ")); 635 cFYI(1, ("Unknown type of lock"));
630 636
631 cifs_sb = CIFS_SB(file->f_dentry->d_sb); 637 cifs_sb = CIFS_SB(file->f_dentry->d_sb);
632 pTcon = cifs_sb->tcon; 638 pTcon = cifs_sb->tcon;
@@ -635,27 +641,41 @@ int cifs_lock(struct file *file, int cmd, struct file_lock *pfLock)
635 FreeXid(xid); 641 FreeXid(xid);
636 return -EBADF; 642 return -EBADF;
637 } 643 }
644 netfid = ((struct cifsFileInfo *)file->private_data)->netfid;
645
638 646
647 /* BB add code here to normalize offset and length to
648 account for negative length which we can not accept over the
649 wire */
639 if (IS_GETLK(cmd)) { 650 if (IS_GETLK(cmd)) {
640 rc = CIFSSMBLock(xid, pTcon, 651 if(experimEnabled &&
641 ((struct cifsFileInfo *)file-> 652 (cifs_sb->tcon->ses->capabilities & CAP_UNIX) &&
642 private_data)->netfid, 653 (CIFS_UNIX_FCNTL_CAP &
643 length, 654 le64_to_cpu(cifs_sb->tcon->fsUnixInfo.Capability))) {
644 pfLock->fl_start, 0, 1, lockType, 655 int posix_lock_type;
645 0 /* wait flag */ ); 656 if(lockType & LOCKING_ANDX_SHARED_LOCK)
657 posix_lock_type = CIFS_RDLCK;
658 else
659 posix_lock_type = CIFS_WRLCK;
660 rc = CIFSSMBPosixLock(xid, pTcon, netfid, 1 /* get */,
661 length, pfLock->fl_start,
662 posix_lock_type, wait_flag);
663 FreeXid(xid);
664 return rc;
665 }
666
667 /* BB we could chain these into one lock request BB */
668 rc = CIFSSMBLock(xid, pTcon, netfid, length, pfLock->fl_start,
669 0, 1, lockType, 0 /* wait flag */ );
646 if (rc == 0) { 670 if (rc == 0) {
647 rc = CIFSSMBLock(xid, pTcon, 671 rc = CIFSSMBLock(xid, pTcon, netfid, length,
648 ((struct cifsFileInfo *) file->
649 private_data)->netfid,
650 length,
651 pfLock->fl_start, 1 /* numUnlock */ , 672 pfLock->fl_start, 1 /* numUnlock */ ,
652 0 /* numLock */ , lockType, 673 0 /* numLock */ , lockType,
653 0 /* wait flag */ ); 674 0 /* wait flag */ );
654 pfLock->fl_type = F_UNLCK; 675 pfLock->fl_type = F_UNLCK;
655 if (rc != 0) 676 if (rc != 0)
656 cERROR(1, ("Error unlocking previously locked " 677 cERROR(1, ("Error unlocking previously locked "
657 "range %d during test of lock ", 678 "range %d during test of lock", rc));
658 rc));
659 rc = 0; 679 rc = 0;
660 680
661 } else { 681 } else {
@@ -667,12 +687,30 @@ int cifs_lock(struct file *file, int cmd, struct file_lock *pfLock)
667 FreeXid(xid); 687 FreeXid(xid);
668 return rc; 688 return rc;
669 } 689 }
670 690 if (experimEnabled &&
671 rc = CIFSSMBLock(xid, pTcon, 691 (cifs_sb->tcon->ses->capabilities & CAP_UNIX) &&
672 ((struct cifsFileInfo *) file->private_data)-> 692 (CIFS_UNIX_FCNTL_CAP &
673 netfid, length, 693 le64_to_cpu(cifs_sb->tcon->fsUnixInfo.Capability))) {
674 pfLock->fl_start, numUnlock, numLock, lockType, 694 int posix_lock_type;
675 wait_flag); 695 if(lockType & LOCKING_ANDX_SHARED_LOCK)
696 posix_lock_type = CIFS_RDLCK;
697 else
698 posix_lock_type = CIFS_WRLCK;
699
700 if(numUnlock == 1)
701 posix_lock_type = CIFS_UNLCK;
702 else if(numLock == 0) {
703 /* if no lock or unlock then nothing
704 to do since we do not know what it is */
705 FreeXid(xid);
706 return -EOPNOTSUPP;
707 }
708 rc = CIFSSMBPosixLock(xid, pTcon, netfid, 0 /* set */,
709 length, pfLock->fl_start,
710 posix_lock_type, wait_flag);
711 } else
712 rc = CIFSSMBLock(xid, pTcon, netfid, length, pfLock->fl_start,
713 numUnlock, numLock, lockType, wait_flag);
676 if (pfLock->fl_flags & FL_POSIX) 714 if (pfLock->fl_flags & FL_POSIX)
677 posix_lock_file_wait(file, pfLock); 715 posix_lock_file_wait(file, pfLock);
678 FreeXid(xid); 716 FreeXid(xid);
diff --git a/fs/cifs/inode.c b/fs/cifs/inode.c
index 598eec9778f6..957ddd1571c6 100644
--- a/fs/cifs/inode.c
+++ b/fs/cifs/inode.c
@@ -565,11 +565,14 @@ int cifs_unlink(struct inode *inode, struct dentry *direntry)
565 struct cifsInodeInfo *cifsInode; 565 struct cifsInodeInfo *cifsInode;
566 FILE_BASIC_INFO *pinfo_buf; 566 FILE_BASIC_INFO *pinfo_buf;
567 567
568 cFYI(1, ("cifs_unlink, inode = 0x%p with ", inode)); 568 cFYI(1, ("cifs_unlink, inode = 0x%p", inode));
569 569
570 xid = GetXid(); 570 xid = GetXid();
571 571
572 cifs_sb = CIFS_SB(inode->i_sb); 572 if(inode)
573 cifs_sb = CIFS_SB(inode->i_sb);
574 else
575 cifs_sb = CIFS_SB(direntry->d_sb);
573 pTcon = cifs_sb->tcon; 576 pTcon = cifs_sb->tcon;
574 577
575 /* Unlink can be called from rename so we can not grab the sem here 578 /* Unlink can be called from rename so we can not grab the sem here
@@ -609,9 +612,8 @@ int cifs_unlink(struct inode *inode, struct dentry *direntry)
609 } 612 }
610 } else if (rc == -EACCES) { 613 } else if (rc == -EACCES) {
611 /* try only if r/o attribute set in local lookup data? */ 614 /* try only if r/o attribute set in local lookup data? */
612 pinfo_buf = kmalloc(sizeof(FILE_BASIC_INFO), GFP_KERNEL); 615 pinfo_buf = kzalloc(sizeof(FILE_BASIC_INFO), GFP_KERNEL);
613 if (pinfo_buf) { 616 if (pinfo_buf) {
614 memset(pinfo_buf, 0, sizeof(FILE_BASIC_INFO));
615 /* ATTRS set to normal clears r/o bit */ 617 /* ATTRS set to normal clears r/o bit */
616 pinfo_buf->Attributes = cpu_to_le32(ATTR_NORMAL); 618 pinfo_buf->Attributes = cpu_to_le32(ATTR_NORMAL);
617 if (!(pTcon->ses->flags & CIFS_SES_NT4)) 619 if (!(pTcon->ses->flags & CIFS_SES_NT4))
@@ -693,9 +695,11 @@ int cifs_unlink(struct inode *inode, struct dentry *direntry)
693 when needed */ 695 when needed */
694 direntry->d_inode->i_ctime = current_fs_time(inode->i_sb); 696 direntry->d_inode->i_ctime = current_fs_time(inode->i_sb);
695 } 697 }
696 inode->i_ctime = inode->i_mtime = current_fs_time(inode->i_sb); 698 if(inode) {
697 cifsInode = CIFS_I(inode); 699 inode->i_ctime = inode->i_mtime = current_fs_time(inode->i_sb);
698 cifsInode->time = 0; /* force revalidate of dir as well */ 700 cifsInode = CIFS_I(inode);
701 cifsInode->time = 0; /* force revalidate of dir as well */
702 }
699 703
700 kfree(full_path); 704 kfree(full_path);
701 FreeXid(xid); 705 FreeXid(xid);
@@ -1167,7 +1171,7 @@ int cifs_setattr(struct dentry *direntry, struct iattr *attrs)
1167 nfid, npid, FALSE); 1171 nfid, npid, FALSE);
1168 atomic_dec(&open_file->wrtPending); 1172 atomic_dec(&open_file->wrtPending);
1169 cFYI(1,("SetFSize for attrs rc = %d", rc)); 1173 cFYI(1,("SetFSize for attrs rc = %d", rc));
1170 if(rc == -EINVAL) { 1174 if((rc == -EINVAL) || (rc == -EOPNOTSUPP)) {
1171 int bytes_written; 1175 int bytes_written;
1172 rc = CIFSSMBWrite(xid, pTcon, 1176 rc = CIFSSMBWrite(xid, pTcon,
1173 nfid, 0, attrs->ia_size, 1177 nfid, 0, attrs->ia_size,
@@ -1189,7 +1193,7 @@ int cifs_setattr(struct dentry *direntry, struct iattr *attrs)
1189 cifs_sb->mnt_cifs_flags & 1193 cifs_sb->mnt_cifs_flags &
1190 CIFS_MOUNT_MAP_SPECIAL_CHR); 1194 CIFS_MOUNT_MAP_SPECIAL_CHR);
1191 cFYI(1, ("SetEOF by path (setattrs) rc = %d", rc)); 1195 cFYI(1, ("SetEOF by path (setattrs) rc = %d", rc));
1192 if(rc == -EINVAL) { 1196 if((rc == -EINVAL) || (rc == -EOPNOTSUPP)) {
1193 __u16 netfid; 1197 __u16 netfid;
1194 int oplock = FALSE; 1198 int oplock = FALSE;
1195 1199
diff --git a/fs/cifs/link.c b/fs/cifs/link.c
index 8d0da7c87c7b..9562f5bba65c 100644
--- a/fs/cifs/link.c
+++ b/fs/cifs/link.c
@@ -67,7 +67,7 @@ cifs_hardlink(struct dentry *old_file, struct inode *inode,
67 cifs_sb_target->local_nls, 67 cifs_sb_target->local_nls,
68 cifs_sb_target->mnt_cifs_flags & 68 cifs_sb_target->mnt_cifs_flags &
69 CIFS_MOUNT_MAP_SPECIAL_CHR); 69 CIFS_MOUNT_MAP_SPECIAL_CHR);
70 if(rc == -EIO) 70 if((rc == -EIO) || (rc == -EINVAL))
71 rc = -EOPNOTSUPP; 71 rc = -EOPNOTSUPP;
72 } 72 }
73 73
diff --git a/fs/cifs/misc.c b/fs/cifs/misc.c
index 432ba15e2c2d..fafd056426e4 100644
--- a/fs/cifs/misc.c
+++ b/fs/cifs/misc.c
@@ -72,10 +72,9 @@ sesInfoAlloc(void)
72 struct cifsSesInfo *ret_buf; 72 struct cifsSesInfo *ret_buf;
73 73
74 ret_buf = 74 ret_buf =
75 (struct cifsSesInfo *) kmalloc(sizeof (struct cifsSesInfo), 75 (struct cifsSesInfo *) kzalloc(sizeof (struct cifsSesInfo),
76 GFP_KERNEL); 76 GFP_KERNEL);
77 if (ret_buf) { 77 if (ret_buf) {
78 memset(ret_buf, 0, sizeof (struct cifsSesInfo));
79 write_lock(&GlobalSMBSeslock); 78 write_lock(&GlobalSMBSeslock);
80 atomic_inc(&sesInfoAllocCount); 79 atomic_inc(&sesInfoAllocCount);
81 ret_buf->status = CifsNew; 80 ret_buf->status = CifsNew;
@@ -110,10 +109,9 @@ tconInfoAlloc(void)
110{ 109{
111 struct cifsTconInfo *ret_buf; 110 struct cifsTconInfo *ret_buf;
112 ret_buf = 111 ret_buf =
113 (struct cifsTconInfo *) kmalloc(sizeof (struct cifsTconInfo), 112 (struct cifsTconInfo *) kzalloc(sizeof (struct cifsTconInfo),
114 GFP_KERNEL); 113 GFP_KERNEL);
115 if (ret_buf) { 114 if (ret_buf) {
116 memset(ret_buf, 0, sizeof (struct cifsTconInfo));
117 write_lock(&GlobalSMBSeslock); 115 write_lock(&GlobalSMBSeslock);
118 atomic_inc(&tconInfoAllocCount); 116 atomic_inc(&tconInfoAllocCount);
119 list_add(&ret_buf->cifsConnectionList, 117 list_add(&ret_buf->cifsConnectionList,
@@ -423,9 +421,7 @@ checkSMB(struct smb_hdr *smb, __u16 mid, int length)
423{ 421{
424 __u32 len = smb->smb_buf_length; 422 __u32 len = smb->smb_buf_length;
425 __u32 clc_len; /* calculated length */ 423 __u32 clc_len; /* calculated length */
426 cFYI(0, 424 cFYI(0, ("checkSMB Length: 0x%x, smb_buf_length: 0x%x", length, len));
427 ("Entering checkSMB with Length: %x, smb_buf_length: %x",
428 length, len));
429 if (((unsigned int)length < 2 + sizeof (struct smb_hdr)) || 425 if (((unsigned int)length < 2 + sizeof (struct smb_hdr)) ||
430 (len > CIFSMaxBufSize + MAX_CIFS_HDR_SIZE - 4)) { 426 (len > CIFSMaxBufSize + MAX_CIFS_HDR_SIZE - 4)) {
431 if ((unsigned int)length < 2 + sizeof (struct smb_hdr)) { 427 if ((unsigned int)length < 2 + sizeof (struct smb_hdr)) {
@@ -433,29 +429,36 @@ checkSMB(struct smb_hdr *smb, __u16 mid, int length)
433 sizeof (struct smb_hdr) - 1) 429 sizeof (struct smb_hdr) - 1)
434 && (smb->Status.CifsError != 0)) { 430 && (smb->Status.CifsError != 0)) {
435 smb->WordCount = 0; 431 smb->WordCount = 0;
436 return 0; /* some error cases do not return wct and bcc */ 432 /* some error cases do not return wct and bcc */
433 return 0;
437 } else { 434 } else {
438 cERROR(1, ("Length less than smb header size")); 435 cERROR(1, ("Length less than smb header size"));
439 } 436 }
440
441 } 437 }
442 if (len > CIFSMaxBufSize + MAX_CIFS_HDR_SIZE - 4) 438 if (len > CIFSMaxBufSize + MAX_CIFS_HDR_SIZE - 4)
443 cERROR(1, 439 cERROR(1, ("smb length greater than MaxBufSize, mid=%d",
444 ("smb_buf_length greater than MaxBufSize")); 440 smb->Mid));
445 cERROR(1,
446 ("bad smb detected. Illegal length. mid=%d",
447 smb->Mid));
448 return 1; 441 return 1;
449 } 442 }
450 443
451 if (checkSMBhdr(smb, mid)) 444 if (checkSMBhdr(smb, mid))
452 return 1; 445 return 1;
453 clc_len = smbCalcSize_LE(smb); 446 clc_len = smbCalcSize_LE(smb);
454 if ((4 + len != clc_len) 447
455 || (4 + len != (unsigned int)length)) { 448 if(4 + len != (unsigned int)length) {
456 cERROR(1, ("Calculated size 0x%x vs actual length 0x%x", 449 cERROR(1, ("Length read does not match RFC1001 length %d",len));
457 clc_len, 4 + len)); 450 return 1;
458 cERROR(1, ("bad smb size detected for Mid=%d", smb->Mid)); 451 }
452
453 if (4 + len != clc_len) {
454 /* check if bcc wrapped around for large read responses */
455 if((len > 64 * 1024) && (len > clc_len)) {
456 /* check if lengths match mod 64K */
457 if(((4 + len) & 0xFFFF) == (clc_len & 0xFFFF))
458 return 0; /* bcc wrapped */
459 }
460 cFYI(1, ("Calculated size %d vs length %d mismatch for mid %d",
461 clc_len, 4 + len, smb->Mid));
459 /* Windows XP can return a few bytes too much, presumably 462 /* Windows XP can return a few bytes too much, presumably
460 an illegal pad, at the end of byte range lock responses 463 an illegal pad, at the end of byte range lock responses
461 so we allow for that three byte pad, as long as actual 464 so we allow for that three byte pad, as long as actual
@@ -469,8 +472,11 @@ checkSMB(struct smb_hdr *smb, __u16 mid, int length)
469 wct and bcc to minimum size and drop the t2 parms and data */ 472 wct and bcc to minimum size and drop the t2 parms and data */
470 if((4+len > clc_len) && (len <= clc_len + 512)) 473 if((4+len > clc_len) && (len <= clc_len + 512))
471 return 0; 474 return 0;
472 else 475 else {
476 cERROR(1, ("RFC1001 size %d bigger than SMB for Mid=%d",
477 len, smb->Mid));
473 return 1; 478 return 1;
479 }
474 } 480 }
475 return 0; 481 return 0;
476} 482}
diff --git a/fs/cifs/ntlmssp.c b/fs/cifs/ntlmssp.c
new file mode 100644
index 000000000000..78866f925747
--- /dev/null
+++ b/fs/cifs/ntlmssp.c
@@ -0,0 +1,129 @@
1/*
2 * fs/cifs/ntlmssp.h
3 *
4 * Copyright (c) International Business Machines Corp., 2006
5 * Author(s): Steve French (sfrench@us.ibm.com)
6 *
7 * This library is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU Lesser General Public License as published
9 * by the Free Software Foundation; either version 2.1 of the License, or
10 * (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
15 * the GNU Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public License
18 * along with this library; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include "cifspdu.h"
23#include "cifsglob.h"
24#include "cifsproto.h"
25#include "cifs_unicode.h"
26#include "cifs_debug.h"
27#include "ntlmssp.h"
28#include "nterr.h"
29
30#ifdef CONFIG_CIFS_EXPERIMENTAL
31static __u32 cifs_ssetup_hdr(struct cifsSesInfo *ses, SESSION_SETUP_ANDX *pSMB)
32{
33 __u32 capabilities = 0;
34
35 /* init fields common to all four types of SessSetup */
36 /* note that header is initialized to zero in header_assemble */
37 pSMB->req.AndXCommand = 0xFF;
38 pSMB->req.MaxBufferSize = cpu_to_le16(ses->server->maxBuf);
39 pSMB->req.MaxMpxCount = cpu_to_le16(ses->server->maxReq);
40
41 /* Now no need to set SMBFLG_CASELESS or obsolete CANONICAL PATH */
42
43 /* BB verify whether signing required on neg or just on auth frame
44 (and NTLM case) */
45
46 capabilities = CAP_LARGE_FILES | CAP_NT_SMBS | CAP_LEVEL_II_OPLOCKS |
47 CAP_LARGE_WRITE_X | CAP_LARGE_READ_X;
48
49 if(ses->server->secMode & (SECMODE_SIGN_REQUIRED | SECMODE_SIGN_ENABLED))
50 pSMB->req.hdr.Flags2 |= SMBFLG2_SECURITY_SIGNATURE;
51
52 if (ses->capabilities & CAP_UNICODE) {
53 pSMB->req.hdr.Flags2 |= SMBFLG2_UNICODE;
54 capabilities |= CAP_UNICODE;
55 }
56 if (ses->capabilities & CAP_STATUS32) {
57 pSMB->req.hdr.Flags2 |= SMBFLG2_ERR_STATUS;
58 capabilities |= CAP_STATUS32;
59 }
60 if (ses->capabilities & CAP_DFS) {
61 pSMB->req.hdr.Flags2 |= SMBFLG2_DFS;
62 capabilities |= CAP_DFS;
63 }
64
65 /* BB check whether to init vcnum BB */
66 return capabilities;
67}
68int
69CIFS_SessSetup(unsigned int xid, struct cifsSesInfo *ses, const int type,
70 int * pNTLMv2_flg, const struct nls_table *nls_cp)
71{
72 int rc = 0;
73 int wct;
74 struct smb_hdr *smb_buffer;
75 char *bcc_ptr;
76 SESSION_SETUP_ANDX *pSMB;
77 __u32 capabilities;
78
79 if(ses == NULL)
80 return -EINVAL;
81
82 cFYI(1,("SStp type: %d",type));
83 if(type < CIFS_NTLM) {
84#ifndef CONFIG_CIFS_WEAK_PW_HASH
85 /* LANMAN and plaintext are less secure and off by default.
86 So we make this explicitly be turned on in kconfig (in the
87 build) and turned on at runtime (changed from the default)
88 in proc/fs/cifs or via mount parm. Unfortunately this is
89 needed for old Win (e.g. Win95), some obscure NAS and OS/2 */
90 return -EOPNOTSUPP;
91#endif
92 wct = 10; /* lanman 2 style sessionsetup */
93 } else if(type < CIFS_NTLMSSP_NEG)
94 wct = 13; /* old style NTLM sessionsetup */
95 else /* same size for negotiate or auth, NTLMSSP or extended security */
96 wct = 12;
97
98 rc = small_smb_init_no_tc(SMB_COM_SESSION_SETUP_ANDX, wct, ses,
99 (void **)&smb_buffer);
100 if(rc)
101 return rc;
102
103 pSMB = (SESSION_SETUP_ANDX *)smb_buffer;
104
105 capabilities = cifs_ssetup_hdr(ses, pSMB);
106 bcc_ptr = pByteArea(smb_buffer);
107 if(type > CIFS_NTLM) {
108 pSMB->req.hdr.Flags2 |= SMBFLG2_EXT_SEC;
109 capabilities |= CAP_EXTENDED_SECURITY;
110 pSMB->req.Capabilities = cpu_to_le32(capabilities);
111 /* BB set password lengths */
112 } else if(type < CIFS_NTLM) /* lanman */ {
113 /* no capabilities flags in old lanman negotiation */
114 /* pSMB->old_req.PasswordLength = */ /* BB fixme BB */
115 } else /* type CIFS_NTLM */ {
116 pSMB->req_no_secext.Capabilities = cpu_to_le32(capabilities);
117 pSMB->req_no_secext.CaseInsensitivePasswordLength =
118 cpu_to_le16(CIFS_SESSION_KEY_SIZE);
119 pSMB->req_no_secext.CaseSensitivePasswordLength =
120 cpu_to_le16(CIFS_SESSION_KEY_SIZE);
121 }
122
123
124/* rc = SendReceive2(xid, ses, iov, num_iovecs, &resp_buf_type, 0); */
125 /* SMB request buf freed in SendReceive2 */
126
127 return rc;
128}
129#endif /* CONFIG_CIFS_EXPERIMENTAL */
diff --git a/fs/cifs/ntlmssp.h b/fs/cifs/ntlmssp.h
index 803389b64a2c..d39b712a11c5 100644
--- a/fs/cifs/ntlmssp.h
+++ b/fs/cifs/ntlmssp.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * fs/cifs/ntlmssp.h 2 * fs/cifs/ntlmssp.h
3 * 3 *
4 * Copyright (c) International Business Machines Corp., 2002 4 * Copyright (c) International Business Machines Corp., 2002,2006
5 * Author(s): Steve French (sfrench@us.ibm.com) 5 * Author(s): Steve French (sfrench@us.ibm.com)
6 * 6 *
7 * This library is free software; you can redistribute it and/or modify 7 * This library is free software; you can redistribute it and/or modify
diff --git a/fs/cifs/readdir.c b/fs/cifs/readdir.c
index 488bd0d81dcf..2f6e2825571e 100644
--- a/fs/cifs/readdir.c
+++ b/fs/cifs/readdir.c
@@ -604,7 +604,12 @@ static int find_cifs_entry(const int xid, struct cifsTconInfo *pTcon,
604 cifsFile->search_resume_name = NULL; 604 cifsFile->search_resume_name = NULL;
605 if(cifsFile->srch_inf.ntwrk_buf_start) { 605 if(cifsFile->srch_inf.ntwrk_buf_start) {
606 cFYI(1,("freeing SMB ff cache buf on search rewind")); 606 cFYI(1,("freeing SMB ff cache buf on search rewind"));
607 cifs_buf_release(cifsFile->srch_inf.ntwrk_buf_start); 607 if(cifsFile->srch_inf.smallBuf)
608 cifs_small_buf_release(cifsFile->srch_inf.
609 ntwrk_buf_start);
610 else
611 cifs_buf_release(cifsFile->srch_inf.
612 ntwrk_buf_start);
608 } 613 }
609 rc = initiate_cifs_search(xid,file); 614 rc = initiate_cifs_search(xid,file);
610 if(rc) { 615 if(rc) {
diff --git a/fs/cifs/transport.c b/fs/cifs/transport.c
index b12cb8a7da7c..3da80409466c 100644
--- a/fs/cifs/transport.c
+++ b/fs/cifs/transport.c
@@ -309,17 +309,16 @@ SendReceive2(const unsigned int xid, struct cifsSesInfo *ses,
309 309
310 *pRespBufType = CIFS_NO_BUFFER; /* no response buf yet */ 310 *pRespBufType = CIFS_NO_BUFFER; /* no response buf yet */
311 311
312 if (ses == NULL) { 312 if ((ses == NULL) || (ses->server == NULL)) {
313 cERROR(1,("Null smb session")); 313 cifs_small_buf_release(in_buf);
314 return -EIO; 314 cERROR(1,("Null session"));
315 }
316 if(ses->server == NULL) {
317 cERROR(1,("Null tcp session"));
318 return -EIO; 315 return -EIO;
319 } 316 }
320 317
321 if(ses->server->tcpStatus == CifsExiting) 318 if(ses->server->tcpStatus == CifsExiting) {
319 cifs_small_buf_release(in_buf);
322 return -ENOENT; 320 return -ENOENT;
321 }
323 322
324 /* Ensure that we do not send more than 50 overlapping requests 323 /* Ensure that we do not send more than 50 overlapping requests
325 to the same server. We may make this configurable later or 324 to the same server. We may make this configurable later or
@@ -346,6 +345,7 @@ SendReceive2(const unsigned int xid, struct cifsSesInfo *ses,
346 } else { 345 } else {
347 if(ses->server->tcpStatus == CifsExiting) { 346 if(ses->server->tcpStatus == CifsExiting) {
348 spin_unlock(&GlobalMid_Lock); 347 spin_unlock(&GlobalMid_Lock);
348 cifs_small_buf_release(in_buf);
349 return -ENOENT; 349 return -ENOENT;
350 } 350 }
351 351
@@ -385,6 +385,7 @@ SendReceive2(const unsigned int xid, struct cifsSesInfo *ses,
385 midQ = AllocMidQEntry(in_buf, ses); 385 midQ = AllocMidQEntry(in_buf, ses);
386 if (midQ == NULL) { 386 if (midQ == NULL) {
387 up(&ses->server->tcpSem); 387 up(&ses->server->tcpSem);
388 cifs_small_buf_release(in_buf);
388 /* If not lock req, update # of requests on wire to server */ 389 /* If not lock req, update # of requests on wire to server */
389 if(long_op < 3) { 390 if(long_op < 3) {
390 atomic_dec(&ses->server->inFlight); 391 atomic_dec(&ses->server->inFlight);
@@ -408,14 +409,18 @@ SendReceive2(const unsigned int xid, struct cifsSesInfo *ses,
408 if(rc < 0) { 409 if(rc < 0) {
409 DeleteMidQEntry(midQ); 410 DeleteMidQEntry(midQ);
410 up(&ses->server->tcpSem); 411 up(&ses->server->tcpSem);
412 cifs_small_buf_release(in_buf);
411 /* If not lock req, update # of requests on wire to server */ 413 /* If not lock req, update # of requests on wire to server */
412 if(long_op < 3) { 414 if(long_op < 3) {
413 atomic_dec(&ses->server->inFlight); 415 atomic_dec(&ses->server->inFlight);
414 wake_up(&ses->server->request_q); 416 wake_up(&ses->server->request_q);
415 } 417 }
416 return rc; 418 return rc;
417 } else 419 } else {
418 up(&ses->server->tcpSem); 420 up(&ses->server->tcpSem);
421 cifs_small_buf_release(in_buf);
422 }
423
419 if (long_op == -1) 424 if (long_op == -1)
420 goto cifs_no_response_exit2; 425 goto cifs_no_response_exit2;
421 else if (long_op == 2) /* writes past end of file can take loong time */ 426 else if (long_op == 2) /* writes past end of file can take loong time */
@@ -543,6 +548,7 @@ cifs_no_response_exit2:
543 548
544out_unlock2: 549out_unlock2:
545 up(&ses->server->tcpSem); 550 up(&ses->server->tcpSem);
551 cifs_small_buf_release(in_buf);
546 /* If not lock req, update # of requests on wire to server */ 552 /* If not lock req, update # of requests on wire to server */
547 if(long_op < 3) { 553 if(long_op < 3) {
548 atomic_dec(&ses->server->inFlight); 554 atomic_dec(&ses->server->inFlight);
diff --git a/include/asm-arm/arch-ixp23xx/uncompress.h b/include/asm-arm/arch-ixp23xx/uncompress.h
index 62623fa9b2f7..013575e6a9a1 100644
--- a/include/asm-arm/arch-ixp23xx/uncompress.h
+++ b/include/asm-arm/arch-ixp23xx/uncompress.h
@@ -16,26 +16,21 @@
16 16
17#define UART_BASE ((volatile u32 *)IXP23XX_UART1_PHYS) 17#define UART_BASE ((volatile u32 *)IXP23XX_UART1_PHYS)
18 18
19static __inline__ void putc(char c) 19static inline void putc(char c)
20{ 20{
21 int j; 21 int j;
22 22
23 for (j = 0; j < 0x1000; j++) { 23 for (j = 0; j < 0x1000; j++) {
24 if (UART_BASE[UART_LSR] & UART_LSR_THRE) 24 if (UART_BASE[UART_LSR] & UART_LSR_THRE)
25 break; 25 break;
26 barrier();
26 } 27 }
27 28
28 UART_BASE[UART_TX] = c; 29 UART_BASE[UART_TX] = c;
29} 30}
30 31
31static void putstr(const char *s) 32static inline void flush(void)
32{ 33{
33 while (*s) {
34 putc(*s);
35 if (*s == '\n')
36 putc('\r');
37 s++;
38 }
39} 34}
40 35
41#define arch_decomp_setup() 36#define arch_decomp_setup()
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 1409c5bd703f..c8f53a71c076 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -485,7 +485,7 @@
485#define SACR1_ENLBF (1 << 5) /* Enable Loopback */ 485#define SACR1_ENLBF (1 << 5) /* Enable Loopback */
486#define SACR1_DRPL (1 << 4) /* Disable Replaying Function */ 486#define SACR1_DRPL (1 << 4) /* Disable Replaying Function */
487#define SACR1_DREC (1 << 3) /* Disable Recording Function */ 487#define SACR1_DREC (1 << 3) /* Disable Recording Function */
488#define SACR1_AMSL (1 << 1) /* Specify Alternate Mode */ 488#define SACR1_AMSL (1 << 0) /* Specify Alternate Mode */
489 489
490#define SASR0_I2SOFF (1 << 7) /* Controller Status */ 490#define SASR0_I2SOFF (1 << 7) /* Controller Status */
491#define SASR0_ROR (1 << 6) /* Rx FIFO Overrun */ 491#define SASR0_ROR (1 << 6) /* Rx FIFO Overrun */
diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h
index 8f331bbd39a8..65ac305c2d45 100644
--- a/include/asm-arm/unistd.h
+++ b/include/asm-arm/unistd.h
@@ -308,8 +308,6 @@
308#define __NR_mq_notify (__NR_SYSCALL_BASE+278) 308#define __NR_mq_notify (__NR_SYSCALL_BASE+278)
309#define __NR_mq_getsetattr (__NR_SYSCALL_BASE+279) 309#define __NR_mq_getsetattr (__NR_SYSCALL_BASE+279)
310#define __NR_waitid (__NR_SYSCALL_BASE+280) 310#define __NR_waitid (__NR_SYSCALL_BASE+280)
311
312#if defined(__ARM_EABI__) /* reserve these for un-muxing socketcall */
313#define __NR_socket (__NR_SYSCALL_BASE+281) 311#define __NR_socket (__NR_SYSCALL_BASE+281)
314#define __NR_bind (__NR_SYSCALL_BASE+282) 312#define __NR_bind (__NR_SYSCALL_BASE+282)
315#define __NR_connect (__NR_SYSCALL_BASE+283) 313#define __NR_connect (__NR_SYSCALL_BASE+283)
@@ -327,9 +325,6 @@
327#define __NR_getsockopt (__NR_SYSCALL_BASE+295) 325#define __NR_getsockopt (__NR_SYSCALL_BASE+295)
328#define __NR_sendmsg (__NR_SYSCALL_BASE+296) 326#define __NR_sendmsg (__NR_SYSCALL_BASE+296)
329#define __NR_recvmsg (__NR_SYSCALL_BASE+297) 327#define __NR_recvmsg (__NR_SYSCALL_BASE+297)
330#endif
331
332#if defined(__ARM_EABI__) /* reserve these for un-muxing ipc */
333#define __NR_semop (__NR_SYSCALL_BASE+298) 328#define __NR_semop (__NR_SYSCALL_BASE+298)
334#define __NR_semget (__NR_SYSCALL_BASE+299) 329#define __NR_semget (__NR_SYSCALL_BASE+299)
335#define __NR_semctl (__NR_SYSCALL_BASE+300) 330#define __NR_semctl (__NR_SYSCALL_BASE+300)
@@ -341,16 +336,10 @@
341#define __NR_shmdt (__NR_SYSCALL_BASE+306) 336#define __NR_shmdt (__NR_SYSCALL_BASE+306)
342#define __NR_shmget (__NR_SYSCALL_BASE+307) 337#define __NR_shmget (__NR_SYSCALL_BASE+307)
343#define __NR_shmctl (__NR_SYSCALL_BASE+308) 338#define __NR_shmctl (__NR_SYSCALL_BASE+308)
344#endif
345
346#define __NR_add_key (__NR_SYSCALL_BASE+309) 339#define __NR_add_key (__NR_SYSCALL_BASE+309)
347#define __NR_request_key (__NR_SYSCALL_BASE+310) 340#define __NR_request_key (__NR_SYSCALL_BASE+310)
348#define __NR_keyctl (__NR_SYSCALL_BASE+311) 341#define __NR_keyctl (__NR_SYSCALL_BASE+311)
349
350#if defined(__ARM_EABI__) /* reserved for un-muxing ipc */
351#define __NR_semtimedop (__NR_SYSCALL_BASE+312) 342#define __NR_semtimedop (__NR_SYSCALL_BASE+312)
352#endif
353
354#define __NR_vserver (__NR_SYSCALL_BASE+313) 343#define __NR_vserver (__NR_SYSCALL_BASE+313)
355#define __NR_ioprio_set (__NR_SYSCALL_BASE+314) 344#define __NR_ioprio_set (__NR_SYSCALL_BASE+314)
356#define __NR_ioprio_get (__NR_SYSCALL_BASE+315) 345#define __NR_ioprio_get (__NR_SYSCALL_BASE+315)
diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h
index 4e7e6f23b08c..37e52a2836b0 100644
--- a/include/asm-ia64/pal.h
+++ b/include/asm-ia64/pal.h
@@ -68,6 +68,7 @@
68#define PAL_SHUTDOWN 40 /* enter processor shutdown state */ 68#define PAL_SHUTDOWN 40 /* enter processor shutdown state */
69#define PAL_PREFETCH_VISIBILITY 41 /* Make Processor Prefetches Visible */ 69#define PAL_PREFETCH_VISIBILITY 41 /* Make Processor Prefetches Visible */
70#define PAL_LOGICAL_TO_PHYSICAL 42 /* returns information on logical to physical processor mapping */ 70#define PAL_LOGICAL_TO_PHYSICAL 42 /* returns information on logical to physical processor mapping */
71#define PAL_CACHE_SHARED_INFO 43 /* returns information on caches shared by logical processor */
71 72
72#define PAL_COPY_PAL 256 /* relocate PAL procedures and PAL PMI */ 73#define PAL_COPY_PAL 256 /* relocate PAL procedures and PAL PMI */
73#define PAL_HALT_INFO 257 /* return the low power capabilities of processor */ 74#define PAL_HALT_INFO 257 /* return the low power capabilities of processor */
@@ -130,7 +131,7 @@ typedef u64 pal_cache_line_state_t;
130#define PAL_CACHE_LINE_STATE_MODIFIED 3 /* Modified */ 131#define PAL_CACHE_LINE_STATE_MODIFIED 3 /* Modified */
131 132
132typedef struct pal_freq_ratio { 133typedef struct pal_freq_ratio {
133 u64 den : 32, num : 32; /* numerator & denominator */ 134 u32 den, num; /* numerator & denominator */
134} itc_ratio, proc_ratio; 135} itc_ratio, proc_ratio;
135 136
136typedef union pal_cache_config_info_1_s { 137typedef union pal_cache_config_info_1_s {
@@ -151,10 +152,10 @@ typedef union pal_cache_config_info_1_s {
151 152
152typedef union pal_cache_config_info_2_s { 153typedef union pal_cache_config_info_2_s {
153 struct { 154 struct {
154 u64 cache_size : 32, /*cache size in bytes*/ 155 u32 cache_size; /*cache size in bytes*/
155 156
156 157
157 alias_boundary : 8, /* 39-32 aliased addr 158 u32 alias_boundary : 8, /* 39-32 aliased addr
158 * separation for max 159 * separation for max
159 * performance. 160 * performance.
160 */ 161 */
@@ -1647,6 +1648,33 @@ ia64_pal_logical_to_phys(u64 proc_number, pal_logical_to_physical_t *mapping)
1647 1648
1648 return iprv.status; 1649 return iprv.status;
1649} 1650}
1651
1652typedef struct pal_cache_shared_info_s
1653{
1654 u64 num_shared;
1655 pal_proc_n_log_info1_t ppli1;
1656 pal_proc_n_log_info2_t ppli2;
1657} pal_cache_shared_info_t;
1658
1659/* Get information on logical to physical processor mappings. */
1660static inline s64
1661ia64_pal_cache_shared_info(u64 level,
1662 u64 type,
1663 u64 proc_number,
1664 pal_cache_shared_info_t *info)
1665{
1666 struct ia64_pal_retval iprv;
1667
1668 PAL_CALL(iprv, PAL_CACHE_SHARED_INFO, level, type, proc_number);
1669
1670 if (iprv.status == PAL_STATUS_SUCCESS) {
1671 info->num_shared = iprv.v0;
1672 info->ppli1.ppli1_data = iprv.v1;
1673 info->ppli2.ppli2_data = iprv.v2;
1674 }
1675
1676 return iprv.status;
1677}
1650#endif /* __ASSEMBLY__ */ 1678#endif /* __ASSEMBLY__ */
1651 1679
1652#endif /* _ASM_IA64_PAL_H */ 1680#endif /* _ASM_IA64_PAL_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-21 06:37:14 -0500