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-rw-r--r--arch/mips/au1000/common/pci.c18
-rw-r--r--include/asm-mips/mach-au1x00/au1000.h13
2 files changed, 18 insertions, 13 deletions
diff --git a/arch/mips/au1000/common/pci.c b/arch/mips/au1000/common/pci.c
index 9f8ce08e173b..6c25e6c09f78 100644
--- a/arch/mips/au1000/common/pci.c
+++ b/arch/mips/au1000/common/pci.c
@@ -76,13 +76,17 @@ static int __init au1x_pci_setup(void)
76 } 76 }
77 77
78#ifdef CONFIG_DMA_NONCOHERENT 78#ifdef CONFIG_DMA_NONCOHERENT
79 /* 79 {
80 * Set the NC bit in controller for Au1500 pre-AC silicon 80 /*
81 */ 81 * Set the NC bit in controller for Au1500 pre-AC silicon
82 u32 prid = read_c0_prid(); 82 */
83 if ( (prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) { 83 u32 prid = read_c0_prid();
84 au_writel( 1<<16 | au_readl(Au1500_PCI_CFG), Au1500_PCI_CFG); 84
85 printk("Non-coherent PCI accesses enabled\n"); 85 if ((prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) {
86 au_writel((1 << 16) | au_readl(Au1500_PCI_CFG),
87 Au1500_PCI_CFG);
88 printk("Non-coherent PCI accesses enabled\n");
89 }
86 } 90 }
87#endif 91#endif
88 92
diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h
index 582acd8adb81..43beeaa77b10 100644
--- a/include/asm-mips/mach-au1x00/au1000.h
+++ b/include/asm-mips/mach-au1x00/au1000.h
@@ -39,6 +39,7 @@
39#ifndef _LANGUAGE_ASSEMBLY 39#ifndef _LANGUAGE_ASSEMBLY
40 40
41#include <linux/delay.h> 41#include <linux/delay.h>
42#include <linux/types.h>
42#include <asm/io.h> 43#include <asm/io.h>
43 44
44/* cpu pipeline flush */ 45/* cpu pipeline flush */
@@ -1664,12 +1665,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
1664 * addresses. For PCI IO, it's simpler because we get to do the ioremap 1665 * addresses. For PCI IO, it's simpler because we get to do the ioremap
1665 * ourselves and then adjust the device's resources. 1666 * ourselves and then adjust the device's resources.
1666 */ 1667 */
1667#define Au1500_EXT_CFG 0x600000000ULL 1668#define Au1500_EXT_CFG ((resource_size_t) 0x600000000ULL)
1668#define Au1500_EXT_CFG_TYPE1 0x680000000ULL 1669#define Au1500_EXT_CFG_TYPE1 ((resource_size_t) 0x680000000ULL)
1669#define Au1500_PCI_IO_START 0x500000000ULL 1670#define Au1500_PCI_IO_START ((resource_size_t) 0x500000000ULL)
1670#define Au1500_PCI_IO_END 0x5000FFFFFULL 1671#define Au1500_PCI_IO_END ((resource_size_t) 0x5000FFFFFULL)
1671#define Au1500_PCI_MEM_START 0x440000000ULL 1672#define Au1500_PCI_MEM_START ((resource_size_t) 0x440000000ULL)
1672#define Au1500_PCI_MEM_END 0x44FFFFFFFULL 1673#define Au1500_PCI_MEM_END ((resource_size_t) 0x44FFFFFFFULL)
1673 1674
1674#define PCI_IO_START (Au1500_PCI_IO_START + 0x1000) 1675#define PCI_IO_START (Au1500_PCI_IO_START + 0x1000)
1675#define PCI_IO_END (Au1500_PCI_IO_END) 1676#define PCI_IO_END (Au1500_PCI_IO_END)