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-rw-r--r--arch/mips/kernel/traps.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index f6083c6bfaa4..fa06460cbf2c 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1582,7 +1582,11 @@ void __init set_handler(unsigned long offset, void *addr, unsigned long size)
1582static char panic_null_cerr[] __cpuinitdata = 1582static char panic_null_cerr[] __cpuinitdata =
1583 "Trying to set NULL cache error exception handler"; 1583 "Trying to set NULL cache error exception handler";
1584 1584
1585/* Install uncached CPU exception handler */ 1585/*
1586 * Install uncached CPU exception handler.
1587 * This is suitable only for the cache error exception which is the only
1588 * exception handler that is being run uncached.
1589 */
1586void __cpuinit set_uncached_handler(unsigned long offset, void *addr, 1590void __cpuinit set_uncached_handler(unsigned long offset, void *addr,
1587 unsigned long size) 1591 unsigned long size)
1588{ 1592{
@@ -1593,7 +1597,7 @@ void __cpuinit set_uncached_handler(unsigned long offset, void *addr,
1593 unsigned long uncached_ebase = TO_UNCAC(ebase); 1597 unsigned long uncached_ebase = TO_UNCAC(ebase);
1594#endif 1598#endif
1595 if (cpu_has_mips_r2) 1599 if (cpu_has_mips_r2)
1596 ebase += (read_c0_ebase() & 0x3ffff000); 1600 uncached_ebase += (read_c0_ebase() & 0x3ffff000);
1597 1601
1598 if (!addr) 1602 if (!addr)
1599 panic(panic_null_cerr); 1603 panic(panic_null_cerr);