diff options
-rw-r--r-- | arch/x86/oprofile/op_model_amd.c | 31 | ||||
-rw-r--r-- | drivers/oprofile/cpu_buffer.c | 25 |
2 files changed, 32 insertions, 24 deletions
diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c index 509513760a6e..fb67e1999d85 100644 --- a/arch/x86/oprofile/op_model_amd.c +++ b/arch/x86/oprofile/op_model_amd.c | |||
@@ -65,8 +65,10 @@ static unsigned long reset_value[NUM_COUNTERS]; | |||
65 | #define IBS_FETCH_BEGIN 3 | 65 | #define IBS_FETCH_BEGIN 3 |
66 | #define IBS_OP_BEGIN 4 | 66 | #define IBS_OP_BEGIN 4 |
67 | 67 | ||
68 | /* The function interface needs to be fixed, something like add | 68 | /* |
69 | data. Should then be added to linux/oprofile.h. */ | 69 | * The function interface needs to be fixed, something like add |
70 | * data. Should then be added to linux/oprofile.h. | ||
71 | */ | ||
70 | extern void | 72 | extern void |
71 | oprofile_add_ibs_sample(struct pt_regs *const regs, | 73 | oprofile_add_ibs_sample(struct pt_regs *const regs, |
72 | unsigned int *const ibs_sample, int ibs_code); | 74 | unsigned int *const ibs_sample, int ibs_code); |
@@ -106,7 +108,7 @@ struct ibs_op_sample { | |||
106 | 108 | ||
107 | /* | 109 | /* |
108 | * unitialize the APIC for the IBS interrupts if needed on AMD Family10h+ | 110 | * unitialize the APIC for the IBS interrupts if needed on AMD Family10h+ |
109 | */ | 111 | */ |
110 | static void clear_ibs_nmi(void); | 112 | static void clear_ibs_nmi(void); |
111 | 113 | ||
112 | static int ibs_allowed; /* AMD Family10h and later */ | 114 | static int ibs_allowed; /* AMD Family10h and later */ |
@@ -223,7 +225,7 @@ op_amd_handle_ibs(struct pt_regs * const regs, | |||
223 | (unsigned int *)&ibs_fetch, | 225 | (unsigned int *)&ibs_fetch, |
224 | IBS_FETCH_BEGIN); | 226 | IBS_FETCH_BEGIN); |
225 | 227 | ||
226 | /*reenable the IRQ */ | 228 | /* reenable the IRQ */ |
227 | rdmsr(MSR_AMD64_IBSFETCHCTL, low, high); | 229 | rdmsr(MSR_AMD64_IBSFETCHCTL, low, high); |
228 | high &= ~IBS_FETCH_HIGH_VALID_BIT; | 230 | high &= ~IBS_FETCH_HIGH_VALID_BIT; |
229 | high |= IBS_FETCH_HIGH_ENABLE; | 231 | high |= IBS_FETCH_HIGH_ENABLE; |
@@ -331,8 +333,10 @@ static void op_amd_stop(struct op_msrs const * const msrs) | |||
331 | unsigned int low, high; | 333 | unsigned int low, high; |
332 | int i; | 334 | int i; |
333 | 335 | ||
334 | /* Subtle: stop on all counters to avoid race with | 336 | /* |
335 | * setting our pm callback */ | 337 | * Subtle: stop on all counters to avoid race with setting our |
338 | * pm callback | ||
339 | */ | ||
336 | for (i = 0 ; i < NUM_COUNTERS ; ++i) { | 340 | for (i = 0 ; i < NUM_COUNTERS ; ++i) { |
337 | if (!reset_value[i]) | 341 | if (!reset_value[i]) |
338 | continue; | 342 | continue; |
@@ -343,13 +347,15 @@ static void op_amd_stop(struct op_msrs const * const msrs) | |||
343 | 347 | ||
344 | #ifdef CONFIG_OPROFILE_IBS | 348 | #ifdef CONFIG_OPROFILE_IBS |
345 | if (ibs_allowed && ibs_config.fetch_enabled) { | 349 | if (ibs_allowed && ibs_config.fetch_enabled) { |
346 | low = 0; /* clear max count and enable */ | 350 | /* clear max count and enable */ |
351 | low = 0; | ||
347 | high = 0; | 352 | high = 0; |
348 | wrmsr(MSR_AMD64_IBSFETCHCTL, low, high); | 353 | wrmsr(MSR_AMD64_IBSFETCHCTL, low, high); |
349 | } | 354 | } |
350 | 355 | ||
351 | if (ibs_allowed && ibs_config.op_enabled) { | 356 | if (ibs_allowed && ibs_config.op_enabled) { |
352 | low = 0; /* clear max count and enable */ | 357 | /* clear max count and enable */ |
358 | low = 0; | ||
353 | high = 0; | 359 | high = 0; |
354 | wrmsr(MSR_AMD64_IBSOPCTL, low, high); | 360 | wrmsr(MSR_AMD64_IBSOPCTL, low, high); |
355 | } | 361 | } |
@@ -443,10 +449,7 @@ static int pfm_amd64_setup_eilvt(void) | |||
443 | return 0; | 449 | return 0; |
444 | } | 450 | } |
445 | 451 | ||
446 | /* | 452 | /* initialize the APIC for the IBS interrupts if available */ |
447 | * initialize the APIC for the IBS interrupts | ||
448 | * if available (AMD Family10h rev B0 and later) | ||
449 | */ | ||
450 | static void setup_ibs(void) | 453 | static void setup_ibs(void) |
451 | { | 454 | { |
452 | ibs_allowed = boot_cpu_has(X86_FEATURE_IBS); | 455 | ibs_allowed = boot_cpu_has(X86_FEATURE_IBS); |
@@ -463,9 +466,7 @@ static void setup_ibs(void) | |||
463 | } | 466 | } |
464 | 467 | ||
465 | 468 | ||
466 | /* | 469 | /* uninitialize the APIC for the IBS interrupts if needed */ |
467 | * unitialize the APIC for the IBS interrupts if needed on AMD Family10h | ||
468 | * rev B0 and later */ | ||
469 | static void clear_ibs_nmi(void) | 470 | static void clear_ibs_nmi(void) |
470 | { | 471 | { |
471 | if (ibs_allowed) | 472 | if (ibs_allowed) |
diff --git a/drivers/oprofile/cpu_buffer.c b/drivers/oprofile/cpu_buffer.c index 01d38e78cde1..3958107723fb 100644 --- a/drivers/oprofile/cpu_buffer.c +++ b/drivers/oprofile/cpu_buffer.c | |||
@@ -127,9 +127,10 @@ void end_cpu_work(void) | |||
127 | /* Resets the cpu buffer to a sane state. */ | 127 | /* Resets the cpu buffer to a sane state. */ |
128 | void cpu_buffer_reset(struct oprofile_cpu_buffer *cpu_buf) | 128 | void cpu_buffer_reset(struct oprofile_cpu_buffer *cpu_buf) |
129 | { | 129 | { |
130 | /* reset these to invalid values; the next sample | 130 | /* |
131 | * collected will populate the buffer with proper | 131 | * reset these to invalid values; the next sample collected |
132 | * values to initialize the buffer | 132 | * will populate the buffer with proper values to initialize |
133 | * the buffer | ||
133 | */ | 134 | */ |
134 | cpu_buf->last_is_kernel = -1; | 135 | cpu_buf->last_is_kernel = -1; |
135 | cpu_buf->last_task = NULL; | 136 | cpu_buf->last_task = NULL; |
@@ -151,8 +152,10 @@ static void increment_head(struct oprofile_cpu_buffer *b) | |||
151 | { | 152 | { |
152 | unsigned long new_head = b->head_pos + 1; | 153 | unsigned long new_head = b->head_pos + 1; |
153 | 154 | ||
154 | /* Ensure anything written to the slot before we | 155 | /* |
155 | * increment is visible */ | 156 | * Ensure anything written to the slot before we increment is |
157 | * visible | ||
158 | */ | ||
156 | wmb(); | 159 | wmb(); |
157 | 160 | ||
158 | if (new_head < b->buffer_size) | 161 | if (new_head < b->buffer_size) |
@@ -253,8 +256,10 @@ void oprofile_add_ext_sample(unsigned long pc, struct pt_regs * const regs, | |||
253 | if (!oprofile_begin_trace(cpu_buf)) | 256 | if (!oprofile_begin_trace(cpu_buf)) |
254 | return; | 257 | return; |
255 | 258 | ||
256 | /* if log_sample() fail we can't backtrace since we lost the source | 259 | /* |
257 | * of this event */ | 260 | * if log_sample() fail we can't backtrace since we lost the |
261 | * source of this event | ||
262 | */ | ||
258 | if (log_sample(cpu_buf, pc, is_kernel, event)) | 263 | if (log_sample(cpu_buf, pc, is_kernel, event)) |
259 | oprofile_ops.backtrace(regs, backtrace_depth); | 264 | oprofile_ops.backtrace(regs, backtrace_depth); |
260 | oprofile_end_trace(cpu_buf); | 265 | oprofile_end_trace(cpu_buf); |
@@ -338,8 +343,10 @@ void oprofile_add_trace(unsigned long pc) | |||
338 | return; | 343 | return; |
339 | } | 344 | } |
340 | 345 | ||
341 | /* broken frame can give an eip with the same value as an escape code, | 346 | /* |
342 | * abort the trace if we get it */ | 347 | * broken frame can give an eip with the same value as an |
348 | * escape code, abort the trace if we get it | ||
349 | */ | ||
343 | if (pc == ESCAPE_CODE) { | 350 | if (pc == ESCAPE_CODE) { |
344 | cpu_buf->tracing = 0; | 351 | cpu_buf->tracing = 0; |
345 | cpu_buf->backtrace_aborted++; | 352 | cpu_buf->backtrace_aborted++; |