diff options
-rw-r--r-- | arch/mips/Kconfig | 9 | ||||
-rw-r--r-- | arch/mips/cobalt/setup.c | 6 | ||||
-rw-r--r-- | arch/mips/jazz/setup.c | 6 | ||||
-rw-r--r-- | arch/mips/kernel/Makefile | 1 | ||||
-rw-r--r-- | arch/mips/kernel/i8253.c | 213 | ||||
-rw-r--r-- | arch/mips/mips-boards/generic/time.c | 4 | ||||
-rw-r--r-- | arch/mips/qemu/q-setup.c | 9 | ||||
-rw-r--r-- | arch/mips/sgi-ip22/ip22-time.c | 4 | ||||
-rw-r--r-- | arch/mips/sni/time.c | 3 | ||||
-rw-r--r-- | include/asm-mips/i8253.h | 30 |
10 files changed, 280 insertions, 5 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index d8c905840af5..f943736541cb 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -65,6 +65,7 @@ config MIPS_COBALT | |||
65 | bool "Cobalt Server" | 65 | bool "Cobalt Server" |
66 | select DMA_NONCOHERENT | 66 | select DMA_NONCOHERENT |
67 | select HW_HAS_PCI | 67 | select HW_HAS_PCI |
68 | select I8253 | ||
68 | select I8259 | 69 | select I8259 |
69 | select IRQ_CPU | 70 | select IRQ_CPU |
70 | select IRQ_GT641XX | 71 | select IRQ_GT641XX |
@@ -112,6 +113,7 @@ config MACH_JAZZ | |||
112 | select ARCH_MAY_HAVE_PC_FDC | 113 | select ARCH_MAY_HAVE_PC_FDC |
113 | select GENERIC_ISA_DMA | 114 | select GENERIC_ISA_DMA |
114 | select IRQ_CPU | 115 | select IRQ_CPU |
116 | select I8253 | ||
115 | select I8259 | 117 | select I8259 |
116 | select ISA | 118 | select ISA |
117 | select PCSPEAKER | 119 | select PCSPEAKER |
@@ -201,6 +203,7 @@ config MIPS_MALTA | |||
201 | select GENERIC_ISA_DMA | 203 | select GENERIC_ISA_DMA |
202 | select IRQ_CPU | 204 | select IRQ_CPU |
203 | select HW_HAS_PCI | 205 | select HW_HAS_PCI |
206 | select I8253 | ||
204 | select I8259 | 207 | select I8259 |
205 | select MIPS_BOARDS_GEN | 208 | select MIPS_BOARDS_GEN |
206 | select MIPS_BONITO64 | 209 | select MIPS_BONITO64 |
@@ -334,6 +337,7 @@ config QEMU | |||
334 | select DMA_COHERENT | 337 | select DMA_COHERENT |
335 | select GENERIC_ISA_DMA | 338 | select GENERIC_ISA_DMA |
336 | select HAVE_STD_PC_SERIAL_PORT | 339 | select HAVE_STD_PC_SERIAL_PORT |
340 | select I8253 | ||
337 | select I8259 | 341 | select I8259 |
338 | select IRQ_CPU | 342 | select IRQ_CPU |
339 | select ISA | 343 | select ISA |
@@ -362,6 +366,7 @@ config SGI_IP22 | |||
362 | select BOOT_ELF32 | 366 | select BOOT_ELF32 |
363 | select DMA_NONCOHERENT | 367 | select DMA_NONCOHERENT |
364 | select HW_HAS_EISA | 368 | select HW_HAS_EISA |
369 | select I8253 | ||
365 | select IP22_CPU_SCACHE | 370 | select IP22_CPU_SCACHE |
366 | select IRQ_CPU | 371 | select IRQ_CPU |
367 | select GENERIC_ISA_DMA_SUPPORT_BROKEN | 372 | select GENERIC_ISA_DMA_SUPPORT_BROKEN |
@@ -534,6 +539,7 @@ config SNI_RM | |||
534 | select HW_HAS_EISA | 539 | select HW_HAS_EISA |
535 | select HW_HAS_PCI | 540 | select HW_HAS_PCI |
536 | select IRQ_CPU | 541 | select IRQ_CPU |
542 | select I8253 | ||
537 | select I8259 | 543 | select I8259 |
538 | select ISA | 544 | select ISA |
539 | select PCSPEAKER | 545 | select PCSPEAKER |
@@ -1893,6 +1899,9 @@ config MMU | |||
1893 | bool | 1899 | bool |
1894 | default y | 1900 | default y |
1895 | 1901 | ||
1902 | config I8253 | ||
1903 | bool | ||
1904 | |||
1896 | config PCSPEAKER | 1905 | config PCSPEAKER |
1897 | bool | 1906 | bool |
1898 | 1907 | ||
diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c index 5d2e8790b28b..345e4ae998df 100644 --- a/arch/mips/cobalt/setup.c +++ b/arch/mips/cobalt/setup.c | |||
@@ -15,6 +15,7 @@ | |||
15 | 15 | ||
16 | #include <asm/bootinfo.h> | 16 | #include <asm/bootinfo.h> |
17 | #include <asm/time.h> | 17 | #include <asm/time.h> |
18 | #include <asm/i8253.h> | ||
18 | #include <asm/io.h> | 19 | #include <asm/io.h> |
19 | #include <asm/reboot.h> | 20 | #include <asm/reboot.h> |
20 | #include <asm/gt64120.h> | 21 | #include <asm/gt64120.h> |
@@ -84,6 +85,11 @@ static struct resource cobalt_reserved_resources[] = { | |||
84 | }, | 85 | }, |
85 | }; | 86 | }; |
86 | 87 | ||
88 | void __init plat_time_init(void) | ||
89 | { | ||
90 | setup_pit_timer(); | ||
91 | } | ||
92 | |||
87 | void __init plat_mem_setup(void) | 93 | void __init plat_mem_setup(void) |
88 | { | 94 | { |
89 | int i; | 95 | int i; |
diff --git a/arch/mips/jazz/setup.c b/arch/mips/jazz/setup.c index fa890df36589..2a7ec08b6bad 100644 --- a/arch/mips/jazz/setup.c +++ b/arch/mips/jazz/setup.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/serial_8250.h> | 25 | #include <linux/serial_8250.h> |
26 | 26 | ||
27 | #include <asm/bootinfo.h> | 27 | #include <asm/bootinfo.h> |
28 | #include <asm/i8253.h> | ||
28 | #include <asm/irq.h> | 29 | #include <asm/irq.h> |
29 | #include <asm/jazz.h> | 30 | #include <asm/jazz.h> |
30 | #include <asm/jazzdma.h> | 31 | #include <asm/jazzdma.h> |
@@ -63,6 +64,11 @@ static struct resource jazz_io_resources[] = { | |||
63 | } | 64 | } |
64 | }; | 65 | }; |
65 | 66 | ||
67 | void __init plat_time_init(void) | ||
68 | { | ||
69 | setup_pit_timer(); | ||
70 | } | ||
71 | |||
66 | void __init plat_mem_setup(void) | 72 | void __init plat_mem_setup(void) |
67 | { | 73 | { |
68 | int i; | 74 | int i; |
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index 7851b4b447d0..a2689f93c160 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile | |||
@@ -65,6 +65,7 @@ obj-$(CONFIG_PROC_FS) += proc.o | |||
65 | 65 | ||
66 | obj-$(CONFIG_64BIT) += cpu-bugs64.o | 66 | obj-$(CONFIG_64BIT) += cpu-bugs64.o |
67 | 67 | ||
68 | obj-$(CONFIG_I8253) += i8253.o | ||
68 | obj-$(CONFIG_PCSPEAKER) += pcspeaker.o | 69 | obj-$(CONFIG_PCSPEAKER) += pcspeaker.o |
69 | 70 | ||
70 | obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o | 71 | obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o |
diff --git a/arch/mips/kernel/i8253.c b/arch/mips/kernel/i8253.c new file mode 100644 index 000000000000..5d9830df3595 --- /dev/null +++ b/arch/mips/kernel/i8253.c | |||
@@ -0,0 +1,213 @@ | |||
1 | /* | ||
2 | * i8253.c 8253/PIT functions | ||
3 | * | ||
4 | */ | ||
5 | #include <linux/clockchips.h> | ||
6 | #include <linux/init.h> | ||
7 | #include <linux/interrupt.h> | ||
8 | #include <linux/jiffies.h> | ||
9 | #include <linux/module.h> | ||
10 | #include <linux/spinlock.h> | ||
11 | |||
12 | #include <asm/delay.h> | ||
13 | #include <asm/i8253.h> | ||
14 | #include <asm/io.h> | ||
15 | |||
16 | static DEFINE_SPINLOCK(i8253_lock); | ||
17 | |||
18 | /* | ||
19 | * Initialize the PIT timer. | ||
20 | * | ||
21 | * This is also called after resume to bring the PIT into operation again. | ||
22 | */ | ||
23 | static void init_pit_timer(enum clock_event_mode mode, | ||
24 | struct clock_event_device *evt) | ||
25 | { | ||
26 | unsigned long flags; | ||
27 | |||
28 | spin_lock_irqsave(&i8253_lock, flags); | ||
29 | |||
30 | switch(mode) { | ||
31 | case CLOCK_EVT_MODE_PERIODIC: | ||
32 | /* binary, mode 2, LSB/MSB, ch 0 */ | ||
33 | outb_p(0x34, PIT_MODE); | ||
34 | outb_p(LATCH & 0xff , PIT_CH0); /* LSB */ | ||
35 | outb(LATCH >> 8 , PIT_CH0); /* MSB */ | ||
36 | break; | ||
37 | |||
38 | case CLOCK_EVT_MODE_SHUTDOWN: | ||
39 | case CLOCK_EVT_MODE_UNUSED: | ||
40 | if (evt->mode == CLOCK_EVT_MODE_PERIODIC || | ||
41 | evt->mode == CLOCK_EVT_MODE_ONESHOT) { | ||
42 | outb_p(0x30, PIT_MODE); | ||
43 | outb_p(0, PIT_CH0); | ||
44 | outb_p(0, PIT_CH0); | ||
45 | } | ||
46 | break; | ||
47 | |||
48 | case CLOCK_EVT_MODE_ONESHOT: | ||
49 | /* One shot setup */ | ||
50 | outb_p(0x38, PIT_MODE); | ||
51 | break; | ||
52 | |||
53 | case CLOCK_EVT_MODE_RESUME: | ||
54 | /* Nothing to do here */ | ||
55 | break; | ||
56 | } | ||
57 | spin_unlock_irqrestore(&i8253_lock, flags); | ||
58 | } | ||
59 | |||
60 | /* | ||
61 | * Program the next event in oneshot mode | ||
62 | * | ||
63 | * Delta is given in PIT ticks | ||
64 | */ | ||
65 | static int pit_next_event(unsigned long delta, struct clock_event_device *evt) | ||
66 | { | ||
67 | unsigned long flags; | ||
68 | |||
69 | spin_lock_irqsave(&i8253_lock, flags); | ||
70 | outb_p(delta & 0xff , PIT_CH0); /* LSB */ | ||
71 | outb(delta >> 8 , PIT_CH0); /* MSB */ | ||
72 | spin_unlock_irqrestore(&i8253_lock, flags); | ||
73 | |||
74 | return 0; | ||
75 | } | ||
76 | |||
77 | /* | ||
78 | * On UP the PIT can serve all of the possible timer functions. On SMP systems | ||
79 | * it can be solely used for the global tick. | ||
80 | * | ||
81 | * The profiling and update capabilites are switched off once the local apic is | ||
82 | * registered. This mechanism replaces the previous #ifdef LOCAL_APIC - | ||
83 | * !using_apic_timer decisions in do_timer_interrupt_hook() | ||
84 | */ | ||
85 | struct clock_event_device pit_clockevent = { | ||
86 | .name = "pit", | ||
87 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | ||
88 | .set_mode = init_pit_timer, | ||
89 | .set_next_event = pit_next_event, | ||
90 | .shift = 32, | ||
91 | .irq = 0, | ||
92 | }; | ||
93 | |||
94 | irqreturn_t timer_interrupt(int irq, void *dev_id) | ||
95 | { | ||
96 | pit_clockevent.event_handler(&pit_clockevent); | ||
97 | |||
98 | return IRQ_HANDLED; | ||
99 | } | ||
100 | |||
101 | static struct irqaction irq0 = { | ||
102 | .handler = timer_interrupt, | ||
103 | .flags = IRQF_DISABLED | IRQF_NOBALANCING, | ||
104 | .mask = CPU_MASK_NONE, | ||
105 | .name = "timer" | ||
106 | }; | ||
107 | |||
108 | /* | ||
109 | * Initialize the conversion factor and the min/max deltas of the clock event | ||
110 | * structure and register the clock event source with the framework. | ||
111 | */ | ||
112 | void __init setup_pit_timer(void) | ||
113 | { | ||
114 | /* | ||
115 | * Start pit with the boot cpu mask and make it global after the | ||
116 | * IO_APIC has been initialized. | ||
117 | */ | ||
118 | pit_clockevent.cpumask = cpumask_of_cpu(0); | ||
119 | pit_clockevent.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, 32); | ||
120 | pit_clockevent.max_delta_ns = | ||
121 | clockevent_delta2ns(0x7FFF, &pit_clockevent); | ||
122 | pit_clockevent.min_delta_ns = | ||
123 | clockevent_delta2ns(0xF, &pit_clockevent); | ||
124 | clockevents_register_device(&pit_clockevent); | ||
125 | |||
126 | irq0.mask = cpumask_of_cpu(0); | ||
127 | setup_irq(0, &irq0); | ||
128 | } | ||
129 | |||
130 | /* | ||
131 | * Since the PIT overflows every tick, its not very useful | ||
132 | * to just read by itself. So use jiffies to emulate a free | ||
133 | * running counter: | ||
134 | */ | ||
135 | static cycle_t pit_read(void) | ||
136 | { | ||
137 | unsigned long flags; | ||
138 | int count; | ||
139 | u32 jifs; | ||
140 | static int old_count; | ||
141 | static u32 old_jifs; | ||
142 | |||
143 | spin_lock_irqsave(&i8253_lock, flags); | ||
144 | /* | ||
145 | * Although our caller may have the read side of xtime_lock, | ||
146 | * this is now a seqlock, and we are cheating in this routine | ||
147 | * by having side effects on state that we cannot undo if | ||
148 | * there is a collision on the seqlock and our caller has to | ||
149 | * retry. (Namely, old_jifs and old_count.) So we must treat | ||
150 | * jiffies as volatile despite the lock. We read jiffies | ||
151 | * before latching the timer count to guarantee that although | ||
152 | * the jiffies value might be older than the count (that is, | ||
153 | * the counter may underflow between the last point where | ||
154 | * jiffies was incremented and the point where we latch the | ||
155 | * count), it cannot be newer. | ||
156 | */ | ||
157 | jifs = jiffies; | ||
158 | outb_p(0x00, PIT_MODE); /* latch the count ASAP */ | ||
159 | count = inb_p(PIT_CH0); /* read the latched count */ | ||
160 | count |= inb_p(PIT_CH0) << 8; | ||
161 | |||
162 | /* VIA686a test code... reset the latch if count > max + 1 */ | ||
163 | if (count > LATCH) { | ||
164 | outb_p(0x34, PIT_MODE); | ||
165 | outb_p(LATCH & 0xff, PIT_CH0); | ||
166 | outb(LATCH >> 8, PIT_CH0); | ||
167 | count = LATCH - 1; | ||
168 | } | ||
169 | |||
170 | /* | ||
171 | * It's possible for count to appear to go the wrong way for a | ||
172 | * couple of reasons: | ||
173 | * | ||
174 | * 1. The timer counter underflows, but we haven't handled the | ||
175 | * resulting interrupt and incremented jiffies yet. | ||
176 | * 2. Hardware problem with the timer, not giving us continuous time, | ||
177 | * the counter does small "jumps" upwards on some Pentium systems, | ||
178 | * (see c't 95/10 page 335 for Neptun bug.) | ||
179 | * | ||
180 | * Previous attempts to handle these cases intelligently were | ||
181 | * buggy, so we just do the simple thing now. | ||
182 | */ | ||
183 | if (count > old_count && jifs == old_jifs) { | ||
184 | count = old_count; | ||
185 | } | ||
186 | old_count = count; | ||
187 | old_jifs = jifs; | ||
188 | |||
189 | spin_unlock_irqrestore(&i8253_lock, flags); | ||
190 | |||
191 | count = (LATCH - 1) - count; | ||
192 | |||
193 | return (cycle_t)(jifs * LATCH) + count; | ||
194 | } | ||
195 | |||
196 | static struct clocksource clocksource_pit = { | ||
197 | .name = "pit", | ||
198 | .rating = 110, | ||
199 | .read = pit_read, | ||
200 | .mask = CLOCKSOURCE_MASK(32), | ||
201 | .mult = 0, | ||
202 | .shift = 20, | ||
203 | }; | ||
204 | |||
205 | static int __init init_pit_clocksource(void) | ||
206 | { | ||
207 | if (num_possible_cpus() > 1) /* PIT does not scale! */ | ||
208 | return 0; | ||
209 | |||
210 | clocksource_pit.mult = clocksource_hz2mult(CLOCK_TICK_RATE, 20); | ||
211 | return clocksource_register(&clocksource_pit); | ||
212 | } | ||
213 | arch_initcall(init_pit_clocksource); | ||
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c index cf55ecd96bf4..4fab3b2e8736 100644 --- a/arch/mips/mips-boards/generic/time.c +++ b/arch/mips/mips-boards/generic/time.c | |||
@@ -31,6 +31,7 @@ | |||
31 | #include <asm/mipsregs.h> | 31 | #include <asm/mipsregs.h> |
32 | #include <asm/mipsmtregs.h> | 32 | #include <asm/mipsmtregs.h> |
33 | #include <asm/hardirq.h> | 33 | #include <asm/hardirq.h> |
34 | #include <asm/i8253.h> | ||
34 | #include <asm/irq.h> | 35 | #include <asm/irq.h> |
35 | #include <asm/div64.h> | 36 | #include <asm/div64.h> |
36 | #include <asm/cpu.h> | 37 | #include <asm/cpu.h> |
@@ -141,6 +142,9 @@ void __init plat_time_init(void) | |||
141 | cpu_khz = est_freq / 1000; | 142 | cpu_khz = est_freq / 1000; |
142 | 143 | ||
143 | mips_scroll_message(); | 144 | mips_scroll_message(); |
145 | #ifdef CONFIG_I8253 /* Only Malta has a PIT */ | ||
146 | setup_pit_timer(); | ||
147 | #endif | ||
144 | } | 148 | } |
145 | 149 | ||
146 | //static irqreturn_t mips_perf_interrupt(int irq, void *dev_id) | 150 | //static irqreturn_t mips_perf_interrupt(int irq, void *dev_id) |
diff --git a/arch/mips/qemu/q-setup.c b/arch/mips/qemu/q-setup.c index 89a207650ce9..23d34c1917c0 100644 --- a/arch/mips/qemu/q-setup.c +++ b/arch/mips/qemu/q-setup.c | |||
@@ -1,4 +1,6 @@ | |||
1 | #include <linux/init.h> | 1 | #include <linux/init.h> |
2 | |||
3 | #include <asm/i8253.h> | ||
2 | #include <asm/io.h> | 4 | #include <asm/io.h> |
3 | #include <asm/time.h> | 5 | #include <asm/time.h> |
4 | 6 | ||
@@ -11,12 +13,9 @@ const char *get_system_type(void) | |||
11 | return "Qemu"; | 13 | return "Qemu"; |
12 | } | 14 | } |
13 | 15 | ||
14 | void __init plat_timer_setup(struct irqaction *irq) | 16 | void __init plat_time_init(void) |
15 | { | 17 | { |
16 | /* set the clock to 100 Hz */ | 18 | setup_pit_timer(); |
17 | outb_p(0x34,0x43); /* binary, mode 2, LSB/MSB, ch 0 */ | ||
18 | outb_p(LATCH & 0xff , 0x40); /* LSB */ | ||
19 | outb(LATCH >> 8 , 0x40); /* MSB */ | ||
20 | } | 19 | } |
21 | 20 | ||
22 | void __init plat_mem_setup(void) | 21 | void __init plat_mem_setup(void) |
diff --git a/arch/mips/sgi-ip22/ip22-time.c b/arch/mips/sgi-ip22/ip22-time.c index a1df1f9e26fa..9b9bffd2e8fb 100644 --- a/arch/mips/sgi-ip22/ip22-time.c +++ b/arch/mips/sgi-ip22/ip22-time.c | |||
@@ -20,6 +20,7 @@ | |||
20 | 20 | ||
21 | #include <asm/cpu.h> | 21 | #include <asm/cpu.h> |
22 | #include <asm/mipsregs.h> | 22 | #include <asm/mipsregs.h> |
23 | #include <asm/i8253.h> | ||
23 | #include <asm/io.h> | 24 | #include <asm/io.h> |
24 | #include <asm/irq.h> | 25 | #include <asm/irq.h> |
25 | #include <asm/time.h> | 26 | #include <asm/time.h> |
@@ -172,6 +173,9 @@ __init void plat_time_init(void) | |||
172 | (int) (r4k_tick % (500000 / HZ))); | 173 | (int) (r4k_tick % (500000 / HZ))); |
173 | 174 | ||
174 | mips_hpt_frequency = r4k_tick * HZ; | 175 | mips_hpt_frequency = r4k_tick * HZ; |
176 | |||
177 | if (ip22_is_fullhouse()) | ||
178 | setup_pit_timer(); | ||
175 | } | 179 | } |
176 | 180 | ||
177 | /* Generic SGI handler for (spurious) 8254 interrupts */ | 181 | /* Generic SGI handler for (spurious) 8254 interrupts */ |
diff --git a/arch/mips/sni/time.c b/arch/mips/sni/time.c index 92452d677d8f..153f065434ea 100644 --- a/arch/mips/sni/time.c +++ b/arch/mips/sni/time.c | |||
@@ -2,6 +2,7 @@ | |||
2 | #include <linux/interrupt.h> | 2 | #include <linux/interrupt.h> |
3 | #include <linux/time.h> | 3 | #include <linux/time.h> |
4 | 4 | ||
5 | #include <asm/i8253.h> | ||
5 | #include <asm/sni.h> | 6 | #include <asm/sni.h> |
6 | #include <asm/time.h> | 7 | #include <asm/time.h> |
7 | #include <asm-generic/rtc.h> | 8 | #include <asm-generic/rtc.h> |
@@ -116,6 +117,8 @@ void __init plat_time_init(void) | |||
116 | (int) (r4k_tick % (500000 / HZ))); | 117 | (int) (r4k_tick % (500000 / HZ))); |
117 | 118 | ||
118 | mips_hpt_frequency = r4k_tick * HZ; | 119 | mips_hpt_frequency = r4k_tick * HZ; |
120 | |||
121 | setup_pit_timer(); | ||
119 | } | 122 | } |
120 | 123 | ||
121 | /* | 124 | /* |
diff --git a/include/asm-mips/i8253.h b/include/asm-mips/i8253.h new file mode 100644 index 000000000000..8f689d7df6b1 --- /dev/null +++ b/include/asm-mips/i8253.h | |||
@@ -0,0 +1,30 @@ | |||
1 | /* | ||
2 | * Machine specific IO port address definition for generic. | ||
3 | * Written by Osamu Tomita <tomita@cinet.co.jp> | ||
4 | */ | ||
5 | #ifndef _MACH_IO_PORTS_H | ||
6 | #define _MACH_IO_PORTS_H | ||
7 | |||
8 | /* i8253A PIT registers */ | ||
9 | #define PIT_MODE 0x43 | ||
10 | #define PIT_CH0 0x40 | ||
11 | #define PIT_CH2 0x42 | ||
12 | |||
13 | /* i8259A PIC registers */ | ||
14 | #define PIC_MASTER_CMD 0x20 | ||
15 | #define PIC_MASTER_IMR 0x21 | ||
16 | #define PIC_MASTER_ISR PIC_MASTER_CMD | ||
17 | #define PIC_MASTER_POLL PIC_MASTER_ISR | ||
18 | #define PIC_MASTER_OCW3 PIC_MASTER_ISR | ||
19 | #define PIC_SLAVE_CMD 0xa0 | ||
20 | #define PIC_SLAVE_IMR 0xa1 | ||
21 | |||
22 | /* i8259A PIC related value */ | ||
23 | #define PIC_CASCADE_IR 2 | ||
24 | #define MASTER_ICW4_DEFAULT 0x01 | ||
25 | #define SLAVE_ICW4_DEFAULT 0x01 | ||
26 | #define PIC_ICW4_AEOI 2 | ||
27 | |||
28 | extern void setup_pit_timer(void); | ||
29 | |||
30 | #endif /* !_MACH_IO_PORTS_H */ | ||