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-rw-r--r--include/asm-mips/processor.h90
1 files changed, 53 insertions, 37 deletions
diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h
index 3a466dc7b7db..1d8b9a8ae324 100644
--- a/include/asm-mips/processor.h
+++ b/include/asm-mips/processor.h
@@ -82,10 +82,6 @@ struct mips_fpu_struct {
82 unsigned int fcr31; 82 unsigned int fcr31;
83}; 83};
84 84
85#define INIT_FPU { \
86 {0,} \
87}
88
89#define NUM_DSP_REGS 6 85#define NUM_DSP_REGS 6
90 86
91typedef __u32 dspreg_t; 87typedef __u32 dspreg_t;
@@ -95,8 +91,6 @@ struct mips_dsp_state {
95 unsigned int dspcontrol; 91 unsigned int dspcontrol;
96}; 92};
97 93
98#define INIT_DSP {{0,},}
99
100#define INIT_CPUMASK { \ 94#define INIT_CPUMASK { \
101 {0,} \ 95 {0,} \
102} 96}
@@ -155,41 +149,63 @@ struct thread_struct {
155#define MF_N64 0 149#define MF_N64 0
156 150
157#ifdef CONFIG_MIPS_MT_FPAFF 151#ifdef CONFIG_MIPS_MT_FPAFF
158#define FPAFF_INIT 0, INIT_CPUMASK, 152#define FPAFF_INIT \
153 .emulated_fp = 0, \
154 .user_cpus_allowed = INIT_CPUMASK,
159#else 155#else
160#define FPAFF_INIT 156#define FPAFF_INIT
161#endif /* CONFIG_MIPS_MT_FPAFF */ 157#endif /* CONFIG_MIPS_MT_FPAFF */
162 158
163#define INIT_THREAD { \ 159#define INIT_THREAD { \
164 /* \ 160 /* \
165 * saved main processor registers \ 161 * Saved main processor registers \
166 */ \ 162 */ \
167 0, 0, 0, 0, 0, 0, 0, 0, \ 163 .reg16 = 0, \
168 0, 0, 0, \ 164 .reg17 = 0, \
169 /* \ 165 .reg18 = 0, \
170 * saved cp0 stuff \ 166 .reg19 = 0, \
171 */ \ 167 .reg20 = 0, \
172 0, \ 168 .reg21 = 0, \
173 /* \ 169 .reg22 = 0, \
174 * saved fpu/fpu emulator stuff \ 170 .reg23 = 0, \
175 */ \ 171 .reg29 = 0, \
176 INIT_FPU, \ 172 .reg30 = 0, \
177 /* \ 173 .reg31 = 0, \
178 * fpu affinity state (null if not FPAFF) \ 174 /* \
179 */ \ 175 * Saved cp0 stuff \
180 FPAFF_INIT \ 176 */ \
181 /* \ 177 .cp0_status = 0, \
182 * saved dsp/dsp emulator stuff \ 178 /* \
183 */ \ 179 * Saved FPU/FPU emulator stuff \
184 INIT_DSP, \ 180 */ \
185 /* \ 181 .fpu = { \
186 * Other stuff associated with the process \ 182 .fpr = {0,}, \
187 */ \ 183 .fcr31 = 0, \
188 0, 0, 0, 0, \ 184 }, \
189 /* \ 185 /* \
190 * For now the default is to fix address errors \ 186 * FPU affinity state (null if not FPAFF) \
191 */ \ 187 */ \
192 MF_FIXADE, 0, 0 \ 188 FPAFF_INIT \
189 /* \
190 * Saved DSP stuff \
191 */ \
192 .dsp = { \
193 .dspr = {0, }, \
194 .dspcontrol = 0, \
195 }, \
196 /* \
197 * Other stuff associated with the process \
198 */ \
199 .cp0_badvaddr = 0, \
200 .cp0_baduaddr = 0, \
201 .error_code = 0, \
202 .trap_no = 0, \
203 /* \
204 * For now the default is to fix address errors \
205 */ \
206 .mflags = MF_FIXADE, \
207 .irix_trampoline = 0, \
208 .irix_oldctx = 0, \
193} 209}
194 210
195struct task_struct; 211struct task_struct;