aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
Diffstat
-rw-r--r--MAINTAINERS10
-rw-r--r--arch/arm/boot/compressed/head.S2
-rw-r--r--arch/arm/mach-at91/pm_slowclock.S12
-rw-r--r--arch/arm/mach-bcmring/dma.c13
-rw-r--r--arch/arm/mach-ep93xx/gpio.c6
-rw-r--r--arch/arm/mach-mx3/Kconfig10
-rw-r--r--arch/arm/mach-mx3/clock-imx31.c5
-rw-r--r--arch/arm/mach-mx3/devices.c19
-rw-r--r--arch/arm/mach-mx3/devices.h3
-rw-r--r--arch/arm/mach-mx3/mach-armadillo5x0.c166
-rw-r--r--arch/arm/mach-mx3/mach-mx31_3ds.c116
-rw-r--r--arch/arm/mach-mx3/mach-pcm037.c1
-rw-r--r--arch/arm/mach-mx3/mx31lite-db.c2
-rw-r--r--arch/arm/mach-mx5/clock-mx51.c2
-rw-r--r--arch/arm/mach-mx5/cpu.c53
-rw-r--r--arch/arm/mach-mx5/mm.c32
-rw-r--r--arch/arm/mm/mmu.c4
-rw-r--r--arch/arm/plat-mxc/include/mach/board-mx31_3ds.h (renamed from arch/arm/plat-mxc/include/mach/board-mx31pdk.h)6
-rw-r--r--arch/arm/plat-mxc/include/mach/mx51.h33
-rw-r--r--arch/arm/plat-mxc/include/mach/uncompress.h4
-rw-r--r--arch/mips/alchemy/devboards/db1200/setup.c40
-rw-r--r--arch/mips/ar7/platform.c3
-rw-r--r--arch/mips/bcm63xx/boards/board_bcm963xx.c231
-rw-r--r--arch/mips/bcm63xx/cpu.c5
-rw-r--r--arch/mips/bcm63xx/dev-uart.c66
-rw-r--r--arch/mips/bcm63xx/gpio.c4
-rw-r--r--arch/mips/cavium-octeon/setup.c82
-rw-r--r--arch/mips/cavium-octeon/smp.c8
-rw-r--r--arch/mips/configs/bigsur_defconfig680
-rw-r--r--arch/mips/include/asm/abi.h6
-rw-r--r--arch/mips/include/asm/elf.h5
-rw-r--r--arch/mips/include/asm/fpu_emulator.h6
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h15
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h6
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h4
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h2
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h2
-rw-r--r--arch/mips/include/asm/mach-sibyte/war.h6
-rw-r--r--arch/mips/include/asm/mmu.h5
-rw-r--r--arch/mips/include/asm/mmu_context.h2
-rw-r--r--arch/mips/include/asm/page.h6
-rw-r--r--arch/mips/include/asm/processor.h11
-rw-r--r--arch/mips/include/asm/stackframe.h19
-rw-r--r--arch/mips/include/asm/uasm.h2
-rw-r--r--arch/mips/include/asm/vdso.h29
-rw-r--r--arch/mips/kernel/Makefile2
-rw-r--r--arch/mips/kernel/cpufreq/loongson2_clock.c4
-rw-r--r--arch/mips/kernel/process.c7
-rw-r--r--arch/mips/kernel/signal-common.h5
-rw-r--r--arch/mips/kernel/signal.c86
-rw-r--r--arch/mips/kernel/signal32.c55
-rw-r--r--arch/mips/kernel/signal_n32.c26
-rw-r--r--arch/mips/kernel/smtc.c2
-rw-r--r--arch/mips/kernel/syscall.c6
-rw-r--r--arch/mips/kernel/traps.c2
-rw-r--r--arch/mips/kernel/vdso.c112
-rw-r--r--arch/mips/lib/delay.c4
-rw-r--r--arch/mips/lib/libgcc.h3
-rw-r--r--arch/mips/mm/cache.c2
-rw-r--r--arch/mips/mm/tlbex.c22
-rw-r--r--arch/mips/mm/uasm.c23
-rw-r--r--arch/mips/pci/ops-loongson2.c10
-rw-r--r--arch/mips/sibyte/sb1250/setup.c15
-rw-r--r--drivers/ssb/driver_pcicore.c29
-rw-r--r--fs/btrfs/extent-tree.c20
-rw-r--r--fs/btrfs/volumes.c6
-rw-r--r--fs/ext2/symlink.c2
-rw-r--r--fs/ext3/symlink.c2
-rw-r--r--fs/nilfs2/alloc.c2
-rw-r--r--fs/nilfs2/btree.c2
-rw-r--r--fs/nilfs2/ioctl.c2
-rw-r--r--fs/quota/dquot.c18
-rw-r--r--fs/udf/balloc.c10
-rw-r--r--fs/udf/file.c2
-rw-r--r--fs/udf/inode.c2
-rw-r--r--fs/udf/namei.c9
-rw-r--r--fs/udf/udfdecl.h3
-rw-r--r--net/sunrpc/xprtrdma/svc_rdma_transport.c5
78 files changed, 1528 insertions, 716 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 7a9ccda2a307..5b422908d0f3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -971,6 +971,16 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
971W: http://www.mcuos.com 971W: http://www.mcuos.com
972S: Maintained 972S: Maintained
973 973
974ARM/U300 MACHINE SUPPORT
975M: Linus Walleij <linus.walleij@stericsson.com>
976L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
977S: Supported
978F: arch/arm/mach-u300/
979F: drivers/i2c/busses/i2c-stu300.c
980F: drivers/rtc/rtc-coh901331.c
981F: drivers/watchdog/coh901327_wdt.c
982F: drivers/dma/coh901318*
983
974ARM/U8500 ARM ARCHITECTURE 984ARM/U8500 ARM ARCHITECTURE
975M: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> 985M: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
976L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 986L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 0f23009170a1..6ab6b337a913 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -172,7 +172,7 @@ not_angel:
172 adr r0, LC0 172 adr r0, LC0
173 ARM( ldmia r0, {r1, r2, r3, r4, r5, r6, r11, ip, sp}) 173 ARM( ldmia r0, {r1, r2, r3, r4, r5, r6, r11, ip, sp})
174 THUMB( ldmia r0, {r1, r2, r3, r4, r5, r6, r11, ip} ) 174 THUMB( ldmia r0, {r1, r2, r3, r4, r5, r6, r11, ip} )
175 THUMB( ldr sp, [r0, #28] ) 175 THUMB( ldr sp, [r0, #32] )
176 subs r0, r0, r1 @ calculate the delta offset 176 subs r0, r0, r1 @ calculate the delta offset
177 177
178 @ if delta is zero, we are 178 @ if delta is zero, we are
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 987fab3d846a..9fcbd6ca0090 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -205,13 +205,25 @@ ENTRY(at91_slow_clock)
205 ldr r3, .saved_pllbr 205 ldr r3, .saved_pllbr
206 str r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)] 206 str r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
207 207
208 tst r3, #(AT91_PMC_MUL & 0xff0000)
209 bne 1f
210 tst r3, #(AT91_PMC_MUL & ~0xff0000)
211 beq 2f
2121:
208 wait_pllblock 213 wait_pllblock
2142:
209 215
210 /* Restore PLLA setting */ 216 /* Restore PLLA setting */
211 ldr r3, .saved_pllar 217 ldr r3, .saved_pllar
212 str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)] 218 str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
213 219
220 tst r3, #(AT91_PMC_MUL & 0xff0000)
221 bne 3f
222 tst r3, #(AT91_PMC_MUL & ~0xff0000)
223 beq 4f
2243:
214 wait_pllalock 225 wait_pllalock
2264:
215 227
216#ifdef SLOWDOWN_MASTER_CLOCK 228#ifdef SLOWDOWN_MASTER_CLOCK
217 /* 229 /*
diff --git a/arch/arm/mach-bcmring/dma.c b/arch/arm/mach-bcmring/dma.c
index 2ccf670ce1ac..29c0a911df26 100644
--- a/arch/arm/mach-bcmring/dma.c
+++ b/arch/arm/mach-bcmring/dma.c
@@ -2221,11 +2221,15 @@ EXPORT_SYMBOL(dma_map_create_descriptor_ring);
2221int dma_unmap(DMA_MemMap_t *memMap, /* Stores state information about the map */ 2221int dma_unmap(DMA_MemMap_t *memMap, /* Stores state information about the map */
2222 int dirtied /* non-zero if any of the pages were modified */ 2222 int dirtied /* non-zero if any of the pages were modified */
2223 ) { 2223 ) {
2224
2225 int rc = 0;
2224 int regionIdx; 2226 int regionIdx;
2225 int segmentIdx; 2227 int segmentIdx;
2226 DMA_Region_t *region; 2228 DMA_Region_t *region;
2227 DMA_Segment_t *segment; 2229 DMA_Segment_t *segment;
2228 2230
2231 down(&memMap->lock);
2232
2229 for (regionIdx = 0; regionIdx < memMap->numRegionsUsed; regionIdx++) { 2233 for (regionIdx = 0; regionIdx < memMap->numRegionsUsed; regionIdx++) {
2230 region = &memMap->region[regionIdx]; 2234 region = &memMap->region[regionIdx];
2231 2235
@@ -2239,7 +2243,8 @@ int dma_unmap(DMA_MemMap_t *memMap, /* Stores state information about the map */
2239 printk(KERN_ERR 2243 printk(KERN_ERR
2240 "%s: vmalloc'd pages are not yet supported\n", 2244 "%s: vmalloc'd pages are not yet supported\n",
2241 __func__); 2245 __func__);
2242 return -EINVAL; 2246 rc = -EINVAL;
2247 goto out;
2243 } 2248 }
2244 2249
2245 case DMA_MEM_TYPE_KMALLOC: 2250 case DMA_MEM_TYPE_KMALLOC:
@@ -2276,7 +2281,8 @@ int dma_unmap(DMA_MemMap_t *memMap, /* Stores state information about the map */
2276 printk(KERN_ERR 2281 printk(KERN_ERR
2277 "%s: Unsupported memory type: %d\n", 2282 "%s: Unsupported memory type: %d\n",
2278 __func__, region->memType); 2283 __func__, region->memType);
2279 return -EINVAL; 2284 rc = -EINVAL;
2285 goto out;
2280 } 2286 }
2281 } 2287 }
2282 2288
@@ -2314,9 +2320,10 @@ int dma_unmap(DMA_MemMap_t *memMap, /* Stores state information about the map */
2314 memMap->numRegionsUsed = 0; 2320 memMap->numRegionsUsed = 0;
2315 memMap->inUse = 0; 2321 memMap->inUse = 0;
2316 2322
2323out:
2317 up(&memMap->lock); 2324 up(&memMap->lock);
2318 2325
2319 return 0; 2326 return rc;
2320} 2327}
2321 2328
2322EXPORT_SYMBOL(dma_unmap); 2329EXPORT_SYMBOL(dma_unmap);
diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c
index cc377ae8c428..cf547ad7ebd4 100644
--- a/arch/arm/mach-ep93xx/gpio.c
+++ b/arch/arm/mach-ep93xx/gpio.c
@@ -25,7 +25,7 @@
25#include <mach/hardware.h> 25#include <mach/hardware.h>
26 26
27/************************************************************************* 27/*************************************************************************
28 * GPIO handling for EP93xx 28 * Interrupt handling for EP93xx on-chip GPIOs
29 *************************************************************************/ 29 *************************************************************************/
30static unsigned char gpio_int_unmasked[3]; 30static unsigned char gpio_int_unmasked[3];
31static unsigned char gpio_int_enabled[3]; 31static unsigned char gpio_int_enabled[3];
@@ -40,7 +40,7 @@ static const u8 eoi_register_offset[3] = { 0x98, 0xb4, 0x54 };
40static const u8 int_en_register_offset[3] = { 0x9c, 0xb8, 0x58 }; 40static const u8 int_en_register_offset[3] = { 0x9c, 0xb8, 0x58 };
41static const u8 int_debounce_register_offset[3] = { 0xa8, 0xc4, 0x64 }; 41static const u8 int_debounce_register_offset[3] = { 0xa8, 0xc4, 0x64 };
42 42
43void ep93xx_gpio_update_int_params(unsigned port) 43static void ep93xx_gpio_update_int_params(unsigned port)
44{ 44{
45 BUG_ON(port > 2); 45 BUG_ON(port > 2);
46 46
@@ -56,7 +56,7 @@ void ep93xx_gpio_update_int_params(unsigned port)
56 EP93XX_GPIO_REG(int_en_register_offset[port])); 56 EP93XX_GPIO_REG(int_en_register_offset[port]));
57} 57}
58 58
59void ep93xx_gpio_int_mask(unsigned line) 59static inline void ep93xx_gpio_int_mask(unsigned line)
60{ 60{
61 gpio_int_unmasked[line >> 3] &= ~(1 << (line & 7)); 61 gpio_int_unmasked[line >> 3] &= ~(1 << (line & 7));
62} 62}
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig
index 3872af1cf2c3..170f68e46dd5 100644
--- a/arch/arm/mach-mx3/Kconfig
+++ b/arch/arm/mach-mx3/Kconfig
@@ -62,6 +62,15 @@ config MACH_MX31_3DS
62 Include support for MX31PDK (3DS) platform. This includes specific 62 Include support for MX31PDK (3DS) platform. This includes specific
63 configurations for the board and its peripherals. 63 configurations for the board and its peripherals.
64 64
65config MACH_MX31_3DS_MXC_NAND_USE_BBT
66 bool "Make the MXC NAND driver use the in flash Bad Block Table"
67 depends on MACH_MX31_3DS
68 depends on MTD_NAND_MXC
69 help
70 Enable this if you want that the MXC NAND driver uses the in flash
71 Bad Block Table to know what blocks are bad instead of scanning the
72 entire flash looking for bad block markers.
73
65config MACH_MX31MOBOARD 74config MACH_MX31MOBOARD
66 bool "Support mx31moboard platforms (EPFL Mobots group)" 75 bool "Support mx31moboard platforms (EPFL Mobots group)"
67 select ARCH_MX31 76 select ARCH_MX31
@@ -95,6 +104,7 @@ config MACH_PCM043
95config MACH_ARMADILLO5X0 104config MACH_ARMADILLO5X0
96 bool "Support Atmark Armadillo-500 Development Base Board" 105 bool "Support Atmark Armadillo-500 Development Base Board"
97 select ARCH_MX31 106 select ARCH_MX31
107 select MXC_ULPI if USB_ULPI
98 help 108 help
99 Include support for Atmark Armadillo-500 platform. This includes 109 Include support for Atmark Armadillo-500 platform. This includes
100 specific configurations for the board and its peripherals. 110 specific configurations for the board and its peripherals.
diff --git a/arch/arm/mach-mx3/clock-imx31.c b/arch/arm/mach-mx3/clock-imx31.c
index 80dba9966b5e..9a9eb6de6127 100644
--- a/arch/arm/mach-mx3/clock-imx31.c
+++ b/arch/arm/mach-mx3/clock-imx31.c
@@ -468,6 +468,7 @@ static struct clk ahb_clk = {
468 } 468 }
469 469
470DEFINE_CLOCK(perclk_clk, 0, NULL, 0, NULL, NULL, &ipg_clk); 470DEFINE_CLOCK(perclk_clk, 0, NULL, 0, NULL, NULL, &ipg_clk);
471DEFINE_CLOCK(ckil_clk, 0, NULL, 0, clk_ckil_get_rate, NULL, NULL);
471 472
472DEFINE_CLOCK(sdhc1_clk, 0, MXC_CCM_CGR0, 0, NULL, NULL, &perclk_clk); 473DEFINE_CLOCK(sdhc1_clk, 0, MXC_CCM_CGR0, 0, NULL, NULL, &perclk_clk);
473DEFINE_CLOCK(sdhc2_clk, 1, MXC_CCM_CGR0, 2, NULL, NULL, &perclk_clk); 474DEFINE_CLOCK(sdhc2_clk, 1, MXC_CCM_CGR0, 2, NULL, NULL, &perclk_clk);
@@ -490,7 +491,7 @@ DEFINE_CLOCK(mpeg4_clk, 0, MXC_CCM_CGR1, 0, NULL, NULL, &ahb_clk);
490DEFINE_CLOCK(mstick1_clk, 0, MXC_CCM_CGR1, 2, mstick1_get_rate, NULL, &usb_pll_clk); 491DEFINE_CLOCK(mstick1_clk, 0, MXC_CCM_CGR1, 2, mstick1_get_rate, NULL, &usb_pll_clk);
491DEFINE_CLOCK(mstick2_clk, 1, MXC_CCM_CGR1, 4, mstick2_get_rate, NULL, &usb_pll_clk); 492DEFINE_CLOCK(mstick2_clk, 1, MXC_CCM_CGR1, 4, mstick2_get_rate, NULL, &usb_pll_clk);
492DEFINE_CLOCK1(csi_clk, 0, MXC_CCM_CGR1, 6, csi, NULL, &serial_pll_clk); 493DEFINE_CLOCK1(csi_clk, 0, MXC_CCM_CGR1, 6, csi, NULL, &serial_pll_clk);
493DEFINE_CLOCK(rtc_clk, 0, MXC_CCM_CGR1, 8, NULL, NULL, &ipg_clk); 494DEFINE_CLOCK(rtc_clk, 0, MXC_CCM_CGR1, 8, NULL, NULL, &ckil_clk);
494DEFINE_CLOCK(wdog_clk, 0, MXC_CCM_CGR1, 10, NULL, NULL, &ipg_clk); 495DEFINE_CLOCK(wdog_clk, 0, MXC_CCM_CGR1, 10, NULL, NULL, &ipg_clk);
495DEFINE_CLOCK(pwm_clk, 0, MXC_CCM_CGR1, 12, NULL, NULL, &perclk_clk); 496DEFINE_CLOCK(pwm_clk, 0, MXC_CCM_CGR1, 12, NULL, NULL, &perclk_clk);
496DEFINE_CLOCK(usb_clk2, 0, MXC_CCM_CGR1, 18, usb_get_rate, NULL, &ahb_clk); 497DEFINE_CLOCK(usb_clk2, 0, MXC_CCM_CGR1, 18, usb_get_rate, NULL, &ahb_clk);
@@ -514,7 +515,6 @@ DEFINE_CLOCK(usb_clk1, 0, NULL, 0, usb_get_rate, NULL, &usb_pll_clk)
514DEFINE_CLOCK(nfc_clk, 0, NULL, 0, nfc_get_rate, NULL, &ahb_clk); 515DEFINE_CLOCK(nfc_clk, 0, NULL, 0, nfc_get_rate, NULL, &ahb_clk);
515DEFINE_CLOCK(scc_clk, 0, NULL, 0, NULL, NULL, &ipg_clk); 516DEFINE_CLOCK(scc_clk, 0, NULL, 0, NULL, NULL, &ipg_clk);
516DEFINE_CLOCK(ipg_clk, 0, NULL, 0, ipg_get_rate, NULL, &ahb_clk); 517DEFINE_CLOCK(ipg_clk, 0, NULL, 0, ipg_get_rate, NULL, &ahb_clk);
517DEFINE_CLOCK(ckil_clk, 0, NULL, 0, clk_ckil_get_rate, NULL, NULL);
518 518
519#define _REGISTER_CLOCK(d, n, c) \ 519#define _REGISTER_CLOCK(d, n, c) \
520 { \ 520 { \
@@ -572,7 +572,6 @@ static struct clk_lookup lookups[] = {
572 _REGISTER_CLOCK(NULL, "iim", iim_clk) 572 _REGISTER_CLOCK(NULL, "iim", iim_clk)
573 _REGISTER_CLOCK(NULL, "mpeg4", mpeg4_clk) 573 _REGISTER_CLOCK(NULL, "mpeg4", mpeg4_clk)
574 _REGISTER_CLOCK(NULL, "mbx", mbx_clk) 574 _REGISTER_CLOCK(NULL, "mbx", mbx_clk)
575 _REGISTER_CLOCK("mxc_rtc", NULL, ckil_clk)
576}; 575};
577 576
578int __init mx31_clocks_init(unsigned long fref) 577int __init mx31_clocks_init(unsigned long fref)
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c
index 6adb586515ea..f8911154a9fa 100644
--- a/arch/arm/mach-mx3/devices.c
+++ b/arch/arm/mach-mx3/devices.c
@@ -575,11 +575,26 @@ struct platform_device imx_ssi_device1 = {
575 .resource = imx_ssi_resources1, 575 .resource = imx_ssi_resources1,
576}; 576};
577 577
578static int mx3_devices_init(void) 578static struct resource imx_wdt_resources[] = {
579 {
580 .flags = IORESOURCE_MEM,
581 },
582};
583
584struct platform_device imx_wdt_device0 = {
585 .name = "imx-wdt",
586 .id = 0,
587 .num_resources = ARRAY_SIZE(imx_wdt_resources),
588 .resource = imx_wdt_resources,
589};
590
591static int __init mx3_devices_init(void)
579{ 592{
580 if (cpu_is_mx31()) { 593 if (cpu_is_mx31()) {
581 mxc_nand_resources[0].start = MX31_NFC_BASE_ADDR; 594 mxc_nand_resources[0].start = MX31_NFC_BASE_ADDR;
582 mxc_nand_resources[0].end = MX31_NFC_BASE_ADDR + 0xfff; 595 mxc_nand_resources[0].end = MX31_NFC_BASE_ADDR + 0xfff;
596 imx_wdt_resources[0].start = MX31_WDOG_BASE_ADDR;
597 imx_wdt_resources[0].end = MX31_WDOG_BASE_ADDR + 0x3fff;
583 mxc_register_device(&mxc_rnga_device, NULL); 598 mxc_register_device(&mxc_rnga_device, NULL);
584 } 599 }
585 if (cpu_is_mx35()) { 600 if (cpu_is_mx35()) {
@@ -597,6 +612,8 @@ static int mx3_devices_init(void)
597 imx_ssi_resources0[1].end = MX35_INT_SSI1; 612 imx_ssi_resources0[1].end = MX35_INT_SSI1;
598 imx_ssi_resources1[1].start = MX35_INT_SSI2; 613 imx_ssi_resources1[1].start = MX35_INT_SSI2;
599 imx_ssi_resources1[1].end = MX35_INT_SSI2; 614 imx_ssi_resources1[1].end = MX35_INT_SSI2;
615 imx_wdt_resources[0].start = MX35_WDOG_BASE_ADDR;
616 imx_wdt_resources[0].end = MX35_WDOG_BASE_ADDR + 0x3fff;
600 } 617 }
601 618
602 return 0; 619 return 0;
diff --git a/arch/arm/mach-mx3/devices.h b/arch/arm/mach-mx3/devices.h
index 42cf175eac6b..4f77eb501274 100644
--- a/arch/arm/mach-mx3/devices.h
+++ b/arch/arm/mach-mx3/devices.h
@@ -25,4 +25,5 @@ extern struct platform_device mxc_spi_device1;
25extern struct platform_device mxc_spi_device2; 25extern struct platform_device mxc_spi_device2;
26extern struct platform_device imx_ssi_device0; 26extern struct platform_device imx_ssi_device0;
27extern struct platform_device imx_ssi_device1; 27extern struct platform_device imx_ssi_device1;
28 28extern struct platform_device imx_ssi_device1;
29extern struct platform_device imx_wdt_device0;
diff --git a/arch/arm/mach-mx3/mach-armadillo5x0.c b/arch/arm/mach-mx3/mach-armadillo5x0.c
index 3d72b0b89705..5f72ec91af2d 100644
--- a/arch/arm/mach-mx3/mach-armadillo5x0.c
+++ b/arch/arm/mach-mx3/mach-armadillo5x0.c
@@ -36,6 +36,9 @@
36#include <linux/input.h> 36#include <linux/input.h>
37#include <linux/gpio_keys.h> 37#include <linux/gpio_keys.h>
38#include <linux/i2c.h> 38#include <linux/i2c.h>
39#include <linux/usb/otg.h>
40#include <linux/usb/ulpi.h>
41#include <linux/delay.h>
39 42
40#include <mach/hardware.h> 43#include <mach/hardware.h>
41#include <asm/mach-types.h> 44#include <asm/mach-types.h>
@@ -52,6 +55,8 @@
52#include <mach/ipu.h> 55#include <mach/ipu.h>
53#include <mach/mx3fb.h> 56#include <mach/mx3fb.h>
54#include <mach/mxc_nand.h> 57#include <mach/mxc_nand.h>
58#include <mach/mxc_ehci.h>
59#include <mach/ulpi.h>
55 60
56#include "devices.h" 61#include "devices.h"
57#include "crm_regs.h" 62#include "crm_regs.h"
@@ -103,8 +108,158 @@ static int armadillo5x0_pins[] = {
103 /* I2C2 */ 108 /* I2C2 */
104 MX31_PIN_CSPI2_MOSI__SCL, 109 MX31_PIN_CSPI2_MOSI__SCL,
105 MX31_PIN_CSPI2_MISO__SDA, 110 MX31_PIN_CSPI2_MISO__SDA,
111 /* OTG */
112 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
113 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
114 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
115 MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
116 MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
117 MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
118 MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
119 MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
120 MX31_PIN_USBOTG_CLK__USBOTG_CLK,
121 MX31_PIN_USBOTG_DIR__USBOTG_DIR,
122 MX31_PIN_USBOTG_NXT__USBOTG_NXT,
123 MX31_PIN_USBOTG_STP__USBOTG_STP,
124 /* USB host 2 */
125 IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
126 IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
127 IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
128 IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
129 IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
130 IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
131 IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
132 IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
133 IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
134 IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
135 IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
136 IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
106}; 137};
107 138
139/* USB */
140#if defined(CONFIG_USB_ULPI)
141
142#define OTG_RESET IOMUX_TO_GPIO(MX31_PIN_STXD4)
143#define USBH2_RESET IOMUX_TO_GPIO(MX31_PIN_SCK6)
144#define USBH2_CS IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)
145
146#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
147 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
148
149static int usbotg_init(struct platform_device *pdev)
150{
151 int err;
152
153 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
154 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
155 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
156 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
157 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
158 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
159 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
160 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
161 mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
162 mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
163 mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
164 mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
165
166 /* Chip already enabled by hardware */
167 /* OTG phy reset*/
168 err = gpio_request(OTG_RESET, "USB-OTG-RESET");
169 if (err) {
170 pr_err("Failed to request the usb otg reset gpio\n");
171 return err;
172 }
173
174 err = gpio_direction_output(OTG_RESET, 1/*HIGH*/);
175 if (err) {
176 pr_err("Failed to reset the usb otg phy\n");
177 goto otg_free_reset;
178 }
179
180 gpio_set_value(OTG_RESET, 0/*LOW*/);
181 mdelay(5);
182 gpio_set_value(OTG_RESET, 1/*HIGH*/);
183
184 return 0;
185
186otg_free_reset:
187 gpio_free(OTG_RESET);
188 return err;
189}
190
191static int usbh2_init(struct platform_device *pdev)
192{
193 int err;
194
195 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
196 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
197 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
198 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
199 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
200 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
201 mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
202 mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
203 mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
204 mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
205 mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
206 mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
207
208 mxc_iomux_set_gpr(MUX_PGP_UH2, true);
209
210
211 /* Enable the chip */
212 err = gpio_request(USBH2_CS, "USB-H2-CS");
213 if (err) {
214 pr_err("Failed to request the usb host 2 CS gpio\n");
215 return err;
216 }
217
218 err = gpio_direction_output(USBH2_CS, 0/*Enabled*/);
219 if (err) {
220 pr_err("Failed to drive the usb host 2 CS gpio\n");
221 goto h2_free_cs;
222 }
223
224 /* H2 phy reset*/
225 err = gpio_request(USBH2_RESET, "USB-H2-RESET");
226 if (err) {
227 pr_err("Failed to request the usb host 2 reset gpio\n");
228 goto h2_free_cs;
229 }
230
231 err = gpio_direction_output(USBH2_RESET, 1/*HIGH*/);
232 if (err) {
233 pr_err("Failed to reset the usb host 2 phy\n");
234 goto h2_free_reset;
235 }
236
237 gpio_set_value(USBH2_RESET, 0/*LOW*/);
238 mdelay(5);
239 gpio_set_value(USBH2_RESET, 1/*HIGH*/);
240
241 return 0;
242
243h2_free_reset:
244 gpio_free(USBH2_RESET);
245h2_free_cs:
246 gpio_free(USBH2_CS);
247 return err;
248}
249
250static struct mxc_usbh_platform_data usbotg_pdata = {
251 .init = usbotg_init,
252 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
253 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI,
254};
255
256static struct mxc_usbh_platform_data usbh2_pdata = {
257 .init = usbh2_init,
258 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
259 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI,
260};
261#endif /* CONFIG_USB_ULPI */
262
108/* RTC over I2C*/ 263/* RTC over I2C*/
109#define ARMADILLO5X0_RTC_GPIO IOMUX_TO_GPIO(MX31_PIN_SRXD4) 264#define ARMADILLO5X0_RTC_GPIO IOMUX_TO_GPIO(MX31_PIN_SRXD4)
110 265
@@ -393,6 +548,17 @@ static void __init armadillo5x0_init(void)
393 if (armadillo5x0_i2c_rtc.irq == 0) 548 if (armadillo5x0_i2c_rtc.irq == 0)
394 pr_warning("armadillo5x0_init: failed to get RTC IRQ\n"); 549 pr_warning("armadillo5x0_init: failed to get RTC IRQ\n");
395 i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1); 550 i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1);
551
552 /* USB */
553#if defined(CONFIG_USB_ULPI)
554 usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
555 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
556 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
557 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
558
559 mxc_register_device(&mxc_otg_host, &usbotg_pdata);
560 mxc_register_device(&mxc_usbh2, &usbh2_pdata);
561#endif
396} 562}
397 563
398static void __init armadillo5x0_timer_init(void) 564static void __init armadillo5x0_timer_init(void)
diff --git a/arch/arm/mach-mx3/mach-mx31_3ds.c b/arch/arm/mach-mx3/mach-mx31_3ds.c
index b88c18ad7698..f54af1e29ca4 100644
--- a/arch/arm/mach-mx3/mach-mx31_3ds.c
+++ b/arch/arm/mach-mx3/mach-mx31_3ds.c
@@ -23,6 +23,9 @@
23#include <linux/gpio.h> 23#include <linux/gpio.h>
24#include <linux/smsc911x.h> 24#include <linux/smsc911x.h>
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/mfd/mc13783.h>
27#include <linux/spi/spi.h>
28#include <linux/regulator/machine.h>
26 29
27#include <mach/hardware.h> 30#include <mach/hardware.h>
28#include <asm/mach-types.h> 31#include <asm/mach-types.h>
@@ -31,26 +34,96 @@
31#include <asm/memory.h> 34#include <asm/memory.h>
32#include <asm/mach/map.h> 35#include <asm/mach/map.h>
33#include <mach/common.h> 36#include <mach/common.h>
34#include <mach/board-mx31pdk.h> 37#include <mach/board-mx31_3ds.h>
35#include <mach/imx-uart.h> 38#include <mach/imx-uart.h>
36#include <mach/iomux-mx3.h> 39#include <mach/iomux-mx3.h>
40#include <mach/mxc_nand.h>
41#include <mach/spi.h>
37#include "devices.h" 42#include "devices.h"
38 43
39/*! 44/*!
40 * @file mx31pdk.c 45 * @file mx31_3ds.c
41 * 46 *
42 * @brief This file contains the board-specific initialization routines. 47 * @brief This file contains the board-specific initialization routines.
43 * 48 *
44 * @ingroup System 49 * @ingroup System
45 */ 50 */
46 51
47static int mx31pdk_pins[] = { 52static int mx31_3ds_pins[] = {
48 /* UART1 */ 53 /* UART1 */
49 MX31_PIN_CTS1__CTS1, 54 MX31_PIN_CTS1__CTS1,
50 MX31_PIN_RTS1__RTS1, 55 MX31_PIN_RTS1__RTS1,
51 MX31_PIN_TXD1__TXD1, 56 MX31_PIN_TXD1__TXD1,
52 MX31_PIN_RXD1__RXD1, 57 MX31_PIN_RXD1__RXD1,
53 IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO), 58 IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
59 /* SPI 1 */
60 MX31_PIN_CSPI2_SCLK__SCLK,
61 MX31_PIN_CSPI2_MOSI__MOSI,
62 MX31_PIN_CSPI2_MISO__MISO,
63 MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
64 MX31_PIN_CSPI2_SS0__SS0,
65 MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */
66 /* MC13783 IRQ */
67 IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO),
68};
69
70/* Regulators */
71static struct regulator_init_data pwgtx_init = {
72 .constraints = {
73 .boot_on = 1,
74 .always_on = 1,
75 },
76};
77
78static struct mc13783_regulator_init_data mx31_3ds_regulators[] = {
79 {
80 .id = MC13783_REGU_PWGT1SPI, /* Power Gate for ARM core. */
81 .init_data = &pwgtx_init,
82 }, {
83 .id = MC13783_REGU_PWGT2SPI, /* Power Gate for L2 Cache. */
84 .init_data = &pwgtx_init,
85 },
86};
87
88/* MC13783 */
89static struct mc13783_platform_data mc13783_pdata __initdata = {
90 .regulators = mx31_3ds_regulators,
91 .num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
92 .flags = MC13783_USE_REGULATOR,
93};
94
95/* SPI */
96static int spi1_internal_chipselect[] = {
97 MXC_SPI_CS(0),
98 MXC_SPI_CS(2),
99};
100
101static struct spi_imx_master spi1_pdata = {
102 .chipselect = spi1_internal_chipselect,
103 .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect),
104};
105
106static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
107 {
108 .modalias = "mc13783",
109 .max_speed_hz = 1000000,
110 .bus_num = 1,
111 .chip_select = 1, /* SS2 */
112 .platform_data = &mc13783_pdata,
113 .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
114 .mode = SPI_CS_HIGH,
115 },
116};
117
118/*
119 * NAND Flash
120 */
121static struct mxc_nand_platform_data imx31_3ds_nand_flash_pdata = {
122 .width = 1,
123 .hw_ecc = 1,
124#ifdef MACH_MX31_3DS_MXC_NAND_USE_BBT
125 .flash_bbt = 1,
126#endif
54}; 127};
55 128
56static struct imxuart_platform_data uart_pdata = { 129static struct imxuart_platform_data uart_pdata = {
@@ -95,7 +168,7 @@ static struct platform_device smsc911x_device = {
95 * LEDs, switches, interrupts for Ethernet. 168 * LEDs, switches, interrupts for Ethernet.
96 */ 169 */
97 170
98static void mx31pdk_expio_irq_handler(uint32_t irq, struct irq_desc *desc) 171static void mx31_3ds_expio_irq_handler(uint32_t irq, struct irq_desc *desc)
99{ 172{
100 uint32_t imr_val; 173 uint32_t imr_val;
101 uint32_t int_valid; 174 uint32_t int_valid;
@@ -163,7 +236,7 @@ static struct irq_chip expio_irq_chip = {
163 .unmask = expio_unmask_irq, 236 .unmask = expio_unmask_irq,
164}; 237};
165 238
166static int __init mx31pdk_init_expio(void) 239static int __init mx31_3ds_init_expio(void)
167{ 240{
168 int i; 241 int i;
169 int ret; 242 int ret;
@@ -176,7 +249,7 @@ static int __init mx31pdk_init_expio(void)
176 return -ENODEV; 249 return -ENODEV;
177 } 250 }
178 251
179 pr_info("i.MX31PDK Debug board detected, rev = 0x%04X\n", 252 pr_info("i.MX31 3DS Debug board detected, rev = 0x%04X\n",
180 __raw_readw(CPLD_CODE_VER_REG)); 253 __raw_readw(CPLD_CODE_VER_REG));
181 254
182 /* 255 /*
@@ -201,7 +274,7 @@ static int __init mx31pdk_init_expio(void)
201 set_irq_flags(i, IRQF_VALID); 274 set_irq_flags(i, IRQF_VALID);
202 } 275 }
203 set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_LOW); 276 set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_LOW);
204 set_irq_chained_handler(EXPIO_PARENT_INT, mx31pdk_expio_irq_handler); 277 set_irq_chained_handler(EXPIO_PARENT_INT, mx31_3ds_expio_irq_handler);
205 278
206 return 0; 279 return 0;
207} 280}
@@ -209,7 +282,7 @@ static int __init mx31pdk_init_expio(void)
209/* 282/*
210 * This structure defines the MX31 memory map. 283 * This structure defines the MX31 memory map.
211 */ 284 */
212static struct map_desc mx31pdk_io_desc[] __initdata = { 285static struct map_desc mx31_3ds_io_desc[] __initdata = {
213 { 286 {
214 .virtual = MX31_CS5_BASE_ADDR_VIRT, 287 .virtual = MX31_CS5_BASE_ADDR_VIRT,
215 .pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR), 288 .pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR),
@@ -221,10 +294,10 @@ static struct map_desc mx31pdk_io_desc[] __initdata = {
221/* 294/*
222 * Set up static virtual mappings. 295 * Set up static virtual mappings.
223 */ 296 */
224static void __init mx31pdk_map_io(void) 297static void __init mx31_3ds_map_io(void)
225{ 298{
226 mx31_map_io(); 299 mx31_map_io();
227 iotable_init(mx31pdk_io_desc, ARRAY_SIZE(mx31pdk_io_desc)); 300 iotable_init(mx31_3ds_io_desc, ARRAY_SIZE(mx31_3ds_io_desc));
228} 301}
229 302
230/*! 303/*!
@@ -232,35 +305,40 @@ static void __init mx31pdk_map_io(void)
232 */ 305 */
233static void __init mxc_board_init(void) 306static void __init mxc_board_init(void)
234{ 307{
235 mxc_iomux_setup_multiple_pins(mx31pdk_pins, ARRAY_SIZE(mx31pdk_pins), 308 mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins),
236 "mx31pdk"); 309 "mx31_3ds");
237 310
238 mxc_register_device(&mxc_uart_device0, &uart_pdata); 311 mxc_register_device(&mxc_uart_device0, &uart_pdata);
312 mxc_register_device(&mxc_nand_device, &imx31_3ds_nand_flash_pdata);
313
314 mxc_register_device(&mxc_spi_device1, &spi1_pdata);
315 spi_register_board_info(mx31_3ds_spi_devs,
316 ARRAY_SIZE(mx31_3ds_spi_devs));
239 317
240 if (!mx31pdk_init_expio()) 318 if (!mx31_3ds_init_expio())
241 platform_device_register(&smsc911x_device); 319 platform_device_register(&smsc911x_device);
242} 320}
243 321
244static void __init mx31pdk_timer_init(void) 322static void __init mx31_3ds_timer_init(void)
245{ 323{
246 mx31_clocks_init(26000000); 324 mx31_clocks_init(26000000);
247} 325}
248 326
249static struct sys_timer mx31pdk_timer = { 327static struct sys_timer mx31_3ds_timer = {
250 .init = mx31pdk_timer_init, 328 .init = mx31_3ds_timer_init,
251}; 329};
252 330
253/* 331/*
254 * The following uses standard kernel macros defined in arch.h in order to 332 * The following uses standard kernel macros defined in arch.h in order to
255 * initialize __mach_desc_MX31PDK data structure. 333 * initialize __mach_desc_MX31_3DS data structure.
256 */ 334 */
257MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)") 335MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
258 /* Maintainer: Freescale Semiconductor, Inc. */ 336 /* Maintainer: Freescale Semiconductor, Inc. */
259 .phys_io = MX31_AIPS1_BASE_ADDR, 337 .phys_io = MX31_AIPS1_BASE_ADDR,
260 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, 338 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
261 .boot_params = MX3x_PHYS_OFFSET + 0x100, 339 .boot_params = MX3x_PHYS_OFFSET + 0x100,
262 .map_io = mx31pdk_map_io, 340 .map_io = mx31_3ds_map_io,
263 .init_irq = mx31_init_irq, 341 .init_irq = mx31_init_irq,
264 .init_machine = mxc_board_init, 342 .init_machine = mxc_board_init,
265 .timer = &mx31pdk_timer, 343 .timer = &mx31_3ds_timer,
266MACHINE_END 344MACHINE_END
diff --git a/arch/arm/mach-mx3/mach-pcm037.c b/arch/arm/mach-mx3/mach-pcm037.c
index 034ec8190065..2df1ec55a97e 100644
--- a/arch/arm/mach-mx3/mach-pcm037.c
+++ b/arch/arm/mach-mx3/mach-pcm037.c
@@ -35,7 +35,6 @@
35#include <linux/can/platform/sja1000.h> 35#include <linux/can/platform/sja1000.h>
36#include <linux/usb/otg.h> 36#include <linux/usb/otg.h>
37#include <linux/usb/ulpi.h> 37#include <linux/usb/ulpi.h>
38#include <linux/fsl_devices.h>
39#include <linux/gfp.h> 38#include <linux/gfp.h>
40 39
41#include <media/soc_camera.h> 40#include <media/soc_camera.h>
diff --git a/arch/arm/mach-mx3/mx31lite-db.c b/arch/arm/mach-mx3/mx31lite-db.c
index ccd874225c3b..093c595ca581 100644
--- a/arch/arm/mach-mx3/mx31lite-db.c
+++ b/arch/arm/mach-mx3/mx31lite-db.c
@@ -28,7 +28,6 @@
28#include <linux/types.h> 28#include <linux/types.h>
29#include <linux/init.h> 29#include <linux/init.h>
30#include <linux/gpio.h> 30#include <linux/gpio.h>
31#include <linux/platform_device.h>
32#include <linux/leds.h> 31#include <linux/leds.h>
33#include <linux/platform_device.h> 32#include <linux/platform_device.h>
34 33
@@ -206,5 +205,6 @@ void __init mx31lite_db_init(void)
206 mxc_register_device(&mxcsdhc_device0, &mmc_pdata); 205 mxc_register_device(&mxcsdhc_device0, &mmc_pdata);
207 mxc_register_device(&mxc_spi_device0, &spi0_pdata); 206 mxc_register_device(&mxc_spi_device0, &spi0_pdata);
208 platform_device_register(&litekit_led_device); 207 platform_device_register(&litekit_led_device);
208 mxc_register_device(&imx_wdt_device0, NULL);
209} 209}
210 210
diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c
index be90c03101cd..8f85f73b83a8 100644
--- a/arch/arm/mach-mx5/clock-mx51.c
+++ b/arch/arm/mach-mx5/clock-mx51.c
@@ -757,7 +757,7 @@ DEFINE_CLOCK(uart3_ipg_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG7_OFFSET,
757 757
758/* GPT */ 758/* GPT */
759DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET, 759DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET,
760 NULL, NULL, &ipg_perclk, NULL); 760 NULL, NULL, &ipg_clk, NULL);
761DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET, 761DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET,
762 NULL, NULL, &ipg_clk, NULL); 762 NULL, NULL, &ipg_clk, NULL);
763 763
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
index 41c769f08c4d..2d37785e3857 100644
--- a/arch/arm/mach-mx5/cpu.c
+++ b/arch/arm/mach-mx5/cpu.c
@@ -14,9 +14,62 @@
14#include <linux/types.h> 14#include <linux/types.h>
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/module.h>
17#include <mach/hardware.h> 18#include <mach/hardware.h>
18#include <asm/io.h> 19#include <asm/io.h>
19 20
21static int cpu_silicon_rev = -1;
22
23#define SI_REV 0x48
24
25static void query_silicon_parameter(void)
26{
27 void __iomem *rom = ioremap(MX51_IROM_BASE_ADDR, MX51_IROM_SIZE);
28 u32 rev;
29
30 if (!rom) {
31 cpu_silicon_rev = -EINVAL;
32 return;
33 }
34
35 rev = readl(rom + SI_REV);
36 switch (rev) {
37 case 0x1:
38 cpu_silicon_rev = MX51_CHIP_REV_1_0;
39 break;
40 case 0x2:
41 cpu_silicon_rev = MX51_CHIP_REV_1_1;
42 break;
43 case 0x10:
44 cpu_silicon_rev = MX51_CHIP_REV_2_0;
45 break;
46 case 0x20:
47 cpu_silicon_rev = MX51_CHIP_REV_3_0;
48 break;
49 default:
50 cpu_silicon_rev = 0;
51 }
52
53 iounmap(rom);
54}
55
56/*
57 * Returns:
58 * the silicon revision of the cpu
59 * -EINVAL - not a mx51
60 */
61int mx51_revision(void)
62{
63 if (!cpu_is_mx51())
64 return -EINVAL;
65
66 if (cpu_silicon_rev == -1)
67 query_silicon_parameter();
68
69 return cpu_silicon_rev;
70}
71EXPORT_SYMBOL(mx51_revision);
72
20static int __init post_cpu_init(void) 73static int __init post_cpu_init(void)
21{ 74{
22 unsigned int reg; 75 unsigned int reg;
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index c21e18be7af8..b7677ef80cc4 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -35,11 +35,6 @@ static struct map_desc mxc_io_desc[] __initdata = {
35 .length = MX51_DEBUG_SIZE, 35 .length = MX51_DEBUG_SIZE,
36 .type = MT_DEVICE 36 .type = MT_DEVICE
37 }, { 37 }, {
38 .virtual = MX51_TZIC_BASE_ADDR_VIRT,
39 .pfn = __phys_to_pfn(MX51_TZIC_BASE_ADDR),
40 .length = MX51_TZIC_SIZE,
41 .type = MT_DEVICE
42 }, {
43 .virtual = MX51_AIPS1_BASE_ADDR_VIRT, 38 .virtual = MX51_AIPS1_BASE_ADDR_VIRT,
44 .pfn = __phys_to_pfn(MX51_AIPS1_BASE_ADDR), 39 .pfn = __phys_to_pfn(MX51_AIPS1_BASE_ADDR),
45 .length = MX51_AIPS1_SIZE, 40 .length = MX51_AIPS1_SIZE,
@@ -54,11 +49,6 @@ static struct map_desc mxc_io_desc[] __initdata = {
54 .pfn = __phys_to_pfn(MX51_AIPS2_BASE_ADDR), 49 .pfn = __phys_to_pfn(MX51_AIPS2_BASE_ADDR),
55 .length = MX51_AIPS2_SIZE, 50 .length = MX51_AIPS2_SIZE,
56 .type = MT_DEVICE 51 .type = MT_DEVICE
57 }, {
58 .virtual = MX51_NFC_AXI_BASE_ADDR_VIRT,
59 .pfn = __phys_to_pfn(MX51_NFC_AXI_BASE_ADDR),
60 .length = MX51_NFC_AXI_SIZE,
61 .type = MT_DEVICE
62 }, 52 },
63}; 53};
64 54
@@ -69,14 +59,6 @@ static struct map_desc mxc_io_desc[] __initdata = {
69 */ 59 */
70void __init mx51_map_io(void) 60void __init mx51_map_io(void)
71{ 61{
72 u32 tzic_addr;
73
74 if (mx51_revision() < MX51_CHIP_REV_2_0)
75 tzic_addr = 0x8FFFC000;
76 else
77 tzic_addr = 0xE0003000;
78 mxc_io_desc[2].pfn = __phys_to_pfn(tzic_addr);
79
80 mxc_set_cpu_type(MXC_CPU_MX51); 62 mxc_set_cpu_type(MXC_CPU_MX51);
81 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); 63 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
82 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG_BASE_ADDR)); 64 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG_BASE_ADDR));
@@ -85,5 +67,17 @@ void __init mx51_map_io(void)
85 67
86void __init mx51_init_irq(void) 68void __init mx51_init_irq(void)
87{ 69{
88 tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR)); 70 unsigned long tzic_addr;
71 void __iomem *tzic_virt;
72
73 if (mx51_revision() < MX51_CHIP_REV_2_0)
74 tzic_addr = MX51_TZIC_BASE_ADDR_TO1;
75 else
76 tzic_addr = MX51_TZIC_BASE_ADDR;
77
78 tzic_virt = ioremap(tzic_addr, SZ_16K);
79 if (!tzic_virt)
80 panic("unable to map TZIC interrupt controller\n");
81
82 tzic_init_irq(tzic_virt);
89} 83}
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 9d4da6ac28eb..4223d086aa17 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -420,6 +420,10 @@ static void __init build_mem_type_table(void)
420 user_pgprot |= L_PTE_SHARED; 420 user_pgprot |= L_PTE_SHARED;
421 kern_pgprot |= L_PTE_SHARED; 421 kern_pgprot |= L_PTE_SHARED;
422 vecs_pgprot |= L_PTE_SHARED; 422 vecs_pgprot |= L_PTE_SHARED;
423 mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_S;
424 mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_SHARED;
425 mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_S;
426 mem_types[MT_DEVICE_CACHED].prot_pte |= L_PTE_SHARED;
423 mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S; 427 mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
424 mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S; 428 mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
425#endif 429#endif
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31pdk.h b/arch/arm/plat-mxc/include/mach/board-mx31_3ds.h
index 2bbd6ed17f50..da92933a233b 100644
--- a/arch/arm/plat-mxc/include/mach/board-mx31pdk.h
+++ b/arch/arm/plat-mxc/include/mach/board-mx31_3ds.h
@@ -8,8 +8,8 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#ifndef __ASM_ARCH_MXC_BOARD_MX31PDK_H__ 11#ifndef __ASM_ARCH_MXC_BOARD_MX31_3DS_H__
12#define __ASM_ARCH_MXC_BOARD_MX31PDK_H__ 12#define __ASM_ARCH_MXC_BOARD_MX31_3DS_H__
13 13
14/* Definitions for components on the Debug board */ 14/* Definitions for components on the Debug board */
15 15
@@ -56,4 +56,4 @@
56 56
57#define MXC_MAX_EXP_IO_LINES 16 57#define MXC_MAX_EXP_IO_LINES 16
58 58
59#endif /* __ASM_ARCH_MXC_BOARD_MX31PDK_H__ */ 59#endif /* __ASM_ARCH_MXC_BOARD_MX31_3DS_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
index 771532b6b4a6..5aad344d5651 100644
--- a/arch/arm/plat-mxc/include/mach/mx51.h
+++ b/arch/arm/plat-mxc/include/mach/mx51.h
@@ -14,7 +14,7 @@
14 * FB100000 70000000 1M SPBA 0 14 * FB100000 70000000 1M SPBA 0
15 * FB000000 73F00000 1M AIPS 1 15 * FB000000 73F00000 1M AIPS 1
16 * FB200000 83F00000 1M AIPS 2 16 * FB200000 83F00000 1M AIPS 2
17 * FA100000 8FFFC000 16K TZIC (interrupt controller) 17 * 8FFFC000 16K TZIC (interrupt controller)
18 * 90000000 256M CSD0 SDRAM/DDR 18 * 90000000 256M CSD0 SDRAM/DDR
19 * A0000000 256M CSD1 SDRAM/DDR 19 * A0000000 256M CSD1 SDRAM/DDR
20 * B0000000 128M CS0 Flash 20 * B0000000 128M CS0 Flash
@@ -23,11 +23,17 @@
23 * C8000000 64M CS3 Flash 23 * C8000000 64M CS3 Flash
24 * CC000000 32M CS4 SRAM 24 * CC000000 32M CS4 SRAM
25 * CE000000 32M CS5 SRAM 25 * CE000000 32M CS5 SRAM
26 * F9000000 CFFF0000 64K NFC (NAND Flash AXI) 26 * CFFF0000 64K NFC (NAND Flash AXI)
27 * 27 *
28 */ 28 */
29 29
30/* 30/*
31 * IROM
32 */
33#define MX51_IROM_BASE_ADDR 0x0
34#define MX51_IROM_SIZE SZ_64K
35
36/*
31 * IRAM 37 * IRAM
32 */ 38 */
33#define MX51_IRAM_BASE_ADDR 0x1FFE0000 /* internal ram */ 39#define MX51_IRAM_BASE_ADDR 0x1FFE0000 /* internal ram */
@@ -40,7 +46,6 @@
40 * NFC 46 * NFC
41 */ 47 */
42#define MX51_NFC_AXI_BASE_ADDR 0xCFFF0000 /* NAND flash AXI */ 48#define MX51_NFC_AXI_BASE_ADDR 0xCFFF0000 /* NAND flash AXI */
43#define MX51_NFC_AXI_BASE_ADDR_VIRT 0xF9000000
44#define MX51_NFC_AXI_SIZE SZ_64K 49#define MX51_NFC_AXI_SIZE SZ_64K
45 50
46/* 51/*
@@ -49,9 +54,8 @@
49#define MX51_GPU_BASE_ADDR 0x20000000 54#define MX51_GPU_BASE_ADDR 0x20000000
50#define MX51_GPU2D_BASE_ADDR 0xD0000000 55#define MX51_GPU2D_BASE_ADDR 0xD0000000
51 56
52#define MX51_TZIC_BASE_ADDR 0x8FFFC000 57#define MX51_TZIC_BASE_ADDR_TO1 0x8FFFC000
53#define MX51_TZIC_BASE_ADDR_VIRT 0xFA100000 58#define MX51_TZIC_BASE_ADDR 0xE0000000
54#define MX51_TZIC_SIZE SZ_16K
55 59
56#define MX51_DEBUG_BASE_ADDR 0x60000000 60#define MX51_DEBUG_BASE_ADDR 0x60000000
57#define MX51_DEBUG_BASE_ADDR_VIRT 0xFA200000 61#define MX51_DEBUG_BASE_ADDR_VIRT 0xFA200000
@@ -232,12 +236,10 @@
232#define MX51_IO_ADDRESS(x) \ 236#define MX51_IO_ADDRESS(x) \
233 (void __iomem *) \ 237 (void __iomem *) \
234 (MX51_IS_MODULE(x, IRAM) ? MX51_IRAM_IO_ADDRESS(x) : \ 238 (MX51_IS_MODULE(x, IRAM) ? MX51_IRAM_IO_ADDRESS(x) : \
235 MX51_IS_MODULE(x, TZIC) ? MX51_TZIC_IO_ADDRESS(x) : \
236 MX51_IS_MODULE(x, DEBUG) ? MX51_DEBUG_IO_ADDRESS(x) : \ 239 MX51_IS_MODULE(x, DEBUG) ? MX51_DEBUG_IO_ADDRESS(x) : \
237 MX51_IS_MODULE(x, SPBA0) ? MX51_SPBA0_IO_ADDRESS(x) : \ 240 MX51_IS_MODULE(x, SPBA0) ? MX51_SPBA0_IO_ADDRESS(x) : \
238 MX51_IS_MODULE(x, AIPS1) ? MX51_AIPS1_IO_ADDRESS(x) : \ 241 MX51_IS_MODULE(x, AIPS1) ? MX51_AIPS1_IO_ADDRESS(x) : \
239 MX51_IS_MODULE(x, AIPS2) ? MX51_AIPS2_IO_ADDRESS(x) : \ 242 MX51_IS_MODULE(x, AIPS2) ? MX51_AIPS2_IO_ADDRESS(x) : \
240 MX51_IS_MODULE(x, NFC_AXI) ? MX51_NFC_AXI_IO_ADDRESS(x) : \
241 0xDEADBEEF) 243 0xDEADBEEF)
242 244
243/* 245/*
@@ -246,9 +248,6 @@
246#define MX51_IRAM_IO_ADDRESS(x) \ 248#define MX51_IRAM_IO_ADDRESS(x) \
247 (((x) - MX51_IRAM_BASE_ADDR) + MX51_IRAM_BASE_ADDR_VIRT) 249 (((x) - MX51_IRAM_BASE_ADDR) + MX51_IRAM_BASE_ADDR_VIRT)
248 250
249#define MX51_TZIC_IO_ADDRESS(x) \
250 (((x) - MX51_TZIC_BASE_ADDR) + MX51_TZIC_BASE_ADDR_VIRT)
251
252#define MX51_DEBUG_IO_ADDRESS(x) \ 251#define MX51_DEBUG_IO_ADDRESS(x) \
253 (((x) - MX51_DEBUG_BASE_ADDR) + MX51_DEBUG_BASE_ADDR_VIRT) 252 (((x) - MX51_DEBUG_BASE_ADDR) + MX51_DEBUG_BASE_ADDR_VIRT)
254 253
@@ -261,9 +260,6 @@
261#define MX51_AIPS2_IO_ADDRESS(x) \ 260#define MX51_AIPS2_IO_ADDRESS(x) \
262 (((x) - MX51_AIPS2_BASE_ADDR) + MX51_AIPS2_BASE_ADDR_VIRT) 261 (((x) - MX51_AIPS2_BASE_ADDR) + MX51_AIPS2_BASE_ADDR_VIRT)
263 262
264#define MX51_NFC_AXI_IO_ADDRESS(x) \
265 (((x) - MX51_NFC_AXI_BASE_ADDR) + MX51_NFC_AXI_BASE_ADDR_VIRT)
266
267#define MX51_IS_MEM_DEVICE_NONSHARED(x) 0 263#define MX51_IS_MEM_DEVICE_NONSHARED(x) 0
268 264
269/* 265/*
@@ -443,12 +439,7 @@
443 439
444#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) 440#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS)
445 441
446extern unsigned int system_rev; 442extern int mx51_revision(void);
447
448static inline unsigned int mx51_revision(void)
449{
450 return system_rev;
451}
452#endif 443#endif
453 444
454#endif /* __ASM_ARCH_MXC_MX51_H__ */ 445#endif /* __ASM_ARCH_MXC_MX51_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
index 52e476a150ca..b6d3d0fddc48 100644
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ b/arch/arm/plat-mxc/include/mach/uncompress.h
@@ -66,6 +66,7 @@ static inline void flush(void)
66#define MX2X_UART1_BASE_ADDR 0x1000a000 66#define MX2X_UART1_BASE_ADDR 0x1000a000
67#define MX3X_UART1_BASE_ADDR 0x43F90000 67#define MX3X_UART1_BASE_ADDR 0x43F90000
68#define MX3X_UART2_BASE_ADDR 0x43F94000 68#define MX3X_UART2_BASE_ADDR 0x43F94000
69#define MX51_UART1_BASE_ADDR 0x73fbc000
69 70
70static __inline__ void __arch_decomp_setup(unsigned long arch_id) 71static __inline__ void __arch_decomp_setup(unsigned long arch_id)
71{ 72{
@@ -101,6 +102,9 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
101 case MACH_TYPE_MAGX_ZN5: 102 case MACH_TYPE_MAGX_ZN5:
102 uart_base = MX3X_UART2_BASE_ADDR; 103 uart_base = MX3X_UART2_BASE_ADDR;
103 break; 104 break;
105 case MACH_TYPE_MX51_BABBAGE:
106 uart_base = MX51_UART1_BASE_ADDR;
107 break;
104 default: 108 default:
105 break; 109 break;
106 } 110 }
diff --git a/arch/mips/alchemy/devboards/db1200/setup.c b/arch/mips/alchemy/devboards/db1200/setup.c
index 379536e3abd1..be7e92ea01f3 100644
--- a/arch/mips/alchemy/devboards/db1200/setup.c
+++ b/arch/mips/alchemy/devboards/db1200/setup.c
@@ -60,43 +60,6 @@ void __init board_setup(void)
60 wmb(); 60 wmb();
61} 61}
62 62
63/* use the hexleds to count the number of times the cpu has entered
64 * wait, the dots to indicate whether the CPU is currently idle or
65 * active (dots off = sleeping, dots on = working) for cases where
66 * the number doesn't change for a long(er) period of time.
67 */
68static void db1200_wait(void)
69{
70 __asm__(" .set push \n"
71 " .set mips3 \n"
72 " .set noreorder \n"
73 " cache 0x14, 0(%0) \n"
74 " cache 0x14, 32(%0) \n"
75 " cache 0x14, 64(%0) \n"
76 /* dots off: we're about to call wait */
77 " lui $26, 0xb980 \n"
78 " ori $27, $0, 3 \n"
79 " sb $27, 0x18($26) \n"
80 " sync \n"
81 " nop \n"
82 " wait \n"
83 " nop \n"
84 " nop \n"
85 " nop \n"
86 " nop \n"
87 " nop \n"
88 /* dots on: there's work to do, increment cntr */
89 " lui $26, 0xb980 \n"
90 " sb $0, 0x18($26) \n"
91 " lui $26, 0xb9c0 \n"
92 " lb $27, 0($26) \n"
93 " addiu $27, $27, 1 \n"
94 " sb $27, 0($26) \n"
95 " sync \n"
96 " .set pop \n"
97 : : "r" (db1200_wait));
98}
99
100static int __init db1200_arch_init(void) 63static int __init db1200_arch_init(void)
101{ 64{
102 /* GPIO7 is low-level triggered CPLD cascade */ 65 /* GPIO7 is low-level triggered CPLD cascade */
@@ -110,9 +73,6 @@ static int __init db1200_arch_init(void)
110 irq_to_desc(DB1200_SD0_INSERT_INT)->status |= IRQ_NOAUTOEN; 73 irq_to_desc(DB1200_SD0_INSERT_INT)->status |= IRQ_NOAUTOEN;
111 irq_to_desc(DB1200_SD0_EJECT_INT)->status |= IRQ_NOAUTOEN; 74 irq_to_desc(DB1200_SD0_EJECT_INT)->status |= IRQ_NOAUTOEN;
112 75
113 if (cpu_wait)
114 cpu_wait = db1200_wait;
115
116 return 0; 76 return 0;
117} 77}
118arch_initcall(db1200_arch_init); 78arch_initcall(db1200_arch_init);
diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c
index 246df7aca2e7..2fafc78e5ce1 100644
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -168,7 +168,7 @@ static struct plat_vlynq_data vlynq_high_data = {
168 .on = vlynq_on, 168 .on = vlynq_on,
169 .off = vlynq_off, 169 .off = vlynq_off,
170 }, 170 },
171 .reset_bit = 26, 171 .reset_bit = 16,
172 .gpio_bit = 19, 172 .gpio_bit = 19,
173}; 173};
174 174
@@ -600,6 +600,7 @@ static int __init ar7_register_devices(void)
600 } 600 }
601 601
602 if (ar7_has_high_cpmac()) { 602 if (ar7_has_high_cpmac()) {
603 res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status);
603 if (!res) { 604 if (!res) {
604 cpmac_get_mac(1, cpmac_high_data.dev_addr); 605 cpmac_get_mac(1, cpmac_high_data.dev_addr);
605 606
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index ea17941168ca..8dba8cfb752f 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -18,6 +18,7 @@
18#include <asm/addrspace.h> 18#include <asm/addrspace.h>
19#include <bcm63xx_board.h> 19#include <bcm63xx_board.h>
20#include <bcm63xx_cpu.h> 20#include <bcm63xx_cpu.h>
21#include <bcm63xx_dev_uart.h>
21#include <bcm63xx_regs.h> 22#include <bcm63xx_regs.h>
22#include <bcm63xx_io.h> 23#include <bcm63xx_io.h>
23#include <bcm63xx_dev_pci.h> 24#include <bcm63xx_dev_pci.h>
@@ -40,6 +41,7 @@ static struct board_info __initdata board_96338gw = {
40 .name = "96338GW", 41 .name = "96338GW",
41 .expected_cpu_id = 0x6338, 42 .expected_cpu_id = 0x6338,
42 43
44 .has_uart0 = 1,
43 .has_enet0 = 1, 45 .has_enet0 = 1,
44 .enet0 = { 46 .enet0 = {
45 .force_speed_100 = 1, 47 .force_speed_100 = 1,
@@ -82,6 +84,7 @@ static struct board_info __initdata board_96338w = {
82 .name = "96338W", 84 .name = "96338W",
83 .expected_cpu_id = 0x6338, 85 .expected_cpu_id = 0x6338,
84 86
87 .has_uart0 = 1,
85 .has_enet0 = 1, 88 .has_enet0 = 1,
86 .enet0 = { 89 .enet0 = {
87 .force_speed_100 = 1, 90 .force_speed_100 = 1,
@@ -126,6 +129,8 @@ static struct board_info __initdata board_96338w = {
126static struct board_info __initdata board_96345gw2 = { 129static struct board_info __initdata board_96345gw2 = {
127 .name = "96345GW2", 130 .name = "96345GW2",
128 .expected_cpu_id = 0x6345, 131 .expected_cpu_id = 0x6345,
132
133 .has_uart0 = 1,
129}; 134};
130#endif 135#endif
131 136
@@ -137,6 +142,7 @@ static struct board_info __initdata board_96348r = {
137 .name = "96348R", 142 .name = "96348R",
138 .expected_cpu_id = 0x6348, 143 .expected_cpu_id = 0x6348,
139 144
145 .has_uart0 = 1,
140 .has_enet0 = 1, 146 .has_enet0 = 1,
141 .has_pci = 1, 147 .has_pci = 1,
142 148
@@ -180,6 +186,7 @@ static struct board_info __initdata board_96348gw_10 = {
180 .name = "96348GW-10", 186 .name = "96348GW-10",
181 .expected_cpu_id = 0x6348, 187 .expected_cpu_id = 0x6348,
182 188
189 .has_uart0 = 1,
183 .has_enet0 = 1, 190 .has_enet0 = 1,
184 .has_enet1 = 1, 191 .has_enet1 = 1,
185 .has_pci = 1, 192 .has_pci = 1,
@@ -239,6 +246,7 @@ static struct board_info __initdata board_96348gw_11 = {
239 .name = "96348GW-11", 246 .name = "96348GW-11",
240 .expected_cpu_id = 0x6348, 247 .expected_cpu_id = 0x6348,
241 248
249 .has_uart0 = 1,
242 .has_enet0 = 1, 250 .has_enet0 = 1,
243 .has_enet1 = 1, 251 .has_enet1 = 1,
244 .has_pci = 1, 252 .has_pci = 1,
@@ -292,6 +300,7 @@ static struct board_info __initdata board_96348gw = {
292 .name = "96348GW", 300 .name = "96348GW",
293 .expected_cpu_id = 0x6348, 301 .expected_cpu_id = 0x6348,
294 302
303 .has_uart0 = 1,
295 .has_enet0 = 1, 304 .has_enet0 = 1,
296 .has_enet1 = 1, 305 .has_enet1 = 1,
297 .has_pci = 1, 306 .has_pci = 1,
@@ -349,9 +358,10 @@ static struct board_info __initdata board_FAST2404 = {
349 .name = "F@ST2404", 358 .name = "F@ST2404",
350 .expected_cpu_id = 0x6348, 359 .expected_cpu_id = 0x6348,
351 360
352 .has_enet0 = 1, 361 .has_uart0 = 1,
353 .has_enet1 = 1, 362 .has_enet0 = 1,
354 .has_pci = 1, 363 .has_enet1 = 1,
364 .has_pci = 1,
355 365
356 .enet0 = { 366 .enet0 = {
357 .has_phy = 1, 367 .has_phy = 1,
@@ -368,10 +378,30 @@ static struct board_info __initdata board_FAST2404 = {
368 .has_ehci0 = 1, 378 .has_ehci0 = 1,
369}; 379};
370 380
381static struct board_info __initdata board_rta1025w_16 = {
382 .name = "RTA1025W_16",
383 .expected_cpu_id = 0x6348,
384
385 .has_enet0 = 1,
386 .has_enet1 = 1,
387 .has_pci = 1,
388
389 .enet0 = {
390 .has_phy = 1,
391 .use_internal_phy = 1,
392 },
393 .enet1 = {
394 .force_speed_100 = 1,
395 .force_duplex_full = 1,
396 },
397};
398
399
371static struct board_info __initdata board_DV201AMR = { 400static struct board_info __initdata board_DV201AMR = {
372 .name = "DV201AMR", 401 .name = "DV201AMR",
373 .expected_cpu_id = 0x6348, 402 .expected_cpu_id = 0x6348,
374 403
404 .has_uart0 = 1,
375 .has_pci = 1, 405 .has_pci = 1,
376 .has_ohci0 = 1, 406 .has_ohci0 = 1,
377 407
@@ -391,6 +421,7 @@ static struct board_info __initdata board_96348gw_a = {
391 .name = "96348GW-A", 421 .name = "96348GW-A",
392 .expected_cpu_id = 0x6348, 422 .expected_cpu_id = 0x6348,
393 423
424 .has_uart0 = 1,
394 .has_enet0 = 1, 425 .has_enet0 = 1,
395 .has_enet1 = 1, 426 .has_enet1 = 1,
396 .has_pci = 1, 427 .has_pci = 1,
@@ -416,6 +447,7 @@ static struct board_info __initdata board_96358vw = {
416 .name = "96358VW", 447 .name = "96358VW",
417 .expected_cpu_id = 0x6358, 448 .expected_cpu_id = 0x6358,
418 449
450 .has_uart0 = 1,
419 .has_enet0 = 1, 451 .has_enet0 = 1,
420 .has_enet1 = 1, 452 .has_enet1 = 1,
421 .has_pci = 1, 453 .has_pci = 1,
@@ -467,6 +499,7 @@ static struct board_info __initdata board_96358vw2 = {
467 .name = "96358VW2", 499 .name = "96358VW2",
468 .expected_cpu_id = 0x6358, 500 .expected_cpu_id = 0x6358,
469 501
502 .has_uart0 = 1,
470 .has_enet0 = 1, 503 .has_enet0 = 1,
471 .has_enet1 = 1, 504 .has_enet1 = 1,
472 .has_pci = 1, 505 .has_pci = 1,
@@ -514,6 +547,7 @@ static struct board_info __initdata board_AGPFS0 = {
514 .name = "AGPF-S0", 547 .name = "AGPF-S0",
515 .expected_cpu_id = 0x6358, 548 .expected_cpu_id = 0x6358,
516 549
550 .has_uart0 = 1,
517 .has_enet0 = 1, 551 .has_enet0 = 1,
518 .has_enet1 = 1, 552 .has_enet1 = 1,
519 .has_pci = 1, 553 .has_pci = 1,
@@ -531,6 +565,27 @@ static struct board_info __initdata board_AGPFS0 = {
531 .has_ohci0 = 1, 565 .has_ohci0 = 1,
532 .has_ehci0 = 1, 566 .has_ehci0 = 1,
533}; 567};
568
569static struct board_info __initdata board_DWVS0 = {
570 .name = "DWV-S0",
571 .expected_cpu_id = 0x6358,
572
573 .has_enet0 = 1,
574 .has_enet1 = 1,
575 .has_pci = 1,
576
577 .enet0 = {
578 .has_phy = 1,
579 .use_internal_phy = 1,
580 },
581
582 .enet1 = {
583 .force_speed_100 = 1,
584 .force_duplex_full = 1,
585 },
586
587 .has_ohci0 = 1,
588};
534#endif 589#endif
535 590
536/* 591/*
@@ -552,16 +607,88 @@ static const struct board_info __initdata *bcm963xx_boards[] = {
552 &board_FAST2404, 607 &board_FAST2404,
553 &board_DV201AMR, 608 &board_DV201AMR,
554 &board_96348gw_a, 609 &board_96348gw_a,
610 &board_rta1025w_16,
555#endif 611#endif
556 612
557#ifdef CONFIG_BCM63XX_CPU_6358 613#ifdef CONFIG_BCM63XX_CPU_6358
558 &board_96358vw, 614 &board_96358vw,
559 &board_96358vw2, 615 &board_96358vw2,
560 &board_AGPFS0, 616 &board_AGPFS0,
617 &board_DWVS0,
561#endif 618#endif
562}; 619};
563 620
564/* 621/*
622 * Register a sane SPROMv2 to make the on-board
623 * bcm4318 WLAN work
624 */
625#ifdef CONFIG_SSB_PCIHOST
626static struct ssb_sprom bcm63xx_sprom = {
627 .revision = 0x02,
628 .board_rev = 0x17,
629 .country_code = 0x0,
630 .ant_available_bg = 0x3,
631 .pa0b0 = 0x15ae,
632 .pa0b1 = 0xfa85,
633 .pa0b2 = 0xfe8d,
634 .pa1b0 = 0xffff,
635 .pa1b1 = 0xffff,
636 .pa1b2 = 0xffff,
637 .gpio0 = 0xff,
638 .gpio1 = 0xff,
639 .gpio2 = 0xff,
640 .gpio3 = 0xff,
641 .maxpwr_bg = 0x004c,
642 .itssi_bg = 0x00,
643 .boardflags_lo = 0x2848,
644 .boardflags_hi = 0x0000,
645};
646#endif
647
648/*
649 * return board name for /proc/cpuinfo
650 */
651const char *board_get_name(void)
652{
653 return board.name;
654}
655
656/*
657 * register & return a new board mac address
658 */
659static int board_get_mac_address(u8 *mac)
660{
661 u8 *p;
662 int count;
663
664 if (mac_addr_used >= nvram.mac_addr_count) {
665 printk(KERN_ERR PFX "not enough mac address\n");
666 return -ENODEV;
667 }
668
669 memcpy(mac, nvram.mac_addr_base, ETH_ALEN);
670 p = mac + ETH_ALEN - 1;
671 count = mac_addr_used;
672
673 while (count--) {
674 do {
675 (*p)++;
676 if (*p != 0)
677 break;
678 p--;
679 } while (p != mac);
680 }
681
682 if (p == mac) {
683 printk(KERN_ERR PFX "unable to fetch mac address\n");
684 return -ENODEV;
685 }
686
687 mac_addr_used++;
688 return 0;
689}
690
691/*
565 * early init callback, read nvram data from flash and checksum it 692 * early init callback, read nvram data from flash and checksum it
566 */ 693 */
567void __init board_prom_init(void) 694void __init board_prom_init(void)
@@ -659,6 +786,17 @@ void __init board_prom_init(void)
659 } 786 }
660 787
661 bcm_gpio_writel(val, GPIO_MODE_REG); 788 bcm_gpio_writel(val, GPIO_MODE_REG);
789
790 /* Generate MAC address for WLAN and
791 * register our SPROM */
792#ifdef CONFIG_SSB_PCIHOST
793 if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
794 memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
795 memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
796 if (ssb_arch_set_fallback_sprom(&bcm63xx_sprom) < 0)
797 printk(KERN_ERR "failed to register fallback SPROM\n");
798 }
799#endif
662} 800}
663 801
664/* 802/*
@@ -676,49 +814,6 @@ void __init board_setup(void)
676 panic("unexpected CPU for bcm963xx board"); 814 panic("unexpected CPU for bcm963xx board");
677} 815}
678 816
679/*
680 * return board name for /proc/cpuinfo
681 */
682const char *board_get_name(void)
683{
684 return board.name;
685}
686
687/*
688 * register & return a new board mac address
689 */
690static int board_get_mac_address(u8 *mac)
691{
692 u8 *p;
693 int count;
694
695 if (mac_addr_used >= nvram.mac_addr_count) {
696 printk(KERN_ERR PFX "not enough mac address\n");
697 return -ENODEV;
698 }
699
700 memcpy(mac, nvram.mac_addr_base, ETH_ALEN);
701 p = mac + ETH_ALEN - 1;
702 count = mac_addr_used;
703
704 while (count--) {
705 do {
706 (*p)++;
707 if (*p != 0)
708 break;
709 p--;
710 } while (p != mac);
711 }
712
713 if (p == mac) {
714 printk(KERN_ERR PFX "unable to fetch mac address\n");
715 return -ENODEV;
716 }
717
718 mac_addr_used++;
719 return 0;
720}
721
722static struct mtd_partition mtd_partitions[] = { 817static struct mtd_partition mtd_partitions[] = {
723 { 818 {
724 .name = "cfe", 819 .name = "cfe",
@@ -750,33 +845,6 @@ static struct platform_device mtd_dev = {
750 }, 845 },
751}; 846};
752 847
753/*
754 * Register a sane SPROMv2 to make the on-board
755 * bcm4318 WLAN work
756 */
757#ifdef CONFIG_SSB_PCIHOST
758static struct ssb_sprom bcm63xx_sprom = {
759 .revision = 0x02,
760 .board_rev = 0x17,
761 .country_code = 0x0,
762 .ant_available_bg = 0x3,
763 .pa0b0 = 0x15ae,
764 .pa0b1 = 0xfa85,
765 .pa0b2 = 0xfe8d,
766 .pa1b0 = 0xffff,
767 .pa1b1 = 0xffff,
768 .pa1b2 = 0xffff,
769 .gpio0 = 0xff,
770 .gpio1 = 0xff,
771 .gpio2 = 0xff,
772 .gpio3 = 0xff,
773 .maxpwr_bg = 0x004c,
774 .itssi_bg = 0x00,
775 .boardflags_lo = 0x2848,
776 .boardflags_hi = 0x0000,
777};
778#endif
779
780static struct gpio_led_platform_data bcm63xx_led_data; 848static struct gpio_led_platform_data bcm63xx_led_data;
781 849
782static struct platform_device bcm63xx_gpio_leds = { 850static struct platform_device bcm63xx_gpio_leds = {
@@ -792,6 +860,12 @@ int __init board_register_devices(void)
792{ 860{
793 u32 val; 861 u32 val;
794 862
863 if (board.has_uart0)
864 bcm63xx_uart_register(0);
865
866 if (board.has_uart1)
867 bcm63xx_uart_register(1);
868
795 if (board.has_pccard) 869 if (board.has_pccard)
796 bcm63xx_pcmcia_register(); 870 bcm63xx_pcmcia_register();
797 871
@@ -806,17 +880,6 @@ int __init board_register_devices(void)
806 if (board.has_dsp) 880 if (board.has_dsp)
807 bcm63xx_dsp_register(&board.dsp); 881 bcm63xx_dsp_register(&board.dsp);
808 882
809 /* Generate MAC address for WLAN and
810 * register our SPROM */
811#ifdef CONFIG_SSB_PCIHOST
812 if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
813 memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
814 memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
815 if (ssb_arch_set_fallback_sprom(&bcm63xx_sprom) < 0)
816 printk(KERN_ERR "failed to register fallback SPROM\n");
817 }
818#endif
819
820 /* read base address of boot chip select (0) */ 883 /* read base address of boot chip select (0) */
821 if (BCMCPU_IS_6345()) 884 if (BCMCPU_IS_6345())
822 val = 0x1fc00000; 885 val = 0x1fc00000;
diff --git a/arch/mips/bcm63xx/cpu.c b/arch/mips/bcm63xx/cpu.c
index 70378bb5e3f9..cbb7caf86d77 100644
--- a/arch/mips/bcm63xx/cpu.c
+++ b/arch/mips/bcm63xx/cpu.c
@@ -36,6 +36,7 @@ static const unsigned long bcm96338_regs_base[] = {
36 [RSET_TIMER] = BCM_6338_TIMER_BASE, 36 [RSET_TIMER] = BCM_6338_TIMER_BASE,
37 [RSET_WDT] = BCM_6338_WDT_BASE, 37 [RSET_WDT] = BCM_6338_WDT_BASE,
38 [RSET_UART0] = BCM_6338_UART0_BASE, 38 [RSET_UART0] = BCM_6338_UART0_BASE,
39 [RSET_UART1] = BCM_6338_UART1_BASE,
39 [RSET_GPIO] = BCM_6338_GPIO_BASE, 40 [RSET_GPIO] = BCM_6338_GPIO_BASE,
40 [RSET_SPI] = BCM_6338_SPI_BASE, 41 [RSET_SPI] = BCM_6338_SPI_BASE,
41 [RSET_OHCI0] = BCM_6338_OHCI0_BASE, 42 [RSET_OHCI0] = BCM_6338_OHCI0_BASE,
@@ -72,6 +73,7 @@ static const unsigned long bcm96345_regs_base[] = {
72 [RSET_TIMER] = BCM_6345_TIMER_BASE, 73 [RSET_TIMER] = BCM_6345_TIMER_BASE,
73 [RSET_WDT] = BCM_6345_WDT_BASE, 74 [RSET_WDT] = BCM_6345_WDT_BASE,
74 [RSET_UART0] = BCM_6345_UART0_BASE, 75 [RSET_UART0] = BCM_6345_UART0_BASE,
76 [RSET_UART1] = BCM_6345_UART1_BASE,
75 [RSET_GPIO] = BCM_6345_GPIO_BASE, 77 [RSET_GPIO] = BCM_6345_GPIO_BASE,
76 [RSET_SPI] = BCM_6345_SPI_BASE, 78 [RSET_SPI] = BCM_6345_SPI_BASE,
77 [RSET_UDC0] = BCM_6345_UDC0_BASE, 79 [RSET_UDC0] = BCM_6345_UDC0_BASE,
@@ -109,6 +111,7 @@ static const unsigned long bcm96348_regs_base[] = {
109 [RSET_TIMER] = BCM_6348_TIMER_BASE, 111 [RSET_TIMER] = BCM_6348_TIMER_BASE,
110 [RSET_WDT] = BCM_6348_WDT_BASE, 112 [RSET_WDT] = BCM_6348_WDT_BASE,
111 [RSET_UART0] = BCM_6348_UART0_BASE, 113 [RSET_UART0] = BCM_6348_UART0_BASE,
114 [RSET_UART1] = BCM_6348_UART1_BASE,
112 [RSET_GPIO] = BCM_6348_GPIO_BASE, 115 [RSET_GPIO] = BCM_6348_GPIO_BASE,
113 [RSET_SPI] = BCM_6348_SPI_BASE, 116 [RSET_SPI] = BCM_6348_SPI_BASE,
114 [RSET_OHCI0] = BCM_6348_OHCI0_BASE, 117 [RSET_OHCI0] = BCM_6348_OHCI0_BASE,
@@ -150,6 +153,7 @@ static const unsigned long bcm96358_regs_base[] = {
150 [RSET_TIMER] = BCM_6358_TIMER_BASE, 153 [RSET_TIMER] = BCM_6358_TIMER_BASE,
151 [RSET_WDT] = BCM_6358_WDT_BASE, 154 [RSET_WDT] = BCM_6358_WDT_BASE,
152 [RSET_UART0] = BCM_6358_UART0_BASE, 155 [RSET_UART0] = BCM_6358_UART0_BASE,
156 [RSET_UART1] = BCM_6358_UART1_BASE,
153 [RSET_GPIO] = BCM_6358_GPIO_BASE, 157 [RSET_GPIO] = BCM_6358_GPIO_BASE,
154 [RSET_SPI] = BCM_6358_SPI_BASE, 158 [RSET_SPI] = BCM_6358_SPI_BASE,
155 [RSET_OHCI0] = BCM_6358_OHCI0_BASE, 159 [RSET_OHCI0] = BCM_6358_OHCI0_BASE,
@@ -170,6 +174,7 @@ static const unsigned long bcm96358_regs_base[] = {
170static const int bcm96358_irqs[] = { 174static const int bcm96358_irqs[] = {
171 [IRQ_TIMER] = BCM_6358_TIMER_IRQ, 175 [IRQ_TIMER] = BCM_6358_TIMER_IRQ,
172 [IRQ_UART0] = BCM_6358_UART0_IRQ, 176 [IRQ_UART0] = BCM_6358_UART0_IRQ,
177 [IRQ_UART1] = BCM_6358_UART1_IRQ,
173 [IRQ_DSL] = BCM_6358_DSL_IRQ, 178 [IRQ_DSL] = BCM_6358_DSL_IRQ,
174 [IRQ_ENET0] = BCM_6358_ENET0_IRQ, 179 [IRQ_ENET0] = BCM_6358_ENET0_IRQ,
175 [IRQ_ENET1] = BCM_6358_ENET1_IRQ, 180 [IRQ_ENET1] = BCM_6358_ENET1_IRQ,
diff --git a/arch/mips/bcm63xx/dev-uart.c b/arch/mips/bcm63xx/dev-uart.c
index b0519461ad9b..c2963da0253e 100644
--- a/arch/mips/bcm63xx/dev-uart.c
+++ b/arch/mips/bcm63xx/dev-uart.c
@@ -11,31 +11,65 @@
11#include <linux/platform_device.h> 11#include <linux/platform_device.h>
12#include <bcm63xx_cpu.h> 12#include <bcm63xx_cpu.h>
13 13
14static struct resource uart_resources[] = { 14static struct resource uart0_resources[] = {
15 { 15 {
16 .start = -1, /* filled at runtime */ 16 /* start & end filled at runtime */
17 .end = -1, /* filled at runtime */
18 .flags = IORESOURCE_MEM, 17 .flags = IORESOURCE_MEM,
19 }, 18 },
20 { 19 {
21 .start = -1, /* filled at runtime */ 20 /* start filled at runtime */
22 .flags = IORESOURCE_IRQ, 21 .flags = IORESOURCE_IRQ,
23 }, 22 },
24}; 23};
25 24
26static struct platform_device bcm63xx_uart_device = { 25static struct resource uart1_resources[] = {
27 .name = "bcm63xx_uart", 26 {
28 .id = 0, 27 /* start & end filled at runtime */
29 .num_resources = ARRAY_SIZE(uart_resources), 28 .flags = IORESOURCE_MEM,
30 .resource = uart_resources, 29 },
30 {
31 /* start filled at runtime */
32 .flags = IORESOURCE_IRQ,
33 },
34};
35
36static struct platform_device bcm63xx_uart_devices[] = {
37 {
38 .name = "bcm63xx_uart",
39 .id = 0,
40 .num_resources = ARRAY_SIZE(uart0_resources),
41 .resource = uart0_resources,
42 },
43
44 {
45 .name = "bcm63xx_uart",
46 .id = 1,
47 .num_resources = ARRAY_SIZE(uart1_resources),
48 .resource = uart1_resources,
49 }
31}; 50};
32 51
33int __init bcm63xx_uart_register(void) 52int __init bcm63xx_uart_register(unsigned int id)
34{ 53{
35 uart_resources[0].start = bcm63xx_regset_address(RSET_UART0); 54 if (id >= ARRAY_SIZE(bcm63xx_uart_devices))
36 uart_resources[0].end = uart_resources[0].start; 55 return -ENODEV;
37 uart_resources[0].end += RSET_UART_SIZE - 1; 56
38 uart_resources[1].start = bcm63xx_get_irq_number(IRQ_UART0); 57 if (id == 1 && !BCMCPU_IS_6358())
39 return platform_device_register(&bcm63xx_uart_device); 58 return -ENODEV;
59
60 if (id == 0) {
61 uart0_resources[0].start = bcm63xx_regset_address(RSET_UART0);
62 uart0_resources[0].end = uart0_resources[0].start +
63 RSET_UART_SIZE - 1;
64 uart0_resources[1].start = bcm63xx_get_irq_number(IRQ_UART0);
65 }
66
67 if (id == 1) {
68 uart1_resources[0].start = bcm63xx_regset_address(RSET_UART1);
69 uart1_resources[0].end = uart1_resources[0].start +
70 RSET_UART_SIZE - 1;
71 uart1_resources[1].start = bcm63xx_get_irq_number(IRQ_UART1);
72 }
73
74 return platform_device_register(&bcm63xx_uart_devices[id]);
40} 75}
41arch_initcall(bcm63xx_uart_register);
diff --git a/arch/mips/bcm63xx/gpio.c b/arch/mips/bcm63xx/gpio.c
index 87ca39046334..315bc7f79ce1 100644
--- a/arch/mips/bcm63xx/gpio.c
+++ b/arch/mips/bcm63xx/gpio.c
@@ -125,10 +125,10 @@ static struct gpio_chip bcm63xx_gpio_chip = {
125 125
126int __init bcm63xx_gpio_init(void) 126int __init bcm63xx_gpio_init(void)
127{ 127{
128 gpio_out_low = bcm_gpio_readl(GPIO_DATA_LO_REG);
129 gpio_out_high = bcm_gpio_readl(GPIO_DATA_HI_REG);
128 bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count(); 130 bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count();
129 pr_info("registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio); 131 pr_info("registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio);
130 132
131 return gpiochip_add(&bcm63xx_gpio_chip); 133 return gpiochip_add(&bcm63xx_gpio_chip);
132} 134}
133
134arch_initcall(bcm63xx_gpio_init);
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index b321d3b16877..9a06fa9f9f0c 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -45,9 +45,6 @@ extern struct plat_smp_ops octeon_smp_ops;
45extern void pci_console_init(const char *arg); 45extern void pci_console_init(const char *arg);
46#endif 46#endif
47 47
48#ifdef CONFIG_CAVIUM_RESERVE32
49extern uint64_t octeon_reserve32_memory;
50#endif
51static unsigned long long MAX_MEMORY = 512ull << 20; 48static unsigned long long MAX_MEMORY = 512ull << 20;
52 49
53struct octeon_boot_descriptor *octeon_boot_desc_ptr; 50struct octeon_boot_descriptor *octeon_boot_desc_ptr;
@@ -186,54 +183,6 @@ void octeon_check_cpu_bist(void)
186 write_octeon_c0_dcacheerr(0); 183 write_octeon_c0_dcacheerr(0);
187} 184}
188 185
189#ifdef CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB
190/**
191 * Called on every core to setup the wired tlb entry needed
192 * if CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB is set.
193 *
194 */
195static void octeon_hal_setup_per_cpu_reserved32(void *unused)
196{
197 /*
198 * The config has selected to wire the reserve32 memory for all
199 * userspace applications. We need to put a wired TLB entry in for each
200 * 512MB of reserve32 memory. We only handle double 256MB pages here,
201 * so reserve32 must be multiple of 512MB.
202 */
203 uint32_t size = CONFIG_CAVIUM_RESERVE32;
204 uint32_t entrylo0 =
205 0x7 | ((octeon_reserve32_memory & ((1ul << 40) - 1)) >> 6);
206 uint32_t entrylo1 = entrylo0 + (256 << 14);
207 uint32_t entryhi = (0x80000000UL - (CONFIG_CAVIUM_RESERVE32 << 20));
208 while (size >= 512) {
209#if 0
210 pr_info("CPU%d: Adding double wired TLB entry for 0x%lx\n",
211 smp_processor_id(), entryhi);
212#endif
213 add_wired_entry(entrylo0, entrylo1, entryhi, PM_256M);
214 entrylo0 += 512 << 14;
215 entrylo1 += 512 << 14;
216 entryhi += 512 << 20;
217 size -= 512;
218 }
219}
220#endif /* CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB */
221
222/**
223 * Called to release the named block which was used to made sure
224 * that nobody used the memory for something else during
225 * init. Now we'll free it so userspace apps can use this
226 * memory region with bootmem_alloc.
227 *
228 * This function is called only once from prom_free_prom_memory().
229 */
230void octeon_hal_setup_reserved32(void)
231{
232#ifdef CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB
233 on_each_cpu(octeon_hal_setup_per_cpu_reserved32, NULL, 0, 1);
234#endif
235}
236
237/** 186/**
238 * Reboot Octeon 187 * Reboot Octeon
239 * 188 *
@@ -294,18 +243,6 @@ static void octeon_halt(void)
294 octeon_kill_core(NULL); 243 octeon_kill_core(NULL);
295} 244}
296 245
297#if 0
298/**
299 * Platform time init specifics.
300 * Returns
301 */
302void __init plat_time_init(void)
303{
304 /* Nothing special here, but we are required to have one */
305}
306
307#endif
308
309/** 246/**
310 * Handle all the error condition interrupts that might occur. 247 * Handle all the error condition interrupts that might occur.
311 * 248 *
@@ -502,25 +439,13 @@ void __init prom_init(void)
502 * memory when it is getting memory from the 439 * memory when it is getting memory from the
503 * bootloader. Later, after the memory allocations are 440 * bootloader. Later, after the memory allocations are
504 * complete, the reserve32 will be freed. 441 * complete, the reserve32 will be freed.
505 */ 442 *
506#ifdef CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB
507 if (CONFIG_CAVIUM_RESERVE32 & 0x1ff)
508 pr_err("CAVIUM_RESERVE32 isn't a multiple of 512MB. "
509 "This is required if CAVIUM_RESERVE32_USE_WIRED_TLB "
510 "is set\n");
511 else
512 addr = cvmx_bootmem_phy_named_block_alloc(CONFIG_CAVIUM_RESERVE32 << 20,
513 0, 0, 512 << 20,
514 "CAVIUM_RESERVE32", 0);
515#else
516 /*
517 * Allocate memory for RESERVED32 aligned on 2MB boundary. This 443 * Allocate memory for RESERVED32 aligned on 2MB boundary. This
518 * is in case we later use hugetlb entries with it. 444 * is in case we later use hugetlb entries with it.
519 */ 445 */
520 addr = cvmx_bootmem_phy_named_block_alloc(CONFIG_CAVIUM_RESERVE32 << 20, 446 addr = cvmx_bootmem_phy_named_block_alloc(CONFIG_CAVIUM_RESERVE32 << 20,
521 0, 0, 2 << 20, 447 0, 0, 2 << 20,
522 "CAVIUM_RESERVE32", 0); 448 "CAVIUM_RESERVE32", 0);
523#endif
524 if (addr < 0) 449 if (addr < 0)
525 pr_err("Failed to allocate CAVIUM_RESERVE32 memory area\n"); 450 pr_err("Failed to allocate CAVIUM_RESERVE32 memory area\n");
526 else 451 else
@@ -817,9 +742,4 @@ void prom_free_prom_memory(void)
817 panic("Unable to request_irq(OCTEON_IRQ_RML)\n"); 742 panic("Unable to request_irq(OCTEON_IRQ_RML)\n");
818 } 743 }
819#endif 744#endif
820
821 /* This call is here so that it is performed after any TLB
822 initializations. It needs to be after these in case the
823 CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB option is set */
824 octeon_hal_setup_reserved32();
825} 745}
diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c
index 51e980290ce1..6d99b9d8887d 100644
--- a/arch/mips/cavium-octeon/smp.c
+++ b/arch/mips/cavium-octeon/smp.c
@@ -279,14 +279,6 @@ static void octeon_cpu_die(unsigned int cpu)
279 uint32_t avail_coremask; 279 uint32_t avail_coremask;
280 struct cvmx_bootmem_named_block_desc *block_desc; 280 struct cvmx_bootmem_named_block_desc *block_desc;
281 281
282#ifdef CONFIG_CAVIUM_OCTEON_WATCHDOG
283 /* Disable the watchdog */
284 cvmx_ciu_wdogx_t ciu_wdog;
285 ciu_wdog.u64 = cvmx_read_csr(CVMX_CIU_WDOGX(cpu));
286 ciu_wdog.s.mode = 0;
287 cvmx_write_csr(CVMX_CIU_WDOGX(cpu), ciu_wdog.u64);
288#endif
289
290 while (per_cpu(cpu_state, cpu) != CPU_DEAD) 282 while (per_cpu(cpu_state, cpu) != CPU_DEAD)
291 cpu_relax(); 283 cpu_relax();
292 284
diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig
index c2f06e38c854..0583bb29150f 100644
--- a/arch/mips/configs/bigsur_defconfig
+++ b/arch/mips/configs/bigsur_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc8 3# Linux kernel version: 2.6.34-rc3
4# Wed Jul 2 17:02:55 2008 4# Sat Apr 3 16:32:11 2010
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
@@ -9,20 +9,25 @@ CONFIG_MIPS=y
9# Machine selection 9# Machine selection
10# 10#
11# CONFIG_MACH_ALCHEMY is not set 11# CONFIG_MACH_ALCHEMY is not set
12# CONFIG_AR7 is not set
12# CONFIG_BCM47XX is not set 13# CONFIG_BCM47XX is not set
14# CONFIG_BCM63XX is not set
13# CONFIG_MIPS_COBALT is not set 15# CONFIG_MIPS_COBALT is not set
14# CONFIG_MACH_DECSTATION is not set 16# CONFIG_MACH_DECSTATION is not set
15# CONFIG_MACH_JAZZ is not set 17# CONFIG_MACH_JAZZ is not set
16# CONFIG_LASAT is not set 18# CONFIG_LASAT is not set
17# CONFIG_LEMOTE_FULONG is not set 19# CONFIG_MACH_LOONGSON is not set
18# CONFIG_MIPS_MALTA is not set 20# CONFIG_MIPS_MALTA is not set
19# CONFIG_MIPS_SIM is not set 21# CONFIG_MIPS_SIM is not set
20# CONFIG_MARKEINS is not set 22# CONFIG_NEC_MARKEINS is not set
21# CONFIG_MACH_VR41XX is not set 23# CONFIG_MACH_VR41XX is not set
24# CONFIG_NXP_STB220 is not set
25# CONFIG_NXP_STB225 is not set
22# CONFIG_PNX8550_JBS is not set 26# CONFIG_PNX8550_JBS is not set
23# CONFIG_PNX8550_STB810 is not set 27# CONFIG_PNX8550_STB810 is not set
24# CONFIG_PMC_MSP is not set 28# CONFIG_PMC_MSP is not set
25# CONFIG_PMC_YOSEMITE is not set 29# CONFIG_PMC_YOSEMITE is not set
30# CONFIG_POWERTV is not set
26# CONFIG_SGI_IP22 is not set 31# CONFIG_SGI_IP22 is not set
27# CONFIG_SGI_IP27 is not set 32# CONFIG_SGI_IP27 is not set
28# CONFIG_SGI_IP28 is not set 33# CONFIG_SGI_IP28 is not set
@@ -36,10 +41,13 @@ CONFIG_MIPS=y
36# CONFIG_SIBYTE_SENTOSA is not set 41# CONFIG_SIBYTE_SENTOSA is not set
37CONFIG_SIBYTE_BIGSUR=y 42CONFIG_SIBYTE_BIGSUR=y
38# CONFIG_SNI_RM is not set 43# CONFIG_SNI_RM is not set
39# CONFIG_TOSHIBA_JMR3927 is not set 44# CONFIG_MACH_TX39XX is not set
40# CONFIG_TOSHIBA_RBTX4927 is not set 45# CONFIG_MACH_TX49XX is not set
41# CONFIG_TOSHIBA_RBTX4938 is not set 46# CONFIG_MIKROTIK_RB532 is not set
42# CONFIG_WR_PPMC is not set 47# CONFIG_WR_PPMC is not set
48# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
49# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
50# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
43CONFIG_SIBYTE_BCM1x80=y 51CONFIG_SIBYTE_BCM1x80=y
44CONFIG_SIBYTE_SB1xxx_SOC=y 52CONFIG_SIBYTE_SB1xxx_SOC=y
45# CONFIG_CPU_SB1_PASS_1 is not set 53# CONFIG_CPU_SB1_PASS_1 is not set
@@ -48,14 +56,13 @@ CONFIG_SIBYTE_SB1xxx_SOC=y
48# CONFIG_CPU_SB1_PASS_4 is not set 56# CONFIG_CPU_SB1_PASS_4 is not set
49# CONFIG_CPU_SB1_PASS_2_112x is not set 57# CONFIG_CPU_SB1_PASS_2_112x is not set
50# CONFIG_CPU_SB1_PASS_3 is not set 58# CONFIG_CPU_SB1_PASS_3 is not set
51# CONFIG_SIMULATION is not set
52# CONFIG_SB1_CEX_ALWAYS_FATAL is not set 59# CONFIG_SB1_CEX_ALWAYS_FATAL is not set
53# CONFIG_SB1_CERR_STALL is not set 60# CONFIG_SB1_CERR_STALL is not set
54CONFIG_SIBYTE_CFE=y
55# CONFIG_SIBYTE_CFE_CONSOLE is not set 61# CONFIG_SIBYTE_CFE_CONSOLE is not set
56# CONFIG_SIBYTE_BUS_WATCHER is not set 62# CONFIG_SIBYTE_BUS_WATCHER is not set
57# CONFIG_SIBYTE_TBPROF is not set 63# CONFIG_SIBYTE_TBPROF is not set
58CONFIG_SIBYTE_HAS_ZBUS_PROFILING=y 64CONFIG_SIBYTE_HAS_ZBUS_PROFILING=y
65CONFIG_LOONGSON_UART_BASE=y
59CONFIG_RWSEM_GENERIC_SPINLOCK=y 66CONFIG_RWSEM_GENERIC_SPINLOCK=y
60# CONFIG_ARCH_HAS_ILOG2_U32 is not set 67# CONFIG_ARCH_HAS_ILOG2_U32 is not set
61# CONFIG_ARCH_HAS_ILOG2_U64 is not set 68# CONFIG_ARCH_HAS_ILOG2_U64 is not set
@@ -66,15 +73,13 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y
66CONFIG_GENERIC_CLOCKEVENTS=y 73CONFIG_GENERIC_CLOCKEVENTS=y
67CONFIG_GENERIC_TIME=y 74CONFIG_GENERIC_TIME=y
68CONFIG_GENERIC_CMOS_UPDATE=y 75CONFIG_GENERIC_CMOS_UPDATE=y
69CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y 76CONFIG_SCHED_OMIT_FRAME_POINTER=y
70# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set 77CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
71CONFIG_CEVT_BCM1480=y 78CONFIG_CEVT_BCM1480=y
72CONFIG_CSRC_BCM1480=y 79CONFIG_CSRC_BCM1480=y
73CONFIG_CFE=y 80CONFIG_CFE=y
74CONFIG_DMA_COHERENT=y 81CONFIG_DMA_COHERENT=y
75CONFIG_EARLY_PRINTK=y
76CONFIG_SYS_HAS_EARLY_PRINTK=y 82CONFIG_SYS_HAS_EARLY_PRINTK=y
77# CONFIG_HOTPLUG_CPU is not set
78# CONFIG_NO_IOPORT is not set 83# CONFIG_NO_IOPORT is not set
79CONFIG_CPU_BIG_ENDIAN=y 84CONFIG_CPU_BIG_ENDIAN=y
80# CONFIG_CPU_LITTLE_ENDIAN is not set 85# CONFIG_CPU_LITTLE_ENDIAN is not set
@@ -88,7 +93,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
88# 93#
89# CPU selection 94# CPU selection
90# 95#
91# CONFIG_CPU_LOONGSON2 is not set 96# CONFIG_CPU_LOONGSON2E is not set
97# CONFIG_CPU_LOONGSON2F is not set
92# CONFIG_CPU_MIPS32_R1 is not set 98# CONFIG_CPU_MIPS32_R1 is not set
93# CONFIG_CPU_MIPS32_R2 is not set 99# CONFIG_CPU_MIPS32_R2 is not set
94# CONFIG_CPU_MIPS64_R1 is not set 100# CONFIG_CPU_MIPS64_R1 is not set
@@ -101,6 +107,7 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
101# CONFIG_CPU_TX49XX is not set 107# CONFIG_CPU_TX49XX is not set
102# CONFIG_CPU_R5000 is not set 108# CONFIG_CPU_R5000 is not set
103# CONFIG_CPU_R5432 is not set 109# CONFIG_CPU_R5432 is not set
110# CONFIG_CPU_R5500 is not set
104# CONFIG_CPU_R6000 is not set 111# CONFIG_CPU_R6000 is not set
105# CONFIG_CPU_NEVADA is not set 112# CONFIG_CPU_NEVADA is not set
106# CONFIG_CPU_R8000 is not set 113# CONFIG_CPU_R8000 is not set
@@ -108,6 +115,7 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
108# CONFIG_CPU_RM7000 is not set 115# CONFIG_CPU_RM7000 is not set
109# CONFIG_CPU_RM9000 is not set 116# CONFIG_CPU_RM9000 is not set
110CONFIG_CPU_SB1=y 117CONFIG_CPU_SB1=y
118# CONFIG_CPU_CAVIUM_OCTEON is not set
111CONFIG_SYS_HAS_CPU_SB1=y 119CONFIG_SYS_HAS_CPU_SB1=y
112CONFIG_WEAK_ORDERING=y 120CONFIG_WEAK_ORDERING=y
113CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y 121CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
@@ -123,11 +131,13 @@ CONFIG_64BIT=y
123CONFIG_PAGE_SIZE_4KB=y 131CONFIG_PAGE_SIZE_4KB=y
124# CONFIG_PAGE_SIZE_8KB is not set 132# CONFIG_PAGE_SIZE_8KB is not set
125# CONFIG_PAGE_SIZE_16KB is not set 133# CONFIG_PAGE_SIZE_16KB is not set
134# CONFIG_PAGE_SIZE_32KB is not set
126# CONFIG_PAGE_SIZE_64KB is not set 135# CONFIG_PAGE_SIZE_64KB is not set
127# CONFIG_SIBYTE_DMA_PAGEOPS is not set 136# CONFIG_SIBYTE_DMA_PAGEOPS is not set
128CONFIG_MIPS_MT_DISABLED=y 137CONFIG_MIPS_MT_DISABLED=y
129# CONFIG_MIPS_MT_SMP is not set 138# CONFIG_MIPS_MT_SMP is not set
130# CONFIG_MIPS_MT_SMTC is not set 139# CONFIG_MIPS_MT_SMTC is not set
140# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
131CONFIG_CPU_HAS_SYNC=y 141CONFIG_CPU_HAS_SYNC=y
132CONFIG_GENERIC_HARDIRQS=y 142CONFIG_GENERIC_HARDIRQS=y
133CONFIG_GENERIC_IRQ_PROBE=y 143CONFIG_GENERIC_IRQ_PROBE=y
@@ -142,18 +152,17 @@ CONFIG_FLATMEM_MANUAL=y
142# CONFIG_SPARSEMEM_MANUAL is not set 152# CONFIG_SPARSEMEM_MANUAL is not set
143CONFIG_FLATMEM=y 153CONFIG_FLATMEM=y
144CONFIG_FLAT_NODE_MEM_MAP=y 154CONFIG_FLAT_NODE_MEM_MAP=y
145# CONFIG_SPARSEMEM_STATIC is not set
146# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
147CONFIG_PAGEFLAGS_EXTENDED=y 155CONFIG_PAGEFLAGS_EXTENDED=y
148CONFIG_SPLIT_PTLOCK_CPUS=4 156CONFIG_SPLIT_PTLOCK_CPUS=4
149CONFIG_RESOURCES_64BIT=y 157CONFIG_PHYS_ADDR_T_64BIT=y
150CONFIG_ZONE_DMA_FLAG=0 158CONFIG_ZONE_DMA_FLAG=0
151CONFIG_VIRT_TO_BUS=y 159CONFIG_VIRT_TO_BUS=y
160# CONFIG_KSM is not set
161CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
152CONFIG_SMP=y 162CONFIG_SMP=y
153CONFIG_SYS_SUPPORTS_SMP=y 163CONFIG_SYS_SUPPORTS_SMP=y
154CONFIG_NR_CPUS_DEFAULT_4=y 164CONFIG_NR_CPUS_DEFAULT_4=y
155CONFIG_NR_CPUS=4 165CONFIG_NR_CPUS=4
156# CONFIG_MIPS_CMP is not set
157CONFIG_TICK_ONESHOT=y 166CONFIG_TICK_ONESHOT=y
158CONFIG_NO_HZ=y 167CONFIG_NO_HZ=y
159CONFIG_HIGH_RES_TIMERS=y 168CONFIG_HIGH_RES_TIMERS=y
@@ -175,6 +184,7 @@ CONFIG_SECCOMP=y
175CONFIG_LOCKDEP_SUPPORT=y 184CONFIG_LOCKDEP_SUPPORT=y
176CONFIG_STACKTRACE_SUPPORT=y 185CONFIG_STACKTRACE_SUPPORT=y
177CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 186CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
187CONFIG_CONSTRUCTORS=y
178 188
179# 189#
180# General setup 190# General setup
@@ -188,6 +198,7 @@ CONFIG_SWAP=y
188CONFIG_SYSVIPC=y 198CONFIG_SYSVIPC=y
189CONFIG_SYSVIPC_SYSCTL=y 199CONFIG_SYSVIPC_SYSCTL=y
190CONFIG_POSIX_MQUEUE=y 200CONFIG_POSIX_MQUEUE=y
201CONFIG_POSIX_MQUEUE_SYSCTL=y
191CONFIG_BSD_PROCESS_ACCT=y 202CONFIG_BSD_PROCESS_ACCT=y
192CONFIG_BSD_PROCESS_ACCT_V3=y 203CONFIG_BSD_PROCESS_ACCT_V3=y
193CONFIG_TASKSTATS=y 204CONFIG_TASKSTATS=y
@@ -195,23 +206,39 @@ CONFIG_TASK_DELAY_ACCT=y
195CONFIG_TASK_XACCT=y 206CONFIG_TASK_XACCT=y
196CONFIG_TASK_IO_ACCOUNTING=y 207CONFIG_TASK_IO_ACCOUNTING=y
197CONFIG_AUDIT=y 208CONFIG_AUDIT=y
209
210#
211# RCU Subsystem
212#
213CONFIG_TREE_RCU=y
214# CONFIG_TREE_PREEMPT_RCU is not set
215# CONFIG_TINY_RCU is not set
216# CONFIG_RCU_TRACE is not set
217CONFIG_RCU_FANOUT=64
218# CONFIG_RCU_FANOUT_EXACT is not set
219# CONFIG_RCU_FAST_NO_HZ is not set
220# CONFIG_TREE_RCU_TRACE is not set
198CONFIG_IKCONFIG=y 221CONFIG_IKCONFIG=y
199CONFIG_IKCONFIG_PROC=y 222CONFIG_IKCONFIG_PROC=y
200CONFIG_LOG_BUF_SHIFT=16 223CONFIG_LOG_BUF_SHIFT=16
201# CONFIG_CGROUPS is not set 224# CONFIG_CGROUPS is not set
202CONFIG_GROUP_SCHED=y 225# CONFIG_SYSFS_DEPRECATED_V2 is not set
203CONFIG_FAIR_GROUP_SCHED=y
204# CONFIG_RT_GROUP_SCHED is not set
205CONFIG_USER_SCHED=y
206# CONFIG_CGROUP_SCHED is not set
207CONFIG_SYSFS_DEPRECATED=y
208CONFIG_SYSFS_DEPRECATED_V2=y
209CONFIG_RELAY=y 226CONFIG_RELAY=y
210# CONFIG_NAMESPACES is not set 227CONFIG_NAMESPACES=y
228CONFIG_UTS_NS=y
229CONFIG_IPC_NS=y
230CONFIG_USER_NS=y
231CONFIG_PID_NS=y
232CONFIG_NET_NS=y
211CONFIG_BLK_DEV_INITRD=y 233CONFIG_BLK_DEV_INITRD=y
212CONFIG_INITRAMFS_SOURCE="" 234CONFIG_INITRAMFS_SOURCE=""
235CONFIG_RD_GZIP=y
236# CONFIG_RD_BZIP2 is not set
237# CONFIG_RD_LZMA is not set
238# CONFIG_RD_LZO is not set
213# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 239# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
214CONFIG_SYSCTL=y 240CONFIG_SYSCTL=y
241CONFIG_ANON_INODES=y
215CONFIG_EMBEDDED=y 242CONFIG_EMBEDDED=y
216# CONFIG_SYSCTL_SYSCALL is not set 243# CONFIG_SYSCTL_SYSCALL is not set
217CONFIG_KALLSYMS=y 244CONFIG_KALLSYMS=y
@@ -222,29 +249,36 @@ CONFIG_PRINTK=y
222CONFIG_BUG=y 249CONFIG_BUG=y
223CONFIG_ELF_CORE=y 250CONFIG_ELF_CORE=y
224# CONFIG_PCSPKR_PLATFORM is not set 251# CONFIG_PCSPKR_PLATFORM is not set
225CONFIG_COMPAT_BRK=y
226CONFIG_BASE_FULL=y 252CONFIG_BASE_FULL=y
227CONFIG_FUTEX=y 253CONFIG_FUTEX=y
228CONFIG_ANON_INODES=y
229CONFIG_EPOLL=y 254CONFIG_EPOLL=y
230CONFIG_SIGNALFD=y 255CONFIG_SIGNALFD=y
231CONFIG_TIMERFD=y 256CONFIG_TIMERFD=y
232CONFIG_EVENTFD=y 257CONFIG_EVENTFD=y
233CONFIG_SHMEM=y 258CONFIG_SHMEM=y
259CONFIG_AIO=y
260
261#
262# Kernel Performance Events And Counters
263#
234CONFIG_VM_EVENT_COUNTERS=y 264CONFIG_VM_EVENT_COUNTERS=y
265CONFIG_PCI_QUIRKS=y
266CONFIG_COMPAT_BRK=y
235CONFIG_SLAB=y 267CONFIG_SLAB=y
236# CONFIG_SLUB is not set 268# CONFIG_SLUB is not set
237# CONFIG_SLOB is not set 269# CONFIG_SLOB is not set
238# CONFIG_PROFILING is not set 270# CONFIG_PROFILING is not set
239# CONFIG_MARKERS is not set
240CONFIG_HAVE_OPROFILE=y 271CONFIG_HAVE_OPROFILE=y
241# CONFIG_HAVE_KPROBES is not set 272CONFIG_HAVE_SYSCALL_WRAPPERS=y
242# CONFIG_HAVE_KRETPROBES is not set 273CONFIG_USE_GENERIC_SMP_HELPERS=y
243# CONFIG_HAVE_DMA_ATTRS is not set 274
244CONFIG_PROC_PAGE_MONITOR=y 275#
276# GCOV-based kernel profiling
277#
278# CONFIG_SLOW_WORK is not set
279CONFIG_HAVE_GENERIC_DMA_COHERENT=y
245CONFIG_SLABINFO=y 280CONFIG_SLABINFO=y
246CONFIG_RT_MUTEXES=y 281CONFIG_RT_MUTEXES=y
247# CONFIG_TINY_SHMEM is not set
248CONFIG_BASE_SMALL=0 282CONFIG_BASE_SMALL=0
249CONFIG_MODULES=y 283CONFIG_MODULES=y
250# CONFIG_MODULE_FORCE_LOAD is not set 284# CONFIG_MODULE_FORCE_LOAD is not set
@@ -252,26 +286,52 @@ CONFIG_MODULE_UNLOAD=y
252# CONFIG_MODULE_FORCE_UNLOAD is not set 286# CONFIG_MODULE_FORCE_UNLOAD is not set
253CONFIG_MODVERSIONS=y 287CONFIG_MODVERSIONS=y
254CONFIG_MODULE_SRCVERSION_ALL=y 288CONFIG_MODULE_SRCVERSION_ALL=y
255CONFIG_KMOD=y
256CONFIG_STOP_MACHINE=y 289CONFIG_STOP_MACHINE=y
257CONFIG_BLOCK=y 290CONFIG_BLOCK=y
258# CONFIG_BLK_DEV_IO_TRACE is not set
259# CONFIG_BLK_DEV_BSG is not set 291# CONFIG_BLK_DEV_BSG is not set
292# CONFIG_BLK_DEV_INTEGRITY is not set
260CONFIG_BLOCK_COMPAT=y 293CONFIG_BLOCK_COMPAT=y
261 294
262# 295#
263# IO Schedulers 296# IO Schedulers
264# 297#
265CONFIG_IOSCHED_NOOP=y 298CONFIG_IOSCHED_NOOP=y
266CONFIG_IOSCHED_AS=y
267CONFIG_IOSCHED_DEADLINE=y 299CONFIG_IOSCHED_DEADLINE=y
268CONFIG_IOSCHED_CFQ=y 300CONFIG_IOSCHED_CFQ=y
269CONFIG_DEFAULT_AS=y
270# CONFIG_DEFAULT_DEADLINE is not set 301# CONFIG_DEFAULT_DEADLINE is not set
271# CONFIG_DEFAULT_CFQ is not set 302CONFIG_DEFAULT_CFQ=y
272# CONFIG_DEFAULT_NOOP is not set 303# CONFIG_DEFAULT_NOOP is not set
273CONFIG_DEFAULT_IOSCHED="anticipatory" 304CONFIG_DEFAULT_IOSCHED="cfq"
274CONFIG_CLASSIC_RCU=y 305# CONFIG_INLINE_SPIN_TRYLOCK is not set
306# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
307# CONFIG_INLINE_SPIN_LOCK is not set
308# CONFIG_INLINE_SPIN_LOCK_BH is not set
309# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
310# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
311CONFIG_INLINE_SPIN_UNLOCK=y
312# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
313CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
314# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
315# CONFIG_INLINE_READ_TRYLOCK is not set
316# CONFIG_INLINE_READ_LOCK is not set
317# CONFIG_INLINE_READ_LOCK_BH is not set
318# CONFIG_INLINE_READ_LOCK_IRQ is not set
319# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
320CONFIG_INLINE_READ_UNLOCK=y
321# CONFIG_INLINE_READ_UNLOCK_BH is not set
322CONFIG_INLINE_READ_UNLOCK_IRQ=y
323# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
324# CONFIG_INLINE_WRITE_TRYLOCK is not set
325# CONFIG_INLINE_WRITE_LOCK is not set
326# CONFIG_INLINE_WRITE_LOCK_BH is not set
327# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
328# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
329CONFIG_INLINE_WRITE_UNLOCK=y
330# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
331CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
332# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
333CONFIG_MUTEX_SPIN_ON_OWNER=y
334# CONFIG_FREEZER is not set
275 335
276# 336#
277# Bus options (PCI, PCMCIA, EISA, ISA, TC) 337# Bus options (PCI, PCMCIA, EISA, ISA, TC)
@@ -280,8 +340,9 @@ CONFIG_HW_HAS_PCI=y
280CONFIG_PCI=y 340CONFIG_PCI=y
281CONFIG_PCI_DOMAINS=y 341CONFIG_PCI_DOMAINS=y
282# CONFIG_ARCH_SUPPORTS_MSI is not set 342# CONFIG_ARCH_SUPPORTS_MSI is not set
283CONFIG_PCI_LEGACY=y
284CONFIG_PCI_DEBUG=y 343CONFIG_PCI_DEBUG=y
344# CONFIG_PCI_STUB is not set
345# CONFIG_PCI_IOV is not set
285CONFIG_MMU=y 346CONFIG_MMU=y
286CONFIG_ZONE_DMA32=y 347CONFIG_ZONE_DMA32=y
287# CONFIG_PCCARD is not set 348# CONFIG_PCCARD is not set
@@ -291,6 +352,8 @@ CONFIG_ZONE_DMA32=y
291# Executable file formats 352# Executable file formats
292# 353#
293CONFIG_BINFMT_ELF=y 354CONFIG_BINFMT_ELF=y
355# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
356# CONFIG_HAVE_AOUT is not set
294# CONFIG_BINFMT_MISC is not set 357# CONFIG_BINFMT_MISC is not set
295CONFIG_MIPS32_COMPAT=y 358CONFIG_MIPS32_COMPAT=y
296CONFIG_COMPAT=y 359CONFIG_COMPAT=y
@@ -304,23 +367,20 @@ CONFIG_BINFMT_ELF32=y
304# 367#
305CONFIG_PM=y 368CONFIG_PM=y
306# CONFIG_PM_DEBUG is not set 369# CONFIG_PM_DEBUG is not set
307 370# CONFIG_PM_RUNTIME is not set
308#
309# Networking
310#
311CONFIG_NET=y 371CONFIG_NET=y
312 372
313# 373#
314# Networking options 374# Networking options
315# 375#
316CONFIG_PACKET=y 376CONFIG_PACKET=y
317CONFIG_PACKET_MMAP=y
318CONFIG_UNIX=y 377CONFIG_UNIX=y
319CONFIG_XFRM=y 378CONFIG_XFRM=y
320CONFIG_XFRM_USER=m 379CONFIG_XFRM_USER=m
321# CONFIG_XFRM_SUB_POLICY is not set 380# CONFIG_XFRM_SUB_POLICY is not set
322CONFIG_XFRM_MIGRATE=y 381CONFIG_XFRM_MIGRATE=y
323# CONFIG_XFRM_STATISTICS is not set 382# CONFIG_XFRM_STATISTICS is not set
383CONFIG_XFRM_IPCOMP=m
324CONFIG_NET_KEY=y 384CONFIG_NET_KEY=y
325CONFIG_NET_KEY_MIGRATE=y 385CONFIG_NET_KEY_MIGRATE=y
326CONFIG_INET=y 386CONFIG_INET=y
@@ -353,36 +413,6 @@ CONFIG_INET_TCP_DIAG=y
353CONFIG_TCP_CONG_CUBIC=y 413CONFIG_TCP_CONG_CUBIC=y
354CONFIG_DEFAULT_TCP_CONG="cubic" 414CONFIG_DEFAULT_TCP_CONG="cubic"
355CONFIG_TCP_MD5SIG=y 415CONFIG_TCP_MD5SIG=y
356CONFIG_IP_VS=m
357# CONFIG_IP_VS_DEBUG is not set
358CONFIG_IP_VS_TAB_BITS=12
359
360#
361# IPVS transport protocol load balancing support
362#
363CONFIG_IP_VS_PROTO_TCP=y
364CONFIG_IP_VS_PROTO_UDP=y
365CONFIG_IP_VS_PROTO_ESP=y
366CONFIG_IP_VS_PROTO_AH=y
367
368#
369# IPVS scheduler
370#
371CONFIG_IP_VS_RR=m
372CONFIG_IP_VS_WRR=m
373CONFIG_IP_VS_LC=m
374CONFIG_IP_VS_WLC=m
375CONFIG_IP_VS_LBLC=m
376CONFIG_IP_VS_LBLCR=m
377CONFIG_IP_VS_DH=m
378CONFIG_IP_VS_SH=m
379CONFIG_IP_VS_SED=m
380CONFIG_IP_VS_NQ=m
381
382#
383# IPVS application helper
384#
385CONFIG_IP_VS_FTP=m
386CONFIG_IPV6=m 416CONFIG_IPV6=m
387CONFIG_IPV6_PRIVACY=y 417CONFIG_IPV6_PRIVACY=y
388CONFIG_IPV6_ROUTER_PREF=y 418CONFIG_IPV6_ROUTER_PREF=y
@@ -399,11 +429,13 @@ CONFIG_INET6_XFRM_MODE_TUNNEL=m
399CONFIG_INET6_XFRM_MODE_BEET=m 429CONFIG_INET6_XFRM_MODE_BEET=m
400CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m 430CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
401CONFIG_IPV6_SIT=m 431CONFIG_IPV6_SIT=m
432CONFIG_IPV6_SIT_6RD=y
402CONFIG_IPV6_NDISC_NODETYPE=y 433CONFIG_IPV6_NDISC_NODETYPE=y
403CONFIG_IPV6_TUNNEL=m 434CONFIG_IPV6_TUNNEL=m
404CONFIG_IPV6_MULTIPLE_TABLES=y 435CONFIG_IPV6_MULTIPLE_TABLES=y
405CONFIG_IPV6_SUBTREES=y 436CONFIG_IPV6_SUBTREES=y
406# CONFIG_IPV6_MROUTE is not set 437# CONFIG_IPV6_MROUTE is not set
438CONFIG_NETLABEL=y
407CONFIG_NETWORK_SECMARK=y 439CONFIG_NETWORK_SECMARK=y
408CONFIG_NETFILTER=y 440CONFIG_NETFILTER=y
409# CONFIG_NETFILTER_DEBUG is not set 441# CONFIG_NETFILTER_DEBUG is not set
@@ -421,19 +453,53 @@ CONFIG_NF_CONNTRACK_IRC=m
421CONFIG_NF_CONNTRACK_SIP=m 453CONFIG_NF_CONNTRACK_SIP=m
422CONFIG_NF_CT_NETLINK=m 454CONFIG_NF_CT_NETLINK=m
423CONFIG_NETFILTER_XTABLES=m 455CONFIG_NETFILTER_XTABLES=m
456CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
424CONFIG_NETFILTER_XT_TARGET_MARK=m 457CONFIG_NETFILTER_XT_TARGET_MARK=m
425CONFIG_NETFILTER_XT_TARGET_NFLOG=m 458CONFIG_NETFILTER_XT_TARGET_NFLOG=m
426CONFIG_NETFILTER_XT_TARGET_SECMARK=m 459CONFIG_NETFILTER_XT_TARGET_SECMARK=m
427CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
428CONFIG_NETFILTER_XT_TARGET_TCPMSS=m 460CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
429CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m 461CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
430CONFIG_NETFILTER_XT_MATCH_MARK=m 462CONFIG_NETFILTER_XT_MATCH_MARK=m
431CONFIG_NETFILTER_XT_MATCH_POLICY=m 463CONFIG_NETFILTER_XT_MATCH_POLICY=m
432CONFIG_NETFILTER_XT_MATCH_STATE=m 464CONFIG_NETFILTER_XT_MATCH_STATE=m
465CONFIG_IP_VS=m
466CONFIG_IP_VS_IPV6=y
467# CONFIG_IP_VS_DEBUG is not set
468CONFIG_IP_VS_TAB_BITS=12
469
470#
471# IPVS transport protocol load balancing support
472#
473CONFIG_IP_VS_PROTO_TCP=y
474CONFIG_IP_VS_PROTO_UDP=y
475CONFIG_IP_VS_PROTO_AH_ESP=y
476CONFIG_IP_VS_PROTO_ESP=y
477CONFIG_IP_VS_PROTO_AH=y
478CONFIG_IP_VS_PROTO_SCTP=y
479
480#
481# IPVS scheduler
482#
483CONFIG_IP_VS_RR=m
484CONFIG_IP_VS_WRR=m
485CONFIG_IP_VS_LC=m
486CONFIG_IP_VS_WLC=m
487CONFIG_IP_VS_LBLC=m
488CONFIG_IP_VS_LBLCR=m
489CONFIG_IP_VS_DH=m
490CONFIG_IP_VS_SH=m
491CONFIG_IP_VS_SED=m
492CONFIG_IP_VS_NQ=m
493
494#
495# IPVS application helper
496#
497CONFIG_IP_VS_FTP=m
433 498
434# 499#
435# IP: Netfilter Configuration 500# IP: Netfilter Configuration
436# 501#
502CONFIG_NF_DEFRAG_IPV4=m
437CONFIG_NF_CONNTRACK_IPV4=m 503CONFIG_NF_CONNTRACK_IPV4=m
438CONFIG_NF_CONNTRACK_PROC_COMPAT=y 504CONFIG_NF_CONNTRACK_PROC_COMPAT=y
439CONFIG_IP_NF_IPTABLES=m 505CONFIG_IP_NF_IPTABLES=m
@@ -459,22 +525,44 @@ CONFIG_IP_NF_MANGLE=m
459CONFIG_NF_CONNTRACK_IPV6=m 525CONFIG_NF_CONNTRACK_IPV6=m
460CONFIG_IP6_NF_IPTABLES=m 526CONFIG_IP6_NF_IPTABLES=m
461CONFIG_IP6_NF_MATCH_IPV6HEADER=m 527CONFIG_IP6_NF_MATCH_IPV6HEADER=m
462CONFIG_IP6_NF_FILTER=m
463CONFIG_IP6_NF_TARGET_LOG=m 528CONFIG_IP6_NF_TARGET_LOG=m
529CONFIG_IP6_NF_FILTER=m
464CONFIG_IP6_NF_TARGET_REJECT=m 530CONFIG_IP6_NF_TARGET_REJECT=m
465CONFIG_IP6_NF_MANGLE=m 531CONFIG_IP6_NF_MANGLE=m
466# CONFIG_IP_DCCP is not set 532CONFIG_IP_DCCP=m
533CONFIG_INET_DCCP_DIAG=m
534
535#
536# DCCP CCIDs Configuration (EXPERIMENTAL)
537#
538# CONFIG_IP_DCCP_CCID2_DEBUG is not set
539CONFIG_IP_DCCP_CCID3=y
540# CONFIG_IP_DCCP_CCID3_DEBUG is not set
541CONFIG_IP_DCCP_CCID3_RTO=100
542CONFIG_IP_DCCP_TFRC_LIB=y
543
544#
545# DCCP Kernel Hacking
546#
547# CONFIG_IP_DCCP_DEBUG is not set
467CONFIG_IP_SCTP=m 548CONFIG_IP_SCTP=m
468# CONFIG_SCTP_DBG_MSG is not set 549# CONFIG_SCTP_DBG_MSG is not set
469# CONFIG_SCTP_DBG_OBJCNT is not set 550# CONFIG_SCTP_DBG_OBJCNT is not set
470# CONFIG_SCTP_HMAC_NONE is not set 551# CONFIG_SCTP_HMAC_NONE is not set
471# CONFIG_SCTP_HMAC_SHA1 is not set 552CONFIG_SCTP_HMAC_SHA1=y
472CONFIG_SCTP_HMAC_MD5=y 553# CONFIG_SCTP_HMAC_MD5 is not set
554# CONFIG_RDS is not set
473# CONFIG_TIPC is not set 555# CONFIG_TIPC is not set
474# CONFIG_ATM is not set 556# CONFIG_ATM is not set
475# CONFIG_BRIDGE is not set 557CONFIG_STP=m
476# CONFIG_VLAN_8021Q is not set 558CONFIG_GARP=m
559CONFIG_BRIDGE=m
560CONFIG_BRIDGE_IGMP_SNOOPING=y
561# CONFIG_NET_DSA is not set
562CONFIG_VLAN_8021Q=m
563CONFIG_VLAN_8021Q_GVRP=y
477# CONFIG_DECNET is not set 564# CONFIG_DECNET is not set
565CONFIG_LLC=m
478# CONFIG_LLC2 is not set 566# CONFIG_LLC2 is not set
479# CONFIG_IPX is not set 567# CONFIG_IPX is not set
480# CONFIG_ATALK is not set 568# CONFIG_ATALK is not set
@@ -482,26 +570,47 @@ CONFIG_SCTP_HMAC_MD5=y
482# CONFIG_LAPB is not set 570# CONFIG_LAPB is not set
483# CONFIG_ECONET is not set 571# CONFIG_ECONET is not set
484# CONFIG_WAN_ROUTER is not set 572# CONFIG_WAN_ROUTER is not set
573# CONFIG_PHONET is not set
574# CONFIG_IEEE802154 is not set
485# CONFIG_NET_SCHED is not set 575# CONFIG_NET_SCHED is not set
576# CONFIG_DCB is not set
486 577
487# 578#
488# Network testing 579# Network testing
489# 580#
490# CONFIG_NET_PKTGEN is not set 581# CONFIG_NET_PKTGEN is not set
491# CONFIG_HAMRADIO is not set 582CONFIG_HAMRADIO=y
583
584#
585# Packet Radio protocols
586#
587CONFIG_AX25=m
588CONFIG_AX25_DAMA_SLAVE=y
589CONFIG_NETROM=m
590CONFIG_ROSE=m
591
592#
593# AX.25 network device drivers
594#
595CONFIG_MKISS=m
596CONFIG_6PACK=m
597CONFIG_BPQETHER=m
598CONFIG_BAYCOM_SER_FDX=m
599CONFIG_BAYCOM_SER_HDX=m
600CONFIG_YAM=m
492# CONFIG_CAN is not set 601# CONFIG_CAN is not set
493# CONFIG_IRDA is not set 602# CONFIG_IRDA is not set
494# CONFIG_BT is not set 603# CONFIG_BT is not set
495# CONFIG_AF_RXRPC is not set 604# CONFIG_AF_RXRPC is not set
496CONFIG_FIB_RULES=y 605CONFIG_FIB_RULES=y
606CONFIG_WIRELESS=y
607# CONFIG_CFG80211 is not set
608# CONFIG_LIB80211 is not set
497 609
498# 610#
499# Wireless 611# CFG80211 needs to be enabled for MAC80211
500# 612#
501# CONFIG_CFG80211 is not set 613# CONFIG_WIMAX is not set
502# CONFIG_WIRELESS_EXT is not set
503# CONFIG_MAC80211 is not set
504# CONFIG_IEEE80211 is not set
505# CONFIG_RFKILL is not set 614# CONFIG_RFKILL is not set
506# CONFIG_NET_9P is not set 615# CONFIG_NET_9P is not set
507 616
@@ -513,9 +622,12 @@ CONFIG_FIB_RULES=y
513# Generic Driver Options 622# Generic Driver Options
514# 623#
515CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 624CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
625# CONFIG_DEVTMPFS is not set
516CONFIG_STANDALONE=y 626CONFIG_STANDALONE=y
517CONFIG_PREVENT_FIRMWARE_BUILD=y 627CONFIG_PREVENT_FIRMWARE_BUILD=y
518CONFIG_FW_LOADER=m 628CONFIG_FW_LOADER=m
629CONFIG_FIRMWARE_IN_KERNEL=y
630CONFIG_EXTRA_FIRMWARE=""
519# CONFIG_DEBUG_DRIVER is not set 631# CONFIG_DEBUG_DRIVER is not set
520# CONFIG_DEBUG_DEVRES is not set 632# CONFIG_DEBUG_DEVRES is not set
521# CONFIG_SYS_HYPERVISOR is not set 633# CONFIG_SYS_HYPERVISOR is not set
@@ -530,33 +642,53 @@ CONFIG_BLK_DEV=y
530# CONFIG_BLK_DEV_COW_COMMON is not set 642# CONFIG_BLK_DEV_COW_COMMON is not set
531CONFIG_BLK_DEV_LOOP=m 643CONFIG_BLK_DEV_LOOP=m
532CONFIG_BLK_DEV_CRYPTOLOOP=m 644CONFIG_BLK_DEV_CRYPTOLOOP=m
645
646#
647# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
648#
533CONFIG_BLK_DEV_NBD=m 649CONFIG_BLK_DEV_NBD=m
534# CONFIG_BLK_DEV_SX8 is not set 650# CONFIG_BLK_DEV_SX8 is not set
535# CONFIG_BLK_DEV_RAM is not set 651# CONFIG_BLK_DEV_RAM is not set
536# CONFIG_CDROM_PKTCDVD is not set 652# CONFIG_CDROM_PKTCDVD is not set
537# CONFIG_ATA_OVER_ETH is not set 653# CONFIG_ATA_OVER_ETH is not set
654# CONFIG_BLK_DEV_HD is not set
538CONFIG_MISC_DEVICES=y 655CONFIG_MISC_DEVICES=y
656# CONFIG_AD525X_DPOT is not set
539# CONFIG_PHANTOM is not set 657# CONFIG_PHANTOM is not set
540# CONFIG_EEPROM_93CX6 is not set
541CONFIG_SGI_IOC4=m 658CONFIG_SGI_IOC4=m
542# CONFIG_TIFM_CORE is not set 659# CONFIG_TIFM_CORE is not set
660# CONFIG_ICS932S401 is not set
543# CONFIG_ENCLOSURE_SERVICES is not set 661# CONFIG_ENCLOSURE_SERVICES is not set
662# CONFIG_HP_ILO is not set
663# CONFIG_ISL29003 is not set
664# CONFIG_SENSORS_TSL2550 is not set
665# CONFIG_DS1682 is not set
666# CONFIG_C2PORT is not set
667
668#
669# EEPROM support
670#
671# CONFIG_EEPROM_AT24 is not set
672CONFIG_EEPROM_LEGACY=y
673CONFIG_EEPROM_MAX6875=y
674# CONFIG_EEPROM_93CX6 is not set
675# CONFIG_CB710_CORE is not set
544CONFIG_HAVE_IDE=y 676CONFIG_HAVE_IDE=y
545CONFIG_IDE=y 677CONFIG_IDE=y
546CONFIG_IDE_MAX_HWIFS=4
547CONFIG_BLK_DEV_IDE=y
548 678
549# 679#
550# Please see Documentation/ide/ide.txt for help/info on IDE drives 680# Please see Documentation/ide/ide.txt for help/info on IDE drives
551# 681#
682CONFIG_IDE_XFER_MODE=y
683CONFIG_IDE_TIMINGS=y
684CONFIG_IDE_ATAPI=y
552# CONFIG_BLK_DEV_IDE_SATA is not set 685# CONFIG_BLK_DEV_IDE_SATA is not set
553CONFIG_BLK_DEV_IDEDISK=y 686CONFIG_IDE_GD=y
554# CONFIG_IDEDISK_MULTI_MODE is not set 687CONFIG_IDE_GD_ATA=y
688# CONFIG_IDE_GD_ATAPI is not set
555CONFIG_BLK_DEV_IDECD=y 689CONFIG_BLK_DEV_IDECD=y
556CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y 690CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
557CONFIG_BLK_DEV_IDETAPE=y 691CONFIG_BLK_DEV_IDETAPE=y
558CONFIG_BLK_DEV_IDEFLOPPY=y
559# CONFIG_BLK_DEV_IDESCSI is not set
560# CONFIG_IDE_TASK_IOCTL is not set 692# CONFIG_IDE_TASK_IOCTL is not set
561CONFIG_IDE_PROC_FS=y 693CONFIG_IDE_PROC_FS=y
562 694
@@ -581,14 +713,13 @@ CONFIG_BLK_DEV_IDEDMA_PCI=y
581# CONFIG_BLK_DEV_AMD74XX is not set 713# CONFIG_BLK_DEV_AMD74XX is not set
582CONFIG_BLK_DEV_CMD64X=y 714CONFIG_BLK_DEV_CMD64X=y
583# CONFIG_BLK_DEV_TRIFLEX is not set 715# CONFIG_BLK_DEV_TRIFLEX is not set
584# CONFIG_BLK_DEV_CY82C693 is not set
585# CONFIG_BLK_DEV_CS5520 is not set 716# CONFIG_BLK_DEV_CS5520 is not set
586# CONFIG_BLK_DEV_CS5530 is not set 717# CONFIG_BLK_DEV_CS5530 is not set
587# CONFIG_BLK_DEV_HPT34X is not set
588# CONFIG_BLK_DEV_HPT366 is not set 718# CONFIG_BLK_DEV_HPT366 is not set
589# CONFIG_BLK_DEV_JMICRON is not set 719# CONFIG_BLK_DEV_JMICRON is not set
590# CONFIG_BLK_DEV_SC1200 is not set 720# CONFIG_BLK_DEV_SC1200 is not set
591# CONFIG_BLK_DEV_PIIX is not set 721# CONFIG_BLK_DEV_PIIX is not set
722# CONFIG_BLK_DEV_IT8172 is not set
592CONFIG_BLK_DEV_IT8213=m 723CONFIG_BLK_DEV_IT8213=m
593# CONFIG_BLK_DEV_IT821X is not set 724# CONFIG_BLK_DEV_IT821X is not set
594# CONFIG_BLK_DEV_NS87415 is not set 725# CONFIG_BLK_DEV_NS87415 is not set
@@ -600,14 +731,12 @@ CONFIG_BLK_DEV_IT8213=m
600# CONFIG_BLK_DEV_TRM290 is not set 731# CONFIG_BLK_DEV_TRM290 is not set
601# CONFIG_BLK_DEV_VIA82CXXX is not set 732# CONFIG_BLK_DEV_VIA82CXXX is not set
602CONFIG_BLK_DEV_TC86C001=m 733CONFIG_BLK_DEV_TC86C001=m
603# CONFIG_BLK_DEV_IDE_SWARM is not set
604CONFIG_BLK_DEV_IDEDMA=y 734CONFIG_BLK_DEV_IDEDMA=y
605# CONFIG_BLK_DEV_HD_ONLY is not set
606# CONFIG_BLK_DEV_HD is not set
607 735
608# 736#
609# SCSI device support 737# SCSI device support
610# 738#
739CONFIG_SCSI_MOD=y
611# CONFIG_RAID_ATTRS is not set 740# CONFIG_RAID_ATTRS is not set
612CONFIG_SCSI=y 741CONFIG_SCSI=y
613CONFIG_SCSI_DMA=y 742CONFIG_SCSI_DMA=y
@@ -625,10 +754,6 @@ CONFIG_BLK_DEV_SR=m
625CONFIG_BLK_DEV_SR_VENDOR=y 754CONFIG_BLK_DEV_SR_VENDOR=y
626CONFIG_CHR_DEV_SG=m 755CONFIG_CHR_DEV_SG=m
627CONFIG_CHR_DEV_SCH=m 756CONFIG_CHR_DEV_SCH=m
628
629#
630# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
631#
632# CONFIG_SCSI_MULTI_LUN is not set 757# CONFIG_SCSI_MULTI_LUN is not set
633# CONFIG_SCSI_CONSTANTS is not set 758# CONFIG_SCSI_CONSTANTS is not set
634# CONFIG_SCSI_LOGGING is not set 759# CONFIG_SCSI_LOGGING is not set
@@ -645,27 +770,36 @@ CONFIG_SCSI_WAIT_SCAN=m
645# CONFIG_SCSI_SRP_ATTRS is not set 770# CONFIG_SCSI_SRP_ATTRS is not set
646CONFIG_SCSI_LOWLEVEL=y 771CONFIG_SCSI_LOWLEVEL=y
647# CONFIG_ISCSI_TCP is not set 772# CONFIG_ISCSI_TCP is not set
773# CONFIG_SCSI_CXGB3_ISCSI is not set
774# CONFIG_SCSI_BNX2_ISCSI is not set
775# CONFIG_BE2ISCSI is not set
648# CONFIG_BLK_DEV_3W_XXXX_RAID is not set 776# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
777# CONFIG_SCSI_HPSA is not set
649# CONFIG_SCSI_3W_9XXX is not set 778# CONFIG_SCSI_3W_9XXX is not set
779# CONFIG_SCSI_3W_SAS is not set
650# CONFIG_SCSI_ACARD is not set 780# CONFIG_SCSI_ACARD is not set
651# CONFIG_SCSI_AACRAID is not set 781# CONFIG_SCSI_AACRAID is not set
652# CONFIG_SCSI_AIC7XXX is not set 782# CONFIG_SCSI_AIC7XXX is not set
653# CONFIG_SCSI_AIC7XXX_OLD is not set 783# CONFIG_SCSI_AIC7XXX_OLD is not set
654# CONFIG_SCSI_AIC79XX is not set 784# CONFIG_SCSI_AIC79XX is not set
655# CONFIG_SCSI_AIC94XX is not set 785# CONFIG_SCSI_AIC94XX is not set
786# CONFIG_SCSI_MVSAS is not set
656# CONFIG_SCSI_DPT_I2O is not set 787# CONFIG_SCSI_DPT_I2O is not set
657# CONFIG_SCSI_ADVANSYS is not set 788# CONFIG_SCSI_ADVANSYS is not set
658# CONFIG_SCSI_ARCMSR is not set 789# CONFIG_SCSI_ARCMSR is not set
659# CONFIG_MEGARAID_NEWGEN is not set 790# CONFIG_MEGARAID_NEWGEN is not set
660# CONFIG_MEGARAID_LEGACY is not set 791# CONFIG_MEGARAID_LEGACY is not set
661# CONFIG_MEGARAID_SAS is not set 792# CONFIG_MEGARAID_SAS is not set
793# CONFIG_SCSI_MPT2SAS is not set
662# CONFIG_SCSI_HPTIOP is not set 794# CONFIG_SCSI_HPTIOP is not set
795# CONFIG_LIBFC is not set
796# CONFIG_LIBFCOE is not set
797# CONFIG_FCOE is not set
663# CONFIG_SCSI_DMX3191D is not set 798# CONFIG_SCSI_DMX3191D is not set
664# CONFIG_SCSI_FUTURE_DOMAIN is not set 799# CONFIG_SCSI_FUTURE_DOMAIN is not set
665# CONFIG_SCSI_IPS is not set 800# CONFIG_SCSI_IPS is not set
666# CONFIG_SCSI_INITIO is not set 801# CONFIG_SCSI_INITIO is not set
667# CONFIG_SCSI_INIA100 is not set 802# CONFIG_SCSI_INIA100 is not set
668# CONFIG_SCSI_MVSAS is not set
669# CONFIG_SCSI_STEX is not set 803# CONFIG_SCSI_STEX is not set
670# CONFIG_SCSI_SYM53C8XX_2 is not set 804# CONFIG_SCSI_SYM53C8XX_2 is not set
671# CONFIG_SCSI_IPR is not set 805# CONFIG_SCSI_IPR is not set
@@ -676,9 +810,15 @@ CONFIG_SCSI_LOWLEVEL=y
676# CONFIG_SCSI_DC395x is not set 810# CONFIG_SCSI_DC395x is not set
677# CONFIG_SCSI_DC390T is not set 811# CONFIG_SCSI_DC390T is not set
678# CONFIG_SCSI_DEBUG is not set 812# CONFIG_SCSI_DEBUG is not set
813# CONFIG_SCSI_PMCRAID is not set
814# CONFIG_SCSI_PM8001 is not set
679# CONFIG_SCSI_SRP is not set 815# CONFIG_SCSI_SRP is not set
816# CONFIG_SCSI_BFA_FC is not set
817# CONFIG_SCSI_DH is not set
818# CONFIG_SCSI_OSD_INITIATOR is not set
680CONFIG_ATA=y 819CONFIG_ATA=y
681# CONFIG_ATA_NONSTANDARD is not set 820# CONFIG_ATA_NONSTANDARD is not set
821CONFIG_ATA_VERBOSE_ERROR=y
682CONFIG_SATA_PMP=y 822CONFIG_SATA_PMP=y
683# CONFIG_SATA_AHCI is not set 823# CONFIG_SATA_AHCI is not set
684CONFIG_SATA_SIL24=y 824CONFIG_SATA_SIL24=y
@@ -700,6 +840,7 @@ CONFIG_ATA_SFF=y
700# CONFIG_PATA_ALI is not set 840# CONFIG_PATA_ALI is not set
701# CONFIG_PATA_AMD is not set 841# CONFIG_PATA_AMD is not set
702# CONFIG_PATA_ARTOP is not set 842# CONFIG_PATA_ARTOP is not set
843# CONFIG_PATA_ATP867X is not set
703# CONFIG_PATA_ATIIXP is not set 844# CONFIG_PATA_ATIIXP is not set
704# CONFIG_PATA_CMD640_PCI is not set 845# CONFIG_PATA_CMD640_PCI is not set
705# CONFIG_PATA_CMD64X is not set 846# CONFIG_PATA_CMD64X is not set
@@ -715,6 +856,7 @@ CONFIG_ATA_SFF=y
715# CONFIG_PATA_IT821X is not set 856# CONFIG_PATA_IT821X is not set
716# CONFIG_PATA_IT8213 is not set 857# CONFIG_PATA_IT8213 is not set
717# CONFIG_PATA_JMICRON is not set 858# CONFIG_PATA_JMICRON is not set
859# CONFIG_PATA_LEGACY is not set
718# CONFIG_PATA_TRIFLEX is not set 860# CONFIG_PATA_TRIFLEX is not set
719# CONFIG_PATA_MARVELL is not set 861# CONFIG_PATA_MARVELL is not set
720# CONFIG_PATA_MPIIX is not set 862# CONFIG_PATA_MPIIX is not set
@@ -725,14 +867,16 @@ CONFIG_ATA_SFF=y
725# CONFIG_PATA_NS87415 is not set 867# CONFIG_PATA_NS87415 is not set
726# CONFIG_PATA_OPTI is not set 868# CONFIG_PATA_OPTI is not set
727# CONFIG_PATA_OPTIDMA is not set 869# CONFIG_PATA_OPTIDMA is not set
870# CONFIG_PATA_PDC2027X is not set
728# CONFIG_PATA_PDC_OLD is not set 871# CONFIG_PATA_PDC_OLD is not set
729# CONFIG_PATA_RADISYS is not set 872# CONFIG_PATA_RADISYS is not set
873# CONFIG_PATA_RDC is not set
730# CONFIG_PATA_RZ1000 is not set 874# CONFIG_PATA_RZ1000 is not set
731# CONFIG_PATA_SC1200 is not set 875# CONFIG_PATA_SC1200 is not set
732# CONFIG_PATA_SERVERWORKS is not set 876# CONFIG_PATA_SERVERWORKS is not set
733# CONFIG_PATA_PDC2027X is not set
734CONFIG_PATA_SIL680=y 877CONFIG_PATA_SIL680=y
735# CONFIG_PATA_SIS is not set 878# CONFIG_PATA_SIS is not set
879# CONFIG_PATA_TOSHIBA is not set
736# CONFIG_PATA_VIA is not set 880# CONFIG_PATA_VIA is not set
737# CONFIG_PATA_WINBOND is not set 881# CONFIG_PATA_WINBOND is not set
738# CONFIG_PATA_PLATFORM is not set 882# CONFIG_PATA_PLATFORM is not set
@@ -745,13 +889,16 @@ CONFIG_PATA_SIL680=y
745# 889#
746 890
747# 891#
748# Enable only one of the two stacks, unless you know what you are doing 892# You can enable one or both FireWire driver stacks.
893#
894
895#
896# The newer stack is recommended.
749# 897#
750# CONFIG_FIREWIRE is not set 898# CONFIG_FIREWIRE is not set
751# CONFIG_IEEE1394 is not set 899# CONFIG_IEEE1394 is not set
752# CONFIG_I2O is not set 900# CONFIG_I2O is not set
753CONFIG_NETDEVICES=y 901CONFIG_NETDEVICES=y
754# CONFIG_NETDEVICES_MULTIQUEUE is not set
755# CONFIG_DUMMY is not set 902# CONFIG_DUMMY is not set
756# CONFIG_BONDING is not set 903# CONFIG_BONDING is not set
757# CONFIG_MACVLAN is not set 904# CONFIG_MACVLAN is not set
@@ -774,6 +921,9 @@ CONFIG_PHYLIB=y
774# CONFIG_BROADCOM_PHY is not set 921# CONFIG_BROADCOM_PHY is not set
775# CONFIG_ICPLUS_PHY is not set 922# CONFIG_ICPLUS_PHY is not set
776# CONFIG_REALTEK_PHY is not set 923# CONFIG_REALTEK_PHY is not set
924# CONFIG_NATIONAL_PHY is not set
925# CONFIG_STE10XP is not set
926# CONFIG_LSI_ET1011C_PHY is not set
777# CONFIG_FIXED_PHY is not set 927# CONFIG_FIXED_PHY is not set
778# CONFIG_MDIO_BITBANG is not set 928# CONFIG_MDIO_BITBANG is not set
779CONFIG_NET_ETHERNET=y 929CONFIG_NET_ETHERNET=y
@@ -783,23 +933,33 @@ CONFIG_MII=y
783# CONFIG_SUNGEM is not set 933# CONFIG_SUNGEM is not set
784# CONFIG_CASSINI is not set 934# CONFIG_CASSINI is not set
785# CONFIG_NET_VENDOR_3COM is not set 935# CONFIG_NET_VENDOR_3COM is not set
936# CONFIG_SMC91X is not set
786# CONFIG_DM9000 is not set 937# CONFIG_DM9000 is not set
938# CONFIG_ETHOC is not set
939# CONFIG_SMSC911X is not set
940# CONFIG_DNET is not set
787# CONFIG_NET_TULIP is not set 941# CONFIG_NET_TULIP is not set
788# CONFIG_HP100 is not set 942# CONFIG_HP100 is not set
789# CONFIG_IBM_NEW_EMAC_ZMII is not set 943# CONFIG_IBM_NEW_EMAC_ZMII is not set
790# CONFIG_IBM_NEW_EMAC_RGMII is not set 944# CONFIG_IBM_NEW_EMAC_RGMII is not set
791# CONFIG_IBM_NEW_EMAC_TAH is not set 945# CONFIG_IBM_NEW_EMAC_TAH is not set
792# CONFIG_IBM_NEW_EMAC_EMAC4 is not set 946# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
947# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
948# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
949# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
793# CONFIG_NET_PCI is not set 950# CONFIG_NET_PCI is not set
794# CONFIG_B44 is not set 951# CONFIG_B44 is not set
952# CONFIG_KS8842 is not set
953# CONFIG_KS8851_MLL is not set
954# CONFIG_ATL2 is not set
795CONFIG_NETDEV_1000=y 955CONFIG_NETDEV_1000=y
796# CONFIG_ACENIC is not set 956# CONFIG_ACENIC is not set
797# CONFIG_DL2K is not set 957# CONFIG_DL2K is not set
798# CONFIG_E1000 is not set 958# CONFIG_E1000 is not set
799# CONFIG_E1000E is not set 959# CONFIG_E1000E is not set
800# CONFIG_E1000E_ENABLED is not set
801# CONFIG_IP1000 is not set 960# CONFIG_IP1000 is not set
802# CONFIG_IGB is not set 961# CONFIG_IGB is not set
962# CONFIG_IGBVF is not set
803# CONFIG_NS83820 is not set 963# CONFIG_NS83820 is not set
804# CONFIG_HAMACHI is not set 964# CONFIG_HAMACHI is not set
805# CONFIG_YELLOWFIN is not set 965# CONFIG_YELLOWFIN is not set
@@ -811,29 +971,42 @@ CONFIG_SB1250_MAC=y
811# CONFIG_VIA_VELOCITY is not set 971# CONFIG_VIA_VELOCITY is not set
812# CONFIG_TIGON3 is not set 972# CONFIG_TIGON3 is not set
813# CONFIG_BNX2 is not set 973# CONFIG_BNX2 is not set
974# CONFIG_CNIC is not set
814# CONFIG_QLA3XXX is not set 975# CONFIG_QLA3XXX is not set
815# CONFIG_ATL1 is not set 976# CONFIG_ATL1 is not set
977# CONFIG_ATL1E is not set
978# CONFIG_ATL1C is not set
979# CONFIG_JME is not set
816CONFIG_NETDEV_10000=y 980CONFIG_NETDEV_10000=y
981CONFIG_MDIO=m
817# CONFIG_CHELSIO_T1 is not set 982# CONFIG_CHELSIO_T1 is not set
983CONFIG_CHELSIO_T3_DEPENDS=y
818CONFIG_CHELSIO_T3=m 984CONFIG_CHELSIO_T3=m
985# CONFIG_ENIC is not set
819# CONFIG_IXGBE is not set 986# CONFIG_IXGBE is not set
820# CONFIG_IXGB is not set 987# CONFIG_IXGB is not set
821# CONFIG_S2IO is not set 988# CONFIG_S2IO is not set
989# CONFIG_VXGE is not set
822# CONFIG_MYRI10GE is not set 990# CONFIG_MYRI10GE is not set
823CONFIG_NETXEN_NIC=m 991CONFIG_NETXEN_NIC=m
824# CONFIG_NIU is not set 992# CONFIG_NIU is not set
993# CONFIG_MLX4_EN is not set
825# CONFIG_MLX4_CORE is not set 994# CONFIG_MLX4_CORE is not set
826# CONFIG_TEHUTI is not set 995# CONFIG_TEHUTI is not set
827# CONFIG_BNX2X is not set 996# CONFIG_BNX2X is not set
997# CONFIG_QLCNIC is not set
998# CONFIG_QLGE is not set
828# CONFIG_SFC is not set 999# CONFIG_SFC is not set
1000# CONFIG_BE2NET is not set
829# CONFIG_TR is not set 1001# CONFIG_TR is not set
1002CONFIG_WLAN=y
1003# CONFIG_ATMEL is not set
1004# CONFIG_PRISM54 is not set
1005# CONFIG_HOSTAP is not set
830 1006
831# 1007#
832# Wireless LAN 1008# Enable WiMAX (Networking options) to see the WiMAX drivers
833# 1009#
834# CONFIG_WLAN_PRE80211 is not set
835# CONFIG_WLAN_80211 is not set
836# CONFIG_IWLWIFI_LEDS is not set
837# CONFIG_WAN is not set 1010# CONFIG_WAN is not set
838# CONFIG_FDDI is not set 1011# CONFIG_FDDI is not set
839# CONFIG_HIPPI is not set 1012# CONFIG_HIPPI is not set
@@ -856,6 +1029,7 @@ CONFIG_SLIP_MODE_SLIP6=y
856# CONFIG_NETCONSOLE is not set 1029# CONFIG_NETCONSOLE is not set
857# CONFIG_NETPOLL is not set 1030# CONFIG_NETPOLL is not set
858# CONFIG_NET_POLL_CONTROLLER is not set 1031# CONFIG_NET_POLL_CONTROLLER is not set
1032# CONFIG_VMXNET3 is not set
859# CONFIG_ISDN is not set 1033# CONFIG_ISDN is not set
860# CONFIG_PHONE is not set 1034# CONFIG_PHONE is not set
861 1035
@@ -873,6 +1047,7 @@ CONFIG_SERIO_SERPORT=y
873# CONFIG_SERIO_PCIPS2 is not set 1047# CONFIG_SERIO_PCIPS2 is not set
874# CONFIG_SERIO_LIBPS2 is not set 1048# CONFIG_SERIO_LIBPS2 is not set
875CONFIG_SERIO_RAW=m 1049CONFIG_SERIO_RAW=m
1050# CONFIG_SERIO_ALTERA_PS2 is not set
876# CONFIG_GAMEPORT is not set 1051# CONFIG_GAMEPORT is not set
877 1052
878# 1053#
@@ -893,8 +1068,6 @@ CONFIG_SERIAL_NONSTANDARD=y
893# CONFIG_N_HDLC is not set 1068# CONFIG_N_HDLC is not set
894# CONFIG_RISCOM8 is not set 1069# CONFIG_RISCOM8 is not set
895# CONFIG_SPECIALIX is not set 1070# CONFIG_SPECIALIX is not set
896# CONFIG_SX is not set
897# CONFIG_RIO is not set
898# CONFIG_STALDRV is not set 1071# CONFIG_STALDRV is not set
899# CONFIG_NOZOMI is not set 1072# CONFIG_NOZOMI is not set
900 1073
@@ -911,7 +1084,9 @@ CONFIG_SERIAL_SB1250_DUART_CONSOLE=y
911CONFIG_SERIAL_CORE=y 1084CONFIG_SERIAL_CORE=y
912CONFIG_SERIAL_CORE_CONSOLE=y 1085CONFIG_SERIAL_CORE_CONSOLE=y
913# CONFIG_SERIAL_JSM is not set 1086# CONFIG_SERIAL_JSM is not set
1087# CONFIG_SERIAL_TIMBERDALE is not set
914CONFIG_UNIX98_PTYS=y 1088CONFIG_UNIX98_PTYS=y
1089# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
915CONFIG_LEGACY_PTYS=y 1090CONFIG_LEGACY_PTYS=y
916CONFIG_LEGACY_PTY_COUNT=256 1091CONFIG_LEGACY_PTY_COUNT=256
917# CONFIG_IPMI_HANDLER is not set 1092# CONFIG_IPMI_HANDLER is not set
@@ -923,89 +1098,99 @@ CONFIG_LEGACY_PTY_COUNT=256
923CONFIG_DEVPORT=y 1098CONFIG_DEVPORT=y
924CONFIG_I2C=y 1099CONFIG_I2C=y
925CONFIG_I2C_BOARDINFO=y 1100CONFIG_I2C_BOARDINFO=y
1101CONFIG_I2C_COMPAT=y
926CONFIG_I2C_CHARDEV=y 1102CONFIG_I2C_CHARDEV=y
1103CONFIG_I2C_HELPER_AUTO=y
927 1104
928# 1105#
929# I2C Hardware Bus support 1106# I2C Hardware Bus support
930# 1107#
1108
1109#
1110# PC SMBus host controller drivers
1111#
931# CONFIG_I2C_ALI1535 is not set 1112# CONFIG_I2C_ALI1535 is not set
932# CONFIG_I2C_ALI1563 is not set 1113# CONFIG_I2C_ALI1563 is not set
933# CONFIG_I2C_ALI15X3 is not set 1114# CONFIG_I2C_ALI15X3 is not set
934# CONFIG_I2C_AMD756 is not set 1115# CONFIG_I2C_AMD756 is not set
935# CONFIG_I2C_AMD8111 is not set 1116# CONFIG_I2C_AMD8111 is not set
936# CONFIG_I2C_I801 is not set 1117# CONFIG_I2C_I801 is not set
937# CONFIG_I2C_I810 is not set 1118# CONFIG_I2C_ISCH is not set
938# CONFIG_I2C_PIIX4 is not set 1119# CONFIG_I2C_PIIX4 is not set
939# CONFIG_I2C_NFORCE2 is not set 1120# CONFIG_I2C_NFORCE2 is not set
940# CONFIG_I2C_OCORES is not set
941# CONFIG_I2C_PARPORT_LIGHT is not set
942# CONFIG_I2C_PROSAVAGE is not set
943# CONFIG_I2C_SAVAGE4 is not set
944CONFIG_I2C_SIBYTE=y
945# CONFIG_I2C_SIMTEC is not set
946# CONFIG_I2C_SIS5595 is not set 1121# CONFIG_I2C_SIS5595 is not set
947# CONFIG_I2C_SIS630 is not set 1122# CONFIG_I2C_SIS630 is not set
948# CONFIG_I2C_SIS96X is not set 1123# CONFIG_I2C_SIS96X is not set
949# CONFIG_I2C_TAOS_EVM is not set
950# CONFIG_I2C_STUB is not set
951# CONFIG_I2C_VIA is not set 1124# CONFIG_I2C_VIA is not set
952# CONFIG_I2C_VIAPRO is not set 1125# CONFIG_I2C_VIAPRO is not set
953# CONFIG_I2C_VOODOO3 is not set
954# CONFIG_I2C_PCA_PLATFORM is not set
955 1126
956# 1127#
957# Miscellaneous I2C Chip support 1128# I2C system bus drivers (mostly embedded / system-on-chip)
958# 1129#
959# CONFIG_DS1682 is not set 1130# CONFIG_I2C_OCORES is not set
960CONFIG_EEPROM_LEGACY=y 1131# CONFIG_I2C_SIMTEC is not set
961CONFIG_SENSORS_PCF8574=y 1132# CONFIG_I2C_XILINX is not set
962# CONFIG_PCF8575 is not set 1133
963CONFIG_SENSORS_PCF8591=y 1134#
964CONFIG_EEPROM_MAX6875=y 1135# External I2C/SMBus adapter drivers
965# CONFIG_SENSORS_TSL2550 is not set 1136#
1137# CONFIG_I2C_PARPORT_LIGHT is not set
1138# CONFIG_I2C_TAOS_EVM is not set
1139
1140#
1141# Other I2C/SMBus bus drivers
1142#
1143# CONFIG_I2C_PCA_PLATFORM is not set
1144CONFIG_I2C_SIBYTE=y
1145# CONFIG_I2C_STUB is not set
966CONFIG_I2C_DEBUG_CORE=y 1146CONFIG_I2C_DEBUG_CORE=y
967CONFIG_I2C_DEBUG_ALGO=y 1147CONFIG_I2C_DEBUG_ALGO=y
968CONFIG_I2C_DEBUG_BUS=y 1148CONFIG_I2C_DEBUG_BUS=y
969CONFIG_I2C_DEBUG_CHIP=y
970# CONFIG_SPI is not set 1149# CONFIG_SPI is not set
1150
1151#
1152# PPS support
1153#
1154# CONFIG_PPS is not set
971# CONFIG_W1 is not set 1155# CONFIG_W1 is not set
972# CONFIG_POWER_SUPPLY is not set 1156# CONFIG_POWER_SUPPLY is not set
973# CONFIG_HWMON is not set 1157# CONFIG_HWMON is not set
974# CONFIG_THERMAL is not set 1158# CONFIG_THERMAL is not set
975# CONFIG_THERMAL_HWMON is not set
976# CONFIG_WATCHDOG is not set 1159# CONFIG_WATCHDOG is not set
1160CONFIG_SSB_POSSIBLE=y
977 1161
978# 1162#
979# Sonics Silicon Backplane 1163# Sonics Silicon Backplane
980# 1164#
981CONFIG_SSB_POSSIBLE=y
982# CONFIG_SSB is not set 1165# CONFIG_SSB is not set
983 1166
984# 1167#
985# Multifunction device drivers 1168# Multifunction device drivers
986# 1169#
1170# CONFIG_MFD_CORE is not set
1171# CONFIG_MFD_88PM860X is not set
987# CONFIG_MFD_SM501 is not set 1172# CONFIG_MFD_SM501 is not set
988# CONFIG_HTC_PASIC3 is not set 1173# CONFIG_HTC_PASIC3 is not set
989 1174# CONFIG_TWL4030_CORE is not set
990# 1175# CONFIG_MFD_TMIO is not set
991# Multimedia devices 1176# CONFIG_PMIC_DA903X is not set
992# 1177# CONFIG_PMIC_ADP5520 is not set
993 1178# CONFIG_MFD_MAX8925 is not set
994# 1179# CONFIG_MFD_WM8400 is not set
995# Multimedia core support 1180# CONFIG_MFD_WM831X is not set
996# 1181# CONFIG_MFD_WM8350_I2C is not set
997# CONFIG_VIDEO_DEV is not set 1182# CONFIG_MFD_WM8994 is not set
998# CONFIG_DVB_CORE is not set 1183# CONFIG_MFD_PCF50633 is not set
999# CONFIG_VIDEO_MEDIA is not set 1184# CONFIG_AB3100_CORE is not set
1000 1185# CONFIG_LPC_SCH is not set
1001# 1186# CONFIG_REGULATOR is not set
1002# Multimedia drivers 1187# CONFIG_MEDIA_SUPPORT is not set
1003#
1004# CONFIG_DAB is not set
1005 1188
1006# 1189#
1007# Graphics support 1190# Graphics support
1008# 1191#
1192CONFIG_VGA_ARB=y
1193CONFIG_VGA_ARB_MAX_GPUS=16
1009# CONFIG_DRM is not set 1194# CONFIG_DRM is not set
1010# CONFIG_VGASTATE is not set 1195# CONFIG_VGASTATE is not set
1011# CONFIG_VIDEO_OUTPUT_CONTROL is not set 1196# CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1016,10 +1201,6 @@ CONFIG_SSB_POSSIBLE=y
1016# Display device support 1201# Display device support
1017# 1202#
1018# CONFIG_DISPLAY_SUPPORT is not set 1203# CONFIG_DISPLAY_SUPPORT is not set
1019
1020#
1021# Sound
1022#
1023# CONFIG_SOUND is not set 1204# CONFIG_SOUND is not set
1024CONFIG_USB_SUPPORT=y 1205CONFIG_USB_SUPPORT=y
1025CONFIG_USB_ARCH_HAS_HCD=y 1206CONFIG_USB_ARCH_HAS_HCD=y
@@ -1030,9 +1211,18 @@ CONFIG_USB_ARCH_HAS_EHCI=y
1030# CONFIG_USB_OTG_BLACKLIST_HUB is not set 1211# CONFIG_USB_OTG_BLACKLIST_HUB is not set
1031 1212
1032# 1213#
1033# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 1214# Enable Host or Gadget support to see Inventra options
1215#
1216
1217#
1218# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
1034# 1219#
1035# CONFIG_USB_GADGET is not set 1220# CONFIG_USB_GADGET is not set
1221
1222#
1223# OTG and related infrastructure
1224#
1225# CONFIG_UWB is not set
1036# CONFIG_MMC is not set 1226# CONFIG_MMC is not set
1037# CONFIG_MEMSTICK is not set 1227# CONFIG_MEMSTICK is not set
1038# CONFIG_NEW_LEDS is not set 1228# CONFIG_NEW_LEDS is not set
@@ -1040,41 +1230,66 @@ CONFIG_USB_ARCH_HAS_EHCI=y
1040# CONFIG_INFINIBAND is not set 1230# CONFIG_INFINIBAND is not set
1041CONFIG_RTC_LIB=y 1231CONFIG_RTC_LIB=y
1042# CONFIG_RTC_CLASS is not set 1232# CONFIG_RTC_CLASS is not set
1233# CONFIG_DMADEVICES is not set
1234# CONFIG_AUXDISPLAY is not set
1043# CONFIG_UIO is not set 1235# CONFIG_UIO is not set
1044 1236
1045# 1237#
1238# TI VLYNQ
1239#
1240# CONFIG_STAGING is not set
1241
1242#
1046# File systems 1243# File systems
1047# 1244#
1048CONFIG_EXT2_FS=m 1245CONFIG_EXT2_FS=m
1049CONFIG_EXT2_FS_XATTR=y 1246CONFIG_EXT2_FS_XATTR=y
1050# CONFIG_EXT2_FS_POSIX_ACL is not set 1247CONFIG_EXT2_FS_POSIX_ACL=y
1051# CONFIG_EXT2_FS_SECURITY is not set 1248CONFIG_EXT2_FS_SECURITY=y
1052# CONFIG_EXT2_FS_XIP is not set 1249CONFIG_EXT2_FS_XIP=y
1053CONFIG_EXT3_FS=y 1250CONFIG_EXT3_FS=m
1251CONFIG_EXT3_DEFAULTS_TO_ORDERED=y
1054CONFIG_EXT3_FS_XATTR=y 1252CONFIG_EXT3_FS_XATTR=y
1055# CONFIG_EXT3_FS_POSIX_ACL is not set 1253CONFIG_EXT3_FS_POSIX_ACL=y
1056# CONFIG_EXT3_FS_SECURITY is not set 1254CONFIG_EXT3_FS_SECURITY=y
1057# CONFIG_EXT4DEV_FS is not set 1255CONFIG_EXT4_FS=y
1058CONFIG_JBD=y 1256CONFIG_EXT4_FS_XATTR=y
1257CONFIG_EXT4_FS_POSIX_ACL=y
1258CONFIG_EXT4_FS_SECURITY=y
1259# CONFIG_EXT4_DEBUG is not set
1260CONFIG_FS_XIP=y
1261CONFIG_JBD=m
1262CONFIG_JBD2=y
1059CONFIG_FS_MBCACHE=y 1263CONFIG_FS_MBCACHE=y
1060# CONFIG_REISERFS_FS is not set 1264# CONFIG_REISERFS_FS is not set
1061# CONFIG_JFS_FS is not set 1265# CONFIG_JFS_FS is not set
1062# CONFIG_FS_POSIX_ACL is not set 1266CONFIG_FS_POSIX_ACL=y
1063# CONFIG_XFS_FS is not set 1267# CONFIG_XFS_FS is not set
1064# CONFIG_GFS2_FS is not set 1268# CONFIG_GFS2_FS is not set
1065# CONFIG_OCFS2_FS is not set 1269# CONFIG_OCFS2_FS is not set
1270# CONFIG_BTRFS_FS is not set
1271# CONFIG_NILFS2_FS is not set
1272CONFIG_FILE_LOCKING=y
1273CONFIG_FSNOTIFY=y
1066CONFIG_DNOTIFY=y 1274CONFIG_DNOTIFY=y
1067CONFIG_INOTIFY=y 1275CONFIG_INOTIFY=y
1068CONFIG_INOTIFY_USER=y 1276CONFIG_INOTIFY_USER=y
1069CONFIG_QUOTA=y 1277CONFIG_QUOTA=y
1070CONFIG_QUOTA_NETLINK_INTERFACE=y 1278CONFIG_QUOTA_NETLINK_INTERFACE=y
1071# CONFIG_PRINT_QUOTA_WARNING is not set 1279# CONFIG_PRINT_QUOTA_WARNING is not set
1280CONFIG_QUOTA_TREE=m
1072# CONFIG_QFMT_V1 is not set 1281# CONFIG_QFMT_V1 is not set
1073CONFIG_QFMT_V2=m 1282CONFIG_QFMT_V2=m
1074CONFIG_QUOTACTL=y 1283CONFIG_QUOTACTL=y
1075CONFIG_AUTOFS_FS=m 1284CONFIG_AUTOFS_FS=m
1076CONFIG_AUTOFS4_FS=m 1285CONFIG_AUTOFS4_FS=m
1077CONFIG_FUSE_FS=m 1286CONFIG_FUSE_FS=m
1287# CONFIG_CUSE is not set
1288
1289#
1290# Caches
1291#
1292# CONFIG_FSCACHE is not set
1078 1293
1079# 1294#
1080# CD-ROM/DVD Filesystems 1295# CD-ROM/DVD Filesystems
@@ -1103,15 +1318,13 @@ CONFIG_NTFS_RW=y
1103CONFIG_PROC_FS=y 1318CONFIG_PROC_FS=y
1104CONFIG_PROC_KCORE=y 1319CONFIG_PROC_KCORE=y
1105CONFIG_PROC_SYSCTL=y 1320CONFIG_PROC_SYSCTL=y
1321CONFIG_PROC_PAGE_MONITOR=y
1106CONFIG_SYSFS=y 1322CONFIG_SYSFS=y
1107CONFIG_TMPFS=y 1323CONFIG_TMPFS=y
1108# CONFIG_TMPFS_POSIX_ACL is not set 1324# CONFIG_TMPFS_POSIX_ACL is not set
1109# CONFIG_HUGETLB_PAGE is not set 1325# CONFIG_HUGETLB_PAGE is not set
1110CONFIG_CONFIGFS_FS=m 1326CONFIG_CONFIGFS_FS=m
1111 1327CONFIG_MISC_FILESYSTEMS=y
1112#
1113# Miscellaneous filesystems
1114#
1115# CONFIG_ADFS_FS is not set 1328# CONFIG_ADFS_FS is not set
1116# CONFIG_AFFS_FS is not set 1329# CONFIG_AFFS_FS is not set
1117# CONFIG_ECRYPT_FS is not set 1330# CONFIG_ECRYPT_FS is not set
@@ -1120,9 +1333,12 @@ CONFIG_CONFIGFS_FS=m
1120# CONFIG_BEFS_FS is not set 1333# CONFIG_BEFS_FS is not set
1121# CONFIG_BFS_FS is not set 1334# CONFIG_BFS_FS is not set
1122# CONFIG_EFS_FS is not set 1335# CONFIG_EFS_FS is not set
1336# CONFIG_LOGFS is not set
1123# CONFIG_CRAMFS is not set 1337# CONFIG_CRAMFS is not set
1338# CONFIG_SQUASHFS is not set
1124# CONFIG_VXFS_FS is not set 1339# CONFIG_VXFS_FS is not set
1125# CONFIG_MINIX_FS is not set 1340# CONFIG_MINIX_FS is not set
1341# CONFIG_OMFS_FS is not set
1126# CONFIG_HPFS_FS is not set 1342# CONFIG_HPFS_FS is not set
1127# CONFIG_QNX4FS_FS is not set 1343# CONFIG_QNX4FS_FS is not set
1128# CONFIG_ROMFS_FS is not set 1344# CONFIG_ROMFS_FS is not set
@@ -1133,16 +1349,17 @@ CONFIG_NFS_FS=y
1133CONFIG_NFS_V3=y 1349CONFIG_NFS_V3=y
1134# CONFIG_NFS_V3_ACL is not set 1350# CONFIG_NFS_V3_ACL is not set
1135# CONFIG_NFS_V4 is not set 1351# CONFIG_NFS_V4 is not set
1136# CONFIG_NFSD is not set
1137CONFIG_ROOT_NFS=y 1352CONFIG_ROOT_NFS=y
1353# CONFIG_NFSD is not set
1138CONFIG_LOCKD=y 1354CONFIG_LOCKD=y
1139CONFIG_LOCKD_V4=y 1355CONFIG_LOCKD_V4=y
1140CONFIG_NFS_COMMON=y 1356CONFIG_NFS_COMMON=y
1141CONFIG_SUNRPC=y 1357CONFIG_SUNRPC=y
1142# CONFIG_SUNRPC_BIND34 is not set 1358CONFIG_SUNRPC_GSS=m
1143# CONFIG_RPCSEC_GSS_KRB5 is not set 1359CONFIG_RPCSEC_GSS_KRB5=m
1144# CONFIG_RPCSEC_GSS_SPKM3 is not set 1360CONFIG_RPCSEC_GSS_SPKM3=m
1145# CONFIG_SMB_FS is not set 1361# CONFIG_SMB_FS is not set
1362# CONFIG_CEPH_FS is not set
1146# CONFIG_CIFS is not set 1363# CONFIG_CIFS is not set
1147# CONFIG_NCP_FS is not set 1364# CONFIG_NCP_FS is not set
1148# CONFIG_CODA_FS is not set 1365# CONFIG_CODA_FS is not set
@@ -1205,12 +1422,18 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
1205CONFIG_ENABLE_MUST_CHECK=y 1422CONFIG_ENABLE_MUST_CHECK=y
1206CONFIG_FRAME_WARN=2048 1423CONFIG_FRAME_WARN=2048
1207CONFIG_MAGIC_SYSRQ=y 1424CONFIG_MAGIC_SYSRQ=y
1425# CONFIG_STRIP_ASM_SYMS is not set
1208# CONFIG_UNUSED_SYMBOLS is not set 1426# CONFIG_UNUSED_SYMBOLS is not set
1209# CONFIG_DEBUG_FS is not set 1427# CONFIG_DEBUG_FS is not set
1210# CONFIG_HEADERS_CHECK is not set 1428# CONFIG_HEADERS_CHECK is not set
1211CONFIG_DEBUG_KERNEL=y 1429CONFIG_DEBUG_KERNEL=y
1212# CONFIG_DEBUG_SHIRQ is not set 1430# CONFIG_DEBUG_SHIRQ is not set
1213CONFIG_DETECT_SOFTLOCKUP=y 1431CONFIG_DETECT_SOFTLOCKUP=y
1432# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1433CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1434CONFIG_DETECT_HUNG_TASK=y
1435# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
1436CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1214CONFIG_SCHED_DEBUG=y 1437CONFIG_SCHED_DEBUG=y
1215# CONFIG_SCHEDSTATS is not set 1438# CONFIG_SCHEDSTATS is not set
1216# CONFIG_TIMER_STATS is not set 1439# CONFIG_TIMER_STATS is not set
@@ -1219,23 +1442,53 @@ CONFIG_SCHED_DEBUG=y
1219# CONFIG_DEBUG_RT_MUTEXES is not set 1442# CONFIG_DEBUG_RT_MUTEXES is not set
1220# CONFIG_RT_MUTEX_TESTER is not set 1443# CONFIG_RT_MUTEX_TESTER is not set
1221# CONFIG_DEBUG_SPINLOCK is not set 1444# CONFIG_DEBUG_SPINLOCK is not set
1222CONFIG_DEBUG_MUTEXES=y 1445# CONFIG_DEBUG_MUTEXES is not set
1223# CONFIG_DEBUG_LOCK_ALLOC is not set 1446# CONFIG_DEBUG_LOCK_ALLOC is not set
1224# CONFIG_PROVE_LOCKING is not set 1447# CONFIG_PROVE_LOCKING is not set
1225# CONFIG_LOCK_STAT is not set 1448# CONFIG_LOCK_STAT is not set
1226# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 1449CONFIG_DEBUG_SPINLOCK_SLEEP=y
1227# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 1450# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1228# CONFIG_DEBUG_KOBJECT is not set 1451# CONFIG_DEBUG_KOBJECT is not set
1229# CONFIG_DEBUG_INFO is not set 1452# CONFIG_DEBUG_INFO is not set
1230# CONFIG_DEBUG_VM is not set 1453# CONFIG_DEBUG_VM is not set
1231# CONFIG_DEBUG_WRITECOUNT is not set 1454# CONFIG_DEBUG_WRITECOUNT is not set
1232# CONFIG_DEBUG_LIST is not set 1455CONFIG_DEBUG_MEMORY_INIT=y
1456CONFIG_DEBUG_LIST=y
1233# CONFIG_DEBUG_SG is not set 1457# CONFIG_DEBUG_SG is not set
1458# CONFIG_DEBUG_NOTIFIERS is not set
1459# CONFIG_DEBUG_CREDENTIALS is not set
1234# CONFIG_BOOT_PRINTK_DELAY is not set 1460# CONFIG_BOOT_PRINTK_DELAY is not set
1235# CONFIG_RCU_TORTURE_TEST is not set 1461# CONFIG_RCU_TORTURE_TEST is not set
1462CONFIG_RCU_CPU_STALL_DETECTOR=y
1236# CONFIG_BACKTRACE_SELF_TEST is not set 1463# CONFIG_BACKTRACE_SELF_TEST is not set
1464# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1465# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1237# CONFIG_FAULT_INJECTION is not set 1466# CONFIG_FAULT_INJECTION is not set
1467# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1468# CONFIG_PAGE_POISONING is not set
1469CONFIG_HAVE_FUNCTION_TRACER=y
1470CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1471CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
1472CONFIG_HAVE_DYNAMIC_FTRACE=y
1473CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1474CONFIG_TRACING_SUPPORT=y
1475CONFIG_FTRACE=y
1476# CONFIG_FUNCTION_TRACER is not set
1477# CONFIG_IRQSOFF_TRACER is not set
1478# CONFIG_SCHED_TRACER is not set
1479# CONFIG_ENABLE_DEFAULT_TRACERS is not set
1480# CONFIG_BOOT_TRACER is not set
1481CONFIG_BRANCH_PROFILE_NONE=y
1482# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1483# CONFIG_PROFILE_ALL_BRANCHES is not set
1484# CONFIG_STACK_TRACER is not set
1485# CONFIG_KMEMTRACE is not set
1486# CONFIG_WORKQUEUE_TRACER is not set
1487# CONFIG_BLK_DEV_IO_TRACE is not set
1238# CONFIG_SAMPLES is not set 1488# CONFIG_SAMPLES is not set
1489CONFIG_HAVE_ARCH_KGDB=y
1490# CONFIG_KGDB is not set
1491CONFIG_EARLY_PRINTK=y
1239# CONFIG_CMDLINE_BOOL is not set 1492# CONFIG_CMDLINE_BOOL is not set
1240# CONFIG_DEBUG_STACK_USAGE is not set 1493# CONFIG_DEBUG_STACK_USAGE is not set
1241# CONFIG_SB1XXX_CORELIS is not set 1494# CONFIG_SB1XXX_CORELIS is not set
@@ -1246,20 +1499,50 @@ CONFIG_DEBUG_MUTEXES=y
1246# 1499#
1247CONFIG_KEYS=y 1500CONFIG_KEYS=y
1248CONFIG_KEYS_DEBUG_PROC_KEYS=y 1501CONFIG_KEYS_DEBUG_PROC_KEYS=y
1249# CONFIG_SECURITY is not set 1502CONFIG_SECURITY=y
1250# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1503# CONFIG_SECURITYFS is not set
1504CONFIG_SECURITY_NETWORK=y
1505CONFIG_SECURITY_NETWORK_XFRM=y
1506# CONFIG_SECURITY_PATH is not set
1507CONFIG_LSM_MMAP_MIN_ADDR=65536
1508CONFIG_SECURITY_SELINUX=y
1509CONFIG_SECURITY_SELINUX_BOOTPARAM=y
1510CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=1
1511CONFIG_SECURITY_SELINUX_DISABLE=y
1512CONFIG_SECURITY_SELINUX_DEVELOP=y
1513CONFIG_SECURITY_SELINUX_AVC_STATS=y
1514CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
1515# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
1516# CONFIG_SECURITY_SMACK is not set
1517# CONFIG_SECURITY_TOMOYO is not set
1518# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1519# CONFIG_DEFAULT_SECURITY_SMACK is not set
1520# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1521CONFIG_DEFAULT_SECURITY_DAC=y
1522CONFIG_DEFAULT_SECURITY=""
1251CONFIG_CRYPTO=y 1523CONFIG_CRYPTO=y
1252 1524
1253# 1525#
1254# Crypto core or helper 1526# Crypto core or helper
1255# 1527#
1528# CONFIG_CRYPTO_FIPS is not set
1256CONFIG_CRYPTO_ALGAPI=y 1529CONFIG_CRYPTO_ALGAPI=y
1530CONFIG_CRYPTO_ALGAPI2=y
1257CONFIG_CRYPTO_AEAD=m 1531CONFIG_CRYPTO_AEAD=m
1532CONFIG_CRYPTO_AEAD2=y
1258CONFIG_CRYPTO_BLKCIPHER=y 1533CONFIG_CRYPTO_BLKCIPHER=y
1534CONFIG_CRYPTO_BLKCIPHER2=y
1259CONFIG_CRYPTO_HASH=y 1535CONFIG_CRYPTO_HASH=y
1536CONFIG_CRYPTO_HASH2=y
1537CONFIG_CRYPTO_RNG=m
1538CONFIG_CRYPTO_RNG2=y
1539CONFIG_CRYPTO_PCOMP=y
1260CONFIG_CRYPTO_MANAGER=y 1540CONFIG_CRYPTO_MANAGER=y
1541CONFIG_CRYPTO_MANAGER2=y
1261CONFIG_CRYPTO_GF128MUL=m 1542CONFIG_CRYPTO_GF128MUL=m
1262CONFIG_CRYPTO_NULL=y 1543CONFIG_CRYPTO_NULL=y
1544# CONFIG_CRYPTO_PCRYPT is not set
1545CONFIG_CRYPTO_WORKQUEUE=y
1263# CONFIG_CRYPTO_CRYPTD is not set 1546# CONFIG_CRYPTO_CRYPTD is not set
1264CONFIG_CRYPTO_AUTHENC=m 1547CONFIG_CRYPTO_AUTHENC=m
1265# CONFIG_CRYPTO_TEST is not set 1548# CONFIG_CRYPTO_TEST is not set
@@ -1276,7 +1559,7 @@ CONFIG_CRYPTO_SEQIV=m
1276# 1559#
1277CONFIG_CRYPTO_CBC=m 1560CONFIG_CRYPTO_CBC=m
1278CONFIG_CRYPTO_CTR=m 1561CONFIG_CRYPTO_CTR=m
1279# CONFIG_CRYPTO_CTS is not set 1562CONFIG_CRYPTO_CTS=m
1280CONFIG_CRYPTO_ECB=m 1563CONFIG_CRYPTO_ECB=m
1281CONFIG_CRYPTO_LRW=m 1564CONFIG_CRYPTO_LRW=m
1282CONFIG_CRYPTO_PCBC=m 1565CONFIG_CRYPTO_PCBC=m
@@ -1287,14 +1570,20 @@ CONFIG_CRYPTO_XTS=m
1287# 1570#
1288CONFIG_CRYPTO_HMAC=y 1571CONFIG_CRYPTO_HMAC=y
1289CONFIG_CRYPTO_XCBC=m 1572CONFIG_CRYPTO_XCBC=m
1573CONFIG_CRYPTO_VMAC=m
1290 1574
1291# 1575#
1292# Digest 1576# Digest
1293# 1577#
1294# CONFIG_CRYPTO_CRC32C is not set 1578CONFIG_CRYPTO_CRC32C=m
1579CONFIG_CRYPTO_GHASH=m
1295CONFIG_CRYPTO_MD4=m 1580CONFIG_CRYPTO_MD4=m
1296CONFIG_CRYPTO_MD5=y 1581CONFIG_CRYPTO_MD5=y
1297CONFIG_CRYPTO_MICHAEL_MIC=m 1582CONFIG_CRYPTO_MICHAEL_MIC=m
1583CONFIG_CRYPTO_RMD128=m
1584CONFIG_CRYPTO_RMD160=m
1585CONFIG_CRYPTO_RMD256=m
1586CONFIG_CRYPTO_RMD320=m
1298CONFIG_CRYPTO_SHA1=m 1587CONFIG_CRYPTO_SHA1=m
1299CONFIG_CRYPTO_SHA256=m 1588CONFIG_CRYPTO_SHA256=m
1300CONFIG_CRYPTO_SHA512=m 1589CONFIG_CRYPTO_SHA512=m
@@ -1325,25 +1614,36 @@ CONFIG_CRYPTO_TWOFISH_COMMON=m
1325# Compression 1614# Compression
1326# 1615#
1327CONFIG_CRYPTO_DEFLATE=m 1616CONFIG_CRYPTO_DEFLATE=m
1328# CONFIG_CRYPTO_LZO is not set 1617CONFIG_CRYPTO_ZLIB=m
1618CONFIG_CRYPTO_LZO=m
1619
1620#
1621# Random Number Generation
1622#
1623CONFIG_CRYPTO_ANSI_CPRNG=m
1329CONFIG_CRYPTO_HW=y 1624CONFIG_CRYPTO_HW=y
1330# CONFIG_CRYPTO_DEV_HIFN_795X is not set 1625# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1626# CONFIG_BINARY_PRINTF is not set
1331 1627
1332# 1628#
1333# Library routines 1629# Library routines
1334# 1630#
1335CONFIG_BITREVERSE=y 1631CONFIG_BITREVERSE=y
1336# CONFIG_GENERIC_FIND_FIRST_BIT is not set 1632CONFIG_GENERIC_FIND_LAST_BIT=y
1337CONFIG_CRC_CCITT=m 1633CONFIG_CRC_CCITT=m
1338# CONFIG_CRC16 is not set 1634CONFIG_CRC16=y
1635CONFIG_CRC_T10DIF=m
1339CONFIG_CRC_ITU_T=m 1636CONFIG_CRC_ITU_T=m
1340CONFIG_CRC32=y 1637CONFIG_CRC32=y
1341# CONFIG_CRC7 is not set 1638CONFIG_CRC7=m
1342CONFIG_LIBCRC32C=m 1639CONFIG_LIBCRC32C=m
1343CONFIG_AUDIT_GENERIC=y 1640CONFIG_AUDIT_GENERIC=y
1344CONFIG_ZLIB_INFLATE=m 1641CONFIG_ZLIB_INFLATE=y
1345CONFIG_ZLIB_DEFLATE=m 1642CONFIG_ZLIB_DEFLATE=m
1346CONFIG_PLIST=y 1643CONFIG_LZO_COMPRESS=m
1644CONFIG_LZO_DECOMPRESS=m
1645CONFIG_DECOMPRESS_GZIP=y
1347CONFIG_HAS_IOMEM=y 1646CONFIG_HAS_IOMEM=y
1348CONFIG_HAS_IOPORT=y 1647CONFIG_HAS_IOPORT=y
1349CONFIG_HAS_DMA=y 1648CONFIG_HAS_DMA=y
1649CONFIG_NLATTR=y
diff --git a/arch/mips/include/asm/abi.h b/arch/mips/include/asm/abi.h
index 1dd74fbdc09b..9252d9b50e59 100644
--- a/arch/mips/include/asm/abi.h
+++ b/arch/mips/include/asm/abi.h
@@ -13,12 +13,14 @@
13#include <asm/siginfo.h> 13#include <asm/siginfo.h>
14 14
15struct mips_abi { 15struct mips_abi {
16 int (* const setup_frame)(struct k_sigaction * ka, 16 int (* const setup_frame)(void *sig_return, struct k_sigaction *ka,
17 struct pt_regs *regs, int signr, 17 struct pt_regs *regs, int signr,
18 sigset_t *set); 18 sigset_t *set);
19 int (* const setup_rt_frame)(struct k_sigaction * ka, 19 const unsigned long signal_return_offset;
20 int (* const setup_rt_frame)(void *sig_return, struct k_sigaction *ka,
20 struct pt_regs *regs, int signr, 21 struct pt_regs *regs, int signr,
21 sigset_t *set, siginfo_t *info); 22 sigset_t *set, siginfo_t *info);
23 const unsigned long rt_signal_return_offset;
22 const unsigned long restart; 24 const unsigned long restart;
23}; 25};
24 26
diff --git a/arch/mips/include/asm/elf.h b/arch/mips/include/asm/elf.h
index e53d7bed5cda..ea77a42c5f8c 100644
--- a/arch/mips/include/asm/elf.h
+++ b/arch/mips/include/asm/elf.h
@@ -310,6 +310,7 @@ do { \
310 310
311#endif /* CONFIG_64BIT */ 311#endif /* CONFIG_64BIT */
312 312
313struct pt_regs;
313struct task_struct; 314struct task_struct;
314 315
315extern void elf_dump_regs(elf_greg_t *, struct pt_regs *regs); 316extern void elf_dump_regs(elf_greg_t *, struct pt_regs *regs);
@@ -367,4 +368,8 @@ extern const char *__elf_platform;
367#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2) 368#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
368#endif 369#endif
369 370
371#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
372struct linux_binprm;
373extern int arch_setup_additional_pages(struct linux_binprm *bprm,
374 int uses_interp);
370#endif /* _ASM_ELF_H */ 375#endif /* _ASM_ELF_H */
diff --git a/arch/mips/include/asm/fpu_emulator.h b/arch/mips/include/asm/fpu_emulator.h
index aecada6f6117..3b4092705567 100644
--- a/arch/mips/include/asm/fpu_emulator.h
+++ b/arch/mips/include/asm/fpu_emulator.h
@@ -41,7 +41,11 @@ struct mips_fpu_emulator_stats {
41DECLARE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats); 41DECLARE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats);
42 42
43#define MIPS_FPU_EMU_INC_STATS(M) \ 43#define MIPS_FPU_EMU_INC_STATS(M) \
44 cpu_local_wrap(__local_inc(&__get_cpu_var(fpuemustats).M)) 44do { \
45 preempt_disable(); \
46 __local_inc(&__get_cpu_var(fpuemustats).M); \
47 preempt_enable(); \
48} while (0)
45 49
46#else 50#else
47#define MIPS_FPU_EMU_INC_STATS(M) do { } while (0) 51#define MIPS_FPU_EMU_INC_STATS(M) do { } while (0)
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
index b12c4aca2cc9..96a2391ad85b 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
@@ -85,6 +85,7 @@ enum bcm63xx_regs_set {
85 RSET_TIMER, 85 RSET_TIMER,
86 RSET_WDT, 86 RSET_WDT,
87 RSET_UART0, 87 RSET_UART0,
88 RSET_UART1,
88 RSET_GPIO, 89 RSET_GPIO,
89 RSET_SPI, 90 RSET_SPI,
90 RSET_UDC0, 91 RSET_UDC0,
@@ -123,6 +124,7 @@ enum bcm63xx_regs_set {
123#define BCM_6338_TIMER_BASE (0xfffe0200) 124#define BCM_6338_TIMER_BASE (0xfffe0200)
124#define BCM_6338_WDT_BASE (0xfffe021c) 125#define BCM_6338_WDT_BASE (0xfffe021c)
125#define BCM_6338_UART0_BASE (0xfffe0300) 126#define BCM_6338_UART0_BASE (0xfffe0300)
127#define BCM_6338_UART1_BASE (0xdeadbeef)
126#define BCM_6338_GPIO_BASE (0xfffe0400) 128#define BCM_6338_GPIO_BASE (0xfffe0400)
127#define BCM_6338_SPI_BASE (0xfffe0c00) 129#define BCM_6338_SPI_BASE (0xfffe0c00)
128#define BCM_6338_UDC0_BASE (0xdeadbeef) 130#define BCM_6338_UDC0_BASE (0xdeadbeef)
@@ -153,6 +155,7 @@ enum bcm63xx_regs_set {
153#define BCM_6345_TIMER_BASE (0xfffe0200) 155#define BCM_6345_TIMER_BASE (0xfffe0200)
154#define BCM_6345_WDT_BASE (0xfffe021c) 156#define BCM_6345_WDT_BASE (0xfffe021c)
155#define BCM_6345_UART0_BASE (0xfffe0300) 157#define BCM_6345_UART0_BASE (0xfffe0300)
158#define BCM_6345_UART1_BASE (0xdeadbeef)
156#define BCM_6345_GPIO_BASE (0xfffe0400) 159#define BCM_6345_GPIO_BASE (0xfffe0400)
157#define BCM_6345_SPI_BASE (0xdeadbeef) 160#define BCM_6345_SPI_BASE (0xdeadbeef)
158#define BCM_6345_UDC0_BASE (0xdeadbeef) 161#define BCM_6345_UDC0_BASE (0xdeadbeef)
@@ -182,6 +185,7 @@ enum bcm63xx_regs_set {
182#define BCM_6348_TIMER_BASE (0xfffe0200) 185#define BCM_6348_TIMER_BASE (0xfffe0200)
183#define BCM_6348_WDT_BASE (0xfffe021c) 186#define BCM_6348_WDT_BASE (0xfffe021c)
184#define BCM_6348_UART0_BASE (0xfffe0300) 187#define BCM_6348_UART0_BASE (0xfffe0300)
188#define BCM_6348_UART1_BASE (0xdeadbeef)
185#define BCM_6348_GPIO_BASE (0xfffe0400) 189#define BCM_6348_GPIO_BASE (0xfffe0400)
186#define BCM_6348_SPI_BASE (0xfffe0c00) 190#define BCM_6348_SPI_BASE (0xfffe0c00)
187#define BCM_6348_UDC0_BASE (0xfffe1000) 191#define BCM_6348_UDC0_BASE (0xfffe1000)
@@ -208,6 +212,7 @@ enum bcm63xx_regs_set {
208#define BCM_6358_TIMER_BASE (0xfffe0040) 212#define BCM_6358_TIMER_BASE (0xfffe0040)
209#define BCM_6358_WDT_BASE (0xfffe005c) 213#define BCM_6358_WDT_BASE (0xfffe005c)
210#define BCM_6358_UART0_BASE (0xfffe0100) 214#define BCM_6358_UART0_BASE (0xfffe0100)
215#define BCM_6358_UART1_BASE (0xfffe0120)
211#define BCM_6358_GPIO_BASE (0xfffe0080) 216#define BCM_6358_GPIO_BASE (0xfffe0080)
212#define BCM_6358_SPI_BASE (0xdeadbeef) 217#define BCM_6358_SPI_BASE (0xdeadbeef)
213#define BCM_6358_UDC0_BASE (0xfffe0800) 218#define BCM_6358_UDC0_BASE (0xfffe0800)
@@ -246,6 +251,8 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
246 return BCM_6338_WDT_BASE; 251 return BCM_6338_WDT_BASE;
247 case RSET_UART0: 252 case RSET_UART0:
248 return BCM_6338_UART0_BASE; 253 return BCM_6338_UART0_BASE;
254 case RSET_UART1:
255 return BCM_6338_UART1_BASE;
249 case RSET_GPIO: 256 case RSET_GPIO:
250 return BCM_6338_GPIO_BASE; 257 return BCM_6338_GPIO_BASE;
251 case RSET_SPI: 258 case RSET_SPI:
@@ -292,6 +299,8 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
292 return BCM_6345_WDT_BASE; 299 return BCM_6345_WDT_BASE;
293 case RSET_UART0: 300 case RSET_UART0:
294 return BCM_6345_UART0_BASE; 301 return BCM_6345_UART0_BASE;
302 case RSET_UART1:
303 return BCM_6345_UART1_BASE;
295 case RSET_GPIO: 304 case RSET_GPIO:
296 return BCM_6345_GPIO_BASE; 305 return BCM_6345_GPIO_BASE;
297 case RSET_SPI: 306 case RSET_SPI:
@@ -338,6 +347,8 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
338 return BCM_6348_WDT_BASE; 347 return BCM_6348_WDT_BASE;
339 case RSET_UART0: 348 case RSET_UART0:
340 return BCM_6348_UART0_BASE; 349 return BCM_6348_UART0_BASE;
350 case RSET_UART1:
351 return BCM_6348_UART1_BASE;
341 case RSET_GPIO: 352 case RSET_GPIO:
342 return BCM_6348_GPIO_BASE; 353 return BCM_6348_GPIO_BASE;
343 case RSET_SPI: 354 case RSET_SPI:
@@ -384,6 +395,8 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
384 return BCM_6358_WDT_BASE; 395 return BCM_6358_WDT_BASE;
385 case RSET_UART0: 396 case RSET_UART0:
386 return BCM_6358_UART0_BASE; 397 return BCM_6358_UART0_BASE;
398 case RSET_UART1:
399 return BCM_6358_UART1_BASE;
387 case RSET_GPIO: 400 case RSET_GPIO:
388 return BCM_6358_GPIO_BASE; 401 return BCM_6358_GPIO_BASE;
389 case RSET_SPI: 402 case RSET_SPI:
@@ -429,6 +442,7 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
429enum bcm63xx_irq { 442enum bcm63xx_irq {
430 IRQ_TIMER = 0, 443 IRQ_TIMER = 0,
431 IRQ_UART0, 444 IRQ_UART0,
445 IRQ_UART1,
432 IRQ_DSL, 446 IRQ_DSL,
433 IRQ_ENET0, 447 IRQ_ENET0,
434 IRQ_ENET1, 448 IRQ_ENET1,
@@ -510,6 +524,7 @@ enum bcm63xx_irq {
510 */ 524 */
511#define BCM_6358_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) 525#define BCM_6358_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
512#define BCM_6358_UART0_IRQ (IRQ_INTERNAL_BASE + 2) 526#define BCM_6358_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
527#define BCM_6358_UART1_IRQ (IRQ_INTERNAL_BASE + 3)
513#define BCM_6358_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5) 528#define BCM_6358_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5)
514#define BCM_6358_ENET1_IRQ (IRQ_INTERNAL_BASE + 6) 529#define BCM_6358_ENET1_IRQ (IRQ_INTERNAL_BASE + 6)
515#define BCM_6358_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) 530#define BCM_6358_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h
new file mode 100644
index 000000000000..23c705baf171
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h
@@ -0,0 +1,6 @@
1#ifndef BCM63XX_DEV_UART_H_
2#define BCM63XX_DEV_UART_H_
3
4int bcm63xx_uart_register(unsigned int id);
5
6#endif /* BCM63XX_DEV_UART_H_ */
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
index 76a0b7216af5..43d4da0b1e9f 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
@@ -10,6 +10,10 @@ static inline unsigned long bcm63xx_gpio_count(void)
10 switch (bcm63xx_get_cpu_id()) { 10 switch (bcm63xx_get_cpu_id()) {
11 case BCM6358_CPU_ID: 11 case BCM6358_CPU_ID:
12 return 40; 12 return 40;
13 case BCM6338_CPU_ID:
14 return 8;
15 case BCM6345_CPU_ID:
16 return 16;
13 case BCM6348_CPU_ID: 17 case BCM6348_CPU_ID:
14 default: 18 default:
15 return 37; 19 return 37;
diff --git a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
index 6479090a4106..474daaa53497 100644
--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
@@ -45,6 +45,8 @@ struct board_info {
45 unsigned int has_ohci0:1; 45 unsigned int has_ohci0:1;
46 unsigned int has_ehci0:1; 46 unsigned int has_ehci0:1;
47 unsigned int has_dsp:1; 47 unsigned int has_dsp:1;
48 unsigned int has_uart0:1;
49 unsigned int has_uart1:1;
48 50
49 /* ethernet config */ 51 /* ethernet config */
50 struct bcm63xx_enet_platform_data enet0; 52 struct bcm63xx_enet_platform_data enet0;
diff --git a/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h b/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h
index 71742bac940d..f453c01d0672 100644
--- a/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h
@@ -24,7 +24,7 @@
24#define cpu_has_smartmips 0 24#define cpu_has_smartmips 0
25#define cpu_has_vtag_icache 0 25#define cpu_has_vtag_icache 0
26 26
27#if !defined(BCMCPU_RUNTIME_DETECT) && (defined(CONFIG_BCMCPU_IS_6348) || defined(CONFIG_CPU_IS_6338) || defined(CONFIG_CPU_IS_BCM6345)) 27#if !defined(BCMCPU_RUNTIME_DETECT) && (defined(CONFIG_BCM63XX_CPU_6348) || defined(CONFIG_BCM63XX_CPU_6345) || defined(CONFIG_BCM63XX_CPU_6338))
28#define cpu_has_dc_aliases 0 28#define cpu_has_dc_aliases 0
29#endif 29#endif
30 30
diff --git a/arch/mips/include/asm/mach-sibyte/war.h b/arch/mips/include/asm/mach-sibyte/war.h
index 7950ef4f032c..743385d7b5f2 100644
--- a/arch/mips/include/asm/mach-sibyte/war.h
+++ b/arch/mips/include/asm/mach-sibyte/war.h
@@ -16,7 +16,11 @@
16#if defined(CONFIG_SB1_PASS_1_WORKAROUNDS) || \ 16#if defined(CONFIG_SB1_PASS_1_WORKAROUNDS) || \
17 defined(CONFIG_SB1_PASS_2_WORKAROUNDS) 17 defined(CONFIG_SB1_PASS_2_WORKAROUNDS)
18 18
19#define BCM1250_M3_WAR 1 19#ifndef __ASSEMBLY__
20extern int sb1250_m3_workaround_needed(void);
21#endif
22
23#define BCM1250_M3_WAR sb1250_m3_workaround_needed()
20#define SIBYTE_1956_WAR 1 24#define SIBYTE_1956_WAR 1
21 25
22#else 26#else
diff --git a/arch/mips/include/asm/mmu.h b/arch/mips/include/asm/mmu.h
index 4063edd79623..c436138945a8 100644
--- a/arch/mips/include/asm/mmu.h
+++ b/arch/mips/include/asm/mmu.h
@@ -1,6 +1,9 @@
1#ifndef __ASM_MMU_H 1#ifndef __ASM_MMU_H
2#define __ASM_MMU_H 2#define __ASM_MMU_H
3 3
4typedef unsigned long mm_context_t[NR_CPUS]; 4typedef struct {
5 unsigned long asid[NR_CPUS];
6 void *vdso;
7} mm_context_t;
5 8
6#endif /* __ASM_MMU_H */ 9#endif /* __ASM_MMU_H */
diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h
index 145bb81ccaa5..d9592733a7ba 100644
--- a/arch/mips/include/asm/mmu_context.h
+++ b/arch/mips/include/asm/mmu_context.h
@@ -104,7 +104,7 @@ extern unsigned long smtc_asid_mask;
104 104
105#endif 105#endif
106 106
107#define cpu_context(cpu, mm) ((mm)->context[cpu]) 107#define cpu_context(cpu, mm) ((mm)->context.asid[cpu])
108#define cpu_asid(cpu, mm) (cpu_context((cpu), (mm)) & ASID_MASK) 108#define cpu_asid(cpu, mm) (cpu_context((cpu), (mm)) & ASID_MASK)
109#define asid_cache(cpu) (cpu_data[cpu].asid_cache) 109#define asid_cache(cpu) (cpu_data[cpu].asid_cache)
110 110
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h
index ac32572430f4..a16beafcea91 100644
--- a/arch/mips/include/asm/page.h
+++ b/arch/mips/include/asm/page.h
@@ -188,8 +188,10 @@ typedef struct { unsigned long pgprot; } pgprot_t;
188#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ 188#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
189 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) 189 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
190 190
191#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE) 191#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE + \
192#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET) 192 PHYS_OFFSET)
193#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET - \
194 PHYS_OFFSET)
193 195
194#include <asm-generic/memory_model.h> 196#include <asm-generic/memory_model.h>
195#include <asm-generic/getorder.h> 197#include <asm-generic/getorder.h>
diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h
index 087a8884ef06..ab387910009a 100644
--- a/arch/mips/include/asm/processor.h
+++ b/arch/mips/include/asm/processor.h
@@ -33,13 +33,19 @@ extern void (*cpu_wait)(void);
33 33
34extern unsigned int vced_count, vcei_count; 34extern unsigned int vced_count, vcei_count;
35 35
36/*
37 * A special page (the vdso) is mapped into all processes at the very
38 * top of the virtual memory space.
39 */
40#define SPECIAL_PAGES_SIZE PAGE_SIZE
41
36#ifdef CONFIG_32BIT 42#ifdef CONFIG_32BIT
37/* 43/*
38 * User space process size: 2GB. This is hardcoded into a few places, 44 * User space process size: 2GB. This is hardcoded into a few places,
39 * so don't change it unless you know what you are doing. 45 * so don't change it unless you know what you are doing.
40 */ 46 */
41#define TASK_SIZE 0x7fff8000UL 47#define TASK_SIZE 0x7fff8000UL
42#define STACK_TOP TASK_SIZE 48#define STACK_TOP ((TASK_SIZE & PAGE_MASK) - SPECIAL_PAGES_SIZE)
43 49
44/* 50/*
45 * This decides where the kernel will search for a free chunk of vm 51 * This decides where the kernel will search for a free chunk of vm
@@ -59,7 +65,8 @@ extern unsigned int vced_count, vcei_count;
59#define TASK_SIZE32 0x7fff8000UL 65#define TASK_SIZE32 0x7fff8000UL
60#define TASK_SIZE 0x10000000000UL 66#define TASK_SIZE 0x10000000000UL
61#define STACK_TOP \ 67#define STACK_TOP \
62 (test_thread_flag(TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE) 68 (((test_thread_flag(TIF_32BIT_ADDR) ? \
69 TASK_SIZE32 : TASK_SIZE) & PAGE_MASK) - SPECIAL_PAGES_SIZE)
63 70
64/* 71/*
65 * This decides where the kernel will search for a free chunk of vm 72 * This decides where the kernel will search for a free chunk of vm
diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h
index 3b6da3330e32..c8419129e770 100644
--- a/arch/mips/include/asm/stackframe.h
+++ b/arch/mips/include/asm/stackframe.h
@@ -121,6 +121,25 @@
121 .endm 121 .endm
122#else 122#else
123 .macro get_saved_sp /* Uniprocessor variation */ 123 .macro get_saved_sp /* Uniprocessor variation */
124#ifdef CONFIG_CPU_LOONGSON2F
125 /*
126 * Clear BTB (branch target buffer), forbid RAS (return address
127 * stack) to workaround the Out-of-order Issue in Loongson2F
128 * via its diagnostic register.
129 */
130 move k0, ra
131 jal 1f
132 nop
1331: jal 1f
134 nop
1351: jal 1f
136 nop
1371: jal 1f
138 nop
1391: move ra, k0
140 li k0, 3
141 mtc0 k0, $22
142#endif /* CONFIG_CPU_LOONGSON2F */
124#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32) 143#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
125 lui k1, %hi(kernelsp) 144 lui k1, %hi(kernelsp)
126#else 145#else
diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h
index b99bd07e199b..11a8b5252549 100644
--- a/arch/mips/include/asm/uasm.h
+++ b/arch/mips/include/asm/uasm.h
@@ -84,6 +84,7 @@ Ip_u2s3u1(_lw);
84Ip_u1u2u3(_mfc0); 84Ip_u1u2u3(_mfc0);
85Ip_u1u2u3(_mtc0); 85Ip_u1u2u3(_mtc0);
86Ip_u2u1u3(_ori); 86Ip_u2u1u3(_ori);
87Ip_u3u1u2(_or);
87Ip_u2s3u1(_pref); 88Ip_u2s3u1(_pref);
88Ip_0(_rfe); 89Ip_0(_rfe);
89Ip_u2s3u1(_sc); 90Ip_u2s3u1(_sc);
@@ -102,6 +103,7 @@ Ip_0(_tlbwr);
102Ip_u3u1u2(_xor); 103Ip_u3u1u2(_xor);
103Ip_u2u1u3(_xori); 104Ip_u2u1u3(_xori);
104Ip_u2u1msbu3(_dins); 105Ip_u2u1msbu3(_dins);
106Ip_u1(_syscall);
105 107
106/* Handle labels. */ 108/* Handle labels. */
107struct uasm_label { 109struct uasm_label {
diff --git a/arch/mips/include/asm/vdso.h b/arch/mips/include/asm/vdso.h
new file mode 100644
index 000000000000..cca56aa40ff4
--- /dev/null
+++ b/arch/mips/include/asm/vdso.h
@@ -0,0 +1,29 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2009 Cavium Networks
7 */
8
9#ifndef __ASM_VDSO_H
10#define __ASM_VDSO_H
11
12#include <linux/types.h>
13
14
15#ifdef CONFIG_32BIT
16struct mips_vdso {
17 u32 signal_trampoline[2];
18 u32 rt_signal_trampoline[2];
19};
20#else /* !CONFIG_32BIT */
21struct mips_vdso {
22 u32 o32_signal_trampoline[2];
23 u32 o32_rt_signal_trampoline[2];
24 u32 rt_signal_trampoline[2];
25 u32 n32_rt_signal_trampoline[2];
26};
27#endif /* CONFIG_32BIT */
28
29#endif /* __ASM_VDSO_H */
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index ef20957ca14b..7a6ac501cbb5 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -6,7 +6,7 @@ extra-y := head.o init_task.o vmlinux.lds
6 6
7obj-y += cpu-probe.o branch.o entry.o genex.o irq.o process.o \ 7obj-y += cpu-probe.o branch.o entry.o genex.o irq.o process.o \
8 ptrace.o reset.o setup.o signal.o syscall.o \ 8 ptrace.o reset.o setup.o signal.o syscall.o \
9 time.o topology.o traps.o unaligned.o watch.o 9 time.o topology.o traps.o unaligned.o watch.o vdso.o
10 10
11ifdef CONFIG_FUNCTION_TRACER 11ifdef CONFIG_FUNCTION_TRACER
12CFLAGS_REMOVE_ftrace.o = -pg 12CFLAGS_REMOVE_ftrace.o = -pg
diff --git a/arch/mips/kernel/cpufreq/loongson2_clock.c b/arch/mips/kernel/cpufreq/loongson2_clock.c
index d7ca256e33ef..cefc6e259baf 100644
--- a/arch/mips/kernel/cpufreq/loongson2_clock.c
+++ b/arch/mips/kernel/cpufreq/loongson2_clock.c
@@ -164,3 +164,7 @@ void loongson2_cpu_wait(void)
164 spin_unlock_irqrestore(&loongson2_wait_lock, flags); 164 spin_unlock_irqrestore(&loongson2_wait_lock, flags);
165} 165}
166EXPORT_SYMBOL_GPL(loongson2_cpu_wait); 166EXPORT_SYMBOL_GPL(loongson2_cpu_wait);
167
168MODULE_AUTHOR("Yanhua <yanh@lemote.com>");
169MODULE_DESCRIPTION("cpufreq driver for Loongson 2F");
170MODULE_LICENSE("GPL");
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index 463b71b90a00..99960940d4a4 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -63,8 +63,13 @@ void __noreturn cpu_idle(void)
63 63
64 smtc_idle_loop_hook(); 64 smtc_idle_loop_hook();
65#endif 65#endif
66 if (cpu_wait) 66
67 if (cpu_wait) {
68 /* Don't trace irqs off for idle */
69 stop_critical_timings();
67 (*cpu_wait)(); 70 (*cpu_wait)();
71 start_critical_timings();
72 }
68 } 73 }
69#ifdef CONFIG_HOTPLUG_CPU 74#ifdef CONFIG_HOTPLUG_CPU
70 if (!cpu_online(cpu) && !cpu_isset(cpu, cpu_callin_map) && 75 if (!cpu_online(cpu) && !cpu_isset(cpu, cpu_callin_map) &&
diff --git a/arch/mips/kernel/signal-common.h b/arch/mips/kernel/signal-common.h
index 6c8e8c4246f7..10263b405981 100644
--- a/arch/mips/kernel/signal-common.h
+++ b/arch/mips/kernel/signal-common.h
@@ -26,11 +26,6 @@
26 */ 26 */
27extern void __user *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, 27extern void __user *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
28 size_t frame_size); 28 size_t frame_size);
29/*
30 * install trampoline code to get back from the sig handler
31 */
32extern int install_sigtramp(unsigned int __user *tramp, unsigned int syscall);
33
34/* Check and clear pending FPU exceptions in saved CSR */ 29/* Check and clear pending FPU exceptions in saved CSR */
35extern int fpcsr_pending(unsigned int __user *fpcsr); 30extern int fpcsr_pending(unsigned int __user *fpcsr);
36 31
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c
index d0c68b5d717b..2099d5a4c4b7 100644
--- a/arch/mips/kernel/signal.c
+++ b/arch/mips/kernel/signal.c
@@ -32,6 +32,7 @@
32#include <asm/ucontext.h> 32#include <asm/ucontext.h>
33#include <asm/cpu-features.h> 33#include <asm/cpu-features.h>
34#include <asm/war.h> 34#include <asm/war.h>
35#include <asm/vdso.h>
35 36
36#include "signal-common.h" 37#include "signal-common.h"
37 38
@@ -44,47 +45,20 @@ extern asmlinkage int _restore_fp_context(struct sigcontext __user *sc);
44extern asmlinkage int fpu_emulator_save_context(struct sigcontext __user *sc); 45extern asmlinkage int fpu_emulator_save_context(struct sigcontext __user *sc);
45extern asmlinkage int fpu_emulator_restore_context(struct sigcontext __user *sc); 46extern asmlinkage int fpu_emulator_restore_context(struct sigcontext __user *sc);
46 47
47/*
48 * Horribly complicated - with the bloody RM9000 workarounds enabled
49 * the signal trampolines is moving to the end of the structure so we can
50 * increase the alignment without breaking software compatibility.
51 */
52#if ICACHE_REFILLS_WORKAROUND_WAR == 0
53
54struct sigframe { 48struct sigframe {
55 u32 sf_ass[4]; /* argument save space for o32 */ 49 u32 sf_ass[4]; /* argument save space for o32 */
56 u32 sf_code[2]; /* signal trampoline */ 50 u32 sf_pad[2]; /* Was: signal trampoline */
57 struct sigcontext sf_sc; 51 struct sigcontext sf_sc;
58 sigset_t sf_mask; 52 sigset_t sf_mask;
59}; 53};
60 54
61struct rt_sigframe { 55struct rt_sigframe {
62 u32 rs_ass[4]; /* argument save space for o32 */ 56 u32 rs_ass[4]; /* argument save space for o32 */
63 u32 rs_code[2]; /* signal trampoline */ 57 u32 rs_pad[2]; /* Was: signal trampoline */
64 struct siginfo rs_info; 58 struct siginfo rs_info;
65 struct ucontext rs_uc; 59 struct ucontext rs_uc;
66}; 60};
67 61
68#else
69
70struct sigframe {
71 u32 sf_ass[4]; /* argument save space for o32 */
72 u32 sf_pad[2];
73 struct sigcontext sf_sc; /* hw context */
74 sigset_t sf_mask;
75 u32 sf_code[8] ____cacheline_aligned; /* signal trampoline */
76};
77
78struct rt_sigframe {
79 u32 rs_ass[4]; /* argument save space for o32 */
80 u32 rs_pad[2];
81 struct siginfo rs_info;
82 struct ucontext rs_uc;
83 u32 rs_code[8] ____cacheline_aligned; /* signal trampoline */
84};
85
86#endif
87
88/* 62/*
89 * Helper routines 63 * Helper routines
90 */ 64 */
@@ -266,32 +240,6 @@ void __user *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
266 return (void __user *)((sp - frame_size) & (ICACHE_REFILLS_WORKAROUND_WAR ? ~(cpu_icache_line_size()-1) : ALMASK)); 240 return (void __user *)((sp - frame_size) & (ICACHE_REFILLS_WORKAROUND_WAR ? ~(cpu_icache_line_size()-1) : ALMASK));
267} 241}
268 242
269int install_sigtramp(unsigned int __user *tramp, unsigned int syscall)
270{
271 int err;
272
273 /*
274 * Set up the return code ...
275 *
276 * li v0, __NR__foo_sigreturn
277 * syscall
278 */
279
280 err = __put_user(0x24020000 + syscall, tramp + 0);
281 err |= __put_user(0x0000000c , tramp + 1);
282 if (ICACHE_REFILLS_WORKAROUND_WAR) {
283 err |= __put_user(0, tramp + 2);
284 err |= __put_user(0, tramp + 3);
285 err |= __put_user(0, tramp + 4);
286 err |= __put_user(0, tramp + 5);
287 err |= __put_user(0, tramp + 6);
288 err |= __put_user(0, tramp + 7);
289 }
290 flush_cache_sigtramp((unsigned long) tramp);
291
292 return err;
293}
294
295/* 243/*
296 * Atomically swap in the new signal mask, and wait for a signal. 244 * Atomically swap in the new signal mask, and wait for a signal.
297 */ 245 */
@@ -484,8 +432,8 @@ badframe:
484} 432}
485 433
486#ifdef CONFIG_TRAD_SIGNALS 434#ifdef CONFIG_TRAD_SIGNALS
487static int setup_frame(struct k_sigaction * ka, struct pt_regs *regs, 435static int setup_frame(void *sig_return, struct k_sigaction *ka,
488 int signr, sigset_t *set) 436 struct pt_regs *regs, int signr, sigset_t *set)
489{ 437{
490 struct sigframe __user *frame; 438 struct sigframe __user *frame;
491 int err = 0; 439 int err = 0;
@@ -494,8 +442,6 @@ static int setup_frame(struct k_sigaction * ka, struct pt_regs *regs,
494 if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame))) 442 if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame)))
495 goto give_sigsegv; 443 goto give_sigsegv;
496 444
497 err |= install_sigtramp(frame->sf_code, __NR_sigreturn);
498
499 err |= setup_sigcontext(regs, &frame->sf_sc); 445 err |= setup_sigcontext(regs, &frame->sf_sc);
500 err |= __copy_to_user(&frame->sf_mask, set, sizeof(*set)); 446 err |= __copy_to_user(&frame->sf_mask, set, sizeof(*set));
501 if (err) 447 if (err)
@@ -515,7 +461,7 @@ static int setup_frame(struct k_sigaction * ka, struct pt_regs *regs,
515 regs->regs[ 5] = 0; 461 regs->regs[ 5] = 0;
516 regs->regs[ 6] = (unsigned long) &frame->sf_sc; 462 regs->regs[ 6] = (unsigned long) &frame->sf_sc;
517 regs->regs[29] = (unsigned long) frame; 463 regs->regs[29] = (unsigned long) frame;
518 regs->regs[31] = (unsigned long) frame->sf_code; 464 regs->regs[31] = (unsigned long) sig_return;
519 regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler; 465 regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler;
520 466
521 DEBUGP("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%lx\n", 467 DEBUGP("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%lx\n",
@@ -529,8 +475,9 @@ give_sigsegv:
529} 475}
530#endif 476#endif
531 477
532static int setup_rt_frame(struct k_sigaction * ka, struct pt_regs *regs, 478static int setup_rt_frame(void *sig_return, struct k_sigaction *ka,
533 int signr, sigset_t *set, siginfo_t *info) 479 struct pt_regs *regs, int signr, sigset_t *set,
480 siginfo_t *info)
534{ 481{
535 struct rt_sigframe __user *frame; 482 struct rt_sigframe __user *frame;
536 int err = 0; 483 int err = 0;
@@ -539,8 +486,6 @@ static int setup_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
539 if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame))) 486 if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame)))
540 goto give_sigsegv; 487 goto give_sigsegv;
541 488
542 err |= install_sigtramp(frame->rs_code, __NR_rt_sigreturn);
543
544 /* Create siginfo. */ 489 /* Create siginfo. */
545 err |= copy_siginfo_to_user(&frame->rs_info, info); 490 err |= copy_siginfo_to_user(&frame->rs_info, info);
546 491
@@ -573,7 +518,7 @@ static int setup_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
573 regs->regs[ 5] = (unsigned long) &frame->rs_info; 518 regs->regs[ 5] = (unsigned long) &frame->rs_info;
574 regs->regs[ 6] = (unsigned long) &frame->rs_uc; 519 regs->regs[ 6] = (unsigned long) &frame->rs_uc;
575 regs->regs[29] = (unsigned long) frame; 520 regs->regs[29] = (unsigned long) frame;
576 regs->regs[31] = (unsigned long) frame->rs_code; 521 regs->regs[31] = (unsigned long) sig_return;
577 regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler; 522 regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler;
578 523
579 DEBUGP("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%lx\n", 524 DEBUGP("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%lx\n",
@@ -590,8 +535,11 @@ give_sigsegv:
590struct mips_abi mips_abi = { 535struct mips_abi mips_abi = {
591#ifdef CONFIG_TRAD_SIGNALS 536#ifdef CONFIG_TRAD_SIGNALS
592 .setup_frame = setup_frame, 537 .setup_frame = setup_frame,
538 .signal_return_offset = offsetof(struct mips_vdso, signal_trampoline),
593#endif 539#endif
594 .setup_rt_frame = setup_rt_frame, 540 .setup_rt_frame = setup_rt_frame,
541 .rt_signal_return_offset =
542 offsetof(struct mips_vdso, rt_signal_trampoline),
595 .restart = __NR_restart_syscall 543 .restart = __NR_restart_syscall
596}; 544};
597 545
@@ -599,6 +547,8 @@ static int handle_signal(unsigned long sig, siginfo_t *info,
599 struct k_sigaction *ka, sigset_t *oldset, struct pt_regs *regs) 547 struct k_sigaction *ka, sigset_t *oldset, struct pt_regs *regs)
600{ 548{
601 int ret; 549 int ret;
550 struct mips_abi *abi = current->thread.abi;
551 void *vdso = current->mm->context.vdso;
602 552
603 switch(regs->regs[0]) { 553 switch(regs->regs[0]) {
604 case ERESTART_RESTARTBLOCK: 554 case ERESTART_RESTARTBLOCK:
@@ -619,9 +569,11 @@ static int handle_signal(unsigned long sig, siginfo_t *info,
619 regs->regs[0] = 0; /* Don't deal with this again. */ 569 regs->regs[0] = 0; /* Don't deal with this again. */
620 570
621 if (sig_uses_siginfo(ka)) 571 if (sig_uses_siginfo(ka))
622 ret = current->thread.abi->setup_rt_frame(ka, regs, sig, oldset, info); 572 ret = abi->setup_rt_frame(vdso + abi->rt_signal_return_offset,
573 ka, regs, sig, oldset, info);
623 else 574 else
624 ret = current->thread.abi->setup_frame(ka, regs, sig, oldset); 575 ret = abi->setup_frame(vdso + abi->signal_return_offset,
576 ka, regs, sig, oldset);
625 577
626 spin_lock_irq(&current->sighand->siglock); 578 spin_lock_irq(&current->sighand->siglock);
627 sigorsets(&current->blocked, &current->blocked, &ka->sa.sa_mask); 579 sigorsets(&current->blocked, &current->blocked, &ka->sa.sa_mask);
diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c
index 03abaf048f09..a0ed0e052b2e 100644
--- a/arch/mips/kernel/signal32.c
+++ b/arch/mips/kernel/signal32.c
@@ -32,6 +32,7 @@
32#include <asm/system.h> 32#include <asm/system.h>
33#include <asm/fpu.h> 33#include <asm/fpu.h>
34#include <asm/war.h> 34#include <asm/war.h>
35#include <asm/vdso.h>
35 36
36#include "signal-common.h" 37#include "signal-common.h"
37 38
@@ -47,8 +48,6 @@ extern asmlinkage int fpu_emulator_restore_context32(struct sigcontext32 __user
47/* 48/*
48 * Including <asm/unistd.h> would give use the 64-bit syscall numbers ... 49 * Including <asm/unistd.h> would give use the 64-bit syscall numbers ...
49 */ 50 */
50#define __NR_O32_sigreturn 4119
51#define __NR_O32_rt_sigreturn 4193
52#define __NR_O32_restart_syscall 4253 51#define __NR_O32_restart_syscall 4253
53 52
54/* 32-bit compatibility types */ 53/* 32-bit compatibility types */
@@ -77,47 +76,20 @@ struct ucontext32 {
77 compat_sigset_t uc_sigmask; /* mask last for extensibility */ 76 compat_sigset_t uc_sigmask; /* mask last for extensibility */
78}; 77};
79 78
80/*
81 * Horribly complicated - with the bloody RM9000 workarounds enabled
82 * the signal trampolines is moving to the end of the structure so we can
83 * increase the alignment without breaking software compatibility.
84 */
85#if ICACHE_REFILLS_WORKAROUND_WAR == 0
86
87struct sigframe32 { 79struct sigframe32 {
88 u32 sf_ass[4]; /* argument save space for o32 */ 80 u32 sf_ass[4]; /* argument save space for o32 */
89 u32 sf_code[2]; /* signal trampoline */ 81 u32 sf_pad[2]; /* Was: signal trampoline */
90 struct sigcontext32 sf_sc; 82 struct sigcontext32 sf_sc;
91 compat_sigset_t sf_mask; 83 compat_sigset_t sf_mask;
92}; 84};
93 85
94struct rt_sigframe32 { 86struct rt_sigframe32 {
95 u32 rs_ass[4]; /* argument save space for o32 */ 87 u32 rs_ass[4]; /* argument save space for o32 */
96 u32 rs_code[2]; /* signal trampoline */ 88 u32 rs_pad[2]; /* Was: signal trampoline */
97 compat_siginfo_t rs_info; 89 compat_siginfo_t rs_info;
98 struct ucontext32 rs_uc; 90 struct ucontext32 rs_uc;
99}; 91};
100 92
101#else /* ICACHE_REFILLS_WORKAROUND_WAR */
102
103struct sigframe32 {
104 u32 sf_ass[4]; /* argument save space for o32 */
105 u32 sf_pad[2];
106 struct sigcontext32 sf_sc; /* hw context */
107 compat_sigset_t sf_mask;
108 u32 sf_code[8] ____cacheline_aligned; /* signal trampoline */
109};
110
111struct rt_sigframe32 {
112 u32 rs_ass[4]; /* argument save space for o32 */
113 u32 rs_pad[2];
114 compat_siginfo_t rs_info;
115 struct ucontext32 rs_uc;
116 u32 rs_code[8] __attribute__((aligned(32))); /* signal trampoline */
117};
118
119#endif /* !ICACHE_REFILLS_WORKAROUND_WAR */
120
121/* 93/*
122 * sigcontext handlers 94 * sigcontext handlers
123 */ 95 */
@@ -598,8 +570,8 @@ badframe:
598 force_sig(SIGSEGV, current); 570 force_sig(SIGSEGV, current);
599} 571}
600 572
601static int setup_frame_32(struct k_sigaction * ka, struct pt_regs *regs, 573static int setup_frame_32(void *sig_return, struct k_sigaction *ka,
602 int signr, sigset_t *set) 574 struct pt_regs *regs, int signr, sigset_t *set)
603{ 575{
604 struct sigframe32 __user *frame; 576 struct sigframe32 __user *frame;
605 int err = 0; 577 int err = 0;
@@ -608,8 +580,6 @@ static int setup_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
608 if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame))) 580 if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame)))
609 goto give_sigsegv; 581 goto give_sigsegv;
610 582
611 err |= install_sigtramp(frame->sf_code, __NR_O32_sigreturn);
612
613 err |= setup_sigcontext32(regs, &frame->sf_sc); 583 err |= setup_sigcontext32(regs, &frame->sf_sc);
614 err |= __copy_conv_sigset_to_user(&frame->sf_mask, set); 584 err |= __copy_conv_sigset_to_user(&frame->sf_mask, set);
615 585
@@ -630,7 +600,7 @@ static int setup_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
630 regs->regs[ 5] = 0; 600 regs->regs[ 5] = 0;
631 regs->regs[ 6] = (unsigned long) &frame->sf_sc; 601 regs->regs[ 6] = (unsigned long) &frame->sf_sc;
632 regs->regs[29] = (unsigned long) frame; 602 regs->regs[29] = (unsigned long) frame;
633 regs->regs[31] = (unsigned long) frame->sf_code; 603 regs->regs[31] = (unsigned long) sig_return;
634 regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler; 604 regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler;
635 605
636 DEBUGP("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%lx\n", 606 DEBUGP("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%lx\n",
@@ -644,8 +614,9 @@ give_sigsegv:
644 return -EFAULT; 614 return -EFAULT;
645} 615}
646 616
647static int setup_rt_frame_32(struct k_sigaction * ka, struct pt_regs *regs, 617static int setup_rt_frame_32(void *sig_return, struct k_sigaction *ka,
648 int signr, sigset_t *set, siginfo_t *info) 618 struct pt_regs *regs, int signr, sigset_t *set,
619 siginfo_t *info)
649{ 620{
650 struct rt_sigframe32 __user *frame; 621 struct rt_sigframe32 __user *frame;
651 int err = 0; 622 int err = 0;
@@ -655,8 +626,6 @@ static int setup_rt_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
655 if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame))) 626 if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame)))
656 goto give_sigsegv; 627 goto give_sigsegv;
657 628
658 err |= install_sigtramp(frame->rs_code, __NR_O32_rt_sigreturn);
659
660 /* Convert (siginfo_t -> compat_siginfo_t) and copy to user. */ 629 /* Convert (siginfo_t -> compat_siginfo_t) and copy to user. */
661 err |= copy_siginfo_to_user32(&frame->rs_info, info); 630 err |= copy_siginfo_to_user32(&frame->rs_info, info);
662 631
@@ -690,7 +659,7 @@ static int setup_rt_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
690 regs->regs[ 5] = (unsigned long) &frame->rs_info; 659 regs->regs[ 5] = (unsigned long) &frame->rs_info;
691 regs->regs[ 6] = (unsigned long) &frame->rs_uc; 660 regs->regs[ 6] = (unsigned long) &frame->rs_uc;
692 regs->regs[29] = (unsigned long) frame; 661 regs->regs[29] = (unsigned long) frame;
693 regs->regs[31] = (unsigned long) frame->rs_code; 662 regs->regs[31] = (unsigned long) sig_return;
694 regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler; 663 regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler;
695 664
696 DEBUGP("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%lx\n", 665 DEBUGP("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%lx\n",
@@ -709,7 +678,11 @@ give_sigsegv:
709 */ 678 */
710struct mips_abi mips_abi_32 = { 679struct mips_abi mips_abi_32 = {
711 .setup_frame = setup_frame_32, 680 .setup_frame = setup_frame_32,
681 .signal_return_offset =
682 offsetof(struct mips_vdso, o32_signal_trampoline),
712 .setup_rt_frame = setup_rt_frame_32, 683 .setup_rt_frame = setup_rt_frame_32,
684 .rt_signal_return_offset =
685 offsetof(struct mips_vdso, o32_rt_signal_trampoline),
713 .restart = __NR_O32_restart_syscall 686 .restart = __NR_O32_restart_syscall
714}; 687};
715 688
diff --git a/arch/mips/kernel/signal_n32.c b/arch/mips/kernel/signal_n32.c
index bb277e82d421..2c5df818c65a 100644
--- a/arch/mips/kernel/signal_n32.c
+++ b/arch/mips/kernel/signal_n32.c
@@ -39,13 +39,13 @@
39#include <asm/fpu.h> 39#include <asm/fpu.h>
40#include <asm/cpu-features.h> 40#include <asm/cpu-features.h>
41#include <asm/war.h> 41#include <asm/war.h>
42#include <asm/vdso.h>
42 43
43#include "signal-common.h" 44#include "signal-common.h"
44 45
45/* 46/*
46 * Including <asm/unistd.h> would give use the 64-bit syscall numbers ... 47 * Including <asm/unistd.h> would give use the 64-bit syscall numbers ...
47 */ 48 */
48#define __NR_N32_rt_sigreturn 6211
49#define __NR_N32_restart_syscall 6214 49#define __NR_N32_restart_syscall 6214
50 50
51extern int setup_sigcontext(struct pt_regs *, struct sigcontext __user *); 51extern int setup_sigcontext(struct pt_regs *, struct sigcontext __user *);
@@ -67,27 +67,13 @@ struct ucontextn32 {
67 compat_sigset_t uc_sigmask; /* mask last for extensibility */ 67 compat_sigset_t uc_sigmask; /* mask last for extensibility */
68}; 68};
69 69
70#if ICACHE_REFILLS_WORKAROUND_WAR == 0
71
72struct rt_sigframe_n32 {
73 u32 rs_ass[4]; /* argument save space for o32 */
74 u32 rs_code[2]; /* signal trampoline */
75 struct compat_siginfo rs_info;
76 struct ucontextn32 rs_uc;
77};
78
79#else /* ICACHE_REFILLS_WORKAROUND_WAR */
80
81struct rt_sigframe_n32 { 70struct rt_sigframe_n32 {
82 u32 rs_ass[4]; /* argument save space for o32 */ 71 u32 rs_ass[4]; /* argument save space for o32 */
83 u32 rs_pad[2]; 72 u32 rs_pad[2]; /* Was: signal trampoline */
84 struct compat_siginfo rs_info; 73 struct compat_siginfo rs_info;
85 struct ucontextn32 rs_uc; 74 struct ucontextn32 rs_uc;
86 u32 rs_code[8] ____cacheline_aligned; /* signal trampoline */
87}; 75};
88 76
89#endif /* !ICACHE_REFILLS_WORKAROUND_WAR */
90
91extern void sigset_from_compat(sigset_t *set, compat_sigset_t *compat); 77extern void sigset_from_compat(sigset_t *set, compat_sigset_t *compat);
92 78
93asmlinkage int sysn32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs) 79asmlinkage int sysn32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
@@ -173,7 +159,7 @@ badframe:
173 force_sig(SIGSEGV, current); 159 force_sig(SIGSEGV, current);
174} 160}
175 161
176static int setup_rt_frame_n32(struct k_sigaction * ka, 162static int setup_rt_frame_n32(void *sig_return, struct k_sigaction *ka,
177 struct pt_regs *regs, int signr, sigset_t *set, siginfo_t *info) 163 struct pt_regs *regs, int signr, sigset_t *set, siginfo_t *info)
178{ 164{
179 struct rt_sigframe_n32 __user *frame; 165 struct rt_sigframe_n32 __user *frame;
@@ -184,8 +170,6 @@ static int setup_rt_frame_n32(struct k_sigaction * ka,
184 if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame))) 170 if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame)))
185 goto give_sigsegv; 171 goto give_sigsegv;
186 172
187 install_sigtramp(frame->rs_code, __NR_N32_rt_sigreturn);
188
189 /* Create siginfo. */ 173 /* Create siginfo. */
190 err |= copy_siginfo_to_user32(&frame->rs_info, info); 174 err |= copy_siginfo_to_user32(&frame->rs_info, info);
191 175
@@ -219,7 +203,7 @@ static int setup_rt_frame_n32(struct k_sigaction * ka,
219 regs->regs[ 5] = (unsigned long) &frame->rs_info; 203 regs->regs[ 5] = (unsigned long) &frame->rs_info;
220 regs->regs[ 6] = (unsigned long) &frame->rs_uc; 204 regs->regs[ 6] = (unsigned long) &frame->rs_uc;
221 regs->regs[29] = (unsigned long) frame; 205 regs->regs[29] = (unsigned long) frame;
222 regs->regs[31] = (unsigned long) frame->rs_code; 206 regs->regs[31] = (unsigned long) sig_return;
223 regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler; 207 regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler;
224 208
225 DEBUGP("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%lx\n", 209 DEBUGP("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%lx\n",
@@ -235,5 +219,7 @@ give_sigsegv:
235 219
236struct mips_abi mips_abi_n32 = { 220struct mips_abi mips_abi_n32 = {
237 .setup_rt_frame = setup_rt_frame_n32, 221 .setup_rt_frame = setup_rt_frame_n32,
222 .rt_signal_return_offset =
223 offsetof(struct mips_vdso, n32_rt_signal_trampoline),
238 .restart = __NR_N32_restart_syscall 224 .restart = __NR_N32_restart_syscall
239}; 225};
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 25e825aea327..a95dea5459c4 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -182,7 +182,7 @@ static int vpemask[2][8] = {
182 {0, 0, 0, 0, 0, 0, 0, 1} 182 {0, 0, 0, 0, 0, 0, 0, 1}
183}; 183};
184int tcnoprog[NR_CPUS]; 184int tcnoprog[NR_CPUS];
185static atomic_t idle_hook_initialized = {0}; 185static atomic_t idle_hook_initialized = ATOMIC_INIT(0);
186static int clock_hang_reported[NR_CPUS]; 186static int clock_hang_reported[NR_CPUS];
187 187
188#endif /* CONFIG_SMTC_IDLE_HOOK_DEBUG */ 188#endif /* CONFIG_SMTC_IDLE_HOOK_DEBUG */
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 9587abc67f35..dd81b0f87518 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -79,7 +79,11 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
79 int do_color_align; 79 int do_color_align;
80 unsigned long task_size; 80 unsigned long task_size;
81 81
82 task_size = STACK_TOP; 82#ifdef CONFIG_32BIT
83 task_size = TASK_SIZE;
84#else /* Must be CONFIG_64BIT*/
85 task_size = test_thread_flag(TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE;
86#endif
83 87
84 if (len > task_size) 88 if (len > task_size)
85 return -ENOMEM; 89 return -ENOMEM;
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 4e00f9bc23ee..1a4dd657ccb9 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1599,7 +1599,7 @@ void __init trap_init(void)
1599 ebase = (unsigned long) 1599 ebase = (unsigned long)
1600 __alloc_bootmem(size, 1 << fls(size), 0); 1600 __alloc_bootmem(size, 1 << fls(size), 0);
1601 } else { 1601 } else {
1602 ebase = CAC_BASE; 1602 ebase = CKSEG0;
1603 if (cpu_has_mips_r2) 1603 if (cpu_has_mips_r2)
1604 ebase += (read_c0_ebase() & 0x3ffff000); 1604 ebase += (read_c0_ebase() & 0x3ffff000);
1605 } 1605 }
diff --git a/arch/mips/kernel/vdso.c b/arch/mips/kernel/vdso.c
new file mode 100644
index 000000000000..b773c1112b14
--- /dev/null
+++ b/arch/mips/kernel/vdso.c
@@ -0,0 +1,112 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2009, 2010 Cavium Networks, Inc.
7 */
8
9
10#include <linux/kernel.h>
11#include <linux/err.h>
12#include <linux/sched.h>
13#include <linux/mm.h>
14#include <linux/init.h>
15#include <linux/binfmts.h>
16#include <linux/elf.h>
17#include <linux/vmalloc.h>
18#include <linux/unistd.h>
19
20#include <asm/vdso.h>
21#include <asm/uasm.h>
22
23/*
24 * Including <asm/unistd.h> would give use the 64-bit syscall numbers ...
25 */
26#define __NR_O32_sigreturn 4119
27#define __NR_O32_rt_sigreturn 4193
28#define __NR_N32_rt_sigreturn 6211
29
30static struct page *vdso_page;
31
32static void __init install_trampoline(u32 *tramp, unsigned int sigreturn)
33{
34 uasm_i_addiu(&tramp, 2, 0, sigreturn); /* li v0, sigreturn */
35 uasm_i_syscall(&tramp, 0);
36}
37
38static int __init init_vdso(void)
39{
40 struct mips_vdso *vdso;
41
42 vdso_page = alloc_page(GFP_KERNEL);
43 if (!vdso_page)
44 panic("Cannot allocate vdso");
45
46 vdso = vmap(&vdso_page, 1, 0, PAGE_KERNEL);
47 if (!vdso)
48 panic("Cannot map vdso");
49 clear_page(vdso);
50
51 install_trampoline(vdso->rt_signal_trampoline, __NR_rt_sigreturn);
52#ifdef CONFIG_32BIT
53 install_trampoline(vdso->signal_trampoline, __NR_sigreturn);
54#else
55 install_trampoline(vdso->n32_rt_signal_trampoline,
56 __NR_N32_rt_sigreturn);
57 install_trampoline(vdso->o32_signal_trampoline, __NR_O32_sigreturn);
58 install_trampoline(vdso->o32_rt_signal_trampoline,
59 __NR_O32_rt_sigreturn);
60#endif
61
62 vunmap(vdso);
63
64 pr_notice("init_vdso successfull\n");
65
66 return 0;
67}
68device_initcall(init_vdso);
69
70static unsigned long vdso_addr(unsigned long start)
71{
72 return STACK_TOP;
73}
74
75int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
76{
77 int ret;
78 unsigned long addr;
79 struct mm_struct *mm = current->mm;
80
81 down_write(&mm->mmap_sem);
82
83 addr = vdso_addr(mm->start_stack);
84
85 addr = get_unmapped_area(NULL, addr, PAGE_SIZE, 0, 0);
86 if (IS_ERR_VALUE(addr)) {
87 ret = addr;
88 goto up_fail;
89 }
90
91 ret = install_special_mapping(mm, addr, PAGE_SIZE,
92 VM_READ|VM_EXEC|
93 VM_MAYREAD|VM_MAYWRITE|VM_MAYEXEC|
94 VM_ALWAYSDUMP,
95 &vdso_page);
96
97 if (ret)
98 goto up_fail;
99
100 mm->context.vdso = (void *)addr;
101
102up_fail:
103 up_write(&mm->mmap_sem);
104 return ret;
105}
106
107const char *arch_vma_name(struct vm_area_struct *vma)
108{
109 if (vma->vm_mm && vma->vm_start == (long)vma->vm_mm->context.vdso)
110 return "[vdso]";
111 return NULL;
112}
diff --git a/arch/mips/lib/delay.c b/arch/mips/lib/delay.c
index 6b3b1de9dcae..5995969e8c42 100644
--- a/arch/mips/lib/delay.c
+++ b/arch/mips/lib/delay.c
@@ -41,7 +41,7 @@ EXPORT_SYMBOL(__delay);
41 41
42void __udelay(unsigned long us) 42void __udelay(unsigned long us)
43{ 43{
44 unsigned int lpj = current_cpu_data.udelay_val; 44 unsigned int lpj = raw_current_cpu_data.udelay_val;
45 45
46 __delay((us * 0x000010c7ull * HZ * lpj) >> 32); 46 __delay((us * 0x000010c7ull * HZ * lpj) >> 32);
47} 47}
@@ -49,7 +49,7 @@ EXPORT_SYMBOL(__udelay);
49 49
50void __ndelay(unsigned long ns) 50void __ndelay(unsigned long ns)
51{ 51{
52 unsigned int lpj = current_cpu_data.udelay_val; 52 unsigned int lpj = raw_current_cpu_data.udelay_val;
53 53
54 __delay((ns * 0x00000005ull * HZ * lpj) >> 32); 54 __delay((ns * 0x00000005ull * HZ * lpj) >> 32);
55} 55}
diff --git a/arch/mips/lib/libgcc.h b/arch/mips/lib/libgcc.h
index 3f19d1c5d942..05909d58e2fe 100644
--- a/arch/mips/lib/libgcc.h
+++ b/arch/mips/lib/libgcc.h
@@ -17,8 +17,7 @@ struct DWstruct {
17#error I feel sick. 17#error I feel sick.
18#endif 18#endif
19 19
20typedef union 20typedef union {
21{
22 struct DWstruct s; 21 struct DWstruct s;
23 long long ll; 22 long long ll;
24} DWunion; 23} DWunion;
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index be8627bc5b02..12af739048fa 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -133,7 +133,7 @@ void __update_cache(struct vm_area_struct *vma, unsigned long address,
133} 133}
134 134
135unsigned long _page_cachable_default; 135unsigned long _page_cachable_default;
136EXPORT_SYMBOL_GPL(_page_cachable_default); 136EXPORT_SYMBOL(_page_cachable_default);
137 137
138static inline void setup_protection_map(void) 138static inline void setup_protection_map(void)
139{ 139{
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 0de0e4127d66..d1f68aadbc4c 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -788,10 +788,15 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
788 * create the plain linear handler 788 * create the plain linear handler
789 */ 789 */
790 if (bcm1250_m3_war()) { 790 if (bcm1250_m3_war()) {
791 UASM_i_MFC0(&p, K0, C0_BADVADDR); 791 unsigned int segbits = 44;
792 UASM_i_MFC0(&p, K1, C0_ENTRYHI); 792
793 uasm_i_dmfc0(&p, K0, C0_BADVADDR);
794 uasm_i_dmfc0(&p, K1, C0_ENTRYHI);
793 uasm_i_xor(&p, K0, K0, K1); 795 uasm_i_xor(&p, K0, K0, K1);
794 UASM_i_SRL(&p, K0, K0, PAGE_SHIFT + 1); 796 uasm_i_dsrl32(&p, K1, K0, 62 - 32);
797 uasm_i_dsrl(&p, K0, K0, 12 + 1);
798 uasm_i_dsll32(&p, K0, K0, 64 + 12 + 1 - segbits - 32);
799 uasm_i_or(&p, K0, K0, K1);
795 uasm_il_bnez(&p, &r, K0, label_leave); 800 uasm_il_bnez(&p, &r, K0, label_leave);
796 /* No need for uasm_i_nop */ 801 /* No need for uasm_i_nop */
797 } 802 }
@@ -1312,10 +1317,15 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
1312 memset(relocs, 0, sizeof(relocs)); 1317 memset(relocs, 0, sizeof(relocs));
1313 1318
1314 if (bcm1250_m3_war()) { 1319 if (bcm1250_m3_war()) {
1315 UASM_i_MFC0(&p, K0, C0_BADVADDR); 1320 unsigned int segbits = 44;
1316 UASM_i_MFC0(&p, K1, C0_ENTRYHI); 1321
1322 uasm_i_dmfc0(&p, K0, C0_BADVADDR);
1323 uasm_i_dmfc0(&p, K1, C0_ENTRYHI);
1317 uasm_i_xor(&p, K0, K0, K1); 1324 uasm_i_xor(&p, K0, K0, K1);
1318 UASM_i_SRL(&p, K0, K0, PAGE_SHIFT + 1); 1325 uasm_i_dsrl32(&p, K1, K0, 62 - 32);
1326 uasm_i_dsrl(&p, K0, K0, 12 + 1);
1327 uasm_i_dsll32(&p, K0, K0, 64 + 12 + 1 - segbits - 32);
1328 uasm_i_or(&p, K0, K0, K1);
1319 uasm_il_bnez(&p, &r, K0, label_leave); 1329 uasm_il_bnez(&p, &r, K0, label_leave);
1320 /* No need for uasm_i_nop */ 1330 /* No need for uasm_i_nop */
1321 } 1331 }
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c
index 1581e9852461..611d564fdcf1 100644
--- a/arch/mips/mm/uasm.c
+++ b/arch/mips/mm/uasm.c
@@ -31,7 +31,8 @@ enum fields {
31 BIMM = 0x040, 31 BIMM = 0x040,
32 JIMM = 0x080, 32 JIMM = 0x080,
33 FUNC = 0x100, 33 FUNC = 0x100,
34 SET = 0x200 34 SET = 0x200,
35 SCIMM = 0x400
35}; 36};
36 37
37#define OP_MASK 0x3f 38#define OP_MASK 0x3f
@@ -52,6 +53,8 @@ enum fields {
52#define FUNC_SH 0 53#define FUNC_SH 0
53#define SET_MASK 0x7 54#define SET_MASK 0x7
54#define SET_SH 0 55#define SET_SH 0
56#define SCIMM_MASK 0xfffff
57#define SCIMM_SH 6
55 58
56enum opcode { 59enum opcode {
57 insn_invalid, 60 insn_invalid,
@@ -61,10 +64,10 @@ enum opcode {
61 insn_dmtc0, insn_dsll, insn_dsll32, insn_dsra, insn_dsrl, 64 insn_dmtc0, insn_dsll, insn_dsll32, insn_dsra, insn_dsrl,
62 insn_dsrl32, insn_drotr, insn_dsubu, insn_eret, insn_j, insn_jal, 65 insn_dsrl32, insn_drotr, insn_dsubu, insn_eret, insn_j, insn_jal,
63 insn_jr, insn_ld, insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0, 66 insn_jr, insn_ld, insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0,
64 insn_mtc0, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd, 67 insn_mtc0, insn_or, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd,
65 insn_sd, insn_sll, insn_sra, insn_srl, insn_rotr, insn_subu, insn_sw, 68 insn_sd, insn_sll, insn_sra, insn_srl, insn_rotr, insn_subu, insn_sw,
66 insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori, 69 insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori,
67 insn_dins 70 insn_dins, insn_syscall
68}; 71};
69 72
70struct insn { 73struct insn {
@@ -117,6 +120,7 @@ static struct insn insn_table[] __cpuinitdata = {
117 { insn_lw, M(lw_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 120 { insn_lw, M(lw_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
118 { insn_mfc0, M(cop0_op, mfc_op, 0, 0, 0, 0), RT | RD | SET}, 121 { insn_mfc0, M(cop0_op, mfc_op, 0, 0, 0, 0), RT | RD | SET},
119 { insn_mtc0, M(cop0_op, mtc_op, 0, 0, 0, 0), RT | RD | SET}, 122 { insn_mtc0, M(cop0_op, mtc_op, 0, 0, 0, 0), RT | RD | SET},
123 { insn_or, M(spec_op, 0, 0, 0, 0, or_op), RS | RT | RD },
120 { insn_ori, M(ori_op, 0, 0, 0, 0, 0), RS | RT | UIMM }, 124 { insn_ori, M(ori_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
121 { insn_pref, M(pref_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 125 { insn_pref, M(pref_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
122 { insn_rfe, M(cop0_op, cop_op, 0, 0, 0, rfe_op), 0 }, 126 { insn_rfe, M(cop0_op, cop_op, 0, 0, 0, rfe_op), 0 },
@@ -136,6 +140,7 @@ static struct insn insn_table[] __cpuinitdata = {
136 { insn_xor, M(spec_op, 0, 0, 0, 0, xor_op), RS | RT | RD }, 140 { insn_xor, M(spec_op, 0, 0, 0, 0, xor_op), RS | RT | RD },
137 { insn_xori, M(xori_op, 0, 0, 0, 0, 0), RS | RT | UIMM }, 141 { insn_xori, M(xori_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
138 { insn_dins, M(spec3_op, 0, 0, 0, 0, dins_op), RS | RT | RD | RE }, 142 { insn_dins, M(spec3_op, 0, 0, 0, 0, dins_op), RS | RT | RD | RE },
143 { insn_syscall, M(spec_op, 0, 0, 0, 0, syscall_op), SCIMM},
139 { insn_invalid, 0, 0 } 144 { insn_invalid, 0, 0 }
140}; 145};
141 146
@@ -208,6 +213,14 @@ static inline __cpuinit u32 build_jimm(u32 arg)
208 return (arg >> 2) & JIMM_MASK; 213 return (arg >> 2) & JIMM_MASK;
209} 214}
210 215
216static inline __cpuinit u32 build_scimm(u32 arg)
217{
218 if (arg & ~SCIMM_MASK)
219 printk(KERN_WARNING "Micro-assembler field overflow\n");
220
221 return (arg & SCIMM_MASK) << SCIMM_SH;
222}
223
211static inline __cpuinit u32 build_func(u32 arg) 224static inline __cpuinit u32 build_func(u32 arg)
212{ 225{
213 if (arg & ~FUNC_MASK) 226 if (arg & ~FUNC_MASK)
@@ -266,6 +279,8 @@ static void __cpuinit build_insn(u32 **buf, enum opcode opc, ...)
266 op |= build_func(va_arg(ap, u32)); 279 op |= build_func(va_arg(ap, u32));
267 if (ip->fields & SET) 280 if (ip->fields & SET)
268 op |= build_set(va_arg(ap, u32)); 281 op |= build_set(va_arg(ap, u32));
282 if (ip->fields & SCIMM)
283 op |= build_scimm(va_arg(ap, u32));
269 va_end(ap); 284 va_end(ap);
270 285
271 **buf = op; 286 **buf = op;
@@ -373,6 +388,7 @@ I_u2s3u1(_lw)
373I_u1u2u3(_mfc0) 388I_u1u2u3(_mfc0)
374I_u1u2u3(_mtc0) 389I_u1u2u3(_mtc0)
375I_u2u1u3(_ori) 390I_u2u1u3(_ori)
391I_u3u1u2(_or)
376I_u2s3u1(_pref) 392I_u2s3u1(_pref)
377I_0(_rfe) 393I_0(_rfe)
378I_u2s3u1(_sc) 394I_u2s3u1(_sc)
@@ -391,6 +407,7 @@ I_0(_tlbwr)
391I_u3u1u2(_xor) 407I_u3u1u2(_xor)
392I_u2u1u3(_xori) 408I_u2u1u3(_xori)
393I_u2u1msbu3(_dins); 409I_u2u1msbu3(_dins);
410I_u1(_syscall);
394 411
395/* Handle labels. */ 412/* Handle labels. */
396void __cpuinit uasm_build_label(struct uasm_label **lab, u32 *addr, int lid) 413void __cpuinit uasm_build_label(struct uasm_label **lab, u32 *addr, int lid)
diff --git a/arch/mips/pci/ops-loongson2.c b/arch/mips/pci/ops-loongson2.c
index 2bb4057bf6c7..d657ee0bc131 100644
--- a/arch/mips/pci/ops-loongson2.c
+++ b/arch/mips/pci/ops-loongson2.c
@@ -180,15 +180,21 @@ struct pci_ops loongson_pci_ops = {
180}; 180};
181 181
182#ifdef CONFIG_CS5536 182#ifdef CONFIG_CS5536
183DEFINE_RAW_SPINLOCK(msr_lock);
184
183void _rdmsr(u32 msr, u32 *hi, u32 *lo) 185void _rdmsr(u32 msr, u32 *hi, u32 *lo)
184{ 186{
185 struct pci_bus bus = { 187 struct pci_bus bus = {
186 .number = PCI_BUS_CS5536 188 .number = PCI_BUS_CS5536
187 }; 189 };
188 u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0); 190 u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
191 unsigned long flags;
192
193 raw_spin_lock_irqsave(&msr_lock, flags);
189 loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr); 194 loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
190 loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_LO, 4, lo); 195 loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_LO, 4, lo);
191 loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_HI, 4, hi); 196 loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_HI, 4, hi);
197 raw_spin_unlock_irqrestore(&msr_lock, flags);
192} 198}
193EXPORT_SYMBOL(_rdmsr); 199EXPORT_SYMBOL(_rdmsr);
194 200
@@ -198,9 +204,13 @@ void _wrmsr(u32 msr, u32 hi, u32 lo)
198 .number = PCI_BUS_CS5536 204 .number = PCI_BUS_CS5536
199 }; 205 };
200 u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0); 206 u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
207 unsigned long flags;
208
209 raw_spin_lock_irqsave(&msr_lock, flags);
201 loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr); 210 loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
202 loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_LO, 4, lo); 211 loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_LO, 4, lo);
203 loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_HI, 4, hi); 212 loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_HI, 4, hi);
213 raw_spin_unlock_irqrestore(&msr_lock, flags);
204} 214}
205EXPORT_SYMBOL(_wrmsr); 215EXPORT_SYMBOL(_wrmsr);
206#endif 216#endif
diff --git a/arch/mips/sibyte/sb1250/setup.c b/arch/mips/sibyte/sb1250/setup.c
index 0444da1e23c2..92da3155ce07 100644
--- a/arch/mips/sibyte/sb1250/setup.c
+++ b/arch/mips/sibyte/sb1250/setup.c
@@ -87,6 +87,21 @@ static int __init setup_bcm1250(void)
87 return ret; 87 return ret;
88} 88}
89 89
90int sb1250_m3_workaround_needed(void)
91{
92 switch (soc_type) {
93 case K_SYS_SOC_TYPE_BCM1250:
94 case K_SYS_SOC_TYPE_BCM1250_ALT:
95 case K_SYS_SOC_TYPE_BCM1250_ALT2:
96 case K_SYS_SOC_TYPE_BCM1125:
97 case K_SYS_SOC_TYPE_BCM1125H:
98 return soc_pass < K_SYS_REVISION_BCM1250_C0;
99
100 default:
101 return 0;
102 }
103}
104
90static int __init setup_bcm112x(void) 105static int __init setup_bcm112x(void)
91{ 106{
92 int ret = 0; 107 int ret = 0;
diff --git a/drivers/ssb/driver_pcicore.c b/drivers/ssb/driver_pcicore.c
index f1dcd7969a5c..0e8d35224614 100644
--- a/drivers/ssb/driver_pcicore.c
+++ b/drivers/ssb/driver_pcicore.c
@@ -246,20 +246,12 @@ static struct pci_controller ssb_pcicore_controller = {
246 .pci_ops = &ssb_pcicore_pciops, 246 .pci_ops = &ssb_pcicore_pciops,
247 .io_resource = &ssb_pcicore_io_resource, 247 .io_resource = &ssb_pcicore_io_resource,
248 .mem_resource = &ssb_pcicore_mem_resource, 248 .mem_resource = &ssb_pcicore_mem_resource,
249 .mem_offset = 0x24000000,
250}; 249};
251 250
252static u32 ssb_pcicore_pcibus_iobase = 0x100;
253static u32 ssb_pcicore_pcibus_membase = SSB_PCI_DMA;
254
255/* This function is called when doing a pci_enable_device(). 251/* This function is called when doing a pci_enable_device().
256 * We must first check if the device is a device on the PCI-core bridge. */ 252 * We must first check if the device is a device on the PCI-core bridge. */
257int ssb_pcicore_plat_dev_init(struct pci_dev *d) 253int ssb_pcicore_plat_dev_init(struct pci_dev *d)
258{ 254{
259 struct resource *res;
260 int pos, size;
261 u32 *base;
262
263 if (d->bus->ops != &ssb_pcicore_pciops) { 255 if (d->bus->ops != &ssb_pcicore_pciops) {
264 /* This is not a device on the PCI-core bridge. */ 256 /* This is not a device on the PCI-core bridge. */
265 return -ENODEV; 257 return -ENODEV;
@@ -268,27 +260,6 @@ int ssb_pcicore_plat_dev_init(struct pci_dev *d)
268 ssb_printk(KERN_INFO "PCI: Fixing up device %s\n", 260 ssb_printk(KERN_INFO "PCI: Fixing up device %s\n",
269 pci_name(d)); 261 pci_name(d));
270 262
271 /* Fix up resource bases */
272 for (pos = 0; pos < 6; pos++) {
273 res = &d->resource[pos];
274 if (res->flags & IORESOURCE_IO)
275 base = &ssb_pcicore_pcibus_iobase;
276 else
277 base = &ssb_pcicore_pcibus_membase;
278 res->flags |= IORESOURCE_PCI_FIXED;
279 if (res->end) {
280 size = res->end - res->start + 1;
281 if (*base & (size - 1))
282 *base = (*base + size) & ~(size - 1);
283 res->start = *base;
284 res->end = res->start + size - 1;
285 *base += size;
286 pci_write_config_dword(d, PCI_BASE_ADDRESS_0 + (pos << 2), res->start);
287 }
288 /* Fix up PCI bridge BAR0 only */
289 if (d->bus->number == 0 && PCI_SLOT(d->devfn) == 0)
290 break;
291 }
292 /* Fix up interrupt lines */ 263 /* Fix up interrupt lines */
293 d->irq = ssb_mips_irq(extpci_core->dev) + 2; 264 d->irq = ssb_mips_irq(extpci_core->dev) + 2;
294 pci_write_config_byte(d, PCI_INTERRUPT_LINE, d->irq); 265 pci_write_config_byte(d, PCI_INTERRUPT_LINE, d->irq);
diff --git a/fs/btrfs/extent-tree.c b/fs/btrfs/extent-tree.c
index 9e23ffea7f54..b34d32fdaaec 100644
--- a/fs/btrfs/extent-tree.c
+++ b/fs/btrfs/extent-tree.c
@@ -3235,7 +3235,8 @@ int btrfs_check_data_free_space(struct btrfs_root *root, struct inode *inode,
3235 u64 bytes) 3235 u64 bytes)
3236{ 3236{
3237 struct btrfs_space_info *data_sinfo; 3237 struct btrfs_space_info *data_sinfo;
3238 int ret = 0, committed = 0; 3238 u64 used;
3239 int ret = 0, committed = 0, flushed = 0;
3239 3240
3240 /* make sure bytes are sectorsize aligned */ 3241 /* make sure bytes are sectorsize aligned */
3241 bytes = (bytes + root->sectorsize - 1) & ~((u64)root->sectorsize - 1); 3242 bytes = (bytes + root->sectorsize - 1) & ~((u64)root->sectorsize - 1);
@@ -3247,12 +3248,21 @@ int btrfs_check_data_free_space(struct btrfs_root *root, struct inode *inode,
3247again: 3248again:
3248 /* make sure we have enough space to handle the data first */ 3249 /* make sure we have enough space to handle the data first */
3249 spin_lock(&data_sinfo->lock); 3250 spin_lock(&data_sinfo->lock);
3250 if (data_sinfo->total_bytes - data_sinfo->bytes_used - 3251 used = data_sinfo->bytes_used + data_sinfo->bytes_delalloc +
3251 data_sinfo->bytes_delalloc - data_sinfo->bytes_reserved - 3252 data_sinfo->bytes_reserved + data_sinfo->bytes_pinned +
3252 data_sinfo->bytes_pinned - data_sinfo->bytes_readonly - 3253 data_sinfo->bytes_readonly + data_sinfo->bytes_may_use +
3253 data_sinfo->bytes_may_use - data_sinfo->bytes_super < bytes) { 3254 data_sinfo->bytes_super;
3255
3256 if (used + bytes > data_sinfo->total_bytes) {
3254 struct btrfs_trans_handle *trans; 3257 struct btrfs_trans_handle *trans;
3255 3258
3259 if (!flushed) {
3260 spin_unlock(&data_sinfo->lock);
3261 flush_delalloc(root, data_sinfo);
3262 flushed = 1;
3263 goto again;
3264 }
3265
3256 /* 3266 /*
3257 * if we don't have enough free bytes in this space then we need 3267 * if we don't have enough free bytes in this space then we need
3258 * to alloc a new chunk. 3268 * to alloc a new chunk.
diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c
index aa7dc36dac78..8db7b14bbae8 100644
--- a/fs/btrfs/volumes.c
+++ b/fs/btrfs/volumes.c
@@ -2250,6 +2250,12 @@ again:
2250 if (!looped) 2250 if (!looped)
2251 calc_size = max_t(u64, min_stripe_size, calc_size); 2251 calc_size = max_t(u64, min_stripe_size, calc_size);
2252 2252
2253 /*
2254 * we're about to do_div by the stripe_len so lets make sure
2255 * we end up with something bigger than a stripe
2256 */
2257 calc_size = max_t(u64, calc_size, stripe_len * 4);
2258
2253 do_div(calc_size, stripe_len); 2259 do_div(calc_size, stripe_len);
2254 calc_size *= stripe_len; 2260 calc_size *= stripe_len;
2255 2261
diff --git a/fs/ext2/symlink.c b/fs/ext2/symlink.c
index 4e2426e22bbe..565cf817bbf1 100644
--- a/fs/ext2/symlink.c
+++ b/fs/ext2/symlink.c
@@ -32,6 +32,7 @@ const struct inode_operations ext2_symlink_inode_operations = {
32 .readlink = generic_readlink, 32 .readlink = generic_readlink,
33 .follow_link = page_follow_link_light, 33 .follow_link = page_follow_link_light,
34 .put_link = page_put_link, 34 .put_link = page_put_link,
35 .setattr = ext2_setattr,
35#ifdef CONFIG_EXT2_FS_XATTR 36#ifdef CONFIG_EXT2_FS_XATTR
36 .setxattr = generic_setxattr, 37 .setxattr = generic_setxattr,
37 .getxattr = generic_getxattr, 38 .getxattr = generic_getxattr,
@@ -43,6 +44,7 @@ const struct inode_operations ext2_symlink_inode_operations = {
43const struct inode_operations ext2_fast_symlink_inode_operations = { 44const struct inode_operations ext2_fast_symlink_inode_operations = {
44 .readlink = generic_readlink, 45 .readlink = generic_readlink,
45 .follow_link = ext2_follow_link, 46 .follow_link = ext2_follow_link,
47 .setattr = ext2_setattr,
46#ifdef CONFIG_EXT2_FS_XATTR 48#ifdef CONFIG_EXT2_FS_XATTR
47 .setxattr = generic_setxattr, 49 .setxattr = generic_setxattr,
48 .getxattr = generic_getxattr, 50 .getxattr = generic_getxattr,
diff --git a/fs/ext3/symlink.c b/fs/ext3/symlink.c
index ff7b4ccd8983..7c4898207776 100644
--- a/fs/ext3/symlink.c
+++ b/fs/ext3/symlink.c
@@ -34,6 +34,7 @@ const struct inode_operations ext3_symlink_inode_operations = {
34 .readlink = generic_readlink, 34 .readlink = generic_readlink,
35 .follow_link = page_follow_link_light, 35 .follow_link = page_follow_link_light,
36 .put_link = page_put_link, 36 .put_link = page_put_link,
37 .setattr = ext3_setattr,
37#ifdef CONFIG_EXT3_FS_XATTR 38#ifdef CONFIG_EXT3_FS_XATTR
38 .setxattr = generic_setxattr, 39 .setxattr = generic_setxattr,
39 .getxattr = generic_getxattr, 40 .getxattr = generic_getxattr,
@@ -45,6 +46,7 @@ const struct inode_operations ext3_symlink_inode_operations = {
45const struct inode_operations ext3_fast_symlink_inode_operations = { 46const struct inode_operations ext3_fast_symlink_inode_operations = {
46 .readlink = generic_readlink, 47 .readlink = generic_readlink,
47 .follow_link = ext3_follow_link, 48 .follow_link = ext3_follow_link,
49 .setattr = ext3_setattr,
48#ifdef CONFIG_EXT3_FS_XATTR 50#ifdef CONFIG_EXT3_FS_XATTR
49 .setxattr = generic_setxattr, 51 .setxattr = generic_setxattr,
50 .getxattr = generic_getxattr, 52 .getxattr = generic_getxattr,
diff --git a/fs/nilfs2/alloc.c b/fs/nilfs2/alloc.c
index 8d6356a804f3..7cfb87e692da 100644
--- a/fs/nilfs2/alloc.c
+++ b/fs/nilfs2/alloc.c
@@ -426,7 +426,7 @@ void nilfs_palloc_abort_alloc_entry(struct inode *inode,
426 bitmap = bitmap_kaddr + bh_offset(req->pr_bitmap_bh); 426 bitmap = bitmap_kaddr + bh_offset(req->pr_bitmap_bh);
427 if (!nilfs_clear_bit_atomic(nilfs_mdt_bgl_lock(inode, group), 427 if (!nilfs_clear_bit_atomic(nilfs_mdt_bgl_lock(inode, group),
428 group_offset, bitmap)) 428 group_offset, bitmap))
429 printk(KERN_WARNING "%s: entry numer %llu already freed\n", 429 printk(KERN_WARNING "%s: entry number %llu already freed\n",
430 __func__, (unsigned long long)req->pr_entry_nr); 430 __func__, (unsigned long long)req->pr_entry_nr);
431 431
432 nilfs_palloc_group_desc_add_entries(inode, group, desc, 1); 432 nilfs_palloc_group_desc_add_entries(inode, group, desc, 1);
diff --git a/fs/nilfs2/btree.c b/fs/nilfs2/btree.c
index 7cdd98b8d514..76c38e3e19d2 100644
--- a/fs/nilfs2/btree.c
+++ b/fs/nilfs2/btree.c
@@ -1879,7 +1879,7 @@ static int nilfs_btree_propagate_v(struct nilfs_btree *btree,
1879 struct nilfs_btree_path *path, 1879 struct nilfs_btree_path *path,
1880 int level, struct buffer_head *bh) 1880 int level, struct buffer_head *bh)
1881{ 1881{
1882 int maxlevel, ret; 1882 int maxlevel = 0, ret;
1883 struct nilfs_btree_node *parent; 1883 struct nilfs_btree_node *parent;
1884 struct inode *dat = nilfs_bmap_get_dat(&btree->bt_bmap); 1884 struct inode *dat = nilfs_bmap_get_dat(&btree->bt_bmap);
1885 __u64 ptr; 1885 __u64 ptr;
diff --git a/fs/nilfs2/ioctl.c b/fs/nilfs2/ioctl.c
index c2ff1b306012..f90a33d9a5b0 100644
--- a/fs/nilfs2/ioctl.c
+++ b/fs/nilfs2/ioctl.c
@@ -649,7 +649,7 @@ static int nilfs_ioctl_get_info(struct inode *inode, struct file *filp,
649long nilfs_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) 649long nilfs_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
650{ 650{
651 struct inode *inode = filp->f_dentry->d_inode; 651 struct inode *inode = filp->f_dentry->d_inode;
652 void __user *argp = (void * __user *)arg; 652 void __user *argp = (void __user *)arg;
653 653
654 switch (cmd) { 654 switch (cmd) {
655 case NILFS_IOCTL_CHANGE_CPMODE: 655 case NILFS_IOCTL_CHANGE_CPMODE:
diff --git a/fs/quota/dquot.c b/fs/quota/dquot.c
index e0b870f4749f..a0a9405b202a 100644
--- a/fs/quota/dquot.c
+++ b/fs/quota/dquot.c
@@ -874,14 +874,18 @@ static int dqinit_needed(struct inode *inode, int type)
874static void add_dquot_ref(struct super_block *sb, int type) 874static void add_dquot_ref(struct super_block *sb, int type)
875{ 875{
876 struct inode *inode, *old_inode = NULL; 876 struct inode *inode, *old_inode = NULL;
877#ifdef __DQUOT_PARANOIA
877 int reserved = 0; 878 int reserved = 0;
879#endif
878 880
879 spin_lock(&inode_lock); 881 spin_lock(&inode_lock);
880 list_for_each_entry(inode, &sb->s_inodes, i_sb_list) { 882 list_for_each_entry(inode, &sb->s_inodes, i_sb_list) {
881 if (inode->i_state & (I_FREEING|I_CLEAR|I_WILL_FREE|I_NEW)) 883 if (inode->i_state & (I_FREEING|I_CLEAR|I_WILL_FREE|I_NEW))
882 continue; 884 continue;
885#ifdef __DQUOT_PARANOIA
883 if (unlikely(inode_get_rsv_space(inode) > 0)) 886 if (unlikely(inode_get_rsv_space(inode) > 0))
884 reserved = 1; 887 reserved = 1;
888#endif
885 if (!atomic_read(&inode->i_writecount)) 889 if (!atomic_read(&inode->i_writecount))
886 continue; 890 continue;
887 if (!dqinit_needed(inode, type)) 891 if (!dqinit_needed(inode, type))
@@ -903,11 +907,13 @@ static void add_dquot_ref(struct super_block *sb, int type)
903 spin_unlock(&inode_lock); 907 spin_unlock(&inode_lock);
904 iput(old_inode); 908 iput(old_inode);
905 909
910#ifdef __DQUOT_PARANOIA
906 if (reserved) { 911 if (reserved) {
907 printk(KERN_WARNING "VFS (%s): Writes happened before quota" 912 printk(KERN_WARNING "VFS (%s): Writes happened before quota"
908 " was turned on thus quota information is probably " 913 " was turned on thus quota information is probably "
909 "inconsistent. Please run quotacheck(8).\n", sb->s_id); 914 "inconsistent. Please run quotacheck(8).\n", sb->s_id);
910 } 915 }
916#endif
911} 917}
912 918
913/* 919/*
@@ -2322,34 +2328,34 @@ static int do_set_dqblk(struct dquot *dquot, struct if_dqblk *di)
2322 if (di->dqb_valid & QIF_SPACE) { 2328 if (di->dqb_valid & QIF_SPACE) {
2323 dm->dqb_curspace = di->dqb_curspace - dm->dqb_rsvspace; 2329 dm->dqb_curspace = di->dqb_curspace - dm->dqb_rsvspace;
2324 check_blim = 1; 2330 check_blim = 1;
2325 __set_bit(DQ_LASTSET_B + QIF_SPACE_B, &dquot->dq_flags); 2331 set_bit(DQ_LASTSET_B + QIF_SPACE_B, &dquot->dq_flags);
2326 } 2332 }
2327 if (di->dqb_valid & QIF_BLIMITS) { 2333 if (di->dqb_valid & QIF_BLIMITS) {
2328 dm->dqb_bsoftlimit = qbtos(di->dqb_bsoftlimit); 2334 dm->dqb_bsoftlimit = qbtos(di->dqb_bsoftlimit);
2329 dm->dqb_bhardlimit = qbtos(di->dqb_bhardlimit); 2335 dm->dqb_bhardlimit = qbtos(di->dqb_bhardlimit);
2330 check_blim = 1; 2336 check_blim = 1;
2331 __set_bit(DQ_LASTSET_B + QIF_BLIMITS_B, &dquot->dq_flags); 2337 set_bit(DQ_LASTSET_B + QIF_BLIMITS_B, &dquot->dq_flags);
2332 } 2338 }
2333 if (di->dqb_valid & QIF_INODES) { 2339 if (di->dqb_valid & QIF_INODES) {
2334 dm->dqb_curinodes = di->dqb_curinodes; 2340 dm->dqb_curinodes = di->dqb_curinodes;
2335 check_ilim = 1; 2341 check_ilim = 1;
2336 __set_bit(DQ_LASTSET_B + QIF_INODES_B, &dquot->dq_flags); 2342 set_bit(DQ_LASTSET_B + QIF_INODES_B, &dquot->dq_flags);
2337 } 2343 }
2338 if (di->dqb_valid & QIF_ILIMITS) { 2344 if (di->dqb_valid & QIF_ILIMITS) {
2339 dm->dqb_isoftlimit = di->dqb_isoftlimit; 2345 dm->dqb_isoftlimit = di->dqb_isoftlimit;
2340 dm->dqb_ihardlimit = di->dqb_ihardlimit; 2346 dm->dqb_ihardlimit = di->dqb_ihardlimit;
2341 check_ilim = 1; 2347 check_ilim = 1;
2342 __set_bit(DQ_LASTSET_B + QIF_ILIMITS_B, &dquot->dq_flags); 2348 set_bit(DQ_LASTSET_B + QIF_ILIMITS_B, &dquot->dq_flags);
2343 } 2349 }
2344 if (di->dqb_valid & QIF_BTIME) { 2350 if (di->dqb_valid & QIF_BTIME) {
2345 dm->dqb_btime = di->dqb_btime; 2351 dm->dqb_btime = di->dqb_btime;
2346 check_blim = 1; 2352 check_blim = 1;
2347 __set_bit(DQ_LASTSET_B + QIF_BTIME_B, &dquot->dq_flags); 2353 set_bit(DQ_LASTSET_B + QIF_BTIME_B, &dquot->dq_flags);
2348 } 2354 }
2349 if (di->dqb_valid & QIF_ITIME) { 2355 if (di->dqb_valid & QIF_ITIME) {
2350 dm->dqb_itime = di->dqb_itime; 2356 dm->dqb_itime = di->dqb_itime;
2351 check_ilim = 1; 2357 check_ilim = 1;
2352 __set_bit(DQ_LASTSET_B + QIF_ITIME_B, &dquot->dq_flags); 2358 set_bit(DQ_LASTSET_B + QIF_ITIME_B, &dquot->dq_flags);
2353 } 2359 }
2354 2360
2355 if (check_blim) { 2361 if (check_blim) {
diff --git a/fs/udf/balloc.c b/fs/udf/balloc.c
index 19626e2491c4..9a9378b4eb5a 100644
--- a/fs/udf/balloc.c
+++ b/fs/udf/balloc.c
@@ -125,9 +125,8 @@ static void udf_bitmap_free_blocks(struct super_block *sb,
125 125
126 mutex_lock(&sbi->s_alloc_mutex); 126 mutex_lock(&sbi->s_alloc_mutex);
127 partmap = &sbi->s_partmaps[bloc->partitionReferenceNum]; 127 partmap = &sbi->s_partmaps[bloc->partitionReferenceNum];
128 if (bloc->logicalBlockNum < 0 || 128 if (bloc->logicalBlockNum + count < count ||
129 (bloc->logicalBlockNum + count) > 129 (bloc->logicalBlockNum + count) > partmap->s_partition_len) {
130 partmap->s_partition_len) {
131 udf_debug("%d < %d || %d + %d > %d\n", 130 udf_debug("%d < %d || %d + %d > %d\n",
132 bloc->logicalBlockNum, 0, bloc->logicalBlockNum, 131 bloc->logicalBlockNum, 0, bloc->logicalBlockNum,
133 count, partmap->s_partition_len); 132 count, partmap->s_partition_len);
@@ -393,9 +392,8 @@ static void udf_table_free_blocks(struct super_block *sb,
393 392
394 mutex_lock(&sbi->s_alloc_mutex); 393 mutex_lock(&sbi->s_alloc_mutex);
395 partmap = &sbi->s_partmaps[bloc->partitionReferenceNum]; 394 partmap = &sbi->s_partmaps[bloc->partitionReferenceNum];
396 if (bloc->logicalBlockNum < 0 || 395 if (bloc->logicalBlockNum + count < count ||
397 (bloc->logicalBlockNum + count) > 396 (bloc->logicalBlockNum + count) > partmap->s_partition_len) {
398 partmap->s_partition_len) {
399 udf_debug("%d < %d || %d + %d > %d\n", 397 udf_debug("%d < %d || %d + %d > %d\n",
400 bloc->logicalBlockNum, 0, bloc->logicalBlockNum, count, 398 bloc->logicalBlockNum, 0, bloc->logicalBlockNum, count,
401 partmap->s_partition_len); 399 partmap->s_partition_len);
diff --git a/fs/udf/file.c b/fs/udf/file.c
index 1eb06774ed90..4b6a46ccbf46 100644
--- a/fs/udf/file.c
+++ b/fs/udf/file.c
@@ -218,7 +218,7 @@ const struct file_operations udf_file_operations = {
218 .llseek = generic_file_llseek, 218 .llseek = generic_file_llseek,
219}; 219};
220 220
221static int udf_setattr(struct dentry *dentry, struct iattr *iattr) 221int udf_setattr(struct dentry *dentry, struct iattr *iattr)
222{ 222{
223 struct inode *inode = dentry->d_inode; 223 struct inode *inode = dentry->d_inode;
224 int error; 224 int error;
diff --git a/fs/udf/inode.c b/fs/udf/inode.c
index bb863fe579ac..8a3fbd177cab 100644
--- a/fs/udf/inode.c
+++ b/fs/udf/inode.c
@@ -1314,7 +1314,7 @@ static void udf_fill_inode(struct inode *inode, struct buffer_head *bh)
1314 break; 1314 break;
1315 case ICBTAG_FILE_TYPE_SYMLINK: 1315 case ICBTAG_FILE_TYPE_SYMLINK:
1316 inode->i_data.a_ops = &udf_symlink_aops; 1316 inode->i_data.a_ops = &udf_symlink_aops;
1317 inode->i_op = &page_symlink_inode_operations; 1317 inode->i_op = &udf_symlink_inode_operations;
1318 inode->i_mode = S_IFLNK | S_IRWXUGO; 1318 inode->i_mode = S_IFLNK | S_IRWXUGO;
1319 break; 1319 break;
1320 case ICBTAG_FILE_TYPE_MAIN: 1320 case ICBTAG_FILE_TYPE_MAIN:
diff --git a/fs/udf/namei.c b/fs/udf/namei.c
index db423ab078b1..75816025f95f 100644
--- a/fs/udf/namei.c
+++ b/fs/udf/namei.c
@@ -925,7 +925,7 @@ static int udf_symlink(struct inode *dir, struct dentry *dentry,
925 iinfo = UDF_I(inode); 925 iinfo = UDF_I(inode);
926 inode->i_mode = S_IFLNK | S_IRWXUGO; 926 inode->i_mode = S_IFLNK | S_IRWXUGO;
927 inode->i_data.a_ops = &udf_symlink_aops; 927 inode->i_data.a_ops = &udf_symlink_aops;
928 inode->i_op = &page_symlink_inode_operations; 928 inode->i_op = &udf_symlink_inode_operations;
929 929
930 if (iinfo->i_alloc_type != ICBTAG_FLAG_AD_IN_ICB) { 930 if (iinfo->i_alloc_type != ICBTAG_FLAG_AD_IN_ICB) {
931 struct kernel_lb_addr eloc; 931 struct kernel_lb_addr eloc;
@@ -1393,6 +1393,7 @@ const struct export_operations udf_export_ops = {
1393const struct inode_operations udf_dir_inode_operations = { 1393const struct inode_operations udf_dir_inode_operations = {
1394 .lookup = udf_lookup, 1394 .lookup = udf_lookup,
1395 .create = udf_create, 1395 .create = udf_create,
1396 .setattr = udf_setattr,
1396 .link = udf_link, 1397 .link = udf_link,
1397 .unlink = udf_unlink, 1398 .unlink = udf_unlink,
1398 .symlink = udf_symlink, 1399 .symlink = udf_symlink,
@@ -1401,3 +1402,9 @@ const struct inode_operations udf_dir_inode_operations = {
1401 .mknod = udf_mknod, 1402 .mknod = udf_mknod,
1402 .rename = udf_rename, 1403 .rename = udf_rename,
1403}; 1404};
1405const struct inode_operations udf_symlink_inode_operations = {
1406 .readlink = generic_readlink,
1407 .follow_link = page_follow_link_light,
1408 .put_link = page_put_link,
1409 .setattr = udf_setattr,
1410};
diff --git a/fs/udf/udfdecl.h b/fs/udf/udfdecl.h
index 4223ac855da9..702a1148e702 100644
--- a/fs/udf/udfdecl.h
+++ b/fs/udf/udfdecl.h
@@ -76,6 +76,7 @@ extern const struct inode_operations udf_dir_inode_operations;
76extern const struct file_operations udf_dir_operations; 76extern const struct file_operations udf_dir_operations;
77extern const struct inode_operations udf_file_inode_operations; 77extern const struct inode_operations udf_file_inode_operations;
78extern const struct file_operations udf_file_operations; 78extern const struct file_operations udf_file_operations;
79extern const struct inode_operations udf_symlink_inode_operations;
79extern const struct address_space_operations udf_aops; 80extern const struct address_space_operations udf_aops;
80extern const struct address_space_operations udf_adinicb_aops; 81extern const struct address_space_operations udf_adinicb_aops;
81extern const struct address_space_operations udf_symlink_aops; 82extern const struct address_space_operations udf_symlink_aops;
@@ -131,7 +132,7 @@ extern int udf_write_fi(struct inode *inode, struct fileIdentDesc *,
131/* file.c */ 132/* file.c */
132extern int udf_ioctl(struct inode *, struct file *, unsigned int, 133extern int udf_ioctl(struct inode *, struct file *, unsigned int,
133 unsigned long); 134 unsigned long);
134 135extern int udf_setattr(struct dentry *dentry, struct iattr *iattr);
135/* inode.c */ 136/* inode.c */
136extern struct inode *udf_iget(struct super_block *, struct kernel_lb_addr *); 137extern struct inode *udf_iget(struct super_block *, struct kernel_lb_addr *);
137extern int udf_sync_inode(struct inode *); 138extern int udf_sync_inode(struct inode *);
diff --git a/net/sunrpc/xprtrdma/svc_rdma_transport.c b/net/sunrpc/xprtrdma/svc_rdma_transport.c
index fd90eb89842b..edea15a54e51 100644
--- a/net/sunrpc/xprtrdma/svc_rdma_transport.c
+++ b/net/sunrpc/xprtrdma/svc_rdma_transport.c
@@ -679,7 +679,10 @@ static struct svc_xprt *svc_rdma_create(struct svc_serv *serv,
679 int ret; 679 int ret;
680 680
681 dprintk("svcrdma: Creating RDMA socket\n"); 681 dprintk("svcrdma: Creating RDMA socket\n");
682 682 if (sa->sa_family != AF_INET) {
683 dprintk("svcrdma: Address family %d is not supported.\n", sa->sa_family);
684 return ERR_PTR(-EAFNOSUPPORT);
685 }
683 cma_xprt = rdma_create_xprt(serv, 1); 686 cma_xprt = rdma_create_xprt(serv, 1);
684 if (!cma_xprt) 687 if (!cma_xprt)
685 return ERR_PTR(-ENOMEM); 688 return ERR_PTR(-ENOMEM);
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-04 10:32:20 -0500